WO2023036138A1 - Light-emitting device and preparation method therefor - Google Patents

Light-emitting device and preparation method therefor Download PDF

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Publication number
WO2023036138A1
WO2023036138A1 PCT/CN2022/117315 CN2022117315W WO2023036138A1 WO 2023036138 A1 WO2023036138 A1 WO 2023036138A1 CN 2022117315 W CN2022117315 W CN 2022117315W WO 2023036138 A1 WO2023036138 A1 WO 2023036138A1
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WO
WIPO (PCT)
Prior art keywords
bump
seat
layer
convex lens
recess
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Application number
PCT/CN2022/117315
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French (fr)
Chinese (zh)
Inventor
段复元
朱克泰
郑宪鸿
林茂仲
Original Assignee
台州观宇科技有限公司
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Publication date
Priority claimed from CN202211023658.5A external-priority patent/CN116828890A/en
Application filed by 台州观宇科技有限公司 filed Critical 台州观宇科技有限公司
Publication of WO2023036138A1 publication Critical patent/WO2023036138A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices

Definitions

  • the present disclosure relates to a light emitting device and a manufacturing method thereof, in particular to a light emitting device including bumps and convex lenses and a manufacturing method thereof.
  • Organic light emitting devices have been widely used in displays of the most high-end electronic devices. However, due to limitations of the prior art, the brightness of the light emitting device is limited. Therefore, for display manufacturers, a light emitting device with higher luminance becomes a striving goal.
  • a light-emitting device includes a substrate, a first conductive layer disposed on the substrate, a first bump seat disposed on the first conductive layer, a second bump seat disposed on the first conductive layer and The first bump seat is separated, and a first electrode layer is disposed on the first bump seat, the first conductive layer and the second bump seat, and the first electrode layer includes the first electrode layer located on the first bump seat The side wall, the side wall of the second bump seat, and a first recess between the first bump seat and the second bump seat.
  • the light-emitting device also includes a first protrusion disposed on the first protrusion seat and at least a part of the first recess, a second protrusion disposed on the second protrusion seat and at least a part of the first recess.
  • a light-emitting unit is formed in the first concave portion and is located between the first protrusion and the second protrusion, and a convex lens is arranged on the light-emitting unit and vertically aligned with the light-emitting unit, the convex lens has A bottom surface and a convex surface, the convex surface protrudes toward the light-emitting unit, and there is an included angle between the bottom surface and the convex surface, and the included angle ranges from 20° to 50°
  • the light emitting device further includes a third bump seat disposed on the first conductive layer and separated from the first bump seat and the second bump seat; and a second recess , formed between the second bump seat and the third bump seat, and the second bump fills up the second recess.
  • the convex lens overlaps with at least a portion of the first bump seat and at least a portion of the second bump seat, and is separated from the second concave portion when viewed from a top view.
  • the light-emitting device further includes a covering layer disposed on the first bump and the second bump and the light-emitting unit; and a filler layer disposed on the covering layer and the convex lens, wherein the convex lens has a first Refractive index, the filler layer has a second refractive index, and the difference between the first refractive index and the second refractive index is less than 0.05.
  • the covering layer has a third refractive index, the second refractive index is greater than the first refractive index, and the first refractive index is greater than or equal to the third refractive index.
  • a light-emitting device includes a pixel array, a first convex lens and a second convex lens.
  • the pixel array includes a first pixel, a second pixel spaced next to the first pixel, and a concave portion between the first pixel and the second pixel; the first convex lens is arranged on the first pixel and vertically aligned with the first pixel; and the second convex lens is disposed on the second pixel and separated from the first convex lens.
  • the first pixel includes a first bump seat; a second bump seat separated from the first bump seat; a first bump is arranged on the first bump seat and covers the first bump At least a part of an upper surface and a side wall of the seat; a second protrusion is arranged on the second protrusion seat and covers at least one of an upper surface and a side wall of the second protrusion seat In part, the side wall of the first bump seat is opposite to the side wall of the second bump seat; an electrode layer is arranged between the first bump and the second bump; and a light emitting unit is arranged On the electrode layer between the first bump and the second bump.
  • the second pixel includes a third bump seat separated from the second bump seat, the recess is arranged between the second bump seat and the third bump seat, and the second bump fills up The recess extends to cover the third bump seat.
  • the electrode layer extends between the first bump and the sidewall of the first bump seat, and extends to the sidewall of the second bump and the second bump seat between.
  • the light-emitting unit is elliptical
  • the first convex lens has a bottom surface and a convex surface, the convex surface protrudes toward the light-emitting unit, and there is an included angle between the bottom surface and the convex surface, the clip The angle ranges from 20° to 50°.
  • a method for preparing a light-emitting device comprising forming a first conductive layer on a first substrate; forming a dielectric layer on the first conductive layer; forming a second conductive layer on the dielectric layer; forming a The first electrode layer is on the second conductive layer; patterning the first electrode layer, the second conductive layer and the dielectric layer to form a first opening exposing the first conductive layer; forming a second electrode layer On the first opening and the first electrode layer, a first recess having the same shape as the first opening is formed, the first recess has a first side wall and a second side wall opposite to the first side wall , and a bottom between the first side wall and the second side wall; forming a first protrusion on the first side wall of the first recess; forming a second protrusion on the first recess second side wall; forming a light-emitting unit between the bottom of the first recess and the first bump and the second bump; forming a convex lens on
  • the convex lens has a bottom surface and a convex surface, the convex surface protrudes toward the light emitting unit, and there is an included angle ( ⁇ ) between the bottom surface and the convex surface, and the included angle ranges from 20° to 50°.
  • the method of manufacturing a light-emitting device further includes forming a covering layer between the convex lens and the convex lens; and forming a filler layer between the covering layer and the convex lens, and in contact with the convex lens.
  • the convex lens has a first refractive index
  • the filler layer has a second refractive index
  • the covering layer has a third refractive index
  • the second refractive index is greater than the first refractive index
  • the first refractive index is greater than or equal to The third refractive index
  • the difference between the first refractive index and the second refractive index is less than 0.05.
  • Fig. 1 is a top view of a light emitting device according to some embodiments.
  • Fig. 2 is a cross-sectional view of a light emitting device according to some embodiments.
  • Fig. 3 is a top view of a light emitting device according to some embodiments.
  • FIG. 4 is a flowchart of a method of fabricating a light emitting device, according to certain embodiments.
  • 5-26 are schematic diagrams illustrating light emitting devices at various stages of fabrication according to methods of certain embodiments of the present disclosure.
  • first and second features are formed in direct contact
  • other features are formed between the first and second features
  • the application may repeat components and/or letters in different instances. This repetition is for purposes of simplicity and clarity and does not dictate the relationship between the different embodiments and/or architectures discussed.
  • this application can use spatially corresponding words, such as “below”, “between”, “below”, “lower”, “higher”, “higher” and other simple descriptions of similar words to describe the figure.
  • the relationship of one component or feature to another component or feature Spatially equivalent terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings.
  • the device may be oriented (rotated 90 degrees or otherwise) and the spatially corresponding descriptions used in this application interpreted accordingly.
  • FIG. 1 is a top view illustrating a light emitting device 100 .
  • the light emitting device 100 has a pixel array, the pixel array includes a plurality of pixels, and each pixel includes a light emitting unit 350 .
  • the pixel array may, for example but not limited to, include a first pixel and a second pixel spaced beside the first pixel, each pixel includes a light emitting unit 350 , and the recess 361 is located between the first pixel and the second pixel.
  • the light emitting unit 350 may be in any shape, such as but not limited to a circle, an ellipse, a polygon, and the like.
  • the light emitting device 100 includes a plurality of light emitting units 350 and a cover layer 381 , a filler layer 382 , a silicon oxide layer 383 , and a second substrate 384 located above the light emitting units 350 .
  • the light emitting unit 350 it can be arranged between a plurality of protrusions 340, for example, the first recess 331 disposed between the first protrusion 341 and the second protrusion 342, the first recess 331 provides a recess for accommodating the array of light emitting units 350 array.
  • a second concave portion 361 is disposed under the second protrusion 342 , and a convex lens 390 is disposed on each light emitting unit 350 .
  • the plurality of second recesses 361 form a recess array for reflecting the light emitted by the array of light emitting units 350 .
  • the plurality of light emitting units 350 are separated by the plurality of bumps 340 .
  • each convex lens 350 is disposed corresponding to each light emitting unit 350 .
  • the second concave portion 361 is offset from the plurality of convex lenses 350 in a plan view.
  • FIG. 2 is a cross-sectional view of a light emitting device according to some embodiments of the present disclosure.
  • FIG. 2 is an illustration of a sectional view along line AA in FIG. 1 and only illustrates this area.
  • the light emitting device has several bumps 340 to define a pattern of light emitting pixels.
  • the first recess 331 is located between two adjacent protrusions 340 and provides a space for accommodating light-emitting pixels.
  • the light emitting device 100 includes a first substrate 110 and a first conductive layer 310 disposed on the first substrate 110 .
  • the first substrate 110 is located under the first conductive layer 310 .
  • the first substrate 110 may include a transistor array whose configuration corresponds to the light emitting unit 350 .
  • the first substrate 110 may include several capacitors. In some embodiments, more than one transistor is configured to form a circuit with a capacitor and a light emitting unit 350 .
  • the first substrate 110 includes a substrate 111 , a dielectric layer 112 , and one or more circuits are disposed on the substrate 111 .
  • the substrate 111 is a transparent substrate, or at least a part of the substrate is transparent.
  • the substrate 111 is a non-flexible substrate, and the material of the substrate 111 may include glass, quartz, low temperature poly-silicon (LTPS) or other suitable materials.
  • the substrate 111 is a flexible substrate, and the material of the substrate 111 may include transparent epoxy resin, polyimide, polyvinyl chloride, methyl methacrylate or other suitable materials.
  • the dielectric layer 112 can be disposed on the substrate 110 as shown in FIG. 1 as needed.
  • the dielectric layer 112 may include silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials.
  • the circuit may comprise a CMOS circuit, or comprise a plurality of transistors 210 and a plurality of capacitors 220 adjacent to the transistor, wherein the transistors 210 and the capacitors 220 are formed on the dielectric layer 112 .
  • the transistor 210 is a thin-film transistor (thin-film transistor, TFT).
  • TFT thin-film transistor
  • Each transistor 210 includes a source/drain region 212 (including at least one source region and a drain region), a channel region 213 between the source/drain regions 212, and a gate disposed above the channel region 213.
  • An electrode 214 and a gate insulator 215 between the channel region 213 and the gate electrode 214 .
  • the gate electrode 214 can be made of conductive material, such as metal, silicide or metal alloy. In some embodiments, the gate electrode 214 can be a composite structure that includes several different layers, and these different layers can be distinguished from each other by applying an etchant and observing under a microscope. In some embodiments, the gate electrode 214 and the first metal layer of the ILD structure 230 are formed simultaneously.
  • the interlayer dielectric structure 230 is disposed on the circuit or transistor 210 .
  • the interlayer dielectric structure 230 may include several layers of metal wires and dielectric materials for electrical connection and isolation.
  • the channel region 213 of the transistor 210 may be made of a semiconductor material such as silicon or other elements selected from Group IV or Group III and Group V.
  • the ILD structure 230 has a thickness between about 100 nm and 1000 nm. In some embodiments, the ILD structure 230 has a thickness between about 200 nm and 500 nm.
  • the gate insulator 215 covers the channel region 213 and the source/drain region 212 of the transistor 210 , and the gate insulator 215 is disposed between the adjacent capacitor 220 and the dielectric layer 112 . In some embodiments, the gate insulator 215 is formed after the source/drain region 212 and the channel region 213 are formed on the dielectric layer 112 . Source/drain regions 212 are disposed on opposite sides of the channel region 213 to provide carriers. In some embodiments, the capacitor 220 is disposed between the transistors 210 . Each capacitor 220 includes a lower electrode 221 , an upper electrode 222 and an insulating layer 223 between the upper electrode 222 and the lower electrode 221 .
  • the bottom electrode 221 and the metal layer of the ILD structure 230 on the dielectric layer 112 are formed simultaneously.
  • the insulating layer 223 is formed on the transistor 210 after the metal layer is formed. In some embodiments, the insulating layer 223 is disposed on and conforms to the bottom electrode 221 and the transistor 210 .
  • the upper electrode 222 is disposed on the insulating layer 223 in the interlayer dielectric structure 230 .
  • the upper electrode 222 may include titanium, aluminum, copper, titanium nitride, combinations thereof, or other suitable materials. In some embodiments, the upper electrode 222 and the metal layer of the ILD structure 230 are formed simultaneously. In some embodiments, after the insulating layer 223 is formed, the upper electrode 222 and the metal layer of the upper electrode 222 and the interlayer dielectric structure 230 are formed.
  • a connection structure 240 electrically connects the transistor 210 to the capacitor 220 .
  • the connection structure 240 includes a plurality of connection vias and a plurality of connection lines.
  • the connection vias may be connected to the source/drain region 212 of the transistor 210, the gate electrode 214 of the transistor 210, and the lower and/or upper electrodes 221 and 222 of the capacitor 220 are connected to connection lines and formed on the substrate 111 an integrated circuit.
  • the connection structure 240 may include some connection vias 241 , one end of which is connected to the drain region 212 of the transistor 210 .
  • the connection structure 240 may include certain connection vias 242 , one end of which is connected to the source region 212 of the transistor 210 .
  • the connection structure 240 may include some connection vias 243 one end of which is connected to the lower electrode 221 of the capacitor 220 .
  • the connection structure 240 may include some connection wires 244 , one ends of which are respectively connected to the connection passages 241 .
  • the connecting structure 240 may include some connecting wires (not shown), one end of which is only connected to the connecting vias 242 respectively.
  • the connection structure 240 may further include some connection wires 245 , one end of which is connected to the connection passage 242 and the connection passage 243 .
  • the connection lines are formed while forming the metal layer (eg, the third metal layer) of the interlayer dielectric structure 230 .
  • the connection structure 240 is electrically connected to a conductive plug 246 .
  • the conductive plug 246 is electrically connected to the connecting wire 244 and/or the connecting via 241 .
  • the data lines (not shown in the figure) are disposed above the connection lines of the connection structure 240 to be electrically connected to the source/drain regions 212 .
  • the first conductive layer 310 is disposed above the interlayer dielectric structure 230 and the connection structure 240 , wherein a part of the first conductive layer 310 is electrically connected to the connection structure 240 .
  • the first conductive layer 310 has a flat surface like the first substrate 110, and is electrically connected to the transistor through a conductive plug 246 and the connection structure 240 (including the connection vias 242, 243 and the connection line 245). 210 and/or capacitor 220.
  • the first conductive layer 310 is discontinuously disposed on the first substrate 110 .
  • the first conductive layer 310 is disconnected by the second concave portion 361 .
  • the first conductive layer 310 includes Al. In some embodiments, the thickness of the first conductive layer 310 ranges from 50 nm to 300 nm.
  • the etch stop layer 311 is disposed between the first substrate 110 and the first conductive layer 310 . In some embodiments, a portion of the etch stop layer 311 is exposed from the first conductive layer 310 and contacts the second bump 341 . In some embodiments, the etch stop layer 311 includes a material having a different etch selectivity than aluminum. In some embodiments, the etch stop layer 311 includes Ti. In some embodiments, the thickness of the etch stop layer 311 ranges from 300 nm to 800 nm. In some embodiments, the etch stop layer 311 surrounds the conductive plug 246 .
  • the first bump seat 321 and the second bump seat 322 are respectively disposed on the first conductive layer 310 and separated from each other.
  • there is a radius angle ⁇ 1 between the sidewall 3212 and the bottom surface of the first bump seat 321 and the radius angle ⁇ 1 ranges from 10 degrees to 90 degrees.
  • the first bump seat 321 is trapezoidal.
  • the sidewall 3212 of the first bump seat 321 is an arc-shaped surface.
  • the sidewall 3212 of the first bump seat 321 is a concave arc surface.
  • the first bump pad 321 includes a stack of at least three different layers.
  • the first bump seat 321 includes a dielectric layer 324 disposed on the first conductive layer 310, a second conductive layer 325 disposed on the dielectric layer 324, and a second electrode layer 326 disposed on the second on the conductive layer 325 .
  • the dielectric layer 324 includes a dielectric material.
  • the dielectric layer 324 includes SiN.
  • the thickness of the dielectric layer 324 is smaller than that of the first conductive layer 310 , for example, has a thickness ranging from 5 nm to 50 nm.
  • the second conductive layer 325 includes aluminum.
  • the thickness of the second conductive layer 325 is greater than that of the dielectric layer 324, such as having a thickness ranging from 50 nm to 300 nm. In some embodiments, the thickness of the first conductive layer 310 is greater than that of the second conductive layer 310. The thickness of layer 325 . In some embodiments, the second electrode layer 326 is transparent. In some embodiments, the second electrode layer 326 includes an electrode material such as but not limited to indium tin oxide (ITO), molybdenum, or a combination thereof. In some embodiments, the thickness of the second electrode layer 326 ranges from 5 nm to 50 nm.
  • ITO indium tin oxide
  • the second bump seat 322 is trapezoidal.
  • the first sidewall 3222 of the second bump seat 322 is an arc-shaped surface.
  • the first sidewall 3222 of the second bump seat 322 is a concave arc surface.
  • the second bump pad 322 includes a stack of at least three different layers.
  • the second bump seat 322 includes a dielectric layer 324 disposed on the first conductive layer 310, a second conductive layer 325 disposed on the dielectric layer 324, and a second electrode layer 326 disposed on the second on the conductive layer 325 .
  • the second bump seat 322 includes the same stack structure as the first bump seat 321 .
  • the height of the second bump seat 322 is the same as that of the first bump seat 321 .
  • the widths of the second bump seat 322 and the first bump seat 321 may be the same or different.
  • the first electrode layer 330 is disposed on the first bump seat 321 , the second bump seat 322 , and the first conductive layer 310 between the first bump seat 321 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is continuously disposed on the first bump seat 321 , the first conductive layer 310 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is in contact with the first bump seat 321 , the first conductive layer 310 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is in contact with the first conductive layer 310 between the first bump seat 321 and the second bump seat 322 .
  • the first electrode layer 330 is in contact with the sidewall 3212 and the upper surface 3211 of the first bump seat 321 . In some embodiments, the first electrode layer 330 is in contact with the first sidewall 3222 and the upper surface 3221 of the second bump seat 322 .
  • the first electrode layer 330 is transparent.
  • the first electrode layer 330 includes an electrode material, such as but not limited to indium tin oxide (ITO), molybdenum, or a combination thereof.
  • the thickness of the first electrode layer 330 ranges from 5 nm to 50 nm.
  • the thickness of the first electrode layer 330 and the thickness of the second electrode layer 326 may be the same or different.
  • the refractive index of the first electrode layer 330 is different from that of the second electrode layer 326 .
  • the first electrode layer 330 and the second electrode layer 326 include electrode materials with different crystal phases, and the brightness of the light emitting device 100 is increased by configuring materials with different crystal phases and different refractive indices.
  • the first electrode layer 330 includes a first recess 331 located between the first bump seat 321 and the second bump seat 322 .
  • the first recess 331 is located on the sidewall 3212 of the first bump seat 321 and the first sidewall 3222 of the second bump seat 322 .
  • the first recess 331 has a first sidewall 332 , a second sidewall 333 opposite to the first sidewall 332 , and a bottom 334 between the first sidewall 332 and the second sidewall 333 .
  • the first side wall 332 of the first recess 331 is disposed on the side wall 3212 of the first bump seat 321, and the second side wall 333 of the first recess 331 is disposed on the second bump seat 322 on the first side wall 3222 .
  • the bottom 334 of the first recess 331 is in contact with the first conductive layer 310 .
  • a first protruding block 341 and a second protruding block 342 are respectively provided on two opposite side walls 332 , 333 of the first concave portion 331 .
  • the first bump 341 and the second bump 342 are separated from each other.
  • the first bump seat 321 and the second bump seat 322 are used for disposing the fast 340 thereon.
  • the first bump 341 is disposed on the first bump seat 321 and covers at least a part of the first sidewall 332 of the first recess 331 of the first electrode layer 330 .
  • the first bump 341 covers the upper surface 3211 and the sidewall 3212 of the first bump seat 321 .
  • the first bump 341 and the second bump 342 respectively have curved surfaces protruding from the first substrate 110 .
  • the bumps 340 serve as a pattern definition layer.
  • the area between the first bump 341 and the second bump 342 is configured to accommodate the light emitting unit 350 .
  • the first bump 341 and/or the second bump 342 includes a photosensitive material.
  • the first bump 341 and/or the second bump 342 includes a light-absorbing material.
  • the first bump 341 and/or the second bump 342 includes a light-transmitting material.
  • the first bump 341 and/or the second bump 342 does not contain fluorine.
  • the first bump 341 and the second bump 342 include the same material.
  • the thickness T1 of the first bump 341 (equivalent to the distance from the upper surface of the first electrode layer 330 on the first bump seat 321 to the apex of the first bump 341 ) ranges from 100 nm to 500 nm. .
  • the second protrusion 342 is disposed on the second protrusion seat 322 and covers at least a part of the second side wall 333 .
  • the second bump 342 covers the upper surface 3221 and the sidewall 3222 of the second bump seat 322 .
  • the first electrode layer 330 is disposed between the first bump 341 and the second bump 342 , and extends to between the first bump 341 and the sidewall 3212 of the first bump seat 321 , and extends to Between the second bump 342 and the first side wall 3222 of the second bump seat 322 .
  • the thickness T2 of the second bump 342 (equivalent to the distance from the upper surface of the first electrode layer 330 on the second bump seat 322 to the apex of the second bump 342) ranges from 100 nm to 500 nm. .
  • the light emitting unit 350 is formed on the bottom 334 of the first recess 331 and located between the first bump 341 and the second bump 342 . In some embodiments, the light emitting unit 350 is in the same shape as the first concave portion 331 . In some embodiments, the light emitting unit 350 is in contact with the first bump 341 and the second bump 342. In some embodiments, the upper surface of the light emitting unit 350 is higher than the upper surface 3211 of the first bump seat 321 and lower than the apex of the first bump 341 . When the upper surface of the light emitting unit 350 is lower than the apex of the first protrusion 341 , the light emitting device 100 is less likely to be broken, and it is beneficial for the light emitting unit 350 to emit light laterally.
  • the light emitting unit 350 includes a carrier injection layer 351 .
  • the carrier injection layer 351 is disposed on the exposed surface of the bottom surface 334 of the first recess 331 of the first electrode layer 330 .
  • the carrier injection layer 351 is lined along the bottom surface 334 . More specifically, the area between the first bump 341 and the second bump 342 is configured as an effective light emitting area of the light emitting unit 350 .
  • each light emitting unit 350 has an individual carrier injection layer 351 .
  • the carrier injection layer 351 is in contact with the bottom surface 334 of the first recess 331 of the first electrode layer 330 .
  • the carrier injection layer 351 is in contact with the first bump 341 and the second bump 342 . In some embodiments, the carrier injection layer 351 is used for hole injection or electron injection. In some embodiments, the carrier injection layer 351 includes an organic material.
  • the light-emitting unit 350 includes a carrier transport layer 352 (or called a first-type carrier transport layer).
  • the carrier injection layer 351 is disposed under the carrier transport layer 352 .
  • the carrier transport layer 352 lines the carrier injection layer 351 .
  • Each light emitting unit has an individual carrier transport layer 352 .
  • the carrier transport layer 352 is used for hole transport or electron transport.
  • the carrier transport layer 352 is in contact with the carrier injection layer 351 .
  • the carrier transport layer 352 is in contact with the first bump 341 and the second bump 342 .
  • the carrier transport layer 352 includes organic materials.
  • the light emitting unit 350 includes an organic light emitting (EM) layer 353 .
  • the organic light emitting layer 353 covers the carrier transport layer 352 .
  • the organic light emitting layer 353 lines along the carrier transport layer 352 .
  • the organic light emitting layer 263 is configured to emit light in a color, such as red, green or blue.
  • the organic light emitting layer 263 includes organic light emitting materials.
  • the light emitting unit 350 includes a carrier transport layer 354 (or called a second-type carrier transport layer).
  • a carrier transport layer 354 (or called a second-type carrier transport layer) is disposed on the organic light emitting layer 353 .
  • the carrier transport layer 354 can be a hole transport layer or an electron transport layer.
  • the carrier transport layer 354 and the carrier transport layer 352 are respectively configured in opposite valence states.
  • the carrier transport layer 354 includes organic materials.
  • the light emitting unit 350 includes a second electrode 355 .
  • the second electrode 355 is disposed on the organic carrier transport layer 354 .
  • the second electrode 355 extends to the side surfaces of the first bump 341 and the second bump 342 .
  • the second electrode 355 can be a metal material, such as Ag, Mg and the like.
  • the second electrode 355 includes ITO or IZO (indium zinc oxide).
  • each light emitting unit 350 has an independent second electrode 355 .
  • the plurality of light emitting units 350 share a common second electrode 355 .
  • the light emitting device 100 further includes a second recess 361 , and the second recess 361 and the first recess 331 are separated from each other.
  • the second concave portion 361 is used to reflect the light emitted by the light emitting unit 350 through the second concave portion 361 to increase the brightness of the light emitting device 100 .
  • the second recess 361 is formed between the second protrusion seat 322 and the third protrusion seat 323 , and the second protrusion 342 fills the second recess 361 .
  • the third bump seat 323 is disposed on the first conductive layer 310 and separated from the first bump seat 321 and the second bump seat 322 .
  • the second bump seat 342 is located between the first bump seat 341 and the third bump seat 343 .
  • the third bump seat 323 is trapezoidal.
  • the sidewall 3232 of the third protrusion seat 323 is an arc-shaped surface.
  • the sidewall 3232 of the third bump seat 323 is a concave arc surface.
  • the third bump pad 323 includes a stack of at least three different layers.
  • the third bump seat 323 includes a dielectric layer 324 disposed on the first conductive layer 310, a second conductive layer 325 disposed on the dielectric layer 324, and a second electrode layer 326 disposed on the second on the conductive layer 325 .
  • the third bump seat 323 includes the same stack structure as the first bump seat 321 .
  • the height of the third bump seat 323 is the same as that of the first bump seat 321 or the second bump seat 322 .
  • the widths of the third bump seat 323 and the first bump seat 321 or the first bump seat 322 may be the same or different.
  • the first electrode layer 330 is disposed on the upper surface 3221 of the second bump seat 322 and the upper surface 3231 of the third bump seat 323 . In some embodiments, the first electrode layer 330 is not disposed in the second recess 361 . In some embodiments, the first electrode layer 330 does not contact the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323 .
  • the first sidewall 3222 and the second sidewall 3223 of the second bump seat 322 are respectively located on opposite sides of the second bump seat 322 .
  • the second sidewall 3223 of the second bump seat 322 is an arc-shaped surface. In some embodiments, the second sidewall 3223 of the second bump seat 322 is a concave arc surface.
  • the light emitted by the light emitting unit 350 includes side light, and the light enters the second recess 362 after passing through the second protrusion 342 , and then passes through the second side wall 3223 and the third protrusion of the second protrusion seat 322 .
  • the side wall 3232 of the block seat 323 leaves the second recess 361 after reflection.
  • a second protrusion seat 322 is disposed between the second concave portion 361 and the first concave portion 331 .
  • a part of the second protrusion 342 is disposed between the second concave portion 361 and the first concave portion 331 .
  • the distance between the second recess 361 and the first recess 331 for setting the light emitting unit 350 is not particularly limited, as long as the second recess 361 can reflect the light emitted by the light emitting unit 350 through the second recess 361 , or increase the brightness of the light emitting device 100 .
  • the depth of the second recess 361 is greater than that of the first recess 331 . In some embodiments, the second recess 361 extends to between the first conductive layers 310 . In some embodiments, the second recess 361 is surrounded by the first electrode layer 330 , the second bump seat 322 , the third bump seat 323 and the first metal layer 310 . In some embodiments, the bottom of the second recess 361 is the etch stop layer 311 .
  • the second protrusion 342 is disposed on the second protrusion seat 322 and in the second recess 361 . In some embodiments, the second protrusion 342 is disposed on the second protrusion seat 322 and the third protrusion seat 323 , and in the second recess 361 . In some embodiments, the second bump 342 covers at least a part of the upper surface 3221 and the first side wall 3222 of the second bump seat 322 , and the second bump 342 also covers the first side of the second bump seat 322 . Two side walls 3223.
  • the second bump 342 is in contact with at least a part of the upper surface 3221 of the second bump seat 322 and the first side wall 3222 , and the second bump 342 is also in contact with the top surface 3221 of the second bump seat 322 .
  • the second sidewall 3223 is in contact.
  • the second bump 342 is in contact with the upper surface 3231 and the sidewall 3232 of the third bump seat 323 .
  • the second bump 342 goes deep into the second recess 361 and contacts the etch stop layer 311 .
  • the light emitting device 100 further includes a third conductive layer 370 disposed on the light emitting unit 350 .
  • the third conductive layer 370 is disposed on the second electrode 355 .
  • the third conductive layer 370 is disposed on the first bump 341 , the second bump 342 and the light emitting unit 350 .
  • the third conductive layer 370 is in the same shape as the light emitting unit 350 , the first bump 341 and the second bump 342 .
  • the third conductive layer 370 includes Ag, Mg and combinations thereof.
  • the third conductive layer 370 and the second electrode 355 include materials with different crystal phases, and the brightness of the light emitting device 200 is increased by configuring materials with different crystal phases and different refractive indices.
  • the third conductive layer 370 includes a multi-layer structure, such as but not limited to a combination of an Ag layer (not shown) and a Mg layer (not shown). The thickness range of the third conductive layer 370 is to
  • the light emitting device 100 further includes a cover layer 381 disposed on the first bump 341 and the second bump 342 and the light emitting unit 350 .
  • the covering layer 381 includes organic materials.
  • the penetration rate of the covering layer 381 is greater than 99%.
  • the upper surface of the covering layer 381 is flat.
  • a filler layer 382 is further included on the covering layer 381 .
  • the covering layer 381 is located between the light emitting unit 350 and the filler layer 382 .
  • the filler layer 382 includes a resin material. In some embodiments, the permeability of the filler layer 382 is greater than 99%.
  • the convex lens 390 is disposed on the light emitting unit 350 and vertically aligned with the light emitting unit 350 , so that the light emitted by the light emitting unit 350 can pass through the convex lens 390 .
  • the convex lens 390 has a bottom surface 391 and a convex surface 392 , the convex surface 392 protrudes from the bottom surface 391 toward the light emitting unit 350 and is surrounded by the filler layer 382 .
  • the bottom surface 391 of the convex lens 390 is coplanar with the top surface of the filler layer 382 .
  • the convex lens 390 overlaps at least a part of the first bump seat 321 and at least a part of the second bump seat 322 . In some embodiments, the convex lens 390 overlaps at least a portion of the sidewall 3212 of the first bump seat 321 and at least a portion of the first sidewall 3222 of the second bump seat 322 in a top view. In some embodiments, viewed from above, the convex lens 390 overlaps with at least a part of the upper surface 3221 of the second bump seat 322 . In some embodiments, viewed from a top view, the convex lens 390 is separated from the second concave portion 361 , and the convex lens 390 is not disposed above the second concave portion 361 .
  • the included angle ⁇ between the bottom surface 391 and the convex surface 392 of the convex lens 390 , and the included angle ⁇ ranges from 20° to 50°.
  • the included angle is greater than 50°, the thickness of the convex lens 390 increases, resulting in a larger overall thickness of the light emitting device 100, and the convex lens 390 tends to reflect the light emitted by the light emitting unit, resulting in stray light in the light emitting device and the brightness of the light emitting device gradually weakens.
  • the included angle ⁇ ranges from 20° to 40°.
  • the lenticular lens 390 includes organic material.
  • one convex lens 390 is spaced apart from another convex lens 390 , and each convex lens 390 corresponds to a different light emitting unit 350 .
  • at least a portion of the filler layer 382 is located between adjacent lenticular lenses 390 .
  • the second concave portion 361 is located between one convex lens 390 and the other convex lens 390 in a top view.
  • the convex lens 390 has a first refractive index
  • the filler layer 382 has a second refractive index
  • the covering layer 381 has a third refractive index.
  • the difference between the second refractive index and the first refractive index is less than 0.05.
  • the second refractive index is greater than the first refractive index
  • the first refractive index is greater than or equal to the third refractive index.
  • the difference between the first refractive index and the third refractive index is less than or equal to 0.08.
  • the first refractive index ranges from 1.45 to 1.55.
  • the second refractive index ranges from 1.51 to 1.6.
  • the third refractive index ranges from 1.45 to 1.55.
  • the light emitting device 100 further includes a silicon oxide layer 383 disposed on the filler layer 382 and the convex lens 390 , and a second substrate 384 disposed on the silicon oxide layer 383 .
  • the silicon oxide layer 383 is in contact with the bottom surface 392 of the convex lens and the filler layer 382 .
  • the silicon oxide layer 383 includes silicon dioxide.
  • the silicon oxide layer 383 has a fourth refractive index.
  • the second refractive index is greater than the fourth refractive index.
  • the fourth index of refraction is equal to the first index of refraction.
  • the second substrate 384 is a transparent substrate, which may include, but is not limited to, glass.
  • FIG. 3 is a top view illustrating the light emitting device 200 .
  • the light emitting device 200 has a pixel array, the pixel array includes a plurality of pixels, and each pixel includes a light emitting unit 350 .
  • the pixel array can be, for example but not limited to, comprising the first pixel 201 and the second pixel 202 disposed beside the first pixel 201 at intervals.
  • the pixel array may include, but is not limited to, a plurality of first pixels 201 , a plurality of second pixels 202 and a plurality of third pixels 203 for displaying different colors.
  • Each first pixel 201 includes a light emitting unit 350G and a convex lens 390G
  • each second pixel 202 includes a light emitting unit 350R and a convex lens 390R
  • each third pixel 203 includes a light emitting unit 350B and a convex lens 390B.
  • the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B can be used to emit light of the first color, light of the second color and light of the third color respectively.
  • the light emitting unit 350G can be used to display green
  • the light emitting unit 350R can be used to display red
  • the light emitting unit 350B can be used to display blue.
  • the arrangement of the pixel array includes, from left to right, the second pixel 202 , the first pixel 201 and the third pixel 203 , but is not limited thereto.
  • the plurality of first pixels 201 are scattered with each other, the plurality of third pixels 203 are gathered with each other, and the arrangement of the second pixels 202 is not particularly limited.
  • the arrangement of various pixels may also be changed according to design or other considerations.
  • the shapes of the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B shown in FIG. 3 are oval, other shapes may also be used.
  • the number of types of pixels can be, but not limited to, three types of pixels; the number of pixels can be changed, and other appropriate types of pixels can be used to display different colors, such as yellow, white or other colors.
  • the shapes of the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B are elliptical, respectively having a major axis D1 and a minor axis D2, the range of the major axis D1 is 3.4-4 ⁇ m, and the range of the minor axis D2 is 2.5-3.1 ⁇ m.
  • the long axis D1 of the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B is 3.7 ⁇ m, and the short axis D2 is 3.7 ⁇ m respectively.
  • the shapes of the convex lens 390G, the convex lens 390R, and the convex lens 390B are circular or elliptical, and other shapes can also be used.
  • the size and shape of the convex lens 390G, the convex lens 390R and the convex lens 390B may be the same or different.
  • the convex lens 390G has a major axis D3 and a minor axis D4, the major axis D3 ranges from 4.7-5.3 ⁇ m, and the minor axis D4 ranges from 4.1-4.7 ⁇ m.
  • the major axis D3 of the convex lens 390G is 5.0 ⁇ m, and the minor axis D4 is 4.4 ⁇ m.
  • the convex lens 390R has a major axis D5 and a minor axis D6, the major axis D5 ranges from 4.5-5.1 ⁇ m, and the minor axis D6 ranges from 4.1-4.7 ⁇ m.
  • the major axis D5 of the convex lens 390R is 4.8 ⁇ m
  • the minor axis D6 is 4.4 ⁇ m
  • the convex lens 390B has a major axis D7 and a minor axis D8, the major axis D7 ranges from 4.6-5.1 ⁇ m, and the minor axis D8 ranges from 4.0-4.7 ⁇ m.
  • the major axis D7 of the convex lens 390B is 4.8 ⁇ m
  • the minor axis D8 is 4.3 ⁇ m.
  • the distance D9 between adjacent pixels such as but not limited to the distance D9 between the first pixel 201 and the second pixel 202, the distance D9 between the second pixel 202 and the third pixel 203, or the distance D9 between the second pixel 202 and the third pixel 203, or The distance D9 between a pixel 201 and the third pixel 203 can be the same or different.
  • the distance D9 is in the range of 0.5-1.1 ⁇ m. In some embodiments, the distance D9 between adjacent pixels is 0.8 ⁇ m.
  • FIG. 4 is a flowchart of a method 400 of fabricating a light emitting device according to certain embodiments.
  • the method 400 for preparing a light-emitting device such as the light-emitting device 100 includes the following steps: 401 forming a first conductive layer on a first substrate; 402 forming a dielectric layer on the first conductive layer; 403 forming a second conductive layer on the dielectric layer; 404 forming a second electrode layer on the second conductive layer; 405 patterning the second electrode layer, the second conductive layer and the dielectric layer to form a first opening exposing the first conductive layer; 406 forming the first electrode layer on the second On an opening and the second electrode layer, to form a first concave portion with the same shape as the first opening, the first concave portion has a first side wall and a second side wall opposite to the first side wall, and is located on the first side wall and a bottom between the second side wall; 407 forms a first bump on the first side wall
  • FIGS. 5-26 illustrate methods for fabricating light-emitting devices according to certain embodiments of the present disclosure.
  • 5 to 26 are sectional views along line AA in FIG. 1 .
  • Step 401 includes forming a first conductive layer 310 on a first substrate 110 .
  • the first substrate 110 may include a substrate 111, a dielectric layer 112, a transistor 210, a capacitor 220, an interlayer dielectric structure 230, a connection structure 240, a dielectric layer 310, and a planar layer 320.
  • the above-mentioned components are similar The light-emitting device 100 is described above, so it will not be repeated here.
  • the first conductive layer 310 is formed on the first substrate 110 .
  • a deposition technique is used to form the first conductive layer 310 on the top surface of the first substrate 110, such as but not limited to atomic layer deposition (Atomic Layer Deposition, ALD), chemical vapor deposition (Chemical Vapor Deposition, CVD) ), physical vapor deposition (Physical Vapor Deposition, PVD), sputtering (sputtering), electroplating (plating), laser thermal imaging (Laser Induced Thermal Imaging, LITI), inkjet printing (inkjet printing), shadow mask (shadow mask) Or deposition techniques such as wet coating.
  • ALD atomic layer deposition
  • CVD chemical vapor deposition
  • PVD Physical vapor deposition
  • electroplating platting
  • laser thermal imaging Laser Induced Thermal Imaging
  • LITI inkjet printing
  • inkjet printing inkjet printing
  • shadow mask shadow mask
  • deposition techniques such as wet coating.
  • the method 400 further includes forming an etch stop layer 311 between the first substrate 110 and the first conductive layer 310 and forming an etch stop layer 311 surrounded by the etch stop layer 311 and electrically connecting the first conductive layer 310 and the first substrate 110 The conductive plug 246.
  • deposition techniques are used to form the etch stop layer 311 on the top surface of the first substrate 110 .
  • step 402 includes forming a dielectric layer 324 on the first conductive layer 310
  • step 403 includes forming a second conductive layer 325 on the dielectric layer 324
  • step 404 includes forming a second electrode layer 326 on the first conductive layer 310. on the second conductive layer 325
  • the dielectric layer 324 is formed on the top surface of the first conductive layer 310 using a deposition technique.
  • a deposition technique is used to form the second conductive layer 325 on the top surface of the dielectric layer 324 .
  • a deposition technique is used to form the second electrode layer 326 on the top surface of the second conductive layer 325 .
  • forming the first bump seat 321 , the second bump seat 322 and the third bump seat 323 includes forming a dielectric layer 324 and a second conductive layer stacked on the first conductive layer 310 in sequence. 325 and the second electrode layer 326.
  • step 405 includes patterning the second electrode layer 326 , the second conductive layer 325 and the dielectric layer 324 to form a first opening 502 exposing the first conductive layer 326 .
  • a photoresist layer 501 is formed on the second electrode layer 326 .
  • the photosensitive layer 501 is coated on the top surface of the second electrode layer 326 .
  • the photosensitive layer 501 is formed by spin coating or spray coating.
  • the photosensitive layer 501 may include a positive photoresist or a negative photoresist.
  • the photosensitive layer 501 may include organic materials and inorganic materials.
  • the organic material may include, for example, phenol formaldehyde resins, epoxy resins, ethers, amines, rubber, acrylic, acrylic resins, acrylic epoxy resins, acrylic melamines.
  • the inorganic materials may include, for example, metal oxides and silicides.
  • the photosensitive layer 501 may comprise a layer composed of a material.
  • the photosensitive layer 501 may include several layers composed of several different materials, for example, an organic material layer is stacked on an inorganic material layer.
  • the photosensitive layer 501 is further patterned by an etching process so that a part of the photosensitive layer 501 is removed, and the remaining part of the photosensitive layer 501 is used to position the first bump seat 321 as shown in FIG. 2 And the second bump seat 322 , and the part where the photosensitive layer 501 is removed is used to set the light emitting unit 350 shown in FIG. 2 in subsequent steps.
  • the remaining part of the photosensitive layer 501 is also used to position the third bump seat 323 as shown in FIG. 2
  • the removed part of the photosensitive layer 501 is also used to form 2 shows the second recess 361.
  • the pattern of the photosensitive layer 501 is designed for forming the first bump seat 321 and the second bump seat 322 arranged in an array.
  • patterning is carried out by dry etching, so that the photosensitive layer 501 is patterned, so that a part of the photosensitive layer 501, a part of the second electrode layer 326 and a part of the second conductive layer 325 are removed to form a first groove 502 and a second groove 503 .
  • there is a radius angle ⁇ 4 between the sidewall and the bottom surface of the photosensitive layer 501 and the range of the radius angle ⁇ 4 is 60 degrees to 90 degrees.
  • the first groove 502 and the second groove 503 are respectively U-shaped.
  • there is a radius angle ⁇ 5 between the sidewall and the bottom surface of the second conductive layer 325 there is a radius angle ⁇ 5 between the sidewall and the bottom surface of the second conductive layer 325 , and the range of the radius angle ⁇ 5 is 10 degrees to 90 degrees.
  • patterning is performed by wet etching, and photosensitive layer 501 is patterned such that a portion of photosensitive layer 501 , a portion of second electrode layer 326 and a portion of second conductive layer 325 are removed. By removing, the first groove 502 and the second groove 503 are formed. In some embodiments, the patterned second electrode layer 326 and the second conductive layer 325 may undergo undercut (not shown). In some embodiments, viewed from a cross-sectional view, there is a radius angle ⁇ 6 between the sidewall and the bottom surface of the photosensitive layer 501 , and the radius angle ⁇ 6 ranges from 45 degrees to 90 degrees.
  • the radius angle ⁇ 6 ranges from 55 degrees to 80 degrees viewed from the cross-sectional view. In some embodiments, viewed from a cross-sectional view, there is a radius angle ⁇ 7 between the sidewall and the bottom surface of the second conductive layer 325 , and the radius angle ⁇ 7 ranges from 10 degrees to 90 degrees. In some embodiments, the radius angle ⁇ 5 formed by the dry etching process is larger than the radius angle ⁇ 7 formed by the wet etching process.
  • a part of the dielectric layer 324 is further removed by an etching process, and the remaining second electrode layer 326, the second conductive layer 325 and the dielectric layer 324 form a mutual
  • the first bump seat 321 and the second bump seat 322 are separated to form a first opening 504 between the first bump seat 321 and the second bump seat 322 .
  • a portion of the first conductive layer 310 is exposed between the first bump seat 321 and the second bump seat 322 .
  • a portion of the dielectric layer 324 is removed using a dry etching process.
  • a radius angle ⁇ 1 is formed between the sidewall 3212 and the lower surface of the first bump seat 321 , and the radius angle ⁇ 1 ranges from 10 degrees to 90 degrees.
  • a radius angle ⁇ 2 is formed between the sidewall 3222 and the lower surface of the second bump seat 322 from a cross-sectional view, and the radius angle ⁇ 2 ranges from 10 degrees to 90 degrees.
  • the patterned second electrode layer 326, the second conductive layer 325, and the dielectric layer 324 also form a third bump seat 323 separated from the second bump seat 322, and form the second bump seat 323.
  • the first opening 504 and the second opening 505 are separated from each other.
  • the first opening 504 and the second opening 505 are formed simultaneously.
  • a portion of the first conductive layer 310 is exposed between the third bump seat 323 and the second bump seat 322 .
  • a radius angle ⁇ 3 is formed between the sidewall 3232 and the lower surface of the third bump seat 323 from a cross-sectional view, and the radius angle ⁇ 3 ranges from 10 degrees to 90 degrees.
  • the first bump seat 321 , the second bump seat 322 and the third bump seat 323 separated from each other are formed on the first conductive layer 310 .
  • the photosensitive layer 501 is removed. In some embodiments, after the photosensitive layer 501 is removed, the upper surface 3211 of the first bump seat 321 , the upper surface 3221 of the second bump seat 322 and the upper surface 3231 of the third bump seat 323 are exposed. In some embodiments, the first opening 504 and the second opening 505 have the same depth.
  • step 406 includes forming the first electrode layer 330 on the first opening 504 and the second electrode layer 326 to form the first recess 331 having the same shape as the first opening 504 .
  • the first recess 331 has a first sidewall 332 , a second sidewall 333 opposite to the first sidewall 332 , and a bottom 334 between the first sidewall 332 and the second sidewall 333 .
  • the first electrode layer 330 is also formed in the second opening 505 .
  • conformal deposition is performed to form the first electrode layer 330 on the first opening 504, the upper surface 3211 and the side surface 3212 of the first bump seat 321, and the upper surface 3221 and the second bump seat 322. The first side 3221 and the second side 3223 .
  • the method 400 further includes conformally depositing the first electrode layer 330 on the second opening 505 and the upper surface 3231 and the side surface 3232 of the third bump seat 323 .
  • the first electrode layer 330 has a concave portion 360 formed between the second opening 505 and the third bump seat 323 , and the concave portion 360 has the same shape as the second opening 505 .
  • the first electrode layer 330 is continuously formed on the first opening 504 , the second opening 505 , the first bump seat 321 , the second bump seat 322 and the third bump seat 323 .
  • the method 400 further includes removing the first electrode layer 330 located at the second opening 505 .
  • the concave portion 360 of the first electrode layer 330 is removed.
  • a photosensitive layer 510 is formed on the first electrode layer 330 , and the photosensitive layer 510 located in the concave portion 360 is removed.
  • the photosensitive layer 510 is coated on the top surface of the first electrode layer 330 and the first concave portion 331 and the concave portion 360, and the photosensitive layer 510 is patterned so that the concave portion 360 of the first electrode layer 330 is separated from the photosensitive layer. 510 exposed.
  • the photosensitive layer 510 is formed by spin coating or spray coating. In some embodiments, the photosensitive layer 510 may include a positive photoresist or a negative photoresist. In some embodiments, the photosensitive layer 510 is patterned by an etching process so that a part of the photosensitive layer 510 is removed, and the removed part of the photosensitive layer 510 is used in subsequent steps to form the first layer shown in FIG. Two recesses 361 .
  • patterning is performed by an etching process to remove the first electrode layer 330 exposed from the photosensitive layer 510 to form the groove 511 .
  • the patterning is performed by wet etching, and the recess 511 is formed after removing the concave portion 360 of the first electrode layer 330 .
  • the photosensitive layer 510 is removed, exposing the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323 , and part of the first metal layer. 310.
  • the surrounding of the groove 511 includes the first electrode layer 330 , the second bump seat 322 , the third bump seat 323 and the first metal layer 310 .
  • the method 400 further includes patterning the first conductive layer 310 exposed from the groove 511 to form the second recess 361 .
  • a photosensitive layer 520 is formed above the first electrode layer 330 , and the photosensitive layer 520 located above the first electrode layer 330 in the groove 511 is removed.
  • the photosensitive layer 520 is in contact with the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323 .
  • the photosensitive layer 510 is coated on the top surface of the first electrode layer 330 and the first recess 331 and the groove 511, and the photosensitive layer 520 is patterned so that the first electrode layer 330 in the groove 511 The photosensitive layer 520 is exposed, and then the first conductive layer 310 located in the groove 511 is removed.
  • the photosensitive layer 520 is formed by spin coating or spray coating.
  • the photosensitive layer 520 may include a positive photoresist or a negative photoresist.
  • the patterning is performed by dry etching to remove the exposed first conductive layer 310 from the groove 511 .
  • the first conductive layer 310 is patterned so that the depth of the second recess 361 is greater than the depth of the first recess 331 .
  • the first conductive layer 310 is patterned to expose the etch stop layer 311 from the second recess 361 .
  • the photosensitive layer 520 is removed to form the second recess 361 .
  • the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323, part of the first metal layer 310, and part of the etching are exposed. stop layer 311 .
  • step 407 includes forming the first protrusion 341 on the first sidewall 332 of the first recess 331
  • step 408 includes forming the second protrusion 342 on the second sidewall 333 of the first recess 331 .
  • the first bump 341 and the second bump 342 are formed at the same time.
  • the bottom 334 of the first recess 331 is exposed between the first bump 341 and the second bump 342 .
  • the second protrusion 342 is also formed in the second recess 361 and on the third protrusion 323 .
  • the second protrusion 342 fills up the second recess 361 .
  • step 409 includes forming a light emitting unit 350 between the bottom 334 of the first recess 331 of the first electrode layer 330 and between the first bump 341 and the second bump 342 .
  • the light emitting unit 350 is formed by conformal deposition.
  • the light emitting unit 350 is in contact with the first electrode layer 330 , the first bump 341 and the second bump 342 .
  • a carrier injection layer 351 , a carrier transport layer 352 , an organic light emitting layer 353 , a carrier transport layer 354 and a second electrode 355 are sequentially formed on the bottom portion 334 .
  • the method 400 further includes forming a cover layer 380 on the first bump 341 and the second bump 342 and the light emitting unit 350 .
  • the capping layer 380 is formed using a deposition technique.
  • the upper surface of the cover layer 380 is planarized.
  • step 410 includes forming a convex lens 390 on the second substrate 384 .
  • a plurality of convex lenses 390 are formed on the second substrate 384 .
  • a plurality of convex lenses 390 are spaced apart from each other.
  • a silicon oxide layer 383 is formed on the second substrate 384
  • a lens material layer 393 is formed on the silicon oxide layer 383 .
  • the lens material is coated on the silicon oxide layer 383 to form the lens material layer 393 .
  • the lens material includes organic materials, such as but not limited to the commercially available product SU8. In some embodiments, as shown in FIG.
  • the lens material layer 393 is patterned such that a portion of the lens material layer 393 is removed. In some embodiments, the portion of the lens material layer 393 corresponding to the second concave portion 361 is removed. In some embodiments, the patterned lens material layer 393 includes positions corresponding to the light emitting units 350 . In some embodiments, as shown in FIG. 24 , the lens material layer 393 is formed into a convex lens 390 . In some embodiments, the lens material layer 393 is formed into a convex lens 390 having a bottom surface 391 and a convex surface 392 , the bottom surface and the convex surface have an included angle ⁇ , and the included angle ranges from 20° to 50°. In some embodiments, the patterned lens material layer 393 is subjected to photoacid reaction and thermal reflow to form the convex lens 390 .
  • the method 400 further includes forming a filler layer 382 on the covering layer 381 .
  • the filler layer 382 is formed on the cover layer 381 by deposition technique or coating method.
  • the filler layer 382 formed on the covering layer 381 is not fully cured.
  • step 411 includes disposing the convex lens 390 and the second substrate 384 on the light emitting unit 350 , and vertically aligning the convex lens 390 and the light emitting unit 350 .
  • the convex lens 390 under the second substrate is vertically aligned with the corresponding light emitting unit 350, The convex lens 390 and the filler layer 382 are brought close to each other until the convex surface 392 is completely in contact with the filler layer 382 .
  • the filler layer 382 is cured after the filler layer 382 surrounds the convex surface 392 of the lenticular lens 390 . In some embodiments, the filler layer 382 is in contact with the convex surface 392 of the convex lens 390 and the silicon oxide layer 383 . In some embodiments, the method 400 produces the light emitting device 100 as shown in FIG. 2 .
  • an embodiment of the present disclosure provides a light-emitting device, including a substrate; a first conductive layer disposed on the substrate; a first bump seat disposed on the first conductive layer; a second bump The block seat is arranged on the first conductive layer and separated from the first bump seat; a first electrode layer is arranged on the first bump seat, the first conductive layer and the second bump seat, the first An electrode layer includes a side wall of the first bump seat, a side wall of the second bump seat, and a first recess between the first bump seat and the second bump seat; a first bump is disposed on the On the first bump seat and at least a part of the first concave portion; a second bump is disposed on the second bump seat and at least a part of at least a part of the first concave portion; a light emitting unit is formed on the The first concave part is located between the first protruding block and the second protruding block; and a convex lens is arranged on the light emitting unit and vertical
  • An embodiment of the present disclosure provides a light-emitting device, comprising a pixel array including a first pixel, a second pixel spaced apart from the first pixel, and a concave portion located between the first pixel and the second pixel. Between pixels; a first convex lens is arranged on the first pixel and vertically aligned with the first pixel; and a second convex lens is arranged on the second pixel and separated from the first convex lens (390a).
  • the first pixel includes a first bump seat; a second bump seat separated from the first bump seat; a first bump is arranged on the first bump seat and covers the first bump At least a part of an upper surface and a side wall of the block seat; a second bump is arranged on the second bump seat and covers at least a part of an upper surface and a side wall of the second bump seat A part, the side wall of the first bump seat is opposite to the side wall of the second bump seat; an electrode layer is arranged between the first bump and the second bump; and a light emitting unit It is arranged on the electrode layer between the first bump and the second bump.
  • the second pixel includes a third bump seat separated from the second bump seat, the recess is arranged between the second bump seat and the third bump seat, and the second bump fills up The recess extends to cover the third bump seat.
  • An embodiment of the present disclosure provides a method of manufacturing a light-emitting device, comprising forming a first conductive layer on a first substrate; forming a dielectric layer on the first conductive layer; forming a second conductive layer On the dielectric layer; forming a first electrode layer on the second conductive layer; patterning the first electrode layer, the second conductive layer and the dielectric layer to form a first electrode layer exposing the first conductive layer an opening; a second electrode layer is formed on the first opening and the first electrode layer to form a first recess having the same type as the first opening, the first recess has a first side wall and is opposite to the The second side wall of the first side wall, and a bottom between the first side wall and the second side wall; forming a first protrusion on the first side wall of the first recess; forming a second a protruding block on the second side wall of the first recess; a light emitting unit is formed between the bottom of the first recess and the first protrud

Abstract

A light-emitting device (100, 200) and a preparation method therefor. The light-emitting device (100, 200) comprises a conductive layer (310) disposed on a substrate (110); a first protruding block seat (321) and a second protruding block seat (322) which are disposed on the conductive layer (310) and separated from each other; a first electrode layer (330) disposed on the first protruding block seat (321), the conductive layer (310), and the second protruding block seat (322), the first electrode layer (330) comprising a side wall (3212) located on the first protruding block seat (321), a side wall (3222) located on the second protruding block seat (322), and a first recess (331) located between the first protruding block seat (321) and the second protruding block seat (322); a first protruding block (341) disposed on the first protruding block seat (321) and a part of the first recess (331); a second protruding block (342) disposed on the second protruding block seat (322) and a part of the first recess (331); a light-emitting unit (350) formed on the first recess (331) and located between the first protruding block (341) and the second protruding block (342); and a convex lens (390) disposed on the light-emitting unit (350) and vertically aligned with same, the convex lens (390) having a bottom surface and a convex surface (392) facing the light-emitting unit (350), and an included angle between the bottom surface (391) and the convex surface (392) ranging from 20° to 50°.

Description

发光装置及其制备方法Light emitting device and manufacturing method thereof 技术领域technical field
本揭露是关于一种发光装置及其制备方法,特别是关于一种包含凸块及凸透镜的发光装置及其制备方法。The present disclosure relates to a light emitting device and a manufacturing method thereof, in particular to a light emitting device including bumps and convex lenses and a manufacturing method thereof.
背景技术Background technique
有机发光装置已经广泛使用于最高端的电子装置的显示器中。然而,由于现有技术的限制,发光装置的亮度受到限制。因此,对于显示器制造商而言,具有更高亮度的发光装置成为一个努力的目标。Organic light emitting devices have been widely used in displays of the most high-end electronic devices. However, due to limitations of the prior art, the brightness of the light emitting device is limited. Therefore, for display manufacturers, a light emitting device with higher luminance becomes a striving goal.
发明内容Contents of the invention
一种发光装置包含一基板、一第一导电层设置于该基板上、一第一凸块座设置于该第一导电层上、一第二凸块座设置于该第一导电层上且与该第一凸块座分离,及一第一电极层设置于该第一凸块座、该第一导电层及该第二凸块座上,该第一电极层包含位于第一凸块座的侧壁、第二凸块座的侧壁及该第一凸块座及该第二凸块座间的一第一凹部。该发光装置还包含一第一凸块设置于该第一凸块座上及该第一凹部中的至少一部分、一第二凸块设置于该第二凸块座上及该第一凹部中的至少一部分的至少一部分、一发光单元形成于该第一凹部且位于该第一凸块及第二凸块间,及一凸透镜设置于该发光单元上且与该发光单元垂直对准,该凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角,该夹角的范围为20°至50°A light-emitting device includes a substrate, a first conductive layer disposed on the substrate, a first bump seat disposed on the first conductive layer, a second bump seat disposed on the first conductive layer and The first bump seat is separated, and a first electrode layer is disposed on the first bump seat, the first conductive layer and the second bump seat, and the first electrode layer includes the first electrode layer located on the first bump seat The side wall, the side wall of the second bump seat, and a first recess between the first bump seat and the second bump seat. The light-emitting device also includes a first protrusion disposed on the first protrusion seat and at least a part of the first recess, a second protrusion disposed on the second protrusion seat and at least a part of the first recess. At least a part of at least a part, a light-emitting unit is formed in the first concave portion and is located between the first protrusion and the second protrusion, and a convex lens is arranged on the light-emitting unit and vertically aligned with the light-emitting unit, the convex lens has A bottom surface and a convex surface, the convex surface protrudes toward the light-emitting unit, and there is an included angle between the bottom surface and the convex surface, and the included angle ranges from 20° to 50°
于某些实施方式中,该发光装置还包含一第三凸块座,设置于该第一导电层上且与该第一凸块座及该第二凸块座彼此分离;及一第二凹部,形成于该第二凸块座与该第三凸块座间,且该第二凸块填满该第二凹部。In some embodiments, the light emitting device further includes a third bump seat disposed on the first conductive layer and separated from the first bump seat and the second bump seat; and a second recess , formed between the second bump seat and the third bump seat, and the second bump fills up the second recess.
于某些实施方式中,其中以俯视观看,该凸透镜与该第一凸块座的至少一部分及该第二凸块座的至少一部份重迭,且与该第二凹部分离。In some embodiments, the convex lens overlaps with at least a portion of the first bump seat and at least a portion of the second bump seat, and is separated from the second concave portion when viewed from a top view.
于某些实施方式中,该发光装置还包含一覆盖层设置于第一凸块及第二凸块及发光单元上;及一填料层设置于该覆盖层与该凸透镜,其中该凸透镜具有第一折射率,该填料层具有第二折射率,该第一折射率与该第二折射率的差值是小于0.05。In some embodiments, the light-emitting device further includes a covering layer disposed on the first bump and the second bump and the light-emitting unit; and a filler layer disposed on the covering layer and the convex lens, wherein the convex lens has a first Refractive index, the filler layer has a second refractive index, and the difference between the first refractive index and the second refractive index is less than 0.05.
于某些实施方式中,该覆盖层具有第三折射率,该第二折射率是大于该第一折射率,且该第一折射率是大于等于该第三折射率。In some embodiments, the covering layer has a third refractive index, the second refractive index is greater than the first refractive index, and the first refractive index is greater than or equal to the third refractive index.
一种发光装置,包含一像素阵列、一第一凸透镜及一第二凸透镜。该像素阵列包括一第一像素、一第二像素间隔的设置于该第一像素旁边,以及一凹部位于该第一像素及该第二像素间;该第一凸透镜设置于该第一像素上且与该第一像素垂直对准;及该第二凸透镜设置于该第二像素上且与该第一凸透镜分离。该第一像素包括一第一凸块座;一与该第一凸块座分离的一第二凸块座;一第一凸块设置于该第一凸块座上并覆盖该第一凸块座的一上表面面及一侧壁的至少一部份;一第二凸块设置于与该第二凸块座上并覆盖该第二凸块座的一上表面及一侧壁的至少一部份,该第一凸块座的该侧壁与该第二凸块座的该侧壁相对设置;一电极层设置于该第一凸块与该第二凸块间;及一发光单元设置于该第一凸块及第二凸块间的该电极层上。其中该第二像素包括与该第二凸块座分离的一第三凸块座,该凹部是设置于该第二凸块座与该第三凸块座间,且该第二凸块填满该凹部并延伸至覆盖该第三凸块座。A light-emitting device includes a pixel array, a first convex lens and a second convex lens. The pixel array includes a first pixel, a second pixel spaced next to the first pixel, and a concave portion between the first pixel and the second pixel; the first convex lens is arranged on the first pixel and vertically aligned with the first pixel; and the second convex lens is disposed on the second pixel and separated from the first convex lens. The first pixel includes a first bump seat; a second bump seat separated from the first bump seat; a first bump is arranged on the first bump seat and covers the first bump At least a part of an upper surface and a side wall of the seat; a second protrusion is arranged on the second protrusion seat and covers at least one of an upper surface and a side wall of the second protrusion seat In part, the side wall of the first bump seat is opposite to the side wall of the second bump seat; an electrode layer is arranged between the first bump and the second bump; and a light emitting unit is arranged On the electrode layer between the first bump and the second bump. Wherein the second pixel includes a third bump seat separated from the second bump seat, the recess is arranged between the second bump seat and the third bump seat, and the second bump fills up The recess extends to cover the third bump seat.
于某些实施方式中,该电极层是延伸至该第一凸块与该第一凸块座的该侧壁间,以及延伸至该第二凸块与该第二凸块座的该侧壁间。In some embodiments, the electrode layer extends between the first bump and the sidewall of the first bump seat, and extends to the sidewall of the second bump and the second bump seat between.
于某些实施方式中,该发光单元为椭圆形,且该第一凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角,该 夹角的范围为20°至50°。In some embodiments, the light-emitting unit is elliptical, and the first convex lens has a bottom surface and a convex surface, the convex surface protrudes toward the light-emitting unit, and there is an included angle between the bottom surface and the convex surface, the clip The angle ranges from 20° to 50°.
一种制备发光装置的方法,包含形成一第一导电层于一第一基板上;形成一介电层于该第一导电层上;形成一第二导电层于该介电层上;形成一第一电极层于该第二导电层上;图案化该第一电极层、第二导电层及该介电层,以形成暴露该第一导电层的一第一开口;形成一第二电极层于该第一开口及该第一电极层上,以形成与该第一开口共型的第一凹部,该第一凹部具有一第一侧壁及相对于该第一侧壁的第二侧壁,以及位于该第一侧壁及该第二侧壁间的一底部;形成一第一凸块于该第一凹部的该第一侧壁;形成一第二凸块于该第一凹部的该第二侧壁;形成一发光单元于该第一凹部的该底部以及该第一凸块及该第二凸块间;形成一凸透镜于一第二基板上;及将该凸透镜及该第二基板设置于该发光单元上,并使该凸透镜与该发光单元垂直对准。其中该凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角(θ),该夹角的范围为20°至50°。A method for preparing a light-emitting device, comprising forming a first conductive layer on a first substrate; forming a dielectric layer on the first conductive layer; forming a second conductive layer on the dielectric layer; forming a The first electrode layer is on the second conductive layer; patterning the first electrode layer, the second conductive layer and the dielectric layer to form a first opening exposing the first conductive layer; forming a second electrode layer On the first opening and the first electrode layer, a first recess having the same shape as the first opening is formed, the first recess has a first side wall and a second side wall opposite to the first side wall , and a bottom between the first side wall and the second side wall; forming a first protrusion on the first side wall of the first recess; forming a second protrusion on the first recess second side wall; forming a light-emitting unit between the bottom of the first recess and the first bump and the second bump; forming a convex lens on a second substrate; and the convex lens and the second substrate It is arranged on the light-emitting unit, and the convex lens is vertically aligned with the light-emitting unit. Wherein the convex lens has a bottom surface and a convex surface, the convex surface protrudes toward the light emitting unit, and there is an included angle (θ) between the bottom surface and the convex surface, and the included angle ranges from 20° to 50°.
于某些实施方式中,制备发光装置的方法还包含形成一覆盖层于该凸透镜与该凸透镜间;及形成一填料层于该覆盖层与该凸透镜间,并与该凸透镜接触。其中,该凸透镜具有第一折射率,该填料层具有第二折射率,该覆盖层具有第三折射率,该第二折射率是大于该第一折射率,且该第一折射率是大于等于该第三折射率,且该第一折射率与该第二折射率的差值是小于0.05。In some embodiments, the method of manufacturing a light-emitting device further includes forming a covering layer between the convex lens and the convex lens; and forming a filler layer between the covering layer and the convex lens, and in contact with the convex lens. Wherein, the convex lens has a first refractive index, the filler layer has a second refractive index, the covering layer has a third refractive index, the second refractive index is greater than the first refractive index, and the first refractive index is greater than or equal to The third refractive index, and the difference between the first refractive index and the second refractive index is less than 0.05.
附图说明Description of drawings
为协助读者达到最佳理解效果,建议在阅读本揭示时同时参考附件图示及其详细说明。请注意为遵循业界标准做法,各种特征未依照比例绘制。事实上,为了清楚说明,各种特征的尺寸可能刻意放大或缩小。In order to help readers achieve the best understanding, it is recommended to refer to the attached illustrations and detailed descriptions when reading this disclosure. Please note that in accordance with standard industry practice, various features are not drawn to scale. In fact, the dimensions of the various features may be deliberately expanded or reduced for clarity of illustration.
图1为根据某些实施方式,一发光装置的俯视图。Fig. 1 is a top view of a light emitting device according to some embodiments.
图2为根据某些实施方式,一发光装置的剖面图。Fig. 2 is a cross-sectional view of a light emitting device according to some embodiments.
图3为根据某些实施方式,一发光装置的俯视图。Fig. 3 is a top view of a light emitting device according to some embodiments.
图4为根据某些实施方式,一制备发光装置的方法的流程图。4 is a flowchart of a method of fabricating a light emitting device, according to certain embodiments.
图5至26的概要图式绘示根据本揭示内容某些实施方式的方法处于不同制造阶段的发光装置。5-26 are schematic diagrams illustrating light emitting devices at various stages of fabrication according to methods of certain embodiments of the present disclosure.
具体实施方式Detailed ways
以下揭示内容提供许多不同的实施例或范例,用于实施本申请案的不同特征。组件与配置的特定范例的描述如下,以简化本申请案的揭示内容。当然,这些仅为范例,并非用于限制本申请案。例如,以下描述在第二特征上或上方形成第一特征可包含形成直接接触的第一与第二特征的实施例,亦可包含在该第一与第二特征间形成其他特征的实施例,因而该第一与第二特征并非直接接触。此外,本申请案可在不同范例中重复组件符号与/或字母。此重复是为了简化与清楚的目的,而非支配不同实施例与/或所讨论架构间的关系。The following disclosure provides many different embodiments, or examples, for implementing the various features of the application. Specific examples of components and configurations are described below to simplify the disclosure of the present application. Of course, these are examples only and are not intended to limit the application. For example, the following description of forming a first feature on or over a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which other features are formed between the first and second features, Thus the first and second features are not in direct contact. Additionally, the application may repeat components and/or letters in different instances. This repetition is for purposes of simplicity and clarity and does not dictate the relationship between the different embodiments and/or architectures discussed.
再者,本申请案可使用空间对应语词,例如「下」、「间」、「低于」、「较低」、「高于」、「较高」等类似语词的简单说明,以描述图式中一组件或特征与另一组件或特征的关系。空间对应语词是用以包括除了图式中描述的位向以外,装置于使用或操作中的不同位向。装置或可被定位(旋转90度或是其他位向),并且可相应解释本申请案使用的空间对应描述。Furthermore, this application can use spatially corresponding words, such as "below", "between", "below", "lower", "higher", "higher" and other simple descriptions of similar words to describe the figure. The relationship of one component or feature to another component or feature. Spatially equivalent terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be oriented (rotated 90 degrees or otherwise) and the spatially corresponding descriptions used in this application interpreted accordingly.
尽管本揭露的广泛范围揭露的数值范围与参数为近似值,但在具体实施例中阐述的数值尽可能地精确。然而,任何数值固有地包含须由个别测试测量中得到的标准偏差所导致的某些误差。再者,如本文该,「约」通常是指给定值或范围的10%、5%、1%、或0.5%以内。或者,用语「约」是指该技艺中具有通常技术者考虑的平均值的可接受的标准误差内。除了在操作/工作范例中,或是除非特别指明,否则本文所揭露例如材料的量、时间期间、温度、操作条件、量的比例、以及类似者的所有的数值范围、量、值与比例皆应被理解为在 所有情况下都被用语「约」修饰。因此,除非有相反的说明,否则本揭露与申请专利范围该的数值参数皆为可视需要而变化的近似值。至少应根据报告的有效数字的数量且应用普通舍入技术来解释每个数值参数。在本文中,范围可表示为自一端点至另一端点,或是在两个端点间。除非特别说明,否则本文所揭露的所有范围包含端点。Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the disclosure are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the standard deviation found in their individual testing measurements. Also, as used herein, "about" generally means within 10%, 5%, 1%, or 0.5% of a given value or range. Alternatively, the term "about" means within an acceptable standard error of the mean considered by those of ordinary skill in the art. Except in operating/working examples, or unless otherwise specified, all numerical ranges, amounts, values, and ratios disclosed herein, such as amounts of materials, time periods, temperatures, operating conditions, ratios of amounts, and the like, are express It should be understood that it is modified in all cases by the word "about". Therefore, unless stated otherwise, the numerical parameters in the present disclosure and the patent claims are approximate values that may vary as required. At a minimum, each numerical parameter should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Herein, ranges can be expressed as from one endpoint to the other, or between two endpoints. All ranges disclosed herein are inclusive of endpoints unless otherwise stated.
图1为俯视图,例示发光装置100。发光装置100具有像素阵列,像素阵列包括多个像素,每一像素包括一发光单元350。像素阵列可例如但不限于包括第一像素及第二像素间隔的设置于第一像素旁边,每一像素分别包括一发光单元350,凹部361位于第一像素及第二像素间。以俯视观看,发光单元350可以是任何形状,可例如但不限于圆形、椭圆形、多边形等。FIG. 1 is a top view illustrating a light emitting device 100 . The light emitting device 100 has a pixel array, the pixel array includes a plurality of pixels, and each pixel includes a light emitting unit 350 . The pixel array may, for example but not limited to, include a first pixel and a second pixel spaced beside the first pixel, each pixel includes a light emitting unit 350 , and the recess 361 is located between the first pixel and the second pixel. Viewed from a top view, the light emitting unit 350 may be in any shape, such as but not limited to a circle, an ellipse, a polygon, and the like.
于某些实施方式中,发光装置100包括多个发光单元350以及位于发光单元350上方的覆盖层381、填料层382、氧化硅层383,及第二基板384。对于发光单元350,可设置于复数个凸块340间,例如设置于第一凸块341及第二凸块342间的第一凹部331,第一凹部331提供用于容纳发光单元350阵列的凹部阵列。为使发光装置100具有更佳的亮度,第二凸块342下设置有第二凹部361,且每一发光单元350上设置有凸透镜390。于某些实施方式中,多个第二凹部361形成凹部阵列用于反射发光单元350阵列所发出的光线。于某些实施方式中,复数个发光单元350被复数个凸块340分离。In some embodiments, the light emitting device 100 includes a plurality of light emitting units 350 and a cover layer 381 , a filler layer 382 , a silicon oxide layer 383 , and a second substrate 384 located above the light emitting units 350 . For the light emitting unit 350, it can be arranged between a plurality of protrusions 340, for example, the first recess 331 disposed between the first protrusion 341 and the second protrusion 342, the first recess 331 provides a recess for accommodating the array of light emitting units 350 array. In order to make the light emitting device 100 have better brightness, a second concave portion 361 is disposed under the second protrusion 342 , and a convex lens 390 is disposed on each light emitting unit 350 . In some embodiments, the plurality of second recesses 361 form a recess array for reflecting the light emitted by the array of light emitting units 350 . In some embodiments, the plurality of light emitting units 350 are separated by the plurality of bumps 340 .
于某些实施方式中,每一凸透镜350是对应每一发光单元350设置。于某些实施方式中,以俯视观看,第二凹部361与复数个凸透镜350错开。In some implementations, each convex lens 350 is disposed corresponding to each light emitting unit 350 . In some implementations, the second concave portion 361 is offset from the plurality of convex lenses 350 in a plan view.
图2为根据本揭示内容某些实施方式的发光装置的剖面图。图2为例示沿着图1中的线AA的剖面图并且仅说明该区域。发光装置具有数个凸块340,以定义发光像素图案。第一凹部331位在两个相邻凸块340间并且提供容纳发光像素的空间。2 is a cross-sectional view of a light emitting device according to some embodiments of the present disclosure. FIG. 2 is an illustration of a sectional view along line AA in FIG. 1 and only illustrates this area. The light emitting device has several bumps 340 to define a pattern of light emitting pixels. The first recess 331 is located between two adjacent protrusions 340 and provides a space for accommodating light-emitting pixels.
参见图2,发光装置100包含第一基板110及第一导电层310设置于第一 基板110上。于某些实施方式中,第一基板110位在第一导电层310下方。于某些实施方式中,第一基板110可包含晶体管阵列,其配置对应于发光单元350。第一基板110可包含数个电容器。于某些实施方式中,超过一个晶体管经配置以与一电容器与一发光单元350形成电路。Referring to FIG. 2 , the light emitting device 100 includes a first substrate 110 and a first conductive layer 310 disposed on the first substrate 110 . In some embodiments, the first substrate 110 is located under the first conductive layer 310 . In some embodiments, the first substrate 110 may include a transistor array whose configuration corresponds to the light emitting unit 350 . The first substrate 110 may include several capacitors. In some embodiments, more than one transistor is configured to form a circuit with a capacitor and a light emitting unit 350 .
于某些实施方式中,第一基板110包含基材111、介电层112,及一或多个电路设于基材111上。于某些实施方式中,基材111为透明基材,或基至少一部分是透明的。于某些实施方式中,基材111为非可挠式基材,且基材111的材料可包括玻璃、石英、低温多晶硅(low temperature poly-silicon,LTPS)或其他适当材料。于某些实施方式中,基材111为可挠式基材,且基材111的材料可包括透明环氧树脂、聚酰亚胺、聚氯乙烯、甲基丙烯酸甲酯或其他适当材料。介电层112可视需要而设于如图1所示的基材上110。于某些实施方式中,介电层112可包括氧化硅、硅氮化物、硅氧氮化物或其他适当材料。In some embodiments, the first substrate 110 includes a substrate 111 , a dielectric layer 112 , and one or more circuits are disposed on the substrate 111 . In some embodiments, the substrate 111 is a transparent substrate, or at least a part of the substrate is transparent. In some embodiments, the substrate 111 is a non-flexible substrate, and the material of the substrate 111 may include glass, quartz, low temperature poly-silicon (LTPS) or other suitable materials. In some embodiments, the substrate 111 is a flexible substrate, and the material of the substrate 111 may include transparent epoxy resin, polyimide, polyvinyl chloride, methyl methacrylate or other suitable materials. The dielectric layer 112 can be disposed on the substrate 110 as shown in FIG. 1 as needed. In some embodiments, the dielectric layer 112 may include silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials.
于某些实施方式中,电路可包含CMOS电路,或是包含数个晶体管210及邻近晶体管的数个电容器220,其中晶体管210及电容器220形成于介电层112上。于某些实施方式中,晶体管210为薄膜晶体管(thin-film transistor,TFT)。每一晶体管210包括源极/漏极区域212(包含至少一源极区域及一漏极区域)、介于源极/漏极区域212间的通道区域213、设于通道区域213上方的栅极电极214以及介于通道区域213与门极电极214间的栅极绝缘体215。栅极电极214可由导电性材料制成,譬如金属、硅化物或金属合金。于某些实施方式中,栅极电极214可为一复合结构,其包含数个不同层,且这些不同层可透过施加蚀刻剂并显微镜下观察时而彼此区分。于某些实施方式中,栅极电极214和层间介电结构230的第一金属层同时形成。层间介电结构230设于电路或晶体管210上。层间介电结构230可包括数层的金属导线及介电材料,以供电性连接与绝缘。晶体管210的通道区域213可由半导体材料制成,譬如硅或选自第IV族或第III族及第V族的其他元素。于某些实施方式中,层间介电结构230具有 约100nm至1000nm间的厚度。于某些实施方式中,层间介电结构230具有约200nm至500nm间的厚度。In some embodiments, the circuit may comprise a CMOS circuit, or comprise a plurality of transistors 210 and a plurality of capacitors 220 adjacent to the transistor, wherein the transistors 210 and the capacitors 220 are formed on the dielectric layer 112 . In some embodiments, the transistor 210 is a thin-film transistor (thin-film transistor, TFT). Each transistor 210 includes a source/drain region 212 (including at least one source region and a drain region), a channel region 213 between the source/drain regions 212, and a gate disposed above the channel region 213. An electrode 214 and a gate insulator 215 between the channel region 213 and the gate electrode 214 . The gate electrode 214 can be made of conductive material, such as metal, silicide or metal alloy. In some embodiments, the gate electrode 214 can be a composite structure that includes several different layers, and these different layers can be distinguished from each other by applying an etchant and observing under a microscope. In some embodiments, the gate electrode 214 and the first metal layer of the ILD structure 230 are formed simultaneously. The interlayer dielectric structure 230 is disposed on the circuit or transistor 210 . The interlayer dielectric structure 230 may include several layers of metal wires and dielectric materials for electrical connection and isolation. The channel region 213 of the transistor 210 may be made of a semiconductor material such as silicon or other elements selected from Group IV or Group III and Group V. In some embodiments, the ILD structure 230 has a thickness between about 100 nm and 1000 nm. In some embodiments, the ILD structure 230 has a thickness between about 200 nm and 500 nm.
于某些实施方式中,栅极绝缘体215覆盖晶体管210的通道区域213及源极/漏极区域212,且栅极绝缘体215设于相邻的电容器220及介电层112间。于某些实施方式中,在于介电层112上形成源极/漏极区域212及通道区域213后,形成栅极绝缘体215。源极/漏极区域212设于通道区域213的相对侧上以提供载流子。于某些实施方式中,电容器220设于晶体管210间。每一电容器220包括下电极221、上电极222及位于上电极222与下电极221间的绝缘层223。于某些实施方式中,下电极221和介电层112上的层间介电结构230的金属层同时形成。于某些实施方式中,在形成金属层后才于晶体管210上形成绝缘层223。于某些实施方式中,绝缘层223设于下电极221与晶体管210上并与其共形。上电极222设于层间介电结构230中的绝缘层223上。上电极222可包括钛、铝、铜、氮化钛、上述的组合,或其他适当材料。于某些实施方式中,上电极222和层间介电结构230的金属层同时形成。于某些实施方式中,在形成绝缘层223后,形成上电极222及上电极222和层间介电结构230的金属层。In some embodiments, the gate insulator 215 covers the channel region 213 and the source/drain region 212 of the transistor 210 , and the gate insulator 215 is disposed between the adjacent capacitor 220 and the dielectric layer 112 . In some embodiments, the gate insulator 215 is formed after the source/drain region 212 and the channel region 213 are formed on the dielectric layer 112 . Source/drain regions 212 are disposed on opposite sides of the channel region 213 to provide carriers. In some embodiments, the capacitor 220 is disposed between the transistors 210 . Each capacitor 220 includes a lower electrode 221 , an upper electrode 222 and an insulating layer 223 between the upper electrode 222 and the lower electrode 221 . In some embodiments, the bottom electrode 221 and the metal layer of the ILD structure 230 on the dielectric layer 112 are formed simultaneously. In some embodiments, the insulating layer 223 is formed on the transistor 210 after the metal layer is formed. In some embodiments, the insulating layer 223 is disposed on and conforms to the bottom electrode 221 and the transistor 210 . The upper electrode 222 is disposed on the insulating layer 223 in the interlayer dielectric structure 230 . The upper electrode 222 may include titanium, aluminum, copper, titanium nitride, combinations thereof, or other suitable materials. In some embodiments, the upper electrode 222 and the metal layer of the ILD structure 230 are formed simultaneously. In some embodiments, after the insulating layer 223 is formed, the upper electrode 222 and the metal layer of the upper electrode 222 and the interlayer dielectric structure 230 are formed.
于某些实施方式中,一连接结构240将晶体管210电性连接至电容器220。连接结构240包括复数个连接通路及复数个连接线。连接通路可连接至晶体管210的源极/漏极区域212、晶体管210的栅极电极214、和电容器220的下电极和/或上电极221及222连接至连接线,并于基材111上形成一集成电路。连接结构240可包括某些连接通路241,其一端连接至晶体管210的漏极区域212。连接结构240可包括某些连接通路242,其一端连接至晶体管210的源极区域212。连接结构240可包括某些连接通路243,其一端连接至电容器220的下电极221。连接结构240可包括某些连接线244,其一端分别连接至连接通路241。连接结构240可包括某些连接线(图未示),其一端仅分别连接至连接通路242。 连接结构240还可包括某些连接线245,其一端连接至连接通路242以及连接通路243。于某些实施方式中,在形成层间介电结构230的金属层(如,第三金属层)的同时形成上述连接线。连接结构240与一导电插塞246电连接。于某些实施方式中,导电插塞246电连接连接线244及/或连接通路241。In some embodiments, a connection structure 240 electrically connects the transistor 210 to the capacitor 220 . The connection structure 240 includes a plurality of connection vias and a plurality of connection lines. The connection vias may be connected to the source/drain region 212 of the transistor 210, the gate electrode 214 of the transistor 210, and the lower and/or upper electrodes 221 and 222 of the capacitor 220 are connected to connection lines and formed on the substrate 111 an integrated circuit. The connection structure 240 may include some connection vias 241 , one end of which is connected to the drain region 212 of the transistor 210 . The connection structure 240 may include certain connection vias 242 , one end of which is connected to the source region 212 of the transistor 210 . The connection structure 240 may include some connection vias 243 one end of which is connected to the lower electrode 221 of the capacitor 220 . The connection structure 240 may include some connection wires 244 , one ends of which are respectively connected to the connection passages 241 . The connecting structure 240 may include some connecting wires (not shown), one end of which is only connected to the connecting vias 242 respectively. The connection structure 240 may further include some connection wires 245 , one end of which is connected to the connection passage 242 and the connection passage 243 . In some embodiments, the connection lines are formed while forming the metal layer (eg, the third metal layer) of the interlayer dielectric structure 230 . The connection structure 240 is electrically connected to a conductive plug 246 . In some embodiments, the conductive plug 246 is electrically connected to the connecting wire 244 and/or the connecting via 241 .
数据线(图中未绘示)设于连接结构240的连接线上方,以电性连接至源极/漏极区域212。The data lines (not shown in the figure) are disposed above the connection lines of the connection structure 240 to be electrically connected to the source/drain regions 212 .
于发光装置100中,第一导电层310设于层间介电结构230及连接结构240上方的上方,其中第一导电层310的一部分电性连接至连接结构240。于某些实施方式中,第一导电层310具有如第一基板110的平坦表面,通过一导电插塞246与连接结构240(包含连接通路242、243及连接线245)而电性连接至晶体管210和/或电容器220。于某些实施方式中,第一导电层310是不连续的设置于第一基板110上。于某些实施方式中,第一导电层310被第二凹部361断开。In the light emitting device 100 , the first conductive layer 310 is disposed above the interlayer dielectric structure 230 and the connection structure 240 , wherein a part of the first conductive layer 310 is electrically connected to the connection structure 240 . In some embodiments, the first conductive layer 310 has a flat surface like the first substrate 110, and is electrically connected to the transistor through a conductive plug 246 and the connection structure 240 (including the connection vias 242, 243 and the connection line 245). 210 and/or capacitor 220. In some embodiments, the first conductive layer 310 is discontinuously disposed on the first substrate 110 . In some embodiments, the first conductive layer 310 is disconnected by the second concave portion 361 .
于某些实施方式中,第一导电层310包含Al。于某些实施方式中,第一导电层310的厚度范围为50nm至300nm。In some embodiments, the first conductive layer 310 includes Al. In some embodiments, the thickness of the first conductive layer 310 ranges from 50 nm to 300 nm.
于某些实施方式中,蚀刻停止层311设置于第一基板110与第一导电层310间。于某些实施方式中,一部分的蚀刻停止层311自第一导电层310暴露而与第二凸块341接触。于某些实施方式中,蚀刻停止层311包含蚀刻选择比与铝不相同的材料。于某些实施方式中,蚀刻停止层311包含Ti。于某些实施方式中,蚀刻停止层311的厚度范围为300nm至800nm。于某些实施方式中,蚀刻停止层311围绕导电插塞246。In some embodiments, the etch stop layer 311 is disposed between the first substrate 110 and the first conductive layer 310 . In some embodiments, a portion of the etch stop layer 311 is exposed from the first conductive layer 310 and contacts the second bump 341 . In some embodiments, the etch stop layer 311 includes a material having a different etch selectivity than aluminum. In some embodiments, the etch stop layer 311 includes Ti. In some embodiments, the thickness of the etch stop layer 311 ranges from 300 nm to 800 nm. In some embodiments, the etch stop layer 311 surrounds the conductive plug 246 .
于某些实施方式中,第一凸块座321及第二凸块座322分别设置于第一导电层310上且彼此分离。于某些实施方式中,由剖面视角观看,第一凸块座321的侧壁3212及下表面间夹有一半径角σ1,半径角σ1的范围为10度到90度。于某些实施方式中,由剖面视角观看,第一凸块座321为梯型。于某些实施方 式中,第一凸块座321的侧壁3212为弧形表面。于某些实施方式中,第一凸块座321的侧壁3212为下凹的弧形表面。In some embodiments, the first bump seat 321 and the second bump seat 322 are respectively disposed on the first conductive layer 310 and separated from each other. In some embodiments, viewed from a cross-sectional view, there is a radius angle σ1 between the sidewall 3212 and the bottom surface of the first bump seat 321 , and the radius angle σ1 ranges from 10 degrees to 90 degrees. In some embodiments, viewed from a cross-sectional view, the first bump seat 321 is trapezoidal. In some embodiments, the sidewall 3212 of the first bump seat 321 is an arc-shaped surface. In some embodiments, the sidewall 3212 of the first bump seat 321 is a concave arc surface.
于某些实施方式中,第一凸块座321包含至少三个不同层的堆叠。于某些实施方式中,第一凸块座321包含介电层324设置于第一导电层310上,第二导电层325设置于介电层324上,及第二电极层326设置于第二导电层325上。于某些实施方式中,介电层324包含介电材料。于某些实施方式中,介电层324包含SiN。于某些实施方式中,介电层324的厚度是小于第一导电层310的厚度,例如具有厚度范围为5nm至50nm。于某些实施方式中,第二导电层325包含铝。于某些实施方式中,第二导电层325的厚度是大于介电层324的厚度,例如具有厚度范围为50nm至300nm于某些实施方式中,第一导电层310的厚度是大于第二导电层325的厚度。于某些实施方式中,第二电极层326是透明的。于某些实施方式中,第二电极层326包含电极材料,例如但不限于氧化铟锡(ITO)、钼、或前述的一组合。于某些实施方式中,第二电极层326的厚度范围为5nm至50nm。In some embodiments, the first bump pad 321 includes a stack of at least three different layers. In some embodiments, the first bump seat 321 includes a dielectric layer 324 disposed on the first conductive layer 310, a second conductive layer 325 disposed on the dielectric layer 324, and a second electrode layer 326 disposed on the second on the conductive layer 325 . In some embodiments, the dielectric layer 324 includes a dielectric material. In some embodiments, the dielectric layer 324 includes SiN. In some embodiments, the thickness of the dielectric layer 324 is smaller than that of the first conductive layer 310 , for example, has a thickness ranging from 5 nm to 50 nm. In some embodiments, the second conductive layer 325 includes aluminum. In some embodiments, the thickness of the second conductive layer 325 is greater than that of the dielectric layer 324, such as having a thickness ranging from 50 nm to 300 nm. In some embodiments, the thickness of the first conductive layer 310 is greater than that of the second conductive layer 310. The thickness of layer 325 . In some embodiments, the second electrode layer 326 is transparent. In some embodiments, the second electrode layer 326 includes an electrode material such as but not limited to indium tin oxide (ITO), molybdenum, or a combination thereof. In some embodiments, the thickness of the second electrode layer 326 ranges from 5 nm to 50 nm.
于某些实施方式中,由剖面视角观看,第二凸块座322的第一侧壁3222及下表面间夹有一半径角σ2,半径角σ2的范围为10度到90度。于某些实施方式中,由剖面视角观看,第二凸块座322为梯型。于某些实施方式中,第二凸块座322的第一侧壁3222为弧形表面。于某些实施方式中,第二凸块座322的第一侧壁3222为下凹的弧形表面。于某些实施方式中,第二凸块座322包含至少三个不同层的堆叠。于某些实施方式中,第二凸块座322包含介电层324设置于第一导电层310上,第二导电层325设置于介电层324上,及第二电极层326设置于第二导电层325上。于某些实施方式中,第二凸块座322包含与第一凸块座321相同的堆叠结构。于某些实施方式中,第二凸块座322与第一凸块座321的高度相同。于某些实施方式中,第二凸块座322与第一凸块座321的宽度可为相同或不同。In some embodiments, viewed from a cross-sectional view, there is a radius angle σ2 between the first sidewall 3222 and the lower surface of the second bump seat 322 , and the range of the radius angle σ2 is 10 degrees to 90 degrees. In some embodiments, viewed from a cross-sectional view, the second bump seat 322 is trapezoidal. In some embodiments, the first sidewall 3222 of the second bump seat 322 is an arc-shaped surface. In some embodiments, the first sidewall 3222 of the second bump seat 322 is a concave arc surface. In some embodiments, the second bump pad 322 includes a stack of at least three different layers. In some embodiments, the second bump seat 322 includes a dielectric layer 324 disposed on the first conductive layer 310, a second conductive layer 325 disposed on the dielectric layer 324, and a second electrode layer 326 disposed on the second on the conductive layer 325 . In some embodiments, the second bump seat 322 includes the same stack structure as the first bump seat 321 . In some embodiments, the height of the second bump seat 322 is the same as that of the first bump seat 321 . In some embodiments, the widths of the second bump seat 322 and the first bump seat 321 may be the same or different.
于发光装置100中,第一电极层330设置于第一凸块座321、第二凸块座322,及第一凸块座321与第二凸块座322间的第一导电层310上。于某些实施方式中,第一电极层330连续的设置于第一凸块座321、第一导电层310及第二凸块座322上。于某些实施方式中,第一电极层330与第一凸块座321、第一导电层310及第二凸块座322接触。于某些实施方式中,第一电极层330与第一凸块座321及第二凸块座322间的第一导电层310接触。于某些实施方式中,第一电极层330与第一凸块座321的侧壁3212及上表面3211接触。于某些实施方式中,第一电极层330与第二凸块座322的第一侧壁3222及上表面3221接触。In the light emitting device 100 , the first electrode layer 330 is disposed on the first bump seat 321 , the second bump seat 322 , and the first conductive layer 310 between the first bump seat 321 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is continuously disposed on the first bump seat 321 , the first conductive layer 310 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is in contact with the first bump seat 321 , the first conductive layer 310 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is in contact with the first conductive layer 310 between the first bump seat 321 and the second bump seat 322 . In some embodiments, the first electrode layer 330 is in contact with the sidewall 3212 and the upper surface 3211 of the first bump seat 321 . In some embodiments, the first electrode layer 330 is in contact with the first sidewall 3222 and the upper surface 3221 of the second bump seat 322 .
于某些实施方式中,第一电极层330是透明的。于某些实施方式中,第一电极层330包含电极材料,例如但不限于氧化铟锡(ITO)、钼、或前述的一组合。于某些实施方式中,第一电极层330的厚度范围为5nm至50nm。于某些实施方式中,第一电极层330的厚度与第二电极层326的厚度可为相同或不同。于某些实施方式中,第一电极层330的折射率与第二电极层326的折射率不同。于某些实施方式中,第一电极层330与第二电极层326包含不同晶相的电极材料,通过具有不同晶相及不同折射率的材料配置,使发光装置100的亮度增加。In some embodiments, the first electrode layer 330 is transparent. In some embodiments, the first electrode layer 330 includes an electrode material, such as but not limited to indium tin oxide (ITO), molybdenum, or a combination thereof. In some embodiments, the thickness of the first electrode layer 330 ranges from 5 nm to 50 nm. In some embodiments, the thickness of the first electrode layer 330 and the thickness of the second electrode layer 326 may be the same or different. In some embodiments, the refractive index of the first electrode layer 330 is different from that of the second electrode layer 326 . In some embodiments, the first electrode layer 330 and the second electrode layer 326 include electrode materials with different crystal phases, and the brightness of the light emitting device 100 is increased by configuring materials with different crystal phases and different refractive indices.
于某些实施方式中,第一电极层330包含位于第一凸块座321及第二凸块座322间的第一凹部331。于某些实施方式中,第一凹部331位于第一凸块座321的侧壁3212,及第二凸块座322的第一侧壁3222。于某些实施方式中,第一凹部331具有第一侧壁332及相对于第一侧壁332的第二侧壁333,以及位于第一侧壁332及第二侧壁333间的底部334。于某些实施方式中,第一凹部331的第一侧壁332是设置于第一凸块座321的侧壁3212上,第一凹部331的第二侧壁333是设置于第二凸块座322的第一侧壁3222上。于某些实施方式中,第一凹部331的底部334是与第一导电层310接触。In some embodiments, the first electrode layer 330 includes a first recess 331 located between the first bump seat 321 and the second bump seat 322 . In some embodiments, the first recess 331 is located on the sidewall 3212 of the first bump seat 321 and the first sidewall 3222 of the second bump seat 322 . In some embodiments, the first recess 331 has a first sidewall 332 , a second sidewall 333 opposite to the first sidewall 332 , and a bottom 334 between the first sidewall 332 and the second sidewall 333 . In some embodiments, the first side wall 332 of the first recess 331 is disposed on the side wall 3212 of the first bump seat 321, and the second side wall 333 of the first recess 331 is disposed on the second bump seat 322 on the first side wall 3222 . In some embodiments, the bottom 334 of the first recess 331 is in contact with the first conductive layer 310 .
于发光装置100中,第一凹部331的两相对侧壁332、333上分别设有第一凸块341及第二凸块342。第一凸块341及第二凸块342彼此分离。于某些实施方式中,第一凸块座321、第二凸块座322是用于使徒快340设置于其上。某些实施方式中,第一凸块341设置于第一凸块座321上并覆盖第一电极层330的第一凹部331的第一侧壁332的至少一部分。于某些实施方式中,第一凸块341覆盖第一凸块座321的上表面3211及侧壁3212。第一凸块341及第二凸块342分别具有从第一基板110突出的弯曲表面。于某些实施方式中,凸块340是作为图案定义层。于某些实施方式中,第一凸块341及第二凸块342间的区域经配置用于容置发光单元350。于某些实施方式中,第一凸块341及/或第二凸块342包含光敏材料。于某些实施方式中,第一凸块341及/或第二凸块342包含吸光材料。于某些实施方式中,第一凸块341及/或第二凸块342包含透光材料。于某些实施方式中,第一凸块341及/或第二凸块342不包含氟。于某些实施方式中,第一凸块341及第二凸块342包含相同材料。于某些实施方式中,第一凸块341的厚度T1(相当于第一凸块座321上的第一电极层330的上表面至第一凸块341的顶点的距离)范围为100nm至500nm。In the light emitting device 100 , a first protruding block 341 and a second protruding block 342 are respectively provided on two opposite side walls 332 , 333 of the first concave portion 331 . The first bump 341 and the second bump 342 are separated from each other. In some embodiments, the first bump seat 321 and the second bump seat 322 are used for disposing the fast 340 thereon. In some embodiments, the first bump 341 is disposed on the first bump seat 321 and covers at least a part of the first sidewall 332 of the first recess 331 of the first electrode layer 330 . In some embodiments, the first bump 341 covers the upper surface 3211 and the sidewall 3212 of the first bump seat 321 . The first bump 341 and the second bump 342 respectively have curved surfaces protruding from the first substrate 110 . In some embodiments, the bumps 340 serve as a pattern definition layer. In some embodiments, the area between the first bump 341 and the second bump 342 is configured to accommodate the light emitting unit 350 . In some embodiments, the first bump 341 and/or the second bump 342 includes a photosensitive material. In some embodiments, the first bump 341 and/or the second bump 342 includes a light-absorbing material. In some embodiments, the first bump 341 and/or the second bump 342 includes a light-transmitting material. In some embodiments, the first bump 341 and/or the second bump 342 does not contain fluorine. In some embodiments, the first bump 341 and the second bump 342 include the same material. In some embodiments, the thickness T1 of the first bump 341 (equivalent to the distance from the upper surface of the first electrode layer 330 on the first bump seat 321 to the apex of the first bump 341 ) ranges from 100 nm to 500 nm. .
于某些实施方式中,第二凸块342设置于第二凸块座322上并覆盖第二侧壁333的至少一部分。于某些实施方式中,第二凸块342覆盖第二凸块座322的上表面3221及侧壁3222。于某些实施方式中,第一电极层330设置于第一凸块341与第二凸块342间,并且延伸至第一凸块341与第一凸块座321的侧壁3212间,以及延伸至第二凸块342与第二凸块座322的第一侧壁3222间。于某些实施方式中,第二凸块342的厚度T2(相当于第二凸块座322上的第一电极层330的上表面至第二凸块342的顶点的距离)范围为100nm至500nm。In some embodiments, the second protrusion 342 is disposed on the second protrusion seat 322 and covers at least a part of the second side wall 333 . In some embodiments, the second bump 342 covers the upper surface 3221 and the sidewall 3222 of the second bump seat 322 . In some embodiments, the first electrode layer 330 is disposed between the first bump 341 and the second bump 342 , and extends to between the first bump 341 and the sidewall 3212 of the first bump seat 321 , and extends to Between the second bump 342 and the first side wall 3222 of the second bump seat 322 . In some embodiments, the thickness T2 of the second bump 342 (equivalent to the distance from the upper surface of the first electrode layer 330 on the second bump seat 322 to the apex of the second bump 342) ranges from 100 nm to 500 nm. .
于发光装置100中,发光单元350形成于第一凹部331的底部334上且位于第一凸块341及第二凸块342间。于某些实施方式中,发光单元350与第一凹部331共型。于某些实施方式中,发光单元350与第一凸块341及第二凸块 342接触。于某些实施方式中,发光单元350的上表面是高于第一凸块座321的上表面3211且低于第一凸块341的顶点。当发光单元350的上表面是低于第一凸块341的顶点,发光装置100较不易断线,且有利于发光单元350的侧向出光。In the light emitting device 100 , the light emitting unit 350 is formed on the bottom 334 of the first recess 331 and located between the first bump 341 and the second bump 342 . In some embodiments, the light emitting unit 350 is in the same shape as the first concave portion 331 . In some embodiments, the light emitting unit 350 is in contact with the first bump 341 and the second bump 342. In some embodiments, the upper surface of the light emitting unit 350 is higher than the upper surface 3211 of the first bump seat 321 and lower than the apex of the first bump 341 . When the upper surface of the light emitting unit 350 is lower than the apex of the first protrusion 341 , the light emitting device 100 is less likely to be broken, and it is beneficial for the light emitting unit 350 to emit light laterally.
于某些实施方式中,发光单元350包含载流子注入层351。载流子注入层351设置于第一电极层330的第一凹部331的底面334的暴露表面上。载流子注入层351沿着底面334加衬(lining)。更具体而言,第一凸块341及第二凸块342间的区域经配置作为发光单元350的有效发光面积。于某些实施方式中,各个发光单元350具有个别的载流子注入层351。于某些实施方式中,载流子注入层351与第一电极层330的第一凹部331的底面334接触。于某些实施方式中,载流子注入层351与第一凸块341及第二凸块342接触。于某些实施方式中,载流子注入层351是用于空穴注入或电子注入。在一些实施例中,载流子注入层351包含有机材料。In some embodiments, the light emitting unit 350 includes a carrier injection layer 351 . The carrier injection layer 351 is disposed on the exposed surface of the bottom surface 334 of the first recess 331 of the first electrode layer 330 . The carrier injection layer 351 is lined along the bottom surface 334 . More specifically, the area between the first bump 341 and the second bump 342 is configured as an effective light emitting area of the light emitting unit 350 . In some embodiments, each light emitting unit 350 has an individual carrier injection layer 351 . In some embodiments, the carrier injection layer 351 is in contact with the bottom surface 334 of the first recess 331 of the first electrode layer 330 . In some embodiments, the carrier injection layer 351 is in contact with the first bump 341 and the second bump 342 . In some embodiments, the carrier injection layer 351 is used for hole injection or electron injection. In some embodiments, the carrier injection layer 351 includes an organic material.
于某些实施方式中,发光单元350包含载流子传输层352(或称第一型载流子传输层)。载流子注入层351设置在载流子传输层352下。于某些实施方式中,载流子传输层352沿着载流子注入层351加衬。各个发光单元具有个别的载流子传输层352。于某些实施方式中,载流子传输层352是用于空穴传输或电子传输。于某些实施方式中,载流子传输层352与载流子注入层351接触。于某些实施方式中,载流子传输层352与第一凸块341及第二凸块342接触。于某些实施方式中,载流子传输层352包含有机材料。In some embodiments, the light-emitting unit 350 includes a carrier transport layer 352 (or called a first-type carrier transport layer). The carrier injection layer 351 is disposed under the carrier transport layer 352 . In some embodiments, the carrier transport layer 352 lines the carrier injection layer 351 . Each light emitting unit has an individual carrier transport layer 352 . In some embodiments, the carrier transport layer 352 is used for hole transport or electron transport. In some embodiments, the carrier transport layer 352 is in contact with the carrier injection layer 351 . In some embodiments, the carrier transport layer 352 is in contact with the first bump 341 and the second bump 342 . In some embodiments, the carrier transport layer 352 includes organic materials.
于某些实施方式中,发光单元350包含有机发光(emissive,EM)层353。于某些实施方式中,有机发光层353覆盖载流子传输层352。于某些实施方式中,有机发光层353沿着载流子传输层352加衬。于某些实施方式中,有机发光层263经配置以发光一颜色,例如红色、绿色或蓝色。于某些实施方式中,有机发光层263包含有机发光材料。In some embodiments, the light emitting unit 350 includes an organic light emitting (EM) layer 353 . In some embodiments, the organic light emitting layer 353 covers the carrier transport layer 352 . In some embodiments, the organic light emitting layer 353 lines along the carrier transport layer 352 . In some embodiments, the organic light emitting layer 263 is configured to emit light in a color, such as red, green or blue. In some embodiments, the organic light emitting layer 263 includes organic light emitting materials.
于某些实施方式中,发光单元350包含载流子传输层354(或称第二型载流子传输层)。于某些实施方式中,在有机发光层353上设置载流子传输层354(或称第二型载流子传输层)。于某些实施方式中,载流子传输层354可为空穴传输层或电子传输层。于某些实施方式中,载流子传输层354及载流子传输层352各自配置成相反的价态。于某些实施方式中,载流子传输层354包含有机材料。In some embodiments, the light emitting unit 350 includes a carrier transport layer 354 (or called a second-type carrier transport layer). In some embodiments, a carrier transport layer 354 (or called a second-type carrier transport layer) is disposed on the organic light emitting layer 353 . In some embodiments, the carrier transport layer 354 can be a hole transport layer or an electron transport layer. In some embodiments, the carrier transport layer 354 and the carrier transport layer 352 are respectively configured in opposite valence states. In some embodiments, the carrier transport layer 354 includes organic materials.
于某些实施方式中,发光单元350包含第二电极355。于某些实施方式中,在有机载流子传输层354上设置第二电极355。于某些实施方式中,第二电极355延伸至第一凸块341及第二凸块342的侧表面。第二电极355可为金属材料,例如Ag、Mg等。于某些实施方式中,第二电极355包括ITO或IZO(氧化铟锌)。于某些实施方式中,各个发光单元350具有独立的第二电极355。于某些实施方式中,复数发光单元350共享共同的第二电极355。In some embodiments, the light emitting unit 350 includes a second electrode 355 . In some embodiments, the second electrode 355 is disposed on the organic carrier transport layer 354 . In some embodiments, the second electrode 355 extends to the side surfaces of the first bump 341 and the second bump 342 . The second electrode 355 can be a metal material, such as Ag, Mg and the like. In some embodiments, the second electrode 355 includes ITO or IZO (indium zinc oxide). In some embodiments, each light emitting unit 350 has an independent second electrode 355 . In some embodiments, the plurality of light emitting units 350 share a common second electrode 355 .
发光装置100还包含第二凹部361,第二凹部361和第1凹部331彼此分离。于某些实施方式中,第二凹部361是用于使发光单元350所发出的光可以通过第二凹部361反射,使发光装置100的亮度增加。第二凹部361形成于第二凸块座322与第三凸块座323间,且第二凸块342填满第二凹部361。于某些实施方式中,第三凸块座323设置于第一导电层310上且与第一凸块座321及第二凸块座322彼此分离。于某些实施方式中,第二凸块座342位于第一凸块座341及第三凸块座343间。The light emitting device 100 further includes a second recess 361 , and the second recess 361 and the first recess 331 are separated from each other. In some embodiments, the second concave portion 361 is used to reflect the light emitted by the light emitting unit 350 through the second concave portion 361 to increase the brightness of the light emitting device 100 . The second recess 361 is formed between the second protrusion seat 322 and the third protrusion seat 323 , and the second protrusion 342 fills the second recess 361 . In some embodiments, the third bump seat 323 is disposed on the first conductive layer 310 and separated from the first bump seat 321 and the second bump seat 322 . In some embodiments, the second bump seat 342 is located between the first bump seat 341 and the third bump seat 343 .
于某些实施方式中,由剖面视角观看,第三凸块座322的侧壁3232及下表面间夹有一半径角σ3,半径角σ3的范围为10度到90度。于某些实施方式中,由剖面视角观看,第三凸块座323为梯型。于某些实施方式中,第三凸块座323的侧壁3232为弧形表面。于某些实施方式中,第三凸块座323的侧壁3232为下凹的弧形表面。于某些实施方式中,第三凸块座323包含至少三个不同层的堆叠。于某些实施方式中,第三凸块座323包含介电层324设置于第一导电层310上,第二导电层325设置于介电层324上,及第二电极层326设置 于第二导电层325上。于某些实施方式中,第三凸块座323包含与第一凸块座321相同的堆叠结构。于某些实施方式中,第三凸块座323与第一凸块座321或第二凸块座322的高度相同。于某些实施方式中,第三凸块座323与第一凸块座321或第一凸块座322的宽度可为相同或不同。In some embodiments, viewed from a cross-sectional view, there is a radius angle σ3 between the sidewall 3232 and the lower surface of the third bump seat 322 , and the range of the radius angle σ3 is 10 degrees to 90 degrees. In some embodiments, viewed from a cross-sectional view, the third bump seat 323 is trapezoidal. In some embodiments, the sidewall 3232 of the third protrusion seat 323 is an arc-shaped surface. In some embodiments, the sidewall 3232 of the third bump seat 323 is a concave arc surface. In some embodiments, the third bump pad 323 includes a stack of at least three different layers. In some embodiments, the third bump seat 323 includes a dielectric layer 324 disposed on the first conductive layer 310, a second conductive layer 325 disposed on the dielectric layer 324, and a second electrode layer 326 disposed on the second on the conductive layer 325 . In some embodiments, the third bump seat 323 includes the same stack structure as the first bump seat 321 . In some embodiments, the height of the third bump seat 323 is the same as that of the first bump seat 321 or the second bump seat 322 . In some embodiments, the widths of the third bump seat 323 and the first bump seat 321 or the first bump seat 322 may be the same or different.
于某些实施方式中,第一电极层330设置在第二凸块座322的上表面3221及第三凸块座323的上表面3231。于某些实施方式中,第一电极层330未设置在第二凹部361中。于某些实施方式中,第一电极层330不会与第二凸块座322的第二侧壁3223及第三凸块座323的侧壁3232接触。第二凸块座322的第一侧壁3222与第二侧壁3223分别位于第二凸块座322的相对的两侧。于某些实施方式中,第二凸块座322的第二侧壁3223为弧形表面。于某些实施方式中,第二凸块座322的第二侧壁3223为下凹的弧形表面。In some embodiments, the first electrode layer 330 is disposed on the upper surface 3221 of the second bump seat 322 and the upper surface 3231 of the third bump seat 323 . In some embodiments, the first electrode layer 330 is not disposed in the second recess 361 . In some embodiments, the first electrode layer 330 does not contact the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323 . The first sidewall 3222 and the second sidewall 3223 of the second bump seat 322 are respectively located on opposite sides of the second bump seat 322 . In some embodiments, the second sidewall 3223 of the second bump seat 322 is an arc-shaped surface. In some embodiments, the second sidewall 3223 of the second bump seat 322 is a concave arc surface.
于某些实施方式中,发光单元350所发出光包含侧向出光,光线通过第二凸块342后进入第二凹部362,再经由第二凸块座322的第二侧壁3223与第三凸块座323的侧壁3232反射后离开第二凹部361。于某些实施方式中,第二凹部361与第一凹部331间设有第二凸块座322。于某些实施方式中,第二凹部361与第一凹部331间设有还设有部分的第二凸块342。于某些实施方式中,第二凹部361与用于设置发光单元350的第一凹部331的距离并没有特别限制,只要第二凹部361可使发光单元350所发出的光通过第二凹部361反射,或是能使发光装置100的亮度增加。In some embodiments, the light emitted by the light emitting unit 350 includes side light, and the light enters the second recess 362 after passing through the second protrusion 342 , and then passes through the second side wall 3223 and the third protrusion of the second protrusion seat 322 . The side wall 3232 of the block seat 323 leaves the second recess 361 after reflection. In some embodiments, a second protrusion seat 322 is disposed between the second concave portion 361 and the first concave portion 331 . In some embodiments, a part of the second protrusion 342 is disposed between the second concave portion 361 and the first concave portion 331 . In some embodiments, the distance between the second recess 361 and the first recess 331 for setting the light emitting unit 350 is not particularly limited, as long as the second recess 361 can reflect the light emitted by the light emitting unit 350 through the second recess 361 , or increase the brightness of the light emitting device 100 .
于某些实施方式中,第二凹部361的深度大于第一凹部331。于某些实施方式中,第二凹部361延伸至第一导电层310间。于某些实施方式中,第二凹部361被第一电极层330、第二凸块座322、第三凸块座323及第一金属层310围绕。于某些实施方式中,第二凹部361的底部是蚀刻停止层311。In some embodiments, the depth of the second recess 361 is greater than that of the first recess 331 . In some embodiments, the second recess 361 extends to between the first conductive layers 310 . In some embodiments, the second recess 361 is surrounded by the first electrode layer 330 , the second bump seat 322 , the third bump seat 323 and the first metal layer 310 . In some embodiments, the bottom of the second recess 361 is the etch stop layer 311 .
第二凸块342设置于第二凸块座322上以及第二凹部361中。于某些实施方式中,第二凸块342设置于第二凸块座322上及第三凸块座323上,以及第 二凹部361中。于某些实施方式中,第二凸块342覆盖第二凸块座322的上表面3221及第一侧壁3222的至少一部份,第二凸块342还覆盖第二凸块座322的第二侧壁3223。于某些实施方式中,第二凸块342与第二凸块座322的上表面3221、第一侧壁3222的至少一部份接触,第二凸块342还与第二凸块座322的第二侧壁3223接触。于某些实施方式中,第二凸块342与第三凸块座323的上表面3231及侧壁3232接触。于某些实施方式中,第二凸块342深入第二凹361并与蚀刻停止层311接触。The second protrusion 342 is disposed on the second protrusion seat 322 and in the second recess 361 . In some embodiments, the second protrusion 342 is disposed on the second protrusion seat 322 and the third protrusion seat 323 , and in the second recess 361 . In some embodiments, the second bump 342 covers at least a part of the upper surface 3221 and the first side wall 3222 of the second bump seat 322 , and the second bump 342 also covers the first side of the second bump seat 322 . Two side walls 3223. In some embodiments, the second bump 342 is in contact with at least a part of the upper surface 3221 of the second bump seat 322 and the first side wall 3222 , and the second bump 342 is also in contact with the top surface 3221 of the second bump seat 322 . The second sidewall 3223 is in contact. In some embodiments, the second bump 342 is in contact with the upper surface 3231 and the sidewall 3232 of the third bump seat 323 . In some embodiments, the second bump 342 goes deep into the second recess 361 and contacts the etch stop layer 311 .
于某些实施方式中,发光装置100还包含第三导电层370设置于发光单元350上。于某些实施方式中,第三导电层370设置于第二电极355上。于某些实施方式中,第三导电层370设置于第一凸块341、第二凸块342及发光单元350上。于某些实施方式中,第三导电层370与发光单元350、第一凸块341及第二凸块342共型。于某些实施方式中,第三导电层370包含Ag、Mg及其组合。于某些实施方式中,第三导电层370与第二电极355包含不同晶相的材料,通过具有不同晶相及不同折射率的材料配置,使发光装置200的亮度增加。于某些实施方式中,第三导电层370包含多层结构,可例如但不限于Ag层(图未示)及Mg层(图未示)的组合。第三导电层370的厚度范围为
Figure PCTCN2022117315-appb-000001
Figure PCTCN2022117315-appb-000002
In some embodiments, the light emitting device 100 further includes a third conductive layer 370 disposed on the light emitting unit 350 . In some embodiments, the third conductive layer 370 is disposed on the second electrode 355 . In some embodiments, the third conductive layer 370 is disposed on the first bump 341 , the second bump 342 and the light emitting unit 350 . In some embodiments, the third conductive layer 370 is in the same shape as the light emitting unit 350 , the first bump 341 and the second bump 342 . In some embodiments, the third conductive layer 370 includes Ag, Mg and combinations thereof. In some embodiments, the third conductive layer 370 and the second electrode 355 include materials with different crystal phases, and the brightness of the light emitting device 200 is increased by configuring materials with different crystal phases and different refractive indices. In some embodiments, the third conductive layer 370 includes a multi-layer structure, such as but not limited to a combination of an Ag layer (not shown) and a Mg layer (not shown). The thickness range of the third conductive layer 370 is
Figure PCTCN2022117315-appb-000001
to
Figure PCTCN2022117315-appb-000002
于某些实施方式中,发光装置100还包含一覆盖层381设置于第一凸块341及第二凸块342及发光单元350上。于某些实施方式中,覆盖层381包含有机材料。于某些实施方式中,覆盖层381的穿透率大于99%。于某些实施方式中,覆盖层381的上表面是平坦的。In some embodiments, the light emitting device 100 further includes a cover layer 381 disposed on the first bump 341 and the second bump 342 and the light emitting unit 350 . In some embodiments, the covering layer 381 includes organic materials. In some embodiments, the penetration rate of the covering layer 381 is greater than 99%. In some embodiments, the upper surface of the covering layer 381 is flat.
于某些实施方式中,还包含一填料层382设置于覆盖层381上。于某些实施方式中,覆盖层381位于发光单元350与填料层382间。于某些实施方式中,填料层382包含树脂材料。于某些实施方式中,填料层382的穿透率大于99%。In some embodiments, a filler layer 382 is further included on the covering layer 381 . In some embodiments, the covering layer 381 is located between the light emitting unit 350 and the filler layer 382 . In some embodiments, the filler layer 382 includes a resin material. In some embodiments, the permeability of the filler layer 382 is greater than 99%.
于某些实施方式中,凸透镜390设置于发光单元350上且与发光单元350 垂直对准,使发光单元350发出的光可以通过凸透镜390。于某些实施方式中,凸透镜390具有底面391及凸面392,凸面392是自底面391朝向发光单元350凸起,且被填料层382围绕。于某些实施方式中,凸透镜390的底面391与填料层382的上表面共平面。In some embodiments, the convex lens 390 is disposed on the light emitting unit 350 and vertically aligned with the light emitting unit 350 , so that the light emitted by the light emitting unit 350 can pass through the convex lens 390 . In some embodiments, the convex lens 390 has a bottom surface 391 and a convex surface 392 , the convex surface 392 protrudes from the bottom surface 391 toward the light emitting unit 350 and is surrounded by the filler layer 382 . In some embodiments, the bottom surface 391 of the convex lens 390 is coplanar with the top surface of the filler layer 382 .
于某些实施方式中,以俯视观看,凸透镜390与第一凸块座321的至少一部分及第二凸块座322的至少一部份重迭。于某些实施方式中,以俯视观看,凸透镜390与第一凸块座321的侧壁3212的至少一部分及第二凸块座322的第一侧壁3222的至少一部份重迭。于某些实施方式中,以俯视观看,凸透镜390与第二凸块座322的上表面3221的至少一部份重迭。于某些实施方式中,以俯视观看,凸透镜390且与第二凹部361分离,第二凹部361上方没有设置凸透镜390。In some embodiments, viewed from above, the convex lens 390 overlaps at least a part of the first bump seat 321 and at least a part of the second bump seat 322 . In some embodiments, the convex lens 390 overlaps at least a portion of the sidewall 3212 of the first bump seat 321 and at least a portion of the first sidewall 3222 of the second bump seat 322 in a top view. In some embodiments, viewed from above, the convex lens 390 overlaps with at least a part of the upper surface 3221 of the second bump seat 322 . In some embodiments, viewed from a top view, the convex lens 390 is separated from the second concave portion 361 , and the convex lens 390 is not disposed above the second concave portion 361 .
于某些实施方式中,凸透镜390的底面391与凸面392间具有夹角θ,夹角θ的范围为20°至50°。当夹角大于50°,凸透镜390的厚度增加导致发光装置100整体的厚度较大,且凸透镜390容易反射发光单元发出的光,导致发光装置中有杂散光且发光装置的亮度渐弱。当夹角小于20°,凸透镜的折射光线的效果不佳。于某些实施方式中,夹角θ的范围为20°至40°。于某些实施方式中,凸透镜390包含有机材料。In some embodiments, there is an included angle θ between the bottom surface 391 and the convex surface 392 of the convex lens 390 , and the included angle θ ranges from 20° to 50°. When the included angle is greater than 50°, the thickness of the convex lens 390 increases, resulting in a larger overall thickness of the light emitting device 100, and the convex lens 390 tends to reflect the light emitted by the light emitting unit, resulting in stray light in the light emitting device and the brightness of the light emitting device gradually weakens. When the included angle is less than 20°, the effect of the convex lens on refracting light is not good. In some embodiments, the included angle θ ranges from 20° to 40°. In some embodiments, the lenticular lens 390 includes organic material.
于某些实施方式中,一凸透镜390与另一凸透镜390间隔的设置,每一凸透镜390分别对应不同的发光单元350。于某些实施方式中,至少一部分的填料层382位于相邻的凸透镜390间。于某些实施方式中,以俯视观看,第二凹部361位于一凸透镜390与另一凸透镜390间。In some embodiments, one convex lens 390 is spaced apart from another convex lens 390 , and each convex lens 390 corresponds to a different light emitting unit 350 . In some embodiments, at least a portion of the filler layer 382 is located between adjacent lenticular lenses 390 . In some embodiments, the second concave portion 361 is located between one convex lens 390 and the other convex lens 390 in a top view.
于某些实施方式中,凸透镜390具有第一折射率,填料层382具有第二折射率,覆盖层381具有第三折射率。于某些实施方式中,第二折射率与第一折射率的差值是小于0.05。于某些实施方式中,第二折射率是大于第一折射率,且第一折射率是大于等于第三折射率。于某些实施方式中,第一折射率与第三 折射率的差值是小于等于0.08。于某些实施方式中,第一折射率范围为1.45至1.55。于某些实施方式中,第二折射率范围为1.51至1.6。于某些实施方式中,第三折射率范围为1.45至1.55。In some embodiments, the convex lens 390 has a first refractive index, the filler layer 382 has a second refractive index, and the covering layer 381 has a third refractive index. In some embodiments, the difference between the second refractive index and the first refractive index is less than 0.05. In some embodiments, the second refractive index is greater than the first refractive index, and the first refractive index is greater than or equal to the third refractive index. In some embodiments, the difference between the first refractive index and the third refractive index is less than or equal to 0.08. In some embodiments, the first refractive index ranges from 1.45 to 1.55. In some embodiments, the second refractive index ranges from 1.51 to 1.6. In some embodiments, the third refractive index ranges from 1.45 to 1.55.
于某些实施方式中,发光装置100还包含氧化硅层383设置于填料层382及凸透镜390上,以及第二基板384设置于氧化硅层383上。于某些实施方式中,氧化硅层383会与凸透镜的底面392与填料层382接触。于某些实施方式中,氧化硅层383包含二氧化硅。于某些实施方式中,氧化硅层383具有第四折射率。于某些实施方式中,第二折射率是大于第四折射率。于某些实施方式中,第四折射率是等于该第一折射率。于某些实施方式中,第二基板384是透明基板,可例如但不限于包括玻璃。In some embodiments, the light emitting device 100 further includes a silicon oxide layer 383 disposed on the filler layer 382 and the convex lens 390 , and a second substrate 384 disposed on the silicon oxide layer 383 . In some embodiments, the silicon oxide layer 383 is in contact with the bottom surface 392 of the convex lens and the filler layer 382 . In some embodiments, the silicon oxide layer 383 includes silicon dioxide. In some embodiments, the silicon oxide layer 383 has a fourth refractive index. In some embodiments, the second refractive index is greater than the fourth refractive index. In some embodiments, the fourth index of refraction is equal to the first index of refraction. In some embodiments, the second substrate 384 is a transparent substrate, which may include, but is not limited to, glass.
图3为俯视图,例示发光装置200。发光装置200具有像素阵列,像素阵列包括多个像素,每一像素包括一发光单元350。像素阵列可例如但不限于包括第一像素201及第二像素202间隔的设置于第一像素201旁边。于某些实施方式中,像素阵列可例如但不限于包括多个第一像素201、多个第二像素202及多个第三像素203用以显示不同色彩。每一第一像素201包括发光单元350G及凸透镜390G,每一第二像素202包括发光单元350R及凸透镜390R,每一第三像素203包括发光单元350B及凸透镜390B。发光单元350G、发光单元350R、发光单元350B可分别用以发出第一色彩的光、第二色彩的光及第三色彩的光。譬如,发光单元350G可用以显示绿色、发光单元350R可用以显示红色,且发光单元350B可用以显示蓝色。FIG. 3 is a top view illustrating the light emitting device 200 . The light emitting device 200 has a pixel array, the pixel array includes a plurality of pixels, and each pixel includes a light emitting unit 350 . The pixel array can be, for example but not limited to, comprising the first pixel 201 and the second pixel 202 disposed beside the first pixel 201 at intervals. In some embodiments, the pixel array may include, but is not limited to, a plurality of first pixels 201 , a plurality of second pixels 202 and a plurality of third pixels 203 for displaying different colors. Each first pixel 201 includes a light emitting unit 350G and a convex lens 390G, each second pixel 202 includes a light emitting unit 350R and a convex lens 390R, and each third pixel 203 includes a light emitting unit 350B and a convex lens 390B. The light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B can be used to emit light of the first color, light of the second color and light of the third color respectively. For example, the light emitting unit 350G can be used to display green, the light emitting unit 350R can be used to display red, and the light emitting unit 350B can be used to display blue.
于某些实施方式中,像素阵列的排列包括,从左至右,第二像素202、第一像素201接着是第三像素203,但不限于此。于某些实施方式中,多个第一像素201彼此分散,多个第三像素203彼此聚集,第二像素202的设置则没有特别限制。亦可根据设计或其他考虑改变各种像素的排置。再者,虽然图3绘示的发光单元350G、发光单元350R、发光单元350B的形状是椭圆形,也可 采用其他形状。此外,像素的种类的数目可以是,但不限于,三种像素;可改变像素的数目,且可使用其他适当种类的像素来显示不同色彩,如黄色、白色或其他颜色。In some embodiments, the arrangement of the pixel array includes, from left to right, the second pixel 202 , the first pixel 201 and the third pixel 203 , but is not limited thereto. In some embodiments, the plurality of first pixels 201 are scattered with each other, the plurality of third pixels 203 are gathered with each other, and the arrangement of the second pixels 202 is not particularly limited. The arrangement of various pixels may also be changed according to design or other considerations. Moreover, although the shapes of the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B shown in FIG. 3 are oval, other shapes may also be used. In addition, the number of types of pixels can be, but not limited to, three types of pixels; the number of pixels can be changed, and other appropriate types of pixels can be used to display different colors, such as yellow, white or other colors.
于某些实施方式中,发光单元350G、发光单元350R、发光单元350B的形状是椭圆形,分别具有长轴D1及短轴D2,长轴D1的范围为3.4-4μm,短轴D2的范围为2.5-3.1μm。于某些实施方式中,发光单元350G、发光单元350R、发光单元350B的长轴D1分别为3.7μm,短轴D2分别为3.7μm。于某些实施方式中,凸透镜390G、凸透镜390R及凸透镜390B的形状是圆形或椭圆形,也可采用其他形状。凸透镜390G、凸透镜390R及凸透镜390B的尺寸及形状可为相同或不同。In some embodiments, the shapes of the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B are elliptical, respectively having a major axis D1 and a minor axis D2, the range of the major axis D1 is 3.4-4 μm, and the range of the minor axis D2 is 2.5-3.1 μm. In some embodiments, the long axis D1 of the light emitting unit 350G, the light emitting unit 350R, and the light emitting unit 350B is 3.7 μm, and the short axis D2 is 3.7 μm respectively. In some embodiments, the shapes of the convex lens 390G, the convex lens 390R, and the convex lens 390B are circular or elliptical, and other shapes can also be used. The size and shape of the convex lens 390G, the convex lens 390R and the convex lens 390B may be the same or different.
于某些实施方式中,凸透镜390G具有长轴D3及短轴D4,长轴D3的范围为4.7-5.3μm,短轴D4的范围为4.1-4.7μm。于某些实施方式中,凸透镜390G的长轴D3为5.0μm,短轴D4为4.4μm。于某些实施方式中,凸透镜390R具有长轴D5及短轴D6,长轴D5的范围为4.5-5.1μm,短轴D6的范围为4.1-4.7μm。于某些实施方式中,凸透镜390R的长轴D5为4.8μm,短轴D6为4.4μm。于某些实施方式中,凸透镜390B具有长轴D7及短轴D8,长轴D7的范围为4.6-5.1μm,短轴D8的范围为4.0-4.7μm。于某些实施方式中,凸透镜390B的长轴D7为4.8μm,短轴D8为4.3μm。In some embodiments, the convex lens 390G has a major axis D3 and a minor axis D4, the major axis D3 ranges from 4.7-5.3 μm, and the minor axis D4 ranges from 4.1-4.7 μm. In some embodiments, the major axis D3 of the convex lens 390G is 5.0 μm, and the minor axis D4 is 4.4 μm. In some embodiments, the convex lens 390R has a major axis D5 and a minor axis D6, the major axis D5 ranges from 4.5-5.1 μm, and the minor axis D6 ranges from 4.1-4.7 μm. In some embodiments, the major axis D5 of the convex lens 390R is 4.8 μm, and the minor axis D6 is 4.4 μm. In some embodiments, the convex lens 390B has a major axis D7 and a minor axis D8, the major axis D7 ranges from 4.6-5.1 μm, and the minor axis D8 ranges from 4.0-4.7 μm. In some embodiments, the major axis D7 of the convex lens 390B is 4.8 μm, and the minor axis D8 is 4.3 μm.
于某些实施方式中,相邻的像素间的距离D9,例如但不限于第一像素201与第二像素202间的距离D9、第二像素202与第三像素203间的距离D9,或第一像素201与第三像素203间的距离D9,可为相同或不同。距离D9的范围为0.5-1.1μm。于某些实施方式中,相邻的像素间的距离D9为0.8μm。In some embodiments, the distance D9 between adjacent pixels, such as but not limited to the distance D9 between the first pixel 201 and the second pixel 202, the distance D9 between the second pixel 202 and the third pixel 203, or the distance D9 between the second pixel 202 and the third pixel 203, or The distance D9 between a pixel 201 and the third pixel 203 can be the same or different. The distance D9 is in the range of 0.5-1.1 μm. In some embodiments, the distance D9 between adjacent pixels is 0.8 μm.
为了进一步说明本揭示内容,图4为根据某些实施方式制备发光装置的方法400的流程图。制备发光装置如发光装置100的方法400包括以下步骤:401形成第一导电层于第一基板上;402形成介电层于第一导电层上;403形成第 二导电层于介电层上;404形成第二电极层于第二导电层上;405图案化第二电极层、第二导电层及介电层,以形成暴露第一导电层的第一开口;406形成第一电极层于第一开口及第二电极层上,以形成与第一开口共型的第一凹部,第一凹部具有一第一侧壁及相对于第一侧壁的第二侧壁,以及位于第一侧壁及第二侧壁间的一底部;407形成第一凸块于第一凹部的第一侧壁;408形成第二凸块于第一凹部的第二侧壁;409形成发光单元于第一凹部的底部以及第一凸块及第二凸块间;410形成凸透镜于第二基板上;以及411将凸透镜及第二基板设置于发光单元上,并使凸透镜与发光单元垂直对准。应注意到,图4所示的流程图仅为说明的目的,其本意并非将所述步骤限定于特定顺序。根据不同实施方式,可安排步骤401至411的不同顺序。To further illustrate the present disclosure, FIG. 4 is a flowchart of a method 400 of fabricating a light emitting device according to certain embodiments. The method 400 for preparing a light-emitting device such as the light-emitting device 100 includes the following steps: 401 forming a first conductive layer on a first substrate; 402 forming a dielectric layer on the first conductive layer; 403 forming a second conductive layer on the dielectric layer; 404 forming a second electrode layer on the second conductive layer; 405 patterning the second electrode layer, the second conductive layer and the dielectric layer to form a first opening exposing the first conductive layer; 406 forming the first electrode layer on the second On an opening and the second electrode layer, to form a first concave portion with the same shape as the first opening, the first concave portion has a first side wall and a second side wall opposite to the first side wall, and is located on the first side wall and a bottom between the second side wall; 407 forms a first bump on the first side wall of the first recess; 408 forms a second bump on the second side wall of the first recess; 409 forms a light emitting unit on the first recess 410 forming a convex lens on the second substrate; and 411 disposing the convex lens and the second substrate on the light-emitting unit, and vertically aligning the convex lens and the light-emitting unit. It should be noted that the flow chart shown in FIG. 4 is for illustration purposes only, and its intention is not to limit the steps to a specific order. According to different implementations, different sequences of steps 401 to 411 may be arranged.
参照图5至26,图5至26绘示根据本揭示内容某些实施方式,用以制备发光装置的方法。图5至26为图1中沿AA线段的剖面图。Referring to FIGS. 5-26 , FIGS. 5-26 illustrate methods for fabricating light-emitting devices according to certain embodiments of the present disclosure. 5 to 26 are sectional views along line AA in FIG. 1 .
步骤401包括形成第一导电层310于一第一基板110上。如图5所示,第一基板110可包括基材111、介电层112、晶体管210、电容器220、层间介电结构230、连接结构240、介电层310及平面层320,上述组件类似上文发光装置100所述,故此处不再赘述。如图6所示,第一导电层310形成于第一基板110上。于某些实施方式中,利用沉积技术来形成第一导电层310于第一基板110的顶部表面,例如但不限于原子层沉积(Atomic Layer Deposition,ALD)、化学气相沉积(Chemical Vapor Deposition,CVD)、物理气相沉积(Physical Vapor Deposition,PVD)、溅射(sputtering)、电镀(plating)、激光热成像(Laser Induced Thermal Imaging,LITI)、喷墨打印(inkjet printing)、阴影屏蔽(shadow mask)或湿式涂布(wet coating)等沉积技术。于某些实施方式中,方法400还包含形成一蚀刻停止层311于第一基板110与第一导电层310间以及形成被蚀刻停止层311围绕且电连接第一导电层310及第一基板110的导电插塞246。于某些实施方式中,利用沉积技术来形成蚀刻停止层311于第一基板110的顶部表面。Step 401 includes forming a first conductive layer 310 on a first substrate 110 . As shown in FIG. 5, the first substrate 110 may include a substrate 111, a dielectric layer 112, a transistor 210, a capacitor 220, an interlayer dielectric structure 230, a connection structure 240, a dielectric layer 310, and a planar layer 320. The above-mentioned components are similar The light-emitting device 100 is described above, so it will not be repeated here. As shown in FIG. 6 , the first conductive layer 310 is formed on the first substrate 110 . In some embodiments, a deposition technique is used to form the first conductive layer 310 on the top surface of the first substrate 110, such as but not limited to atomic layer deposition (Atomic Layer Deposition, ALD), chemical vapor deposition (Chemical Vapor Deposition, CVD) ), physical vapor deposition (Physical Vapor Deposition, PVD), sputtering (sputtering), electroplating (plating), laser thermal imaging (Laser Induced Thermal Imaging, LITI), inkjet printing (inkjet printing), shadow mask (shadow mask) Or deposition techniques such as wet coating. In some embodiments, the method 400 further includes forming an etch stop layer 311 between the first substrate 110 and the first conductive layer 310 and forming an etch stop layer 311 surrounded by the etch stop layer 311 and electrically connecting the first conductive layer 310 and the first substrate 110 The conductive plug 246. In some embodiments, deposition techniques are used to form the etch stop layer 311 on the top surface of the first substrate 110 .
如图7所示,步骤402包括形成一介电层324于第一导电层310上,步骤403包括形成第二导电层325于介电层324上,步骤404包括形成第二电极层326于第二导电层325上。于某些实施方式中,利用沉积技术形成介电层324于第一导电层310的顶部表面。于某些实施方式中,利用沉积技术形成第二导电层325于介电层324的顶部表面。于某些实施方式中,利用沉积技术形成第二电极层326于第二导电层325的顶部表面。于某些实施方式中,形成第一凸块座321、第二凸块座322及第三凸块座323包括形成依序堆叠于第一导电层310上的介电层324、第二导电层325及第二电极层326。As shown in FIG. 7, step 402 includes forming a dielectric layer 324 on the first conductive layer 310, step 403 includes forming a second conductive layer 325 on the dielectric layer 324, and step 404 includes forming a second electrode layer 326 on the first conductive layer 310. on the second conductive layer 325 . In some embodiments, the dielectric layer 324 is formed on the top surface of the first conductive layer 310 using a deposition technique. In some embodiments, a deposition technique is used to form the second conductive layer 325 on the top surface of the dielectric layer 324 . In some embodiments, a deposition technique is used to form the second electrode layer 326 on the top surface of the second conductive layer 325 . In some embodiments, forming the first bump seat 321 , the second bump seat 322 and the third bump seat 323 includes forming a dielectric layer 324 and a second conductive layer stacked on the first conductive layer 310 in sequence. 325 and the second electrode layer 326.
如图8至12所示,步骤405包括图案化第二电极层326、第二导电层325及介电层324,以形成暴露第一导电层326的第一开口502。于某些实施方式中,如图8所示,形成一光敏(photoresist)层501于第二电极层326上方。于某些实施方式中,涂布光敏层501于第二电极层326的顶部表面。于某些实施方式中,透过旋涂或喷涂法来设置光敏层501。于某些实施方式中,光敏层501可包含正光阻或负光阻。于某些实施方式中,光敏层501可包含有机材料及无机材料。于某些实施方式中,有机材料可包含,例如,酚甲醛树脂、环氧树脂、醚类、胺类、橡胶、丙烯酸、丙烯酸树脂、丙烯酸环氧树脂、丙烯酸三聚氰胺。于某些实施方式中,无机材料可包含,例如,金属氧化物与硅化物。于某些实施方式中,光敏层501可包含由一材料组成的一层。于某些实施方式中,光敏层501可包含由数种不同材料组成的数层,譬如一有机材料层堆叠于一无机材料层上。As shown in FIGS. 8 to 12 , step 405 includes patterning the second electrode layer 326 , the second conductive layer 325 and the dielectric layer 324 to form a first opening 502 exposing the first conductive layer 326 . In some embodiments, as shown in FIG. 8 , a photoresist layer 501 is formed on the second electrode layer 326 . In some embodiments, the photosensitive layer 501 is coated on the top surface of the second electrode layer 326 . In some embodiments, the photosensitive layer 501 is formed by spin coating or spray coating. In some embodiments, the photosensitive layer 501 may include a positive photoresist or a negative photoresist. In some embodiments, the photosensitive layer 501 may include organic materials and inorganic materials. In certain embodiments, the organic material may include, for example, phenol formaldehyde resins, epoxy resins, ethers, amines, rubber, acrylic, acrylic resins, acrylic epoxy resins, acrylic melamines. In some embodiments, the inorganic materials may include, for example, metal oxides and silicides. In some embodiments, the photosensitive layer 501 may comprise a layer composed of a material. In some embodiments, the photosensitive layer 501 may include several layers composed of several different materials, for example, an organic material layer is stacked on an inorganic material layer.
于某些实施方式中,进一步利用蚀刻制程将光敏层501图样化使光敏层501的一部分被移除,而留下的部分光敏层501用于定位如图2所示的第一凸块座321及第二凸块座322,并使光敏层501被移除的部分在后续的步骤中用于设置如图2所示的发光单元350。于某些实施方式中,留下的部分光敏层501还用于定位如图2所示的第三凸块座323,光敏层501被移除的部分还用于在 后续的步骤中形成如图2所示的第二凹部361。于某些实施例中,光敏层501的图样经设计以供形成阵列排列的第一凸块座321及第二凸块座322。In some embodiments, the photosensitive layer 501 is further patterned by an etching process so that a part of the photosensitive layer 501 is removed, and the remaining part of the photosensitive layer 501 is used to position the first bump seat 321 as shown in FIG. 2 And the second bump seat 322 , and the part where the photosensitive layer 501 is removed is used to set the light emitting unit 350 shown in FIG. 2 in subsequent steps. In some embodiments, the remaining part of the photosensitive layer 501 is also used to position the third bump seat 323 as shown in FIG. 2 , and the removed part of the photosensitive layer 501 is also used to form 2 shows the second recess 361. In some embodiments, the pattern of the photosensitive layer 501 is designed for forming the first bump seat 321 and the second bump seat 322 arranged in an array.
于某些实施方式中,如图9所示,通过干式蚀刻进行图案化,使光敏层501图样化,使光敏层501的一部分、第二电极层326的一部分及第二导电层325的一部分被移除,而形成第一凹槽502及第二凹槽503。于某些实施方式中,由剖面视角观看,光敏层501的侧壁及下表面间夹有一半径角σ4,半径角σ4的范围为60度到90度。于某些实施方式中,由剖面视角观看,第一凹槽502及第二凹槽503分别为U型。于某些实施方式中,由剖面视角观看,第二导电层325的侧壁及下表面间夹有一半径角σ5,半径角σ5的范围为10度到90度。In some embodiments, as shown in FIG. 9, patterning is carried out by dry etching, so that the photosensitive layer 501 is patterned, so that a part of the photosensitive layer 501, a part of the second electrode layer 326 and a part of the second conductive layer 325 are removed to form a first groove 502 and a second groove 503 . In some embodiments, viewed from a cross-sectional view, there is a radius angle σ4 between the sidewall and the bottom surface of the photosensitive layer 501 , and the range of the radius angle σ4 is 60 degrees to 90 degrees. In some embodiments, viewed from a cross-sectional view, the first groove 502 and the second groove 503 are respectively U-shaped. In some embodiments, viewed from a cross-sectional view, there is a radius angle σ5 between the sidewall and the bottom surface of the second conductive layer 325 , and the range of the radius angle σ5 is 10 degrees to 90 degrees.
于某些实施方式中,如图10所示,通过湿式蚀刻进行图案化,使光敏层501图样化使光敏层501的一部分、第二电极层326的一部分及第二导电层325的一部分被移除,而形成第一凹槽502及第二凹槽503。于某些实施方式中,图案化第二电极层326及第二导电层325会发生钻蚀(undercut)(图未示)。于某些实施方式中,由剖面视角观看,光敏层501的侧壁及下表面间夹有一半径角σ6,半径角σ6的范围为45度到90度。于某些实施方式中,由剖面视角观看,半径角σ6的范围为55度到80度。于某些实施方式中,由剖面视角观看,第二导电层325的侧壁及下表面间夹有一半径角σ7,半径角σ7的范围为10度到90度。于某些实施方式中,干式蚀刻制程形成的半径角σ5大于湿式蚀刻制程形成的半径角σ7。In some embodiments, as shown in FIG. 10 , patterning is performed by wet etching, and photosensitive layer 501 is patterned such that a portion of photosensitive layer 501 , a portion of second electrode layer 326 and a portion of second conductive layer 325 are removed. By removing, the first groove 502 and the second groove 503 are formed. In some embodiments, the patterned second electrode layer 326 and the second conductive layer 325 may undergo undercut (not shown). In some embodiments, viewed from a cross-sectional view, there is a radius angle σ6 between the sidewall and the bottom surface of the photosensitive layer 501 , and the radius angle σ6 ranges from 45 degrees to 90 degrees. In some embodiments, the radius angle σ6 ranges from 55 degrees to 80 degrees viewed from the cross-sectional view. In some embodiments, viewed from a cross-sectional view, there is a radius angle σ7 between the sidewall and the bottom surface of the second conductive layer 325 , and the radius angle σ7 ranges from 10 degrees to 90 degrees. In some embodiments, the radius angle σ5 formed by the dry etching process is larger than the radius angle σ7 formed by the wet etching process.
于某些实施方式中,如图11所示,进一步利用蚀刻制程将介电层324的一部分被移除,而留下的第二电极层326、第二导电层325及介电层324形成彼此分离的第一凸块座321及第二凸块座322,并形成第一凸块座321及第二凸块座322间的第一开口504。于某些实施方式中,一部分的第一导电层310自第一凸块座321及第二凸块座322间暴露。于某些实施方式中,利用干式蚀刻制程将介电层324的一部分被移除。于某些实施方式中,由剖面视角观看, 在第一凸块座321的侧壁3212及下表面间形成半径角σ1,半径角σ1的范围为10度到90度。于某些实施方式中,由剖面视角观看,在第二凸块座322的侧壁3222及下表面间形成半径角σ2,半径角σ2的范围为10度到90度。In some embodiments, as shown in FIG. 11, a part of the dielectric layer 324 is further removed by an etching process, and the remaining second electrode layer 326, the second conductive layer 325 and the dielectric layer 324 form a mutual The first bump seat 321 and the second bump seat 322 are separated to form a first opening 504 between the first bump seat 321 and the second bump seat 322 . In some embodiments, a portion of the first conductive layer 310 is exposed between the first bump seat 321 and the second bump seat 322 . In some embodiments, a portion of the dielectric layer 324 is removed using a dry etching process. In some embodiments, viewed from a cross-sectional view, a radius angle σ1 is formed between the sidewall 3212 and the lower surface of the first bump seat 321 , and the radius angle σ1 ranges from 10 degrees to 90 degrees. In some embodiments, a radius angle σ2 is formed between the sidewall 3222 and the lower surface of the second bump seat 322 from a cross-sectional view, and the radius angle σ2 ranges from 10 degrees to 90 degrees.
于某些实施方式中,经图案化的第二电极层326、第二导电层325及介电层324还形成与第二凸块座322分离的第三凸块座323,并形成第二凸块座322及第三凸块座323间的第二开口505。第一开口504与第二开口505彼此分离。于某些实施方式中,第一开口504与第二开口505同时形成。于某些实施方式中,一部分的第一导电层310自第三凸块座323及第二凸块座322间暴露。于某些实施方式中,由剖面视角观看,在第三凸块座323的侧壁3232及下表面间形成半径角σ3,半径角σ3的范围为10度到90度。于某些实施方式中,于第一导电层310上形成彼此分离的第一凸块座321、第二凸块座322及第三凸块座323。In some embodiments, the patterned second electrode layer 326, the second conductive layer 325, and the dielectric layer 324 also form a third bump seat 323 separated from the second bump seat 322, and form the second bump seat 323. The second opening 505 between the block seat 322 and the third protrusion seat 323 . The first opening 504 and the second opening 505 are separated from each other. In some embodiments, the first opening 504 and the second opening 505 are formed simultaneously. In some embodiments, a portion of the first conductive layer 310 is exposed between the third bump seat 323 and the second bump seat 322 . In some embodiments, a radius angle σ3 is formed between the sidewall 3232 and the lower surface of the third bump seat 323 from a cross-sectional view, and the radius angle σ3 ranges from 10 degrees to 90 degrees. In some embodiments, the first bump seat 321 , the second bump seat 322 and the third bump seat 323 separated from each other are formed on the first conductive layer 310 .
于某些实施方式中,如图12所示,去除光敏层501。于某些实施方式中,去除光敏层501后,露出第一凸块座321的上表面3211、第二凸块座322的上表面3221及第三凸块座323的上表面3231。于某些实施方式中,第一开口504与第二开口505具有相同的深度。In some embodiments, as shown in FIG. 12 , the photosensitive layer 501 is removed. In some embodiments, after the photosensitive layer 501 is removed, the upper surface 3211 of the first bump seat 321 , the upper surface 3221 of the second bump seat 322 and the upper surface 3231 of the third bump seat 323 are exposed. In some embodiments, the first opening 504 and the second opening 505 have the same depth.
如图13所示,步骤406包括形成第一电极层330于第一开口504及第二电极层326上,以形成与第一开口504共型的第一凹部331。第一凹部331具有一第一侧壁332及相对于第一侧壁332的第二侧壁333,以及位于第一侧壁332及第二侧壁333间的底部334。于某些实施方式中,第一电极层330还形成于第二开口505。于某些实施方式中,进行共形沉积以形成第一电极层330于第一开口504、第一凸块座321的上表面3211及侧面3212,以及第二凸块座322的上表面3221及第一侧面3221及第二侧面3223。As shown in FIG. 13 , step 406 includes forming the first electrode layer 330 on the first opening 504 and the second electrode layer 326 to form the first recess 331 having the same shape as the first opening 504 . The first recess 331 has a first sidewall 332 , a second sidewall 333 opposite to the first sidewall 332 , and a bottom 334 between the first sidewall 332 and the second sidewall 333 . In some embodiments, the first electrode layer 330 is also formed in the second opening 505 . In some embodiments, conformal deposition is performed to form the first electrode layer 330 on the first opening 504, the upper surface 3211 and the side surface 3212 of the first bump seat 321, and the upper surface 3221 and the second bump seat 322. The first side 3221 and the second side 3223 .
于某些实施方式中,方法400还包含将第一电极层330共形沉积于第二开口505及第三凸块座323的上表面3231及侧面3232。于某些实施方式中,第 一电极层330具有形成于第二开口505及第三凸块座323间凹部360,凹部360与第二开口505共型。于某些实施方式中,连续的将第一电极层330形成于第一开口504、第二开口505、第一凸块座321、第二凸块座322及第三凸块座323上。In some embodiments, the method 400 further includes conformally depositing the first electrode layer 330 on the second opening 505 and the upper surface 3231 and the side surface 3232 of the third bump seat 323 . In some embodiments, the first electrode layer 330 has a concave portion 360 formed between the second opening 505 and the third bump seat 323 , and the concave portion 360 has the same shape as the second opening 505 . In some embodiments, the first electrode layer 330 is continuously formed on the first opening 504 , the second opening 505 , the first bump seat 321 , the second bump seat 322 and the third bump seat 323 .
于某些实施方式中,如图14至16所示,方法400还包含移除位于第二开口505的第一电极层330。于某些实施方式中,移除第一电极层330的凹部360。于某些实施方式中,如图14所示,形成一光敏层510于第一电极层330上方,并移除位于凹部360中的光敏层510。于某些实施方式中,涂布光敏层510于第一电极层330的顶部表面以及第一凹部331及凹部360中,并图案化光敏层510,使第一电极层330的凹部360自光敏层510露出。于某些实施方式中,透过旋涂或喷涂法来设置光敏层510。于某些实施方式中,光敏层510可包含正光阻或负光阻。于某些实施方式中,利用蚀刻制程将光敏层510图样化使光敏层510的一部分被移除,而光敏层510被移除的部分在后续的步骤中用于形成如图2所示的第二凹部361。In some embodiments, as shown in FIGS. 14 to 16 , the method 400 further includes removing the first electrode layer 330 located at the second opening 505 . In some embodiments, the concave portion 360 of the first electrode layer 330 is removed. In some embodiments, as shown in FIG. 14 , a photosensitive layer 510 is formed on the first electrode layer 330 , and the photosensitive layer 510 located in the concave portion 360 is removed. In some embodiments, the photosensitive layer 510 is coated on the top surface of the first electrode layer 330 and the first concave portion 331 and the concave portion 360, and the photosensitive layer 510 is patterned so that the concave portion 360 of the first electrode layer 330 is separated from the photosensitive layer. 510 exposed. In some embodiments, the photosensitive layer 510 is formed by spin coating or spray coating. In some embodiments, the photosensitive layer 510 may include a positive photoresist or a negative photoresist. In some embodiments, the photosensitive layer 510 is patterned by an etching process so that a part of the photosensitive layer 510 is removed, and the removed part of the photosensitive layer 510 is used in subsequent steps to form the first layer shown in FIG. Two recesses 361 .
于某些实施方式中,如图15所示,通过蚀刻制程进行图案化,移除自光敏层510暴露的第一电极层330,而形成凹槽511。于某些实施方式中,通过湿式蚀刻进行图案化,移除第一电极层330的凹部360后,形成凹槽511。In some embodiments, as shown in FIG. 15 , patterning is performed by an etching process to remove the first electrode layer 330 exposed from the photosensitive layer 510 to form the groove 511 . In some embodiments, the patterning is performed by wet etching, and the recess 511 is formed after removing the concave portion 360 of the first electrode layer 330 .
于某些实施方式中,如图16所示,移除光敏层510,露出第二凸块座322的第二侧壁3223及第三凸块座323的侧壁3232,以及部分第一金属层310。于某些实施方式中,凹槽511的周围包括第一电极层330、第二凸块座322、第三凸块座323及第一金属层310。In some embodiments, as shown in FIG. 16 , the photosensitive layer 510 is removed, exposing the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323 , and part of the first metal layer. 310. In some embodiments, the surrounding of the groove 511 includes the first electrode layer 330 , the second bump seat 322 , the third bump seat 323 and the first metal layer 310 .
于某些实施方式中,如图17至18所示,方法400还包括图案化自凹槽511暴露的第一导电层310,以形成第二凹部361。于某些实施方式中,如图17所示,形成一光敏层520于第一电极层330上方,并移除位于凹槽511中第一电极层330上方的光敏层520。于某些实施方式中,光敏层520与第二凸块座322 的第二侧壁3223及第三凸块座323的侧壁3232接触。于某些实施方式中,涂布光敏层510于第一电极层330的顶部表面以及第一凹部331及凹槽511中,并图案化光敏层520,使凹槽511中第一电极层330自光敏层520露出,再将位于凹槽511中第一导电层310移除。于某些实施方式中,透过旋涂或喷涂法来设置光敏层520。于某些实施方式中,光敏层520可包含正光阻或负光阻。In some embodiments, as shown in FIGS. 17 to 18 , the method 400 further includes patterning the first conductive layer 310 exposed from the groove 511 to form the second recess 361 . In some embodiments, as shown in FIG. 17 , a photosensitive layer 520 is formed above the first electrode layer 330 , and the photosensitive layer 520 located above the first electrode layer 330 in the groove 511 is removed. In some embodiments, the photosensitive layer 520 is in contact with the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323 . In some embodiments, the photosensitive layer 510 is coated on the top surface of the first electrode layer 330 and the first recess 331 and the groove 511, and the photosensitive layer 520 is patterned so that the first electrode layer 330 in the groove 511 The photosensitive layer 520 is exposed, and then the first conductive layer 310 located in the groove 511 is removed. In some embodiments, the photosensitive layer 520 is formed by spin coating or spray coating. In some embodiments, the photosensitive layer 520 may include a positive photoresist or a negative photoresist.
于某些实施方式中,通过干式蚀刻进行图案化,移除自凹槽511暴露的第一导电层310。于某些实施方式中,图案化第一导电层310使第二凹部361的深度大于第一凹部331的深度。于某些实施方式中,图案化第一导电层310使蚀刻停止层311自第二凹部361暴露。In some embodiments, the patterning is performed by dry etching to remove the exposed first conductive layer 310 from the groove 511 . In some embodiments, the first conductive layer 310 is patterned so that the depth of the second recess 361 is greater than the depth of the first recess 331 . In some embodiments, the first conductive layer 310 is patterned to expose the etch stop layer 311 from the second recess 361 .
于某些实施方式中,如图18所示,移除光敏层520,形成第二凹部361。于某些实施方式中,移除光敏层520后,露出第二凸块座322的第二侧壁3223及第三凸块座323的侧壁3232、部分第一金属层310,及部分的蚀刻停止层311。In some embodiments, as shown in FIG. 18 , the photosensitive layer 520 is removed to form the second recess 361 . In some embodiments, after removing the photosensitive layer 520, the second sidewall 3223 of the second bump seat 322 and the sidewall 3232 of the third bump seat 323, part of the first metal layer 310, and part of the etching are exposed. stop layer 311 .
如图19所示,步骤407包括形成第一凸块341于第一凹部331的第一侧壁332,步骤408包括形成第二凸块342于第一凹部331的第二侧壁333。于某些实施方式中,第一凸块341及第二凸块342同时形成。于某些实施方式中,第一凹部331的底部334自第一凸块341及第二凸块342间暴露。于某些实施方式中,第二凸块342还形成于第二凹部361中以及第三凸块323上。于某些实施方式中,第二凸块342填满第二凹部361。As shown in FIG. 19 , step 407 includes forming the first protrusion 341 on the first sidewall 332 of the first recess 331 , and step 408 includes forming the second protrusion 342 on the second sidewall 333 of the first recess 331 . In some embodiments, the first bump 341 and the second bump 342 are formed at the same time. In some embodiments, the bottom 334 of the first recess 331 is exposed between the first bump 341 and the second bump 342 . In some embodiments, the second protrusion 342 is also formed in the second recess 361 and on the third protrusion 323 . In some embodiments, the second protrusion 342 fills up the second recess 361 .
如图20所示,步骤409包括形成发光单元350于第一电极层330的第一凹部331的底部334以及第一凸块341及第二凸块342间。于某些实施方式中,共形沉积以形成发光单元350。于某些实施方式中,发光单元350与第一电极层330、第一凸块341及第二凸块342接触。于某些实施方式中,于底部334上依序形成载流子注入层351、载流子传输层352、有机发光层353、载流子传输层354及第二电极355。As shown in FIG. 20 , step 409 includes forming a light emitting unit 350 between the bottom 334 of the first recess 331 of the first electrode layer 330 and between the first bump 341 and the second bump 342 . In some embodiments, the light emitting unit 350 is formed by conformal deposition. In some embodiments, the light emitting unit 350 is in contact with the first electrode layer 330 , the first bump 341 and the second bump 342 . In some embodiments, a carrier injection layer 351 , a carrier transport layer 352 , an organic light emitting layer 353 , a carrier transport layer 354 and a second electrode 355 are sequentially formed on the bottom portion 334 .
于某些实施方式中,如图21所示,方法400还包括形成覆盖层380于第一凸块341及第二凸块342及发光单元350上。于某些实施方式中,利用沉积技术形成覆盖层380。于某些实施方式中,平坦化覆盖层380的上表面。In some embodiments, as shown in FIG. 21 , the method 400 further includes forming a cover layer 380 on the first bump 341 and the second bump 342 and the light emitting unit 350 . In some embodiments, the capping layer 380 is formed using a deposition technique. In some embodiments, the upper surface of the cover layer 380 is planarized.
于某些实施方式中,如图22-24所示,步骤410包括形成凸透镜390于第二基板384上。于某些实施方式中,多个凸透镜390形成于第二基板384上。多个凸透镜390彼此间隔的设置。于某些实施方式中,如图22所示,形成氧化硅层383于第二基板384,以及形成透镜材料层393于氧化硅层383上。于某些实施方式中,涂布透镜材料于氧化硅层383上以形成透镜材料层393,透镜材料包含有机材料,可例如但不限于市售产品SU8。于某些实施方式中,如图23所示,图案化透镜材料层393,使透镜材料层393的一部分被移除。于某些实施方式中,将透镜材料层393对应第二凹部361的部分移除。于某些实施方式中,经图案化的透镜材料层393是包含对应发光单元350的位置。于某些实施方式中,如图24所示,使透镜材料层393形成凸透镜390。于某些实施方式中,使透镜材料层393形成具有底面391及凸面392的凸透镜390,底面与凸面间具有夹角θ,夹角的范围为20°至50°。于某些实施方式中,使经图案化的透镜材料层393进行光酸(photoacid)反应及热回流,以形成凸透镜390。In some embodiments, as shown in FIGS. 22-24 , step 410 includes forming a convex lens 390 on the second substrate 384 . In some embodiments, a plurality of convex lenses 390 are formed on the second substrate 384 . A plurality of convex lenses 390 are spaced apart from each other. In some embodiments, as shown in FIG. 22 , a silicon oxide layer 383 is formed on the second substrate 384 , and a lens material layer 393 is formed on the silicon oxide layer 383 . In some embodiments, the lens material is coated on the silicon oxide layer 383 to form the lens material layer 393 . The lens material includes organic materials, such as but not limited to the commercially available product SU8. In some embodiments, as shown in FIG. 23 , the lens material layer 393 is patterned such that a portion of the lens material layer 393 is removed. In some embodiments, the portion of the lens material layer 393 corresponding to the second concave portion 361 is removed. In some embodiments, the patterned lens material layer 393 includes positions corresponding to the light emitting units 350 . In some embodiments, as shown in FIG. 24 , the lens material layer 393 is formed into a convex lens 390 . In some embodiments, the lens material layer 393 is formed into a convex lens 390 having a bottom surface 391 and a convex surface 392 , the bottom surface and the convex surface have an included angle θ, and the included angle ranges from 20° to 50°. In some embodiments, the patterned lens material layer 393 is subjected to photoacid reaction and thermal reflow to form the convex lens 390 .
于某些实施方式中,如图25所示,方法400还包括形成填料层382于覆盖层381上。于某些实施方式中,利用沉积技术或涂布方法形成填料层382于覆盖层381上。于某些实施方式中,形成于覆盖层381上的填料层382是尚未完全固化的。In some embodiments, as shown in FIG. 25 , the method 400 further includes forming a filler layer 382 on the covering layer 381 . In some embodiments, the filler layer 382 is formed on the cover layer 381 by deposition technique or coating method. In some embodiments, the filler layer 382 formed on the covering layer 381 is not fully cured.
于某些实施方式中,如图26所示,步骤411包括将凸透镜390及第二基板384设置于发光单元350上,并使凸透镜390与发光单元350垂直对准。于某些实施方式中,翻转第二基板384,使凸透镜390的凸面392是自底面391朝向发光单元350凸起后,将第二基板下的凸透镜390与所对应的发光单元350垂直对准,使凸透镜390与填料层382彼此接近,直到凸面392完全与填料层 382接触。于某些实施方式中,在填料层382围绕凸透镜390的凸面392后,固化填料层382。于某些实施方式中,填料层382是与凸透镜390的凸面392及氧化硅层383接触。于某些实施方式中,方法400制得如图2所示的发光装置100。In some embodiments, as shown in FIG. 26 , step 411 includes disposing the convex lens 390 and the second substrate 384 on the light emitting unit 350 , and vertically aligning the convex lens 390 and the light emitting unit 350 . In some embodiments, after turning over the second substrate 384 so that the convex surface 392 of the convex lens 390 protrudes from the bottom surface 391 toward the light emitting unit 350, the convex lens 390 under the second substrate is vertically aligned with the corresponding light emitting unit 350, The convex lens 390 and the filler layer 382 are brought close to each other until the convex surface 392 is completely in contact with the filler layer 382 . In some embodiments, the filler layer 382 is cured after the filler layer 382 surrounds the convex surface 392 of the lenticular lens 390 . In some embodiments, the filler layer 382 is in contact with the convex surface 392 of the convex lens 390 and the silicon oxide layer 383 . In some embodiments, the method 400 produces the light emitting device 100 as shown in FIG. 2 .
因此,本揭示内容的一种实施方式提供一种发光装置,包含一基板;一第一导电层设置于该基板上;一第一凸块座设置于该第一导电层上;一第二凸块座设置于该第一导电层上且与该第一凸块座分离;一第一电极层设置于该第一凸块座、该第一导电层及该第二凸块座上,该第一电极层包含位于第一凸块座的侧壁、第二凸块座的侧壁及该第一凸块座及该第二凸块座间的一第一凹部;一第一凸块设置于该第一凸块座上及该第一凹部中的至少一部分;一第二凸块设置于该第二凸块座上及该第一凹部中的至少一部分的至少一部分;一发光单元形成于该第一凹部且位于该第一凸块及第二凸块间;及一凸透镜设置于该发光单元上且与该发光单元垂直对准,该凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角,该夹角的范围为20°至50°。Therefore, an embodiment of the present disclosure provides a light-emitting device, including a substrate; a first conductive layer disposed on the substrate; a first bump seat disposed on the first conductive layer; a second bump The block seat is arranged on the first conductive layer and separated from the first bump seat; a first electrode layer is arranged on the first bump seat, the first conductive layer and the second bump seat, the first An electrode layer includes a side wall of the first bump seat, a side wall of the second bump seat, and a first recess between the first bump seat and the second bump seat; a first bump is disposed on the On the first bump seat and at least a part of the first concave portion; a second bump is disposed on the second bump seat and at least a part of at least a part of the first concave portion; a light emitting unit is formed on the The first concave part is located between the first protruding block and the second protruding block; and a convex lens is arranged on the light emitting unit and vertically aligned with the light emitting unit, the convex lens has a bottom surface and a convex surface, and the convex surface faces the light emitting unit The unit is convex, and there is an included angle between the bottom surface and the convex surface, and the included angle ranges from 20° to 50°.
本揭示内容的一种实施方式提供一种发光装置,包含一像素阵列包括一第一像素、一第二像素间隔的设置于该第一像素旁边,以及一凹部位于该第一像素及该第二像素间;一第一凸透镜设置于该第一像素上且与该第一像素垂直对准;及一第二凸透镜设置于该第二像素上且与该第一凸透镜(390a)分离。其中该第一像素包括一第一凸块座;一与该第一凸块座分离的一第二凸块座;一第一凸块设置于该第一凸块座上并覆盖该第一凸块座的一上表面面及一侧壁的至少一部份;一第二凸块设置于与该第二凸块座上并覆盖该第二凸块座的一上表面及一侧壁的至少一部份,该第一凸块座的该侧壁与该第二凸块座的该侧壁相对设置;一电极层设置于该第一凸块与该第二凸块间;及一发光单元设置于该第一凸块及第二凸块间的该电极层上。其中该第二像素包括与该第二凸块座 分离的一第三凸块座,该凹部是设置于该第二凸块座与该第三凸块座间,且该第二凸块填满该凹部并延伸至覆盖该第三凸块座。An embodiment of the present disclosure provides a light-emitting device, comprising a pixel array including a first pixel, a second pixel spaced apart from the first pixel, and a concave portion located between the first pixel and the second pixel. Between pixels; a first convex lens is arranged on the first pixel and vertically aligned with the first pixel; and a second convex lens is arranged on the second pixel and separated from the first convex lens (390a). Wherein the first pixel includes a first bump seat; a second bump seat separated from the first bump seat; a first bump is arranged on the first bump seat and covers the first bump At least a part of an upper surface and a side wall of the block seat; a second bump is arranged on the second bump seat and covers at least a part of an upper surface and a side wall of the second bump seat A part, the side wall of the first bump seat is opposite to the side wall of the second bump seat; an electrode layer is arranged between the first bump and the second bump; and a light emitting unit It is arranged on the electrode layer between the first bump and the second bump. Wherein the second pixel includes a third bump seat separated from the second bump seat, the recess is arranged between the second bump seat and the third bump seat, and the second bump fills up The recess extends to cover the third bump seat.
本揭示内容的一种实施方式提供一种制备发光装置的方法,包含形成一第一导电层于一第一基板上;形成一介电层于该第一导电层上;形成一第二导电层于该介电层上;形成一第一电极层于该第二导电层上;图案化该第一电极层、第二导电层及该介电层,以形成暴露该第一导电层的一第一开口;形成一第二电极层于该第一开口及该第一电极层上,以形成与该第一开口共型的第一凹部,该第一凹部具有一第一侧壁及相对于该第一侧壁的第二侧壁,以及位于该第一侧壁及该第二侧壁间的一底部;形成一第一凸块于该第一凹部的该第一侧壁;形成一第二凸块于该第一凹部的该第二侧壁;形成一发光单元于该第一凹部的该底部以及该第一凸块及该第二凸块间;形成一凸透镜于一第二基板上;及将该凸透镜及该第二基板设置于该发光单元上,并使该凸透镜与该发光单元垂直对准,其中该凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角,该夹角的范围为20°至50°。An embodiment of the present disclosure provides a method of manufacturing a light-emitting device, comprising forming a first conductive layer on a first substrate; forming a dielectric layer on the first conductive layer; forming a second conductive layer On the dielectric layer; forming a first electrode layer on the second conductive layer; patterning the first electrode layer, the second conductive layer and the dielectric layer to form a first electrode layer exposing the first conductive layer an opening; a second electrode layer is formed on the first opening and the first electrode layer to form a first recess having the same type as the first opening, the first recess has a first side wall and is opposite to the The second side wall of the first side wall, and a bottom between the first side wall and the second side wall; forming a first protrusion on the first side wall of the first recess; forming a second a protruding block on the second side wall of the first recess; a light emitting unit is formed between the bottom of the first recess and the first protruding block and the second protruding block; a convex lens is formed on a second substrate; and disposing the convex lens and the second substrate on the light-emitting unit, and vertically aligning the convex lens with the light-emitting unit, wherein the convex lens has a bottom surface and a convex surface, the convex surface protrudes toward the light-emitting unit, and the There is an included angle between the bottom surface and the convex surface, and the included angle ranges from 20° to 50°.
前述内容概述一些实施方式的特征,因而熟知此技艺的人士可更加理解本揭露的各方面。熟知此技艺的人士应理解可轻易使用本揭露作为基础,用于设计或修饰其他制程与结构而实现与本申请案所述的实施例具有相同目的与/或达到相同优点。熟知此技艺的人士亦应理解此均等架构并不脱离本揭露揭示内容的精神与范围,并且熟知此技艺的人士可进行各种变化、取代与替换,而不脱离本揭露的精神与范围。The foregoing summary outlines features of some implementations so that those skilled in the art may better understand aspects of the disclosure. Those skilled in the art should understand that the present disclosure can be easily used as a basis for designing or modifying other processes and structures to achieve the same purpose and/or achieve the same advantages as the embodiments described in this application. Those skilled in the art should also understand that this equal structure does not depart from the spirit and scope of the disclosure, and those skilled in the art can make various changes, substitutions and substitutions without departing from the spirit and scope of the disclosure.

Claims (10)

  1. 一种发光装置,包含:A lighting device comprising:
    一基板;a substrate;
    一第一导电层设置于该基板上;a first conductive layer is disposed on the substrate;
    一第一凸块座设置于该第一导电层上;a first bump seat is disposed on the first conductive layer;
    一第二凸块座设置于该第一导电层上且与该第一凸块座分离;a second bump seat is disposed on the first conductive layer and separated from the first bump seat;
    一第一电极层设置于该第一凸块座、该第一导电层及该第二凸块座上,该第一电极层包含位于第一凸块座的侧壁、第二凸块座的侧壁及该第一凸块座及该第二凸块座间的一第一凹部;A first electrode layer is disposed on the first bump seat, the first conductive layer and the second bump seat, and the first electrode layer includes a side wall located on the first bump seat, a a first recess between the side wall and the first lug seat and the second lug seat;
    一第一凸块设置于该第一凸块座上及该第一凹部中的至少一部分;A first bump is disposed on the first bump seat and at least a part of the first recess;
    一第二凸块设置于该第二凸块座上及该第一凹部中的至少一部分的至少一部分;a second protrusion is disposed on the second protrusion seat and at least a part of at least a part of the first recess;
    一发光单元形成于该第一凹部且位于该第一凸块及第二凸块间;及a light emitting unit is formed in the first recess and is located between the first bump and the second bump; and
    一凸透镜设置于该发光单元上且与该发光单元垂直对准,该凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角,该夹角的范围为20°至50°。A convex lens is arranged on the light-emitting unit and vertically aligned with the light-emitting unit. The convex lens has a bottom surface and a convex surface. The convex surface is convex toward the light-emitting unit. There is an angle between the bottom surface and the convex surface. The angle ranges from 20° to 50°.
  2. 如权利要求1所述的发光装置,还包含:The lighting device of claim 1, further comprising:
    一第三凸块座,设置于该第一导电层上且与该第一凸块座及该第二凸块座彼此分离;及a third bump seat disposed on the first conductive layer and separated from the first bump seat and the second bump seat; and
    一第二凹部,形成于该第二凸块座与该第三凸块座间,且该第二凸块填满该第二凹部。A second recess is formed between the second bump seat and the third bump seat, and the second bump fills up the second recess.
  3. 如权利要求2所述的发光装置,其中以俯视观看,该凸透镜与该第一凸块座的至少一部分及该第二凸块座的至少一部份重迭,且与该第二凹部分离。The light emitting device according to claim 2 , wherein viewed from a top view, the convex lens overlaps at least a part of the first bump seat and at least a part of the second bump seat, and is separated from the second concave portion.
  4. 如权利要求1所述的发光装置,还包含:The lighting device of claim 1, further comprising:
    一覆盖层设置于第一凸块及第二凸块及发光单元上;及a covering layer is disposed on the first bump, the second bump and the light emitting unit; and
    一填料层设置于该覆盖层与该凸透镜间,a filler layer is arranged between the covering layer and the convex lens,
    其中该凸透镜具有第一折射率,该填料层具有第二折射率,该第二折射率与该第一折射率的差值是小于0.05。Wherein the convex lens has a first refractive index, the filler layer has a second refractive index, and the difference between the second refractive index and the first refractive index is less than 0.05.
  5. 如权利要求4所述的发光装置,其中该覆盖层具有第三折射率,该第二折射率是大于该第一折射率,且该第一折射率是大于等于该第三折射率。The light emitting device as claimed in claim 4, wherein the cover layer has a third refractive index, the second refractive index is greater than the first refractive index, and the first refractive index is greater than or equal to the third refractive index.
  6. 一种发光装置,包含:A lighting device comprising:
    一像素阵列包括一第一像素、一第二像素间隔的设置于该第一像素旁边,以及一凹部位于该第一像素及该第二像素间;A pixel array includes a first pixel, a second pixel spaced apart from the first pixel, and a recess between the first pixel and the second pixel;
    一第一凸透镜设置于该第一像素上且与该第一像素垂直对准;及a first convex lens is disposed on the first pixel and vertically aligned with the first pixel; and
    一第二凸透镜设置于该第二像素上且与该第一凸透镜分离,a second convex lens is disposed on the second pixel and separated from the first convex lens,
    其中该第一像素包括:Wherein the first pixel includes:
    一第一凸块座;a first bump seat;
    一与该第一凸块座分离的一第二凸块座;a second lug seat separate from the first lug seat;
    一第一凸块设置于该第一凸块座上并覆盖该第一凸块座的一上表面面及一侧壁的至少一部份;A first bump is disposed on the first bump seat and covers at least a part of an upper surface and a side wall of the first bump seat;
    一第二凸块设置于与该第二凸块座上并覆盖该第二凸块座的一上表面及一侧壁的至少一部份,该第一凸块座的该侧壁与该第二凸块座的该侧壁相对设置;A second protrusion is arranged on the second protrusion seat and covers at least a part of an upper surface and a side wall of the second protrusion seat, the side wall of the first protrusion seat and the first protrusion seat The side walls of the two bump seats are oppositely arranged;
    一电极层设置于该第一凸块与该第二凸块间;及an electrode layer is disposed between the first bump and the second bump; and
    一发光单元设置于该第一凸块及第二凸块间的该电极层上,a light emitting unit is arranged on the electrode layer between the first bump and the second bump,
    其中该第二像素包括与该第二凸块座分离的一第三凸块座,该凹部是设置于该第二凸块座与该第三凸块座间,且该第二凸块填满该凹部并延伸至覆 盖该第三凸块座。Wherein the second pixel includes a third bump seat separated from the second bump seat, the recess is arranged between the second bump seat and the third bump seat, and the second bump fills up The recess extends to cover the third bump seat.
  7. 如权利要求6所述的发光装置,其中该电极层是延伸至该第一凸块与该第一凸块座的该侧壁间,以及延伸至该第二凸块与该第二凸块座的该侧壁间。The light emitting device according to claim 6, wherein the electrode layer extends between the first bump and the sidewall of the first bump seat, and extends to the second bump and the second bump seat between the side walls.
  8. 如权利要求6所述的发光装置,其中该发光单元为椭圆形,且该第一凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该底面与该凸面间具有一夹角,该夹角的范围为20°至50°。The light-emitting device according to claim 6, wherein the light-emitting unit is elliptical, and the first convex lens has a bottom surface and a convex surface, the convex surface is convex toward the light-emitting unit, and there is a gap between the bottom surface and the convex surface Angle, the included angle ranges from 20° to 50°.
  9. 一种制备发光装置的方法,包含:A method of preparing a light emitting device, comprising:
    形成一第一导电层于一第一基板上;forming a first conductive layer on a first substrate;
    形成一介电层于该第一导电层上;forming a dielectric layer on the first conductive layer;
    形成一第二导电层于该介电层上;forming a second conductive layer on the dielectric layer;
    形成一第一电极层于该第二导电层上;forming a first electrode layer on the second conductive layer;
    图案化该第一电极层、第二导电层及该介电层,以形成暴露该第一导电层的一第一开口;patterning the first electrode layer, the second conductive layer and the dielectric layer to form a first opening exposing the first conductive layer;
    形成一第二电极层于该第一开口及该第一电极层上,以形成与该第一开口共型的第一凹部,该第一凹部具有一第一侧壁及相对于该第一侧壁的第二侧壁,以及位于该第一侧壁及该第二侧壁间的一底部;forming a second electrode layer on the first opening and the first electrode layer to form a first recess having the same shape as the first opening, the first recess has a first side wall and is opposite to the first side a second side wall of the wall, and a bottom located between the first side wall and the second side wall;
    形成一第一凸块于该第一凹部的该第一侧壁;forming a first bump on the first side wall of the first recess;
    形成一第二凸块于该第一凹部的该第二侧壁;forming a second bump on the second sidewall of the first recess;
    形成一发光单元于该第一凹部的该底部以及该第一凸块及该第二凸块间;forming a light emitting unit between the bottom of the first recess and the first bump and the second bump;
    形成一凸透镜于一第二基板上;及forming a convex lens on a second substrate; and
    将该凸透镜及该第二基板设置于该发光单元上,并使该凸透镜与该发光单元垂直对准,disposing the convex lens and the second substrate on the light-emitting unit, and vertically aligning the convex lens and the light-emitting unit,
    其中该凸透镜具有一底面及一凸面,该凸面是朝向该发光单元凸起,且该 底面与该凸面间具有一夹角,该夹角的范围为20°至50°。Wherein the convex lens has a bottom surface and a convex surface, the convex surface protrudes toward the light emitting unit, and there is an included angle between the bottom surface and the convex surface, and the range of the included angle is 20° to 50°.
  10. 如权利要求9所述的制备发光装置的方法,还包含:The method for preparing a light-emitting device as claimed in claim 9, further comprising:
    形成一覆盖层于该凸透镜与该凸透镜间;及forming a covering layer between the convex lens and the convex lens; and
    形成一填料层于该覆盖层与该凸透镜间,并与该凸透镜接触,forming a filler layer between the covering layer and the convex lens, and in contact with the convex lens,
    其中,该凸透镜具有第一折射率,该填料层具有第二折射率,该覆盖层具有第三折射率,该第二折射率是大于该第一折射率,且该第一折射率是大于等于该第三折射率,且该第一折射率与该第二折射率的差值是小于0.05。Wherein, the convex lens has a first refractive index, the filler layer has a second refractive index, the covering layer has a third refractive index, the second refractive index is greater than the first refractive index, and the first refractive index is greater than or equal to The third refractive index, and the difference between the first refractive index and the second refractive index is less than 0.05.
PCT/CN2022/117315 2021-09-09 2022-09-06 Light-emitting device and preparation method therefor WO2023036138A1 (en)

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