WO2023024720A1 - Data transmission method and system, integrated circuit, multi-chip structure, and electronic device - Google Patents

Data transmission method and system, integrated circuit, multi-chip structure, and electronic device Download PDF

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Publication number
WO2023024720A1
WO2023024720A1 PCT/CN2022/104193 CN2022104193W WO2023024720A1 WO 2023024720 A1 WO2023024720 A1 WO 2023024720A1 CN 2022104193 W CN2022104193 W CN 2022104193W WO 2023024720 A1 WO2023024720 A1 WO 2023024720A1
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Prior art keywords
data
data packet
packet
sequence number
feedback message
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PCT/CN2022/104193
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French (fr)
Chinese (zh)
Inventor
杨巍
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北京希姆计算科技有限公司
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Publication of WO2023024720A1 publication Critical patent/WO2023024720A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/1607Details of the supervisory signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18Automatic repetition systems, e.g. Van Duuren systems

Definitions

  • the present application relates to the technical field of data transmission, in particular to a data transmission method, system, integrated circuit, multi-chip structure and electronic equipment.
  • Chips are the core components of hardware devices.
  • the technology and computing power of the chip determine the upper limit of data processing of the hardware product.
  • chip design and manufacturing are getting closer and closer to the limit of Moore's Law, but the demand for hardware data processing is still rising. Therefore, chip miniaturization and multi-die (bare chip) packaging have gradually become the hardware design trend for processing big data in the future.
  • die0 and die1 are two bare chips inside the packaged chip CHIP, each of which mainly includes SoC (System on Chip, system on chip) logic and d2d subsys ( die to die subsystem, die to die subsystem) logic, data transmission and communication between two die through d2d subsys.
  • d2d subsys usually contains controller digital circuit logic (d2d controller) and analog physical logic (d2d phy).
  • the analog physical logic will have BER (Bit error rate) phenomenon in high-speed data transmission, that is, it cannot guarantee that the transmitted data is 100% correct, and the data received by the receiving end will have a small probability of error. Therefore, in When a data transmission error occurs, how the sender retransmits the data to ensure that the data is not lost becomes the key to reliable communication between dies.
  • an existing technical solution adopts a retransmission mechanism based on adding a check code at the sending end. code, immediately release system resources for correct response information, and automatically retransmit data packets for incorrect response messages. Yet there is following shortcoming in above-mentioned technical scheme:
  • check code need to be added to the repackaged data packets, which increases the check calculation process and increases the difficulty of chip physical implementation. At the same time, the check code will also occupy the data transmission bandwidth and increase the data transmission delay. hour.
  • the present disclosure aims to solve at least one of the problems in the prior art, and provides a data transmission method, system, multi-chip structure and electronic equipment.
  • One aspect of the present disclosure provides a data transmission method, the method comprising:
  • the method also includes:
  • performing a corresponding operation on the saved second data packet according to the feedback message packet includes:
  • At least one third data packet is determined from the saved data packets according to the feedback message packet, and the at least one third data packet is resent and saved.
  • the determining at least one third data packet from the saved data packets according to the feedback message packet, and resending and saving the at least one third data packet includes:
  • Another aspect of the present disclosure provides a data transmission method, the method comprising:
  • the judging whether the second sequence number in the second data packet is correct, and obtaining the judging result include:
  • the judgment result is obtained according to the comparison result.
  • the obtaining the judgment result according to the comparison result includes:
  • Another aspect of the present disclosure provides a data transmission system, the system includes a data sending end and a data receiving end, wherein:
  • the data sending end is used to receive first data; assign a first serial number to the first data, and the first serial number corresponds to the first data; based on the first data and the first data A sequence number generates a first data packet; sends the first data packet and saves the first data packet;
  • the data receiving end is used to receive a second data packet, the second sequence number of the second data packet is less than or equal to the first sequence number; determine whether the second sequence number in the second data packet is correct , to obtain a judgment result; in response to the judgment result indicating that the second sequence number is correct, receiving the second data packet; in response to the judgment result indicating that the second sequence number is wrong, deleting the second data packet and, sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
  • an integrated circuit for data transmission includes:
  • a serial number allocation unit configured to receive first data; allocate a first serial number to the first data, the first serial number corresponds to the first data; based on the first data and the first The sequence number generates the first data packet;
  • a first multiplexer configured to send the first data packet
  • a second multiplexer configured to write the first data packet into the buffer
  • a control unit configured to receive a feedback message packet, and perform a corresponding operation on the second data packet stored in the buffer according to the feedback message packet; the feedback message packet is used to indicate whether the second data packet is correct ; Wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
  • control unit is further configured to delete the second data packet stored in the buffer in response to the feedback message packet indicating that the second data packet is correct; or, in response to the feedback message The packet indicates that the second data packet is wrong, at least one third data packet is determined from the data packets stored in the buffer according to the feedback message packet, and the first multiplexer is controlled to resend the at least one third data packet third data packet, and control the second multiplexer to write the at least one third data packet into the buffer area.
  • control unit is further configured to obtain a third sequence number in the feedback message packet; according to the first sequence number and the third sequence number, from the data packet stored in the buffer determining at least one third data packet;
  • the first multiplexer is further configured to send the at least one third data packet
  • the second multiplexer is further configured to write the at least one third data packet into the buffer area.
  • the multi-chip structure includes a plurality of chips, the data transmission between at least two of the chips adopts the data transmission method described above; or,
  • At least two of the chips are provided with the aforementioned data transmission system, or the aforementioned integrated circuits for data transmission.
  • an electronic device including:
  • the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can execute the method described above.
  • Another aspect of the present disclosure provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the method described above is implemented.
  • the technical solution of the present disclosure assigns a first serial number to the first data after receiving the first data, and the first serial number corresponds to the first data, based on the first data and the first serial number No. generates the first data packet, sends the first data packet and saves the first data packet, so that there is no need to add an additional check code to the first data to be sent, and there is no need to perform complicated repackaging, which simplifies the sending logic. It reduces the occupation of invalid bandwidth and reduces the system delay.
  • the mechanism ensures the correct transmission of data and improves the speed and quality of data transmission.
  • Fig. 1 is a structural schematic diagram of a multi-die chip in the prior art
  • Fig. 2 is the flow chart of the method for realizing high-speed data transmission of a kind of universal interface chip in the prior art
  • Fig. 3 is a flowchart of a data transmission method provided by an embodiment of the present disclosure
  • Fig. 4 is a schematic structural diagram of a first preset format provided by another embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a data transmission method provided by another embodiment of the present disclosure.
  • FIG. 6 is a flowchart of a data transmission method provided by another embodiment of the present disclosure.
  • FIG. 7 is a flowchart of a data transmission method provided by another embodiment of the present disclosure.
  • Fig. 8 is a schematic structural diagram of a second preset format provided by another embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of a data transmission system provided by another embodiment of the present disclosure.
  • FIG. 10 is a schematic structural diagram of an integrated circuit for data transmission provided by another embodiment of the present disclosure.
  • Fig. 11 is a schematic structural diagram of an electronic device provided by another embodiment of the present disclosure.
  • An embodiment of the present disclosure relates to a data transmission method, the process of which is shown in Figure 3, including:
  • Step 301 receiving first data.
  • the first data may be raw data to be sent.
  • Step 302 assigning a first serial number to the first data, where the first serial number corresponds to the first data.
  • the first serial numbers assigned to different first data are also different, so that the first serial number can correspond to the first data, and the first The serial number can be used as the unique identifier of the first data, and different first data can be distinguished by distinguishing different first serial numbers.
  • assign the first sequence number to the first data according to the sending order For example, data packets with sequence numbers 0, 1, and 2 have been sent in sequence, and after the first data is currently received, the first sequence number assigned to the first data is 3.
  • Step 303 generating a first data packet based on the first data and the first sequence number.
  • the first serial number corresponding to the first data may be directly added on the basis of the first data, thereby generating the first data packet.
  • the first data packet may adopt a first preset format.
  • the first preset format may include a data field and a serial number field.
  • the data field is used to encapsulate the first data, and the length of the data that can be encapsulated ranges from 0 to 1024DW (Double Word, which means 4 bytes).
  • the serial number field is used to encapsulate the serial number of the data.
  • the length of the data that can be encapsulated is 12bit (bits).
  • the maximum serial number that can be stored in this 12bit is 4095 (decimal notation), so the 12bit serial number field can encapsulate the first sequence
  • the number ranges from 0 to 4095.
  • the first data packet is generated by directly adding the first serial number corresponding to the first data on the basis of the first data, so that the first data does not need to be reconfigured when generating the first data packet. Packing reduces the complexity of sending logic, reduces the bandwidth occupation of invalid data, and reduces system delay.
  • this embodiment does not limit the data length of each field in the first preset format, and those skilled in the art can set it according to actual requirements.
  • Step 304 sending the first data packet and saving the first data packet.
  • the first data packet may represent the data packet currently sent by the data sender, or the last data packet sent based on the current time point. For example, after sending data packets with sequence numbers 0, 1, and 2, the data sender receives another piece of data (namely the first data), assigns it a first sequence number 3, and then generates the first data packet and sends it out.
  • the data sending end may receive a plurality of data, assign sequence numbers to the received data in turn, and generate corresponding data packets to send, and the last sent data packet is the first data packet.
  • the saved first data packet may be stored in a buffer to back up the sent first data packet.
  • the technical solution of this embodiment assigns a first serial number to the first data after receiving the first data, and the first serial number corresponds to the first data, based on the first data and the first
  • the serial number generates the first data packet, sends the first data packet and saves the first data packet, so that there is no need to add an additional check code to the first data to be sent, and there is no need to perform complex repackaging, which simplifies the sending logic , reducing the use of invalid bandwidth and system delay.
  • the mechanism ensures the correct transmission of data and improves the speed and quality of data transmission.
  • the method further includes:
  • Step 501 Receive a feedback message packet, where the feedback message packet is used to indicate whether the second data packet is correct; wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
  • the second data packet is a data packet received by the data receiving end and for which the data receiving end is currently performing serial number verification.
  • the feedback message packet may be used to indicate whether there is an error in the data transmission process, thereby further indicating whether the data receiving end has received the data packet it should receive.
  • the data sending end allocates the serial number according to the sending order, under normal transmission, the data receiving end will receive sequentially according to the serial number. For example, the data sending end sends data packets with serial numbers 0, 1, and 2 in sequence, and in the case of normal transmission, the data receiving end will receive data packets with serial numbers 0, 1, and 2 in sequence.
  • the data sending end has sent data packets with sequence numbers 0-7, but due to data delay, the data receiving end only receives data packets with sequence numbers 0-4, that is, data packets with sequence numbers 5, 6, and 7 No data packets have been received yet, so the second sequence number of the second data packet is less than or equal to the first sequence number. Under normal circumstances, the data receiving end should receive a data packet with a sequence number of 5. If the sequence number of the currently received data packet (ie, the second data packet) is 5, then the sequence number of the currently received data packet will be Verify that the current received packet is correct.
  • the serial number of the data packet currently received by the data receiving end is 3 (or 6, that is, not 5), then by verifying the serial number of the currently received data packet, it is determined that the currently received Incoming packet error.
  • Step 502 Perform corresponding operations on the stored second data packet according to the feedback message packet.
  • each data packet received by the data receiving end corresponds to a saved data packet on the data sending end side, thus In the case of no error or error in the data transmission process, corresponding operations are respectively performed on the saved data packets.
  • this embodiment uses a simple message handshake mechanism to determine whether there is an error in the data transmission process through the feedback message packet used to indicate whether the second data packet is correct, so that there is no error in the data transmission process. And in the case of an error, perform corresponding operations on the saved previously sent data packets. And, the feedback message packet occupies less transmission bandwidth, which can improve transmission efficiency.
  • step 502 includes:
  • the feedback message packet indicates that the second data packet is correct
  • there is no error in the data transmission process that is, the data receiving end has received the data packet it should receive.
  • the saved second data packet loses its meaning of existence and can be Directly delete the saved second data package to release storage space.
  • the feedback message packet indicates that the second data packet is wrong, an error occurs in the data transmission process, that is, the data receiving end has not received the data packet it should receive. At this time, it can be determined directly from the saved data packet according to the feedback message packet.
  • At least one third data packet resending and storing the at least one third data packet, so that the data receiving end can receive the data packet it should receive, so as to ensure that when the data transmission error occurs, the data can also be correctly transmitted to the data At the receiving end, improve the speed and quality of data transmission.
  • the third data packet indicates a data packet that needs to be resent by the data sending end, and the number of the third data packet may be one or multiple.
  • the data sending end has sent data packets with sequence numbers 0-7, at this time, the first sequence number is 7, and the data receiving end only receives data packets with sequence numbers 0-4, the data receiving end should then A packet with sequence number 5 is received. If the data receiving end currently receives the data packet with the sequence number 6, it means that the data receiving end has not received the data packet it should receive, and will notify the data sending end of the currently received data packet (ie the second data packet) through a feedback message packet. error, then the data packets with sequence numbers 5, 6, and 7 (that is, the three third data packets) all need to be resent.
  • the data receiving end should receive data packets with sequence number 7 again. If the data receiving end currently receives the data packet with the sequence number 6, it means that the data receiving end has not received the data packet it should receive, and will notify the data sending end of the currently received data packet (ie the second data packet) through a feedback message packet. error, then the data packet with sequence number 7 (that is, a third data packet) needs to be resent.
  • Step 601 acquire the third serial number in the feedback message packet.
  • the format of the feedback message packet includes a sequence number field and a message type field, the sequence number field is used to encapsulate the sequence number of the feedback message packet, and the message type field is used to encapsulate the message type of the feedback message packet.
  • the message type refers to the judgment result of serial number verification, including correct and incorrect.
  • This message type can be stored in a coded manner, that is, code 0 (decimal representation) indicates correctness, code 1 (decimal representation) represents an error, and the encoding method of this embodiment does not constitute a limitation of this scheme, that is, code 1 (decimal representation) can also be used ) means correct, coded 0 (decimal representation) means error.
  • the sequence number of the feedback message packet represents the sequence number in the last correct data packet received by the data receiving end, that is, the third sequence number is the sequence number in the last correct data packet received by the data receiving end, with
  • the feedback message packet indicates that the second data packet is wrong, it means that the data packet corresponding to the sequence number after the third sequence number is received incorrectly, and the data packet corresponding to the sequence number after the third sequence number needs to be retransmitted to ensure that the data transmit correctly.
  • Step 602 Determine at least one third data packet from stored data packets according to the first sequence number and the third sequence number. Since the second sequence number of the second data packet is less than or equal to the first sequence number, there may be one or more sequence numbers after the third sequence number. Therefore, at least one third sequence number needs to be determined from the saved data packet.
  • a data packet that is, a data packet corresponding to a sequence number after the third sequence number. At least one determined third data packet is sent and saved, so that when an error occurs again in the data transmission process, the saved data packet can be used again to realize data retransmission, thereby improving the speed and quality of data transmission.
  • the data sending end has sent data packets with sequence numbers 0-7, then the first sequence number is 7, and the data receiving end only receives data packets with sequence numbers 0-4, the data receiving end should then receive the data packets with sequence number 5 data pack. If the data receiving end currently receives the data packet with sequence number 6, it means that the data receiving end has not received the data packet it should receive, then the third sequence number is 4 (the sequence number of the last correct packet received by the data receiving end is 4), by encapsulating the feedback message packet with serial number 4 to inform the data sending end that the currently received data packet (ie, the second data packet) is wrong, and the data packets with serial numbers 5, 6, and 7 (ie, 3 third data packets) Both need to be resent.
  • Step 603 sending the at least one third data packet and saving the at least one third data packet.
  • FIG. 7 Another aspect of the present disclosure provides a data transmission method, the process of which is shown in Figure 7, including:
  • Step 701 receiving a second data packet.
  • the second data packet is a data packet received by the data receiving end and for which the data receiving end is currently performing serial number verification.
  • Step 702 judging whether the second serial number in the second data packet is correct, and obtaining a judging result.
  • this step by judging whether the second serial number in the second data packet is correct, it can be judged whether there is an error in the data transmission process, and it can also be judged whether the received second data packet is a data packet that should be received.
  • Step 703 in response to the judgment result indicating that the second sequence number is correct, receive the second data packet; or in response to the judgment result indicating that the second sequence number is wrong, delete the second data packet . Whenever the data receiving end judges that the currently received data packet is wrong, it deletes the wrong data packet.
  • the second serial number in the second data packet can also be stripped to obtain the second data in the second data packet, and the second data can be sent to the corresponding subsystem.
  • the judgment result indicates that the second sequence number is wrong, an error occurs in the data transmission process, that is, the received second data packet is not the data packet that should be received. At this time, the second data packet can be directly deleted.
  • Step 704 Send a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct. That is, the feedback message is used to characterize the judgment result obtained in step 702 .
  • the feedback message packet includes the third sequence number and message type, the third sequence number is the sequence number in the last correct data packet received by the data receiving end, and the message type refers to Judgment result of serial number verification, including correct and incorrect.
  • the third sequence number in the feedback message packet may be the second sequence number in the second data packet.
  • the data receiving end should receive a data packet with a sequence number of 5, and the sequence number in the currently received second data packet is 5, which means that the second sequence number in the second data packet is correct, and it also indicates that the received The sequence number in the last correct data packet is 5, and the third sequence number in the feedback message packet is 5.
  • the third sequence number in the feedback message packet may be the sequence number of the last correctly received data packet before.
  • the data receiving end should receive a data packet with sequence number 5, and the sequence number in the second data packet currently received is 7, which means that the second sequence number in the second data packet is wrong, and at this time it means that the last received
  • the sequence number in a correct data packet is 4, and the third sequence number in the feedback message packet is 4.
  • the feedback message package may adopt the second preset format.
  • the second preset format may include a message type field and a sequence number field.
  • the sequence number field may represent a sequence number in the feedback message packet.
  • the sequence number field can be the same length as the sequence number field in the first preset format, for example, both can be 12 bits, that is, the range of the sequence number encapsulated in the feedback message packet is the same as 0-4095.
  • the message type field may indicate whether the currently received and judged second data packet is received correctly, that is, indicates whether the verification of the second sequence number in the second data packet is correct or not. The judgment result can be represented by different values.
  • the length of the message type field is 4 bits
  • 1000 binary representation
  • 1001 binary representation
  • other values can be used to implement subsequent function expansion.
  • this embodiment by judging whether the second sequence number in the received second data packet is correct, respectively processes the second data packet according to the judgment result, and sends a feedback message packet according to the judgment result, thereby utilizing A simple message handshake mechanism can determine whether there is an error in the data transmission process to determine whether the data needs to be retransmitted.
  • step 702 may include:
  • the count value is the sequence number of the correct data packet that should be received by the data receiving end.
  • the judgment result is obtained according to the comparison result.
  • the counter can be counted from 0, and the count value is increased by 1 every time a second data packet is received correctly, so that when judging whether the second sequence number in the second data packet is correct, it can be based on the current count value and the current The corresponding relationship of the second serial number being judged is obtained to obtain a judgment result.
  • the obtaining the judgment result according to the comparison result includes:
  • the judgment result indicates that the second serial number is correct; if the count value is different from the second serial number, the judgment result indicates that the The second serial number is wrong.
  • the counter when the second sequence number of the second data packet starts from 0, the counter also starts counting from 0, so that the count value can correspond to the second sequence number of the second data packet that should be received. For example, if the count value is 5 and the second sequence number of the received second data packet is also 5, it means that the second sequence number is correct and the received second data packet is a data packet that should be received. If the count value is 5 and the second sequence number of the received second data packet is 4 or 6, it means that the second sequence number is wrong, the received second data packet is not the data packet that should be received, and the second sequence number needs to be Number 5 and the second data packets after 5 are resent.
  • the system includes a data sending end 901 and a data receiving end 902, wherein:
  • the data sending end 901 is configured to receive first data; assign a first serial number to the first data, and the first serial number corresponds to the first data; based on the first data and the The first sequence number generates a first data packet; sends the first data packet and saves the first data packet;
  • the data receiving end 902 is configured to receive a second data packet, the second sequence number of the second data packet is less than or equal to the first sequence number; determine whether the second sequence number in the second data packet is If it is correct, the judgment result is obtained; in response to the judgment result indicating that the second serial number is correct, the second data packet is received; in response to the judgment result indicating that the second serial number is wrong, the second data packet is deleted and sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
  • the data sending end 901 has sent data packets with sequence numbers 0-6, then receives the first data, assigns the first sequence number 7 to the first data, generates the first data packet and sends it to the data receiving end 902 .
  • the data receiving end 902 has received the data packets with sequence numbers 0-4, the count value of the counter of the data receiving end 902 is 5, and then the second data packet is received.
  • the data receiving terminal 902 judges whether the second serial number in the second data packet is correct, and the description of different judgment results is as follows:
  • the data sending end 901 After receiving the feedback message packet, the data sending end 901 normally sends the newly received data, such as a data packet with a sequence number of 8, to the data receiving end 902;
  • the data sending end 901 After the data sending end 901 receives the feedback message packet, it takes out the data packet of the serial number 5-7 in the buffer area and sends it to the data receiving end 902 again, and writes the data packet of the serial number 5-7 into the buffer area again;
  • the data sending end 901 takes out the data packets with sequence numbers 5-7 from the buffer and sends them to the data receiving end 902 again, and writes the data packets with sequence numbers 5-7 into the buffer again.
  • the second sequence number in the second data packet is 10, which is greater than the maximum sequence number of the data packet sent by the data sending end 901, it means that the second data packet is an abnormal packet, and the data receiving end 902 deletes the second data Bag. Further, the data receiving end 902 may generate an abnormal response packet, and feed back to the data sending end 901 to inform the situation.
  • the embodiment of the present disclosure assigns a first serial number to the first data after receiving the first data.
  • the first serial number corresponds to the first data.
  • the serial number Based on the first data and the first The serial number generates the first data packet, sends the first data packet and saves the first data packet, so that there is no need to add an additional check code to the first data to be sent, and there is no need to perform complex repackaging, which simplifies the sending logic , reducing the use of invalid bandwidth and system delay.
  • the data receiving end judges whether the second sequence number in the received second data packet is correct, and sends a feedback message to the data sending end according to the judgment result, so that a simple handshake mechanism can be used to determine whether the data sending process is wrong, And when there is an error in the data sending process, the data sending end can directly retransmit the saved data packet, thus establishing an efficient data retransmission mechanism when the data transmission error occurs, ensuring the correct transmission of data, improving the speed and speed of data transmission and quality.
  • the integrated circuit includes:
  • a serial number allocation unit 1001 configured to receive first data; allocate a first serial number to the first data, the first serial number corresponds to the first data; based on the first data and the first A sequence number generates the first data packet;
  • a second multiplexer 1004 configured to write the first data packet into the buffer area 1003;
  • the control unit 1005 is configured to receive a feedback message packet, and perform a corresponding operation on the second data packet stored in the buffer 1003 according to the feedback message packet; the feedback message packet is used to indicate that the second data packet Is it correct? Wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
  • the embodiment of the present disclosure assigns the first serial number to the first data after the serial number allocation unit receives the first data, and the first serial number corresponds to the first data, based on the first data and The first serial number generates the first data packet, the first multiplexer sends the first data packet, the second multiplexer writes the first data packet into the cache area, and the cache area preserves the written data packet, thereby There is no need to add an extra check code to the first data to be sent, and there is no need to perform complex repackaging, which simplifies the sending logic, reduces invalid bandwidth occupation, and reduces system delay.
  • control unit receives a feedback message packet indicating whether the second data packet is correct, and performs corresponding operations on the data packet stored in the buffer area according to the feedback message packet, so that a simple handshake mechanism can be used to determine whether there is an error in the data transmission process, and When there is an error in the data transmission process, the data packets saved in the buffer area can be directly retransmitted, thereby establishing an efficient data retransmission mechanism when the data transmission error occurs, ensuring the correct transmission of data, and improving the speed and quality of data transmission.
  • control unit 1005 is further configured to delete the second data packet stored in the buffer 1003 in response to the feedback message packet indicating that the second data packet is correct; or, in response to the The feedback message packet indicates that the second data packet is wrong, at least one third data packet is determined from the data packets stored in the buffer area 1003 according to the feedback message packet, and the first multiplexer 1002 is controlled to resend the at least one third data packet, and control the second multiplexer 1004 to write the at least one third data packet into the buffer area 1003 .
  • control unit 1005 is further configured to obtain a third sequence number in the feedback message packet; according to the first sequence number and the third sequence number, the data stored in the cache area 1003 determining at least one third data packet in the packet;
  • the first multiplexer 1002 is further configured to send the at least one third data packet
  • the second multiplexer 1004 is further configured to write the at least one third data packet into the buffer 1003 .
  • the specific implementation method of the integrated circuit for data transmission in this embodiment includes the following steps:
  • the serial number allocation unit 1001 receives the first data, allocates the first serial number "0" to the first data, and generates the first data packet according to the first data and the first serial number "0".
  • the first data packet is gated by the first multiplexer 1002 and sent to the data receiving end.
  • the first data packet is simultaneously selected by the second multiplexer 1004, and then written into the buffer area 1003, and the buffer area 1003 stores the first data packet.
  • the data receiving end receives the second data packet, it detects the second serial number in the second data packet, judges whether the second serial number is correct, and obtains a judgment result.
  • the data receiving end strips the second serial number "0" in the received second data packet, sends the remaining second data after stripping the second serial number to the corresponding subsystem, and generates a feedback message whose message type is correct packet, to indicate that the second data packet is received correctly, and the feedback message packet is sent to the control unit 1005 .
  • control unit 1005 After receiving the feedback message packet whose message type is correct, the control unit 1005 deletes the stored second data packet from the cache area 1003 .
  • the data receiving end directly discards the second data packet, and generates a feedback message packet whose message type is wrong to indicate that the second data packet is received incorrectly, and sends the feedback message packet to the control unit 1005 .
  • control unit 1005 After the control unit 1005 receives the feedback message packet whose message type is an error, it stops the reception of upstream data through the second multiplexer 1004, and gates the buffer area 1003 through the first multiplexer 1002, and the buffer area In 1003, the data whose serial number is 0 is resent once, and at the same time, the data whose serial number is 0 is written into the buffer area 1003 again through the second multiplexer 1004, so as to prevent the data from being transmitted again during the data retransmission process. error.
  • the data receiver receives the retransmitted data again and verifies the serial number to determine whether the serial number is correct. If it is correct, it will enter the processing branch of the above step 6. If it is wrong, it will enter the processing branch of the above step 7.
  • Another embodiment of the present disclosure relates to a multi-chip structure, the multi-chip structure includes a plurality of chips, and the data transmission method between at least two of the chips adopts the data transmission method described in the above embodiment; or,
  • At least two of the chips are provided with the data transmission system described in the above embodiment, or provided with the integrated circuit for data transmission described in the above embodiment.
  • FIG. 11 Another embodiment of the present disclosure relates to an electronic device, as shown in FIG. 11 , comprising:
  • At least one processor 1101 and,
  • a memory 1102 connected in communication with the at least one processor 1101; wherein,
  • the memory 1102 stores instructions that can be executed by the at least one processor 1101, and the instructions are executed by the at least one processor 1101, so that the at least one processor 1101 can execute the method described in the above-mentioned embodiment .
  • the memory and the processor are connected by a bus
  • the bus may include any number of interconnected buses and bridges, and the bus connects one or more processors and various circuits of the memory together.
  • the bus may also connect together various other circuits such as peripherals, voltage regulators, and power management circuits, all of which are well known in the art and therefore will not be further described herein.
  • the bus interface provides an interface between the bus and the transceivers.
  • a transceiver may be a single element or multiple elements, such as multiple receivers and transmitters, providing means for communicating with various other devices over a transmission medium.
  • the data processed by the processor is transmitted on the wireless medium through the antenna, further, the antenna also receives the data and transmits the data to the processor.
  • the processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interface, voltage regulation, power management, and other control functions. Instead, memory can be used to store data that the processor uses when performing operations.
  • Another embodiment of the present disclosure relates to a computer-readable storage medium storing a computer program, and implementing the method described in the above-mentioned embodiment when the computer program is executed by a processor.
  • a device which may be a single-chip microcomputer, a chip, etc.
  • a processor processor
  • the aforementioned storage media include: U disk, mobile hard disk, ROM (Read-Only Memory, read-only memory), RAM (Random Access Memory, random access memory), magnetic disk or optical disc, etc.
  • ROM Read-Only Memory, read-only memory
  • RAM Random Access Memory, random access memory
  • magnetic disk or optical disc etc.

Abstract

The present disclosure relates to the technical field of data transmission, and discloses a data transmission method and system, an integrated circuit, a multi-chip structure, and an electronic device. The method comprises: receiving first data; assigning a first serial number to the first data, wherein the first serial number corresponds to the first data; generating a first data packet on the basis of the first data and the first serial number; sending the first data packet and saving the first data packet. According to the present disclosure, there is no need to add an additional check digit in first data to be sent, and likewise no need to carry out complex re-packaging, thereby simplifying sending logic, reducing occupation by invalid bandwidth, and shortening a system delay. In addition, when an error occurs during the data sending process, the saved first data packet may be directly retransmitted, thereby establishing an efficient data retransmission mechanism when data transmission errors occur, ensuring the correct transmission of data, and improving the data transmission speed and quality.

Description

数据传输方法、系统、集成电路、多芯片结构和电子设备Data transmission method, system, integrated circuit, multi-chip structure and electronic device
本申请要求了2021年8月27日提交的、申请号为202110998606.9、发明名称为“数据传输方法、系统、集成电路、多芯片结构和电子设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application with the application number 202110998606.9 and the title of the invention "data transmission method, system, integrated circuit, multi-chip structure and electronic equipment" filed on August 27, 2021, the entire content of which is passed References are incorporated in this application.
技术领域technical field
本申请涉及数据传输技术领域,特别涉及一种数据传输方法、系统、集成电路、多芯片结构和电子设备。The present application relates to the technical field of data transmission, in particular to a data transmission method, system, integrated circuit, multi-chip structure and electronic equipment.
背景技术Background technique
随着人工智能的高速发展,人类正进入全面智能时代。在此背景下,相应硬件设备需要处理的数据量越来越大,对硬件计算能力的需求也越来越强。芯片是硬件设备的核心部件。芯片的工艺和计算能力,决定了硬件产品的数据处理上限。而随着摩尔定律的发展,芯片设计和制造越来越接近摩尔定律的极限,但硬件数据处理需求还在不断攀升。因此,芯片的小形化、多die(裸片)封装化逐渐成为未来处理大数据的硬件设计趋势。With the rapid development of artificial intelligence, human beings are entering the era of comprehensive intelligence. In this context, the amount of data that the corresponding hardware devices need to process is increasing, and the demand for hardware computing power is also getting stronger. Chips are the core components of hardware devices. The technology and computing power of the chip determine the upper limit of data processing of the hardware product. With the development of Moore's Law, chip design and manufacturing are getting closer and closer to the limit of Moore's Law, but the demand for hardware data processing is still rising. Therefore, chip miniaturization and multi-die (bare chip) packaging have gradually become the hardware design trend for processing big data in the future.
现有的多die芯片结构如图1所示,其中,die0和die1为封装芯片CHIP内部的两个裸片,每个裸片内部主要包括SoC(System on Chip,片上系统)逻辑和d2d subsys(die to die subsystem,裸片到裸片子系统)逻辑,两个裸片之间通过d2d subsys进行数据传输通信。d2d subsys中通常包含控制器数字电路逻辑(d2d control ler)和模拟物理逻辑(d2d phy)。而模拟物理逻辑在高速数据传输中会有BER(Bit error rate,误码率)现象存在,即不能保证传输的数据100%正确,接收端接收到的数据将有小概率性出错,因此,在数据传输出错时,发送端如何对数据进行重传,从而保证数据不丢失,成为die间可靠性通信的关键。The existing multi-die chip structure is shown in Figure 1, wherein die0 and die1 are two bare chips inside the packaged chip CHIP, each of which mainly includes SoC (System on Chip, system on chip) logic and d2d subsys ( die to die subsystem, die to die subsystem) logic, data transmission and communication between two die through d2d subsys. d2d subsys usually contains controller digital circuit logic (d2d controller) and analog physical logic (d2d phy). The analog physical logic will have BER (Bit error rate) phenomenon in high-speed data transmission, that is, it cannot guarantee that the transmitted data is 100% correct, and the data received by the receiving end will have a small probability of error. Therefore, in When a data transmission error occurs, how the sender retransmits the data to ensure that the data is not lost becomes the key to reliable communication between dies.
如图2所示,现有的一种技术方案采用了基于发送端增加校验码的重传机制,该技术方案通过利用预设的位宽对待发送的数据包进行重新组包并加入校验码,对于正确的响应信息立即释放系统资源,对于错误的响应消息进行数据包自动重传工作。然而,上述技术方案存在以下缺点:As shown in Figure 2, an existing technical solution adopts a retransmission mechanism based on adding a check code at the sending end. code, immediately release system resources for correct response information, and automatically retransmit data packets for incorrect response messages. Yet there is following shortcoming in above-mentioned technical scheme:
1.需要对待发送的数据包重新组包,组包过程增加了逻辑复杂度、传输带宽占用 以及系统延时。1. It is necessary to repackage the data packets to be sent. The packetization process increases the logic complexity, transmission bandwidth occupation and system delay.
2.对重新组包的数据包需要额外增加校验码,从而增加了校验计算过程,为芯片物理实现增加了难度,同时,校验码也会占用数据的传输带宽,并增加数据传输延时。2. Additional check codes need to be added to the repackaged data packets, which increases the check calculation process and increases the difficulty of chip physical implementation. At the same time, the check code will also occupy the data transmission bandwidth and increase the data transmission delay. hour.
发明内容Contents of the invention
本公开旨在至少解决现有技术中存在的问题之一,提供一种数据传输方法、系统、多芯片结构和电子设备。The present disclosure aims to solve at least one of the problems in the prior art, and provides a data transmission method, system, multi-chip structure and electronic equipment.
本公开的一个方面,提供了一种数据传输方法,所述方法包括:One aspect of the present disclosure provides a data transmission method, the method comprising:
接收第一数据;receiving first data;
为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;assigning a first serial number to the first data, the first serial number corresponding to the first data;
基于所述第一数据和所述第一序列号生成第一数据包;generating a first data packet based on the first data and the first sequence number;
发送所述第一数据包并保存所述第一数据包。sending the first data packet and saving the first data packet.
可选的,所述方法还包括:Optionally, the method also includes:
接收反馈消息包,所述反馈消息包用于指示第二数据包是否正确;其中,所述第二数据包的第二序列号小于或等于所述第一序列号;Receiving a feedback message packet, where the feedback message packet is used to indicate whether the second data packet is correct; wherein, the second sequence number of the second data packet is less than or equal to the first sequence number;
根据所述反馈消息包,对保存的所述第二数据包执行相应的操作。Perform a corresponding operation on the stored second data packet according to the feedback message packet.
可选的,所述根据所述反馈消息包,对保存的所述第二数据包执行相应的操作,包括:Optionally, performing a corresponding operation on the saved second data packet according to the feedback message packet includes:
响应于所述反馈消息包表示所述第二数据包正确,删除保存的所述第二数据包;或者,In response to the feedback message packet indicating that the second data packet is correct, delete the saved second data packet; or,
响应于所述反馈消息包表示所述第二数据包错误,根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包。In response to the feedback message packet indicating that the second data packet is wrong, at least one third data packet is determined from the saved data packets according to the feedback message packet, and the at least one third data packet is resent and saved.
可选的,所述根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包,包括:Optionally, the determining at least one third data packet from the saved data packets according to the feedback message packet, and resending and saving the at least one third data packet includes:
获取所述反馈消息包中的第三序列号;Obtain the third sequence number in the feedback message packet;
根据所述第一序列号和所述第三序列号,从保存的数据包中确定至少一个第三数据包;determining at least one third data packet from the stored data packets according to the first sequence number and the third sequence number;
发送所述至少一个第三数据包并保存所述至少一个第三数据包。Sending the at least one third data packet and storing the at least one third data packet.
本公开的另一个方面,提供了一种数据传输方法,所述方法包括:Another aspect of the present disclosure provides a data transmission method, the method comprising:
接收第二数据包;receiving a second data packet;
判断所述第二数据包中的第二序列号是否正确,得到判断结果;judging whether the second serial number in the second data packet is correct, and obtaining a judging result;
响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包;或者,响应于所述判断结果表示所述第二序列号错误,删除所述第二数据包;Responding to the judgment result indicating that the second sequence number is correct, receiving the second data packet; or in response to the judgment result indicating that the second sequence number is wrong, deleting the second data packet;
根据所述判断结果发送反馈消息包,所述反馈消息包用于指示所述第二数据包是否正确。Sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
可选的,所述判断所述第二数据包中的第二序列号是否正确,得到判断结果,包括:Optionally, the judging whether the second sequence number in the second data packet is correct, and obtaining the judging result include:
对接收到的所述第二数据包进行计数,得到计数值;Counting the received second data packets to obtain a count value;
将所述计数值与所述第二序列号进行比较,得到比较结果;Comparing the count value with the second serial number to obtain a comparison result;
根据所述比较结果得到所述判断结果。The judgment result is obtained according to the comparison result.
可选的,所述根据所述比较结果得到所述判断结果,包括:Optionally, the obtaining the judgment result according to the comparison result includes:
若所述计数值与所述第二序列号相同,则所述判断结果表示所述第二序列号正确;If the count value is the same as the second serial number, the judgment result indicates that the second serial number is correct;
若所述计数值与所述第二序列号不同,则所述判断结果表示所述第二序列号错误。If the count value is different from the second serial number, the judgment result indicates that the second serial number is wrong.
本公开的另一个方面,提供了一种数据传输系统,所述系统包括数据发送端和数据接收端,其中:Another aspect of the present disclosure provides a data transmission system, the system includes a data sending end and a data receiving end, wherein:
所述数据发送端,用于接收第一数据;为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;基于所述第一数据和所述第一序列号生成第一数据包;发送所述第一数据包并保存所述第一数据包;The data sending end is used to receive first data; assign a first serial number to the first data, and the first serial number corresponds to the first data; based on the first data and the first data A sequence number generates a first data packet; sends the first data packet and saves the first data packet;
所述数据接收端,用于接收第二数据包,所述第二数据包的第二序列号小于或等于所述第一序列号;判断所述第二数据包中的第二序列号是否正确,得到判断结果;响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包;响应于所述判断结果表示所述第二序列号错误,删除所述第二数据包;以及,根据所述判断结果发送反馈消息包,所述反馈消息包用于指示所述第二数据包是否正确。The data receiving end is used to receive a second data packet, the second sequence number of the second data packet is less than or equal to the first sequence number; determine whether the second sequence number in the second data packet is correct , to obtain a judgment result; in response to the judgment result indicating that the second sequence number is correct, receiving the second data packet; in response to the judgment result indicating that the second sequence number is wrong, deleting the second data packet and, sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
本公开的另一个方面,提供了一种用于数据传输的集成电路,所述集成电路包括:Another aspect of the present disclosure provides an integrated circuit for data transmission, the integrated circuit includes:
序列号分配单元,用于接收第一数据;为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;基于所述第一数据和所述第一序列号生成第一数据包;A serial number allocation unit, configured to receive first data; allocate a first serial number to the first data, the first serial number corresponds to the first data; based on the first data and the first The sequence number generates the first data packet;
第一多路复用器,用于发送所述第一数据包;a first multiplexer, configured to send the first data packet;
缓存区,用于保存数据包;A buffer area for storing data packets;
第二多路复用器,用于将所述第一数据包写入所述缓存区;a second multiplexer, configured to write the first data packet into the buffer;
控制单元,用于接收反馈消息包,根据所述反馈消息包,对所述缓存区中保存的第二数据包执行相应的操作;所述反馈消息包用于指示所述第二数据包是否正确;其中,所述第二数据包的第二序列号小于或等于所述第一序列号。A control unit, configured to receive a feedback message packet, and perform a corresponding operation on the second data packet stored in the buffer according to the feedback message packet; the feedback message packet is used to indicate whether the second data packet is correct ; Wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
可选的,所述控制单元,还用于响应于所述反馈消息包表示所述第二数据包正确,删除所述缓存区保存的所述第二数据包;或者,响应于所述反馈消息包表示所述第二数据包错误,根据所述反馈消息包从所述缓存区保存的数据包中确定至少一个第三数据包,控制所述第一多路复用器重新发送所述至少一个第三数据包,并控制所述第二多路复用器将所述至少一个第三数据包写入所述缓存区。Optionally, the control unit is further configured to delete the second data packet stored in the buffer in response to the feedback message packet indicating that the second data packet is correct; or, in response to the feedback message The packet indicates that the second data packet is wrong, at least one third data packet is determined from the data packets stored in the buffer according to the feedback message packet, and the first multiplexer is controlled to resend the at least one third data packet third data packet, and control the second multiplexer to write the at least one third data packet into the buffer area.
可选的,所述控制单元,还用于获取所述反馈消息包中的第三序列号;根据所述第一序列号和所述第三序列号,从所述缓存区保存的数据包中确定至少一个第三数据包;Optionally, the control unit is further configured to obtain a third sequence number in the feedback message packet; according to the first sequence number and the third sequence number, from the data packet stored in the buffer determining at least one third data packet;
所述第一多路复用器,还用于发送所述至少一个第三数据包;The first multiplexer is further configured to send the at least one third data packet;
所述第二多路复用器,还用于将所述至少一个第三数据包写入所述缓存区。The second multiplexer is further configured to write the at least one third data packet into the buffer area.
本公开的另一个方面,提供了一种多芯片结构,所述多芯片结构包括多个芯片,至少两个所述芯片之间的数据传输采用前文记载的所述的数据传输方法;或者,Another aspect of the present disclosure provides a multi-chip structure, the multi-chip structure includes a plurality of chips, the data transmission between at least two of the chips adopts the data transmission method described above; or,
至少两个所述芯片上设置有前文记载的所述的数据传输系统,或者设置有前文记载的所述的用于数据传输的集成电路。At least two of the chips are provided with the aforementioned data transmission system, or the aforementioned integrated circuits for data transmission.
本公开的另一个方面,提供了一种电子设备,包括:Another aspect of the present disclosure provides an electronic device, including:
至少一个处理器;以及,at least one processor; and,
与所述至少一个处理器通信连接的存储器;其中,a memory communicatively coupled to the at least one processor; wherein,
所述存储器存储有可被所述至少一个处理器执行的指令,所述指令被所述至少一个处理器执行,以使所述至少一个处理器能够执行前文记载的所述的方法。The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can execute the method described above.
本公开的另一个方面,提供了一种计算机可读存储介质,其上存储有计算机程序,所述计算机程序被处理器执行时实现前文记载的所述的方法。Another aspect of the present disclosure provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the method described above is implemented.
本公开的技术方案相对于现有技术而言,在接收到第一数据后,为第一数据分配第一序列号,第一序列号与第一数据相对应,基于第一数据和第一序列号生成第一数据包,发送第一数据包并保存第一数据包,从而无需在待发送的第一数据中增加额外的校验码,也无需进行复杂的重新组包,简化了发送逻辑,减少了无效带宽的占用,减少了系统延时。另外,通过在发送第一数据包的同时保存第一数据包,还可以在数据发送过程出错时,直接将保存的第一数据包进行重传,从而建立了数据传输出错时 的高效数据重传机制,保证了数据的正确传输,提高了数据传输的速度和质量。Compared with the prior art, the technical solution of the present disclosure assigns a first serial number to the first data after receiving the first data, and the first serial number corresponds to the first data, based on the first data and the first serial number No. generates the first data packet, sends the first data packet and saves the first data packet, so that there is no need to add an additional check code to the first data to be sent, and there is no need to perform complicated repackaging, which simplifies the sending logic. It reduces the occupation of invalid bandwidth and reduces the system delay. In addition, by saving the first data packet while sending the first data packet, it is also possible to directly retransmit the saved first data packet when an error occurs in the data transmission process, thereby establishing efficient data retransmission when the data transmission error occurs The mechanism ensures the correct transmission of data and improves the speed and quality of data transmission.
附图说明Description of drawings
通过以下参照附图对本发明实施例的描述,本发明的上述以及其它目的、特征和优点将更为清楚,在附图中:Through the following description of the embodiments of the present invention with reference to the accompanying drawings, the above and other objects, features and advantages of the present invention will be more clear, in the accompanying drawings:
图1是现有技术中一种多die芯片的结构示意图;Fig. 1 is a structural schematic diagram of a multi-die chip in the prior art;
图2是现有技术中一种通用接口芯片实现高速数据传输的方法的流程图;Fig. 2 is the flow chart of the method for realizing high-speed data transmission of a kind of universal interface chip in the prior art;
图3是本公开一实施方式提供的一种数据传输方法的流程图;Fig. 3 is a flowchart of a data transmission method provided by an embodiment of the present disclosure;
图4是本公开另一实施方式提供的第一预设格式的结构示意图;Fig. 4 is a schematic structural diagram of a first preset format provided by another embodiment of the present disclosure;
图5是本公开另一实施方式提供的一种数据传输方法的流程图;FIG. 5 is a flowchart of a data transmission method provided by another embodiment of the present disclosure;
图6是本公开另一实施方式提供的一种数据传输方法的流程图;FIG. 6 is a flowchart of a data transmission method provided by another embodiment of the present disclosure;
图7是本公开另一实施方式提供的一种数据传输方法的流程图;FIG. 7 is a flowchart of a data transmission method provided by another embodiment of the present disclosure;
图8是本公开另一实施方式提供的第二预设格式的结构示意图;Fig. 8 is a schematic structural diagram of a second preset format provided by another embodiment of the present disclosure;
图9是本公开另一实施方式提供的一种数据传输系统的结构示意图;FIG. 9 is a schematic structural diagram of a data transmission system provided by another embodiment of the present disclosure;
图10是本公开另一实施方式提供的一种用于数据传输的集成电路的结构示意图;FIG. 10 is a schematic structural diagram of an integrated circuit for data transmission provided by another embodiment of the present disclosure;
图11是本公开另一实施方式提供的电子设备的结构示意图。Fig. 11 is a schematic structural diagram of an electronic device provided by another embodiment of the present disclosure.
具体实施方式Detailed ways
以下基于实施例对本发明进行描述,但是本发明并不仅仅限于这些实施例。在下文对本发明的细节描述中,详尽描述了一些特定的细节部分。对本领域技术人员来说没有这些细节部分的描述也可以完全理解本发明。为了避免混淆本发明的实质,公知的方法、过程、流程、元件和电路并没有详细叙述。The present invention is described below based on examples, but the present invention is not limited to these examples. In the following detailed description of the invention, some specific details are set forth in detail. The present invention can be fully understood by those skilled in the art without the description of these detailed parts. In order not to obscure the essence of the present invention, well-known methods, procedures, procedures, components and circuits have not been described in detail.
此外,本领域普通技术人员应当理解,在此提供的附图都是为了说明的目的,并且附图不一定是按比例绘制的。Additionally, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
除非上下文明确要求,否则在说明书的“包括”、“包含”等类似词语应当解释为包含的含义而不是排他或穷举的含义;也就是说,是“包括但不限于”的含义。Unless the context clearly requires, the words "including", "including" and similar words in the description should be interpreted as inclusive rather than exclusive or exhaustive; that is, "including but not limited to".
在本发明的描述中,需要理解的是,术语“第一”、“第二”等仅用于描述目的,而不能理解为指示或暗示相对重要性。此外,在本发明的描述中,除非另有说明,“多个”的含义是两个或两个以上。In the description of the present invention, it should be understood that the terms "first", "second" and so on are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.
本公开的一个实施方式涉及一种数据传输方法,其流程如图3所示,包括:An embodiment of the present disclosure relates to a data transmission method, the process of which is shown in Figure 3, including:
步骤301,接收第一数据。第一数据可以是待发送的原始数据。 Step 301, receiving first data. The first data may be raw data to be sent.
步骤302,为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应。 Step 302, assigning a first serial number to the first data, where the first serial number corresponds to the first data.
在本实施方式中,在为第一数据分配第一序列号时,不同的第一数据所分配到的第一序列号也不同,从而使第一序列号与第一数据能够相对应,第一序列号可以作为第一数据的唯一标识,通过区分不同的第一序列号即可实现对不同第一数据的区分。可选的,根据发送顺序为第一数据分配第一序列号。例如,已依次发送序列号0、1、2的数据包,当前接收到第一数据后,为该第一数据分配的第一序列号为3。In this embodiment, when the first serial number is assigned to the first data, the first serial numbers assigned to different first data are also different, so that the first serial number can correspond to the first data, and the first The serial number can be used as the unique identifier of the first data, and different first data can be distinguished by distinguishing different first serial numbers. Optionally, assign the first sequence number to the first data according to the sending order. For example, data packets with sequence numbers 0, 1, and 2 have been sent in sequence, and after the first data is currently received, the first sequence number assigned to the first data is 3.
步骤303,基于所述第一数据和所述第一序列号生成第一数据包。 Step 303, generating a first data packet based on the first data and the first sequence number.
在本步骤中,可以在第一数据的基础上直接添加与该第一数据相对应的第一序列号,从而生成第一数据包。第一数据包可以采用第一预设格式。例如,如图4所示,第一预设格式中可以包括数据字段和序列号字段。数据字段用于封装第一数据,其可以封装的数据长度范围为0~1024DW(Double Word,双字,表示4个字节)。序列号字段用于封装数据的序列号,其可以封装的数据长度为12bit(比特),该12bit可以存放的序列号最大为4095(十进制表示),则12bit的序列号字段可以封装的第一序列号为0~4095。In this step, the first serial number corresponding to the first data may be directly added on the basis of the first data, thereby generating the first data packet. The first data packet may adopt a first preset format. For example, as shown in FIG. 4, the first preset format may include a data field and a serial number field. The data field is used to encapsulate the first data, and the length of the data that can be encapsulated ranges from 0 to 1024DW (Double Word, which means 4 bytes). The serial number field is used to encapsulate the serial number of the data. The length of the data that can be encapsulated is 12bit (bits). The maximum serial number that can be stored in this 12bit is 4095 (decimal notation), so the 12bit serial number field can encapsulate the first sequence The number ranges from 0 to 4095.
在本实施方式中,通过在第一数据的基础上直接添加与该第一数据相对应的第一序列号,生成第一数据包,使得在生成第一数据包时无需对第一数据进行重新打包,降低了发送逻辑的复杂度,减少了无效数据的带宽占用,减少了系统延时。In this embodiment, the first data packet is generated by directly adding the first serial number corresponding to the first data on the basis of the first data, so that the first data does not need to be reconfigured when generating the first data packet. Packing reduces the complexity of sending logic, reduces the bandwidth occupation of invalid data, and reduces system delay.
需要说明的是,本实施方式不对第一预设格式中各字段的数据长度进行限定,本领域技术人员可以根据实际需求进行设置。It should be noted that, this embodiment does not limit the data length of each field in the first preset format, and those skilled in the art can set it according to actual requirements.
步骤304,发送所述第一数据包并保存所述第一数据包。在本实施例中,第一数据包可表示数据发送端当前发出的数据包,或者以当前时间点为准最后发出的数据包。例如,数据发送端已发出序列号0、1、2的数据包后,又接收到一个数据(即第一数据),为其分配第一序列号3,然后生成第一数据包并发出。在实际应用中,数据发送端可能会接收多个数据,分别依次对接收到的多个数据分配序列号,并生成对应的数据包发送,最后发出的数据包为该第一数据包。 Step 304, sending the first data packet and saving the first data packet. In this embodiment, the first data packet may represent the data packet currently sent by the data sender, or the last data packet sent based on the current time point. For example, after sending data packets with sequence numbers 0, 1, and 2, the data sender receives another piece of data (namely the first data), assigns it a first sequence number 3, and then generates the first data packet and sends it out. In practical applications, the data sending end may receive a plurality of data, assign sequence numbers to the received data in turn, and generate corresponding data packets to send, and the last sent data packet is the first data packet.
在本步骤中,保存的第一数据包可以存放在缓存区,以对发送的第一数据包进行备份。In this step, the saved first data packet may be stored in a buffer to back up the sent first data packet.
本实施方式的技术方案相对于现有技术而言,在接收到第一数据后,为第一数据 分配第一序列号,第一序列号与第一数据相对应,基于第一数据和第一序列号生成第一数据包,发送第一数据包并保存第一数据包,从而无需在待发送的第一数据中增加额外的校验码,也无需进行复杂的重新组包,简化了发送逻辑,减少了无效带宽的占用,减少了系统延时。另外,通过在发送第一数据包的同时保存第一数据包,还可以在数据发送过程出错时,直接将保存的第一数据包进行重传,从而建立了数据传输出错时的高效数据重传机制,保证了数据的正确传输,提高了数据传输的速度和质量。Compared with the prior art, the technical solution of this embodiment assigns a first serial number to the first data after receiving the first data, and the first serial number corresponds to the first data, based on the first data and the first The serial number generates the first data packet, sends the first data packet and saves the first data packet, so that there is no need to add an additional check code to the first data to be sent, and there is no need to perform complex repackaging, which simplifies the sending logic , reducing the use of invalid bandwidth and system delay. In addition, by saving the first data packet while sending the first data packet, it is also possible to directly retransmit the saved first data packet when an error occurs in the data transmission process, thereby establishing efficient data retransmission when the data transmission error occurs The mechanism ensures the correct transmission of data and improves the speed and quality of data transmission.
可选的,如图5所示,所述方法还包括:Optionally, as shown in Figure 5, the method further includes:
步骤501,接收反馈消息包,所述反馈消息包用于指示第二数据包是否正确;其中,所述第二数据包的第二序列号小于或等于所述第一序列号。Step 501: Receive a feedback message packet, where the feedback message packet is used to indicate whether the second data packet is correct; wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
在本实施方式中,第二数据包为数据接收端接收到的,以及数据接收端当前对其进行序列号验证的数据包。以及,通过反馈消息包指示第二数据包是否正确,可以利用反馈消息包表示数据传输过程是否出错,从而进一步表示数据接收端是否接收到了其应当接收的数据包。具体的,数据发送端在分配序列号时是根据发送顺序分配的,正常传输下,数据接收端会根据序列号依次接收。例如,数据发送端依次发送序列号0、1、2的数据包,正常传输的情况下,数据接收端会依次接收到序列号0、1、2的数据包。示例性的,假设数据发送端已发送序列号0-7的数据包,但由于数据延迟的问题,数据接收端只接收到序列号0-4的数据包,即序列号5、6、7的数据包都还没接收到,因此第二数据包的第二序列号小于或等于所述第一序列号。正常情况下,数据接收端应当接收序列号5的数据包,则如果当前接收到的数据包(即第二数据包)的序列号为5,则通过对该当前接收到的数据包进行序列号验证,确定该当前接收到的数据包正确。但由于传输过程可能出错,数据接收端当前接收到的数据包的序列号为3(或者6,即不为5),则通过对该当前接收到的数据包进行序列号验证,确定该当前接收到的数据包错误。In this implementation manner, the second data packet is a data packet received by the data receiving end and for which the data receiving end is currently performing serial number verification. And, by using the feedback message packet to indicate whether the second data packet is correct, the feedback message packet may be used to indicate whether there is an error in the data transmission process, thereby further indicating whether the data receiving end has received the data packet it should receive. Specifically, when the data sending end allocates the serial number according to the sending order, under normal transmission, the data receiving end will receive sequentially according to the serial number. For example, the data sending end sends data packets with serial numbers 0, 1, and 2 in sequence, and in the case of normal transmission, the data receiving end will receive data packets with serial numbers 0, 1, and 2 in sequence. Exemplarily, assume that the data sending end has sent data packets with sequence numbers 0-7, but due to data delay, the data receiving end only receives data packets with sequence numbers 0-4, that is, data packets with sequence numbers 5, 6, and 7 No data packets have been received yet, so the second sequence number of the second data packet is less than or equal to the first sequence number. Under normal circumstances, the data receiving end should receive a data packet with a sequence number of 5. If the sequence number of the currently received data packet (ie, the second data packet) is 5, then the sequence number of the currently received data packet will be Verify that the current received packet is correct. However, due to the possibility of errors in the transmission process, the serial number of the data packet currently received by the data receiving end is 3 (or 6, that is, not 5), then by verifying the serial number of the currently received data packet, it is determined that the currently received Incoming packet error.
步骤502,根据所述反馈消息包,对保存的所述第二数据包执行相应的操作。Step 502: Perform corresponding operations on the stored second data packet according to the feedback message packet.
具体的,由于步骤304在发送第一数据包的同时对第一数据包进行了保存,因此,数据接收端接收到的每个数据包,在数据发送端侧均对应有保存的数据包,从而在数据传输过程未出错和出错的情况下,分别对保存的数据包执行相应的操作。Specifically, since the first data packet is saved while sending the first data packet in step 304, each data packet received by the data receiving end corresponds to a saved data packet on the data sending end side, thus In the case of no error or error in the data transmission process, corresponding operations are respectively performed on the saved data packets.
本实施方式相对于现有技术而言,利用简单的消息握手机制,通过用于指示第二数据包是否正确的反馈消息包,即可判断出数据传输过程是否出错,从而在数据传输过程未出错和出错的情况下,分别对保存的之前发送的数据包执行相应的操作。以及, 该反馈消息包占用的传输带宽少,可使得传输效率提高。Compared with the prior art, this embodiment uses a simple message handshake mechanism to determine whether there is an error in the data transmission process through the feedback message packet used to indicate whether the second data packet is correct, so that there is no error in the data transmission process. And in the case of an error, perform corresponding operations on the saved previously sent data packets. And, the feedback message packet occupies less transmission bandwidth, which can improve transmission efficiency.
可选的,步骤502包括:Optionally, step 502 includes:
响应于所述反馈消息包表示所述第二数据包正确,删除保存的所述第二数据包;或者,响应于所述反馈消息包表示所述第二数据包错误,根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包。In response to the feedback message packet indicating that the second data packet is correct, delete the stored second data packet; or in response to the feedback message packet indicating that the second data packet is incorrect, according to the feedback message packet Determine at least one third data packet from the saved data packets, resend and save the at least one third data packet.
具体的,在反馈消息包表示第二数据包正确时,数据传输过程未出错,即数据接收端接收到了其应当接收的数据包,此时,保存的第二数据包失去了存在的意义,可以直接将保存的第二数据包删除,以释放存储空间。Specifically, when the feedback message packet indicates that the second data packet is correct, there is no error in the data transmission process, that is, the data receiving end has received the data packet it should receive. At this time, the saved second data packet loses its meaning of existence and can be Directly delete the saved second data package to release storage space.
在反馈消息包表示第二数据包错误时,数据传输过程出现错误,即数据接收端未接收到其应当接收的数据包,此时,可以直接根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包,以使数据接收端能够接收到其应当接收的数据包,从而保证在数据传输出错时,数据也能够正确传输到数据接收端,提高数据传输的速度和质量。其中,该第三数据包表示需要数据发送端重新发送的数据包,其数量可以是一个,也可以是多个。示例性的,假设数据发送端已发送序列号0-7的数据包,此时,第一序列号为7,以及数据接收端只接收到序列号0-4的数据包,数据接收端应当再接收序列号5的数据包。假如数据接收端当前接收到序列号6的数据包,即表明数据接收端未接收到其应当接收的数据包,会通过反馈消息包告知数据发送端当前接收的数据包(即第二数据包)错误,则序列号5、6、7的数据包(即3个第三数据包)都需要重新发送。另外,假设数据发送端已发送序列号0-7的数据包,此时数据接收端只接收到序列号0-6的数据包,数据接收端应当再接收序列号7的数据包。假如数据接收端当前接收到序列号6的数据包,即表明数据接收端未接收到其应当接收的数据包,会通过反馈消息包告知数据发送端当前接收的数据包(即第二数据包)错误,则序列号7的数据包(即1个第三数据包)需要重新发送。When the feedback message packet indicates that the second data packet is wrong, an error occurs in the data transmission process, that is, the data receiving end has not received the data packet it should receive. At this time, it can be determined directly from the saved data packet according to the feedback message packet. At least one third data packet, resending and storing the at least one third data packet, so that the data receiving end can receive the data packet it should receive, so as to ensure that when the data transmission error occurs, the data can also be correctly transmitted to the data At the receiving end, improve the speed and quality of data transmission. Wherein, the third data packet indicates a data packet that needs to be resent by the data sending end, and the number of the third data packet may be one or multiple. Exemplarily, assuming that the data sending end has sent data packets with sequence numbers 0-7, at this time, the first sequence number is 7, and the data receiving end only receives data packets with sequence numbers 0-4, the data receiving end should then A packet with sequence number 5 is received. If the data receiving end currently receives the data packet with the sequence number 6, it means that the data receiving end has not received the data packet it should receive, and will notify the data sending end of the currently received data packet (ie the second data packet) through a feedback message packet. error, then the data packets with sequence numbers 5, 6, and 7 (that is, the three third data packets) all need to be resent. In addition, assuming that the data sending end has sent data packets with sequence numbers 0-7, and the data receiving end only receives data packets with sequence numbers 0-6 at this time, the data receiving end should receive data packets with sequence number 7 again. If the data receiving end currently receives the data packet with the sequence number 6, it means that the data receiving end has not received the data packet it should receive, and will notify the data sending end of the currently received data packet (ie the second data packet) through a feedback message packet. error, then the data packet with sequence number 7 (that is, a third data packet) needs to be resent.
可选的,根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包,如图6所示,包括:Optionally, determine at least one third data packet from the saved data packets according to the feedback message packet, and resend and save the at least one third data packet, as shown in FIG. 6 , including:
步骤601,获取所述反馈消息包中的第三序列号。其中,所述反馈消息包的格式包括序列号字段和消息类型字段,所述序列号字段用于封装反馈消息包的序列号,所述消息类型字段用于封装反馈消息包的消息类型。该消息类型是指序列号验证的判断结果,包括正确和错误。该消息类型可通过编码的方式存储,即编码0(十进制表示) 表示正确,编码1(十进制表示)表示错误,本实施例的编码方式不构成本方案的限定,即也可用编码1(十进制表示)表示正确,编码0(十进制表示)表示错误。反馈消息包的序列号表示数据接收端接收到的最后一个正确的数据包中的序列号,即所述第三序列号为数据接收端接收到的最后一个正确的数据包中的序列号,以在反馈消息包表示第二数据包错误时,表示该第三序列号之后的序列号对应的数据包接收错误,该第三序列号之后的序列号对应的数据包需要进行重传,以保证数据正确传输。 Step 601, acquire the third serial number in the feedback message packet. Wherein, the format of the feedback message packet includes a sequence number field and a message type field, the sequence number field is used to encapsulate the sequence number of the feedback message packet, and the message type field is used to encapsulate the message type of the feedback message packet. The message type refers to the judgment result of serial number verification, including correct and incorrect. This message type can be stored in a coded manner, that is, code 0 (decimal representation) indicates correctness, code 1 (decimal representation) represents an error, and the encoding method of this embodiment does not constitute a limitation of this scheme, that is, code 1 (decimal representation) can also be used ) means correct, coded 0 (decimal representation) means error. The sequence number of the feedback message packet represents the sequence number in the last correct data packet received by the data receiving end, that is, the third sequence number is the sequence number in the last correct data packet received by the data receiving end, with When the feedback message packet indicates that the second data packet is wrong, it means that the data packet corresponding to the sequence number after the third sequence number is received incorrectly, and the data packet corresponding to the sequence number after the third sequence number needs to be retransmitted to ensure that the data transmit correctly.
步骤602,根据所述第一序列号和所述第三序列号,从保存的数据包中确定至少一个第三数据包。由于第二数据包的第二序列号小于或等于所述第一序列号,则该第三序列号之后可能有一个或者多个序列号,因此,需要从保存的数据包中确定至少一个第三数据包,即第三序列号之后的序列号对应的数据包。发送并保存确定出的至少一个第三数据包,从而在数据传输过程再次出现错误时,能够再次利用保存的数据包实现数据重传,提高数据传输的速度和质量。例如,数据发送端已发送序列号0-7的数据包,则第一序列号为7,以及数据接收端只接收到序列号0-4的数据包,数据接收端应当再接收序列号5的数据包。假如数据接收端当前接收到序列号6的数据包,即表明数据接收端未接收到其应当接收的数据包,则第三序列号为4(数据接收端接收的最后一个正确包的序列号为4),通过封装有序列号4的反馈消息包告知数据发送端当前接收的数据包(即第二数据包)错误,序列号5、6、7的数据包(即3个第三数据包)都需要重新发送。Step 602: Determine at least one third data packet from stored data packets according to the first sequence number and the third sequence number. Since the second sequence number of the second data packet is less than or equal to the first sequence number, there may be one or more sequence numbers after the third sequence number. Therefore, at least one third sequence number needs to be determined from the saved data packet. A data packet, that is, a data packet corresponding to a sequence number after the third sequence number. At least one determined third data packet is sent and saved, so that when an error occurs again in the data transmission process, the saved data packet can be used again to realize data retransmission, thereby improving the speed and quality of data transmission. For example, if the data sending end has sent data packets with sequence numbers 0-7, then the first sequence number is 7, and the data receiving end only receives data packets with sequence numbers 0-4, the data receiving end should then receive the data packets with sequence number 5 data pack. If the data receiving end currently receives the data packet with sequence number 6, it means that the data receiving end has not received the data packet it should receive, then the third sequence number is 4 (the sequence number of the last correct packet received by the data receiving end is 4), by encapsulating the feedback message packet with serial number 4 to inform the data sending end that the currently received data packet (ie, the second data packet) is wrong, and the data packets with serial numbers 5, 6, and 7 (ie, 3 third data packets) Both need to be resent.
步骤603,发送所述至少一个第三数据包并保存所述至少一个第三数据包。 Step 603, sending the at least one third data packet and saving the at least one third data packet.
本公开的另一个方面,提供一种数据传输方法,其流程如图7所示,包括:Another aspect of the present disclosure provides a data transmission method, the process of which is shown in Figure 7, including:
步骤701,接收第二数据包。所述第二数据包为数据接收端接收到的,以及数据接收端当前对其进行序列号验证的数据包。 Step 701, receiving a second data packet. The second data packet is a data packet received by the data receiving end and for which the data receiving end is currently performing serial number verification.
步骤702,判断所述第二数据包中的第二序列号是否正确,得到判断结果。 Step 702, judging whether the second serial number in the second data packet is correct, and obtaining a judging result.
在本步骤中,通过判断第二数据包中的第二序列号是否正确,即可判断出数据传输过程是否出错,同时也可判断出接收到的第二数据包是否为应当接收的数据包。In this step, by judging whether the second serial number in the second data packet is correct, it can be judged whether there is an error in the data transmission process, and it can also be judged whether the received second data packet is a data packet that should be received.
步骤703,响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包;或者,响应于所述判断结果表示所述第二序列号错误,删除所述第二数据包。数据接收端每判断当前接收的数据包错误,则删除该错误的数据包。 Step 703, in response to the judgment result indicating that the second sequence number is correct, receive the second data packet; or in response to the judgment result indicating that the second sequence number is wrong, delete the second data packet . Whenever the data receiving end judges that the currently received data packet is wrong, it deletes the wrong data packet.
在本步骤中,判断结果表示第二序列号正确时,数据传输过程未出现错误,即接收到的第二数据包是应当接收的数据包,此时,可以直接接收第二数据包。在接收第 二数据包之后,还可以将第二数据包中的第二序列号剥离,得到第二数据包中的第二数据,并将第二数据发送给对应的子系统。判断结果表示第二序列号错误时,数据传输过程出现错误,即接收到的第二数据包不是应当接收的数据包,此时,可以直接删除第二数据包。In this step, when the judgment result indicates that the second serial number is correct, no error occurs in the data transmission process, that is, the received second data packet is a data packet that should be received, and at this time, the second data packet can be received directly. After receiving the second data packet, the second sequence number in the second data packet can also be stripped to obtain the second data in the second data packet, and the second data can be sent to the corresponding subsystem. When the judgment result indicates that the second sequence number is wrong, an error occurs in the data transmission process, that is, the received second data packet is not the data packet that should be received. At this time, the second data packet can be directly deleted.
步骤704,根据所述判断结果发送反馈消息包,所述反馈消息包用于指示所述第二数据包是否正确。即,所述反馈消息用于表征步骤702得到的判断结果。可选的,所述反馈消息包包括所述第三序列号和消息类型,所述第三序列号为数据接收端接收到的最后一个正确的数据包中的序列号,所述消息类型是指序列号验证的判断结果,包括正确和错误。Step 704: Send a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct. That is, the feedback message is used to characterize the judgment result obtained in step 702 . Optionally, the feedback message packet includes the third sequence number and message type, the third sequence number is the sequence number in the last correct data packet received by the data receiving end, and the message type refers to Judgment result of serial number verification, including correct and incorrect.
在本步骤中,判断结果表示第二数据包中的第二序列号正确时,反馈消息包中的第三序列号可以为该第二数据包中的第二序列号。例如,数据接收端应当接收序列号5的数据包,当前接收的第二数据包中的序列号为5,则表示该第二数据包中的第二序列号正确,此时也说明接收到的最后一个正确的数据包中的序列号为5,则反馈消息包中的第三序列号为5。In this step, when the judgment result indicates that the second sequence number in the second data packet is correct, the third sequence number in the feedback message packet may be the second sequence number in the second data packet. For example, the data receiving end should receive a data packet with a sequence number of 5, and the sequence number in the currently received second data packet is 5, which means that the second sequence number in the second data packet is correct, and it also indicates that the received The sequence number in the last correct data packet is 5, and the third sequence number in the feedback message packet is 5.
判断结果表示第二数据包中的第二序列号错误时,反馈消息包中的第三序列号可以为之前最后一个正确接收的数据包的序列号。例如,数据接收端应当接收序列号5的数据包,当前接收的第二数据包中的序列号为7,则表示该第二数据包中的第二序列号错误,此时说明接收到的最后一个正确的数据包中的序列号为4,则反馈消息包中的第三序列号为4。When the judgment result indicates that the second sequence number in the second data packet is wrong, the third sequence number in the feedback message packet may be the sequence number of the last correctly received data packet before. For example, the data receiving end should receive a data packet with sequence number 5, and the sequence number in the second data packet currently received is 7, which means that the second sequence number in the second data packet is wrong, and at this time it means that the last received The sequence number in a correct data packet is 4, and the third sequence number in the feedback message packet is 4.
示例性的,反馈消息包可以采用第二预设格式。例如,如图8所示,第二预设格式可以包括消息类型字段和序列号字段。序列号字段可以表示反馈消息包中的序列号。该序列号字段可以与第一预设格式中的序列号字段长度相同,比如,二者均可以为12bit,即反馈消息包中封装的序列号范围同为0~4095。消息类型字段可以表示当前接收并判断的第二数据包是否被正确接收,即表示第二数据包中的第二序列号验证是否正确的判断结果。该判断结果可以通过不同的值表示。例如,在消息类型字段的长度为4bit时,可以通过1000(二进制表示)表示判断结果为正确,通过1001(二进制表示)表示判断结果错误,通过其他值来实现后续功能扩展。Exemplarily, the feedback message package may adopt the second preset format. For example, as shown in FIG. 8, the second preset format may include a message type field and a sequence number field. The sequence number field may represent a sequence number in the feedback message packet. The sequence number field can be the same length as the sequence number field in the first preset format, for example, both can be 12 bits, that is, the range of the sequence number encapsulated in the feedback message packet is the same as 0-4095. The message type field may indicate whether the currently received and judged second data packet is received correctly, that is, indicates whether the verification of the second sequence number in the second data packet is correct or not. The judgment result can be represented by different values. For example, when the length of the message type field is 4 bits, 1000 (binary representation) can be used to indicate that the judgment result is correct, 1001 (binary representation) can be used to indicate that the judgment result is wrong, and other values can be used to implement subsequent function expansion.
本实施方式相对现有技术而言,通过判断接收的第二数据包中的第二序列号是否正确,根据判断结果分别对第二数据包进行处理,并根据判断结果发送反馈消息包,从而利用简单的消息握手机制即可判断出数据传输过程是否出错,以确定数据是否需 要重传。Compared with the prior art, this embodiment, by judging whether the second sequence number in the received second data packet is correct, respectively processes the second data packet according to the judgment result, and sends a feedback message packet according to the judgment result, thereby utilizing A simple message handshake mechanism can determine whether there is an error in the data transmission process to determine whether the data needs to be retransmitted.
可选的,步骤702可以包括:Optionally, step 702 may include:
对接收到的所述第二数据包进行计数,得到计数值;该计数值即为数据接收端应当接收的正确的数据包的序列号。Counting the received second data packets to obtain a count value; the count value is the sequence number of the correct data packet that should be received by the data receiving end.
将所述计数值与所述第二序列号进行比较,得到比较结果;Comparing the count value with the second serial number to obtain a comparison result;
根据所述比较结果得到所述判断结果。The judgment result is obtained according to the comparison result.
具体的,可以通过计数器从0开始计数,每正确接收一个第二数据包则计数值加1,从而在判断第二数据包中的第二序列号是否正确时,可以根据当前的计数值与当前正在判断的第二序列号的对应关系,得出判断结果。Specifically, the counter can be counted from 0, and the count value is increased by 1 every time a second data packet is received correctly, so that when judging whether the second sequence number in the second data packet is correct, it can be based on the current count value and the current The corresponding relationship of the second serial number being judged is obtained to obtain a judgment result.
通过对接收到的第二数据包进行计数,将计数值与第二数据包中的第二序列号进行比较,根据比较结果得出第二数据包中的第二序列号是否正确的判断结果,使得在判断数据传输过程是否出错时,无需进行复杂的校验计算,简化了判断过程,减少了系统延时,降低了芯片物理实现难度。By counting the second data packets received, comparing the count value with the second sequence number in the second data packet, and obtaining a judgment result of whether the second sequence number in the second data packet is correct according to the comparison result, Therefore, when judging whether there is an error in the data transmission process, there is no need to perform complex verification calculations, which simplifies the judging process, reduces system delay, and reduces the difficulty of physical implementation of the chip.
可选的,所述根据所述比较结果得到所述判断结果,包括:Optionally, the obtaining the judgment result according to the comparison result includes:
若所述计数值与所述第二序列号相同,则所述判断结果表示所述第二序列号正确;若所述计数值与所述第二序列号不同,则所述判断结果表示所述第二序列号错误。If the count value is the same as the second serial number, the judgment result indicates that the second serial number is correct; if the count value is different from the second serial number, the judgment result indicates that the The second serial number is wrong.
具体的,在第二数据包的第二序列号从0开始时,计数器也从0开始计数,以使计数值可以与应当接收的第二数据包的第二序列号相对应。例如,若计数值为5,接收到的第二数据包的第二序列号也为5,则表示第二序列号正确,接收到的第二数据包是应当接收的数据包。若计数值为5,接收到的第二数据包的第二序列号为4或6,则表示第二序列号错误,接收到的第二数据包不是应当接收的数据包,需要将第二序列号为5以及5之后的第二数据包重新发送。Specifically, when the second sequence number of the second data packet starts from 0, the counter also starts counting from 0, so that the count value can correspond to the second sequence number of the second data packet that should be received. For example, if the count value is 5 and the second sequence number of the received second data packet is also 5, it means that the second sequence number is correct and the received second data packet is a data packet that should be received. If the count value is 5 and the second sequence number of the received second data packet is 4 or 6, it means that the second sequence number is wrong, the received second data packet is not the data packet that should be received, and the second sequence number needs to be Number 5 and the second data packets after 5 are resent.
本公开的另一个实施方式涉及一种数据传输系统,所述系统如图9所示,所述系统包括数据发送端901和数据接收端902,其中:Another embodiment of the present disclosure relates to a data transmission system. As shown in FIG. 9, the system includes a data sending end 901 and a data receiving end 902, wherein:
所述数据发送端901,用于接收第一数据;为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;基于所述第一数据和所述第一序列号生成第一数据包;发送所述第一数据包并保存所述第一数据包;The data sending end 901 is configured to receive first data; assign a first serial number to the first data, and the first serial number corresponds to the first data; based on the first data and the The first sequence number generates a first data packet; sends the first data packet and saves the first data packet;
所述数据接收端902,用于接收第二数据包,所述第二数据包的第二序列号小于或等于所述第一序列号;判断所述第二数据包中的第二序列号是否正确,得到判断结果;响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包;响应于所 述判断结果表示所述第二序列号错误,删除所述第二数据包;以及,根据所述判断结果发送反馈消息包,所述反馈消息包用于指示所述第二数据包是否正确。The data receiving end 902 is configured to receive a second data packet, the second sequence number of the second data packet is less than or equal to the first sequence number; determine whether the second sequence number in the second data packet is If it is correct, the judgment result is obtained; in response to the judgment result indicating that the second serial number is correct, the second data packet is received; in response to the judgment result indicating that the second serial number is wrong, the second data packet is deleted and sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
示例性的,数据发送端901已发送序列号0-6的数据包,然后接收到第一数据,为该第一数据分配第一序列号7,生成第一数据包后发送至数据接收端902。同时,数据接收端902已接收到序列号0-4的数据包,数据接收端902的计数器的计数值为5,然后接收到第二数据包。数据接收端902判断该第二数据包中的第二序列号是否正确,对于不同判断结果的情况说明,具体如下:Exemplarily, the data sending end 901 has sent data packets with sequence numbers 0-6, then receives the first data, assigns the first sequence number 7 to the first data, generates the first data packet and sends it to the data receiving end 902 . At the same time, the data receiving end 902 has received the data packets with sequence numbers 0-4, the count value of the counter of the data receiving end 902 is 5, and then the second data packet is received. The data receiving terminal 902 judges whether the second serial number in the second data packet is correct, and the description of different judgment results is as follows:
如果该第二数据包中的第二序列号为5,则确定该第二数据包正确,数据接收端902接收该第二数据包,并生成指示该第二数据包正确的反馈消息包;该情况下,反馈消息包中的第三序列号为5。数据发送端901接收到反馈消息包之后,正常将新接收的数据例如序列号为8的数据包发送至数据接收端902;If the second sequence number in the second data packet is 5, it is determined that the second data packet is correct, and the data receiving end 902 receives the second data packet, and generates a feedback message packet indicating that the second data packet is correct; In this case, the third sequence number in the feedback message packet is 5. After receiving the feedback message packet, the data sending end 901 normally sends the newly received data, such as a data packet with a sequence number of 8, to the data receiving end 902;
如果该第二数据包中的第二序列号为2,则确定该第二数据包错误(即为重复包),数据接收端902删除该第二数据包,并生成指示该第二数据包错误的反馈消息包。该情况下,反馈消息包中的第三序列号为4。数据发送端901接收到反馈消息包之后,在缓存区中取出序列号5-7的数据包再次发送给数据接收端902,并且将序列号5-7的数据包再次写入缓存区;If the second sequence number in the second data packet is 2, it is determined that the second data packet is wrong (that is, a repeated packet), and the data receiving end 902 deletes the second data packet, and generates an error indicating that the second data packet feedback message package. In this case, the third sequence number in the feedback message packet is 4. After the data sending end 901 receives the feedback message packet, it takes out the data packet of the serial number 5-7 in the buffer area and sends it to the data receiving end 902 again, and writes the data packet of the serial number 5-7 into the buffer area again;
如果该第二数据包中的第二序列号为6,则确定该第二数据包错误(即为无效包),数据接收端902删除该第二数据包,并生成指示该第二数据包错误的反馈消息包。该情况下,反馈消息包中的第三序列号为4。数据发送端901接收到反馈消息包之后,在缓存区中取出序列号5-7的数据包再次发送给数据接收端902,并且将序列号5-7的数据包再次写入缓存区。If the second sequence number in the second data packet is 6, it is determined that the second data packet is wrong (that is, an invalid packet), and the data receiving end 902 deletes the second data packet, and generates an error indicating that the second data packet feedback message package. In this case, the third sequence number in the feedback message packet is 4. After receiving the feedback message packet, the data sending end 901 takes out the data packets with sequence numbers 5-7 from the buffer and sends them to the data receiving end 902 again, and writes the data packets with sequence numbers 5-7 into the buffer again.
如果该第二数据包中的第二序列号为10,即大于数据发送端901已发出的数据包的最大序列号,说明该第二数据包为异常包,数据接收端902删除该第二数据包。进一步,数据接收端902可生成异常响应包,并反馈至数据发送端901告知该情况。If the second sequence number in the second data packet is 10, which is greater than the maximum sequence number of the data packet sent by the data sending end 901, it means that the second data packet is an abnormal packet, and the data receiving end 902 deletes the second data Bag. Further, the data receiving end 902 may generate an abnormal response packet, and feed back to the data sending end 901 to inform the situation.
本公开实施方式提供的数据传输系统的具体实现方法可以参见本公开实施方式提供的数据传输方法所述,此处不再赘述。For a specific implementation method of the data transmission system provided in the embodiments of the present disclosure, reference may be made to the description of the data transmission method provided in the embodiments of the present disclosure, and details are not repeated here.
本公开实施方式相对现有技术而言,数据发送端在接收到第一数据后,为第一数据分配第一序列号,第一序列号与第一数据相对应,基于第一数据和第一序列号生成第一数据包,发送第一数据包并保存第一数据包,从而无需在待发送的第一数据中增加额外的校验码,也无需进行复杂的重新组包,简化了发送逻辑,减少了无效带宽的 占用,减少了系统延时。另外,数据接收端通过判断接收到的第二数据包中的第二序列号是否正确,根据判断结果发送反馈消息给数据发送端,使得利用简单的握手机制即可判断出数据发送过程是否出错,并且在数据发送过程出错时,数据发送端可以直接将保存的数据包进行重传,从而建立了数据传输出错时的高效数据重传机制,保证了数据的正确传输,提高了数据传输的速度和质量。Compared with the prior art, the embodiment of the present disclosure assigns a first serial number to the first data after receiving the first data. The first serial number corresponds to the first data. Based on the first data and the first The serial number generates the first data packet, sends the first data packet and saves the first data packet, so that there is no need to add an additional check code to the first data to be sent, and there is no need to perform complex repackaging, which simplifies the sending logic , reducing the use of invalid bandwidth and system delay. In addition, the data receiving end judges whether the second sequence number in the received second data packet is correct, and sends a feedback message to the data sending end according to the judgment result, so that a simple handshake mechanism can be used to determine whether the data sending process is wrong, And when there is an error in the data sending process, the data sending end can directly retransmit the saved data packet, thus establishing an efficient data retransmission mechanism when the data transmission error occurs, ensuring the correct transmission of data, improving the speed and speed of data transmission and quality.
本公开的另一个实施方式涉及一种数据传输的集成电路,如图10所示,所述集成电路包括:Another embodiment of the present disclosure relates to an integrated circuit for data transmission. As shown in FIG. 10 , the integrated circuit includes:
序列号分配单元1001,用于接收第一数据;为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;基于所述第一数据和所述第一序列号生成第一数据包;A serial number allocation unit 1001, configured to receive first data; allocate a first serial number to the first data, the first serial number corresponds to the first data; based on the first data and the first A sequence number generates the first data packet;
第一多路复用器1002,用于发送所述第一数据包;A first multiplexer 1002, configured to send the first data packet;
缓存区1003,用于保存数据包; Buffer area 1003, used to save data packets;
第二多路复用器1004,用于将所述第一数据包写入所述缓存区1003;A second multiplexer 1004, configured to write the first data packet into the buffer area 1003;
控制单元1005,用于接收反馈消息包,根据所述反馈消息包,对所述缓存区1003中保存的第二数据包执行相应的操作;所述反馈消息包用于指示所述第二数据包是否正确;其中,所述第二数据包的第二序列号小于或等于所述第一序列号。The control unit 1005 is configured to receive a feedback message packet, and perform a corresponding operation on the second data packet stored in the buffer 1003 according to the feedback message packet; the feedback message packet is used to indicate that the second data packet Is it correct? Wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
本公开实施方式相对于现有技术而言,序列号分配单元在接收到第一数据后,为第一数据分配第一序列号,第一序列号与第一数据相对应,基于第一数据和第一序列号生成第一数据包,第一多路复用器发送第一数据包,第二多路复用器将第一数据包写入缓存区,缓存区保存写入的数据包,从而无需在待发送的第一数据中增加额外的校验码,也无需进行复杂的重新组包,简化了发送逻辑,减少了无效带宽的占用,减少了系统延时。另外,控制单元接收指示第二数据包是否正确的反馈消息包,根据反馈消息包对缓存区保存的数据包执行相应的操作,使得利用简单的握手机制即可判断出数据发送过程是否出错,并且在数据发送过程出错时,可以直接将缓存区保存的数据包进行重传,从而建立了数据传输出错时的高效数据重传机制,保证了数据的正确传输,提高了数据传输的速度和质量。Compared with the prior art, the embodiment of the present disclosure assigns the first serial number to the first data after the serial number allocation unit receives the first data, and the first serial number corresponds to the first data, based on the first data and The first serial number generates the first data packet, the first multiplexer sends the first data packet, the second multiplexer writes the first data packet into the cache area, and the cache area preserves the written data packet, thereby There is no need to add an extra check code to the first data to be sent, and there is no need to perform complex repackaging, which simplifies the sending logic, reduces invalid bandwidth occupation, and reduces system delay. In addition, the control unit receives a feedback message packet indicating whether the second data packet is correct, and performs corresponding operations on the data packet stored in the buffer area according to the feedback message packet, so that a simple handshake mechanism can be used to determine whether there is an error in the data transmission process, and When there is an error in the data transmission process, the data packets saved in the buffer area can be directly retransmitted, thereby establishing an efficient data retransmission mechanism when the data transmission error occurs, ensuring the correct transmission of data, and improving the speed and quality of data transmission.
可选的,所述控制单元1005,还用于响应于所述反馈消息包表示所述第二数据包正确,删除所述缓存区1003保存的所述第二数据包;或者,响应于所述反馈消息包表示所述第二数据包错误,根据所述反馈消息包从所述缓存区1003保存的数据包中确定至少一个第三数据包,控制所述第一多路复用器1002重新发送所述至少一个第 三数据包,并控制所述第二多路复用器1004将所述至少一个第三数据包写入所述缓存区1003。Optionally, the control unit 1005 is further configured to delete the second data packet stored in the buffer 1003 in response to the feedback message packet indicating that the second data packet is correct; or, in response to the The feedback message packet indicates that the second data packet is wrong, at least one third data packet is determined from the data packets stored in the buffer area 1003 according to the feedback message packet, and the first multiplexer 1002 is controlled to resend the at least one third data packet, and control the second multiplexer 1004 to write the at least one third data packet into the buffer area 1003 .
可选的,所述控制单元1005,还用于获取所述反馈消息包中的第三序列号;根据所述第一序列号和所述第三序列号,从所述缓存区1003保存的数据包中确定至少一个第三数据包;Optionally, the control unit 1005 is further configured to obtain a third sequence number in the feedback message packet; according to the first sequence number and the third sequence number, the data stored in the cache area 1003 determining at least one third data packet in the packet;
所述第一多路复用器1002,还用于发送所述至少一个第三数据包;The first multiplexer 1002 is further configured to send the at least one third data packet;
所述第二多路复用器1004,还用于将所述至少一个第三数据包写入所述缓存区1003。The second multiplexer 1004 is further configured to write the at least one third data packet into the buffer 1003 .
为了使本领域技术人员能够更好地理解上述用于数据传输的集成电路的具体实现方法整体流程,下面以一具体示例进行说明。In order to enable those skilled in the art to better understand the overall flow of the specific implementation method of the above-mentioned integrated circuit for data transmission, a specific example is used below for illustration.
结合图10,本实施方式的用于数据传输的集成电路的具体实现方法包括以下步骤:Referring to FIG. 10, the specific implementation method of the integrated circuit for data transmission in this embodiment includes the following steps:
1.工作开始后,将待发送的第一数据发送至序列号分配单元1001。1. After the work starts, send the first data to be sent to the serial number allocation unit 1001 .
2.序列号分配单元1001接收第一数据,为第一数据分配第一序列号“0”,根据第一数据和第一序列号“0”生成第一数据包。2. The serial number allocation unit 1001 receives the first data, allocates the first serial number "0" to the first data, and generates the first data packet according to the first data and the first serial number "0".
3.第一数据包通过第一多路复用器1002选通后发送至数据接收端。3. The first data packet is gated by the first multiplexer 1002 and sent to the data receiving end.
4.在第一数据包发送的过程中,该第一数据包同时通过第二多路复用器1004选通后,写入缓存区1003,缓存区1003保存该第一数据包。4. During the process of sending the first data packet, the first data packet is simultaneously selected by the second multiplexer 1004, and then written into the buffer area 1003, and the buffer area 1003 stores the first data packet.
5.数据接收端在接收到第二数据包时,对第二数据包中的第二序列号进行检测,判断该第二序列号是否正确,得到判断结果。5. When the data receiving end receives the second data packet, it detects the second serial number in the second data packet, judges whether the second serial number is correct, and obtains a judgment result.
6.如果第二序列号的判断结果为正确,即第二序列号也为0,则:6. If the judgment result of the second serial number is correct, that is, the second serial number is also 0, then:
数据接收端将接收到的第二数据包中的第二序列号“0”剥离,将剥离第二序列号后剩余的第二数据发送到对应的子系统,并产生消息类型为正确的反馈消息包,以表示第二数据包接收正确,将该反馈消息包发送至控制单元1005。The data receiving end strips the second serial number "0" in the received second data packet, sends the remaining second data after stripping the second serial number to the corresponding subsystem, and generates a feedback message whose message type is correct packet, to indicate that the second data packet is received correctly, and the feedback message packet is sent to the control unit 1005 .
控制单元1005在接收到消息类型为正确的反馈消息包后,从缓存区1003中删除保存的第二数据包。After receiving the feedback message packet whose message type is correct, the control unit 1005 deletes the stored second data packet from the cache area 1003 .
7.如果第二序列号的判断结果为错误,即第二序列号不为0,则:7. If the judgment result of the second serial number is wrong, that is, the second serial number is not 0, then:
数据接收端直接丢掉第二数据包,并产生消息类型为错误的反馈消息包,以表示第二数据包接收错误,将该反馈消息包发送至控制单元1005。The data receiving end directly discards the second data packet, and generates a feedback message packet whose message type is wrong to indicate that the second data packet is received incorrectly, and sends the feedback message packet to the control unit 1005 .
控制单元1005在接收到消息类型为错误的反馈消息包后,通过第二多路复用器1004停止上游数据的接收,通过第一多路复用器1002选通到缓存区1003,将缓存区 1003中序列号为0的数据重新发送一次,同时通过第二多路复用器1004将发送的序列号为0的数据再一次写入到缓存区1003中,以防止在数据重传过程中再次出错。After the control unit 1005 receives the feedback message packet whose message type is an error, it stops the reception of upstream data through the second multiplexer 1004, and gates the buffer area 1003 through the first multiplexer 1002, and the buffer area In 1003, the data whose serial number is 0 is resent once, and at the same time, the data whose serial number is 0 is written into the buffer area 1003 again through the second multiplexer 1004, so as to prevent the data from being transmitted again during the data retransmission process. error.
8.数据接收端再次收到重传的数据并对其进行序列号验证,判断序列号是否正确,如果正确,则进入上述步骤6的处理分支,如果错误,则进入上述步骤7的处理分支。8. The data receiver receives the retransmitted data again and verifies the serial number to determine whether the serial number is correct. If it is correct, it will enter the processing branch of the above step 6. If it is wrong, it will enter the processing branch of the above step 7.
本公开的另一个实施方式涉及一种多芯片结构,所述多芯片结构包括多个芯片,至少两个所述芯片之间的数据传输采用上述实施方式所述的数据传输方法;或者,Another embodiment of the present disclosure relates to a multi-chip structure, the multi-chip structure includes a plurality of chips, and the data transmission method between at least two of the chips adopts the data transmission method described in the above embodiment; or,
至少两个所述芯片上设置有上述实施方式所述的数据传输系统,或者设置有上述实施方式所述的用于数据传输的集成电路。At least two of the chips are provided with the data transmission system described in the above embodiment, or provided with the integrated circuit for data transmission described in the above embodiment.
本公开的另一个实施方式涉及一种电子设备,如图11所示,包括:Another embodiment of the present disclosure relates to an electronic device, as shown in FIG. 11 , comprising:
至少一个处理器1101;以及,at least one processor 1101; and,
与所述至少一个处理器1101通信连接的存储器1102;其中,A memory 1102 connected in communication with the at least one processor 1101; wherein,
所述存储器1102存储有可被所述至少一个处理器1101执行的指令,所述指令被所述至少一个处理器1101执行,以使所述至少一个处理器1101能够执行上述实施方式所述的方法。The memory 1102 stores instructions that can be executed by the at least one processor 1101, and the instructions are executed by the at least one processor 1101, so that the at least one processor 1101 can execute the method described in the above-mentioned embodiment .
其中,存储器和处理器采用总线方式连接,总线可以包括任意数量的互联的总线和桥,总线将一个或多个处理器和存储器的各种电路连接在一起。总线还可以将诸如外围设备、稳压器和功率管理电路等之类的各种其他电路连接在一起,这些都是本领域所公知的,因此,本文不再对其进行进一步描述。总线接口在总线和收发机之间提供接口。收发机可以是一个元件,也可以是多个元件,比如多个接收器和发送器,提供用于在传输介质上与各种其他装置通信的单元。经处理器处理的数据通过天线在无线介质上进行传输,进一步,天线还接收数据并将数据传送给处理器。Wherein, the memory and the processor are connected by a bus, and the bus may include any number of interconnected buses and bridges, and the bus connects one or more processors and various circuits of the memory together. The bus may also connect together various other circuits such as peripherals, voltage regulators, and power management circuits, all of which are well known in the art and therefore will not be further described herein. The bus interface provides an interface between the bus and the transceivers. A transceiver may be a single element or multiple elements, such as multiple receivers and transmitters, providing means for communicating with various other devices over a transmission medium. The data processed by the processor is transmitted on the wireless medium through the antenna, further, the antenna also receives the data and transmits the data to the processor.
处理器负责管理总线和通常的处理,还可以提供各种功能,包括定时,外围接口,电压调节、电源管理以及其他控制功能。而存储器可以被用于存储处理器在执行操作时所使用的数据。The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interface, voltage regulation, power management, and other control functions. Instead, memory can be used to store data that the processor uses when performing operations.
本公开的另一个实施方式涉及一种计算机可读存储介质,存储有计算机程序,计算机程序被处理器执行时实现上述实施方式所述的方法。Another embodiment of the present disclosure relates to a computer-readable storage medium storing a computer program, and implementing the method described in the above-mentioned embodiment when the computer program is executed by a processor.
即,本领域技术人员可以理解,实现上述实施方式所述方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成,该程序存储在一个存储介质中,包括若干指令用以使得一个设备(可以是单片机,芯片等)或处理器(processor)执行本申请各个实施方式所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬 盘、ROM(Read-Only Memory,只读存储器)、RAM(Random Access Memory,随机存取存储器)、磁碟或者光盘等各种可以存储程序代码的介质。That is, those skilled in the art can understand that all or part of the steps in the method described in the above-mentioned embodiments can be completed by instructing related hardware through a program, the program is stored in a storage medium, and includes several instructions to make a A device (which may be a single-chip microcomputer, a chip, etc.) or a processor (processor) executes all or part of the steps of the methods described in various embodiments of the present application. The aforementioned storage media include: U disk, mobile hard disk, ROM (Read-Only Memory, read-only memory), RAM (Random Access Memory, random access memory), magnetic disk or optical disc, etc. Various media that can store program codes .
本领域的普通技术人员可以理解,上述各实施方式是实现本公开的具体实施方式,而在实际应用中,可以在形式上和细节上对其作各种改变,而不偏离本公开的精神和范围。Those of ordinary skill in the art can understand that the above-mentioned embodiments are specific embodiments for realizing the present disclosure, and in practical applications, various changes can be made in form and details without departing from the spirit and spirit of the present disclosure. scope.

Claims (17)

  1. 一种数据传输方法,其特征在于,所述方法包括:A data transmission method, characterized in that the method comprises:
    接收第一数据;receiving first data;
    为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;assigning a first serial number to the first data, the first serial number corresponding to the first data;
    基于所述第一数据和所述第一序列号生成第一数据包;generating a first data packet based on the first data and the first sequence number;
    发送所述第一数据包并保存所述第一数据包。sending the first data packet and saving the first data packet.
  2. 根据权利要求1所述的方法,其特征在于,所述方法还包括:The method according to claim 1, further comprising:
    接收反馈消息包,所述反馈消息包用于指示第二数据包是否正确;其中,所述第二数据包的第二序列号小于或等于所述第一序列号;Receiving a feedback message packet, where the feedback message packet is used to indicate whether the second data packet is correct; wherein, the second sequence number of the second data packet is less than or equal to the first sequence number;
    根据所述反馈消息包,对保存的所述第二数据包执行相应的操作。Perform a corresponding operation on the stored second data packet according to the feedback message packet.
  3. 根据权利要求2所述的方法,其特征在于,所述根据所述反馈消息包,对保存的所述第二数据包执行相应的操作,包括:The method according to claim 2, wherein, according to the feedback message packet, performing corresponding operations on the saved second data packet includes:
    响应于所述反馈消息包表示所述第二数据包正确,删除保存的所述第二数据包;或者,In response to the feedback message packet indicating that the second data packet is correct, delete the saved second data packet; or,
    响应于所述反馈消息包表示所述第二数据包错误,根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包。In response to the feedback message packet indicating that the second data packet is wrong, at least one third data packet is determined from the saved data packets according to the feedback message packet, and the at least one third data packet is resent and saved.
  4. 根据权利要求3所述的方法,其特征在于,所述根据所述反馈消息包从保存的数据包中确定至少一个第三数据包,重新发送并保存所述至少一个第三数据包,包括:The method according to claim 3, wherein the determining at least one third data packet from the stored data packets according to the feedback message packet, resending and saving the at least one third data packet comprises:
    获取所述反馈消息包中的第三序列号;Obtain the third sequence number in the feedback message packet;
    根据所述第一序列号和所述第三序列号,从保存的数据包中确定至少一个第三数据包;determining at least one third data packet from the stored data packets according to the first sequence number and the third sequence number;
    发送所述至少一个第三数据包并保存所述至少一个第三数据包。Sending the at least one third data packet and saving the at least one third data packet.
  5. 根据权利要求1至4任一项所述的方法,其特征在于,所述第一数据包的格式包括数据字段和第一序列号字段,所述数据字段用于封装所述第一数据,所述第一序列号字段用于封装所述第一序列号。The method according to any one of claims 1 to 4, wherein the format of the first data packet includes a data field and a first sequence number field, and the data field is used to encapsulate the first data, so The first serial number field is used to encapsulate the first serial number.
  6. 根据权利要求4所述的方法,其特征在于,所述反馈消息包的格式包括第二序列号字段和消息类型字段,所述第二序列号字段用于封装所述反馈消息包的第三序列号,所述消息类型字段用于封装所述反馈消息包的消息类型。The method according to claim 4, wherein the format of the feedback message packet includes a second sequence number field and a message type field, and the second sequence number field is used to encapsulate the third sequence of the feedback message packet number, the message type field is used to encapsulate the message type of the feedback message packet.
  7. 一种数据传输方法,其特征在于,所述方法包括:A data transmission method, characterized in that the method comprises:
    接收第二数据包;receiving a second data packet;
    判断所述第二数据包中的第二序列号是否正确,得到判断结果;judging whether the second serial number in the second data packet is correct, and obtaining a judging result;
    响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包;或者,响应于所述判断结果表示所述第二序列号错误,删除所述第二数据包;Responding to the judgment result indicating that the second sequence number is correct, receiving the second data packet; or in response to the judgment result indicating that the second sequence number is wrong, deleting the second data packet;
    根据所述判断结果发送反馈消息包,所述反馈消息包用于指示所述第二数据包是否正确。Sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
  8. 根据权利要求7所述的方法,其特征在于,所述根据所述判断结果发送反馈消息包,包括:The method according to claim 7, wherein the sending a feedback message packet according to the judgment result comprises:
    将接收到的最后一个正确的数据包中的序列号确定为第三序列号;Determining the sequence number in the last correct data packet received as the third sequence number;
    基于编码的方式,根据所述判断结果确定消息类型;Based on the encoding method, determine the message type according to the judgment result;
    根据所述第三序列号和所述消息类型生成反馈消息包;generating a feedback message packet according to the third sequence number and the message type;
    发送所述反馈消息包。Send the feedback message packet.
  9. 根据权利要求7所述的方法,其特征在于,在响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包之后,还包括:The method according to claim 7, wherein after receiving the second data packet in response to the judgment result indicating that the second sequence number is correct, further comprising:
    将所述第二数据包中的第二序列号剥离,得到第二数据包中的第二数据;stripping the second serial number in the second data packet to obtain second data in the second data packet;
    将所述第二数据发送给对应的子系统。Send the second data to a corresponding subsystem.
  10. 一种数据传输系统,其特征在于,所述系统包括数据发送端和数据接收端,其中:A data transmission system, characterized in that the system includes a data sending end and a data receiving end, wherein:
    所述数据发送端,用于接收第一数据;为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;基于所述第一数据和所述第一序列号生成第一数据包;发送所述第一数据包并保存所述第一数据包;The data sending end is used to receive first data; assign a first serial number to the first data, and the first serial number corresponds to the first data; based on the first data and the first data A sequence number generates a first data packet; sends the first data packet and saves the first data packet;
    所述数据接收端,用于接收第二数据包,所述第二数据包的第二序列号小于或等于所述第一序列号;判断所述第二数据包中的第二序列号是否正确,得到判断结果;响应于所述判断结果表示所述第二序列号正确,接收所述第二数据包;响应于所述判断结果表示所述第二序列号错误,删除所述第二数据包;以及,根据所述判断结果发送反馈消息包,所述反馈消息包用于指示所述第二数据包是否正确。The data receiving end is used to receive a second data packet, the second sequence number of the second data packet is less than or equal to the first sequence number; determine whether the second sequence number in the second data packet is correct , to obtain a judgment result; in response to the judgment result indicating that the second sequence number is correct, receiving the second data packet; in response to the judgment result indicating that the second sequence number is wrong, deleting the second data packet and, sending a feedback message packet according to the judgment result, where the feedback message packet is used to indicate whether the second data packet is correct.
  11. 一种用于数据传输的集成电路,其特征在于,所述集成电路包括:An integrated circuit for data transmission, characterized in that the integrated circuit includes:
    序列号分配单元,用于接收第一数据;为所述第一数据分配第一序列号,所述第一序列号与所述第一数据相对应;基于所述第一数据和所述第一序列号生成第一数据包;A serial number allocation unit, configured to receive first data; allocate a first serial number to the first data, the first serial number corresponds to the first data; based on the first data and the first The sequence number generates the first data packet;
    第一多路复用器,用于发送所述第一数据包;a first multiplexer, configured to send the first data packet;
    缓存区,用于保存数据包;A buffer area for storing data packets;
    第二多路复用器,用于将所述第一数据包写入所述缓存区;a second multiplexer, configured to write the first data packet into the buffer;
    控制单元,用于接收反馈消息包,根据所述反馈消息包,对所述缓存区中保存的第二数据包执行相应的操作;所述反馈消息包用于指示所述第二数据包是否正确;其中,所述第二数据包的第二序列号小于或等于所述第一序列号。A control unit, configured to receive a feedback message packet, and perform a corresponding operation on the second data packet stored in the buffer according to the feedback message packet; the feedback message packet is used to indicate whether the second data packet is correct ; Wherein, the second sequence number of the second data packet is less than or equal to the first sequence number.
  12. 根据权利要求11所述的集成电路,其特征在于,The integrated circuit of claim 11 wherein,
    所述控制单元,还用于响应于所述反馈消息包表示所述第二数据包正确,删除所述缓存区保存的所述第二数据包;或者,响应于所述反馈消息包表示所述第二数据包错误,根据所述反馈消息包从所述缓存区保存的数据包中确定至少一个第三数据包,控制所述第一多路复用器重新发送所述至少一个第三数据包,并控制所述第二多路复用器将所述至少一个第三数据包写入所述缓存区。The control unit is further configured to, in response to the feedback message packet indicating that the second data packet is correct, delete the second data packet stored in the buffer; or, in response to the feedback message packet indicating that the The second data packet is wrong, determining at least one third data packet from the data packets stored in the buffer according to the feedback message packet, and controlling the first multiplexer to resend the at least one third data packet , and controlling the second multiplexer to write the at least one third data packet into the buffer.
  13. 根据权利要求12所述的集成电路,其特征在于,The integrated circuit of claim 12 wherein,
    所述控制单元,还用于获取所述反馈消息包中的第三序列号;根据所述第一序列号和所述第三序列号,从所述缓存区保存的数据包中确定至少一个第三数据包;The control unit is further configured to obtain a third sequence number in the feedback message packet; and determine at least one sequence number from the data packets stored in the buffer area according to the first sequence number and the third sequence number. Three packets;
    所述第一多路复用器,还用于发送所述至少一个第三数据包;The first multiplexer is further configured to send the at least one third data packet;
    所述第二多路复用器,还用于将所述至少一个第三数据包写入所述缓存区。The second multiplexer is further configured to write the at least one third data packet into the buffer area.
  14. 根据权利要求11至13任一项所述的集成电路,其特征在于,An integrated circuit according to any one of claims 11 to 13, characterized in that,
    所述控制单元,还用于响应于所述反馈消息包表示所述第二数据包错误,关闭所述第一多路复用器,以及响应于从所述缓存区保存的数据包中确定至少一个第三数据包,开启所述第一多路复用器。The control unit is further configured to close the first multiplexer in response to the feedback message packet indicating an error in the second data packet, and in response to determining at least A third data packet, turning on the first multiplexer.
  15. 一种多芯片结构,所述多芯片结构包括多个芯片,其特征在于,至少两个所述芯片之间的数据传输采用权利要求1至6任一项所述的数据传输方法,或者采用权利要求7至9任一项所述的数据传输方法;或者,A multi-chip structure, the multi-chip structure includes a plurality of chips, characterized in that the data transmission between at least two chips adopts the data transmission method described in any one of claims 1 to 6, or adopts the The data transmission method described in any one of claims 7 to 9; or,
    至少两个所述芯片上设置有权利要求10所述的数据传输系统,或者设置有权利要求11至14任一项所述的用于数据传输的集成电路。At least two of the chips are provided with the data transmission system according to claim 10, or provided with the integrated circuit for data transmission according to any one of claims 11 to 14.
  16. 一种电子设备,包括:An electronic device comprising:
    至少一个处理器;以及,at least one processor; and,
    与所述至少一个处理器通信连接的存储器;其中,a memory communicatively coupled to the at least one processor; wherein,
    所述存储器存储有可被所述至少一个处理器执行的指令,所述指令被所述至少一 个处理器执行,以实现权利要求1至6任一项所述的数据传输方法,或者权利要求7至9任一项所述的数据传输方法。The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to implement the data transmission method according to any one of claims 1 to 6, or claim 7 The data transmission method described in any one of to 9.
  17. 一种计算机可读存储介质,其上存储有计算机程序,所述计算机程序被处理器执行时实现权利要求1至6任一项所述的数据传输方法,或者权利要求7至9任一项所述的数据传输方法。A computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the data transmission method described in any one of claims 1 to 6 is implemented, or the data transmission method described in any one of claims 7 to 9 is implemented. The data transmission method described above.
PCT/CN2022/104193 2021-08-27 2022-07-06 Data transmission method and system, integrated circuit, multi-chip structure, and electronic device WO2023024720A1 (en)

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