WO2023024619A1 - Method for managing peripheral component interconnect express (pcie) device, and related apparatus - Google Patents

Abstract

A method for managing a peripheral component interconnect express (PCIe) device, and a related apparatus. The peripheral component interconnect express (PCIe) device comprises a communication interface, a processor and a memory, wherein the memory is used for storing firmware of the PCIe device, and the firmware comprises capability attribute information of the PCIe device; the processor is used for loading the firmware; and the communication interface is used for sending the capability attribute information. A storage space is developed in firmware of a PCIe device to store capability attribute information, such that the PCIe device includes the capability attribute information, thereby providing a basis and convenience for a computing device to manage the PCIe device.

Description

A method and related device for managing fast peripheral component interconnection PCIe devices

This application claims the priority of the Chinese patent application submitted to the China Patent Office on August 27, 2021, the application number is 202111000311.4, and the application name is "a method for managing fast peripheral component interconnection PCIe devices and related devices", all of which The contents are incorporated by reference in this application.

technical field

The present application relates to the field of information technology, and in particular to a method and a related device for managing fast peripheral component interconnection PCIe devices.

Background technique

Peripheral component interconnect express (PCIe) devices, such as network cards, accelerator cards, etc., as the PCIe peripherals of the computing device processor system, gradually increase the number of functions and features. Therefore, the types of PCIe devices are also gradually increasing. The cooperation relationship with computing devices is becoming more and more complex, which makes computing devices have higher and higher requirements for configuration management of PCIe devices.

The computing device manages different PCIe devices according to the attribute information of each PCIe device, so the computing device needs to acquire the attribute information of each PCIe device currently connected to the computing device. Currently, the attribute information of the PCIe devices is pre-stored in the computing device, so that the computing device manages each PCIe device according to the pre-stored attribute information. However, in this method, whenever the PCIe device connected to the computing device changes, the capability attribute information stored in the computing device needs to be updated once, which is inconvenient for the computing device to manage and maintain each PCIe device.

Contents of the invention

The present application discloses a method and a related device for managing fast peripheral component interconnection PCIe devices, wherein firmware is stored in the PCIe devices, and the firmware includes capability attribute information of the PCIe devices, laying a foundation for the management of the PCIe devices.

In a first aspect, the present application provides a fast peripheral component interconnection PCIe device, including a communication interface, a processor, and a memory, wherein the memory is used to store the firmware of the PCIe device, and the firmware includes the PCIe The capability attribute information of the device; the processor is used to load the firmware; the communication interface is used to send the capability attribute information.

It can be seen that this application opens up a section of space in the firmware of the memory of the PCIe device for storing the capability attribute information of the PCIe device, so that the capability attribute information is included in the PCIe device, laying a foundation for the management of the PCIe device.

Wherein, the capability attribute information refers to the attribute information used to represent the capability of the PCIe device, and the capability is used to realize a certain function of the PCIe device. The value of the capability attribute information generally indicates the maximum or limit value that the PCIe device can achieve. When the PCIe device is in the working state, the working state value may not reach the value of the capability attribute information. If the working state value exceeds the capability attribute information for a long time value, the PCIe device will stop working or work slowly or the PCIe device will hang, and may even be damaged.

Based on the first aspect, in a possible implementation manner, the communication interface is also used to receive a command request; the command request is used to instruct acquisition of the capability attribute information; the communication interface is also used to send response information; the The response information includes the capability attribute information.

It can be understood that under the condition that the PCIe device stores capability attribute information, the PCIe device can receive a command request for instructing to obtain the capability attribute information through the communication interface, and can also send response information including the capability attribute information through the communication interface.

Based on the first aspect, in a possible implementation manner, the communication interface includes an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous transceiver UART interface.

It can be seen that the communication interface used to receive a command request for acquiring capability attribute information and to send capability attribute information may be an out-of-band interface, for example, an SMBus interface or an NC-SI interface or a UART interface, and the out-of-band interface may also be other interfaces, This application does not make specific limitations.

Based on the first aspect, in a possible implementation manner, the communication interface includes an in-band interface; the in-band interface is a PCIe interface for express peripheral components or an Ethernet interface.

It can be seen that the communication interface used to receive the command request for obtaining the capability attribute information and to send the capability attribute information can also be an in-band interface, for example, a PCIe interface or an Ethernet interface, and the in-band interface can also be other interfaces. This application does not Be specific.

Based on the first aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the custom command field in the command request carries an instruction to acquire the capability attribute information; the response The capability attribute information is carried in the custom response field in the message.

It can be understood that when the communication interface is an out-of-band interface NC-SI interface, the communication protocol supported by the NC-SI interface includes the NC-SI protocol, and the format of the command request (ie the first command request message) and the format of the command request are defined in the NC-SI protocol. The format of the response information (that is, the first command response message). This application extends the custom command field in the first command request message and the custom response field in the first command response message, so that the custom command field in the first command request message carries the acquisition capability attribute information command, the custom response field in the first command response message carries the capability attribute information of the PCIe device. Therefore, when the PCIe device communicates with other devices, it can receive the first command request message through the NC-SI interface, wherein the first command request message includes an instruction to acquire capability attribute information, and send the first command request message through the NC-SI interface. A command response message, wherein the first command response message includes capability attribute information.

Based on the first aspect, in a possible implementation manner, when the communication interface is the PCIe interface, the platform-level data model PLDM protocol data field in the command request carries an instruction to obtain the capability attribute information; the The PLDM protocol data field in the response information carries the capability attribute information.

It can be understood that when the communication interface is an in-band interface PCIe interface, the communication protocol supported by the PCIe interface includes the PLDM protocol, and the format of the command request (i.e. the second command request message) and the format of the response information (i.e. the second command request message) are defined in the PLDM agreement. command response message). This application extends the PLDM protocol data field in the second command request message and the PLDM protocol data field in the second command response message, so that the PLDM protocol data field in the second command request message carries the acquisition capability attribute information command, the PLDM protocol data field in the second command response message carries the capability attribute information of the PCIe device. Therefore, when the PCIe device communicates with other devices, it can receive the second command request message through the PCIe interface, wherein the second command request message includes an instruction to obtain capability attribute information, and send the second command response message through the PCIe interface , wherein the second command response message includes capability attribute information.

Based on the first aspect, in a possible implementation manner, the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. one or more.

It can be understood that the capability attribute information can be one or more of port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information thermal resistance, delay level and power consumption level, and the capability attribute information can also be For other information, this application does not limit.

In a second aspect, the present application provides a system, including a computing device and at least one fast peripheral component interconnection PCIe device, the at least one PCIe device is connected to the computing device through a fast peripheral component interconnection PCIe bus, and the PCIe The device stores firmware, and the firmware includes capability attribute information of the PCIe device.

It can be understood that the computing device can be connected to at least one PCIe device, wherein the firmware of each PCIe device stores the capability attribute information of the device, which lays a foundation for the computing device to manage the at least one PCIe device and provides convenient conditions. Based on the second aspect, in a possible implementation manner, the computing device is configured to send a command request to the at least one PCIe device; the command request is used to indicate to obtain the capability attribute information of the PCIe device; the at least one PCIe device It is used to send response information to the computing device respectively; the response information includes capability attribute information of the PCIe device; the computing device is also used to, according to the received response information of the at least one PCIe device, manage The at least one PCIe device.

Based on the second aspect, in a possible implementation, the computing device communicates with the at least one PCIe device through an out-of-band interface; the out-of-band interface includes a system management bus SMBus interface, a network controller sideband interface NC- One or more of SI and Universal Asynchronous Receiver Transceiver UART interfaces.

Based on the second aspect, in a possible implementation manner, the computing device communicates with the at least one PCIe device through an in-band interface; the in-band interface includes the PCIe interface and/or the Ethernet interface.

Based on the second aspect, in a possible implementation manner, when the out-of-band interface includes the NC-SI interface, the custom command field in the command request carries an instruction to acquire capability attribute information; The capability attribute information is carried in the custom response field of .

Based on the second aspect, in a possible implementation, when the in-band interface includes the PCIe interface, the platform-level data model PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; the response The PLDM protocol data field in the information carries the capability attribute information.

Based on the second aspect, in a possible implementation manner, the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. one or more.

In a third aspect, the present application provides a method for managing fast peripheral component interconnection PCIe devices, which is applied to the computing device side, including: the computing device sends a command request; the command request indicates to obtain the capability attribute information of the PCIe device; Receiving response information; the response information includes capability attribute information of the PCIe device; and managing the PCIe device according to the capability attribute information of the PCIe device.

It can be seen that the computing device can send a command request for instructing to obtain the capability attribute information of the PCIe device, and can also receive the response information including the capability attribute information, and the computing device manages PCIe according to the received capability attribute information of the PCIe device .

Based on the third aspect, in a possible implementation, the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a general-purpose Asynchronous transceiver UART interface.

Based on the third aspect, in a possible implementation manner, the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a Peripheral Component Interconnect Express PCIe interface or an Ethernet interface.

Based on the third aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; in the response information The capability attribute information is carried in the custom response field of .

Based on the third aspect, in a possible implementation, when the in-band interface is the PCIe interface, the platform-level data model PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; the response The PLDM protocol data field in the information carries the capability attribute information.

Based on the third aspect, in a possible implementation manner, the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. one or more.

In a fourth aspect, the present application provides a method for managing fast peripheral component interconnection PCIe devices, which is applied to the PCIe device side, including: the PCIe device receives a command request; the command request indicates to obtain the capability attribute of the PCIe device Information; the capability attribute information is stored in the firmware of the PCIe device; response information is sent based on the command request; the response information includes the capability attribute information of the PCIe device.

It can be seen that in this application, the firmware of the PCIe device stores the capability attribute information of the device, which lays a foundation for the management of the PCIe device. In addition, the PCIe device can receive a command request indicating to obtain the capability attribute information, and can also send response information including the capability attribute information.

Based on the fourth aspect, in a possible implementation, the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or Universal Asynchronous Transceiver tor UART interface.

Based on the fourth aspect, in a possible implementation manner, the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a Peripheral Component Interconnect Express PCIe interface or an Ethernet interface.

Based on the fourth aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the PCIe device receiving the command request includes: the PCIe device receiving the command request through the NC-SI interface The command request sent by the computing device; the custom command field in the command request carries an instruction to obtain capability attribute information; the sending of response information based on the command request includes: based on the command request, through the The NC-SI interface sends the response information to the computing device; the capability attribute information is carried in the self-defined response field in the response information.

Based on the fourth aspect, in a possible implementation manner, when the in-band interface is the PCIe interface, the PCIe device receiving the command request includes: the PCIe device receives the command request sent by the computing device through the PCIe interface The command request, the platform-level data model PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; the sending response information based on the command request includes: based on the command request, through the The PCIe interface sends response information to the computing device; the PLDM protocol data field in the response information carries the capability attribute information.

Based on the fourth aspect, in a possible implementation manner, the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. one or more.

In a fifth aspect, the present application provides a computing device, including: a sending module, used to send a command request; the command request indicates to obtain the capability attribute information of the PCIe device; a receiving module, used to receive response information; the The response information includes the capability attribute information of the PCIe device; the management module is configured to manage the PCIe device according to the capability attribute information of the PCIe device.

Based on the fifth aspect, in a possible implementation, the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a general-purpose Asynchronous transceiver UART interface.

Based on the fifth aspect, in a possible implementation manner, the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a Peripheral Component Interconnect Express PCIe interface or an Ethernet interface.

Based on the fifth aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; in the response information The capability attribute information is carried in the custom response field of .

Based on the fifth aspect, in a possible implementation, when the in-band interface is the PCIe interface, the platform-level data model PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; the response The PLDM protocol data field in the information carries the capability attribute information.

Based on the fifth aspect, in a possible implementation manner, the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. one or more.

Each functional module of the fifth aspect is specifically configured to implement the method described in the third aspect or any possible implementation manner of the third aspect.

In a sixth aspect, the present application provides a PCIe device, including: a storage module, configured to store capability attribute information of the PCIe device; a receiving module, configured to receive a command request; the command request indicates to obtain the PCIe device's Capability attribute information; a sending module, configured to send response information based on the command request; the response information includes capability attribute information of the PCIe device.

Based on the sixth aspect, in a possible implementation, the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or Universal Asynchronous Transceiver tor UART interface.

Based on the sixth aspect, in a possible implementation manner, the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a Peripheral Component Interconnect Express PCIe interface or an Ethernet interface.

Based on the sixth aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the receiving module is configured to receive the command sent by the computing device through the NC-SI interface request; the custom command field in the command request carries an instruction to obtain capability attribute information; the sending module is configured to, based on the command request, send the response to the computing device through the NC-SI interface information; the capability attribute information is carried in the self-defined response field in the response information.

Based on the sixth aspect, in a possible implementation manner, when the in-band interface is the PCIe interface, the receiving module is configured to receive the command request sent by the computing device through the PCIe interface; The platform-level data model PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; the sending module is used to send response information to the computing device through the PCIe interface based on the command request; The PLDM protocol data field in the response information carries the capability attribute information.

Based on the sixth aspect, in a possible implementation manner, the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. one or more.

Each functional module of the sixth aspect is specifically configured to implement the method described in the fourth aspect or any possible implementation manner of the fourth aspect.

In a seventh aspect, the present application provides yet another computing device, including a memory, a processor, and a communication interface, the communication interface is used to receive or send instructions, the memory is used to store instructions, and the processor is used to run the The instructions stored in the memory execute the method described in the above third aspect or any possible implementation manner of the third aspect.

In an eighth aspect, the present application provides a computer-readable storage medium, including program instructions. When the program instructions are executed by a computing device, the computing device executes any possible method of the third aspect or the third aspect. The method described in the implementation.

In a ninth aspect, the present application provides a computer-readable storage medium, including program instructions. When the program instructions are executed by a computing device, the computing device performs any possible operation of the fourth aspect or the fourth aspect. The method described in the implementation.

Description of drawings

In order to illustrate the technical solutions of the embodiments of the present application more clearly, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application. Ordinary technicians can also obtain other drawings based on these drawings on the premise of not paying creative work.

FIG. 1 is a schematic diagram of a system architecture provided by the present application;

Fig. 2 is a schematic flow chart of a method for managing PCIe devices provided by the present application;

Fig. 3 is a schematic diagram of the connection relationship between a computing device and a PCIe device provided by the present application;

Fig. 4 is a schematic diagram of the SMBus interface protocol specification provided by the application;

FIG. 5 is a schematic diagram of a format of response information provided by the present application;

FIG. 6 is a schematic diagram of another connection relationship between a computing device and a PCIe device provided by the present application;

FIG. 7A is a schematic diagram of the first command request message provided by the present application;

FIG. 7B is a schematic diagram of the first command response message provided by the present application;

FIG. 8 is a schematic diagram of another connection relationship between a computing device and a PCIe device provided by the present application;

FIG. 9A is a schematic diagram of a second command request message provided by the present application;

FIG. 9B is a schematic diagram of a second command response message provided by the present application;

FIG. 10 is a schematic diagram of a computing device provided by the present application;

FIG. 11 is a schematic diagram of a PCIe device provided by the present application;

FIG. 12 is a schematic diagram of another computing device provided by the present application;

FIG. 13 is a schematic diagram of another PCIe device provided by the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

The terms "first" and "second" in this embodiment of the present application are only used to distinguish different things, and are not used to represent important content or secondary important content. In the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more.

In order to facilitate the understanding of this application, the nouns involved in this application are firstly introduced.

Out-of-band management refers to the management and control of the network through a dedicated management channel, separates management data from business data, and establishes an independent channel for management data. In this channel, only management data is transmitted. , statistical information, billing information, etc., management data and business data are separated. The out-of-band management channel can be a system management bus (SMBus) interface or a network controller sideband interface (network controller sideband interface, NC-SI) interface or a universal asynchronous receiver/transmitter (UART) interface etc., refer to these out-of-band management channels as out-of-band interfaces. The out-of-band interface in this application may be an SMBus interface, an NC-SI interface, a UART interface, etc., or other interfaces, which are not specifically limited in this application.

In-band (in-band) management refers to using the same network channel to transmit management data and service data. The in-band management channels can be PCIe interfaces or Ethernet interfaces, and these in-band management channels are called in-band interfaces. The in-band interface in this application may be a PCIe interface, an Ethernet interface, or a special interface, which is not specifically limited in this application.

The system architecture involved in this application is introduced below.

Referring to FIG. 1 , FIG. 1 is a schematic diagram of a system architecture involved in the present application. In FIG. 1, the PCIe interface is a bridge for communication between the computing device and the PCIe device.

The computing device is a master device with a PCIe interface. A computing device can be a terminal device, such as various types of servers, desktop computers, user equipment (UE), mobile phone (mobile phone), tablet computer (pad), audio, etc.; it can be a machine intelligent device, such as Self-driving (self-driving) equipment, transportation safety (transportation safety) equipment, virtual reality (virtual reality, VR) terminal equipment, augmented reality (augmented reality, AR) terminal equipment, machine type communication (machine type communication, MTC) Equipment, industrial control (industrial control) equipment, remote medical (remote medical) equipment, smart grid (smart grid) equipment, smart city (smart city) equipment, etc.; can be car cockpit (cockpit domain) equipment, or car cockpit equipment A module in, for example, a combination of one or more modules in the cockpit domain controller (cockpit domain controller, CDC), camera, screen, microphone, audio, electronic key, keyless entry or start system controller; can It is a data transfer device, such as a router, repeater, bridge or switch, etc.; it can be a wearable device (such as a smart watch, smart bracelet, pedometer, etc.) and so on. In some scenarios, the name of the master device with a similar PCIe interface may not be called a computing device, but for the convenience of description, in the embodiment of the present application, the master device with a PCIe interface is collectively referred to as a computing device.

A PCIe device is a slave device with a PCIe interface. For example, a PCIe device can be a network card, a redundant array of independent disks (RAID) card, a graphics card (graphic processing unit, GPU, also known as an image processor), a solid state disk (solid state disk, SSD), an accelerator card, fiber channel (fibre channel, FC) card, wireless broadband (infiniband, IB) card, etc. Identification information is stored in the PCIe device, wherein the identification information refers to information used to identify the PCIe device, for example, it can be four-tuple information, a model (part number, PN) of a board, a serial number (serial number, SN) ) and so on one or more. Quad information includes: PCIe device vendor identification number (vendor identity, VID), device identification number (device identity, DID), sub vendor identification number (sub vendor identity, SVID), subsystem identification number (sub system identity, SSID), the four-tuple information can uniquely identify the PCIe device.

One or more PCIe devices are connected to one computing device. In order to facilitate management of the PCIe devices, the computing device needs to obtain capability attribute information of the PCIe devices, so as to implement management of each PCIe device. However, only identification information is stored in the PCIe device, and capability attribute information is not stored. Therefore, no matter through in-band communication or out-of-band communication, the computing device cannot directly obtain the capability attribute information from the PCIe device.

Wherein, the capability attribute information refers to the attribute information used to represent the capability of the PCIe device, and the capability is used to realize a certain function of the PCIe device. The value of the capability attribute information generally indicates the maximum or limit value that the PCIe device can achieve. When the PCIe device is in the working state, the working state value may not reach the value of the capability attribute information. In some cases, if the working state value If the value of the capability attribute information is exceeded for a long time, the PCIe device may be damaged. For example, the capability attribute information may be one or more of port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level. Among them, the port rate indicates the maximum transmission rate that the PCIe device port can achieve; the cache capacity indicates the maximum cache capacity of the PCIe device; the temperature threshold indicates the maximum temperature reached by the PCIe device. If the temperature of the PCIe device in the working state reaches or If the temperature threshold is exceeded, it is urgent to take cooling measures for the PCIe device to lower the temperature of the PCIe device. If it is in the temperature threshold state for a long time or exceeds the temperature threshold, the PCIe device will stop working or work slowly or the PCIe device will stop, or even It may be damaged; the network controller sideband interface characteristics include whether the PCIe device supports the NC-SI feature and the supported commands and parameters. According to the network controller sideband interface characteristics, the parameters of the PCIe device can be configured; the thermal resistance indicates the temperature of the device The ratio between the difference (increased temperature) and the difference in power consumption (the unit of thermal resistance is °C/W), that is, how much °C the temperature rises when the power consumption is increased by 1W, and the power consumption of the PCIe device can be calculated according to the thermal resistance value. The working temperature value that may be reached in the case of increasing; the size information indicates the size allowed by the PCIe device, and the size of the PCIe device includes full height, full length, half height, and half length; the delay level indicates that the information is processed in the PCIe device The amount of time consumed; the power consumption level indicates the power consumption of the PCIe device.

The present application provides a method for a computing device to obtain capability attribute information of a PCIe device, as follows:

S101: The computing device pre-stores a mapping relationship between identification information of a PCIe device and capability attribute information.

In one embodiment, the mapping relationship between the identification information of the PCIe device and the capability attribute information can be as shown in Table 1, and only the mapping relationship between the identification information of the PCIe device and the capability attribute information is listed in Table 1. And the identification information uses four-tuple information that can uniquely identify the PCIe device: VID, DID, SVID, and SSID.

Optionally, the name of the device may also be included in Table 1, that is, the correspondence between the identification information, the name of the device, and the capability attribute information. For example, the name of the device corresponding to the identification information VID1/DID1/SVID1/SSID1 is For device 1, the corresponding capability attribute information includes capability attribute 1, capability attribute 2, capability attribute 3, and capability attribute 4.

Table 1 Mapping relationship between identification information and capability attribute information of PCIe devices

It can be understood that Table 1 here is only an example. In practical applications, the content of the identification information and capability attribute information of PCIe devices in Table 1, and the mapping relationship between the identification information of each PCIe device and each capability attribute information may be different. For example, the identification information of different PCIe devices may have part of the same capability attribute information. Table 1 may also include more or fewer mapping relationships, and the corresponding relationship may also be stored in other forms. There is no specific limitation.

S102: The computing device acquires the identification information of the PCIe device through in-band communication or out-of-band communication.

S103: The computing device determines capability attribute information corresponding to the identification information of the PCIe device according to the acquired identification information of the PCIe device and a mapping relationship between the identification information of the PCIe device and the capability attribute information.

In a specific embodiment, continue to take Table 1 as an example for illustration, assuming that the obtained identification information of the PCIe device is the quaternion information VID1/DID1/SVID1/SSID1 of the PCIe device, it can be known from the query table 1 that the The capability attribute information corresponding to the quadruple information is capability attribute 1, capability attribute 2, capability attribute 3, and capability attribute 4.

After the computing device determines the capability attribute information of the PCIe device, the computing device manages the PCIe device according to the capability attribute information of the PCIe device.

In the above method in which the computing device obtains the capability attribute information of the PCIe device and manages the PCIe device according to the obtained capability attribute information, the computing device needs to pre-store the mapping relationship between the identification information of each PCIe device and the capability attribute information, that is, PCIe The capability attribute information of the device is stored externally. In the above method, it is stored in the computing device. Therefore, when a new PCIe device is added or a PCIe device is upgraded, the computing device needs to update the pre-stored information once. This method is cumbersome to operate, and it is difficult to realize the management and operation and maintenance of PCIe devices.

This application provides a method for managing PCIe devices, which is applied to computing devices, see Figure 2, Figure 2 is a schematic flowchart of a method for managing PCIe devices provided by this application, the method includes but is not limited to the following describe.

S201. The computing device sends a command request to the PCIe device. Correspondingly, the PCIe device receives the command request sent by the computing device, where the command request is used to instruct acquisition of capability attribute information of the PCIe device.

S202. The PCIe device returns response information to the computing device. Correspondingly, the computing device receives the response information returned by the PCIe device, wherein the response information includes capability attribute information of the PCIe device.

In this application, the capability attribute information is stored in a segment of storage space in firmware (firmware) in the memory of the PCIe device. The firmware is used to realize the functions of the PCIe device, for example, the network card firmware realizes the network connection of the network card, message sending and receiving, protocol offloading and so on. The meaning and examples of the capability attribute information have been described in the above-mentioned relevant content, and for the sake of brevity of the description, details are not repeated here.

For example, refer to Table 2, which is a storage diagram of capability attribute information in firmware provided by the present application. Wherein, capability attribute 1 may be the port rate of the PCIe device, capability attribute 2 may be the port line width of the PCIe device, capability attribute 3 may be the cache capacity of the PCIe device, capability attribute 4 may be the NC-SI characteristic, and so on. It can be understood that Table 2 here is only an example. In practical applications, the content and storage format of the capability attribute information of PCIe devices in Table 2 can be different. This application does not make any reference to the storage format of the capability attribute information in firmware. limited.

Table 2 Schematic diagram of storage of capability attribute information in firmware

In one implementation, as shown in FIG. 3, the computing device is connected to the SMBus interface on the PCIe device. More specifically, the interface of the device management module of the computing device is connected to the SMBus interface of the PCIe device, and the SMBus protocol is used to realize the connection with the PCIe device. device communication. In addition, the computing device is also connected to the PCIe device through a PCIe interface, wherein the PCIe interface is a service interface for communication between the PCIe device and a service system (such as a CPU system, an OS system) of the computing device.

The address resolution protocol ARP is defined in the SMBus protocol specification, and the special address "1100001" is defined in the ARP protocol to realize certain functions. As shown in Figure 4, Figure 4 is a functional schematic diagram of the special address "1100001" defined in the ARP protocol in the SMBus protocol specification. It can be seen from Figure 4 that only the command word "0x01" to "0x04" is defined in the ARP protocol. "The meaning of the command word, among them, "0x01" means "Prepare to ARP", that is, to prepare to perform the ARP operation, "0x02" means "Reset Device", that is, to reset the device, "0x03" means "Get UDID", that is, to obtain the unique Device identification, "0x04" means "Assign Address", that is, the assigned address, "0x00" and "0x05" to "0x1F" are reserved command words with undefined meanings.

In this application, the SMBus interface protocol specification is extended, and any reserved command word in the ARP protocol is defined as an instruction for obtaining capability attribute information. For example, the command word "0x00" can be defined as an instruction for obtaining capability attribute information, or " Any command word in "0x05" to "0x1F" is defined as the command to obtain capability attribute information.

After the SMBus interface protocol specification is extended, the computing device sends a command request to the PCIe device through the SMBus interface. The command request indicates to obtain the capability attribute information of the PCIe device. After receiving the command request, the PCIe device returns a response message to the computing device. The response message Including the capability attribute information of the PCIe device, the form of the response information is shown in Figure 5. In Figure 5, the "slave node address" is "1100001", indicating that a certain command word in the special address "1100001" is used; "command " indicates the command to obtain capability information, and the content in "command" is the specific command word representing the command to obtain capability information. For example, if the command word "0x05" is defined as the command to obtain capability attribute information, then the content in "command" is 0x05, If the "0x1F" command word is defined as an instruction to obtain capability attribute information, then the content in "command" is 0x1F; "data 1" to "data N" are used to store capability attribute information. The format of the response information shown in FIG. 5 is only an exemplary representation, and the present application does not specifically limit the format of the response information and the format of the capability attribute information.

In yet another implementation, as shown in FIG. 6 , the computing device is connected to the NC-SI interface on the PCIe device, specifically, the interface of the device management module on the computing device is connected to the NC-SI interface of the PCIe device. In addition, the computing device is also connected to the PCIe device through a PCIe interface, wherein the PCIe interface is a service interface for data transmission between the PCIe device and a business system (such as a CPU system, an OS system) of the computing device.

The NC-SI interface supports the NC-SI protocol. The NC-SI protocol defines the format of the first command message, including the format of the first command request message and the format of the first command response message. This application expands the first command request message and the first command response message, see Figure 7A and Figure 7B for details, Figure 7A is the format of the first command request message provided by this application, and Figure 7B is the format of the first command request message provided by this application Format of the first command response message. In Fig. 7A, the destination address is FF-FF-FF-FF-FF-FF, that is, the broadcast address of all F, the source address is the address of the device management module interface on the computing device, and the type is the Ethernet type (the NC-SI interface is interface on the Ethernet card), and the command packet header indicates that the message is a command request message. In this application, the "custom command" field in the first command request message is used to carry an instruction to obtain capability attribute information. In Fig. 7B, both the destination address and the source address are FF-FF-FF-FF-FF-FF defined in the NC-SI protocol specification, the type is Ethernet type, and the command packet header indicates that the message is a command response message. In the application, the "custom response" field in the first command response message is used to carry capability attribute information.

After extending the first command request message and the first command response message in the NC-SI protocol specification, the computing device sends the first command request message to the PCIe device through the NC-SI interface, and the first command request message includes an instruction to acquire capability attribute information. After receiving the packet, the PCIe device parses the packet and returns a first command response message to the computing device. The first command response message includes the capability attribute information of the PCIe device.

In yet another implementation, as shown in FIG. 8, the computing device is connected to the PCIe interface on the PCIe device. Specifically, the device management module of the computing device is connected to and communicates with the PCIe device through the PCIe interface of the CPU system. Although the connection mode is through the PCIe interface, the initiator of the communication is the device management module of the computing device, which belongs to out-of-band communication. In addition, as a service interface, the PCIe interface is also used to transmit data between the CPU system or OS system of the computing device and the PCIE device.

The PCIe interface bears the management component transport protocol (MCTP), that is, MCTP over PCIe. The MCTP protocol is a management protocol framework, and the out-of-band management protocols it supports include the platform level data model (platform level data model, PLDM) protocol , this embodiment uses the PLDM protocol structure, that is, PLDM over MCTP over PCIe. The format of the second command message is defined in the PLDM protocol, including the format of the second command request message and the format of the second command response message. This application expands the second command request message and the second command response message, see Figure 9A and Figure 9B for details, Figure 9A is a schematic diagram of the format of the second command request message provided by this application, and Figure 9B is the Schematic diagram of the format of the second command response message, the second command request message and the second command response message are composed of PCIe protocol header, MCTP protocol header, PLDM protocol header, checksum, protocol type Composed of PLDM protocol data (payload), where the protocol type refers to the protocol type carried by MCTP, here is the PLDM protocol.

In this application, the second command request message and the second command response message are extended, and the "PLDM protocol data" field in the second command request message carries "acquire capability attribute information instruction", and the second command response message The "PLDM protocol data" field in this document is used to carry capability attribute information. After the PLDM protocol is extended, the computing device sends a second command request message to the PCIe device through the PCIe interface. The second command request message includes an instruction to obtain capability attribute information. After receiving the second command request message, the PCIe device parses the message, and return a second command response message to the computing device, the second command response message includes the capability attribute information of the PCIe device, and the format of the capability attribute information is not limited in this application.

It should be noted that the out-of-band management protocol supported by the MCTP protocol also includes the NC-SI protocol, that is, NC-SI over MCTP over PCIe. This application can also use the NC-SI over MCTP over PCIe protocol structure to process request messages and responses The message is extended so that a certain field in the request message carries an instruction to obtain capability attribute information, and a certain field in the response message carries capability attribute information. The computing device sends a command to obtain capability attribute information to the PCIe device by sending a request message. After receiving the request message, the PCIe device parses the request message and returns a response message, which carries the capability attribute information.

It should be noted that this application expands the functions of computing devices and PCIe devices, including: computing devices have the authority and ability to request access to the capability attribute information of PCIe devices, and can send instructions to obtain capability attribute information to PCIe devices. It has the ability to analyze capability attribute information; PCIe devices have the ability to identify and interpret commands to obtain capability attribute information, and the PCIe device defines the operations that need to be performed after receiving the command to obtain capability attribute information. For example, it can be defined when the device receives When the capability attribute information is commanded, the capability attribute information of the device itself is read, and then written into the response information, and the capability attribute information is sent to the sending end device in the form of response information. The specific definition form and content of how to send the command request for the device to acquire the capability attribute information instruction and what operations the device needs to perform when receiving the command request for the capability attribute information instruction are not specifically limited.

S203. The computing device manages the PCIe device according to the capability attribute information of the PCIe device.

In an embodiment, the PCIe device is managed according to the capability attribute information of the PCIe device. For example, the acquired capability attribute information of the PCIe device includes port speed, and the computing device displays the port speed on the interface. For another example, the capability attribute information obtained by the computing device includes NC-SI characteristics, and the computing device configures parameters for the PCIe device according to the NC-SI characteristics; and so on.

In yet another embodiment, the computing device may also obtain status information of the PCIe device through in-band communication or out-of-band communication, and manage the PCIe device according to the status information and capability attribute information. Wherein, the status information includes information indicating the current working status of the PCIe device, for example, the status information may be the current working rate of the port of the PCIe device, the current temperature of the PCIe device, and the like. For example, the capability attribute information obtained by the computing device includes a temperature threshold, and obtains the current temperature (status information) of the PCIe device. The computing device determines whether to start the fan according to the current temperature and the temperature threshold, and controls the adjustment according to the difference between the current temperature and the temperature threshold. The speed or gear of the fan. For another example, the capability attribute information obtained by the computing device includes the cache capacity, and the currently occupied capacity of the PCIe device is obtained. When the occupied capacity is close to the cache capacity, the working efficiency of the PCIe device may decrease, and some PCIe devices can be turned off. functions to reduce occupied capacity and improve work efficiency.

The manner in which the computing device obtains the status information of the PCIe device may be through in-band communication or through an out-of-band interface, which is not specifically limited in this application.

It can be seen that in this application, a section of storage space is opened up in the firmware in the memory of the PCIe device for storing capability attribute information, which provides a basis and convenience for computing devices to obtain capability attribute information. In addition, the computing device and the PCIe device communicate through an out-of-band interface or an in-band interface, where the out-of-band interface may be, for example, an SMBus interface, NC-SI interface, UART interface, etc., and the in-band interface may be, for example, a PCIe interface, an Ethernet interface, etc. , by extending the communication protocol, the communication protocol supports the transmission of capability attribute information, which is reflected in the following: the computing device can send the command to obtain the capability attribute information to the PCIe device through the out-of-band interface, and the PCIe device can recognize the command to obtain the capability attribute information, and make a Reply, returning capability attribute information to the computing device, so that the computing device receives the capability attribute information, and implements configuration and management of the PCIe device according to the capability attribute information. Implement the embodiment of the present application, every time a new PCIe device is added on the computing device, or when the PCIe device connected to the computing device is upgraded, the computing device can directly obtain the capability attribute information from the PCIe device, without pre-storing the information of the PCIe device, There is also no need to update information frequently, and the method of the present application is easy to operate, has strong adaptability, and facilitates management, operation and maintenance of PCIe devices.

Referring to FIG. 10, FIG. 10 is a schematic diagram of a computing device 100 provided by the present application. The computing device 100 includes:

The sending module 101 is used to send a command request; the command request indicates to obtain the capability attribute information of the PCIe device; the receiving module 102 is used to receive the response information; the response information includes the capability attribute information of the PCIe device; the management module 103 is used for according to PCIe Capability attribute information of the device to manage PCIe devices.

In a possible implementation, the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous transceiver UART interface.

In a possible implementation manner, the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a PCIe interface for fast peripheral component interconnection or an Ethernet interface.

In a possible implementation, when the out-of-band interface is an NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; the custom response field in the response information carries capability attribute information.

In a possible implementation, when the in-band interface is a PCIe interface, the platform-level data model PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; the PLDM protocol data field in the response information carries capability attribute information .

In a possible implementation manner, the capability attribute information includes one or more of port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information thermal resistance, delay level, and power consumption level.

Each functional module of the above-mentioned computing device 100 is used to implement the method described in the embodiment of FIG. 2 . For specific content, refer to the description in the related content of the embodiment of FIG. 2 .

Referring to FIG. 11, FIG. 11 is a schematic diagram of a PCIe device 200 provided by the present application. The PCIe device 200 includes:

The storage module 201 is used to store the capability attribute information of the PCIe device; the receiving module 202 is used to receive the command request; the command request indicates to obtain the capability attribute information of the PCIe device; the sending module 203 is used to send response information based on the command request; the response information Include the capability attribute information of the PCIe device.

In a possible implementation, the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous transceiver UART interface.

In a possible implementation manner, the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a PCIe interface for fast peripheral component interconnection or an Ethernet interface.

In a possible implementation, when the out-of-band interface is an NC-SI interface, the receiving module 202 is configured to receive the first command request message sent by the computing device through the NC-SI interface; The command field carries an instruction to obtain capability attribute information; the sending module 203 is configured to, based on the first command request message, send a first command response message to the computing device through the NC-SI interface; The definition response field carries capability attribute information.

In a possible implementation, when the in-band interface is the PCIe interface, the receiving module 202 is configured to receive the second command request message sent by the computing device through the PCIe interface; the platform-level data in the second command request message The model PLDM protocol data field carries an instruction to acquire capability attribute information; the sending module 203 is configured to, based on the second command request message, send a second command response message to the computing device through the PCIe interface; the second command response message in the second command response message The capability attribute information is carried in the PLDM protocol data field.

In a possible implementation manner, the capability attribute information includes one or more of port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, delay level, and power consumption level.

Each functional module of the above-mentioned PCIe device 200 is used to implement the method described in the embodiment of FIG. 2 . For specific content, refer to the description in the related content of the embodiment of FIG.

Referring to FIG. 12 , FIG. 12 is a schematic diagram of a hardware structure of a computing device 300 provided in the present application. The computing device 300 includes: a processor 310 , a communication interface 320 and a memory 330 . Wherein, the processor 310, the communication interface 320, and the memory 330 may be connected to each other through the internal bus 340, and may also communicate through other means such as wireless transmission.

Taking the connection through the bus 340 as an example, the bus 340 may be a PCI bus or an EISA bus or the like. The bus 340 can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, only one thick line is used in FIG. 12 , but it does not mean that there is only one bus or one type of bus.

The processor 310 may be composed of at least one general-purpose processor, such as a CPU, or a combination of a CPU and a hardware chip. The aforementioned hardware chip may be an ASIC, a PLD or a combination thereof. The aforementioned PLD may be CPLD, FPGA, GAL or any combination thereof. Processor 310 executes various types of digitally stored instructions, such as software or firmware programs stored in memory 330, which enable computing device 300 to provide a wide variety of services.

The memory 330 is used to store program codes, which are controlled and executed by the processor 310 to perform the steps described in the above-mentioned embodiment in FIG.

The memory 330 may include a volatile memory, such as RAM; the memory 330 may also include a non-volatile memory, such as ROM, flash memory (flash memory); the memory 330 may also include a combination of the above types.

The communication interface 320 can be a wired interface (such as an Ethernet interface), an internal interface (such as a fast peripheral component interconnect express (PCIe) bus interface), a wired interface (such as an Ethernet interface) or a wireless interface (such as cellular network interface or use the wireless LAN interface) for communicating with other devices or modules.

It should be noted that FIG. 12 is only a possible implementation of the embodiment of the present application, and in practical applications, the computing device may include more or fewer components, which is not limited here. Regarding the content that is not shown or described in the embodiment of the present application, refer to the relevant explanation in the embodiment of the foregoing method, and details are not repeated here.

Referring to FIG. 13 , FIG. 13 is a schematic diagram of a hardware structure of a PCIe device 400 provided in the present application. The PCIe device 400 includes: a processor 410 , a communication interface 420 and a memory 430 . Wherein, the processor 410, the communication interface 420, and the memory 430 may be connected to each other through the internal bus 440, and may also communicate through other means such as wireless transmission.

Taking the connection through the bus 440 as an example, the bus 440 may be a PCI bus or an EISA bus or the like. The bus 440 can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, only one thick line is used in Fig. 13, but it does not mean that there is only one bus or one type of bus.

The processor 410 may be composed of at least one general-purpose processor, such as a CPU, or a combination of a CPU and a hardware chip. The aforementioned hardware chip may be an ASIC, a PLD or a combination thereof. The aforementioned PLD may be CPLD, FPGA, GAL or any combination thereof. The processor 410 executes various types of digitally stored instructions, such as software or firmware programs stored in the memory 430, which enable the PCIe device 400 to provide a wide variety of services.

The memory 430 stores program codes, which are controlled and executed by the processor 410 to execute the steps described in the above-mentioned embodiment in FIG. In this application, the memory 430 further includes firmware, and the firmware includes capability attribute information, the processor 410 is used to load the firmware, and the communication interface 420 is used to send the capability attribute information.

The memory 430 may include a volatile memory, such as RAM; the memory 430 may also include a non-volatile memory, such as ROM, flash memory (flash memory); the memory 430 may also include a combination of the above types.

The communication interface 420 can be a wired interface (such as an Ethernet interface), an internal interface (such as a fast peripheral component interconnect express (PCIe) bus interface), a wired interface (such as an Ethernet interface) or a wireless interface (such as cellular network interface or use the wireless LAN interface) for communicating with other devices or modules.

It should be noted that FIG. 13 is only a possible implementation manner of the embodiment of the present application. In practical applications, the PCIe device may include more or fewer components, which is not limited here. Regarding the content that is not shown or described in the embodiment of the present application, refer to the relevant explanation in the embodiment of the foregoing method, and details are not repeated here.

The present application also provides a system. The system includes a computing device and at least one PCIe device, wherein the computing device may be the computing device 100 or 300 described above, and the PCIe device may be the PCIe device 200 or the PCIe device 400 described above. The computing device is electrically connected to at least one PCIe device. Optionally, the computing device can be connected to at least one PCIe device through one or more of the out-of-band interface SMBus interface, NC-SI interface, and UART interface, or through an in-band The interface PCIe interface or Ethernet interface is connected with at least one PCIe device.

The embodiment of the present application provides a computer program product. When the computer program product runs on the computing device, the computing device executes the method embodiment described in FIG. 2 of the present application; when the computer program product runs on the PCIe device , causing the PCIe device to execute the method embodiment described in FIG. 2 above in this application.

An embodiment of the present application provides a readable storage medium, including program instructions. When a computing device runs the program instructions, the computing device executes the method embodiment described in FIG. 2 above.

An embodiment of the present application provides a readable storage medium, including program instructions. When the PCIe device runs the program instructions, the PCIe device executes the method embodiment described in FIG. 2 above.

Those of ordinary skill in the art can realize that, in combination with the various method steps and units described in the embodiments disclosed herein, they can be implemented by electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the possibility of hardware and software For interchangeability, in the above description, the steps and components of each embodiment have been generally described according to their functions. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Those of ordinary skill in the art may implement the described functionality using different methods for each particular application, but such implementation should not be considered as exceeding the scope of the present application.

Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working process of the above-described system, device and unit can refer to the corresponding process in the foregoing method embodiment, and details are not repeated here.

In the several embodiments provided in this application, the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or can be Integrate into another system, or some features may be ignored, or not implemented. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices or units, and may also be electrical, mechanical or other forms of connection.

The unit described as a separate component may or may not be physically separated, and the component shown as a unit may or may not be a physical unit, that is, it may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment of the present application.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

If the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of software products, and the computer software products are stored in a storage medium In, several instructions are included to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods in the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (read-only memory, ROM), random access memory (random access memory, RAM), magnetic disk or optical disc and other media that can store program codes. .

In the above embodiments, all or part of them may be implemented by software, hardware, firmware or any combination thereof. When implemented using software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer program instructions. When the computer program instructions are loaded and executed on the computer, the processes or functions according to the embodiments of the present application will be generated in whole or in part. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program instructions may be sent from a website, computer, server, or data center through Wired or wireless transmission to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or a data center integrated with one or more available media. The available medium may be a magnetic medium (such as a floppy disk, a hard disk, or a magnetic tape), an optical medium (such as a digital video disc (digital video disc, DVD), or a semiconductor medium (such as a solid state disk), etc.

The above description is only the specific implementation of the application, but the scope of protection of the application is not limited thereto. Any person familiar with the technical field can easily think of various equivalent modifications within the technical scope disclosed in the application. Or replacement, these modifications or replacements should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (29)

1. A fast peripheral component interconnection PCIe device is characterized in that it includes a communication interface, a processor and a memory; wherein,

   The memory is used to store the firmware of the PCIe device, and the firmware includes capability attribute information of the PCIe device; the processor is used to load the firmware; and the communication interface is used to send the capability attribute information.
2. The device according to claim 1, characterized in that,

   The communication interface is also used to receive a command request; the command request is used to instruct to obtain the capability attribute information;

   The communication interface is also used to send response information; the response information includes the capability attribute information.
3. The device according to claim 1 or 2, wherein the communication interface includes an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous transceiver UART interface.
4. The device according to claim 1 or 2, wherein the communication interface includes an in-band interface; and the in-band interface is a PCIe interface or an Ethernet interface.
5. The device according to claim 3, wherein when the out-of-band interface is the NC-SI interface,

   The custom command field in the command request carries an instruction to obtain the capability attribute information;

   The capability attribute information is carried in the self-defined response field in the response information.
6. The device according to claim 4, wherein when the in-band interface is the PCIE interface,

   The platform-level data model PLDM protocol data field in the command request carries an instruction to obtain the capability attribute information;

   The PLDM protocol data field in the response information carries the capability attribute information.
7. The device according to any one of claims 1-6, wherein the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, and delay level and one or more of power consumption levels.
8. A system, characterized in that it comprises a computing device and at least one fast peripheral component interconnection PCIe device, the at least one PCIe device is connected to the computing device through a fast peripheral component interconnection PCIe bus, and the PCIe device stores firmware , the firmware includes capability attribute information of the PCIe device.
9. The system of claim 8, wherein

   The computing device is used to send a command request to the at least one PCIe device; the command request is used to indicate to obtain the capability attribute information of the PCIe device;

   The at least one PCIe device is used to send response information to the computing device respectively; the response information includes capability attribute information of the PCIe device;

   The computing device is further configured to manage the at least one PCIe device according to the received response information of the at least one PCIe device.
10. The system according to claim 9, wherein the computing device communicates with the at least one PCIe device through an out-of-band interface; the out-of-band interface includes a system management bus SMBus interface, a network controller sideband interface NC - One or more of SI and UART interfaces.
11. The system according to claim 9, wherein the computing device communicates with the at least one PCIe device through an in-band interface; the in-band interface includes the PCIe interface and/or the Ethernet interface.
12. The system according to claim 10, wherein when the out-of-band interface comprises the NC-SI interface,

    The custom command field in the command request carries an instruction to acquire capability attribute information;

    The capability attribute information is carried in the self-defined response field in the response information.
13. The system according to claim 11, wherein when the in-band interface comprises the PCIe interface,

    The platform-level data model PLDM protocol data field in the command request carries an instruction to acquire capability attribute information;

    The PLDM protocol data field in the response information carries the capability attribute information.
14. The system according to any one of claims 8-13, wherein the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, and delay level and one or more of power consumption levels.
15. A method for managing fast peripheral components to interconnect PCIe devices, characterized in that, comprising:

    The computing device sends a command request; the command request indicates to obtain the capability attribute information of the PCIe device;

    Receiving response information; the response information includes capability attribute information of the PCIe device;

    Manage the PCIe device according to the capability attribute information of the PCIe device.
16. The method according to claim 15, wherein the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or Universal Asynchronous Transceiver UART interface.
17. The method according to claim 15, wherein the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a PCIe interface for fast peripheral component interconnection or an Ethernet interface.
18. The method according to claim 16, wherein when the out-of-band interface is the NC-SI interface,

    The custom command field in the command request carries an instruction to acquire capability attribute information;

    The capability attribute information is carried in the self-defined response field in the response information.
19. The method according to claim 17, wherein when the in-band interface is the PCIe interface,

    The platform-level data model PLDM protocol data field in the command request carries an instruction to acquire capability attribute information;

    The PLDM protocol data field in the response information carries the capability attribute information.
20. The method according to any one of claims 15-19, wherein the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, and delay level and one or more of power consumption levels.
21. A method for managing fast peripheral components to interconnect PCIe devices, characterized in that, comprising:

    The PCIe device receives a command request; the command request indicates to obtain the capability attribute information of the PCIe device; the capability attribute information is stored in the firmware of the PCIe device;

    Sending response information based on the command request; the response information includes capability attribute information of the PCIe device.
22. The method according to claim 21, wherein the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a general asynchronous Transceiver UART interface.
23. The method according to claim 21, wherein the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a PCIe interface for fast peripheral component interconnection or an Ethernet interface.
24. The method according to claim 22, wherein when the out-of-band interface is the NC-SI interface,

    The PCIe device receives a command request, including:

    The PCIe device receives the command request sent by the computing device through the NC-SI interface; the custom command field in the command request carries an instruction to acquire capability attribute information;

    The sending response information based on the command request includes:

    Based on the command request, the response information is sent to the computing device through the NC-SI interface; the capability attribute information is carried in the self-defined response field in the response information.
25. The method according to claim 23, wherein when the in-band interface is the PCIe interface,

    The PCIe device receives a command request, including:

    The PCIe device receives the command request sent by the computing device through the PCIe interface, and the platform-level data model PLDM protocol data field in the command request carries an acquisition capability attribute information instruction;

    The sending response information based on the command request includes:

    Based on the command request, the response information is sent to the computing device through the PCIe interface; the PLDM protocol data field in the response information carries the capability attribute information.
26. The method according to any one of claims 21-25, wherein the capability attribute information includes port speed, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, and delay level and one or more of power consumption levels.
27. A computing device, characterized in that it includes a memory, a processor, and a communication interface, the communication interface is used to receive or send instructions, the memory is used to store instructions, and the processor is used to execute the instructions stored in the memory Carrying out the method described in any one of claims 15-20.
28. A computer-readable storage medium, characterized by comprising program instructions, and when the program instructions are executed by a computing device, the computing device executes the method according to any one of claims 15-20.
29. A computer-readable storage medium, characterized by comprising program instructions, and when the program instructions are executed by a PCIe device, the PCIe device is made to execute the method according to any one of claims 21-26.

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