CN115905074A

CN115905074A - Method and related device for managing peripheral component interconnect express (PCIe) equipment

Info

Publication number: CN115905074A
Application number: CN202111000311.4A
Authority: CN
Inventors: 李宇涛
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2021-08-27
Filing date: 2021-08-27
Publication date: 2023-04-04
Also published as: WO2023024619A1

Abstract

The application provides a method and a related device for managing peripheral component interconnect express (PCIe) equipment, wherein the PCIe equipment comprises a communication interface, a processor and a memory, wherein the memory is used for storing firmware of the PCIe equipment, and the firmware comprises capability attribute information of the PCIe equipment; the processor is used for loading the firmware; the communication interface is used for sending the capability attribute information. According to the method and the device, a storage space is developed in the firmware of the PCIe equipment and used for storing the capability attribute information, so that the PCIe equipment contains the capability attribute information, and a foundation and a convenient condition are provided for the management of the PCIe equipment by the computing equipment.

Description

Method and related device for managing peripheral component interconnect express (PCIe) equipment

Technical Field

The present application relates to the field of information technologies, and in particular, to a method and a related apparatus for managing peripheral component interconnect express (PCIe) devices.

Background

PCIe (peripheral component interconnect express) devices, such as a network card and an accelerator card, as PCIe peripherals of a processor system of a computing device, the implemented functional characteristics are gradually increased, so that the types of PCIe devices are also gradually increased, the coordination relationship with the computing device is more and more complex, and the requirement of the computing device on the configuration management of the PCIe device is higher and higher.

The computing device manages different PCIe devices according to the attribute information of each PCIe device, so the computing device needs to obtain the attribute information of each PCIe device currently connected to the computing device. Currently, attribute information of PCIe devices is pre-stored in a computing device, so that the computing device manages the PCIe devices according to the pre-stored attribute information. However, this method needs to update the capability attribute information stored in the computing device once every time the PCIe device connected to the computing device changes, which is inconvenient for the computing device to manage and maintain the PCIe devices.

Disclosure of Invention

The application discloses a method and a related device for managing peripheral component interconnect express (PCIe) equipment, wherein firmware is stored in the PCIe equipment and comprises capability attribute information of the PCIe equipment, so that a foundation is laid for management of the PCIe equipment.

In a first aspect, the present application provides a peripheral component interconnect express (PCIe) device, including a communication interface, a processor, and a memory, where the memory is configured to store a firmware of the PCIe device, and the firmware includes capability attribute information of the PCIe device; the processor is used for loading the firmware; the communication interface is used for sending the capability attribute information.

It can be seen that, the method and the device for storing the capability attribute information of the PCIe device open a space in the firmware of the memory of the PCIe device, so that the PCIe device includes the capability attribute information, and a foundation is laid for management of the PCIe device.

The capability attribute information refers to attribute information indicating a capability of the PCIe device, which is used to implement a certain function of the PCIe device. The value of the capability attribute information generally represents a maximum value or a limit value that can be reached by the PCIe device, when the PCIe device is in a working state, the working state value may not reach the value of the capability attribute information, and if the working state value exceeds the value of the capability attribute information for a long time, the PCIe device may stop working or work slowly or the PCIe device may be stopped, or may even be damaged.

Based on the first aspect, in a possible implementation manner, the communication interface is further configured to receive a command request; the command request is used for indicating to acquire the capability attribute information; the communication interface is also used for sending response information; the response information includes the capability attribute information.

It is to be understood that, on the condition that the capability attribute information is stored in the PCIe device, the PCIe device can receive a command request for instructing to acquire the capability attribute information through the communication interface, and can also send reply information including the capability attribute information through the communication interface.

Based on the first aspect, in a possible implementation manner, the communication interface includes an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

It can be seen that the communication interface for receiving the command request for obtaining the capability attribute information and sending the capability attribute information may be an out-of-band interface, such as an SMBus interface, an NC-SI interface, or a UART interface, and the out-of-band interface may also be another interface, which is not limited in this application.

Based on the first aspect, in a possible implementation manner, the communication interface includes an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

It can be seen that the communication interface for receiving the command request for obtaining the capability attribute information and sending the capability attribute information may also be an in-band interface, for example, a PCIe interface or an ethernet interface, and the in-band interface may also be another interface, which is not specifically limited in this application.

Based on the first aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, a custom command field in the command request carries an instruction to acquire the capability attribute information; and the self-defined response field in the response information carries the capability attribute information.

It is understood that when the communication interface is an NC-SI interface that is an out-of-band interface, the communication protocols supported by the NC-SI interface include an NC-SI protocol in which a format of a command request (i.e., the first command request message) and a format of response information (i.e., the first command response message) are defined. The method and the device expand the custom command field in the first command request message and the custom response field in the first command response message, so that the custom command field in the first command request message carries an instruction for acquiring the capability attribute information, and the custom response field in the first command response message carries the capability attribute information of the PCIe equipment. Therefore, when the PCIe device communicates with other devices, the first command request packet may be received through the NC-SI interface, where the first command request packet includes an instruction to acquire capability attribute information, and the first command response packet is sent through the NC-SI interface, where the first command response packet includes capability attribute information.

Based on the first aspect, in a possible implementation manner, when the communication interface is the PCIe interface, a data field of a platform-level data model PLDM protocol in the command request carries an instruction to acquire the capability attribute information; and the PLDM protocol data field in the response message carries the capability attribute information.

It is to be understood that, when the communication interface is an in-band interface PCIe interface, the communication protocols supported by the PCIe interface include a PLDM protocol, in which a format of the command request (i.e., the second command request packet) and a format of the response information (i.e., the second command response packet) are defined. The method and the device expand the PLDM protocol data field in the second command request message and the PLDM protocol data field in the second command response message, so that the PLDM protocol data field in the second command request message carries an instruction for acquiring the capability attribute information, and the PLDM protocol data field in the second command response message carries the capability attribute information of the PCIe equipment. Therefore, when the PCIe device communicates with another device, the second command request packet may be received through the PCIe interface, where the second command request packet includes an instruction to acquire capability attribute information, and the second command response packet is sent through the PCIe interface, where the second command response packet includes capability attribute information.

Based on the first aspect, in a possible implementation manner, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a time delay level, and a power consumption level.

It is to be understood that the capability attribute information may be one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, a size information thermal resistance, a delay level, and a power consumption level, and the capability attribute information may also be other information, which is not limited in this application.

In a second aspect, the present application provides a system comprising a computing device and at least one peripheral component interconnect express (PCIe) device, the at least one PCIe device is connected to the computing device via a PCIe bus, the PCIe device stores firmware, and the firmware includes capability attribute information of the PCIe device.

It can be understood that the computing device may be connected to at least one PCIe device, where the firmware of each PCIe device stores the capability attribute information of the device, which lays a foundation for the computing device to manage the at least one PCIe device and provides convenience. Based on the second aspect, in a possible implementation, the computing device is configured to send a command request to the at least one PCIe device; the command request is used for indicating to acquire the capability attribute information of the PCIe equipment; the at least one PCIe device is used for respectively sending response information to the computing devices; the response message comprises capability attribute information of the PCIe equipment; the computing device is further configured to manage the at least one PCIe device according to the received response information of the at least one PCIe device.

Based on the second aspect, in a possible implementation, the computing device communicates with the at least one PCIe device through an out-of-band interface; the out-of-band interface comprises one or more of a system management bus (SMBus) interface, a network controller sideband interface (NC-SI) and a universal asynchronous receiver/transmitter (UART) interface.

Based on the second aspect, in a possible implementation, the computing device communicates with the at least one PCIe device through an in-band interface; the in-band interface includes the PCIe interface and/or an Ethernet interface.

Based on the second aspect, in a possible implementation manner, when the out-of-band interface includes the NC-SI interface, a custom command field in the command request carries an instruction to acquire capability attribute information; and the self-defined response field in the response information carries the capability attribute information.

Based on the second aspect, in a possible implementation manner, when the in-band interface includes the PCIe interface, a platform level data model PLDM protocol data field in the command request carries an instruction to acquire capability attribute information; and the PLDM protocol data field in the response message carries the capability attribute information.

Based on the second aspect, in a possible implementation manner, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a time delay level and a power consumption level.

In a third aspect, the present application provides a method for managing a peripheral component interconnect express (PCIe) device, applied to a computing device side, including: the computing device sends a command request; the command request indicates to acquire capability attribute information of the PCIe device; receiving response information; the response message comprises capability attribute information of the PCIe equipment; and managing the PCIe equipment according to the capability attribute information of the PCIe equipment.

It can be seen that the computing device may send a command request for instructing to obtain capability attribute information of the PCIe device, and may also receive response information including the capability attribute information, and the computing device manages PCIe according to the received capability attribute information of the PCIe device.

Based on the third aspect, in a possible implementation, the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

Based on the third aspect, in a possible implementation, the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

Based on the third aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, a custom command field in the command request carries an instruction to acquire capability attribute information; and the self-defined response field in the response information carries the capability attribute information.

Based on the third aspect, in a possible implementation manner, when the in-band interface is the PCIe interface, a platform level data model PLDM protocol data field in the command request carries an instruction to acquire capability attribute information; and the PLDM protocol data field in the response message carries the capability attribute information.

Based on the third aspect, in a possible implementation manner, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a time delay level, and a power consumption level.

In a fourth aspect, the present application provides a method for managing a peripheral component interconnect express (PCIe) device, applied to a PCIe device side, including: the PCIe device receives a command request; the command request indicates to acquire the capability attribute information of the PCIe equipment; the capability attribute information is stored in firmware of the PCIe device; sending response information based on the command request; the response message includes capability attribute information of the PCIe device.

It can be seen that, in the application, the capability attribute information of the PCIe device is stored in the firmware of the PCIe device, which lays a foundation for management of the PCIe device. In addition, the PCIe device can receive a command request instructing to acquire capability attribute information, and can also transmit response information including the capability attribute information.

Based on the fourth aspect, in a possible implementation, the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

Based on the fourth aspect, in a possible implementation, the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

Based on the fourth aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the PCIe device receives a command request, including: the PCIe device receives the command request sent by the computing device through the NC-SI interface; a self-defined command field in the command request carries a command for acquiring capability attribute information; the sending of response information based on the command request comprises: sending the response information to the computing device through the NC-SI interface based on the command request; and the self-defined response field in the response information carries the capability attribute information.

Based on the fourth aspect, in a possible implementation manner, when the in-band interface is the PCIe interface, the PCIe device receives a command request, including: the PCIe device receives the command request sent by the computing device through the PCIe interface, and a Platform Level Data Model (PLDM) protocol data field in the command request carries a capability attribute information acquiring instruction; the sending of response information based on the command request comprises: sending a response message to the computing device over the PCIe interface based on the command request; and the PLDM protocol data field in the response message carries the capability attribute information.

Based on the fourth aspect, in a possible implementation manner, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a time delay level, and a power consumption level.

In a fifth aspect, the present application provides a computing device comprising: a sending module, configured to send a command request; the command request indicates to acquire capability attribute information of the PCIe device; the receiving module is used for receiving the response information; the response message comprises capability attribute information of the PCIe equipment; and the management module is used for managing the PCIe equipment according to the capability attribute information of the PCIe equipment.

Based on the fifth aspect, in a possible implementation, the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

Based on the fifth aspect, in a possible implementation, the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

Based on the fifth aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, a custom command field in the command request carries an instruction to acquire capability attribute information; and the self-defined response field in the response information carries the capability attribute information.

Based on the fifth aspect, in a possible implementation manner, when the in-band interface is the PCIe interface, a platform level data model PLDM protocol data field in the command request carries an instruction to acquire capability attribute information; and the PLDM protocol data field in the response message carries the capability attribute information.

Based on the fifth aspect, in a possible implementation manner, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a time delay level, and a power consumption level.

Each functional module of the fifth aspect is specifically configured to implement the method described in the third aspect or any possible implementation manner of the third aspect.

In a sixth aspect, the present application provides a PCIe device comprising: the storage module is used for storing the capability attribute information of the PCIe equipment; a receiving module for receiving a command request; the command request indicates to acquire capability attribute information of the PCIe device; a sending module, configured to send response information based on the command request; the response message includes capability attribute information of the PCIe device.

In a possible implementation form, the PCIe device communicates with the computing device through an out-of-band interface based on the sixth aspect; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

Based on the sixth aspect, in a possible implementation, the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

Based on the sixth aspect, in a possible implementation manner, when the out-of-band interface is the NC-SI interface, the receiving module is configured to receive the command request sent by the computing device through the NC-SI interface; a self-defined command field in the command request carries a command for acquiring capability attribute information; the sending module is used for sending the response information to the computing equipment through the NC-SI interface based on the command request; and the self-defined response field in the response information carries the capability attribute information.

Based on the sixth aspect, in a possible implementation manner, when the in-band interface is the PCIe interface, the receiving module is configured to receive the command request sent by the computing device through the PCIe interface; a data field of a Platform Level Data Model (PLDM) protocol in the command request carries an instruction for acquiring capability attribute information; the sending module is used for sending response information to the computing equipment through the PCIe interface based on the command request; and the PLDM protocol data field in the response message carries the capability attribute information.

Based on the sixth aspect, in a possible implementation manner, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a time delay level, and a power consumption level.

The functional modules of the sixth aspect are specifically configured to implement the method described in the fourth aspect or any possible implementation manner of the fourth aspect.

In a seventh aspect, the present application provides a further computing device, including a memory, a processor, and a communication interface, where the communication interface is configured to receive or send instructions, the memory is configured to store the instructions, and the processor is configured to execute the instructions stored in the memory to perform the method described in the third aspect or any possible implementation manner of the third aspect.

In an eighth aspect, the present application provides a computer-readable storage medium comprising program instructions that, when executed by a computing device, cause the computing device to perform the method described in the third aspect or any possible implementation manner of the third aspect.

In a ninth aspect, the present application provides a computer readable storage medium comprising program instructions which, when executed by a computing device, cause the computing device to perform the method described in the fourth aspect or any possible implementation of the fourth aspect.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic diagram of a system architecture provided herein;

FIG. 2 is a flowchart illustrating a method for managing PCIe devices according to the present application;

FIG. 3 is a schematic diagram of a connection relationship between a computing device and a PCIe device provided in the present application;

fig. 4 is a schematic diagram of an SMBus interface protocol specification provided in the present application;

fig. 5 is a schematic diagram of a format of an answer message provided in the present application;

FIG. 6 is a schematic diagram of a connection relationship between a computing device and a PCIe device provided herein;

fig. 7A is a schematic diagram of a first command request packet provided in the present application;

fig. 7B is a schematic diagram of a first command response packet provided in the present application;

FIG. 8 is a schematic diagram of a connection relationship between a computing device and a PCIe device provided by the present application;

fig. 9A is a schematic diagram of a second command request packet provided in the present application;

fig. 9B is a schematic diagram of a second command response message provided in the present application;

FIG. 10 is a schematic diagram of an apparatus of a computing device provided herein;

FIG. 11 is a schematic diagram of an apparatus for a PCIe device as provided herein;

FIG. 12 is an apparatus diagram of yet another computing device provided herein;

FIG. 13 is a schematic diagram of an apparatus for a PCIe device as provided in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

The terms "first" and "second" in the embodiments of the present application are used only for distinguishing different things, and are not used for representing important contents or sub-important contents. In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more.

To facilitate an understanding of the present application, the terms referred to in the present application will be first introduced.

Out-of-band (out-of-band) management refers to the realization of management and control of a network through a special management channel, the separation of management data from service data, and the establishment of an independent channel for the management data, wherein only management data, statistical information, charging information and the like are transmitted in the channel, and the management data is separated from the service data. The out-of-band management channel may be a system management bus (SMBus) interface, a network controller side band interface (NC-SI) interface, a universal asynchronous receiver/transmitter (UART) interface, or the like, and is referred to as an out-of-band interface. The out-of-band interface in the present application may be an SMBus interface, an NC-SI interface, a UART interface, or other interfaces, which is not specifically limited in the present application.

In-band (in-band) management refers to that management data and service data are transmitted by using the same network channel. The in-band management channels may be PCIe interfaces or ethernet interfaces, and are referred to as in-band interfaces. The in-band interface in the present application may be a PCIe interface, an ethernet interface, or a specific interface thereof, which is not specifically limited in the present application.

The system architecture to which the present application relates is described below.

Referring to fig. 1, fig. 1 is a schematic diagram of a system architecture according to the present application. In fig. 1, the PCIe interface is a bridge for communication between the computing device and the PCIe device.

The computing device is a master device having a PCIe interface. The computing device may be a terminal device, such as various types of servers, desktops, user Equipments (UEs), mobile phones (phones), tablets (pads), stereos, and so on; may be a machine smart device such as a self-driving (self-driving) device, a transportation safety (transportation safety) device, a Virtual Reality (VR) terminal device, an Augmented Reality (AR) terminal device, a Machine Type Communication (MTC) device, an industrial control (industrial control) device, a remote medical (remote medical) device, a smart grid (smart grid) device, a smart city (smart city) device, and the like; may be a car cabin (cockpit domain) device, or a module within a car cabin device, such as one or a combination of modules of a Cockpit Domain Controller (CDC), a camera, a screen, a microphone, a stereo, an electronic key, a keyless entry or start system controller, etc.; may be a data relay device such as a router, a repeater, a bridge or a switch, etc.; and may be a wearable device (e.g., a smart watch, smart bracelet, pedometer, etc.), and so forth. In some scenarios, the name of a host device with a similar PCIe interface may not be referred to as a computing device, but for convenience of description, the host device with the PCIe interface is referred to as the computing device in this embodiment of the present application.

A PCIe device is a slave device having a PCIe interface. For example, the PCIe device may be a network card, a Redundant Array of Independent Disks (RAID) card, a Graphics Processing Unit (GPU), a Solid State Disk (SSD), an accelerator card, a Fibre Channel (FC) card, a wireless broadband (IB) card, or the like. The PCIe device stores identification information, where the identification information refers to information for identifying the PCIe device, and may be one or more of four-tuple information, a board model (PN), a Serial Number (SN), and the like. The quadruple information comprises: the vendor identification number (VID), device identification number (DID), sub-vendor identification number (SVID), subsystem identification number (SSID) of the PCIe device, and the quad information is capable of uniquely identifying the PCIe device.

One computing device is connected with one or more PCIe devices, and in order to facilitate management of the PCIe devices, the computing device needs to acquire capability attribute information of the PCIe devices, thereby implementing management of each PCIe device. However, the PCIe device only stores the identification information and does not store the capability attribute information, so the computing device cannot directly obtain the capability attribute information from the PCIe device no matter in an in-band communication manner or an out-of-band communication manner.

The capability attribute information refers to attribute information indicating a capability of the PCIe device, which is used to implement a certain function of the PCIe device. The value of the capability attribute information generally represents a maximum value or a limit value that can be reached by the PCIe device, and when the PCIe device is in a working state, the working state value may not reach the value of the capability attribute information. For example, the capability attribute information may be one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristics, size information, a thermal resistance, a latency level, and a power consumption level. Wherein, the port rate represents the maximum transmission rate that the port of the PCIe device can reach; the cache capacity represents what the maximum cache capacity of the PCIe device is; the temperature threshold value represents the maximum temperature reached by the PCIe device, if the temperature of the PCIe device in a working state reaches or exceeds the temperature threshold value, the PCIe device is urgently required to be cooled, so that the temperature of the PCIe device is reduced, and if the PCIe device is in the temperature threshold value state for a long time or exceeds the temperature threshold value, the PCIe device stops working or works slowly or the PCIe device stops working, or even is possibly damaged; the network controller sideband interface characteristics comprise whether the PCIe equipment supports NC-SI characteristics and supported commands and parameters, and the parameters of the PCIe equipment can be configured according to the network controller sideband interface characteristics; the thermal resistance represents the ratio (thermal resistance unit is ℃/W) between the temperature difference (raised temperature) of the equipment and the power consumption difference, namely the temperature is raised by 1W power consumption, and the possible working temperature value of the PCIe equipment under the condition of power consumption increase can be calculated according to the thermal resistance value; the size information represents the size allowed by the PCIe device, and the size of the PCIe device comprises full height, full length, half height and half length; the latency level indicates how much time the information consumes to process in the PCIe device; the power consumption level represents the size of the power consumption of the PCIe device.

The application provides a method for obtaining capability attribute information of PCIe (peripheral component interconnect express) equipment by computing equipment, which comprises the following steps:

s101: the computing device prestores mapping relationships between identification information and capability attribute information of the PCIe device.

In an embodiment, the mapping relationship between the identification information and the capability attribute information of the PCIe device may be as shown in table 1, where table 1 only lists the mapping relationship between the identification information and the capability attribute information of the PCIe device, and the identification information uses quadruplet information capable of uniquely identifying the PCIe device: VID, DID, SVID, and SSID.

Optionally, the table 1 may further include a name of the device, that is, a correspondence between the identification information, the name of the device, and the capability attribute information, for example, the name of the device corresponding to the identification information VID1/DID1/SVID1/SSID1 is device 1, and the corresponding capability attribute information includes capability attribute 1, capability attribute 2, capability attribute 3, and capability attribute 4.

TABLE 1 mapping relationship between identification information and capability attribute information of PCIe devices

It is to be understood that table 1 herein is merely an example, and in practical applications, the content of the identification information and the capability attribute information of the PCIe devices in table 1, and the mapping relationship between the identification information of each PCIe device and each capability attribute information may all be different, for example, the identification information of different PCIe devices may have partially same capability attribute information, and table 1 may also include more or less mapping relationships, and the corresponding relationship may also be stored in other forms, which is not limited specifically herein.

S102: the computing device obtains identification information of the PCIe device through an in-band communication manner or an out-of-band communication manner.

S103: and the computing equipment determines the capability attribute information corresponding to the identification information of the PCIe equipment according to the acquired identification information of the PCIe equipment and the mapping relation between the identification information of the PCIe equipment and the capability attribute information.

In a specific embodiment, continuing to use table 1 as an example for description, assuming that the obtained identification information of the PCIe device is quadruplet information VID1/DID1/SVID1/SSID1 of the PCIe device, it can be known from the lookup table 1 that the capability attribute information corresponding to the quadruplet information is capability attribute 1, capability attribute 2, capability attribute 3, and capability attribute 4.

After the computing device determines the capability attribute information of the PCIe device, the computing device manages the PCIe device according to the capability attribute information of the PCIe device.

In the method for acquiring the capability attribute information of the PCIe device and managing the PCIe device according to the acquired capability attribute information, the computing device needs to store the mapping relationship between the identification information of each PCIe device and the capability attribute information in advance, that is, the capability attribute information of the PCIe device is stored externally.

The present application provides a method for managing PCIe devices, which is applied to a computing device, and referring to fig. 2, fig. 2 is a flowchart illustrating a method for managing PCIe devices provided in the present application, which includes but is not limited to the following description.

S201, the computing device sends a command request to the PCIe device, and correspondingly, the PCIe device receives the command request sent by the computing device, wherein the command request is used for indicating to acquire the capability attribute information of the PCIe device.

S202, the PCIe device returns response information to the computing device, and correspondingly, the computing device receives the response information returned by the PCIe device, wherein the response information comprises the capability attribute information of the PCIe device.

In the present application, the capability attribute information is stored in a section of memory space in firmware (firmware) in the memory of the PCIe device. The firmware is used to implement the function of the PCIe device, for example, the network card firmware implements network connection, message transceiving, protocol offloading, and the like of the network card. The meaning and examples of the capability attribute information are described in the above related contents, and are not described herein again for the sake of brevity of the description.

For example, referring to table 2, table 2 is a storage schematic table of capability attribute information in firmware provided by the present application. Wherein, capability attribute 1 may be a port rate of the PCIe device, capability attribute 2 may be a port line width of the PCIe device, capability attribute 3 may be a cache capacity of the PCIe device, capability attribute 4 may be an NC-SI characteristic, and so on. It is understood that table 2 is only an example, in practical applications, the content and the storage format of the capability attribute information of the PCIe device in table 2 may be different, and the application does not limit the storage format of the capability attribute information in the firmware.

Table 2 storage schematic table of capability attribute information in firmware

In one implementation, referring to fig. 3, the computing device interfaces with an SMBus interface on the PCIe device, and more particularly, the interface of the device management module of the computing device interfaces with an SMBus interface of the PCIe device, using an SMBus protocol to enable communication with the PCIe device. In addition, the computing device is also connected to the PCIe device through a PCIe interface, where the PCIe interface is a service interface for the PCIe device to communicate with a service system (e.g., a CPU system, an OS system) of the computing device.

The SMBus protocol specification defines an address resolution protocol ARP, and the ARP protocol defines a special address '1100001' to realize certain functions. As shown in fig. 4, fig. 4 is a functional schematic diagram of a special address "1100001" defined in the ARP protocol in the SMBus protocol specification, and it can be seen from fig. 4 that: in the ARP protocol, only the meanings of "0x01" to "0x04" command words are defined, where "0x01" indicates "Prepare to ARP", i.e. to Prepare to perform ARP operation, "0x02" indicates "Reset Device", i.e. to Reset the Device, and "0x03" indicates "Get UDID", i.e. to obtain a unique Device identifier, and "0x04" indicates "Assign Address", i.e. to Assign Address, "0x00" and "0x05" to "0x1F" are reserved command words and have no meaning defined.

In the application, the SMBus interface protocol specification is extended, and any reserved command word in the ARP protocol is defined as an instruction to acquire capability attribute information, for example, a "0x00" command word may be defined as an instruction to acquire capability attribute information, or any command word from "0x05" to "0x1F" may be defined as an instruction to acquire capability attribute information.

After SMBus interface protocol specification extension, the computing device sends a command request to the PCIe device through an SMBus interface, the command request indicates to acquire capability attribute information of the PCIe device, after receiving the command request, the PCIe device returns a response message to the computing device, the response message includes the capability attribute information of the PCIe device, wherein the form of the response message is shown in FIG. 5, a "slave node address" is "1100001", and a command word in a special address "1100001" is used; the "command" indicates an acquiring capability information instruction, and the content in the "command" is a specific command word indicating the acquiring capability information instruction, for example, if the "0x05" command word is defined as the acquiring capability attribute information instruction, the content in the "command" is 0x05, and if the "0x1F" command word is defined as the acquiring capability attribute information instruction, the content in the "command" is 0x1F; "data 1" to "data N" are used to store the capability attribute information. The format of the response information shown in fig. 5 is only an exemplary representation, and the format of the response information and the format of the capability attribute information are not particularly limited in the present application.

In yet another implementation, referring to FIG. 6, a computing device interfaces with an NC-SI interface on a PCIe device, and in particular, an interface of a device management module on the computing device interfaces with the NC-SI interface of the PCIe device. In addition, the computing device is also connected with the PCIe device through a PCIe interface, where the PCIe interface is a service interface for the PCIe device to transmit data with a service system (e.g., a CPU system, an OS system) of the computing device.

The NC-SI interface supports an NC-SI protocol, and the format of the first command message is defined in the NC-SI protocol, and comprises the format of a first command request message and the format of a first command response message. The present application extends a first command request message and a first command response message, specifically referring to fig. 7A and 7B, where fig. 7A is a format of the first command request message provided by the present application, and fig. 7B is a format of the first command response message provided by the present application. In fig. 7A, the destination address is FF-FF, that is, the broadcast address of the full F, the source address is the address of the device management module interface on the computing device, and the type is the ethernet type (the NC-SI interface is an interface on an ethernet card), and the command packet header indicates that the message is a command request message. In fig. 7B, both the destination address and the source address are FF-FF defined in the NC-SI protocol specification, the type is an ethernet type, and the command header indicates that the message is a command response message.

After a first command request message and a first command response message in the NC-SI protocol specification are expanded, the computing device sends the first command request message to the PCIe device through the NC-SI interface, wherein the first command request message comprises a command for acquiring capability attribute information, the PCIe device analyzes the message after receiving the message and returns the first command response message to the computing device, and the first command response message comprises capability attribute information of the PCIe device.

In still another implementation, referring to fig. 8, the computing device is connected to a PCIe interface on the PCIe device, specifically, the device management module of the computing device is connected to the PCIe device through the PCIe interface of the CPU system and performs communication, and although the connection is through the PCIe interface, the communication initiator is the device management module of the computing device and belongs to out-of-band communication. In addition, the PCIe interface is used as a service interface, and is further used for transmitting data between the CPU system or the OS system of the computing device and the PCIe device.

The PCIe interface carries Management Component Transport Protocol (MCTP), that is, MCTP over PCIe, the MCTP protocol is a management protocol framework, and the supported out-of-band management protocol includes a Platform Level Data Model (PLDM) protocol, and this embodiment uses a PLDM protocol structure, that is, PLDM over MCTP over PCIe. The format of the second command message is defined in the PLDM protocol, and includes the format of the second command request message and the format of the second command response message. The present application expands a second command request packet and a second command response packet, specifically referring to fig. 9A and 9B, where fig. 9A is a schematic format diagram of the second command request packet provided by the present application, and fig. 9B is a schematic format diagram of the second command response packet provided by the present application, and both the second command request packet and the second command response packet are composed of a PCIe protocol packet header, an MCTP protocol packet header, a PLDM protocol packet header, a checksum, a protocol type, and PLDM protocol data (payload), where the protocol type refers to a protocol type carried by the MCTP, and here is a PLDM protocol.

According to the method and the device, the second command request message and the second command response message are expanded, a 'PLDM protocol data' field in the second command request message carries a 'command for acquiring capability attribute information', and a 'PLDM protocol data' field in the second command response message is used for carrying capability attribute information. After the PLDM protocol is extended, the computing device sends a second command request message to the PCIe device through the PCIe interface, where the second command request message includes an instruction to acquire capability attribute information, and the PCIe device parses the message after receiving the second command request message, and returns a second command response message to the computing device, where the second command response message includes capability attribute information of the PCIe device, and the application does not limit the format of the capability attribute information.

It should be noted that the out-of-band management protocol supported by the MCTP protocol further includes an NC-SI protocol, that is, an NC-SI over MCTP over PCIe protocol structure, and the application may also use an NC-SI over MCTP over PCIe protocol structure to expand the request packet and the response packet, so that a certain field in the request packet carries the instruction for obtaining the capability attribute information, and a certain field in the response packet carries the capability attribute information. The computing device sends the command for obtaining the capability attribute information to the PCIe device by sending a request message, and the PCIe device analyzes the request message and returns a response message after receiving the request message, wherein the response message carries the capability attribute information.

It should be noted that, the present application makes functional extensions to the computing device and the PCIe device, including: the computing equipment has the authority and the capability of requesting to access the capability attribute information of the PCIe equipment, can send a command for acquiring the capability attribute information to the PCIe equipment, and also has the capability of analyzing the capability attribute information; the PCIe device has a capability of identifying and interpreting the command for obtaining capability attribute information, and the PCIe device defines an operation that needs to be executed after receiving the command for obtaining capability attribute information, for example, the PCIe device may define that, when receiving the command for obtaining capability attribute information, the PCIe device reads capability attribute information of the PCIe device itself, writes the capability attribute information into the response information, and sends the capability attribute information to the sending end device in the form of the response information. Specific definition forms and definition contents of how to send the command request of the capability attribute information obtaining instruction of the device and what operations need to be executed when the device receives the command request of the capability attribute information obtaining instruction are not particularly limited.

S203, the computing equipment manages the PCIe equipment according to the capability attribute information of the PCIe equipment.

In one embodiment, the PCIe devices are managed according to the PCIe device capability attribute information. For example, the obtained capability attribute information for the PCIe device includes a port rate, and the computing device displays the port rate on the interface. For another example, the capability attribute information obtained by the computing device includes NC-SI characteristics, and the computing device performs parameter configuration on the PCIe device according to the NC-SI characteristics; and so on.

In yet another embodiment, the computing device may further obtain status information of the PCIe device through in-band communication or out-of-band communication, and manage the PCIe device according to the status information and the capability attribute information. The status information includes information indicating a current operating status of the PCIe device, for example, the status information may be a current operating speed of a PCIe device port, a current temperature of the PCIe device, and the like. For example, the capability attribute information obtained by the computing device includes a temperature threshold, which in turn obtains a current temperature (status information) of the PCIe device, the computing device determines whether to activate the fan according to the current temperature and the temperature threshold, and controls to adjust a speed or a gear of the fan according to a difference between the current temperature and the temperature threshold. For another example, the capability attribute information obtained by the computing device includes cache capacity, and also obtains currently occupied capacity of the PCIe device, when the occupied capacity is close to the cache capacity, the working efficiency of the PCIe device may be reduced, and some functions of the PCIe device may be turned off to reduce the occupied capacity and improve the working efficiency.

The mode for the computing device to obtain the status information of the PCIe device may be an in-band communication mode or an out-of-band interface, which is not specifically limited in this application.

It can be seen that, in the present application, a storage space is developed in the firmware in the memory of the PCIe device for storing the capability attribute information, which provides a basis and convenience for the computing device to obtain the capability attribute information. In addition, the computing device and the PCIe device communicate through an out-of-band interface or an in-band interface, where the out-of-band interface may be, for example, an SMBus interface, an NC-SI interface, a UART interface, and the like, and the in-band interface may be, for example, a PCIe interface, an ethernet interface, and the like, and the communication protocol supports the transmission of the capability attribute information by extending the communication protocol, which is embodied in that: the computing device can send the command for acquiring the capability attribute information to the PCIe device through the out-of-band interface, and the PCIe device can identify the command for acquiring the capability attribute information, respond and return the capability attribute information to the computing device, so that the computing device receives the capability attribute information and realizes the configuration and management of the PCIe device according to the capability attribute information. By implementing the embodiment of the application, when the PCIe device is newly added to the computing device or the PCIe device connected to the computing device is upgraded, the computing device may directly obtain the capability attribute information from the PCIe device, and it is not necessary to pre-store information of the PCIe device or frequently update the information.

Referring to fig. 10, fig. 10 is a schematic diagram of an apparatus of a computing device 100 provided in the present application, where the computing device 100 includes:

a sending module 101, configured to send a command request; the command request indicates to acquire capability attribute information of the PCIe device; a receiving module 102, configured to receive a response message; the response message comprises the capability attribute information of the PCIe equipment; the management module 103 is configured to manage the PCIe device according to the capability attribute information of the PCIe device.

In a possible implementation, the computing device communicates with the PCIe device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

In a possible implementation, the computing device communicates with the PCIe device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

In a possible implementation mode, when the out-of-band interface is an NC-SI interface, a self-defined command field in a command request carries a command for acquiring capability attribute information; the self-defined response field in the response message carries the capability attribute information.

In a possible implementation mode, when the in-band interface is a PCIe interface, a data field of a Platform Level Data Model (PLDM) protocol in the command request carries a command for acquiring the capability attribute information; the PLDM protocol data field in the response message carries the capability attribute information.

In possible implementations, the capability attribute information includes one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristics, a size information thermal resistance, a latency level, and a power consumption level.

The functional modules of the computing device 100 are used for implementing the method described in the embodiment of fig. 2, and specific contents may refer to the description in the related contents of the embodiment of fig. 2, and for brevity of the description, are not repeated here.

Referring to fig. 11, fig. 11 is a schematic device diagram of a PCIe device 200 provided in the present application, where the PCIe device 200 includes:

a storage module 201, configured to store capability attribute information of PCIe devices; a receiving module 202, configured to receive a command request; the command request indicates to acquire capability attribute information of the PCIe device; a sending module 203, configured to send response information based on the command request; the response message includes capability attribute information of the PCIe device.

In a possible implementation, the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

In a possible implementation, the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

In a possible implementation manner, when the out-of-band interface is an NC-SI interface, the receiving module 202 is configured to receive, through the NC-SI interface, a first command request packet sent by the computing device; a self-defined command field in the first command request message carries an instruction for acquiring the capability attribute information; the sending module 203 is configured to send a first command response message to the computing device through the NC-SI interface based on the first command request message; the self-defined response field in the first command response message carries the capability attribute information.

In a possible implementation manner, when the in-band interface is the PCIe interface, the receiving module 202 is configured to receive, through the PCIe interface, a second command request packet sent by the computing device; a data field of a Platform Level Data Model (PLDM) protocol in the second command request message carries an instruction for acquiring the capability attribute information; the sending module 203 is configured to send a second command response message to the computing device through the PCIe interface based on the second command request message; the PLDM protocol data field in the second command response message carries capability attribute information.

In a possible implementation, the capability attribute information includes one or more of port rate, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

For specific content, reference may be made to the description in the related content of the embodiment of fig. 2 for details of the method for implementing the method described in the embodiment of fig. 2 by using the functional modules of the PCIe device 200, and for brevity of the description, no further description is given here.

Referring to fig. 12, fig. 12 is a schematic diagram of a hardware structure of a computing device 300 provided in the present application. The computing device 300 includes: a processor 310, a communication interface 320, and a memory 330. The processor 310, the communication interface 320, and the memory 330 may be connected to each other through an internal bus 340, or may communicate with each other through other means such as wireless transmission.

Taking the example of connection via bus 340, bus 340 may be a PCI bus or EISA bus, etc. The bus 340 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 12, but this is not intended to represent only one bus or type of bus.

The processor 310 may be constituted by at least one general-purpose processor, such as a CPU, or a combination of a CPU and a hardware chip. The hardware chips may be ASICs, PLDs, or a combination thereof. The aforementioned PLD may be a CPLD, an FPGA, a GAL, or any combination thereof. The processor 310 executes various types of digitally stored instructions, such as software or firmware programs stored in the memory 330, which enable the computing device 300 to provide a wide variety of services.

The memory 330 is used for storing program codes and is controlled by the processor 310 to execute the steps described in the embodiment of fig. 2, which may specifically refer to the related description of the above-mentioned embodiment, and details are not repeated here.

Memory 330 may include volatile memory, such as RAM; memory 330 may also include non-volatile memory, such as ROM, flash memory; memory 330 may also include combinations of the above categories.

The communication interface 320 may be a wired interface (e.g., an ethernet interface), may be an internal interface (e.g., a peripheral component interconnect express (PCIe) bus interface), a wired interface (e.g., an ethernet interface), or a wireless interface (e.g., a cellular network interface or a wireless lan interface), for communicating with other devices or modules.

It should be noted that fig. 12 is only one possible implementation manner of the embodiment of the present application, and in practical applications, the computing device may further include more or less components, which is not limited herein. For the content that is not shown or described in the embodiment of the present application, reference may be made to the related explanations in the embodiments of the foregoing method, which are not described herein again.

Referring to fig. 13, fig. 13 is a schematic diagram illustrating a hardware structure of a PCIe device 400 provided in the present application. The PCIe device 400 includes: a processor 410, a communication interface 420, and a memory 430. The processor 410, the communication interface 420, and the memory 430 may be connected to each other via an internal bus 440, or may communicate via other means such as wireless transmission.

For example, the bus 440 may be a PCI bus or an EISA bus, etc. The bus 440 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 13, but this is not intended to represent only one bus or type of bus.

The processor 410 may be constituted by at least one general-purpose processor, such as a CPU, or a combination of a CPU and a hardware chip. The hardware chip may be an ASIC, PLD, or a combination thereof. The aforementioned PLD may be a CPLD, an FPGA, a GAL, or any combination thereof. Processor 410 executes various types of digitally-stored instructions, such as software or firmware programs stored in memory 430, which enable PCIe device 400 to provide a wide variety of services.

The memory 430 stores program codes, and the processor 410 controls execution of the program codes to execute the steps described in the embodiment of fig. 2, which may specifically refer to the related description of the embodiment shown above, and details are not repeated here. In this application, the memory 430 further includes firmware, the firmware includes capability attribute information, the processor 410 is configured to load the firmware, and the communication interface 420 is configured to transmit the capability attribute information.

Memory 430 may include volatile memory, such as RAM; the memory 430 may also include non-volatile memory, such as ROM, flash memory; the memory 430 may also include a combination of the above categories.

The communication interface 420 may be a wired interface (e.g., an ethernet interface), may be an internal interface (e.g., a peripheral component interconnect express (PCIe) bus interface), a wired interface (e.g., an ethernet interface), or a wireless interface (e.g., a cellular network interface or using a wireless local area network interface) for communicating with other devices or modules.

It should be noted that fig. 13 is only one possible implementation manner of the embodiment of the present application, and in practical applications, the PCIe device may further include more or less components, which is not limited herein. For contents that are not shown or described in the embodiments of the present application, reference may be made to relevant explanations in the embodiments of the foregoing methods, and details are not described here again.

The present application also provides a system comprising a computing device, which may be the computing device 100 or 300 described above, and at least one PCIe device, which may be the PCIe device 200 or 400 described above. The computing device is electrically connected with at least one PCIe device, optionally, the computing device may be connected with the at least one PCIe device through one or more of an external interface SMBus interface, an NC-SI interface and a UART interface, and may also be connected with the at least one PCIe device through an internal interface PCIe interface or an Ethernet interface.

Embodiments of the present application provide a computer program product, which, when run on a computing device, causes the computing device to execute the method embodiment described in fig. 2 above in the present application; when the computer program product is run on a PCIe device, the PCIe device is caused to execute the method embodiment described in fig. 2 above.

An embodiment of the present application provides a readable storage medium, which includes program instructions, and when a computing device executes the program instructions, the computing device executes the method embodiment described in fig. 2.

An embodiment of the present application provides a readable storage medium, which includes program instructions, and when the program instructions are executed by a PCIe device, the PCIe device executes the method embodiment described in fig. 2.

Those of ordinary skill in the art will appreciate that the various method steps and elements described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of both, and that the steps and elements of the embodiments are generally described in the foregoing description as functional or software interchange, for the purpose of clearly illustrating the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, the disclosed system, apparatus and method can be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the unit is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may also be an electric, mechanical or other form of connection.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiments of the present application.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer program instructions. When loaded and executed on a computer, produce, in whole or in part, the procedures or functions according to the embodiments of the application. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer program instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer program instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center by wire or wirelessly. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that includes one or more of the available media. The available media may be magnetic media (e.g., floppy disks, hard disks, tapes), optical media (e.g., digital Video Disks (DVDs), or semiconductor media (e.g., solid state disks), among others.

The above description is only a specific embodiment of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of various equivalent modifications or substitutions within the technical scope of the present application, and these modifications or substitutions should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A peripheral component interconnect express (PCIe) device comprising a communication interface, a processor and a memory; wherein,

the memory is used for storing the firmware of the PCIe device, and the firmware comprises the capability attribute information of the PCIe device; the processor is used for loading the firmware; the communication interface is used for sending the capability attribute information.

2. The apparatus of claim 1,

the communication interface is further configured to receive a command request; the command request is used for indicating to acquire the capability attribute information;

the communication interface is also used for sending response information; the response information includes the capability attribute information.

3. The device of claim 1 or 2, wherein the communication interface comprises an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

4. The device of claim 1 or 2, wherein the communication interface comprises an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

5. The apparatus of claim 3, wherein when the out-of-band interface is the NC-SI interface,

a self-defined command field in the command request carries an instruction for acquiring the capability attribute information;

and the self-defined response field in the response information carries the capability attribute information.

6. The device of claim 4, wherein when the in-band interface is the PCIE interface,

a PLDM protocol data field of a platform-level data model in the command request carries an instruction for acquiring the capability attribute information;

and the PLDM protocol data field in the response message carries the capability attribute information.

7. The apparatus of any of claims 1-6, wherein the capability attribute information comprises one or more of port rate, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

8. The system is characterized by comprising a computing device and at least one peripheral component interconnect express (PCIe) device, wherein the at least one PCIe device is connected with the computing device through a PCIe bus, and the PCIe device stores firmware which comprises capability attribute information of the PCIe device.

9. The system of claim 8,

the computing device is to send a command request to the at least one PCIe device; the command request is used for indicating to acquire the capability attribute information of the PCIe equipment;

the at least one PCIe device is used for respectively sending response information to the computing device; the response message comprises capability attribute information of the PCIe equipment;

the computing device is further configured to manage the at least one PCIe device according to the received response information of the at least one PCIe device.

10. The system of claim 9, wherein the computing device and the at least one PCIe device communicate through an out-of-band interface; the out-of-band interface comprises one or more of a system management bus (SMBus) interface, a network controller sideband interface (NC-SI) and a universal asynchronous receiver/transmitter (UART) interface.

11. The system of claim 9, wherein the computing device and the at least one PCIe device communicate through an in-band interface; the in-band interface comprises the PCIe interface and/or an Ethernet interface.

12. The system of claim 10, wherein when the out-of-band interface comprises the NC-SI interface,

a self-defined command field in the command request carries a command for acquiring capability attribute information;

13. The system of claim 11, wherein when the in-band interface comprises the PCIe interface,

a data field of a Platform Level Data Model (PLDM) protocol in the command request carries an instruction for acquiring capability attribute information;

14. The system of any of claims 8-13, wherein the capability attribute information comprises one or more of a port rate, a cache capacity, a temperature threshold, a network controller sideband interface characteristic, size information, a thermal resistance, a latency level, and a power consumption level.

15. A method of managing peripheral component interconnect express (PCIe) devices, comprising:

the computing device sends a command request; the command request indicates to acquire the capability attribute information of the PCIe equipment;

receiving response information; the response message comprises capability attribute information of the PCIe equipment;

and managing the PCIe equipment according to the capability attribute information of the PCIe equipment.

16. The method of claim 15, wherein the computing device and the PCIe device communicate through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

17. The method of claim 15, wherein the computing device and the PCIe device communicate through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

18. The method of claim 16, wherein when the out-of-band interface is the NC-SI interface,

19. The method of claim 17, wherein when the in-band interface is the PCIe interface,

20. The method of any of claims 15-19, wherein the capability attribute information comprises one or more of port rate, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

21. A method of managing a peripheral component interconnect express (PCIe) device, comprising:

the PCIe device receives a command request; the command request indicates to acquire capability attribute information of the PCIe device; the capability attribute information is stored in firmware of the PCIe device;

sending response information based on the command request; the response message includes capability attribute information of the PCIe device.

22. The method of claim 21, wherein the PCIe device communicates with the computing device through an out-of-band interface; the out-of-band interface is a system management bus SMBus interface or a network controller sideband interface NC-SI or a universal asynchronous receiver/transmitter UART interface.

23. The method of claim 21, wherein the PCIe device communicates with the computing device through an in-band interface; the in-band interface is a peripheral component interconnect express (PCIe) interface or an Ethernet interface.

24. The method of claim 22, wherein when the out-of-band interface is the NC-SI interface,

the PCIe device receives a command request, including:

the PCIe device receives the command request sent by the computing device through the NC-SI interface; a self-defined command field in the command request carries a command for acquiring capability attribute information;

the sending of response information based on the command request comprises:

sending the response information to the computing device through the NC-SI interface based on the command request; and the self-defined response field in the response information carries the capability attribute information.

25. The method of claim 23, wherein when the in-band interface is the PCIe interface,

the PCIe device receives a command request, including:

the PCIe device receives the command request sent by the computing device through the PCIe interface, and a platform-level data model (PLDM) protocol data field in the command request carries a capability attribute information acquisition instruction;

the sending of response information based on the command request comprises:

sending the response information to the computing device through the PCIe interface based on the command request; and the PLDM protocol data field in the response message carries the capability attribute information.

26. The method of any of claims 21-25, wherein the capability attribute information comprises one or more of port rate, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

27. A computing device comprising a memory, a processor, and a communication interface, the communication interface to receive or transmit instructions, the memory to store instructions, and the processor to execute the instructions stored in the memory to perform the method of any of claims 15-20.

28. A computer readable storage medium comprising program instructions that, when executed by a computing device, cause the computing device to perform the method of any of claims 15-20.

29. A computer readable storage medium comprising program instructions that, when executed by a PCIe device, cause the PCIe device to perform the method of any one of claims 21 to 26.