WO2023013694A1 - Elastic wave apparatus and method for manufacturing elastic wave apparatus - Google Patents

Elastic wave apparatus and method for manufacturing elastic wave apparatus Download PDF

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WO2023013694A1
WO2023013694A1 PCT/JP2022/029841 JP2022029841W WO2023013694A1 WO 2023013694 A1 WO2023013694 A1 WO 2023013694A1 JP 2022029841 W JP2022029841 W JP 2022029841W WO 2023013694 A1 WO2023013694 A1 WO 2023013694A1
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substrate
piezoelectric layer
wave device
electrode fingers
viewed
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PCT/JP2022/029841
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French (fr)
Japanese (ja)
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毅 山根
誠二 甲斐
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株式会社村田製作所
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Publication of WO2023013694A1 publication Critical patent/WO2023013694A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/25Constructional features of resonators using surface acoustic waves

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  • the present disclosure relates to an elastic wave device and a method for manufacturing an elastic wave device.
  • Patent Document 1 describes an elastic wave device.
  • the present disclosure is intended to solve the above-described problems, and aims to suppress variations in chip size.
  • An acoustic wave device is a piezoelectric device having a first substrate, a first main surface overlapping the first substrate when viewed in a first direction, and a second main surface opposite to the first main surface. a layer, a functional electrode provided on at least one of the first main surface and the second main surface of the piezoelectric layer, and a second substrate facing the first main surface of the piezoelectric layer in the first direction. and a support portion that supports the second substrate between the first main surface of the piezoelectric layer and the second substrate, wherein the second substrate is the first substrate when viewed in the first direction.
  • the outer shape of the second substrate is inside the outer shape of the first substrate when viewed in the first direction, and the second substrate of the first substrate when viewed in a plane direction orthogonal to the first direction.
  • An edge face of at least one of the piezoelectric layer on the substrate side, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer is at least partially exposed.
  • a method of manufacturing an elastic wave device includes: a piezoelectric layer having a first main surface and a second main surface opposite to the first main surface; A first substrate formed at a position overlapping with a functional electrode provided on at least one of two main surfaces in a first direction, a second substrate facing the first main surface of the piezoelectric layer, and a support portion.
  • a bonding step of bonding through the first substrate a resist forming step of forming a resist on the second substrate after the bonding step; a polishing step of, after the etching step, polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it; and in the bonding step, a position where none of the piezoelectric layer on the second substrate side of the first substrate, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer is elastic
  • the resist is smaller than the area surrounded by the boundary when viewed in the first direction, and the outer shape of the resist is , inside the region surrounded by the boundary when viewed in the first direction
  • the piezoelectric layer on the second substrate side of the first substrate, the metal outside the piezoelectric layer, and the At least one of the silicon nitrides on the outside of the piezoelectric layer serves as a mask for regulating the outer
  • FIG. 1A is a perspective view showing an elastic wave device according to a first embodiment
  • FIG. 1B is a plan view showing the electrode structure of the first embodiment.
  • FIG. 2 is a cross-sectional view of a portion along line II-II of FIG. 1A.
  • FIG. 3A is a schematic cross-sectional view for explaining Lamb waves propagating through the piezoelectric layer of the comparative example.
  • FIG. 3B is a schematic cross-sectional view for explaining a thickness-shear primary mode bulk wave propagating through the piezoelectric layer of the first embodiment.
  • FIG. 4 is a schematic cross-sectional view for explaining the amplitude direction of a thickness-shear primary mode bulk wave propagating in the piezoelectric layer of the first embodiment.
  • FIG. 1A is a perspective view showing an elastic wave device according to a first embodiment
  • FIG. 1B is a plan view showing the electrode structure of the first embodiment.
  • FIG. 2 is a cross-sectional view of a portion along line II
  • FIG. 5 is an explanatory diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment.
  • FIG. 2 is an explanatory diagram showing the relationship between , and the fractional band.
  • FIG. FIG. 7 is a plan view showing an example in which a pair of electrodes are provided in the elastic wave device of the first embodiment.
  • FIG. 8 is a reference diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment.
  • FIG. 9 shows the ratio bandwidth when a large number of elastic wave resonators are configured in the elastic wave device of the first embodiment, and the phase rotation amount of the spurious impedance normalized by 180 degrees as the magnitude of the spurious. is an explanatory diagram showing the relationship between.
  • FIG. 9 shows the ratio bandwidth when a large number of elastic wave resonators are configured in the elastic wave device of the first embodiment, and the phase rotation amount of the spurious impedance normalized by 180 degrees as the magnitude of the spurious.
  • FIG. 10 is an explanatory diagram showing the relationship between d/2p, metallization ratio MR, and fractional bandwidth.
  • FIG. 11 is an explanatory diagram showing a map of the fractional band with respect to the Euler angles (0°, ⁇ , ⁇ ) of LiNbO 3 when d/p is infinitely close to 0.
  • FIG. 12 is a partially cutaway perspective view for explaining the elastic wave device according to the embodiment of the present disclosure.
  • 13 is a plan view showing an example of the elastic wave device according to the first embodiment;
  • FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 13.
  • FIG. 15 is a plan view of an acoustic wave element substrate of the acoustic wave device according to the first embodiment.
  • FIG. 16 is a plan view of a cover member of the elastic wave device according to the first embodiment
  • FIG. FIG. 17 is a schematic cross-sectional view for explaining a bonding process for forming a support member for the acoustic wave device substrate.
  • FIG. 18 is a schematic cross-sectional view for explaining an electrode forming process for forming functional electrodes of the acoustic wave device substrate.
  • FIG. 19 is a schematic cross-sectional view for explaining a first space portion forming step for forming the first space portion of the acoustic wave device substrate.
  • FIG. 20 is a schematic cross-sectional view for explaining a cover member forming process for forming the cover member.
  • FIG. 21 is a schematic cross-sectional view for explaining a bonding step of bonding the acoustic wave device substrate and the cover member via the supporting portion.
  • FIG. 22 is a schematic cross-sectional view for explaining a thinning step for thinning the second substrate.
  • FIG. 23 is a schematic cross-sectional view for explaining a through-via forming step for forming through-vias in the second substrate.
  • FIG. 24 is a schematic cross-sectional view for explaining a terminal electrode forming step for forming terminal electrodes on the second substrate.
  • FIG. 25 is a schematic cross-sectional view for explaining the step of forming an insulating film for insulating the periphery of the terminal electrode.
  • FIG. 26 is a schematic cross-sectional view for explaining a resist forming step of forming a resist on the second substrate.
  • FIG. 27 is a schematic cross-sectional view for explaining an etching step of dividing the second substrate into pieces and etching a part of the first substrate.
  • FIG. 28 is a cross-sectional view for explaining a polishing step of polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it.
  • FIG. 29 is a cross-sectional view showing an example of the elastic wave device according to the second embodiment.
  • FIG. 30 is a cross-sectional view showing an example of an elastic wave device according to the third embodiment.
  • FIG. 1A is a perspective view showing an elastic wave device according to a first embodiment
  • FIG. 1B is a plan view showing the electrode structure of the first embodiment.
  • the elastic wave device 1 of the first embodiment has a piezoelectric layer 2 made of LiNbO 3 .
  • the piezoelectric layer 2 may consist of LiTaO 3 .
  • the cut angle of LiNbO 3 and LiTaO 3 is Z-cut in the first embodiment.
  • the cut angles of LiNbO 3 and LiTaO 3 may be rotated Y-cut or X-cut.
  • the Y-propagation and X-propagation ⁇ 30° propagation orientations are preferred.
  • the thickness of the piezoelectric layer 2 is not particularly limited, it is preferably 50 nm or more and 1000 nm or less in order to effectively excite the thickness shear primary mode.
  • the piezoelectric layer 2 has a first main surface 2a and a second main surface 2b facing each other in the Z direction. Electrode fingers 3 and 4 are provided on the first main surface 2a.
  • the electrode finger 3 is an example of the "first electrode finger” and the electrode finger 4 is an example of the "second electrode finger”.
  • the multiple electrode fingers 3 are multiple “first electrode fingers” connected to the first busbar electrodes 5 .
  • the multiple electrode fingers 4 are multiple “second electrode fingers” connected to the second busbar electrodes 6 .
  • the plurality of electrode fingers 3 and the plurality of electrode fingers 4 are interdigitated with each other.
  • an IDT (Interdigital Transducer) electrode including electrode fingers 3 , electrode fingers 4 , first busbar electrodes 5 , and second busbar electrodes 6 is configured.
  • the electrode fingers 3 and 4 have a rectangular shape and a length direction.
  • the electrode finger 3 and the electrode finger 4 adjacent to the electrode finger 3 face each other in a direction perpendicular to the length direction.
  • Both the length direction of the electrode fingers 3 and 4 and the direction orthogonal to the length direction of the electrode fingers 3 and 4 are directions that intersect the thickness direction of the piezoelectric layer 2 . Therefore, it can be said that the electrode finger 3 and the electrode finger 4 adjacent to the electrode finger 3 face each other in the direction intersecting the thickness direction of the piezoelectric layer 2 .
  • the thickness direction of the piezoelectric layer 2 is defined as the Z direction (or first direction)
  • the length direction of the electrode fingers 3 and 4 is defined as the Y direction (or second direction)
  • the electrode fingers 3 and electrode fingers 4 may be described as the X direction (or the third direction).
  • the length direction of the electrode fingers 3 and 4 may be interchanged with the direction orthogonal to the length direction of the electrode fingers 3 and 4 shown in FIGS. 1A and 1B. That is, in FIGS. 1A and 1B, the electrode fingers 3 and 4 may extend in the direction in which the first busbar electrodes 5 and the second busbar electrodes 6 extend. In that case, the first busbar electrode 5 and the second busbar electrode 6 extend in the direction in which the electrode fingers 3 and 4 extend in FIGS. 1A and 1B.
  • a pair of structures in which the electrode fingers 3 connected to one potential and the electrode fingers 4 connected to the other potential are adjacent to each other are arranged in a direction perpendicular to the length direction of the electrode fingers 3 and 4. Multiple pairs are provided.
  • the electrode finger 3 and the electrode finger 4 are adjacent to each other, not when the electrode finger 3 and the electrode finger 4 are arranged so as to be in direct contact, but when the electrode finger 3 and the electrode finger 4 are arranged with a gap therebetween. It refers to the case where the When the electrode finger 3 and the electrode finger 4 are adjacent to each other, there are electrodes connected to the hot electrode and the ground electrode, including other electrode fingers 3 and 4, between the electrode finger 3 and the electrode finger 4. is not placed.
  • the logarithms need not be integer pairs, but may be 1.5 pairs, 2.5 pairs, or the like.
  • the center-to-center distance, that is, the pitch, between the electrode fingers 3 and 4 is preferably in the range of 1 ⁇ m or more and 10 ⁇ m or less. Further, the center-to-center distance between the electrode fingers 3 and 4 means the center of the width dimension of the electrode fingers 3 in the direction orthogonal to the length direction of the electrode fingers 3 and the distance orthogonal to the length direction of the electrode fingers 4 . It is the distance connecting the center of the width dimension of the electrode finger 4 in the direction of
  • the electrode fingers 3 and 4 when at least one of the electrode fingers 3 and 4 is plural (when there are 1.5 or more pairs of electrodes when the electrode fingers 3 and 4 are paired as a pair of electrode pairs), the electrode fingers 3.
  • the center-to-center distance of the electrode fingers 4 refers to the average value of the center-to-center distances of adjacent electrode fingers 3 and electrode fingers 4 among 1.5 or more pairs of electrode fingers 3 and electrode fingers 4 .
  • the width of the electrode fingers 3 and 4 that is, the dimension in the facing direction of the electrode fingers 3 and 4 is preferably in the range of 150 nm or more and 1000 nm or less.
  • the center-to-center distance between the electrode fingers 3 and 4 is the distance between the center of the dimension (width dimension) of the electrode finger 3 in the direction perpendicular to the length direction of the electrode finger 3 and the length of the electrode finger 4. It is the distance connecting the center of the dimension (width dimension) of the electrode finger 4 in the direction orthogonal to the direction.
  • the direction orthogonal to the length direction of the electrode fingers 3 and 4 is the direction orthogonal to the polarization direction of the piezoelectric layer 2 .
  • “perpendicular” is not limited to being strictly perpendicular, but substantially perpendicular (the angle formed by the direction perpendicular to the length direction of the electrode fingers 3 and electrode fingers 4 and the polarization direction is, for example, 90° ⁇ 10°).
  • a support substrate 8 is laminated on the second main surface 2b side of the piezoelectric layer 2 with an intermediate layer 7 interposed therebetween.
  • the intermediate layer 7 and the support substrate 8 have a frame shape and, as shown in FIG. 2, openings 7a and 8a.
  • a space (air gap) 9 is thereby formed.
  • the space 9 is provided so as not to disturb the vibration of the excitation region C of the piezoelectric layer 2 . Therefore, the support substrate 8 is laminated on the second main surface 2b with the intermediate layer 7 interposed therebetween at a position not overlapping the portion where at least one pair of electrode fingers 3 and 4 are provided. Note that the intermediate layer 7 may not be provided. Therefore, the support substrate 8 can be directly or indirectly laminated to the second main surface 2b of the piezoelectric layer 2 .
  • the intermediate layer 7 is made of silicon oxide.
  • the intermediate layer 7 can be formed of an appropriate insulating material other than silicon oxide, such as silicon nitride and alumina.
  • the support substrate 8 is made of Si.
  • the plane orientation of the surface of Si on the piezoelectric layer 2 side may be (100), (110), or (111).
  • high-resistance Si having a resistivity of 4 k ⁇ or more is desirable.
  • the support substrate 8 can also be constructed using an appropriate insulating material or semiconductor material.
  • Materials for the support substrate 8 include, for example, aluminum oxide, lithium tantalate, lithium niobate, piezoelectric materials such as crystal, alumina, magnesia, sapphire, silicon nitride, aluminum nitride, silicon carbide, zirconia, cordierite, mullite, and steer.
  • Various ceramics such as tight and forsterite, dielectrics such as diamond and glass, and semiconductors such as gallium nitride can be used.
  • the plurality of electrode fingers 3, electrode fingers 4, first busbar electrodes 5, and second busbar electrodes 6 are made of an appropriate metal or alloy such as Al or an AlCu alloy.
  • the electrode fingers 3, the electrode fingers 4, the first busbar electrodes 5, and the second busbar electrodes 6 have a structure in which an Al film is laminated on a Ti film. Note that an adhesion layer other than the Ti film may be used.
  • an AC voltage is applied between the multiple electrode fingers 3 and the multiple electrode fingers 4 . More specifically, an AC voltage is applied between the first busbar electrode 5 and the second busbar electrode 6 . As a result, it is possible to obtain resonance characteristics using a thickness-shear primary mode bulk wave excited in the piezoelectric layer 2 .
  • d/p is set to 0.5 or less.
  • the thickness-shear primary mode bulk wave is effectively excited, and good resonance characteristics can be obtained. More preferably, d/p is 0.24 or less, in which case even better resonance characteristics can be obtained.
  • the electrode fingers 3 and the electrode fingers 4 When at least one of the electrode fingers 3 and the electrode fingers 4 is plural as in the first embodiment, that is, when the electrode fingers 3 and the electrode fingers 4 form a pair of electrodes, the electrode fingers 3 and the electrode fingers When there are 1.5 pairs or more of 4, the center-to-center distance p between the adjacent electrode fingers 3 and 4 is the average distance between the center-to-center distances between the adjacent electrode fingers 3 and 4 .
  • the acoustic wave device 1 of the first embodiment has the above configuration, even if the logarithms of the electrode fingers 3 and 4 are reduced in an attempt to reduce the size, the Q value is unlikely to decrease. This is because the resonator does not require reflectors on both sides, and the propagation loss is small. The reason why the above reflector is not required is that the bulk wave of the thickness-shlip primary mode is used.
  • FIG. 3A is a schematic cross-sectional view for explaining Lamb waves propagating through the piezoelectric layer of the comparative example.
  • FIG. 3B is a schematic cross-sectional view for explaining a thickness-shear primary mode bulk wave propagating through the piezoelectric layer of the first embodiment.
  • FIG. 4 is a schematic cross-sectional view for explaining the amplitude direction of a thickness-shear primary mode bulk wave propagating in the piezoelectric layer of the first embodiment.
  • FIG. 3A shows an acoustic wave device as described in Patent Document 1, in which Lamb waves propagate through the piezoelectric layer.
  • waves propagate through the piezoelectric layer 201 as indicated by arrows.
  • the piezoelectric layer 201 has a first principal surface 201a and a second principal surface 201b, and the thickness direction connecting the first principal surface 201a and the second principal surface 201b is the Z direction.
  • the X direction is the direction in which the electrode fingers 3 and 4 of the IDT electrodes are aligned.
  • the Lamb wave the wave propagates in the X direction as shown.
  • the wave is applied to the first main surface 2a and the second main surface 2b of the piezoelectric layer 2. , that is, in the Z direction, and resonates. That is, the X-direction component of the wave is significantly smaller than the Z-direction component. Further, since resonance characteristics are obtained by propagating waves in the Z direction, no reflector is required. Therefore, no propagation loss occurs when propagating to the reflector. Therefore, even if the number of electrode pairs consisting of the electrode fingers 3 and 4 is reduced in an attempt to promote miniaturization, the Q value is unlikely to decrease.
  • the amplitude direction of the bulk wave of the primary thickness-shear mode is the first region 251 included in the excitation region C (see FIG. 1B) of the piezoelectric layer 2 and the first region 251 included in the excitation region C (see FIG. 1B). 2 area 252 is reversed.
  • FIG. 4 schematically shows bulk waves when a voltage is applied between the electrode fingers 3 so that the electrode fingers 4 have a higher potential than the electrode fingers 3 .
  • the first region 251 is a region of the excitation region C between the virtual plane VP1 that is orthogonal to the thickness direction of the piezoelectric layer 2 and bisects the piezoelectric layer 2 and the first main surface 2a.
  • the second region 252 is a region of the excitation region C between the virtual plane VP1 and the second main surface 2b.
  • At least one pair of electrodes consisting of the electrode fingers 3 and 4 is arranged. It is not always necessary to have a plurality of pairs of electrode pairs. That is, it is sufficient that at least one pair of electrodes is provided.
  • the electrode finger 3 is an electrode connected to a hot potential
  • the electrode finger 4 is an electrode connected to a ground potential.
  • the electrode finger 3 may be connected to the ground potential and the electrode finger 4 to the hot potential.
  • the at least one pair of electrodes are, as described above, electrodes connected to a hot potential or electrodes connected to a ground potential, and no floating electrodes are provided.
  • FIG. 5 is an explanatory diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment.
  • the design parameters of the acoustic wave device 1 that obtained the resonance characteristics shown in FIG. 5 are as follows.
  • Piezoelectric layer 2 LiNbO3 with Euler angles (0°, 0°, 90°) Thickness of piezoelectric layer 2: 400 nm
  • Length of excitation region C (see FIG. 1B): 40 ⁇ m Number of electrode pairs consisting of electrode fingers 3 and 4: 21 pairs Center-to-center distance (pitch) between electrode fingers 3 and 4: 3 ⁇ m Width of electrode fingers 3 and 4: 500 nm d/p: 0.133
  • Middle layer 7 Silicon oxide film with a thickness of 1 ⁇ m
  • Support substrate 8 Si
  • the excitation region C (see FIG. 1B) is a region where the electrode fingers 3 and 4 overlap when viewed in the X direction perpendicular to the length direction of the electrode fingers 3 and 4. .
  • the length of the excitation region C is the dimension along the length direction of the electrode fingers 3 and 4 of the excitation region C. As shown in FIG.
  • the inter-electrode distances of the electrode pairs consisting of the electrode fingers 3 and 4 are all equal in a plurality of pairs. That is, the electrode fingers 3 and the electrode fingers 4 are arranged at equal pitches.
  • d/p is 0.5 or less, more preferably 0. .24 or less. This will be explained with reference to FIG.
  • FIG. 6 shows d/2p, where p is the center-to-center distance between adjacent electrodes or the average distance of the center-to-center distances, and d is the average thickness of the piezoelectric layer 2. It is an explanatory view showing the relationship with the fractional bandwidth as.
  • At least one pair of electrodes may be one pair, and the above p is the center-to-center distance between adjacent electrode fingers 3 and 4 in the case of one pair of electrodes. In the case of 1.5 pairs or more of electrodes, the average distance between the centers of adjacent electrode fingers 3 and 4 should be p.
  • the thickness d of the piezoelectric layer 2 if the piezoelectric layer 2 has variations in thickness, a value obtained by averaging the thickness may be adopted.
  • FIG. 7 is a plan view showing an example in which a pair of electrodes are provided in the elastic wave device of the first embodiment.
  • a pair of electrodes having electrode fingers 3 and 4 are provided on first main surface 2 a of piezoelectric layer 2 .
  • K in FIG. 7 is the intersection width.
  • the number of pairs of electrodes may be one. Even in this case, if the above d/p is 0.5 or less, it is possible to effectively excite the bulk wave in the primary mode of thickness shear.
  • the excitation region is an overlapping region of the plurality of electrode fingers 3 and 4 when viewed in the direction in which any adjacent electrode fingers 3 and 4 are facing each other. It is desirable that the metallization ratio MR of the adjacent electrode fingers 3 and 4 with respect to the region C satisfies MR ⁇ 1.75(d/p)+0.075. In that case, spurious can be effectively reduced. This will be described with reference to FIGS. 8 and 9. FIG.
  • FIG. 8 is a reference diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment.
  • a spurious signal indicated by an arrow B appears between the resonance frequency and the anti-resonance frequency.
  • d/p 0.08 and the Euler angles of LiNbO 3 (0°, 0°, 90°).
  • the metallization ratio MR was set to 0.35.
  • the metallization ratio MR will be explained with reference to FIG. 1B.
  • the excitation region C is the portion surrounded by the dashed-dotted line.
  • the excitation region C is a region where the electrode fingers 3 and 4 overlap with the electrode fingers 4 when viewed in a direction perpendicular to the length direction of the electrode fingers 3 and 4, that is, in a facing direction. a region where the electrode fingers 3 overlap each other; and a region between the electrode fingers 3 and 4 where the electrode fingers 3 and 4 overlap each other.
  • the area of the electrode fingers 3 and 4 in the excitation region C with respect to the area of the excitation region C is the metallization ratio MR. That is, the metallization ratio MR is the ratio of the area of the metallization portion to the area of the excitation region C.
  • the ratio of the metallization portion included in the entire excitation region C to the total area of the excitation region C should be MR.
  • FIG. 9 shows the ratio bandwidth when a large number of elastic wave resonators are configured in the elastic wave device of the first embodiment, and the phase rotation amount of the spurious impedance normalized by 180 degrees as the magnitude of the spurious. is an explanatory diagram showing the relationship between. The ratio band was adjusted by changing the film thickness of the piezoelectric layer 2 and the dimensions of the electrode fingers 3 and 4 .
  • FIG. 9 shows the results when the piezoelectric layer 2 made of Z-cut LiNbO 3 is used, but the same tendency is obtained when the piezoelectric layer 2 with other cut angles is used.
  • the spurious is as large as 1.0.
  • the fractional band exceeds 0.17, that is, exceeds 17%, a large spurious with a spurious level of 1 or more changes the parameters constituting the fractional band, even if the passband appear within. That is, as in the resonance characteristics shown in FIG. 8, a large spurious component indicated by arrow B appears within the band. Therefore, the specific bandwidth is preferably 17% or less. In this case, by adjusting the film thickness of the piezoelectric layer 2 and the dimensions of the electrode fingers 3 and 4, the spurious response can be reduced.
  • FIG. 10 is an explanatory diagram showing the relationship between d/2p, metallization ratio MR, and fractional bandwidth.
  • various elastic wave devices 1 with different d/2p and MR were configured, and the fractional bandwidth was measured.
  • the hatched portion on the right side of the dashed line D in FIG. 10 is the area where the fractional bandwidth is 17% or less.
  • FIG. 11 is an explanatory diagram showing a map of the fractional band with respect to the Euler angles (0°, ⁇ , ⁇ ) of LiNbO 3 when d/p is infinitely close to 0.
  • FIG. A hatched portion in FIG. 11 is a region where a fractional bandwidth of at least 5% or more is obtained. When the range of the area is approximated, it becomes the range represented by the following formulas (1), (2) and (3).
  • Equation (1) (0° ⁇ 10°, 20° to 80°, 0° to 60° (1-( ⁇ -50) 2 /900) 1/2 ) or (0° ⁇ 10°, 20° to 80°, [180 °-60° (1-( ⁇ -50) 2 /900) 1/2 ] ⁇ 180°) Equation (2) (0° ⁇ 10°, [180°-30°(1-( ⁇ -90) 2 /8100) 1/2 ] ⁇ 180°, arbitrary ⁇ ) Equation (3)
  • the fractional band can be sufficiently widened, which is preferable.
  • FIG. 12 is a partially cutaway perspective view for explaining the elastic wave device according to the embodiment of the present disclosure.
  • the outer peripheral edge of the space 9 is indicated by a dashed line.
  • the elastic wave device of the present disclosure may utilize plate waves.
  • the elastic wave device 301 has reflectors 310 and 311 as shown in FIG. Reflectors 310 and 311 are provided on both sides of the electrode fingers 3 and 4 of the piezoelectric layer 2 in the acoustic wave propagation direction.
  • a Lamb wave as a plate wave is excited by applying an AC electric field to the electrode fingers 3 and 4 on the space 9.
  • the reflectors 310 and 311 are provided on both sides, it is possible to obtain resonance characteristics due to Lamb waves as Lamb waves.
  • the elastic wave devices 1 and 101 use bulk waves in the primary mode of thickness shear.
  • the first electrode finger 3 and the second electrode finger 4 are adjacent electrodes, the thickness of the piezoelectric layer 2 is d, and the center of the first electrode finger 3 and the second electrode finger 4 is d/p is set to 0.5 or less, where p is the distance between them.
  • the Q value can be increased even if the elastic wave device is miniaturized.
  • the piezoelectric layer 2 is made of lithium niobate or lithium tantalate.
  • the first principal surface 2a or the second principal surface 2b of the piezoelectric layer 2 has a first electrode finger 3 and a second electrode finger 4 facing each other in a direction intersecting the thickness direction of the piezoelectric layer 2. and the second electrode fingers 4 are desirably covered with a protective film.
  • FIG. 13 is a plan view showing an example of the elastic wave device according to the first embodiment.
  • FIG. 13 is a plan view of the acoustic wave device from the side where the acoustic wave device substrate 10 is provided.
  • 14 is a cross-sectional view taken along line XIV-XIV in FIG. 13.
  • the elastic wave device according to the first embodiment includes an elastic wave element substrate 10 and a cover member 40.
  • the acoustic wave device substrate 10 and the cover member 40 are joined by a support portion.
  • the support is a member that includes the first metal layer 35, the second metal layer 14 and the seal metal layers 43,44. In the following description, one of the directions parallel to the Z direction may be described as upward.
  • the outermost closed line in the outline of the range occupied by a certain member will be described as the outer shape of that member.
  • a surface that overlaps the outer shape of a certain member when viewed in the Z direction and is not substantially parallel to the XY plane is defined as an end face of the outer shape of the member.
  • FIG. 15 is a plan view of the elastic wave element substrate of the elastic wave device according to the first embodiment.
  • FIG. 15 is a plan view of the acoustic wave device substrate 10 from the side where the cover member 40 is provided.
  • the acoustic wave device substrate 10 is a member having at least one functional electrode 30.
  • the acoustic wave device substrate 10 includes two functional electrodes 30 , a supporting member, the piezoelectric layer 2 , the first metal layer 35 , the second metal layer 14 and the dielectric film 19 .
  • the support member is a member provided with the support substrate 8 .
  • the support substrate 8 is an example of a "first substrate".
  • the support substrate 8 is, for example, a silicon substrate.
  • the support member further comprises an intermediate layer 7 .
  • the intermediate layer 7 is laminated on the support substrate 8 .
  • the intermediate layer 7 is, for example, a layer made of silicon oxide. Note that the intermediate layer 7 is not an essential component.
  • the line that is the outline of the support substrate 8 will be described as a line P1.
  • the region surrounded by the line P1, that is, the region overlapping the support substrate 8 may be described as the inside of the line P1.
  • a region that is not inside the line P1, that is, a region that does not overlap the support substrate 8 when viewed in plan in the Z direction may be described as being outside the line P1.
  • the support member is provided with a first space 91 and a drawer passage 9A.
  • the first space 91 and the extraction passage 9A are spaces formed by etching the sacrificial layer.
  • the first space 91 and the extraction passage 9A are provided at positions overlapping at least a portion of the functional electrode 30 when viewed in the Z direction.
  • the first space 91 and the extraction passage 9A are formed in the intermediate layer 7.
  • the first space 91 is a space corresponding to the space 9 shown in FIG.
  • the drawer passage 9A is a space that communicates with a through hole 2H, which will be described later. Note that the first space 91 and the extraction passage 9A may be provided in the support substrate 8 .
  • the piezoelectric layer 2 is laminated on the supporting member. As shown in FIG. 14, in the first embodiment, the piezoelectric layer 2 is provided on the support substrate 8 with the intermediate layer 7 interposed therebetween.
  • the piezoelectric layer 2 contains, for example, lithium niobate or lithium tantalate, and may further contain unavoidable impurities. It should be noted that the piezoelectric layer 2 is laminated on the support substrate 8 if the support member does not have the intermediate layer 7 .
  • the piezoelectric layer 2 has a first main surface 2a and a second main surface 2b.
  • the first main surface 2 a is the main surface of the piezoelectric layer 2 on the second substrate 41 side.
  • the second main surface 2b is a main surface opposite to the first main surface 2a, and is the main surface of the piezoelectric layer 2 on the support substrate 8 side.
  • the outer shape of the piezoelectric layer 2 is the same as the outer shape of the support substrate 8 . That is, the outer shape of the piezoelectric layer 2 overlaps the line P1 when viewed from above in the Z direction. As a result, variations in chip size can be suppressed.
  • the piezoelectric layer 2 is provided with through holes 2H. As shown in FIG. 15, the through hole 2H is provided so as to overlap with the drawer passage 9A. The through hole 2H communicates with the drawer passage 9A, and can be said to penetrate the space 9 via the drawer passage 9A. This makes it difficult for the stress applied to the piezoelectric layer 2 to concentrate. As a result, cracks occurring in the piezoelectric layer 2 starting from the through holes 2H are suppressed.
  • the functional electrodes 30 are connected to the first busbar electrode 5 and the second busbar electrode 6 facing each other, the electrode fingers 3 connected to the first busbar electrode 5, and the second busbar electrode 6 shown in FIG. 1B. It is an IDT electrode having electrode fingers 4 that are connected to each other.
  • the functional electrode 30 is provided on at least one of the first principal surface 2 a and the second principal surface 2 b of the piezoelectric layer 2 . In the first embodiment, the functional electrode 30 is provided on the first main surface 2a of the piezoelectric layer 2. As shown in FIG. That is, the functional electrode 30 is arranged inside the second space 92, which will be described later.
  • the first metal layer 35 and the second metal layer 14 are supporting portions that support the cover member 40 on the acoustic wave device substrate 10 .
  • the first metal layer 35 is provided on the first main surface 2 a of the piezoelectric layer 2 .
  • the second metal layer 14 is laminated on the first metal layer 35 .
  • the first metal layer 35 and the second metal layer 14 are metal laminates of gold or gold alloys and other metals such as titanium.
  • the first metal layer 35 and the second metal layer 14 include those formed in a linear pattern so as to surround the functional electrode 30 in plan view in the Z direction.
  • the second metal layer 14 includes wirings 12 electrically connected to the functional electrodes 30 .
  • the wiring 12 is thicker than the electrode fingers 3 and 4 .
  • the dielectric film 19 is provided on the functional electrode 30 and the first main surface 2a of the piezoelectric layer 2 on which the functional electrode 30 is provided.
  • the dielectric film 19 is made of silicon oxide, for example.
  • FIG. 16 is a plan view of the cover member of the elastic wave device according to the first embodiment.
  • FIG. 16 is a plan view of the cover member 40 from the side where the acoustic wave device substrate 10 is provided.
  • the cover member 40 is a member including the second substrate 41 .
  • the cover member 40 includes a second substrate 41, an insulating layer 42, seal metal layers 43 and 44, and an insulating layer 45.
  • the cover member 40 is provided with through vias that penetrate the second substrate 41 and the insulating layers 42 and 45 .
  • the second substrate 41 is, for example, a silicon substrate.
  • the second substrate 41 is positioned to face the first main surface 2 a of the piezoelectric layer 2 .
  • the second substrate 41 is smaller than the support substrate 8, as shown in FIGS. Assuming that the line that is the outline of the second substrate 41 is a line P2, the line P2 is inside the line P1 that is the outline of the support substrate 8 . As a result, the size of the elastic wave device is limited by the line P1 instead of the line P2, so that variations in chip size can be suppressed.
  • Two main surfaces of the second substrate 41 facing each other in the Z direction are covered with insulating layers 42 and 45 made of silicon oxide.
  • the area surrounded by the line P2, that is, the area overlapping with the second substrate 41 when viewed from above in the Z direction may be described as the inside of the line P2.
  • a region that is not inside the line P2, that is, a region that does not overlap the second substrate 41 when viewed in plan in the Z direction may be described as being outside the line P2.
  • the sealing metal layers 43 and 44 are supporting portions that support the acoustic wave device substrate 10 on the cover member 40 .
  • Seal metal layers 43 and 44 are formed on a portion of insulating layer 42, as shown in FIG.
  • the seal metal layers 43 and 44 are arranged inside a line P2 that is the outline of the second substrate 41 when viewed in the Z direction.
  • the sealing metal layers 43, 44 are metal laminates of gold or gold alloys and other metals such as titanium.
  • the sealing metal layers 43 , 44 are of the same material as the second metal layer 14 .
  • the seal metal layer 43 is formed in a linear pattern so as to surround the functional electrode 30 when viewed from above in the Z direction.
  • a seal metal layer 43 is adhered to the second metal layer 14 .
  • the seal metal layer 43 can seal the second space 92 when viewed in the Z direction.
  • the second space portion 92 is a space between the acoustic wave device substrate 10 and the cover member 40 . Thereby, the functional electrode 30 can be protected.
  • the seal metal layer 44 is provided in a range surrounded by the seal metal layer 43, as shown in FIG.
  • the seal metal layer 44 joins the cover member 40 and the acoustic wave element substrate 10 by being adhered to the wiring 12 of the second metal layer 14 . This suppresses bending of the acoustic wave device substrate 10 .
  • the through via of the cover member 40 is provided with a terminal electrode 57 and a BGA (ball grid array) bump 58 via a seed layer 56 .
  • the seed layer 56 is a laminate in which a Cu layer is laminated on a Ti layer.
  • the seed layer 56 includes, for example, a layer of silicon oxide interposed between the inner surface of the through via, a portion of the insulating layer 45, and the seal metal layer 44 overlapping the through via when viewed in plan in the Z direction. Laminated in parts.
  • the terminal electrode 57 is a laminate in which a Cu layer and a Ni layer are plated with an Au layer.
  • the terminal electrode 57 is a so-called bump metal.
  • a terminal electrode 57 is provided inside the through via and on the seed layer 56 .
  • the BGA bump 58 is an electrode laminated on the terminal electrode 57 .
  • the BGA bump 58 is a so-called bump metal. Thereby, the BGA bumps 58 to the functional electrodes 30 are electrically connected.
  • the elastic wave device overlaps the first substrate (support substrate 8) and the first substrate when viewed in the first direction, and the first main surface 2a and the first main surface a piezoelectric layer 2 having a second main surface 2b opposite to 2a; a functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the piezoelectric layer 2; a second substrate 41 facing the first main surface 2a in the first direction;
  • the second substrate 41 is smaller than the first substrate when viewed in the first direction, and the outer shape (line P2) of the second substrate 41 is inside the outer shape (line P1) of the first substrate when viewed in the first direction, At least a part of the outer end face of the piezoelectric layer 2 on the second substrate 41 side of the first substrate is exposed when viewed in a plane direction perpendicular to the first direction.
  • the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate
  • the outer shape of the piezoelectric layer 2 on the second substrate 41 side of the first substrate are exposed, and when viewed in the first direction, the outer shape of the first substrate is the piezoelectric layer 2 . is the same as the external shape of As a result, variations in chip size can be further suppressed.
  • the supporting portion seals between the first substrate and the second substrate 41 and is arranged inside the outline of the second substrate 41 when viewed in the first direction. As a result, it is possible to prevent moisture, dust, and the like from the outside air from entering the second space 92 between the first substrate and the second substrate 41 .
  • the functional electrode 30 is arranged in a region surrounded by the support portion when viewed in the first direction. As a result, the functional electrode 30 can be protected from moisture, dust, and the like in the outside air.
  • the functional electrode 30 faces either one or more first electrode fingers 3 extending in a second direction intersecting the first direction or one or more first electrode fingers 3 extending in a third direction orthogonal to the second direction. and one or more second electrode fingers 4 extending in the second direction. As a result, it is possible to provide an elastic wave device capable of obtaining good resonance characteristics.
  • the thickness of the piezoelectric layer 2 is the thickness between the adjacent first electrode fingers 3 and the second electrode fingers 4 among the one or more first electrode fingers 3 and the one or more second electrode fingers 4. It is 2p or less when the center-to-center distance is p.
  • the piezoelectric layer 2 contains lithium niobate or lithium tantalate. As a result, it is possible to provide an elastic wave device capable of obtaining good resonance characteristics.
  • it is configured to be able to use bulk waves in the thickness-shlip mode. As a result, it is possible to provide an elastic wave device with a high coupling coefficient and good resonance characteristics.
  • the thickness of the piezoelectric layer 2 is d, and the center between the adjacent first electrode fingers 3 and second electrode fingers 4 among the one or more first electrode fingers 3 and the one or more second electrode fingers 4 is d/p ⁇ 0.5, where p is the distance between them.
  • a more desirable aspect is that d/p is 0.24 or less. Thereby, the acoustic wave device 1 can be miniaturized and the Q value can be increased.
  • the functional electrode 30 has one or more first electrode fingers 3 extending in a second direction intersecting the first direction and one or more first electrode fingers 3 extending in a third direction orthogonal to the second direction. and one or more second electrode fingers 4 extending in the second direction, when viewed in the direction in which the adjacent first electrode fingers 3 and second electrode fingers 4 face each other. is the excitation region C, and when MR is the metallization ratio of the one or more first electrode fingers 3 and the one or more second electrode fingers 4 with respect to the excitation region C, MR ⁇ 1 .75(d/p)+0.075. In this case, the fractional bandwidth can be reliably set to 17% or less.
  • the piezoelectric layer 2 is made of lithium niobate or lithium tantalate, and the Euler angles ( ⁇ , ⁇ , ⁇ ) of lithium niobate or lithium tantalate satisfy the following formula (1), formula (2) or It is in the range of formula (3). In this case, the fractional bandwidth can be widened sufficiently.
  • Equation (1) (0° ⁇ 10°, 20° to 80°, 0° to 60° (1-( ⁇ -50) 2 /900) 1/2 ) or (0° ⁇ 10°, 20° to 80°, [180 °-60° (1-( ⁇ -50)2/900) 1/2 ] ⁇ 180°) Equation (2) (0° ⁇ 10°, [180°-30°(1-( ⁇ -90) 2 /8100) 1/2 ] ⁇ 180°, arbitrary ⁇ ) Equation (3)
  • FIG. 17 is a schematic cross-sectional view for explaining the bonding process for forming the supporting member of the acoustic wave device substrate.
  • the sacrificial layer 7S is formed on the second main surface 2b of the piezoelectric layer 2, and then the second main surface 2b of the piezoelectric layer 2 and the sacrificial layer 7S are formed.
  • a first portion 7A to be the intermediate layer 7 is formed so as to cover the .
  • the surface of the first portion 7A is flattened so that unevenness due to the influence of the sacrificial layer 7S is eliminated.
  • the second portion 7B which will be the intermediate layer 7, is formed on the support substrate 8.
  • FIG. 17 is a schematic cross-sectional view for explaining the bonding process for forming the supporting member of the acoustic wave device substrate.
  • the piezoelectric layer 2 (piezoelectric substrate) is supported by the support substrate 8 by bonding the first portion 7A and the second portion 7B together. After bonding, the main surface of the piezoelectric layer 2 opposite to the second main surface 2b is polished to make the piezoelectric layer 2 thinner. This forms the first main surface 2a of the piezoelectric layer.
  • FIG. 18 is a schematic cross-sectional view for explaining the electrode forming process for forming the functional electrodes of the acoustic wave device substrate.
  • the support portion 46 is formed on the piezoelectric layer 2 .
  • the first metal layer 35 is formed on the first main surface 2a of the piezoelectric layer 2, and the functional electrodes 30 are patterned.
  • the second metal layer 14 is formed on the first metal layer 35 .
  • a part of the second metal layer 14 becomes the wiring 12 that conducts to the functional electrode 30 .
  • a sealing metal layer 44a is laminated on the second metal layer 14 .
  • the seal metal layer 44a is an Au or Au alloy layer.
  • the periphery of the functional electrode 30 is masked with a resist, and the dielectric film 19 is formed. Thereby, the functional electrode 30 is covered with the dielectric film 19 .
  • FIG. 19 is a schematic cross-sectional view for explaining the first space portion forming step for forming the first space portion of the acoustic wave device substrate.
  • first, through holes 2H are formed in the piezoelectric layer 2 .
  • the through hole 2H is formed at a position overlapping the sacrificial layer 7S of the piezoelectric layer 2 in plan view.
  • the piezoelectric layer 2 is patterned in a grid pattern to remove the region outside the line P1, thereby exposing the support member in the region outside the line P1.
  • the area where the supporting member is exposed is the boundary where the acoustic wave device is singulated.
  • an etchant is injected from the through hole 2H to dissolve the sacrificial layer 7S.
  • the space where the sacrificial layer 7S was located becomes the first space portion 91.
  • a measuring instrument is connected to the wiring 12, and after confirming the frequency characteristics, the film thickness of the dielectric film 19 is adjusted by ion etching or the like. Adjustment of the film thickness of the dielectric film 19 is repeated until desired frequency characteristics are obtained.
  • FIG. 20 is a schematic cross-sectional view for explaining the cover member forming process for forming the cover member.
  • an insulating layer 42 is formed on one main surface of the second substrate 41 .
  • a seal metal layer 43 b and a seal metal layer 44 b are formed on the insulating layer 42 as the supporting portion 47 .
  • the seal metal layer 43b and the seal metal layer 44b are Au or Au alloy layers.
  • FIG. 21 is a schematic cross-sectional view for explaining a bonding step of bonding the acoustic wave element substrate and the cover member via the supporting portion.
  • the support portion 47 of the acoustic wave device substrate 10 and the support portion 46 of the cover member 40 facing each other are joined.
  • the seal metal layer 43a of the acoustic wave element substrate 10 and the seal metal layer 43b of the cover member 40 are Au--Au bonded, and the seal metal layer 43a and the seal metal layer 43b are integrated to form the seal metal layer. 43.
  • sealing metal layer 44a of the acoustic wave element substrate 10 and the sealing metal layer 44b of the cover member 40 are Au—Au bonded, and the sealing metal layer 44a and the sealing metal layer 44b are integrated to form the sealing metal layer 44. .
  • FIG. 22 is a schematic cross-sectional view for explaining the thinning process for thinning the second substrate.
  • the main surface opposite to the side on which the insulating layer 42 is provided is ground by a grinding tool DF, thereby thinning the second substrate 41 . Reduce thickness.
  • FIG. 23 is a schematic cross-sectional view for explaining a through-via forming step for forming through-vias in the second substrate.
  • the through via 57H is formed by dry etching or reactive ion etching.
  • FIG. 24 is a schematic cross-sectional view for explaining a terminal electrode forming process for forming terminal electrodes on the second substrate.
  • a seed layer 56 is formed so as to cover the through via 57H shown in FIG.
  • the seed layer 56 is formed by forming a Ti layer and then laminating a Cu layer on the Ti layer. Thereafter, as shown in FIG. 24, after patterning a plating resist 57M on the seed layer 56 excluding the range where the terminal electrode 57 is formed, a Cu layer, a Ni layer, and an Au layer are formed on the seed layer 56 in this order.
  • the terminal electrodes 57 are formed by stacking by plating.
  • FIG. 25 is a schematic cross-sectional view for explaining the insulating film forming process for insulating the periphery of the terminal electrode.
  • the plating resist 57M is removed and the seed layer 56 not in contact with the terminal electrode 57 is removed.
  • an insulating layer 45 is additionally formed so as to insulate the periphery of the terminal electrode 57 .
  • FIG. 26 is a schematic cross-sectional view for explaining a resist forming process for forming a resist on the second substrate.
  • a resist 40R is formed on the side of the cover member 40 where the terminal electrodes 57 are provided.
  • the resist 40R is smaller than the area surrounded by the boundary where the acoustic wave device is singulated in plan view, and the outer shape of the resist 40R is the area surrounded by the boundary in plan view. It is inside a certain line P1.
  • the resist 40R is patterned with a width wider than the patterning of the piezoelectric layer 2 along the boundary where the acoustic wave device is singulated, and the outside of the line P2 inside the line P1 is removed.
  • the chip size can be limited by the size of the support substrate 8 as the first substrate, not by the size of the second substrate 41 .
  • FIG. 27 is a schematic cross-sectional view for explaining an etching step of dividing the second substrate into individual pieces and etching a part of the first substrate.
  • the second substrate 41 is separated into pieces, and part of the first substrate is etched. Etching is performed, for example, by wet etching.
  • part of the intermediate layer 7 and the support substrate 8 is etched in the etching process.
  • the end faces of the outer shape of the piezoelectric layer 2 are all exposed, and the piezoelectric layer 2 between the line P1 and the line P2 in plan view defines the outer shape (line P1) of the support substrate 8 against etching. It becomes a regulated mask.
  • the intermediate layer 7 and the support substrate 8 in the area surrounded by the line P1, which is the outline of the piezoelectric layer 2 are covered with the piezoelectric layer 2 even outside the line P2, which is the outline of the resist 40R. Therefore, it is not etched.
  • the intermediate layer 7 and the support substrate 8 in the area outside the line P1, which is the outline of the piezoelectric layer 2 are exposed, they are etched.
  • the size of the support substrate 8, which is the first substrate is limited by the line P1, which is the outer shape of the piezoelectric layer 2, so that variations in chip size can be suppressed.
  • FIG. 28 is a cross-sectional view for explaining a polishing step of polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it.
  • the support substrate 8 is ground with a grinding tool to reduce the thickness of the support substrate 8. and individualized for each elastic wave device. At this time, the thickness of the support substrate 8 may be thinner than the thickness of the intermediate layer 7 . Also, the end face of the outer shape of the piezoelectric layer 2 may be processed into a tapered shape.
  • the method of manufacturing the elastic wave device according to the first embodiment described above is merely an example, and is not limited to this.
  • the electrode formation step may be performed after the first space portion formation step, and the functional electrode 30 may be provided on the second main surface 2b of the piezoelectric layer 2 .
  • the method for manufacturing an acoustic wave device includes the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a, and the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a a first substrate formed at a position where the functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the layer 2 overlaps in the first direction; 2a and a second substrate 41 facing via a support portion; after the bonding step, a resist forming step of forming a resist 40R on the second substrate 41; after the resist forming step, the second substrate 41 is separated into pieces, an etching step of etching a part of the first substrate, and after the etching step, the main surface of the first substrate opposite to the second substrate 41 is polished to thin the first substrate, In the bonding step, patterning is performed so that a position of the first substrate on the side of the second substrate
  • the resist 40R is smaller than the area surrounded by the boundary when viewed in the first direction, the outline of the resist 40R is inside the area surrounded by the boundary when viewed in the first direction, and the etching is performed.
  • the piezoelectric layer 2 on the second substrate 41 side of the first substrate serves as a mask for regulating the outer shape of the singulated first substrate. As a result, the chip size is limited by the line P1, so that variations in chip size can be suppressed.
  • the piezoelectric layer 2 on the side of the second substrate 41 of the first substrate regulates the outer shape of the singulated first substrate.
  • the outer shape of the first substrate is formed to be the same as the outer shape of the piezoelectric layer 2, so that variations in chip size can be further suppressed.
  • FIG. 29 is a cross-sectional view showing an example of the elastic wave device according to the second embodiment.
  • the acoustic wave device according to the second embodiment differs from the first embodiment in that metal 31 is provided outside the piezoelectric layer 2 .
  • metal 31 is provided on the support member between lines P1 and P2.
  • at least a part of the end surface of the metal 31 is exposed when viewed in a direction parallel to the XY plane.
  • all the end surfaces of the metal 31 are exposed.
  • the outer shape of the metal 31 is the same as the outer shape of the support substrate 8 .
  • the outer shape of the metal 31 overlaps the line P1 when viewed from above in the Z direction. Also, the metal 31 is made of the same metal as the functional electrode 30 . Accordingly, since the support substrate 8 is formed to have the same outer shape as the metal 31, variations in chip size can be suppressed.
  • the metal 31 when the metal 31 is provided between the supporting portion and the first substrate, the bondability between the first substrate and the second substrate 41 deteriorates. Therefore, the metal 31 is provided so as not to overlap the supporting portion when viewed in the Z direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
  • the elastic wave device according to the second embodiment is not limited to that shown in FIG.
  • the metal 31 is not limited to being provided outside the piezoelectric layer 2, and may be provided on the piezoelectric layer 2 between the lines P1 and P2.
  • the elastic wave device includes the first substrate (support substrate 8), which overlaps the first substrate in plan view, and the first main surface 2a and the first main surface 2a.
  • a piezoelectric layer 2 having an opposite second main surface 2b; a functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the piezoelectric layer 2; a second substrate 41 facing the surface 2a in the first direction; 41 is smaller than the first substrate when viewed in the first direction, and the outer shape (line P2) of the second substrate 41 is inside the outer shape (line P1) of the first substrate when viewed in the first direction.
  • the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
  • the metal 31 on the outside of the piezoelectric layer 2 does not overlap the supporting portion when viewed in the first direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
  • the end surface of the outer shape of the metal 31 outside the piezoelectric layer 2 is exposed when viewed in the planar direction, and the outer shape (line P1) of the first substrate is outside the piezoelectric layer 2 when viewed in the first direction. is the same as the outer shape of the metal 31 in . As a result, variations in chip size can be further suppressed.
  • the metal 31 outside the piezoelectric layer 2 is made of the same metal as the functional electrode 30. Even in this case, variations in chip size can be suppressed.
  • a method for manufacturing an elastic wave device according to the second embodiment will be described below. Note that steps similar to those in the first embodiment will not be explained one by one.
  • the patterning of the piezoelectric layer 2 in the first space forming step removes the area outside the line P2 to expose the support member in this area.
  • a metal 31 is laminated on the portion near the outer shape of the piezoelectric layer 2 and the supporting member from which the piezoelectric layer 2 has been removed.
  • the metal 31 is laminated so as not to overlap with the supporting portion when viewed in plan in the Z direction, so that the bondability between the first substrate and the second substrate 41 in the bonding process can be improved.
  • the metal 31 in the areas outside the line P1 is then patterned away to re-expose the support members in those areas.
  • the area where the supporting member is exposed is the boundary where the acoustic wave device is singulated.
  • the end faces of the outline of the metal 31 are all exposed, and in plan view, the metal 31 outside the line P2 that is the outline of the support substrate 8 is exposed to the line P1 that is the outline of the support substrate 8 with respect to the etching. becomes a mask that regulates That is, even outside the line P2, which is the outline of the resist 40R, the intermediate layer 7 and the support substrate 8 in the region surrounded by the line P1, which is the outline of the metal 31, are covered with the metal 31. Not etched.
  • the intermediate layer 7 and the support substrate 8 in the area outside the line P1, which is the contour of the piezoelectric layer 2, are exposed and thus etched. Therefore, since the size of the support substrate 8, which is the first substrate, is limited by the line P1, which is the outline of the metal 31, variations in chip size can be suppressed.
  • the method for manufacturing the elastic wave device according to the second embodiment is not limited to the method described above.
  • the metal 31 may be patterned at the same time as the functional electrode 30 and the first metal layer 35 in the electrode formation process. good.
  • the method for manufacturing an acoustic wave device includes the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a, the piezoelectric a first substrate formed at a position where the functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the layer 2 overlaps in the first direction; 2a and a second substrate 41 facing via a support portion; after the bonding step, a resist forming step of forming a resist 40R on the second substrate 41; after the resist forming step, the second substrate 41 is separated into pieces, an etching step of etching a part of the first substrate, and after the etching step, the main surface of the first substrate opposite to the second substrate 41 is polished to thin the first substrate, In the bonding step, patterning is performed so that a position outside the piezoelectric layer 2 where there is no metal 31 serves as a boundary where the elastic wave device is singulated, and a resist is formed.
  • the resist 40R is smaller than the area surrounded by the boundary when viewed in the first direction, the outline of the resist 40R is inside the area surrounded by the boundary when viewed in the first direction, and the piezoelectric layer
  • the metal 31 on the outside of 2 serves as a mask for regulating the outer shape (line P1) of the singulated first substrate.
  • the chip size is limited by the line P1, so that variations in chip size can be suppressed.
  • the metal 31 outside the piezoelectric layer 2 is provided so as not to overlap the supporting portion when viewed in the first direction. Thereby, the first substrate and the second substrate 41 can be satisfactorily bonded in the bonding step.
  • the metal 31 on the outer side of the piezoelectric layer 2 regulates the outer shape of the singulated first substrate. It becomes a mask to do.
  • the outer shape of the first substrate is formed to be the same as the outer shape of the metal 31, so that variations in chip size can be further suppressed.
  • FIG. 30 is a cross-sectional view showing an example of an elastic wave device according to the third embodiment.
  • the acoustic wave device according to the third embodiment is different from the first embodiment in that silicon nitride 32 is provided outside the piezoelectric layer 2 .
  • silicon nitride 32 is provided on the support member between lines P1 and P2.
  • at least a part of the end surface of the silicon nitride 32 is exposed when viewed in a direction parallel to the XY plane.
  • the end faces of the outer shape of the silicon nitride 32 are all exposed.
  • the outer shape of the silicon nitride 32 is the same as the outer shape of the support substrate 8 . That is, the outer shape of the silicon nitride 32 overlaps the line P1 when viewed from above in the Z direction. Accordingly, since the support substrate 8 is formed to have the same outer shape as the silicon nitride 32, variations in chip size can be suppressed.
  • the silicon nitride 32 is provided between the supporting portion and the first substrate, the bondability between the first substrate and the second substrate 41 deteriorates. Therefore, the silicon nitride 32 is provided so as not to overlap the supporting portion when viewed in the Z direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
  • the elastic wave device according to the third embodiment is not limited to that shown in FIG.
  • the silicon nitride 32 is not limited to being provided outside the piezoelectric layer 2, and may be provided on the piezoelectric layer 2 between the lines P1 and P2.
  • the elastic wave device includes the first substrate (support substrate 8), which overlaps the first substrate in plan view, and the first main surface 2a and the first main surface 2a.
  • a piezoelectric layer 2 having an opposite second main surface 2b; a functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the piezoelectric layer 2; a second substrate 41 facing the surface 2a in the first direction; 41 is smaller than the first substrate when viewed in the first direction, the outer shape of the second substrate 41 is inside the outer shape of the first substrate when viewed in the first direction, and when viewed in a plane direction orthogonal to the first direction , the silicon nitride 32 outside the piezoelectric layer 2 is exposed on at least a part of the outer edge of the first substrate.
  • the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
  • the silicon nitride 32 outside the piezoelectric layer 2 does not overlap the support when viewed in the first direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
  • the silicon nitride 32 outside the piezoelectric layer 2 is exposed on all end surfaces of the outer shape of the first substrate when viewed in the plane direction, and the outer shape of the first substrate when viewed in the first direction is: It has the same outline as the silicon nitride 32 outside the piezoelectric layer 2 . As a result, variations in chip size can be further suppressed.
  • a method for manufacturing an elastic wave device according to the third embodiment will be described below.
  • the manufacturing method described below is an example, and is not limited to this. Note that steps similar to those in the first embodiment will not be explained one by one.
  • the patterning of the piezoelectric layer 2 in the first space forming step removes the area outside the line P2 to expose the support member in this area.
  • silicon nitride 32 is laminated on the portion near the outer shape of the piezoelectric layer 2 and the supporting member from which the piezoelectric layer 2 has been removed.
  • the silicon nitride 32 is laminated so as not to overlap with the supporting portion when viewed in plan in the Z direction.
  • the silicon nitride 32 in the areas outside the line P1 is then patterned away to re-expose the support members in those areas.
  • the area where the supporting member is exposed is the boundary where the acoustic wave device is singulated.
  • the end faces of the outline of the silicon nitride 32 are all exposed, and in plan view, the silicon nitride 32 outside the outline line P2 is the outline of the support substrate 8 for etching. It becomes a mask for regulating the line P1. That is, the intermediate layer 7 and the support substrate 8 in the region surrounded by the line P1, which is the outline of the silicon nitride 32, are covered with the silicon nitride 32 even outside the line P2, which is the outline of the resist 40R. Therefore, it is not etched.
  • the intermediate layer 7 and the support substrate 8 in the area outside the line P1, which is the contour of the piezoelectric layer 2, are exposed and thus etched. Therefore, since the size of the support substrate 8, which is the first substrate, is limited by the line P1, which is the outline of the silicon nitride 32, variations in chip size can be suppressed.
  • the method for manufacturing the elastic wave device according to the third embodiment is not limited to the method described above.
  • the silicon nitride 32 is provided on the piezoelectric layer 2 between the lines P1 and P2
  • the silicon nitride 32 is formed simultaneously with the functional electrode 30 and the first metal layer 35 in the electrode formation process. good too.
  • the method for manufacturing an acoustic wave device includes the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a, the piezoelectric a first substrate formed at a position where the functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the layer 2 overlaps in the first direction; 2a and a second substrate 41 facing via a support portion; after the bonding step, a resist forming step of forming a resist 40R on the second substrate 41; after the resist forming step, the second substrate 41 is separated into pieces, an etching step of etching a part of the first substrate, and after the etching step, the main surface of the first substrate opposite to the second substrate 41 is polished to thin the first substrate, In the bonding step, the patterning is performed so that the position where the silicon nitride 32 is absent becomes the boundary where the elastic wave device is singulated, and in the resist forming step, the resist 40R
  • the silicon nitride 32 outside the piezoelectric layer 2 is provided so as not to overlap the supporting portion when viewed in the first direction. Thereby, the first substrate and the second substrate 41 can be satisfactorily bonded in the bonding step.
  • the silicon nitride 32 outside the piezoelectric layer 2 is exposed, and the silicon nitride 32 outside the piezoelectric layer 2 is cut into pieces to form the outer shape of the first substrate. becomes a mask that regulates As a result, the outer shape of the first substrate is formed to be the same as the outer shape of the silicon nitride 32, so that variations in chip size can be further suppressed.
  • the acoustic wave device includes the piezoelectric layer 2 on the second substrate 41 side of the first substrate, the metal 31 on the outside of the piezoelectric layer 2, and the metal 31 on the outside of the piezoelectric layer 2 when viewed in a plane direction orthogonal to the first direction. At least one end surface of the outer shape of the silicon nitride 32 should be at least partially exposed. Even in this case, the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
  • the piezoelectric layer 2 on the second substrate 41 side of the first substrate, the metal 31 on the outside of the piezoelectric layer 2, and the silicon nitride 32 on the outside of the piezoelectric layer 2 are bonded together.
  • the patterning is performed so that the position where neither of them exists becomes the boundary where the elastic wave device is singulated.
  • the outline of 40R is inside the area surrounded by the boundary when viewed in the first direction, and the outline of the first substrate (line P1) where the silicon nitride 32 outside the piezoelectric layer 2 is singulated in the etching process. may be a mask that regulates the Even in this case, since the chip size is limited by the line P1, variations in chip size can be suppressed.

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Abstract

The present invention addresses the problem of suppressing variation in chip size. This elastic wave apparatus comprises: a first substrate; a piezoelectric layer that overlaps the first substrate as seen in a first direction and has a first main surface and a second main surface on the opposite side from the first main surface; a functional electrode provided to at least one of the first main surface and the second main surface of the piezoelectric layer; a second surface facing the first main surface of the piezoelectric layer in the first direction; and a support supporting the second substrate between the first main surface of the piezoelectric layer and the second substrate. The second substrate is smaller than the first substrate as seen in the first direction, the contour of the second substrate is on the inside of the contour of the first substrate as seen in the first direction, and, as seen in a planar direction orthogonal to the first direction, an end surface of at least one contour of the piezoelectric layer on the second substrate side of the first substrate, a metal on the outside of the piezoelectric layer, and a silicon nitride on the outside of the piezoelectric layer, is at least partially exposed.

Description

弾性波装置及び弾性波装置の製造方法ELASTIC WAVE DEVICE AND METHOD FOR MANUFACTURING ELASTIC WAVE DEVICE
 本開示は、弾性波装置及び弾性波装置の製造方法に関する。 The present disclosure relates to an elastic wave device and a method for manufacturing an elastic wave device.
 特許文献1には、弾性波装置が記載されている。 Patent Document 1 describes an elastic wave device.
特開2012-257019号公報JP 2012-257019 A
 特許文献1に示す弾性波装置は、電極の上を基板で覆い、ウエハーレベルパッケージ化し、ダイシングで個片化した場合、チップサイズ(弾性波装置の大きさ)のばらつきにより、特性が劣化する可能性があった。 In the acoustic wave device disclosed in Patent Document 1, when the electrodes are covered with a substrate, packaged in a wafer level, and separated into individual pieces by dicing, the characteristics may deteriorate due to variations in the chip size (the size of the acoustic wave device). had a nature.
 本開示は、上述した課題を解決するものであり、チップサイズのばらつきを抑制することを目的とする。 The present disclosure is intended to solve the above-described problems, and aims to suppress variations in chip size.
 一態様に係る弾性波装置は、第1基板と、第1方向にみて、前記第1基板に重なり、第1主面と、前記第1主面と反対側の第2主面とを有する圧電層と、前記圧電層の前記第1主面及び前記第2主面の少なくとも一方に設けられた機能電極と、前記圧電層の前記第1主面と前記第1方向に対向する第2基板と、前記圧電層の前記第1主面と前記第2基板との間で前記第2基板を支持する支持部と、を備え、前記第2基板は、前記第1方向にみて、前記第1基板よりも小さく、前記第2基板の外形は、前記第1方向にみて、前記第1基板の外形の内側にあり、前記第1方向と直交する平面方向にみて、前記第1基板の前記第2基板側にある前記圧電層、前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンのうち、少なくとも1つの外形の端面が少なくとも一部露出している。 An acoustic wave device according to one aspect is a piezoelectric device having a first substrate, a first main surface overlapping the first substrate when viewed in a first direction, and a second main surface opposite to the first main surface. a layer, a functional electrode provided on at least one of the first main surface and the second main surface of the piezoelectric layer, and a second substrate facing the first main surface of the piezoelectric layer in the first direction. and a support portion that supports the second substrate between the first main surface of the piezoelectric layer and the second substrate, wherein the second substrate is the first substrate when viewed in the first direction. The outer shape of the second substrate is inside the outer shape of the first substrate when viewed in the first direction, and the second substrate of the first substrate when viewed in a plane direction orthogonal to the first direction. An edge face of at least one of the piezoelectric layer on the substrate side, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer is at least partially exposed.
 一態様に係る弾性波装置の製造方法は、第1主面と、前記第1主面と反対側の第2主面とを有する圧電層と、前記圧電層の前記第1主面及び前記第2主面の少なくとも一方に設けられた機能電極と、が第1方向に重なる位置に形成された第1基板と、前記圧電層の前記第1主面と対向する第2基板と、支持部を介して接合する接合工程と、前記接合工程の後に、前記第2基板にレジストを形成するレジスト形成工程と、前記レジスト形成工程の後に、前記第2基板を個片化し、前記第1基板の一部をエッチングするエッチング工程と、前記エッチング工程の後に、前記第1基板の前記第2基板とは反対側の主面を研磨して前記第1基板を薄くし、個片化する研磨工程と、を含み、前記接合工程において、前記第1基板の前記第2基板側にある前記圧電層、前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンのいずれもない位置が、弾性波装置が個片化される境界となるようにパターニングされており、前記レジスト形成工程において、前記レジストは、前記第1方向にみて前記境界で囲まれた領域よりも小さく、前記レジストの外形は、前記第1方向にみて前記境界で囲まれた領域の内側にあり、前記エッチング工程において、前記第1基板の前記第2基板側にある前記圧電層、前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンのうち、少なくとも1つが個片化された前記第1基板の外形を規制するマスクとなる。 A method of manufacturing an elastic wave device according to one aspect includes: a piezoelectric layer having a first main surface and a second main surface opposite to the first main surface; A first substrate formed at a position overlapping with a functional electrode provided on at least one of two main surfaces in a first direction, a second substrate facing the first main surface of the piezoelectric layer, and a support portion. a bonding step of bonding through the first substrate; a resist forming step of forming a resist on the second substrate after the bonding step; a polishing step of, after the etching step, polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it; and in the bonding step, a position where none of the piezoelectric layer on the second substrate side of the first substrate, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer is elastic In the resist forming step, the resist is smaller than the area surrounded by the boundary when viewed in the first direction, and the outer shape of the resist is , inside the region surrounded by the boundary when viewed in the first direction, and in the etching step, the piezoelectric layer on the second substrate side of the first substrate, the metal outside the piezoelectric layer, and the At least one of the silicon nitrides on the outside of the piezoelectric layer serves as a mask for regulating the outer shape of the singulated first substrate.
 本開示によれば、チップサイズのばらつきを抑制できる。 According to the present disclosure, variations in chip size can be suppressed.
図1Aは、第1実施形態の弾性波装置を示す斜視図である。1A is a perspective view showing an elastic wave device according to a first embodiment; FIG. 図1Bは、第1実施形態の電極構造を示す平面図である。FIG. 1B is a plan view showing the electrode structure of the first embodiment. 図2は、図1AのII-II線に沿う部分の断面図である。FIG. 2 is a cross-sectional view of a portion along line II-II of FIG. 1A. 図3Aは、比較例の圧電層を伝播するラム波を説明するための模式的な断面図である。FIG. 3A is a schematic cross-sectional view for explaining Lamb waves propagating through the piezoelectric layer of the comparative example. 図3Bは、第1実施形態の圧電層を伝播する厚み滑り1次モードのバルク波を説明するための模式的な断面図である。FIG. 3B is a schematic cross-sectional view for explaining a thickness-shear primary mode bulk wave propagating through the piezoelectric layer of the first embodiment. 図4は、第1実施形態の圧電層を伝播する厚み滑り1次モードのバルク波の振幅方向を説明するための模式的な断面図である。FIG. 4 is a schematic cross-sectional view for explaining the amplitude direction of a thickness-shear primary mode bulk wave propagating in the piezoelectric layer of the first embodiment. 図5は、第1実施形態の弾性波装置の共振特性の例を示す説明図である。FIG. 5 is an explanatory diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment. 図6は、第1実施形態の弾性波装置において、隣り合う電極の中心間距離又は中心間距離の平均距離をp、圧電層の平均厚みをdとした場合、d/2pと、共振子としての比帯域との関係を示す説明図である。In the elastic wave device of the first embodiment, FIG. 2 is an explanatory diagram showing the relationship between , and the fractional band. FIG. 図7は、第1実施形態の弾性波装置において、1対の電極が設けられている例を示す平面図である。FIG. 7 is a plan view showing an example in which a pair of electrodes are provided in the elastic wave device of the first embodiment. 図8は、第1実施形態の弾性波装置の共振特性の一例を示す参考図である。FIG. 8 is a reference diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment. 図9は、第1実施形態の弾性波装置の、多数の弾性波共振子を構成した場合の比帯域と、スプリアスの大きさとしての180度で規格化されたスプリアスのインピーダンスの位相回転量との関係を示す説明図である。FIG. 9 shows the ratio bandwidth when a large number of elastic wave resonators are configured in the elastic wave device of the first embodiment, and the phase rotation amount of the spurious impedance normalized by 180 degrees as the magnitude of the spurious. is an explanatory diagram showing the relationship between. 図10は、d/2pと、メタライゼーション比MRと、比帯域との関係を示す説明図である。FIG. 10 is an explanatory diagram showing the relationship between d/2p, metallization ratio MR, and fractional bandwidth. 図11は、d/pを限りなく0に近づけた場合のLiNbOのオイラー角(0°、θ、ψ)に対する比帯域のマップを示す説明図である。FIG. 11 is an explanatory diagram showing a map of the fractional band with respect to the Euler angles (0°, θ, ψ) of LiNbO 3 when d/p is infinitely close to 0. FIG. 図12は、本開示の実施形態に係る弾性波装置を説明するための部分切り欠き斜視図である。FIG. 12 is a partially cutaway perspective view for explaining the elastic wave device according to the embodiment of the present disclosure. 図13は、第1実施形態に係る弾性波装置の一例を示す平面図である。13 is a plan view showing an example of the elastic wave device according to the first embodiment; FIG. 図14は、図13のXIV-XIV線に沿った断面図である。14 is a cross-sectional view taken along line XIV-XIV in FIG. 13. FIG. 図15は、第1実施形態に係る弾性波装置の弾性波素子基板の平面図である。15 is a plan view of an acoustic wave element substrate of the acoustic wave device according to the first embodiment. FIG. 図16は、第1実施形態に係る弾性波装置のカバー部材の平面図である。16 is a plan view of a cover member of the elastic wave device according to the first embodiment; FIG. 図17は、弾性波素子基板の支持部材を形成する貼り合わせ工程を説明するための模式的な断面図である。FIG. 17 is a schematic cross-sectional view for explaining a bonding process for forming a support member for the acoustic wave device substrate. 図18は、弾性波素子基板の機能電極を形成する電極形成工程を説明するための模式的な断面図である。FIG. 18 is a schematic cross-sectional view for explaining an electrode forming process for forming functional electrodes of the acoustic wave device substrate. 図19は、弾性波素子基板の第1空間部を形成する第1空間部形成工程を説明するための模式的な断面図である。FIG. 19 is a schematic cross-sectional view for explaining a first space portion forming step for forming the first space portion of the acoustic wave device substrate. 図20は、カバー部材を形成するカバー部材形成工程を説明するための模式的な断面図である。FIG. 20 is a schematic cross-sectional view for explaining a cover member forming process for forming the cover member. 図21は、弾性波素子基板とカバー部材とを支持部を介して接合する接合工程を説明するための模式的な断面図である。FIG. 21 is a schematic cross-sectional view for explaining a bonding step of bonding the acoustic wave device substrate and the cover member via the supporting portion. 図22は、第2基板を薄くする薄化工程を説明するための模式的な断面図である。FIG. 22 is a schematic cross-sectional view for explaining a thinning step for thinning the second substrate. 図23は、第2基板に貫通ビアを形成する貫通ビア形成工程を説明するための模式的な断面図である。FIG. 23 is a schematic cross-sectional view for explaining a through-via forming step for forming through-vias in the second substrate. 図24は、第2基板に端子電極を形成する端子電極形成工程を説明するための模式的な断面図である。FIG. 24 is a schematic cross-sectional view for explaining a terminal electrode forming step for forming terminal electrodes on the second substrate. 図25は、端子電極の周りを絶縁する絶縁膜形成工程を説明するための模式的な断面図である。FIG. 25 is a schematic cross-sectional view for explaining the step of forming an insulating film for insulating the periphery of the terminal electrode. 図26は、第2基板にレジストを形成するレジスト形成工程を説明するための模式的な断面図である。FIG. 26 is a schematic cross-sectional view for explaining a resist forming step of forming a resist on the second substrate. 図27は、第2基板を個片化し第1基板の一部をエッチングするエッチング工程を説明するための模式的な断面図である。FIG. 27 is a schematic cross-sectional view for explaining an etching step of dividing the second substrate into pieces and etching a part of the first substrate. 図28は、第1基板の第2基板とは反対側の主面を研磨して第1基板を薄くし、個片化する研磨工程を説明するための断面図である。FIG. 28 is a cross-sectional view for explaining a polishing step of polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it. 図29は、第2実施形態に係る弾性波装置の一例を示す断面図である。FIG. 29 is a cross-sectional view showing an example of the elastic wave device according to the second embodiment. 図30は、第3実施形態に係る弾性波装置の一例を示す断面図である。FIG. 30 is a cross-sectional view showing an example of an elastic wave device according to the third embodiment.
 以下に、本開示の実施の形態を図面に基づいて詳細に説明する。なお、この実施の形態により本開示が限定されるものではない。なお、本開示に記載の各実施形態は、例示的なものであり、異なる実施形態間において、構成の部分的な置換又は組み合わせが可能である変形例や第2実施の形態以降では第1の実施形態と共通の事柄についての記述を省略し、異なる点についてのみ説明する。特に、同様の構成による同様の作用効果については実施形態毎には逐次言及しない。 Below, embodiments of the present disclosure will be described in detail based on the drawings. Note that the present disclosure is not limited by this embodiment. It should be noted that each embodiment described in the present disclosure is an exemplary one, and among different embodiments, a modification that allows partial replacement or combination of configurations, and the first embodiment after the second embodiment A description of matters common to the embodiment will be omitted, and only different points will be described. In particular, similar actions and effects due to similar configurations will not be mentioned sequentially for each embodiment.
 (第1実施形態)
 図1Aは、第1実施形態の弾性波装置を示す斜視図である。図1Bは、第1実施形態の電極構造を示す平面図である。
(First embodiment)
1A is a perspective view showing an elastic wave device according to a first embodiment; FIG. FIG. 1B is a plan view showing the electrode structure of the first embodiment.
 第1実施形態の弾性波装置1は、LiNbOからなる圧電層2を有する。圧電層2は、LiTaOからなるものであってもよい。LiNbOやLiTaOのカット角は、第1実施形態では、Zカットである。LiNbOやLiTaOのカット角は、回転YカットやXカットであってもよい。好ましくは、Y伝搬及びX伝搬±30°の伝搬方位が好ましい。 The elastic wave device 1 of the first embodiment has a piezoelectric layer 2 made of LiNbO 3 . The piezoelectric layer 2 may consist of LiTaO 3 . The cut angle of LiNbO 3 and LiTaO 3 is Z-cut in the first embodiment. The cut angles of LiNbO 3 and LiTaO 3 may be rotated Y-cut or X-cut. Preferably, the Y-propagation and X-propagation ±30° propagation orientations are preferred.
 圧電層2の厚みは、特に限定されないが、厚み滑り1次モードを効果的に励振するには、50nm以上、1000nm以下が好ましい。 Although the thickness of the piezoelectric layer 2 is not particularly limited, it is preferably 50 nm or more and 1000 nm or less in order to effectively excite the thickness shear primary mode.
 圧電層2は、Z方向に対向し合う第1主面2aと、第2主面2bとを有する。第1主面2a上に、電極指3及び電極指4が設けられている。 The piezoelectric layer 2 has a first main surface 2a and a second main surface 2b facing each other in the Z direction. Electrode fingers 3 and 4 are provided on the first main surface 2a.
 ここで電極指3が「第1電極指」の一例であり、電極指4が「第2電極指」の一例である。図1A及び図1Bでは、複数の電極指3は、第1のバスバー電極5に接続されている複数の「第1電極指」である。複数の電極指4は、第2のバスバー電極6に接続されている複数の「第2電極指」である。複数の電極指3及び複数の電極指4は、互いに間挿し合っている。これにより、電極指3と、電極指4と、第1のバスバー電極5と、第2のバスバー電極6と、を備えるIDT(Interdigital Transuducer)電極が構成される。 Here, the electrode finger 3 is an example of the "first electrode finger" and the electrode finger 4 is an example of the "second electrode finger". In FIGS. 1A and 1B , the multiple electrode fingers 3 are multiple “first electrode fingers” connected to the first busbar electrodes 5 . The multiple electrode fingers 4 are multiple “second electrode fingers” connected to the second busbar electrodes 6 . The plurality of electrode fingers 3 and the plurality of electrode fingers 4 are interdigitated with each other. Thus, an IDT (Interdigital Transducer) electrode including electrode fingers 3 , electrode fingers 4 , first busbar electrodes 5 , and second busbar electrodes 6 is configured.
 電極指3及び電極指4は、矩形形状を有し、長さ方向を有する。この長さ方向と直交する方向において、電極指3と、電極指3と隣接する電極指4とが対向している。電極指3、電極指4の長さ方向、及び、電極指3、電極指4の長さ方向と直交する方向はいずれも、圧電層2の厚み方向に交差する方向である。このため、電極指3と、電極指3と隣接する電極指4とは、圧電層2の厚み方向に交差する方向において対向しているともいえる。以下の説明では、圧電層2の厚み方向をZ方向(又は第1方向)とし、電極指3、電極指4の長さ方向をY方向(又は第2方向)とし、電極指3、電極指4の直交する方向をX方向(又は第3方向)として、説明することがある。 The electrode fingers 3 and 4 have a rectangular shape and a length direction. The electrode finger 3 and the electrode finger 4 adjacent to the electrode finger 3 face each other in a direction perpendicular to the length direction. Both the length direction of the electrode fingers 3 and 4 and the direction orthogonal to the length direction of the electrode fingers 3 and 4 are directions that intersect the thickness direction of the piezoelectric layer 2 . Therefore, it can be said that the electrode finger 3 and the electrode finger 4 adjacent to the electrode finger 3 face each other in the direction intersecting the thickness direction of the piezoelectric layer 2 . In the following description, the thickness direction of the piezoelectric layer 2 is defined as the Z direction (or first direction), the length direction of the electrode fingers 3 and 4 is defined as the Y direction (or second direction), and the electrode fingers 3 and electrode fingers 4 may be described as the X direction (or the third direction).
 また、電極指3、電極指4の長さ方向が図1A及び図1Bに示す電極指3、電極指4の長さ方向に直交する方向と入れ替わってもよい。すなわち、図1A及び図1Bにおいて、第1のバスバー電極5及び第2のバスバー電極6が延びている方向に電極指3、電極指4を延ばしてもよい。その場合、第1のバスバー電極5及び第2のバスバー電極6は、図1A及び図1Bにおいて電極指3、電極指4が延びている方向に延びることとなる。そして、一方電位に接続される電極指3と、他方電位に接続される電極指4とが隣り合う1対の構造が、上記電極指3、電極指4の長さ方向と直交する方向に、複数対設けられている。 Further, the length direction of the electrode fingers 3 and 4 may be interchanged with the direction orthogonal to the length direction of the electrode fingers 3 and 4 shown in FIGS. 1A and 1B. That is, in FIGS. 1A and 1B, the electrode fingers 3 and 4 may extend in the direction in which the first busbar electrodes 5 and the second busbar electrodes 6 extend. In that case, the first busbar electrode 5 and the second busbar electrode 6 extend in the direction in which the electrode fingers 3 and 4 extend in FIGS. 1A and 1B. A pair of structures in which the electrode fingers 3 connected to one potential and the electrode fingers 4 connected to the other potential are adjacent to each other are arranged in a direction perpendicular to the length direction of the electrode fingers 3 and 4. Multiple pairs are provided.
 ここで電極指3と電極指4とが隣り合うとは、電極指3と電極指4とが直接接触するように配置されている場合ではなく、電極指3と電極指4とが間隔を介して配置されている場合を指す。また、電極指3と電極指4とが隣り合う場合、電極指3と電極指4との間には、他の電極指3、電極指4を含む、ホット電極やグラウンド電極に接続される電極は配置されない。この対数は、整数対である必要はなく、1.5対や2.5対などであってもよい。 Here, the electrode finger 3 and the electrode finger 4 are adjacent to each other, not when the electrode finger 3 and the electrode finger 4 are arranged so as to be in direct contact, but when the electrode finger 3 and the electrode finger 4 are arranged with a gap therebetween. It refers to the case where the When the electrode finger 3 and the electrode finger 4 are adjacent to each other, there are electrodes connected to the hot electrode and the ground electrode, including other electrode fingers 3 and 4, between the electrode finger 3 and the electrode finger 4. is not placed. The logarithms need not be integer pairs, but may be 1.5 pairs, 2.5 pairs, or the like.
 電極指3と電極指4との間の中心間距離すなわちピッチは、1μm以上、10μm以下の範囲が好ましい。また、電極指3と電極指4との間の中心間距離とは、電極指3の長さ方向と直交する方向における電極指3の幅寸法の中心と、電極指4の長さ方向と直交する方向における電極指4の幅寸法の中心とを結んだ距離となる。 The center-to-center distance, that is, the pitch, between the electrode fingers 3 and 4 is preferably in the range of 1 μm or more and 10 μm or less. Further, the center-to-center distance between the electrode fingers 3 and 4 means the center of the width dimension of the electrode fingers 3 in the direction orthogonal to the length direction of the electrode fingers 3 and the distance orthogonal to the length direction of the electrode fingers 4 . It is the distance connecting the center of the width dimension of the electrode finger 4 in the direction of
 さらに、電極指3、電極指4の少なくとも一方が複数本ある場合(電極指3、電極指4を一対の電極組とした場合に、1.5対以上の電極組がある場合)、電極指3、電極指4の中心間距離は、1.5対以上の電極指3、電極指4のうち隣り合う電極指3、電極指4それぞれの中心間距離の平均値を指す。 Furthermore, when at least one of the electrode fingers 3 and 4 is plural (when there are 1.5 or more pairs of electrodes when the electrode fingers 3 and 4 are paired as a pair of electrode pairs), the electrode fingers 3. The center-to-center distance of the electrode fingers 4 refers to the average value of the center-to-center distances of adjacent electrode fingers 3 and electrode fingers 4 among 1.5 or more pairs of electrode fingers 3 and electrode fingers 4 .
 また、電極指3、電極指4の幅、すなわち電極指3、電極指4の対向方向の寸法は、150nm以上、1000nm以下の範囲が好ましい。なお、電極指3と電極指4との間の中心間距離とは、電極指3の長さ方向と直交する方向における電極指3の寸法(幅寸法)の中心と、電極指4の長さ方向と直交する方向における電極指4の寸法(幅寸法)の中心とを結んだ距離となる。 Also, the width of the electrode fingers 3 and 4, that is, the dimension in the facing direction of the electrode fingers 3 and 4 is preferably in the range of 150 nm or more and 1000 nm or less. Note that the center-to-center distance between the electrode fingers 3 and 4 is the distance between the center of the dimension (width dimension) of the electrode finger 3 in the direction perpendicular to the length direction of the electrode finger 3 and the length of the electrode finger 4. It is the distance connecting the center of the dimension (width dimension) of the electrode finger 4 in the direction orthogonal to the direction.
 また、第1実施形態では、Zカットの圧電層を用いているため、電極指3、電極指4の長さ方向と直交する方向は、圧電層2の分極方向に直交する方向となる。圧電層2として他のカット角の圧電体を用いた場合には、この限りでない。ここにおいて、「直交」とは、厳密に直交する場合のみに限定されず、略直交(電極指3、電極指4の長さ方向と直交する方向と分極方向とのなす角度が例えば90°±10°)でもよい。 Also, in the first embodiment, since the Z-cut piezoelectric layer is used, the direction orthogonal to the length direction of the electrode fingers 3 and 4 is the direction orthogonal to the polarization direction of the piezoelectric layer 2 . This is not the case when a piezoelectric material with a different cut angle is used as the piezoelectric layer 2 . Here, "perpendicular" is not limited to being strictly perpendicular, but substantially perpendicular (the angle formed by the direction perpendicular to the length direction of the electrode fingers 3 and electrode fingers 4 and the polarization direction is, for example, 90° ± 10°).
 圧電層2の第2主面2b側には、中間層7を介して支持基板8が積層されている。中間層7及び支持基板8は、枠状の形状を有し、図2に示すように、開口部7a、8aを有する。それによって、空間部(エアギャップ)9が形成されている。 A support substrate 8 is laminated on the second main surface 2b side of the piezoelectric layer 2 with an intermediate layer 7 interposed therebetween. The intermediate layer 7 and the support substrate 8 have a frame shape and, as shown in FIG. 2, openings 7a and 8a. A space (air gap) 9 is thereby formed.
 空間部9は、圧電層2の励振領域Cの振動を妨げないために設けられている。従って、上記支持基板8は、少なくとも1対の電極指3、電極指4が設けられている部分と重ならない位置において、第2主面2bに中間層7を介して積層されている。なお、中間層7は設けられずともよい。従って、支持基板8は、圧電層2の第2主面2bに直接又は間接に積層され得る。 The space 9 is provided so as not to disturb the vibration of the excitation region C of the piezoelectric layer 2 . Therefore, the support substrate 8 is laminated on the second main surface 2b with the intermediate layer 7 interposed therebetween at a position not overlapping the portion where at least one pair of electrode fingers 3 and 4 are provided. Note that the intermediate layer 7 may not be provided. Therefore, the support substrate 8 can be directly or indirectly laminated to the second main surface 2b of the piezoelectric layer 2 .
 中間層7は、酸化ケイ素で形成されている。もっとも、中間層7は、酸化ケイ素の他、窒化ケイ素、アルミナなどの適宜の絶縁性材料で形成することができる。 The intermediate layer 7 is made of silicon oxide. However, the intermediate layer 7 can be formed of an appropriate insulating material other than silicon oxide, such as silicon nitride and alumina.
 支持基板8は、Siにより形成されている。Siの圧電層2側の面における面方位は(100)や(110)であってもよく、(111)であってもよい。好ましくは、抵抗率4kΩ以上の高抵抗のSiが望ましい。もっとも、支持基板8についても適宜の絶縁性材料や半導体材料を用いて構成することができる。支持基板8の材料としては、例えば、酸化アルミニウム、タンタル酸リチウム、ニオブ酸リチウム、水晶などの圧電体、アルミナ、マグネシア、サファイア、窒化ケイ素、窒化アルミニウム、炭化ケイ素、ジルコニア、コージライト、ムライト、ステアタイト、フォルステライトなどの各種セラミック、ダイヤモンド、ガラスなどの誘電体、窒化ガリウムなどの半導体などを用いることができる。 The support substrate 8 is made of Si. The plane orientation of the surface of Si on the piezoelectric layer 2 side may be (100), (110), or (111). Preferably, high-resistance Si having a resistivity of 4 kΩ or more is desirable. However, the support substrate 8 can also be constructed using an appropriate insulating material or semiconductor material. Materials for the support substrate 8 include, for example, aluminum oxide, lithium tantalate, lithium niobate, piezoelectric materials such as crystal, alumina, magnesia, sapphire, silicon nitride, aluminum nitride, silicon carbide, zirconia, cordierite, mullite, and steer. Various ceramics such as tight and forsterite, dielectrics such as diamond and glass, and semiconductors such as gallium nitride can be used.
 上記複数の電極指3、電極指4及び第1のバスバー電極5、第2のバスバー電極6は、Al又はAlCu合金などの適宜の金属若しくは合金からなる。第1実施形態では、電極指3、電極指4及び第1のバスバー電極5、第2のバスバー電極6は、Ti膜上にAl膜を積層した構造を有する。なお、Ti膜以外の密着層を用いてもよい。 The plurality of electrode fingers 3, electrode fingers 4, first busbar electrodes 5, and second busbar electrodes 6 are made of an appropriate metal or alloy such as Al or an AlCu alloy. In the first embodiment, the electrode fingers 3, the electrode fingers 4, the first busbar electrodes 5, and the second busbar electrodes 6 have a structure in which an Al film is laminated on a Ti film. Note that an adhesion layer other than the Ti film may be used.
 駆動に際しては、複数の電極指3と、複数の電極指4との間に交流電圧を印加する。より具体的には、第1のバスバー電極5と第2のバスバー電極6との間に交流電圧を印加する。それによって、圧電層2において励振される厚み滑り1次モードのバルク波を利用した、共振特性を得ることが可能とされている。 When driving, an AC voltage is applied between the multiple electrode fingers 3 and the multiple electrode fingers 4 . More specifically, an AC voltage is applied between the first busbar electrode 5 and the second busbar electrode 6 . As a result, it is possible to obtain resonance characteristics using a thickness-shear primary mode bulk wave excited in the piezoelectric layer 2 .
 また、弾性波装置1では、圧電層2の厚みをd、複数対の電極指3、電極指4のうちいずれかの隣り合う電極指3、電極指4の中心間距離をpとした場合、d/pは0.5以下とされている。そのため、上記厚み滑り1次モードのバルク波が効果的に励振され、良好な共振特性を得ることができる。より好ましくは、d/pは0.24以下であり、その場合には、より一層良好な共振特性を得ることができる。 Further, in the elastic wave device 1, when the thickness of the piezoelectric layer 2 is d, and the center-to-center distance between any one of the plurality of pairs of electrode fingers 3 and 4 adjacent to each other is p, d/p is set to 0.5 or less. As a result, the thickness-shear primary mode bulk wave is effectively excited, and good resonance characteristics can be obtained. More preferably, d/p is 0.24 or less, in which case even better resonance characteristics can be obtained.
 なお、第1実施形態のように電極指3、電極指4の少なくとも一方が複数本ある場合、すなわち、電極指3、電極指4を1対の電極組とした場合に電極指3、電極指4が1.5対以上ある場合、隣り合う電極指3、電極指4の中心間距離pは、各隣り合う電極指3、電極指4の中心間距離の平均距離となる。 When at least one of the electrode fingers 3 and the electrode fingers 4 is plural as in the first embodiment, that is, when the electrode fingers 3 and the electrode fingers 4 form a pair of electrodes, the electrode fingers 3 and the electrode fingers When there are 1.5 pairs or more of 4, the center-to-center distance p between the adjacent electrode fingers 3 and 4 is the average distance between the center-to-center distances between the adjacent electrode fingers 3 and 4 .
 第1実施形態の弾性波装置1では、上記構成を備えるため、小型化を図ろうとして、電極指3、電極指4の対数を小さくしたとしても、Q値の低下が生じ難い。これは、両側に反射器を必要としない共振器であり、伝搬ロスが少ないためである。また、上記反射器を必要としないのは、厚み滑り1次モードのバルク波を利用していることによる。 Since the acoustic wave device 1 of the first embodiment has the above configuration, even if the logarithms of the electrode fingers 3 and 4 are reduced in an attempt to reduce the size, the Q value is unlikely to decrease. This is because the resonator does not require reflectors on both sides, and the propagation loss is small. The reason why the above reflector is not required is that the bulk wave of the thickness-shlip primary mode is used.
 図3Aは、比較例の圧電層を伝播するラム波を説明するための模式的な断面図である。図3Bは、第1実施形態の圧電層を伝播する厚み滑り1次モードのバルク波を説明するための模式的な断面図である。図4は、第1実施形態の圧電層を伝播する厚み滑り1次モードのバルク波の振幅方向を説明するための模式的な断面図である。 FIG. 3A is a schematic cross-sectional view for explaining Lamb waves propagating through the piezoelectric layer of the comparative example. FIG. 3B is a schematic cross-sectional view for explaining a thickness-shear primary mode bulk wave propagating through the piezoelectric layer of the first embodiment. FIG. 4 is a schematic cross-sectional view for explaining the amplitude direction of a thickness-shear primary mode bulk wave propagating in the piezoelectric layer of the first embodiment.
 図3Aでは、特許文献1に記載のような弾性波装置であり、圧電層をラム波が伝搬する。図3Aに示すように、圧電層201中を矢印で示すように波が伝搬する。ここで、圧電層201には、第1主面201aと、第2主面201bとがあり、第1主面201aと第2主面201bとを結ぶ厚み方向がZ方向である。X方向は、IDT電極の電極指3、4が並んでいる方向である。図3Aに示すように、ラム波では、波が図示のように、X方向に伝搬していく。板波であるため、圧電層201が全体として振動するものの、波はX方向に伝搬するため、両側に反射器を配置して、共振特性を得ている。そのため、波の伝搬ロスが生じ、小型化を図った場合、すなわち電極指3、4の対数を少なくした場合、Q値が低下する。 FIG. 3A shows an acoustic wave device as described in Patent Document 1, in which Lamb waves propagate through the piezoelectric layer. As shown in FIG. 3A, waves propagate through the piezoelectric layer 201 as indicated by arrows. Here, the piezoelectric layer 201 has a first principal surface 201a and a second principal surface 201b, and the thickness direction connecting the first principal surface 201a and the second principal surface 201b is the Z direction. The X direction is the direction in which the electrode fingers 3 and 4 of the IDT electrodes are aligned. As shown in FIG. 3A, in the Lamb wave, the wave propagates in the X direction as shown. Since it is a plate wave, although the piezoelectric layer 201 vibrates as a whole, the wave propagates in the X direction, so reflectors are arranged on both sides to obtain resonance characteristics. Therefore, wave propagation loss occurs, and when miniaturization is attempted, that is, when the number of logarithms of the electrode fingers 3 and 4 is reduced, the Q value is lowered.
 これに対して、図3Bに示すように、第1実施形態の弾性波装置では、振動変位は厚み滑り方向であるから、波は、圧電層2の第1主面2aと第2主面2bとを結ぶ方向、すなわちZ方向にほぼ伝搬し、共振する。すなわち、波のX方向成分がZ方向成分に比べて著しく小さい。そして、このZ方向の波の伝搬により共振特性が得られるため、反射器を必要としない。よって、反射器に伝搬する際の伝搬損失は生じない。従って、小型化を進めようとして、電極指3、電極指4からなる電極対の対数を減らしたとしても、Q値の低下が生じ難い。 On the other hand, as shown in FIG. 3B, in the elastic wave device of the first embodiment, since the vibration displacement is in the thickness sliding direction, the wave is applied to the first main surface 2a and the second main surface 2b of the piezoelectric layer 2. , that is, in the Z direction, and resonates. That is, the X-direction component of the wave is significantly smaller than the Z-direction component. Further, since resonance characteristics are obtained by propagating waves in the Z direction, no reflector is required. Therefore, no propagation loss occurs when propagating to the reflector. Therefore, even if the number of electrode pairs consisting of the electrode fingers 3 and 4 is reduced in an attempt to promote miniaturization, the Q value is unlikely to decrease.
 なお、厚み滑り1次モードのバルク波の振幅方向は、図4に示すように、圧電層2の励振領域C(図1B参照)に含まれる第1領域251と、励振領域Cに含まれる第2領域252とで逆になる。図4では、電極指3と電極指4との間に、電極指4が電極指3よりも高電位となる電圧が印加された場合のバルク波を模式的に示してある。第1領域251は、励振領域Cのうち、圧電層2の厚み方向に直交し圧電層2を2分する仮想平面VP1と、第1主面2aとの間の領域である。第2領域252は、励振領域Cのうち、仮想平面VP1と、第2主面2bとの間の領域である。 As shown in FIG. 4, the amplitude direction of the bulk wave of the primary thickness-shear mode is the first region 251 included in the excitation region C (see FIG. 1B) of the piezoelectric layer 2 and the first region 251 included in the excitation region C (see FIG. 1B). 2 area 252 is reversed. FIG. 4 schematically shows bulk waves when a voltage is applied between the electrode fingers 3 so that the electrode fingers 4 have a higher potential than the electrode fingers 3 . The first region 251 is a region of the excitation region C between the virtual plane VP1 that is orthogonal to the thickness direction of the piezoelectric layer 2 and bisects the piezoelectric layer 2 and the first main surface 2a. The second region 252 is a region of the excitation region C between the virtual plane VP1 and the second main surface 2b.
 弾性波装置1では、電極指3と電極指4とからなる少なくとも1対の電極が配置されているが、X方向に波を伝搬させるものではないため、この電極指3、電極指4からなる電極対の対数は複数対ある必要は必ずしもない。すなわち、少なくとも1対の電極が設けられてさえおればよい。 In the elastic wave device 1, at least one pair of electrodes consisting of the electrode fingers 3 and 4 is arranged. It is not always necessary to have a plurality of pairs of electrode pairs. That is, it is sufficient that at least one pair of electrodes is provided.
 例えば、上記電極指3がホット電位に接続される電極であり、電極指4がグラウンド電位に接続される電極である。もっとも、電極指3がグラウンド電位に、電極指4がホット電位に接続されてもよい。第1実施形態では、少なくとも1対の電極は、上記のように、ホット電位に接続される電極又はグラウンド電位に接続される電極であり、浮き電極は設けられていない。 For example, the electrode finger 3 is an electrode connected to a hot potential, and the electrode finger 4 is an electrode connected to a ground potential. However, the electrode finger 3 may be connected to the ground potential and the electrode finger 4 to the hot potential. In the first embodiment, the at least one pair of electrodes are, as described above, electrodes connected to a hot potential or electrodes connected to a ground potential, and no floating electrodes are provided.
 図5は、第1実施形態の弾性波装置の共振特性の例を示す説明図である。なお、図5に示す共振特性を得た弾性波装置1の設計パラメータは以下の通りである。 FIG. 5 is an explanatory diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment. The design parameters of the acoustic wave device 1 that obtained the resonance characteristics shown in FIG. 5 are as follows.
 圧電層2:オイラー角(0°、0°、90°)のLiNbO
 圧電層2の厚み:400nm
Piezoelectric layer 2: LiNbO3 with Euler angles (0°, 0°, 90°)
Thickness of piezoelectric layer 2: 400 nm
 励振領域C(図1B参照)の長さ:40μm
 電極指3、電極指4からなる電極の対数:21対
 電極指3と電極指4との間の中心間距離(ピッチ):3μm
 電極指3、電極指4の幅:500nm
 d/p:0.133
Length of excitation region C (see FIG. 1B): 40 μm
Number of electrode pairs consisting of electrode fingers 3 and 4: 21 pairs Center-to-center distance (pitch) between electrode fingers 3 and 4: 3 μm
Width of electrode fingers 3 and 4: 500 nm
d/p: 0.133
 中間層7:1μmの厚みの酸化ケイ素膜  Middle layer 7: Silicon oxide film with a thickness of 1 μm
 支持基板8:Si Support substrate 8: Si
 なお、励振領域C(図1B参照)とは、電極指3と電極指4の長さ方向と直交するX方向に視たときに、電極指3と電極指4とが重なっている領域である。励振領域Cの長さとは、励振領域Cの電極指3、電極指4の長さ方向に沿う寸法である。 The excitation region C (see FIG. 1B) is a region where the electrode fingers 3 and 4 overlap when viewed in the X direction perpendicular to the length direction of the electrode fingers 3 and 4. . The length of the excitation region C is the dimension along the length direction of the electrode fingers 3 and 4 of the excitation region C. As shown in FIG.
 第1実施形態では、電極指3、電極指4からなる電極対の電極間距離は、複数対において全て等しくした。すなわち、電極指3と電極指4とを等ピッチで配置した。 In the first embodiment, the inter-electrode distances of the electrode pairs consisting of the electrode fingers 3 and 4 are all equal in a plurality of pairs. That is, the electrode fingers 3 and the electrode fingers 4 are arranged at equal pitches.
 図5から明らかなように、反射器を有しないにもかかわらず、比帯域が12.5%である良好な共振特性が得られている。 As is clear from FIG. 5, good resonance characteristics with a specific bandwidth of 12.5% are obtained in spite of having no reflector.
 ところで、上記圧電層2の厚みをd、電極指3と電極指4との電極の中心間距離をpとした場合、第1実施形態では、d/pは0.5以下、より好ましくは0.24以下である。これを、図6を参照して説明する。 By the way, when the thickness of the piezoelectric layer 2 is d, and the center-to-center distance between the electrode fingers 3 and 4 is p, in the first embodiment, d/p is 0.5 or less, more preferably 0. .24 or less. This will be explained with reference to FIG.
 図5に示した共振特性を得た弾性波装置と同様に、但しd/2pを変化させ、複数の弾性波装置を得た。図6は、第1実施形態の弾性波装置において、隣り合う電極の中心間距離又は中心間距離の平均距離をp、圧電層2の平均厚みをdとした場合、d/2pと、共振子としての比帯域との関係を示す説明図である。 A plurality of elastic wave devices were obtained by changing d/2p in the same manner as the elastic wave device that obtained the resonance characteristics shown in FIG. In the elastic wave device of the first embodiment, FIG. 6 shows d/2p, where p is the center-to-center distance between adjacent electrodes or the average distance of the center-to-center distances, and d is the average thickness of the piezoelectric layer 2. It is an explanatory view showing the relationship with the fractional bandwidth as.
 図6に示すように、d/2pが0.25を超えると、すなわちd/p>0.5では、d/pを調整しても、比帯域は5%未満である。これに対して、d/2p≦0.25、すなわちd/p≦0.5の場合には、その範囲内でd/pを変化させれば、比帯域を5%以上とすることができ、すなわち高い結合係数を有する共振子を構成することができる。また、d/2pが0.12以下の場合、すなわちd/pが0.24以下の場合には、比帯域を7%以上と高めることができる。加えて、d/pをこの範囲内で調整すれば、より一層比帯域の広い共振子を得ることができ、より一層高い結合係数を有する共振子を実現することができる。従って、d/pを0.5以下とすることにより、上記厚み滑り1次モードのバルク波を利用した、高い結合係数を有する共振子を構成し得ることがわかる。 As shown in FIG. 6, when d/2p exceeds 0.25, that is, when d/p>0.5, even if d/p is adjusted, the fractional bandwidth is less than 5%. On the other hand, when d/2p≦0.25, that is, when d/p≦0.5, the specific bandwidth can be increased to 5% or more by changing d/p within that range. , that is, a resonator having a high coupling coefficient can be constructed. Further, when d/2p is 0.12 or less, that is, when d/p is 0.24 or less, the specific bandwidth can be increased to 7% or more. In addition, by adjusting d/p within this range, a resonator with a wider specific band can be obtained, and a resonator with a higher coupling coefficient can be realized. Therefore, by setting d/p to 0.5 or less, it is possible to construct a resonator having a high coupling coefficient using the thickness-shear primary mode bulk wave.
 なお、少なくとも1対の電極は、1対でもよく、上記pは、1対の電極の場合、隣り合う電極指3、電極指4の中心間距離とする。また、1.5対以上の電極の場合には、隣り合う電極指3、電極指4の中心間距離の平均距離をpとすればよい。 Note that at least one pair of electrodes may be one pair, and the above p is the center-to-center distance between adjacent electrode fingers 3 and 4 in the case of one pair of electrodes. In the case of 1.5 pairs or more of electrodes, the average distance between the centers of adjacent electrode fingers 3 and 4 should be p.
 また、圧電層2の厚みdについても、圧電層2が厚みばらつきを有する場合、その厚みを平均化した値を採用すればよい。 Also, for the thickness d of the piezoelectric layer 2, if the piezoelectric layer 2 has variations in thickness, a value obtained by averaging the thickness may be adopted.
 図7は、第1実施形態の弾性波装置において、1対の電極が設けられている例を示す平面図である。弾性波装置101では、圧電層2の第1主面2a上において、電極指3と電極指4とを有する1対の電極が設けられている。なお、図7中のKが交差幅となる。前述したように、本開示の弾性波装置では、電極の対数は1対であってもよい。この場合においても、上記d/pが0.5以下であれば、厚み滑り1次モードのバルク波を効果的に励振することができる。 FIG. 7 is a plan view showing an example in which a pair of electrodes are provided in the elastic wave device of the first embodiment. In elastic wave device 101 , a pair of electrodes having electrode fingers 3 and 4 are provided on first main surface 2 a of piezoelectric layer 2 . Note that K in FIG. 7 is the intersection width. As described above, in the elastic wave device of the present disclosure, the number of pairs of electrodes may be one. Even in this case, if the above d/p is 0.5 or less, it is possible to effectively excite the bulk wave in the primary mode of thickness shear.
 弾性波装置1では、好ましくは、複数の電極指3、電極指4において、いずれかの隣り合う電極指3、電極指4が対向している方向に視たときに重なっている領域である励振領域Cに対する、上記隣り合う電極指3、電極指4のメタライゼーション比MRが、MR≦1.75(d/p)+0.075を満たすことが望ましい。その場合には、スプリアスを効果的に小さくすることができる。これを、図8及び図9を参照して説明する。 In the elastic wave device 1, preferably, the excitation region is an overlapping region of the plurality of electrode fingers 3 and 4 when viewed in the direction in which any adjacent electrode fingers 3 and 4 are facing each other. It is desirable that the metallization ratio MR of the adjacent electrode fingers 3 and 4 with respect to the region C satisfies MR≦1.75(d/p)+0.075. In that case, spurious can be effectively reduced. This will be described with reference to FIGS. 8 and 9. FIG.
 図8は、第1実施形態の弾性波装置の共振特性の一例を示す参考図である。矢印Bで示すスプリアスが、共振周波数と反共振周波数との間に現れている。なお、d/p=0.08として、かつLiNbOのオイラー角(0°、0°、90°)とした。また、上記メタライゼーション比MR=0.35とした。 FIG. 8 is a reference diagram showing an example of resonance characteristics of the elastic wave device of the first embodiment. A spurious signal indicated by an arrow B appears between the resonance frequency and the anti-resonance frequency. Note that d/p=0.08 and the Euler angles of LiNbO 3 (0°, 0°, 90°). Also, the metallization ratio MR was set to 0.35.
 メタライゼーション比MRを、図1Bを参照して説明する。図1Bの電極構造において、1対の電極指3、電極指4に着目した場合、この1対の電極指3、電極指4のみが設けられるとする。この場合、一点鎖線で囲まれた部分が励振領域Cとなる。この励振領域Cとは、電極指3と電極指4とを、電極指3、電極指4の長さ方向と直交する方向すなわち対向方向に視たときに電極指3における電極指4と重なり合っている領域、電極指4における電極指3と重なり合っている領域、及び、電極指3と電極指4との間の領域における電極指3と電極指4とが重なり合っている領域である。そして、この励振領域Cの面積に対する、励振領域C内の電極指3、電極指4の面積が、メタライゼーション比MRとなる。すなわち、メタライゼーション比MRは、メタライゼーション部分の面積の励振領域Cの面積に対する比である。 The metallization ratio MR will be explained with reference to FIG. 1B. In the electrode structure of FIG. 1B, when focusing on the pair of electrode fingers 3 and 4, it is assumed that only the pair of electrode fingers 3 and 4 are provided. In this case, the excitation region C is the portion surrounded by the dashed-dotted line. The excitation region C is a region where the electrode fingers 3 and 4 overlap with the electrode fingers 4 when viewed in a direction perpendicular to the length direction of the electrode fingers 3 and 4, that is, in a facing direction. a region where the electrode fingers 3 overlap each other; and a region between the electrode fingers 3 and 4 where the electrode fingers 3 and 4 overlap each other. The area of the electrode fingers 3 and 4 in the excitation region C with respect to the area of the excitation region C is the metallization ratio MR. That is, the metallization ratio MR is the ratio of the area of the metallization portion to the area of the excitation region C.
 なお、複数対の電極指3、電極指4が設けられている場合、励振領域Cの面積の合計に対する全励振領域Cに含まれているメタライゼーション部分の割合をMRとすればよい。 When a plurality of pairs of electrode fingers 3 and 4 are provided, the ratio of the metallization portion included in the entire excitation region C to the total area of the excitation region C should be MR.
 図9は、第1実施形態の弾性波装置の、多数の弾性波共振子を構成した場合の比帯域と、スプリアスの大きさとしての180度で規格化されたスプリアスのインピーダンスの位相回転量との関係を示す説明図である。なお、比帯域については、圧電層2の膜厚や電極指3、電極指4の寸法を種々変更し、調整した。また、図9は、ZカットのLiNbOからなる圧電層2を用いた場合の結果であるが、他のカット角の圧電層2を用いた場合においても、同様の傾向となる。 FIG. 9 shows the ratio bandwidth when a large number of elastic wave resonators are configured in the elastic wave device of the first embodiment, and the phase rotation amount of the spurious impedance normalized by 180 degrees as the magnitude of the spurious. is an explanatory diagram showing the relationship between. The ratio band was adjusted by changing the film thickness of the piezoelectric layer 2 and the dimensions of the electrode fingers 3 and 4 . FIG. 9 shows the results when the piezoelectric layer 2 made of Z-cut LiNbO 3 is used, but the same tendency is obtained when the piezoelectric layer 2 with other cut angles is used.
 図9中の楕円Jで囲まれている領域では、スプリアスが1.0と大きくなっている。図9から明らかなように、比帯域が0.17を超えると、すなわち17%を超えると、スプリアスレベルが1以上の大きなスプリアスが、比帯域を構成するパラメータを変化させたとしても、通過帯域内に現れる。すなわち、図8に示す共振特性のように、矢印Bで示す大きなスプリアスが帯域内に現れる。よって、比帯域は17%以下であることが好ましい。この場合には、圧電層2の膜厚や電極指3、電極指4の寸法などを調整することにより、スプリアスを小さくすることができる。 In the area surrounded by ellipse J in FIG. 9, the spurious is as large as 1.0. As is clear from FIG. 9, when the fractional band exceeds 0.17, that is, exceeds 17%, a large spurious with a spurious level of 1 or more changes the parameters constituting the fractional band, even if the passband appear within. That is, as in the resonance characteristics shown in FIG. 8, a large spurious component indicated by arrow B appears within the band. Therefore, the specific bandwidth is preferably 17% or less. In this case, by adjusting the film thickness of the piezoelectric layer 2 and the dimensions of the electrode fingers 3 and 4, the spurious response can be reduced.
 図10は、d/2pと、メタライゼーション比MRと、比帯域との関係を示す説明図である。第1実施形態の弾性波装置1において、d/2pと、MRが異なる様々な弾性波装置1を構成し、比帯域を測定した。図10の破線Dの右側のハッチングを付して示した部分が、比帯域が17%以下の領域である。このハッチングを付した領域と、付していない領域との境界は、MR=3.5(d/2p)+0.075で表される。すなわち、MR=1.75(d/p)+0.075である。従って、好ましくは、MR≦1.75(d/p)+0.075である。その場合には、比帯域を17%以下としやすい。より好ましくは、図10中の一点鎖線D1で示すMR=3.5(d/2p)+0.05の右側の領域である。すなわち、MR≦1.75(d/p)+0.05であれば、比帯域を確実に17%以下にすることができる。 FIG. 10 is an explanatory diagram showing the relationship between d/2p, metallization ratio MR, and fractional bandwidth. In the elastic wave device 1 of the first embodiment, various elastic wave devices 1 with different d/2p and MR were configured, and the fractional bandwidth was measured. The hatched portion on the right side of the dashed line D in FIG. 10 is the area where the fractional bandwidth is 17% or less. The boundary between the hatched area and the non-hatched area is expressed by MR=3.5(d/2p)+0.075. That is, MR=1.75(d/p)+0.075. Therefore, preferably MR≤1.75(d/p)+0.075. In that case, it is easy to set the fractional bandwidth to 17% or less. More preferably, it is the area on the right side of MR=3.5(d/2p)+0.05 indicated by the dashed-dotted line D1 in FIG. That is, if MR≤1.75(d/p)+0.05, the fractional bandwidth can be reliably reduced to 17% or less.
 図11は、d/pを限りなく0に近づけた場合のLiNbOのオイラー角(0°、θ、ψ)に対する比帯域のマップを示す説明図である。図11のハッチングを付して示した部分が、少なくとも5%以上の比帯域が得られる領域である。領域の範囲を近似すると、下記の式(1)、式(2)及び式(3)で表される範囲となる。 FIG. 11 is an explanatory diagram showing a map of the fractional band with respect to the Euler angles (0°, θ, ψ) of LiNbO 3 when d/p is infinitely close to 0. FIG. A hatched portion in FIG. 11 is a region where a fractional bandwidth of at least 5% or more is obtained. When the range of the area is approximated, it becomes the range represented by the following formulas (1), (2) and (3).
 (0°±10°、0°~20°、任意のψ)  …式(1)
 (0°±10°、20°~80°、0°~60°(1-(θ-50)/900)1/2)又は(0°±10°、20°~80°、[180°-60°(1-(θ-50)/900)1/2]~180°)  …式(2)
 (0°±10°、[180°-30°(1-(ψ-90)/8100)1/2]~180°、任意のψ)  …式(3)
(0°±10°, 0° to 20°, arbitrary ψ) Equation (1)
(0°±10°, 20° to 80°, 0° to 60° (1-(θ-50) 2 /900) 1/2 ) or (0°±10°, 20° to 80°, [180 °-60° (1-(θ-50) 2 /900) 1/2 ] ~ 180°) Equation (2)
(0°±10°, [180°-30°(1-(ψ-90) 2 /8100) 1/2 ]~180°, arbitrary ψ) Equation (3)
 従って、上記式(1)、式(2)又は式(3)のオイラー角範囲の場合、比帯域を十分に広くすることができ、好ましい。 Therefore, in the case of the Euler angle range of formula (1), formula (2), or formula (3), the fractional band can be sufficiently widened, which is preferable.
 図12は、本開示の実施形態に係る弾性波装置を説明するための部分切り欠き斜視図である。図12において、空間部9の外周縁を破線で示す。本開示の弾性波装置は、板波を利用するものであってもよい。この場合、図12に示すように、弾性波装置301は、反射器310、311を有する。反射器310、311は、圧電層2の電極指3、4の弾性波伝搬方向両側に設けられる。弾性波装置301では、空間部9上の電極指3、4に、交流電界を印加することにより、板波としてのラム波が励振される。このとき、反射器310、311が両側に設けられているため、板波としてのラム波による共振特性を得ることができる。 FIG. 12 is a partially cutaway perspective view for explaining the elastic wave device according to the embodiment of the present disclosure. In FIG. 12, the outer peripheral edge of the space 9 is indicated by a dashed line. The elastic wave device of the present disclosure may utilize plate waves. In this case, the elastic wave device 301 has reflectors 310 and 311 as shown in FIG. Reflectors 310 and 311 are provided on both sides of the electrode fingers 3 and 4 of the piezoelectric layer 2 in the acoustic wave propagation direction. In the elastic wave device 301, a Lamb wave as a plate wave is excited by applying an AC electric field to the electrode fingers 3 and 4 on the space 9. FIG. At this time, since the reflectors 310 and 311 are provided on both sides, it is possible to obtain resonance characteristics due to Lamb waves as Lamb waves.
 以上説明したように、弾性波装置1、101では、厚み滑り1次モードのバルク波が利用されている。また、弾性波装置1、101では、第1電極指3及び第2電極指4は隣り合う電極同士であり、圧電層2の厚みをd、第1電極指3及び第2電極指4の中心間距離をpとした場合、d/pが0.5以下とされている。これにより、弾性波装置が小型化しても、Q値を高めることができる。 As described above, the elastic wave devices 1 and 101 use bulk waves in the primary mode of thickness shear. In the elastic wave devices 1 and 101, the first electrode finger 3 and the second electrode finger 4 are adjacent electrodes, the thickness of the piezoelectric layer 2 is d, and the center of the first electrode finger 3 and the second electrode finger 4 is d/p is set to 0.5 or less, where p is the distance between them. As a result, the Q value can be increased even if the elastic wave device is miniaturized.
 弾性波装置1、101では、圧電層2がニオブ酸リチウム又はタンタル酸リチウムで形成されている。圧電層2の第1主面2a又は第2主面2bには、圧電層2の厚み方向に交差する方向において対向する第1電極指3及び第2電極指4があり、第1電極指3及び第2電極指4の上を保護膜で覆うことが望ましい。 In the elastic wave devices 1 and 101, the piezoelectric layer 2 is made of lithium niobate or lithium tantalate. The first principal surface 2a or the second principal surface 2b of the piezoelectric layer 2 has a first electrode finger 3 and a second electrode finger 4 facing each other in a direction intersecting the thickness direction of the piezoelectric layer 2. and the second electrode fingers 4 are desirably covered with a protective film.
 図13は、第1実施形態に係る弾性波装置の一例を示す平面図である。図13は、弾性波装置を弾性波素子基板10が設けられる側から平面視した図となっている。図14は、図13のXIV-XIV線に沿った断面図である。図13及び図14に示すように、第1実施形態に係る弾性波装置は、弾性波素子基板10と、カバー部材40とを備える。弾性波素子基板10と、カバー部材40とは、支持部によって接合されている。支持部は、第1金属層35、第2金属層14及びシール金属層43、44を含む部材である。以下の説明では、Z方向に平行な向きのうち、一方の向きを上として説明することがある。 FIG. 13 is a plan view showing an example of the elastic wave device according to the first embodiment. FIG. 13 is a plan view of the acoustic wave device from the side where the acoustic wave device substrate 10 is provided. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 13. FIG. As shown in FIGS. 13 and 14, the elastic wave device according to the first embodiment includes an elastic wave element substrate 10 and a cover member 40. As shown in FIGS. The acoustic wave device substrate 10 and the cover member 40 are joined by a support portion. The support is a member that includes the first metal layer 35, the second metal layer 14 and the seal metal layers 43,44. In the following description, one of the directions parallel to the Z direction may be described as upward.
 以下、Z方向に平面視して、ある部材が占める範囲の輪郭のうち、最も外側にある閉じた線を、その部材の外形として説明する。以下、Z方向に平面視して、ある部材の外形と重なる位置にあり、かつXY平面に略平行でない面を、その部材の外形の端面として説明する。 In the following, when viewed from above in the Z direction, the outermost closed line in the outline of the range occupied by a certain member will be described as the outer shape of that member. In the following description, a surface that overlaps the outer shape of a certain member when viewed in the Z direction and is not substantially parallel to the XY plane is defined as an end face of the outer shape of the member.
 図15は、第1実施形態に係る弾性波装置の弾性波素子基板の平面図である。図15は、弾性波素子基板10を、カバー部材40が設けられる側から平面視した図となっている。図15に示すように、弾性波素子基板10は、少なくとも1つの機能電極30を有する部材である。第1実施形態では、弾性波素子基板10は、2つの機能電極30と、支持部材と、圧電層2と、第1金属層35、第2金属層14、誘電体膜19とを備える。 FIG. 15 is a plan view of the elastic wave element substrate of the elastic wave device according to the first embodiment. FIG. 15 is a plan view of the acoustic wave device substrate 10 from the side where the cover member 40 is provided. As shown in FIG. 15, the acoustic wave device substrate 10 is a member having at least one functional electrode 30. As shown in FIG. In the first embodiment, the acoustic wave device substrate 10 includes two functional electrodes 30 , a supporting member, the piezoelectric layer 2 , the first metal layer 35 , the second metal layer 14 and the dielectric film 19 .
 支持部材は、支持基板8を備える部材である。支持基板8は、「第1基板」の一例である。支持基板8は、例えばシリコン基板である。第1実施形態では、支持部材は、中間層7をさらに備える。中間層7は、支持基板8の上に積層される。中間層7は、例えば、酸化ケイ素からなる層である。なお、中間層7は必須の構成ではない。以下の説明では、支持基板8の外形である線を、線P1として説明する。また、Z方向に平面視して、線P1で囲まれる領域、すなわち、支持基板8と重なる領域を、線P1の内側として説明することがある。また、線P1の内側でない領域、すなわち、Z方向に平面視して、支持基板8と重ならない領域を、線P1の外側として説明することがある。 The support member is a member provided with the support substrate 8 . The support substrate 8 is an example of a "first substrate". The support substrate 8 is, for example, a silicon substrate. In a first embodiment the support member further comprises an intermediate layer 7 . The intermediate layer 7 is laminated on the support substrate 8 . The intermediate layer 7 is, for example, a layer made of silicon oxide. Note that the intermediate layer 7 is not an essential component. In the following description, the line that is the outline of the support substrate 8 will be described as a line P1. Also, when viewed in plan in the Z direction, the region surrounded by the line P1, that is, the region overlapping the support substrate 8 may be described as the inside of the line P1. Also, a region that is not inside the line P1, that is, a region that does not overlap the support substrate 8 when viewed in plan in the Z direction may be described as being outside the line P1.
 図14及び図15に示すように、支持部材には、第1空間部91及び引き出し通路9Aが設けられる。第1空間部91と、引き出し通路9Aとは、犠牲層のエッチングにより形成される空間である。第1空間部91と、引き出し通路9Aとは、Z方向に平面視して、機能電極30の少なくとも一部と重なる位置に設けられる。第1実施形態では、第1空間部91及び引き出し通路9Aは、中間層7に形成されている。第1空間部91は、図2に示す空間部9に相当する空間である。引き出し通路9Aは、後述する貫通孔2Hと連通する空間である。なお、第1空間部91及び引き出し通路9Aは、支持基板8に設けられるものであってもよい。 As shown in FIGS. 14 and 15, the support member is provided with a first space 91 and a drawer passage 9A. The first space 91 and the extraction passage 9A are spaces formed by etching the sacrificial layer. The first space 91 and the extraction passage 9A are provided at positions overlapping at least a portion of the functional electrode 30 when viewed in the Z direction. In the first embodiment, the first space 91 and the extraction passage 9A are formed in the intermediate layer 7. As shown in FIG. The first space 91 is a space corresponding to the space 9 shown in FIG. The drawer passage 9A is a space that communicates with a through hole 2H, which will be described later. Note that the first space 91 and the extraction passage 9A may be provided in the support substrate 8 .
 圧電層2は、支持部材に積層される。図14に示すように、第1実施形態では、圧電層2は、中間層7を介して支持基板8の上に設けられる。圧電層2は、例えば、ニオブ酸リチウム又はタンタル酸リチウムを含むが、さらに不可避不純物を含んでいてもよい。なお、支持部材が中間層7を備えていない場合、圧電層2は、支持基板8の上に積層される。圧電層2は、第1主面2aと、第2主面2bとを有する。第1主面2aは、圧電層2の主面のうち、第2基板41側の主面である。第2主面2bは、第1主面2aと反対側の主面であって、圧電層2の主面のうち、支持基板8側の主面である。 The piezoelectric layer 2 is laminated on the supporting member. As shown in FIG. 14, in the first embodiment, the piezoelectric layer 2 is provided on the support substrate 8 with the intermediate layer 7 interposed therebetween. The piezoelectric layer 2 contains, for example, lithium niobate or lithium tantalate, and may further contain unavoidable impurities. It should be noted that the piezoelectric layer 2 is laminated on the support substrate 8 if the support member does not have the intermediate layer 7 . The piezoelectric layer 2 has a first main surface 2a and a second main surface 2b. The first main surface 2 a is the main surface of the piezoelectric layer 2 on the second substrate 41 side. The second main surface 2b is a main surface opposite to the first main surface 2a, and is the main surface of the piezoelectric layer 2 on the support substrate 8 side.
 XY平面に平行な方向に見て、圧電層2の外形の端面は、少なくとも一部が露出している。第1実施形態では、圧電層2の外形の端面は、全て露出している。このとき、圧電層2の外形は、支持基板8の外形と同じである。すなわち、圧電層2の外形は、Z方向に平面視して、線P1と重なっている。これにより、チップサイズのばらつきを抑制できる。 At least a part of the end surface of the piezoelectric layer 2 is exposed when viewed in a direction parallel to the XY plane. In the first embodiment, the outer end faces of the piezoelectric layer 2 are all exposed. At this time, the outer shape of the piezoelectric layer 2 is the same as the outer shape of the support substrate 8 . That is, the outer shape of the piezoelectric layer 2 overlaps the line P1 when viewed from above in the Z direction. As a result, variations in chip size can be suppressed.
 圧電層2には、貫通孔2Hが設けられる。図15に示すように、貫通孔2Hは、引き出し通路9Aと重なるように設けられる。貫通孔2Hは、引き出し通路9Aと連通しており、引き出し通路9Aを介して、空間部9と貫通しているといえる。これにより、圧電層2へ加わる応力が集中しにくくなる。その結果、貫通孔2Hを起点として圧電層2で生じるクラックが抑制される。 The piezoelectric layer 2 is provided with through holes 2H. As shown in FIG. 15, the through hole 2H is provided so as to overlap with the drawer passage 9A. The through hole 2H communicates with the drawer passage 9A, and can be said to penetrate the space 9 via the drawer passage 9A. This makes it difficult for the stress applied to the piezoelectric layer 2 to concentrate. As a result, cracks occurring in the piezoelectric layer 2 starting from the through holes 2H are suppressed.
 機能電極30は、図1Bに示す、対向する第1のバスバー電極5、第2のバスバー電極6と、第1のバスバー電極5に接続される電極指3と、第2のバスバー電極6に接続される電極指4と、を有するIDT電極である。機能電極30は、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられる。第1実施形態では、機能電極30は、圧電層2の第1主面2aに設けられる。すなわち、機能電極30は、後述する第2空間部92の内部に配置されている。 The functional electrodes 30 are connected to the first busbar electrode 5 and the second busbar electrode 6 facing each other, the electrode fingers 3 connected to the first busbar electrode 5, and the second busbar electrode 6 shown in FIG. 1B. It is an IDT electrode having electrode fingers 4 that are connected to each other. The functional electrode 30 is provided on at least one of the first principal surface 2 a and the second principal surface 2 b of the piezoelectric layer 2 . In the first embodiment, the functional electrode 30 is provided on the first main surface 2a of the piezoelectric layer 2. As shown in FIG. That is, the functional electrode 30 is arranged inside the second space 92, which will be described later.
 第1金属層35及び第2金属層14は、カバー部材40を弾性波素子基板10に支持させる支持部である。第1金属層35は、圧電層2の第1主面2aに設けられる。第2金属層14は、第1金属層35に積層される。第1金属層35及び第2金属層14は、金又は金合金と、他の金属、例えば、チタンとの金属積層である。第1金属層35及び第2金属層14は、図15に示すように、Z方向に平面視して、機能電極30の周りを囲むように線状のパターンで形成されるものを含む。第2金属層14は、機能電極30と電気的に接続される配線12を含む。配線12は、電極指3及び電極指4よりも厚い。なお、第1実施形態では、第1金属層35と、第2金属層14とは、同じ材料からなるが、これに限られず、異なる材料としてもよい。 The first metal layer 35 and the second metal layer 14 are supporting portions that support the cover member 40 on the acoustic wave device substrate 10 . The first metal layer 35 is provided on the first main surface 2 a of the piezoelectric layer 2 . The second metal layer 14 is laminated on the first metal layer 35 . The first metal layer 35 and the second metal layer 14 are metal laminates of gold or gold alloys and other metals such as titanium. As shown in FIG. 15, the first metal layer 35 and the second metal layer 14 include those formed in a linear pattern so as to surround the functional electrode 30 in plan view in the Z direction. The second metal layer 14 includes wirings 12 electrically connected to the functional electrodes 30 . The wiring 12 is thicker than the electrode fingers 3 and 4 . Although the first metal layer 35 and the second metal layer 14 are made of the same material in the first embodiment, they are not limited to this and may be made of different materials.
 図14に示すように、第1実施形態では、誘電体膜19が、機能電極30及び機能電極30が設けられる圧電層2の第1主面2aに設けられる。誘電体膜19は、例えば、酸化ケイ素からなる。 As shown in FIG. 14, in the first embodiment, the dielectric film 19 is provided on the functional electrode 30 and the first main surface 2a of the piezoelectric layer 2 on which the functional electrode 30 is provided. The dielectric film 19 is made of silicon oxide, for example.
 図16は、第1実施形態に係る弾性波装置のカバー部材の平面図である。図16は、カバー部材40を、弾性波素子基板10が設けられる側から平面視した図となっている。カバー部材40は、第2基板41を含む部材である。図14及び図16に示すように、第1実施形態では、カバー部材40は、第2基板41と、絶縁層42と、シール金属層43、44と、絶縁層45とを備える。また、カバー部材40には、第2基板41及び絶縁層42、45を貫通する貫通ビアが設けられている。 FIG. 16 is a plan view of the cover member of the elastic wave device according to the first embodiment. FIG. 16 is a plan view of the cover member 40 from the side where the acoustic wave device substrate 10 is provided. The cover member 40 is a member including the second substrate 41 . As shown in FIGS. 14 and 16, in the first embodiment, the cover member 40 includes a second substrate 41, an insulating layer 42, seal metal layers 43 and 44, and an insulating layer 45. As shown in FIGS. Further, the cover member 40 is provided with through vias that penetrate the second substrate 41 and the insulating layers 42 and 45 .
 第2基板41は、例えば、シリコン基板である。第2基板41は、圧電層2の第1主面2aと対向する位置にある。第2基板41は、図13及び図14に示すように、支持基板8より小さい。第2基板41の外形である線を線P2とした場合、線P2は、支持基板8の外形である線P1の内側にある。これにより、弾性波装置の大きさが、線P2ではなく、線P1で制限されるので、チップサイズのばらつきを抑制できる。また、第2基板41のZ方向に対向する2つの主面は、酸化ケイ素からなる絶縁層42、45で覆われている。ここで、以下の説明では、Z方向に平面視して、線P2で囲まれる領域、すなわち、第2基板41と重なる領域を、線P2の内側として説明することがある。また、線P2の内側でない領域、すなわち、Z方向に平面視して、第2基板41と重ならない領域を、線P2の外側として説明することがある。 The second substrate 41 is, for example, a silicon substrate. The second substrate 41 is positioned to face the first main surface 2 a of the piezoelectric layer 2 . The second substrate 41 is smaller than the support substrate 8, as shown in FIGS. Assuming that the line that is the outline of the second substrate 41 is a line P2, the line P2 is inside the line P1 that is the outline of the support substrate 8 . As a result, the size of the elastic wave device is limited by the line P1 instead of the line P2, so that variations in chip size can be suppressed. Two main surfaces of the second substrate 41 facing each other in the Z direction are covered with insulating layers 42 and 45 made of silicon oxide. Here, in the following description, the area surrounded by the line P2, that is, the area overlapping with the second substrate 41 when viewed from above in the Z direction may be described as the inside of the line P2. Also, a region that is not inside the line P2, that is, a region that does not overlap the second substrate 41 when viewed in plan in the Z direction may be described as being outside the line P2.
 シール金属層43、44は、弾性波素子基板10をカバー部材40に支持させる支持部である。シール金属層43、44は、図16で示すように、絶縁層42の一部に形成されている。シール金属層43、44は、Z方向にみて、第2基板41の外形である線P2の内側に配置されている。シール金属層43、44は、金又は金合金と、他の金属、例えば、チタンとの金属積層である。シール金属層43、44は、第2金属層14と同じ材料である。 The sealing metal layers 43 and 44 are supporting portions that support the acoustic wave device substrate 10 on the cover member 40 . Seal metal layers 43 and 44 are formed on a portion of insulating layer 42, as shown in FIG. The seal metal layers 43 and 44 are arranged inside a line P2 that is the outline of the second substrate 41 when viewed in the Z direction. The sealing metal layers 43, 44 are metal laminates of gold or gold alloys and other metals such as titanium. The sealing metal layers 43 , 44 are of the same material as the second metal layer 14 .
 シール金属層43は、図16に示すように、Z方向に平面視して、機能電極30の周りを囲むように線状のパターンで形成されている。シール金属層43は、第2金属層14と接着される。これにより、シール金属層43は、Z方向に平面視して、第2空間部92を密閉できる。ここで、第2空間部92とは、弾性波素子基板10と、カバー部材40との間にある空間である。これにより、機能電極30を保護できる。 As shown in FIG. 16, the seal metal layer 43 is formed in a linear pattern so as to surround the functional electrode 30 when viewed from above in the Z direction. A seal metal layer 43 is adhered to the second metal layer 14 . As a result, the seal metal layer 43 can seal the second space 92 when viewed in the Z direction. Here, the second space portion 92 is a space between the acoustic wave device substrate 10 and the cover member 40 . Thereby, the functional electrode 30 can be protected.
 シール金属層44は、図16に示すように、シール金属層43で囲まれる範囲に設けられている。シール金属層44は、第2金属層14の配線12と接着されることにより、カバー部材40と、弾性波素子基板10とを接合する。これにより、弾性波素子基板10の撓みが抑制される。 The seal metal layer 44 is provided in a range surrounded by the seal metal layer 43, as shown in FIG. The seal metal layer 44 joins the cover member 40 and the acoustic wave element substrate 10 by being adhered to the wiring 12 of the second metal layer 14 . This suppresses bending of the acoustic wave device substrate 10 .
 また、図14に示すように、カバー部材40の貫通ビアには、シード層56を介して、端子電極57と、BGA(ball grid array)バンプ58とが設けられる。シード層56は、Ti層にCu層を積層した積層体である。シード層56は、シード層56は、例えば、酸化ケイ素の層を介して、貫通ビアの内側面、絶縁層45の一部、及びZ方向に平面視して貫通ビアと重なるシール金属層44の部分に積層される。端子電極57は、Cu層、Ni層にAu層をめっきした積層体である。端子電極57は、いわゆる、バンプメタルである。端子電極57は、貫通ビアの内部及びシード層56の上に設けられる。BGAバンプ58は、端子電極57に積層される電極である。BGAバンプ58は、いわゆる、バンプメタルである。これにより、BGAバンプ58から機能電極30までが電気的に接続される。 Further, as shown in FIG. 14, the through via of the cover member 40 is provided with a terminal electrode 57 and a BGA (ball grid array) bump 58 via a seed layer 56 . The seed layer 56 is a laminate in which a Cu layer is laminated on a Ti layer. The seed layer 56 includes, for example, a layer of silicon oxide interposed between the inner surface of the through via, a portion of the insulating layer 45, and the seal metal layer 44 overlapping the through via when viewed in plan in the Z direction. Laminated in parts. The terminal electrode 57 is a laminate in which a Cu layer and a Ni layer are plated with an Au layer. The terminal electrode 57 is a so-called bump metal. A terminal electrode 57 is provided inside the through via and on the seed layer 56 . The BGA bump 58 is an electrode laminated on the terminal electrode 57 . The BGA bump 58 is a so-called bump metal. Thereby, the BGA bumps 58 to the functional electrodes 30 are electrically connected.
 以上説明したように、第1実施形態に係る弾性波装置は、第1基板(支持基板8)と、第1方向にみて、第1基板に重なり、第1主面2aと、第1主面2aと反対側の第2主面2bとを有する圧電層2と、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられた機能電極30と、圧電層2の第1主面2aと第1方向に対向する第2基板41と、圧電層2の第1主面2aと第2基板41との間で第2基板41を支持する支持部と、を備え、第2基板41は、第1方向にみて、第1基板よりも小さく、第2基板41の外形(線P2)は、第1方向にみて、第1基板の外形(線P1)の内側にあり、第1方向と直交する平面方向にみて、第1基板の第2基板41側にある圧電層2の外形の端面が少なくとも一部露出している。これにより、チップサイズが、第2基板41の外形である線P2ではなく、第1基板の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 As described above, the elastic wave device according to the first embodiment overlaps the first substrate (support substrate 8) and the first substrate when viewed in the first direction, and the first main surface 2a and the first main surface a piezoelectric layer 2 having a second main surface 2b opposite to 2a; a functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the piezoelectric layer 2; a second substrate 41 facing the first main surface 2a in the first direction; The second substrate 41 is smaller than the first substrate when viewed in the first direction, and the outer shape (line P2) of the second substrate 41 is inside the outer shape (line P1) of the first substrate when viewed in the first direction, At least a part of the outer end face of the piezoelectric layer 2 on the second substrate 41 side of the first substrate is exposed when viewed in a plane direction perpendicular to the first direction. As a result, the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
 望ましい態様として、平面方向にみて、第1基板の第2基板41側にある圧電層2の外形の端面が全て露出しており、第1方向にみて、第1基板の外形は、圧電層2の外形と同じである。これにより、チップサイズのばらつきをより抑制できる。 As a desirable aspect, when viewed in the planar direction, all the end surfaces of the outer shape of the piezoelectric layer 2 on the second substrate 41 side of the first substrate are exposed, and when viewed in the first direction, the outer shape of the first substrate is the piezoelectric layer 2 . is the same as the external shape of As a result, variations in chip size can be further suppressed.
 望ましい態様として、支持部は、第1基板と第2基板41との間をシールしており、かつ、第1方向にみて、第2基板41の外形の内側に配置されている。これにより、第1基板と第2基板41との間の第2空間部92に、外気の水分や塵埃などが入り込むことを抑制できる。 As a desirable aspect, the supporting portion seals between the first substrate and the second substrate 41 and is arranged inside the outline of the second substrate 41 when viewed in the first direction. As a result, it is possible to prevent moisture, dust, and the like from the outside air from entering the second space 92 between the first substrate and the second substrate 41 .
 望ましい態様として、第1方向にみて、機能電極30は、支持部で囲まれた領域に配置されている。これにより、機能電極30を、外気の水分や塵埃などから保護できる。 As a desirable aspect, the functional electrode 30 is arranged in a region surrounded by the support portion when viewed in the first direction. As a result, the functional electrode 30 can be protected from moisture, dust, and the like in the outside air.
 機能電極30は、第1方向に交差する第2方向に延びる1つ以上の第1電極指3と、第2方向に直交する第3方向に1つ以上の第1電極指3のいずれかと対向し、第2方向に延びる1つ以上の第2電極指4と、を有する。これにより、良好な共振特性が得られる弾性波装置を提供することができる。 The functional electrode 30 faces either one or more first electrode fingers 3 extending in a second direction intersecting the first direction or one or more first electrode fingers 3 extending in a third direction orthogonal to the second direction. and one or more second electrode fingers 4 extending in the second direction. As a result, it is possible to provide an elastic wave device capable of obtaining good resonance characteristics.
 望ましい態様として、圧電層2の厚みは、1つ以上の第1電極指3及び1つ以上の第2電極指4のうち、隣り合う第1電極指3と第2電極指4との間の中心間距離をpとした場合に2p以下である。これにより、弾性波装置1を小型化でき、かつQ値を高めることができる。 As a desirable aspect, the thickness of the piezoelectric layer 2 is the thickness between the adjacent first electrode fingers 3 and the second electrode fingers 4 among the one or more first electrode fingers 3 and the one or more second electrode fingers 4. It is 2p or less when the center-to-center distance is p. Thereby, the acoustic wave device 1 can be miniaturized and the Q value can be increased.
 望ましい態様として、圧電層2が、ニオブ酸リチウム又はタンタル酸リチウムを含む。これにより、良好な共振特性が得られる弾性波装置を提供することができる。 As a preferred embodiment, the piezoelectric layer 2 contains lithium niobate or lithium tantalate. As a result, it is possible to provide an elastic wave device capable of obtaining good resonance characteristics.
 望ましい態様として、厚み滑りモードのバルク波を利用可能に構成されている。これにより、結合係数が高まり、良好な共振特性が得られる弾性波装置を提供することができる。 As a desirable aspect, it is configured to be able to use bulk waves in the thickness-shlip mode. As a result, it is possible to provide an elastic wave device with a high coupling coefficient and good resonance characteristics.
 望ましい態様として、圧電層2の厚みをd、1つ以上の第1電極指3及び1つ以上の第2電極指4のうち、隣り合う第1電極指3と第2電極指4との中心間距離をpとした場合、d/p≦0.5である。これにより、弾性波装置1を小型化でき、かつQ値を高めることができる。 As a desirable mode, the thickness of the piezoelectric layer 2 is d, and the center between the adjacent first electrode fingers 3 and second electrode fingers 4 among the one or more first electrode fingers 3 and the one or more second electrode fingers 4 is d/p≦0.5, where p is the distance between them. Thereby, the acoustic wave device 1 can be miniaturized and the Q value can be increased.
 さらに望ましい態様として、d/pが0.24以下である。これにより、弾性波装置1を小型化でき、かつQ値を高めることができる。 A more desirable aspect is that d/p is 0.24 or less. Thereby, the acoustic wave device 1 can be miniaturized and the Q value can be increased.
 望ましい態様として、機能電極30は、第1方向に交差する第2方向に延びる1つ以上の第1電極指3と、第2方向に直交する第3方向に1つ以上の第1電極指3のいずれかと対向し、第2方向に延びる1つ以上の第2電極指4と、を有し、隣り合う第1電極指3と第2電極指4とが対向している方向に視たときに重なっている領域が励振領域Cであり、励振領域Cに対する、1つ以上の第1電極指3及び1つ以上の第2電極指4のメタライゼーション比をMRとしたときに、MR≦1.75(d/p)+0.075を満たす。この場合、比帯域を確実に17%以下にすることができる。 Desirably, the functional electrode 30 has one or more first electrode fingers 3 extending in a second direction intersecting the first direction and one or more first electrode fingers 3 extending in a third direction orthogonal to the second direction. and one or more second electrode fingers 4 extending in the second direction, when viewed in the direction in which the adjacent first electrode fingers 3 and second electrode fingers 4 face each other. is the excitation region C, and when MR is the metallization ratio of the one or more first electrode fingers 3 and the one or more second electrode fingers 4 with respect to the excitation region C, MR≤1 .75(d/p)+0.075. In this case, the fractional bandwidth can be reliably set to 17% or less.
 望ましい態様として、板波を利用可能に構成されている。これにより、良好な共振特性が得られる弾性波装置を提供することができる。 As a desirable aspect, it is configured so that plate waves can be used. As a result, it is possible to provide an elastic wave device capable of obtaining good resonance characteristics.
 望ましい態様として、圧電層2は、ニオブ酸リチウム又はタンタル酸リチウムであり、ニオブ酸リチウム又はタンタル酸リチウムのオイラー角(φ,θ,ψ)が、以下の式(1)、式(2)又は式(3)の範囲にある。この場合、比帯域を十分に広くすることができる。 As a preferred embodiment, the piezoelectric layer 2 is made of lithium niobate or lithium tantalate, and the Euler angles (φ, θ, ψ) of lithium niobate or lithium tantalate satisfy the following formula (1), formula (2) or It is in the range of formula (3). In this case, the fractional bandwidth can be widened sufficiently.
 (0°±10°,0°~20°,任意のψ)  …式(1)
 (0°±10°,20°~80°,0°~60°(1-(θ-50)/900)1/2) 又は (0°±10°,20°~80°,[180°-60°(1-(θ-50)2/900)1/2]~180°)  …式(2)
 (0°±10°,[180°-30°(1-(ψ-90)/8100)1/2]~180°,任意のψ)  …式(3)
(0°±10°, 0° to 20°, arbitrary ψ) Equation (1)
(0°±10°, 20° to 80°, 0° to 60° (1-(θ-50) 2 /900) 1/2 ) or (0°±10°, 20° to 80°, [180 °-60° (1-(θ-50)2/900) 1/2 ] ~ 180°) Equation (2)
(0°±10°, [180°-30°(1-(ψ-90) 2 /8100) 1/2 ]~180°, arbitrary ψ) Equation (3)
 以下、第1実施形態に係る弾性波装置の製造方法の一例を、図面を用いて説明する。 An example of the method for manufacturing the elastic wave device according to the first embodiment will be described below with reference to the drawings.
 図17は、弾性波素子基板の支持部材を形成する貼り合わせ工程を説明するための模式的な断面図である。図17に示すように、貼り合わせ工程では、まず、圧電層2の第2主面2bに犠牲層7Sを成膜し、次に、圧電層2の第2主面2bと、犠牲層7Sとを覆うように、中間層7となる第1部分7Aを成膜する。第1部分7Aは、犠牲層7Sの影響による凹凸がなくなるように、表面が平坦化されている。次に、支持基板8に、中間層7となる第2部分7Bを成膜する。そして、第1部分7Aと第2部分7Bとを貼り合わせて、圧電層2(圧電基板)を支持基板8に支持させる。貼り合わせ後、圧電層2の第2主面2bと反対側の主面を研磨して、圧電層2を薄くする。これにより、圧電層の第1主面2aを形成する。 FIG. 17 is a schematic cross-sectional view for explaining the bonding process for forming the supporting member of the acoustic wave device substrate. As shown in FIG. 17, in the bonding step, first, the sacrificial layer 7S is formed on the second main surface 2b of the piezoelectric layer 2, and then the second main surface 2b of the piezoelectric layer 2 and the sacrificial layer 7S are formed. A first portion 7A to be the intermediate layer 7 is formed so as to cover the . The surface of the first portion 7A is flattened so that unevenness due to the influence of the sacrificial layer 7S is eliminated. Next, the second portion 7B, which will be the intermediate layer 7, is formed on the support substrate 8. Next, as shown in FIG. Then, the piezoelectric layer 2 (piezoelectric substrate) is supported by the support substrate 8 by bonding the first portion 7A and the second portion 7B together. After bonding, the main surface of the piezoelectric layer 2 opposite to the second main surface 2b is polished to make the piezoelectric layer 2 thinner. This forms the first main surface 2a of the piezoelectric layer.
 図18は、弾性波素子基板の機能電極を形成する電極形成工程を説明するための模式的な断面図である。図18に示すように、電極形成工程では、圧電層2に支持部46を形成する。具体的には、圧電層2の第1主面2aに、第1金属層35を形成し、機能電極30をパターン形成する。そして、第1金属層35の上に、第2金属層14を形成する。ここで、第2金属層14の一部は、機能電極30へ導通する配線12となる。その後、第2金属層14に、シール金属層44aを積層する。ここで、シール金属層44aは、Au又はAu合金の層である。そして、機能電極30の周りを、レジストでマスクし、誘電体膜19を形成する。これにより、機能電極30が誘電体膜19で覆われる。 FIG. 18 is a schematic cross-sectional view for explaining the electrode forming process for forming the functional electrodes of the acoustic wave device substrate. As shown in FIG. 18, in the electrode forming step, the support portion 46 is formed on the piezoelectric layer 2 . Specifically, the first metal layer 35 is formed on the first main surface 2a of the piezoelectric layer 2, and the functional electrodes 30 are patterned. Then, the second metal layer 14 is formed on the first metal layer 35 . Here, a part of the second metal layer 14 becomes the wiring 12 that conducts to the functional electrode 30 . After that, a sealing metal layer 44a is laminated on the second metal layer 14 . Here, the seal metal layer 44a is an Au or Au alloy layer. Then, the periphery of the functional electrode 30 is masked with a resist, and the dielectric film 19 is formed. Thereby, the functional electrode 30 is covered with the dielectric film 19 .
 図19は、弾性波素子基板の第1空間部を形成する第1空間部形成工程を説明するための模式的な断面図である。図19に示すように、第1空間部形成工程では、まず、圧電層2に貫通孔2Hを形成する。貫通孔2Hは、平面視して、圧電層2の犠牲層7Sに重なる位置に開けられる。このとき、圧電層2を、格子状にパターニングして、線P1から外側の領域を除去することで、線P1から外側の領域の支持部材を露出させる。ここで、支持部材が露出した領域は、弾性波装置が個片化される境界となる。次にエッチング液を貫通孔2Hから注入し、犠牲層7Sを溶解する。これにより、犠牲層7Sのあった空間が第1空間部91となる。その後、配線12へ測定器を接続し、周波数特性を確認後、イオンエッチングなどにより誘電体膜19の膜厚を調整する。誘電体膜19の膜厚の調整は、所望の周波数特性を得られるまで繰り返される。 FIG. 19 is a schematic cross-sectional view for explaining the first space portion forming step for forming the first space portion of the acoustic wave device substrate. As shown in FIG. 19, in the step of forming the first space, first, through holes 2H are formed in the piezoelectric layer 2 . The through hole 2H is formed at a position overlapping the sacrificial layer 7S of the piezoelectric layer 2 in plan view. At this time, the piezoelectric layer 2 is patterned in a grid pattern to remove the region outside the line P1, thereby exposing the support member in the region outside the line P1. Here, the area where the supporting member is exposed is the boundary where the acoustic wave device is singulated. Next, an etchant is injected from the through hole 2H to dissolve the sacrificial layer 7S. As a result, the space where the sacrificial layer 7S was located becomes the first space portion 91. Next, as shown in FIG. After that, a measuring instrument is connected to the wiring 12, and after confirming the frequency characteristics, the film thickness of the dielectric film 19 is adjusted by ion etching or the like. Adjustment of the film thickness of the dielectric film 19 is repeated until desired frequency characteristics are obtained.
 図20は、カバー部材を形成するカバー部材形成工程を説明するための模式的な断面図である。図20に示すように、カバー部材形成工程では、第2基板41の一方の主面に、絶縁層42を形成する。そして、絶縁層42に、支持部47として、シール金属層43b及びシール金属層44bを形成する。ここで、シール金属層43b及びシール金属層44bは、Au又はAu合金の層である。 FIG. 20 is a schematic cross-sectional view for explaining the cover member forming process for forming the cover member. As shown in FIG. 20 , in the cover member forming step, an insulating layer 42 is formed on one main surface of the second substrate 41 . Then, a seal metal layer 43 b and a seal metal layer 44 b are formed on the insulating layer 42 as the supporting portion 47 . Here, the seal metal layer 43b and the seal metal layer 44b are Au or Au alloy layers.
 図21は、弾性波素子基板とカバー部材とを支持部を介して接合する接合工程を説明するための模式的な断面図である。図21に示すように、接合工程では、弾性波素子基板10の支持部47と、対向させたカバー部材40の支持部46とを接合する。具体的には、弾性波素子基板10のシール金属層43aと、カバー部材40のシール金属層43bとをAu-Au接合し、シール金属層43aとシール金属層43bとを一体化し、シール金属層43とする。また、弾性波素子基板10のシール金属層44aと、カバー部材40のシール金属層44bとをAu-Au接合し、シール金属層44aとシール金属層44bとを一体化し、シール金属層44とする。 FIG. 21 is a schematic cross-sectional view for explaining a bonding step of bonding the acoustic wave element substrate and the cover member via the supporting portion. As shown in FIG. 21, in the joining step, the support portion 47 of the acoustic wave device substrate 10 and the support portion 46 of the cover member 40 facing each other are joined. Specifically, the seal metal layer 43a of the acoustic wave element substrate 10 and the seal metal layer 43b of the cover member 40 are Au--Au bonded, and the seal metal layer 43a and the seal metal layer 43b are integrated to form the seal metal layer. 43. Further, the sealing metal layer 44a of the acoustic wave element substrate 10 and the sealing metal layer 44b of the cover member 40 are Au—Au bonded, and the sealing metal layer 44a and the sealing metal layer 44b are integrated to form the sealing metal layer 44. .
 図22は、第2基板を薄くする薄化工程を説明するための模式的な断面図である。図22に示すように、薄化工程では、第2基板41の主面のうち、絶縁層42が設けられている側と反対側の主面を研削ツールDFにより研削し、第2基板41の厚みを薄くする。 FIG. 22 is a schematic cross-sectional view for explaining the thinning process for thinning the second substrate. As shown in FIG. 22 , in the thinning step, of the main surfaces of the second substrate 41 , the main surface opposite to the side on which the insulating layer 42 is provided is ground by a grinding tool DF, thereby thinning the second substrate 41 . Reduce thickness.
 図23は、第2基板に貫通ビアを形成する貫通ビア形成工程を説明するための模式的な断面図である。図23に示すように、貫通ビア形成工程では、ドライエッチングや反応性イオンエッチングにより、貫通ビア57Hを形成する。 FIG. 23 is a schematic cross-sectional view for explaining a through-via forming step for forming through-vias in the second substrate. As shown in FIG. 23, in the through via forming step, the through via 57H is formed by dry etching or reactive ion etching.
 図24は、第2基板に端子電極を形成する端子電極形成工程を説明するための模式的な断面図である。図24に示すように、端子電極形成工程では、図23に示す貫通ビア57Hを覆うように、シード層56を形成する。シード層56は、Ti層を形成した後、Ti層の上にCu層を積層することによって形成される。その後、図24に示すように、端子電極57が形成される範囲を除くシード層56の上に、めっきレジスト57Mをパターニングした後、シード層56上に、Cu層、Ni層、Au層の順でめっきにより積層することで、端子電極57を形成する。 FIG. 24 is a schematic cross-sectional view for explaining a terminal electrode forming process for forming terminal electrodes on the second substrate. As shown in FIG. 24, in the terminal electrode forming step, a seed layer 56 is formed so as to cover the through via 57H shown in FIG. The seed layer 56 is formed by forming a Ti layer and then laminating a Cu layer on the Ti layer. Thereafter, as shown in FIG. 24, after patterning a plating resist 57M on the seed layer 56 excluding the range where the terminal electrode 57 is formed, a Cu layer, a Ni layer, and an Au layer are formed on the seed layer 56 in this order. The terminal electrodes 57 are formed by stacking by plating.
 図25は、端子電極の周りを絶縁する絶縁膜形成工程を説明するための模式的な断面図である。図25に示すように、絶縁膜形成工程では、めっきレジスト57Mを除去し、かつ端子電極57と接していないシード層56を除去する。次に、端子電極57の周りを絶縁するように、絶縁層45を追加成膜する。 FIG. 25 is a schematic cross-sectional view for explaining the insulating film forming process for insulating the periphery of the terminal electrode. As shown in FIG. 25, in the insulating film forming step, the plating resist 57M is removed and the seed layer 56 not in contact with the terminal electrode 57 is removed. Next, an insulating layer 45 is additionally formed so as to insulate the periphery of the terminal electrode 57 .
 図26は、第2基板にレジストを形成するレジスト形成工程を説明するための模式的な断面図である。図26に示すように、レジスト形成工程では、レジスト40Rを、カバー部材40の端子電極57が設けられている側に形成する。このとき、レジスト40Rは、平面視して、弾性波装置が個片化される境界で囲まれた領域よりも小さく、レジスト40Rの外形は、平面視して、該境界で囲まれた領域である線P1の内側にある。言い換えれば、レジスト40Rは、弾性波装置が個片化される境界に沿って、圧電層2のパターニングより広い幅でパターニングがされ、線P1の内側にある線P2の外側が除去される。これにより、チップサイズを第2基板41ではなく、第1基板である支持基板8の大きさで制限することができる。 FIG. 26 is a schematic cross-sectional view for explaining a resist forming process for forming a resist on the second substrate. As shown in FIG. 26, in the resist forming step, a resist 40R is formed on the side of the cover member 40 where the terminal electrodes 57 are provided. At this time, the resist 40R is smaller than the area surrounded by the boundary where the acoustic wave device is singulated in plan view, and the outer shape of the resist 40R is the area surrounded by the boundary in plan view. It is inside a certain line P1. In other words, the resist 40R is patterned with a width wider than the patterning of the piezoelectric layer 2 along the boundary where the acoustic wave device is singulated, and the outside of the line P2 inside the line P1 is removed. As a result, the chip size can be limited by the size of the support substrate 8 as the first substrate, not by the size of the second substrate 41 .
 図27は、第2基板を個片化し第1基板の一部をエッチングするエッチング工程を説明するための模式的な断面図である。図27に示すように、エッチング工程では、第2基板41を個片化し、第1基板の一部をエッチングする。エッチングは、例えば、ウェットエッチングにより行われる。第1実施形態では、エッチング工程において、中間層7及び支持基板8の一部をエッチングする。このとき、圧電層2の外形の端面は全て露出しており、平面視して、線P1と線P2との間にある圧電層2が、エッチングに対する、支持基板8の外形(線P1)を規制するマスクとなる。すなわち、レジスト40Rの外形である線P2の外側であっても、圧電層2の外形である線P1で囲まれた領域内の中間層7及び支持基板8は、圧電層2で覆われているため、エッチングされない。一方で、圧電層2の外形である線P1の外側の領域の中間層7及び支持基板8は露出しているため、エッチングされる。これにより、第1基板である支持基板8の大きさが、圧電層2の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 FIG. 27 is a schematic cross-sectional view for explaining an etching step of dividing the second substrate into individual pieces and etching a part of the first substrate. As shown in FIG. 27, in the etching step, the second substrate 41 is separated into pieces, and part of the first substrate is etched. Etching is performed, for example, by wet etching. In the first embodiment, part of the intermediate layer 7 and the support substrate 8 is etched in the etching process. At this time, the end faces of the outer shape of the piezoelectric layer 2 are all exposed, and the piezoelectric layer 2 between the line P1 and the line P2 in plan view defines the outer shape (line P1) of the support substrate 8 against etching. It becomes a regulated mask. That is, the intermediate layer 7 and the support substrate 8 in the area surrounded by the line P1, which is the outline of the piezoelectric layer 2, are covered with the piezoelectric layer 2 even outside the line P2, which is the outline of the resist 40R. Therefore, it is not etched. On the other hand, since the intermediate layer 7 and the support substrate 8 in the area outside the line P1, which is the outline of the piezoelectric layer 2, are exposed, they are etched. As a result, the size of the support substrate 8, which is the first substrate, is limited by the line P1, which is the outer shape of the piezoelectric layer 2, so that variations in chip size can be suppressed.
 図28は、第1基板の第2基板とは反対側の主面を研磨して第1基板を薄くし、個片化する研磨工程を説明するための断面図である。図28に示すように、研磨工程では、レジスト40Rを除去し、端子電極57の上にBGAバンプ58を設けたのちに、支持基板8を研削ツールにより研削することで支持基板8の厚みを薄くし、弾性波装置毎に個片化する。なお、このとき、支持基板8の厚みを、中間層7の厚みより薄くしてもよい。また、圧電層2の外形の端面は、テーパ状に加工してもよい。 FIG. 28 is a cross-sectional view for explaining a polishing step of polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it. As shown in FIG. 28, in the polishing step, after removing the resist 40R and providing the BGA bumps 58 on the terminal electrodes 57, the support substrate 8 is ground with a grinding tool to reduce the thickness of the support substrate 8. and individualized for each elastic wave device. At this time, the thickness of the support substrate 8 may be thinner than the thickness of the intermediate layer 7 . Also, the end face of the outer shape of the piezoelectric layer 2 may be processed into a tapered shape.
 以上説明した第1実施形態に係る弾性波装置の製造方法は、あくまでも一例であって、これに限られない。例えば、電極形成工程は、第1空間部形成工程後であってもよく、機能電極30は、圧電層2の第2主面2bに設けられてもよい。 The method of manufacturing the elastic wave device according to the first embodiment described above is merely an example, and is not limited to this. For example, the electrode formation step may be performed after the first space portion formation step, and the functional electrode 30 may be provided on the second main surface 2b of the piezoelectric layer 2 .
 以上述べたように、第1実施形態に係る弾性波装置の製造方法は、第1主面2aと、第1主面2aと反対側の第2主面2bとを有する圧電層2と、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられた機能電極30と、が第1方向に重なる位置に形成された第1基板と、圧電層2の第1主面2aと対向する第2基板41と、支持部を介して接合する接合工程と、接合工程の後に、第2基板41にレジスト40Rを形成するレジスト形成工程と、レジスト形成工程の後に、第2基板41を個片化し、第1基板の一部をエッチングするエッチング工程と、エッチング工程の後に、第1基板の第2基板41とは反対側の主面を研磨して第1基板を薄くし、個片化する研磨工程と、を含み、接合工程において、第1基板の第2基板41側にある圧電層2のない位置が、弾性波装置が個片化される境界となるようにパターニングされており、レジスト形成工程において、レジスト40Rは、第1方向にみて境界で囲まれた領域よりも小さく、レジスト40Rの外形は、第1方向にみて境界で囲まれた領域の内側にあり、エッチング工程において、第1基板の第2基板41側にある圧電層2が個片化された第1基板の外形を規制するマスクとなる。これにより、チップサイズが、線P1で制限されるので、チップサイズのばらつきを抑制できる。 As described above, the method for manufacturing an acoustic wave device according to the first embodiment includes the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a, and the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a a first substrate formed at a position where the functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the layer 2 overlaps in the first direction; 2a and a second substrate 41 facing via a support portion; after the bonding step, a resist forming step of forming a resist 40R on the second substrate 41; after the resist forming step, the second substrate 41 is separated into pieces, an etching step of etching a part of the first substrate, and after the etching step, the main surface of the first substrate opposite to the second substrate 41 is polished to thin the first substrate, In the bonding step, patterning is performed so that a position of the first substrate on the side of the second substrate 41 where the piezoelectric layer 2 is absent serves as a boundary where the acoustic wave device is singulated. In the resist forming process, the resist 40R is smaller than the area surrounded by the boundary when viewed in the first direction, the outline of the resist 40R is inside the area surrounded by the boundary when viewed in the first direction, and the etching is performed. In the process, the piezoelectric layer 2 on the second substrate 41 side of the first substrate serves as a mask for regulating the outer shape of the singulated first substrate. As a result, the chip size is limited by the line P1, so that variations in chip size can be suppressed.
 望ましい態様として、エッチング工程において、圧電層2の外形の端面が全て露出しており、第1基板の第2基板41側にある圧電層2が個片化された第1基板の外形を規制するマスクとなる。これにより、第1基板の外形が圧電層2の外形と同じになるように形成されるので、チップサイズのばらつきをより抑制できる。 As a desirable mode, in the etching process, all the end surfaces of the outer shape of the piezoelectric layer 2 are exposed, and the piezoelectric layer 2 on the side of the second substrate 41 of the first substrate regulates the outer shape of the singulated first substrate. Become a mask. As a result, the outer shape of the first substrate is formed to be the same as the outer shape of the piezoelectric layer 2, so that variations in chip size can be further suppressed.
 (第2実施形態)
 図29は、第2実施形態に係る弾性波装置の一例を示す断面図である。図29に示すように、第2実施形態に係る弾性波装置は、圧電層2の外側に金属31が設けられる点で第1実施形態と異なる。第2実施形態では、金属31は、線P1と線P2との間にある支持部材の上に設けられる。ここで、XY平面に平行な方向に見て、金属31の外形の端面は、少なくとも一部が露出している。第1実施形態では、金属31の外形の端面は、全て露出している。このとき、金属31の外形は、支持基板8の外形と同じである。すなわち、金属31の外形は、Z方向に平面視して、線P1と重なっている。また、金属31は、機能電極30と同じ金属からなる。これにより、支持基板8の外形が金属31の外形と同じになるように形成されているので、チップサイズのばらつきを抑制できる。
(Second embodiment)
FIG. 29 is a cross-sectional view showing an example of the elastic wave device according to the second embodiment. As shown in FIG. 29, the acoustic wave device according to the second embodiment differs from the first embodiment in that metal 31 is provided outside the piezoelectric layer 2 . In a second embodiment, metal 31 is provided on the support member between lines P1 and P2. Here, at least a part of the end surface of the metal 31 is exposed when viewed in a direction parallel to the XY plane. In the first embodiment, all the end surfaces of the metal 31 are exposed. At this time, the outer shape of the metal 31 is the same as the outer shape of the support substrate 8 . That is, the outer shape of the metal 31 overlaps the line P1 when viewed from above in the Z direction. Also, the metal 31 is made of the same metal as the functional electrode 30 . Accordingly, since the support substrate 8 is formed to have the same outer shape as the metal 31, variations in chip size can be suppressed.
 ここで、金属31が支持部と第1基板との間に設けられた場合、第1基板と第2基板41との接合性が悪化する。そのため、金属31は、Z方向にみて、支持部と重ならないように設けられる。これにより、第1基板と第2基板41との接合性が悪化することを抑制できる。 Here, when the metal 31 is provided between the supporting portion and the first substrate, the bondability between the first substrate and the second substrate 41 deteriorates. Therefore, the metal 31 is provided so as not to overlap the supporting portion when viewed in the Z direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
 なお、第2実施形態に係る弾性波装置は、図29で示すものに限られない。例えば、金属31は、圧電層2の外側に設けられることに限られず、線P1と線P2との間にある圧電層2の上に設けられるものであってもよい。 Note that the elastic wave device according to the second embodiment is not limited to that shown in FIG. For example, the metal 31 is not limited to being provided outside the piezoelectric layer 2, and may be provided on the piezoelectric layer 2 between the lines P1 and P2.
 以上説明したように、第2実施形態に係る弾性波装置は、第1基板(支持基板8)と、平面視で、第1基板に重なり、第1主面2aと、第1主面2aと反対側の第2主面2bとを有する圧電層2と、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられた機能電極30と、圧電層2の第1主面2aと第1方向に対向する第2基板41と、圧電層2の第1主面2aと第2基板41との間で第2基板41を支持する支持部と、を備え、第2基板41は、第1方向にみて、第1基板よりも小さく、第2基板41の外形(線P2)は、第1方向にみて、第1基板の外形(線P1)の内側にあり、第1方向と直交する平面方向にみて、圧電層2の外側にある金属31が少なくとも一部露出している。これにより、チップサイズが、第2基板41の外形である線P2ではなく、第1基板の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 As described above, the elastic wave device according to the second embodiment includes the first substrate (support substrate 8), which overlaps the first substrate in plan view, and the first main surface 2a and the first main surface 2a. a piezoelectric layer 2 having an opposite second main surface 2b; a functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the piezoelectric layer 2; a second substrate 41 facing the surface 2a in the first direction; 41 is smaller than the first substrate when viewed in the first direction, and the outer shape (line P2) of the second substrate 41 is inside the outer shape (line P1) of the first substrate when viewed in the first direction. At least a portion of the metal 31 outside the piezoelectric layer 2 is exposed when viewed in a plane direction perpendicular to the direction. As a result, the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
 望ましい態様として、圧電層2の外側にある金属31は、第1方向にみて、支持部と重ならない。これにより、第1基板と第2基板41との接合性が悪化することを抑制できる。 As a desirable aspect, the metal 31 on the outside of the piezoelectric layer 2 does not overlap the supporting portion when viewed in the first direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
 望ましい態様として、平面方向にみて、圧電層2の外側にある金属31の外形の端面が露出しており、第1方向にみて、第1基板の外形(線P1)は、圧電層2の外側にある金属31の外形と同じである。これにより、チップサイズのばらつきをより抑制できる。 As a desirable mode, the end surface of the outer shape of the metal 31 outside the piezoelectric layer 2 is exposed when viewed in the planar direction, and the outer shape (line P1) of the first substrate is outside the piezoelectric layer 2 when viewed in the first direction. is the same as the outer shape of the metal 31 in . As a result, variations in chip size can be further suppressed.
 望ましい態様として、圧電層2の外側にある金属31は、機能電極30と同じ金属からなる。この場合でも、チップサイズのばらつきを抑制できる。 As a preferred embodiment, the metal 31 outside the piezoelectric layer 2 is made of the same metal as the functional electrode 30. Even in this case, variations in chip size can be suppressed.
 以下、第2実施形態に係る弾性波装置の製造方法を説明する。なお、第1実施形態と同様の工程については、逐一説明しない。 A method for manufacturing an elastic wave device according to the second embodiment will be described below. Note that steps similar to those in the first embodiment will not be explained one by one.
 第2実施形態に係る弾性波装置の製造方法では、第1空間部形成工程における圧電層2のパターニングで、線P2から外側の領域を除去して、該領域の支持部材を露出させる。その後、圧電層2の外形付近の部分と圧電層2が除去された支持部材との上に金属31を積層する。このとき、金属31は、Z方向に平面視して、支持部と重ならないように積層されるので、接合工程における第1基板と第2基板41との接合性を良化できる。その後、線P1から外側の領域にある金属31をパターニングにより除去して、該領域の支持部材を再び露出する。ここで、支持部材が露出した領域は、弾性波装置が個片化される境界となる。これにより、エッチング工程において、金属31の外形の端面は全て露出しており、平面視して、外形である線P2の外側にある金属31が、エッチングに対する、支持基板8の外形である線P1を規制するマスクとなる。すなわち、レジスト40Rの外形である線P2の外側であっても、金属31の外形である線P1で囲まれた領域内の中間層7及び支持基板8は、金属31で覆われているため、エッチングされない。一方で、圧電層2の外形である線P1の外側の領域の中間層7及び支持基板8は、露出しているため、エッチングされる。したがって、第1基板である支持基板8の大きさが、金属31の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 In the method of manufacturing the elastic wave device according to the second embodiment, the patterning of the piezoelectric layer 2 in the first space forming step removes the area outside the line P2 to expose the support member in this area. After that, a metal 31 is laminated on the portion near the outer shape of the piezoelectric layer 2 and the supporting member from which the piezoelectric layer 2 has been removed. At this time, the metal 31 is laminated so as not to overlap with the supporting portion when viewed in plan in the Z direction, so that the bondability between the first substrate and the second substrate 41 in the bonding process can be improved. The metal 31 in the areas outside the line P1 is then patterned away to re-expose the support members in those areas. Here, the area where the supporting member is exposed is the boundary where the acoustic wave device is singulated. As a result, in the etching step, the end faces of the outline of the metal 31 are all exposed, and in plan view, the metal 31 outside the line P2 that is the outline of the support substrate 8 is exposed to the line P1 that is the outline of the support substrate 8 with respect to the etching. becomes a mask that regulates That is, even outside the line P2, which is the outline of the resist 40R, the intermediate layer 7 and the support substrate 8 in the region surrounded by the line P1, which is the outline of the metal 31, are covered with the metal 31. Not etched. On the other hand, the intermediate layer 7 and the support substrate 8 in the area outside the line P1, which is the contour of the piezoelectric layer 2, are exposed and thus etched. Therefore, since the size of the support substrate 8, which is the first substrate, is limited by the line P1, which is the outline of the metal 31, variations in chip size can be suppressed.
 なお、第2実施形態に係る弾性波装置の製造方法は、以上で説明した方法に限られない。例えば、金属31が線P1と線P2との間にある圧電層2の上に設けられる場合、金属31は、電極形成工程において機能電極30や第1金属層35と同時に、パターン形成されてもよい。 The method for manufacturing the elastic wave device according to the second embodiment is not limited to the method described above. For example, if the metal 31 is provided on the piezoelectric layer 2 between the lines P1 and P2, the metal 31 may be patterned at the same time as the functional electrode 30 and the first metal layer 35 in the electrode formation process. good.
 以上述べたように、第2実施形態に係る弾性波装置の製造方法は、第1主面2aと、第1主面2aと反対側の第2主面2bとを有する圧電層2と、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられた機能電極30と、が第1方向に重なる位置に形成された第1基板と、圧電層2の第1主面2aと対向する第2基板41と、支持部を介して接合する接合工程と、接合工程の後に、第2基板41にレジスト40Rを形成するレジスト形成工程と、レジスト形成工程の後に、第2基板41を個片化し、第1基板の一部をエッチングするエッチング工程と、エッチング工程の後に、第1基板の第2基板41とは反対側の主面を研磨して第1基板を薄くし、個片化する研磨工程と、を含み、接合工程において、圧電層2の外側にある金属31のない位置が、弾性波装置が個片化される境界となるようにパターニングされており、レジスト形成工程において、レジスト40Rは、第1方向にみて境界で囲まれた領域よりも小さく、レジスト40Rの外形は、第1方向にみて境界で囲まれた領域の内側にあり、エッチング工程において、圧電層2の外側にある金属31が個片化された第1基板の外形(線P1)を規制するマスクとなる。これにより、チップサイズが、線P1で制限されるので、チップサイズのばらつきを抑制できる。 As described above, the method for manufacturing an acoustic wave device according to the second embodiment includes the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a, the piezoelectric a first substrate formed at a position where the functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the layer 2 overlaps in the first direction; 2a and a second substrate 41 facing via a support portion; after the bonding step, a resist forming step of forming a resist 40R on the second substrate 41; after the resist forming step, the second substrate 41 is separated into pieces, an etching step of etching a part of the first substrate, and after the etching step, the main surface of the first substrate opposite to the second substrate 41 is polished to thin the first substrate, In the bonding step, patterning is performed so that a position outside the piezoelectric layer 2 where there is no metal 31 serves as a boundary where the elastic wave device is singulated, and a resist is formed. In the process, the resist 40R is smaller than the area surrounded by the boundary when viewed in the first direction, the outline of the resist 40R is inside the area surrounded by the boundary when viewed in the first direction, and the piezoelectric layer The metal 31 on the outside of 2 serves as a mask for regulating the outer shape (line P1) of the singulated first substrate. As a result, the chip size is limited by the line P1, so that variations in chip size can be suppressed.
 望ましい態様として、接合工程において、圧電層2の外側にある金属31は、第1方向にみて、支持部と重ならないように設けられている。これにより、接合工程において第1基板と第2基板41とを良好に接合できる。 As a desirable aspect, in the bonding process, the metal 31 outside the piezoelectric layer 2 is provided so as not to overlap the supporting portion when viewed in the first direction. Thereby, the first substrate and the second substrate 41 can be satisfactorily bonded in the bonding step.
 望ましい態様として、エッチング工程において、圧電層2の外側にある金属31の外形の端面が全て露出しており、圧電層2の外側にある金属31が個片化された第1基板の外形を規制するマスクとなる。これにより、第1基板の外形が金属31の外形と同じになるように形成されるので、チップサイズのばらつきをより抑制できる。 As a desirable mode, in the etching process, all the end surfaces of the outer shape of the metal 31 on the outside of the piezoelectric layer 2 are exposed, and the metal 31 on the outer side of the piezoelectric layer 2 regulates the outer shape of the singulated first substrate. It becomes a mask to do. As a result, the outer shape of the first substrate is formed to be the same as the outer shape of the metal 31, so that variations in chip size can be further suppressed.
 (第3実施形態)
 図30は、第3実施形態に係る弾性波装置の一例を示す断面図である。図30に示すように、第3実施形態に係る弾性波装置は、圧電層2の外側に窒化シリコン32が設けられる点で第1実施形態と異なる。第2実施形態では、窒化シリコン32は、線P1と線P2との間にある支持部材の上に設けられる。ここで、XY平面に平行な方向に見て、窒化シリコン32の外形の端面は、少なくとも一部が露出している。第1実施形態では、窒化シリコン32の外形の端面は、全て露出している。このとき、窒化シリコン32の外形は、支持基板8の外形と同じである。すなわち、窒化シリコン32の外形は、Z方向に平面視して、線P1と重なっている。これにより、支持基板8の外形が窒化シリコン32の外形と同じになるように形成されているので、チップサイズのばらつきを抑制できる。
(Third embodiment)
FIG. 30 is a cross-sectional view showing an example of an elastic wave device according to the third embodiment. As shown in FIG. 30, the acoustic wave device according to the third embodiment is different from the first embodiment in that silicon nitride 32 is provided outside the piezoelectric layer 2 . In a second embodiment, silicon nitride 32 is provided on the support member between lines P1 and P2. Here, at least a part of the end surface of the silicon nitride 32 is exposed when viewed in a direction parallel to the XY plane. In the first embodiment, the end faces of the outer shape of the silicon nitride 32 are all exposed. At this time, the outer shape of the silicon nitride 32 is the same as the outer shape of the support substrate 8 . That is, the outer shape of the silicon nitride 32 overlaps the line P1 when viewed from above in the Z direction. Accordingly, since the support substrate 8 is formed to have the same outer shape as the silicon nitride 32, variations in chip size can be suppressed.
 ここで、窒化シリコン32が支持部と第1基板との間に設けられた場合、第1基板と第2基板41との接合性が悪化する。そのため、窒化シリコン32は、Z方向にみて、支持部と重ならないように設けられる。これにより、第1基板と第2基板41との接合性が悪化することを抑制できる。 Here, when the silicon nitride 32 is provided between the supporting portion and the first substrate, the bondability between the first substrate and the second substrate 41 deteriorates. Therefore, the silicon nitride 32 is provided so as not to overlap the supporting portion when viewed in the Z direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
 なお、第3実施形態に係る弾性波装置は、図30で示すものに限られない。例えば、窒化シリコン32は、圧電層2の外側に設けられることに限られず、線P1と線P2との間にある圧電層2の上に設けられるものであってもよい。 Note that the elastic wave device according to the third embodiment is not limited to that shown in FIG. For example, the silicon nitride 32 is not limited to being provided outside the piezoelectric layer 2, and may be provided on the piezoelectric layer 2 between the lines P1 and P2.
 以上説明したように、第3実施形態に係る弾性波装置は、第1基板(支持基板8)と、平面視で、第1基板に重なり、第1主面2aと、第1主面2aと反対側の第2主面2bとを有する圧電層2と、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられた機能電極30と、圧電層2の第1主面2aと第1方向に対向する第2基板41と、圧電層2の第1主面2aと第2基板41との間で第2基板41を支持する支持部と、を備え、第2基板41は、第1方向にみて、第1基板よりも小さく、第2基板41の外形は、第1方向にみて、第1基板の外形の内側にあり、第1方向と直交する平面方向にみて、第1基板の外形の端面の少なくとも一部に、圧電層2の外側にある窒化シリコン32が露出している。これにより、チップサイズが、第2基板41の外形である線P2ではなく、第1基板の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 As described above, the elastic wave device according to the third embodiment includes the first substrate (support substrate 8), which overlaps the first substrate in plan view, and the first main surface 2a and the first main surface 2a. a piezoelectric layer 2 having an opposite second main surface 2b; a functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the piezoelectric layer 2; a second substrate 41 facing the surface 2a in the first direction; 41 is smaller than the first substrate when viewed in the first direction, the outer shape of the second substrate 41 is inside the outer shape of the first substrate when viewed in the first direction, and when viewed in a plane direction orthogonal to the first direction , the silicon nitride 32 outside the piezoelectric layer 2 is exposed on at least a part of the outer edge of the first substrate. As a result, the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
 望ましい態様として、圧電層2の外側にある窒化シリコン32は、第1方向にみて、支持部と重ならない。これにより、第1基板と第2基板41との接合性が悪化することを抑制できる。 As a desirable aspect, the silicon nitride 32 outside the piezoelectric layer 2 does not overlap the support when viewed in the first direction. As a result, it is possible to suppress deterioration in bondability between the first substrate and the second substrate 41 .
 望ましい態様として、平面方向にみて、全ての第1基板の外形の端面には、圧電層2の外側にある窒化シリコン32が露出しており、第1方向にみて、第1基板の外形は、圧電層2の外側にある窒化シリコン32の外形と同じである。これにより、チップサイズのばらつきをより抑制できる。 As a desirable mode, the silicon nitride 32 outside the piezoelectric layer 2 is exposed on all end surfaces of the outer shape of the first substrate when viewed in the plane direction, and the outer shape of the first substrate when viewed in the first direction is: It has the same outline as the silicon nitride 32 outside the piezoelectric layer 2 . As a result, variations in chip size can be further suppressed.
 以下、第3実施形態に係る弾性波装置の製造方法を説明する。なお、以下で説明する製造方法は、一例であって、これに限られない。なお、第1実施形態と同様の工程については、逐一説明しない。 A method for manufacturing an elastic wave device according to the third embodiment will be described below. In addition, the manufacturing method described below is an example, and is not limited to this. Note that steps similar to those in the first embodiment will not be explained one by one.
 第3実施形態に係る弾性波装置の製造方法では、第1空間部形成工程における圧電層2のパターニングで、線P2から外側の領域を除去して、該領域の支持部材を露出させる。その後、圧電層2の外形付近の部分と圧電層2が除去された支持部材との上に窒化シリコン32を積層する。このとき、窒化シリコン32は、Z方向に平面視して、支持部と重ならないように積層されるので、接合工程における第1基板と第2基板41との接合性を良化できる。その後、線P1から外側の領域にある窒化シリコン32をパターニングにより除去して、該領域の支持部材を再び露出する。ここで、支持部材が露出した領域は、弾性波装置が個片化される境界となる。これにより、エッチング工程において、窒化シリコン32の外形の端面は全て露出しており、平面視して、外形である線P2の外側にある窒化シリコン32が、エッチングに対する、支持基板8の外形である線P1を規制するマスクとなる。すなわち、レジスト40Rの外形である線P2の外側であっても、窒化シリコン32の外形である線P1で囲まれた領域内の中間層7及び支持基板8は、窒化シリコン32で覆われているため、エッチングされない。一方で、圧電層2の外形である線P1の外側の領域の中間層7及び支持基板8は、露出しているため、エッチングされる。したがって、第1基板である支持基板8の大きさが、窒化シリコン32の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 In the method of manufacturing the acoustic wave device according to the third embodiment, the patterning of the piezoelectric layer 2 in the first space forming step removes the area outside the line P2 to expose the support member in this area. After that, silicon nitride 32 is laminated on the portion near the outer shape of the piezoelectric layer 2 and the supporting member from which the piezoelectric layer 2 has been removed. At this time, the silicon nitride 32 is laminated so as not to overlap with the supporting portion when viewed in plan in the Z direction. The silicon nitride 32 in the areas outside the line P1 is then patterned away to re-expose the support members in those areas. Here, the area where the supporting member is exposed is the boundary where the acoustic wave device is singulated. As a result, in the etching process, the end faces of the outline of the silicon nitride 32 are all exposed, and in plan view, the silicon nitride 32 outside the outline line P2 is the outline of the support substrate 8 for etching. It becomes a mask for regulating the line P1. That is, the intermediate layer 7 and the support substrate 8 in the region surrounded by the line P1, which is the outline of the silicon nitride 32, are covered with the silicon nitride 32 even outside the line P2, which is the outline of the resist 40R. Therefore, it is not etched. On the other hand, the intermediate layer 7 and the support substrate 8 in the area outside the line P1, which is the contour of the piezoelectric layer 2, are exposed and thus etched. Therefore, since the size of the support substrate 8, which is the first substrate, is limited by the line P1, which is the outline of the silicon nitride 32, variations in chip size can be suppressed.
 なお、第3実施形態に係る弾性波装置の製造方法は、以上で説明した方法に限られない。例えば、窒化シリコン32が線P1と線P2との間にある圧電層2の上に設けられる場合、窒化シリコン32は、電極形成工程において、機能電極30や第1金属層35と同時に形成されてもよい。 The method for manufacturing the elastic wave device according to the third embodiment is not limited to the method described above. For example, when the silicon nitride 32 is provided on the piezoelectric layer 2 between the lines P1 and P2, the silicon nitride 32 is formed simultaneously with the functional electrode 30 and the first metal layer 35 in the electrode formation process. good too.
 以上述べたように、第3実施形態に係る弾性波装置の製造方法は、第1主面2aと、第1主面2aと反対側の第2主面2bとを有する圧電層2と、圧電層2の第1主面2a及び第2主面2bの少なくとも一方に設けられた機能電極30と、が第1方向に重なる位置に形成された第1基板と、圧電層2の第1主面2aと対向する第2基板41と、支持部を介して接合する接合工程と、接合工程の後に、第2基板41にレジスト40Rを形成するレジスト形成工程と、レジスト形成工程の後に、第2基板41を個片化し、第1基板の一部をエッチングするエッチング工程と、エッチング工程の後に、第1基板の第2基板41とは反対側の主面を研磨して第1基板を薄くし、個片化する研磨工程と、を含み、接合工程において、窒化シリコン32のない位置が、弾性波装置が個片化される境界となるようにパターニングされており、レジスト形成工程において、レジスト40Rは、第1方向にみて境界で囲まれた領域よりも小さく、レジスト40Rの外形は、第1方向にみて境界で囲まれた領域の内側にあり、エッチング工程において、圧電層2の外側にある窒化シリコン32が個片化された第1基板の外形(線P1)を規制するマスクとなる。これにより、チップサイズが、線P1で制限されるので、チップサイズのばらつきを抑制できる。 As described above, the method for manufacturing an acoustic wave device according to the third embodiment includes the piezoelectric layer 2 having the first principal surface 2a and the second principal surface 2b opposite to the first principal surface 2a, the piezoelectric a first substrate formed at a position where the functional electrode 30 provided on at least one of the first main surface 2a and the second main surface 2b of the layer 2 overlaps in the first direction; 2a and a second substrate 41 facing via a support portion; after the bonding step, a resist forming step of forming a resist 40R on the second substrate 41; after the resist forming step, the second substrate 41 is separated into pieces, an etching step of etching a part of the first substrate, and after the etching step, the main surface of the first substrate opposite to the second substrate 41 is polished to thin the first substrate, In the bonding step, the patterning is performed so that the position where the silicon nitride 32 is absent becomes the boundary where the elastic wave device is singulated, and in the resist forming step, the resist 40R is , smaller than the area surrounded by the boundary when viewed in the first direction, the outer shape of the resist 40R is inside the area surrounded by the boundary when viewed in the first direction, and in the etching process, the nitride layer outside the piezoelectric layer 2 is formed. The silicon 32 serves as a mask for regulating the outer shape (line P1) of the first substrate separated into pieces. As a result, the chip size is limited by the line P1, so that variations in chip size can be suppressed.
 望ましい態様として、接合工程において、圧電層2の外側にある窒化シリコン32は、第1方向にみて、支持部と重ならないように設けられている。これにより、接合工程において第1基板と第2基板41とを良好に接合できる。 As a desirable aspect, in the bonding process, the silicon nitride 32 outside the piezoelectric layer 2 is provided so as not to overlap the supporting portion when viewed in the first direction. Thereby, the first substrate and the second substrate 41 can be satisfactorily bonded in the bonding step.
 望ましい態様として、エッチング工程において、圧電層2の外側にある窒化シリコン32の外形の端面が全て露出しており、圧電層2の外側にある窒化シリコン32が個片化された第1基板の外形を規制するマスクとなる。これにより、第1基板の外形が窒化シリコン32の外形と同じとなるように形成されるので、チップサイズのばらつきをより抑制できる。 As a desirable mode, in the etching process, all the end faces of the outer shape of the silicon nitride 32 outside the piezoelectric layer 2 are exposed, and the silicon nitride 32 outside the piezoelectric layer 2 is cut into pieces to form the outer shape of the first substrate. becomes a mask that regulates As a result, the outer shape of the first substrate is formed to be the same as the outer shape of the silicon nitride 32, so that variations in chip size can be further suppressed.
 以上の実施の形態は、本開示の理解を容易にするためのものであり、本開示を限定して解釈するためのものではない。本開示は、その趣旨を逸脱することなく、変更/改良され得るとともに、本開示にはその等価物も含まれる。 The above embodiments are for facilitating understanding of the present disclosure, and are not for limiting interpretation of the present disclosure. This disclosure may be modified/modified without departing from its spirit, and this disclosure also includes equivalents thereof.
 例えば、弾性波装置は、第1方向と直交する平面方向にみて、第1基板の第2基板41側にある圧電層2、圧電層2の外側にある金属31及び圧電層2の外側にある窒化シリコン32のうち、少なくとも1つの外形の端面が少なくとも一部露出していればよい。この場合でも、チップサイズが、第2基板41の外形である線P2ではなく、第1基板の外形である線P1で制限されるので、チップサイズのばらつきを抑制できる。 For example, the acoustic wave device includes the piezoelectric layer 2 on the second substrate 41 side of the first substrate, the metal 31 on the outside of the piezoelectric layer 2, and the metal 31 on the outside of the piezoelectric layer 2 when viewed in a plane direction orthogonal to the first direction. At least one end surface of the outer shape of the silicon nitride 32 should be at least partially exposed. Even in this case, the chip size is limited by the line P1, which is the outline of the first substrate, rather than the line P2, which is the outline of the second substrate 41, so that variations in chip size can be suppressed.
 例えば、弾性波装置の製造方法は、接合工程において、第1基板の第2基板41側にある圧電層2、圧電層2の外側にある金属31及び圧電層2の外側にある窒化シリコン32のいずれもない位置が、弾性波装置が個片化される境界となるようにパターニングされており、レジスト形成工程において、レジスト40Rは、第1方向にみて境界で囲まれた領域よりも小さく、レジスト40Rの外形は、第1方向にみて境界で囲まれた領域の内側にあり、エッチング工程において、圧電層2の外側にある窒化シリコン32が個片化された第1基板の外形(線P1)を規制するマスクとなっていてもよい。この場合でも、チップサイズが、線P1で制限されるので、チップサイズのばらつきを抑制できる。 For example, in the method of manufacturing an acoustic wave device, in the bonding step, the piezoelectric layer 2 on the second substrate 41 side of the first substrate, the metal 31 on the outside of the piezoelectric layer 2, and the silicon nitride 32 on the outside of the piezoelectric layer 2 are bonded together. The patterning is performed so that the position where neither of them exists becomes the boundary where the elastic wave device is singulated. The outline of 40R is inside the area surrounded by the boundary when viewed in the first direction, and the outline of the first substrate (line P1) where the silicon nitride 32 outside the piezoelectric layer 2 is singulated in the etching process. may be a mask that regulates the Even in this case, since the chip size is limited by the line P1, variations in chip size can be suppressed.
1、101、301 弾性波装置
2 圧電層
2H 貫通孔
2a 第1主面
2b 第2主面
3 電極指(第1電極指)
4 電極指(第2電極指)
5 バスバー電極(第1のバスバー電極)
6 バスバー電極(第2のバスバー電極)
7 中間層
7a 開口部
7A 第1部分
7B 第2部分
7S 犠牲層
8 支持基板(第1基板)
8a 開口部
9 空間部
9A 引き出し通路
10 弾性波素子基板
12 配線
14 第2金属層
19 誘電体膜
30 機能電極
31 金属
32 窒化シリコン
35 第1金属層
40 カバー部材
40R レジスト
41 第2基板
42 絶縁層
43、43a、43b、44、44a、44b シール金属層
45 絶縁層
46,47 支持部
56 シード層
57 端子電極
57H 貫通ビア
57M めっきレジスト
58 BGAバンプ
91 第1空間部
92 第2空間部
201 圧電層
201a 第1主面
201b 第2主面
251 第1領域
252 第2領域
310、311 反射器
C 励振領域
P1、P2 線
VP1 仮想平面
1, 101, 301 elastic wave device 2 piezoelectric layer 2H through hole 2a first main surface 2b second main surface 3 electrode finger (first electrode finger)
4 electrode finger (second electrode finger)
5 busbar electrode (first busbar electrode)
6 busbar electrode (second busbar electrode)
7 intermediate layer 7a opening 7A first portion 7B second portion 7S sacrificial layer 8 support substrate (first substrate)
8a opening 9 space 9A extraction passage 10 elastic wave element substrate 12 wiring 14 second metal layer 19 dielectric film 30 functional electrode 31 metal 32 silicon nitride 35 first metal layer 40 cover member 40R resist 41 second substrate 42 insulating layer 43, 43a, 43b, 44, 44a, 44b Sealing metal layer 45 Insulating layers 46, 47 Supporting part 56 Seed layer 57 Terminal electrode 57H Through via 57M Plating resist 58 BGA bump 91 First space 92 Second space 201 Piezoelectric layer 201a first main surface 201b second main surface 251 first region 252 second regions 310, 311 reflector C excitation regions P1, P2 line VP1 virtual plane

Claims (21)

  1.  第1基板と、
     第1方向にみて、前記第1基板に重なり、第1主面と、前記第1主面と反対側の第2主面とを有する圧電層と、
     前記圧電層の前記第1主面及び前記第2主面の少なくとも一方に設けられた機能電極と、
     前記圧電層の前記第1主面と前記第1方向に対向する第2基板と、
     前記圧電層の前記第1主面と前記第2基板との間で前記第2基板を支持する支持部と、
     を備え、
     前記第2基板は、前記第1方向にみて、前記第1基板よりも小さく、前記第2基板の外形は、前記第1方向にみて、前記第1基板の外形の内側にあり、
     前記第1方向と直交する平面方向にみて、前記第1基板の前記第2基板側にある前記圧電層、前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンのうち、少なくとも1つの外形の端面が少なくとも一部露出している、弾性波装置。
    a first substrate;
    a piezoelectric layer overlapping the first substrate when viewed in a first direction and having a first main surface and a second main surface opposite to the first main surface;
    a functional electrode provided on at least one of the first main surface and the second main surface of the piezoelectric layer;
    a second substrate facing the first main surface of the piezoelectric layer in the first direction;
    a support portion that supports the second substrate between the first main surface of the piezoelectric layer and the second substrate;
    with
    the second substrate is smaller than the first substrate when viewed in the first direction, and the outer shape of the second substrate is inside the outer shape of the first substrate when viewed in the first direction;
    At least one of the piezoelectric layer on the second substrate side of the first substrate, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer when viewed in a plane direction orthogonal to the first direction An acoustic wave device, wherein an end face of one profile is at least partially exposed.
  2.  前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンは、前記第1方向にみて、前記支持部と重ならない、請求項1に記載の弾性波装置。 The elastic wave device according to claim 1, wherein the metal outside the piezoelectric layer and the silicon nitride outside the piezoelectric layer do not overlap the supporting portion when viewed in the first direction.
  3.  前記平面方向にみて、前記第1基板の前記第2基板側にある前記圧電層の外形の端面が全て露出しており、
     前記第1方向にみて、前記第1基板の外形は、前記圧電層の外形と同じである、請求項1に記載の弾性波装置。
    When viewed in the plane direction, all the end surfaces of the outer shape of the piezoelectric layer on the second substrate side of the first substrate are exposed,
    The acoustic wave device according to claim 1, wherein the first substrate has the same outer shape as the piezoelectric layer when viewed in the first direction.
  4.  前記平面方向にみて、前記圧電層の外側にある金属の外形の端面が全て露出しており、
     前記第1方向にみて、前記第1基板の外形は、前記圧電層の外側にある金属の外形と同じである、請求項1又は2に記載の弾性波装置。
    When viewed in the plane direction, all the end surfaces of the metal contour outside the piezoelectric layer are exposed,
    3. The acoustic wave device according to claim 1, wherein the first substrate has the same outer shape as the metal outside the piezoelectric layer when viewed in the first direction.
  5.  前記平面方向にみて、前記圧電層の外側にある窒化シリコンの外形の端面が全て露出しており、
     前記第1方向にみて、前記第1基板の外形は、前記圧電層の外側にある窒化シリコンの外形と同じである、請求項1又は2に記載の弾性波装置。
    When viewed in the plane direction, all end surfaces of the silicon nitride profile outside the piezoelectric layer are exposed,
    3. The elastic wave device according to claim 1, wherein the outer shape of said first substrate when viewed in said first direction is the same as the outer shape of silicon nitride outside said piezoelectric layer.
  6.  前記支持部は、前記第1基板と前記第2基板との間をシールしており、かつ、前記第1方向にみて、前記第2基板の外形の内側に配置されている、請求項1から5のいずれか1項に記載の弾性波装置。 2. From claim 1, wherein the supporting portion seals between the first substrate and the second substrate, and is arranged inside the outline of the second substrate when viewed in the first direction. 6. The elastic wave device according to any one of 5.
  7.  前記第1方向にみて、前記機能電極は、前記支持部で囲まれた領域に配置されている、請求項6に記載の弾性波装置。 The elastic wave device according to claim 6, wherein the functional electrode is arranged in a region surrounded by the support portion when viewed in the first direction.
  8.  前記圧電層の外側にある金属は、前記機能電極と同じ金属からなる、請求項1から7のいずれか1項に記載の弾性波装置。 The elastic wave device according to any one of claims 1 to 7, wherein the metal outside the piezoelectric layer is made of the same metal as the functional electrode.
  9.  前記機能電極は、前記第1方向に交差する第2方向に延びる1つ以上の第1電極指と、前記第2方向に直交する第3方向に前記1つ以上の第1電極指のいずれかと対向し、前記第2方向に延びる1つ以上の第2電極指と、を有する、請求項1から8のいずれか1項に記載の弾性波装置。 The functional electrode has one or more first electrode fingers extending in a second direction intersecting the first direction and one or more first electrode fingers extending in a third direction orthogonal to the second direction. The elastic wave device according to any one of claims 1 to 8, comprising one or more second electrode fingers facing each other and extending in the second direction.
  10.  前記圧電層の厚みは、前記1つ以上の第1電極指及び前記1つ以上の第2電極指のうち、隣り合う第1電極指と第2電極指との間の中心間距離をpとした場合に2p以下である、請求項9に記載の弾性波装置。 The thickness of the piezoelectric layer is such that, of the one or more first electrode fingers and the one or more second electrode fingers, p is the center-to-center distance between adjacent first electrode fingers and second electrode fingers. 10. The elastic wave device according to claim 9, wherein the elastic wave device is 2p or less when
  11.  前記圧電層が、ニオブ酸リチウム又はタンタル酸リチウムを含む、請求項9又は10に記載の弾性波装置。 The elastic wave device according to claim 9 or 10, wherein the piezoelectric layer contains lithium niobate or lithium tantalate.
  12.  厚み滑りモードのバルク波を利用可能に構成されている、請求項9から11のいずれか1項に記載の弾性波装置。 The acoustic wave device according to any one of claims 9 to 11, configured to be able to use thickness shear mode bulk waves.
  13.  前記圧電層の厚みをd、前記1つ以上の第1電極指及び前記1つ以上の第2電極指のうち、隣り合う第1電極指と第2電極指との中心間距離をpとした場合、d/p≦0.5である、請求項9から11のいずれか1項に記載の弾性波装置。 Let d be the thickness of the piezoelectric layer, and p be the center-to-center distance between adjacent first and second electrode fingers among the one or more first electrode fingers and the one or more second electrode fingers. The elastic wave device according to any one of claims 9 to 11, wherein d/p ≤ 0.5.
  14.  d/pが0.24以下である、請求項13に記載の弾性波装置。 The elastic wave device according to claim 13, wherein d/p is 0.24 or less.
  15.  前記機能電極は、前記第1方向に交差する第2方向に延びる1つ以上の第1電極指と、前記第2方向に直交する第3方向に前記1つ以上の第1電極指のいずれかと対向し、前記第2方向に延びる1つ以上の第2電極指と、を有し、隣り合う第1電極指と第2電極指とが対向している方向に視たときに重なっている領域が励振領域であり、前記励振領域に対する、前記1つ以上の第1電極指及び前記1つ以上の第2電極指のメタライゼーション比をMRとしたときに、MR≦1.75(d/p)+0.075を満たす、請求項1から14のいずれか1項に記載の弾性波装置。 The functional electrode has one or more first electrode fingers extending in a second direction intersecting the first direction and one or more first electrode fingers extending in a third direction orthogonal to the second direction. and one or more second electrode fingers facing each other and extending in the second direction, wherein the adjacent first electrode fingers and second electrode fingers overlap each other when viewed in the facing direction. is an excitation region, and MR≤1.75 (d/p )+0.075.
  16.  板波を利用可能に構成されている、請求項9から11のいずれか1項に記載の弾性波装置。 The elastic wave device according to any one of claims 9 to 11, configured to be able to use plate waves.
  17.  前記圧電層は、ニオブ酸リチウム又はタンタル酸リチウムであり、前記ニオブ酸リチウム又は前記タンタル酸リチウムのオイラー角(φ,θ,ψ)が、以下の式(1)、式(2)又は式(3)の範囲にある、請求項1から16のいずれか1項に記載の弾性波装置。
     (0°±10°,0°~20°,任意のψ)  …式(1)
     (0°±10°,20°~80°,0°~60°(1-(θ-50)/900)1/2) 又は (0°±10°,20°~80°,[180°-60°(1-(θ-50)/900)1/2]~180°)  …式(2)
     (0°±10°,[180°-30°(1-(ψ-90)/8100)1/2]~180°,任意のψ)  …式(3)
    The piezoelectric layer is lithium niobate or lithium tantalate, and the Euler angles (φ, θ, ψ) of the lithium niobate or lithium tantalate are given by the following formula (1), formula (2), or formula ( 17. The acoustic wave device according to any one of claims 1 to 16, which falls within the range of 3).
    (0°±10°, 0° to 20°, arbitrary ψ) Equation (1)
    (0°±10°, 20° to 80°, 0° to 60° (1-(θ-50) 2 /900) 1/2 ) or (0°±10°, 20° to 80°, [180 °-60° (1-(θ-50) 2 /900) 1/2 ] ~ 180°) Equation (2)
    (0°±10°, [180°-30°(1-(ψ-90) 2 /8100) 1/2 ]~180°, arbitrary ψ) Equation (3)
  18.  第1主面と、前記第1主面と反対側の第2主面とを有する圧電層と、前記圧電層の前記第1主面及び前記第2主面の少なくとも一方に設けられた機能電極と、が第1方向に重なる位置に形成された第1基板と、前記圧電層の前記第1主面と対向する第2基板と、支持部を介して接合する接合工程と、
     前記接合工程の後に、前記第2基板にレジストを形成するレジスト形成工程と、
     前記レジスト形成工程の後に、前記第2基板を個片化し、前記第1基板の一部をエッチングするエッチング工程と、
     前記エッチング工程の後に、前記第1基板の前記第2基板とは反対側の主面を研磨して前記第1基板を薄くし、個片化する研磨工程と、
     を含み、
     前記接合工程において、前記第1基板の前記第2基板側にある前記圧電層、前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンのいずれもない位置が、弾性波装置が個片化される境界となるようにパターニングされており、
     前記レジスト形成工程において、前記レジストは、前記第1方向にみて前記境界で囲まれた領域よりも小さく、前記レジストの外形は、前記第1方向にみて前記境界で囲まれた領域の内側にあり、
     前記エッチング工程において、前記第1基板の前記第2基板側にある前記圧電層、前記圧電層の外側にある金属及び前記圧電層の外側にある窒化シリコンのうち、少なくとも1つが個片化された前記第1基板の外形を規制するマスクとなる、弾性波装置の製造方法。 
    A piezoelectric layer having a first principal surface and a second principal surface opposite to the first principal surface; and a functional electrode provided on at least one of the first principal surface and the second principal surface of the piezoelectric layer. and a first substrate formed at a position overlapping in a first direction, and a second substrate facing the first main surface of the piezoelectric layer, and a bonding step of bonding via a support portion;
    a resist forming step of forming a resist on the second substrate after the bonding step;
    an etching step of separating the second substrate into individual pieces and etching a part of the first substrate after the resist forming step;
    a polishing step of, after the etching step, polishing the main surface of the first substrate opposite to the second substrate to thin the first substrate and singulate it;
    including
    In the bonding step, a position where none of the piezoelectric layer on the second substrate side of the first substrate, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer are present is the acoustic wave device. It is patterned so that it becomes a boundary to be singulated,
    In the resist forming step, the resist is smaller than the area surrounded by the boundary when viewed in the first direction, and the outer shape of the resist is inside the area surrounded by the boundary when viewed in the first direction. ,
    In the etching step, at least one of the piezoelectric layer on the second substrate side of the first substrate, the metal on the outside of the piezoelectric layer, and the silicon nitride on the outside of the piezoelectric layer is singulated. A method of manufacturing an acoustic wave device, which serves as a mask for regulating the outer shape of the first substrate.
  19.  前記エッチング工程において、前記圧電層の外形の端面が全て露出しており、前記第1基板の前記第2基板側にある前記圧電層が個片化された前記第1基板の外形を規制するマスクとなる、請求項18に記載の弾性波装置の製造方法。 A mask for regulating the outer shape of the first substrate in which the end face of the outer shape of the piezoelectric layer is entirely exposed in the etching step, and the piezoelectric layer on the side of the second substrate of the first substrate is separated into individual pieces. The method for manufacturing an elastic wave device according to claim 18, wherein:
  20.  前記エッチング工程において、前記圧電層の外側にある金属の外形の端面が全て露出しており、前記圧電層の外側にある金属が個片化された前記第1基板の外形を規制するマスクとなる、請求項18に記載の弾性波装置の製造方法。 In the etching step, all the end surfaces of the outer shape of the metal outside the piezoelectric layer are exposed, and the metal outside the piezoelectric layer serves as a mask for regulating the outer shape of the individualized first substrate. 19. The method of manufacturing an elastic wave device according to claim 18.
  21.  前記エッチング工程において、前記圧電層の外側にある窒化シリコンの外形の端面が全て露出しており、前記圧電層の外側にある窒化シリコンが個片化された前記第1基板の外形を規制するマスクとなる、請求項18に記載の弾性波装置の製造方法。 A mask for regulating the outer shape of the first substrate in which all the end surfaces of the outer shape of the silicon nitride outside the piezoelectric layer are exposed in the etching step, and the silicon nitride outside the piezoelectric layer is separated into individual pieces. The method for manufacturing an elastic wave device according to claim 18, wherein:
PCT/JP2022/029841 2021-08-03 2022-08-03 Elastic wave apparatus and method for manufacturing elastic wave apparatus WO2023013694A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012029134A (en) * 2010-07-26 2012-02-09 Kyocera Corp Acoustic wave device and manufacturing method of the same
US20170063335A1 (en) * 2015-08-25 2017-03-02 Samsung Electro-Mechanics Co., Ltd. Acoustic wave device and method of manufacturing the same
JP2020191597A (en) * 2019-05-23 2020-11-26 太陽誘電株式会社 Elastic wave device and manufacturing method thereof
WO2021060513A1 (en) * 2019-09-27 2021-04-01 株式会社村田製作所 Elastic wave device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012029134A (en) * 2010-07-26 2012-02-09 Kyocera Corp Acoustic wave device and manufacturing method of the same
US20170063335A1 (en) * 2015-08-25 2017-03-02 Samsung Electro-Mechanics Co., Ltd. Acoustic wave device and method of manufacturing the same
JP2020191597A (en) * 2019-05-23 2020-11-26 太陽誘電株式会社 Elastic wave device and manufacturing method thereof
WO2021060513A1 (en) * 2019-09-27 2021-04-01 株式会社村田製作所 Elastic wave device

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