WO2023000784A1 - 数据访问方法以及相关设备 - Google Patents

数据访问方法以及相关设备 Download PDF

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Publication number
WO2023000784A1
WO2023000784A1 PCT/CN2022/092643 CN2022092643W WO2023000784A1 WO 2023000784 A1 WO2023000784 A1 WO 2023000784A1 CN 2022092643 W CN2022092643 W CN 2022092643W WO 2023000784 A1 WO2023000784 A1 WO 2023000784A1
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WIPO (PCT)
Prior art keywords
memory
data access
computing device
expansion card
access request
Prior art date
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PCT/CN2022/092643
Other languages
English (en)
French (fr)
Inventor
陈灿
陈明
谭春毅
余博伟
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority claimed from CN202111163646.8A external-priority patent/CN115687178A/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP22844951.8A priority Critical patent/EP4365748A4/en
Publication of WO2023000784A1 publication Critical patent/WO2023000784A1/zh
Priority to US18/417,741 priority patent/US20240152476A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17306—Intercommunication techniques
    • G06F15/17331—Distributed shared memory [DSM], e.g. remote direct memory access [RDMA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1004—Compatibility, e.g. with legacy hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management

Definitions

  • the present application relates to the field of storage technology, and in particular to a data access method, a data processing system, a memory expansion card, a computer-readable storage medium, and a computer program product.
  • storage media can be classified into registers, caches, dynamic random-access memory (dynamic random-access memory, DRAM) and other volatile storage media (also called memory) and solid state drives (solid state drive). ), hard disk drive (hard disk drive, HDD), tape and other non-volatile storage media (also called peripherals).
  • DRAM dynamic random-access memory
  • solid state drives solid state drive
  • HDD hard disk drive
  • tape tape and other non-volatile storage media (also called peripherals).
  • peripherals non-volatile storage media
  • a processor such as a central processing unit (CPU) processes data in memory when processing input and output (IO) data.
  • CPU central processing unit
  • IO input and output
  • the present application provides a data access method, which shields the difference of the bus protocol through the memory expansion card, and provides the memory space converted from the external memory space to the computing device, so that the processor of the computing device can access the external memory as accessing the memory, There is no need to perform swap-in and swap-out operations, which improves the efficiency of data access.
  • the present application also provides a device corresponding to the above method, a memory expansion card, a data access system, a computer-readable storage medium, and a computer program product.
  • the present application provides a data access method.
  • the method can be executed by a memory expansion card.
  • the memory expansion card receives the first data access request generated by the computing device according to the internal bus protocol, wherein the internal bus protocol includes a bus protocol for accessing the memory space of the computing device, and the first data access request includes virtual data in the memory space. address, and then the memory expansion card performs protocol conversion on the first data access request to obtain the second data access request in the external bus protocol format, the external bus protocol includes a bus protocol for accessing the external memory space of the computing device, and the second data access The request includes a physical address in the external storage space, and the memory expansion card accesses the external storage space according to the second data access request.
  • the memory expansion card can shield the difference of the bus protocol, and provide the computing device with memory space, such as the memory space converted from the external storage space, so that the computing device can access the external memory without swapping data into the computing device's memory. storage, which improves the data access efficiency of computing devices.
  • the virtual address in the memory space is the first virtual address visible to the computing device
  • the memory expansion card may first convert the first virtual address visible to the computing device is the second virtual address visible to the memory expansion card, and then converts the second virtual address into a physical address in the external memory space according to the mapping relationship between the virtual address and the physical address in the index.
  • the memory expansion card can access the external storage space through the above address conversion, and the computing device can obtain the access result from the memory expansion card without performing swap-in and swap-out operations, which improves the efficiency of data access.
  • the first data access request includes a first virtual address visible to the computing device, and the memory expansion card can convert it into a second virtual address visible to the memory expansion card, Then, based on the mapping relationship between the virtual address and the physical address in the index, the second virtual address is converted into a physical address in the external storage space. In this way, the memory expansion card can access the external memory space according to the physical address.
  • the memory expansion card can read the data, the data can be written into the internal memory of the memory expansion card.
  • the computing device can read the memory of the memory expansion card through the internal bus to obtain corresponding data. In this process, the computing device does not need to perform swap-in and swap-out operations, which improves data access efficiency.
  • the external storage space includes at least one of a local external storage space and a remote external storage space.
  • the remote external storage space may be the storage space corresponding to the external storage connected to the processor and other components of the computing device through the network
  • the local external storage space may be the external storage directly connected to the processor and other components of the computing device through the bus corresponding storage space.
  • the memory expansion card may access the remote external storage space through RDMA according to the second data access request.
  • the memory expansion card can not only be used to expand the local memory capacity, but also expand the remote memory capacity through a cross-node (for example, cross-computing device) expansion method, which can meet different business needs.
  • a cross-node for example, cross-computing device
  • the internal bus protocol includes any one of the peripheral component interconnection standard PCI, the high-speed peripheral component interconnection standard PCI-E, the quick channel interconnection QPI or the unified bus UB, and the external The bus protocol includes any one of SCSI or serial connection SAS.
  • the memory expansion card can use the corresponding internal bus protocol and external bus protocol for data access according to actual needs, and has high availability.
  • the computing device maintains at least one request queue, where the request queue is used to temporarily store data access requests.
  • the processor of the computing device may include multiple cores, and each core may correspond to a request queue. Based on this, the number of request queues may be equal to the number of cores.
  • the computing device when the request queue includes a plurality of processes or threads corresponding to data access requests, the computing device (specifically, the core of the processor of the computing device) can execute in a synchronous manner including the first data access request. Processes or threads corresponding to multiple data access requests in the
  • the memory expansion card is integrated into the computing device or inserted into the computing device through hot plugging.
  • the memory expansion card when the memory expansion card is integrated in the computing device, the memory expansion card can be started with the startup of the computing device, thereby automatically expanding the memory capacity, speeding up the data access efficiency of the computing device, and improving the user experience without manual operation by the user.
  • the memory expansion card can also be used as a hot-swappable component, and can be inserted into the computing device through hot-swapping, so that the memory capacity can be expanded on demand and resource waste can be avoided.
  • the memory expansion card includes a redundant array of independent disks.
  • the redundant array of independent disks can realize redundant calculation of data, thereby ensuring data accuracy and security, and meeting business requirements.
  • the present application provides a data access device, the device comprising:
  • a communication module configured to receive a first data access request generated by a computing device according to an internal bus protocol, wherein the internal bus protocol includes a bus protocol for accessing a memory space of the computing device, and the first data access request includes including a virtual address in said memory space;
  • a conversion module configured to perform protocol conversion on the first data access request to obtain a second data access request in an external bus protocol format, wherein the external bus protocol includes a bus for accessing the external memory space of the computing device protocol, the second data access request includes the physical address in the external memory space;
  • An access module configured to access the external storage space according to the second data access request.
  • the virtual address in the memory space is a first virtual address visible to the computing device; the conversion module is further configured to:
  • the external storage space includes at least one of a local external storage space and a remote external storage space;
  • the access module is specifically used for:
  • the remote direct data access RDMA is used to access the remote external storage space.
  • the internal bus protocol includes any one of the peripheral component interconnection standard PCI, the high-speed peripheral component interconnection standard PCI-E, the quick channel interconnection QPI or the unified bus UB, and the external The bus protocol includes any one of SCSI or serial connection SAS.
  • the present application provides a memory expansion card.
  • the memory expansion card includes a processor and a memory
  • the memory can be, for example, a memory
  • the memory stores computer-readable instructions
  • the processor executes the computer-readable instructions, so that the memory expansion card performs as described in the present application.
  • the present application provides a data access system.
  • the data access system includes a computing device and a memory expansion card.
  • the computing device is configured to generate a first data access request according to an internal bus protocol, the internal bus protocol includes a bus protocol for accessing a memory space of the computing device, and the first data access request includes the memory space virtual address in .
  • the memory expansion card is used to receive the first data access request sent by the computing device, perform protocol conversion on the first data access request, and obtain a second data access request in an external bus protocol format, and according to the second data access request An access request to access the external memory space, wherein the external bus protocol includes a bus protocol for accessing the external memory space of the computing device, and the second data access request includes a physical address in the external memory space .
  • the present application provides a computer-readable storage medium, where instructions are stored in the computer-readable storage medium, and the instructions instruct the memory expansion card to execute the above-mentioned first aspect or any one of the implementation manners of the first aspect.
  • the present application provides a computer program product containing instructions, which, when running on a memory expansion card, causes the memory expansion card to execute the data described in the first aspect or any implementation of the first aspect. access method.
  • FIG. 1 is a schematic structural diagram of a computing device provided by an embodiment of the present application.
  • Fig. 2 is the schematic diagram of a kind of pyramid storage system that the embodiment of the application provides;
  • FIG. 3 is a schematic diagram of the architecture of a data access system provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a memory expansion card provided by an embodiment of the present application.
  • FIG. 5 is a flowchart of a memory expansion method provided in an embodiment of the present application.
  • FIG. 6 is a flow chart of a data access method provided by an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a data access device provided by an embodiment of the present application.
  • first and second in the embodiments of the present application are used for description purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Thus, a feature defined as “first” and “second” may explicitly or implicitly include one or more of these features.
  • the computing device on which the application is deployed needs to access data in order to implement the functionality of the application.
  • a computing device deployed with a database application needs to perform a large amount of data access to update data in the database, or respond to a data query request and return a query result to a user.
  • computing devices deploying web applications need to perform a large amount of data access in order to return requested content to users.
  • a computing device may be a server, or a terminal.
  • Terminals include, but are not limited to, user equipment such as desktops, laptops, and smart phones.
  • user equipment such as desktops, laptops, and smart phones.
  • the structure of the computing device is introduced below.
  • the computing device 100 includes a processor 101, an input and output device (input output device, IO device) 102, a memory 103, a cache 104, and a memory management unit (memory management unit, MMU) 105. , an input output memory management unit (input output management unit, IOMMU) 106, an external memory 107 and a bus 108.
  • processor 101 an input and output device (input output device, IO device) 102, a memory 103, a cache 104, and a memory management unit (memory management unit, MMU) 105.
  • MMU memory management unit
  • IOMMU input output memory management unit
  • IOMMU input output memory management unit
  • the processor 101 includes at least one core (core). This core is also called a compute engine. Among them, each core can perform tasks independently. When the processor 101 includes multiple cores, tasks from applications can be divided, so that the applications can make full use of the multiple cores and execute more tasks within a specific time.
  • the processor 101 may be a main processor, such as a CPU.
  • the input-output device 102 refers to a hardware device capable of inputting data and/or outputting data.
  • the input and output devices 102 can be divided into input devices and output devices.
  • the input device may include a mouse, a keyboard, a joystick, a stylus, a microphone, and the like
  • the output device may include a display, a speaker, and the like.
  • the memory 103 is also called an internal memory or a main memory, and is used for temporarily storing operation data in the processor 101 . Further, the internal memory 103 is also used for temporarily storing data exchanged with the external storage 107 .
  • the memory 103 can usually be implemented by a storage medium such as a dynamic random access memory (DRAM) or a static random access memory (static random access memory, SRAM).
  • DRAM dynamic random access memory
  • SRAM static random access memory
  • the cache 104 (referred to as a processor cache in this embodiment, such as a CPU cache) is a component used to reduce the average time required for the processor 101 to access the memory 103 .
  • cache 104 is positioned at the second level from top to bottom, second only to the register (not shown in Fig. 1) of processor 101, higher than memory 103 (memory 103 is positioned at top down the third floor).
  • the capacity of the cache 104 is much smaller than that of the memory 103 , but the access speed can be close to the frequency of the processor 101 .
  • Memory management unit 105 is a type of computer hardware for processing data access requests.
  • the memory management unit 105 is specifically configured to map a virtual address (virtual address, VA) in a data access request.
  • the memory management unit 105 can intercept the data access request sent by the core of the processor 101, and map (or translate) the virtual address in the data access request into a physical address (physical address, PA), so as to access the memory according to the physical address 103.
  • the input-output memory management unit 106 is essentially a memory management unit. Similar to the memory management unit 105 mapping the virtual address visible to the processor 101 to a physical address, the input-output memory management unit 106 is used to map the virtual address (also called device address or IO address) visible to the input-output device 102 into a physical address address.
  • the virtual address also called device address or IO address
  • the external storage 107 is also referred to as external storage or auxiliary storage, and is usually used for persistent storage of data.
  • the external memory 107 can persistently store computing data in the processor 101 . Even if the power supply is abnormal, the data written into the external memory 107 can still be saved, avoiding data loss.
  • the external storage 107 includes at least one nonvolatile memory 1071.
  • the external storage includes multiple nonvolatile memories, the multiple nonvolatile memories may be of the same type or of different types.
  • the external memory 107 may include two types of non-volatile memory, such as storage class memory (storage class memory, SCM) and solid state disk (solid state drive, SSD).
  • storage class memory storage class memory
  • SSD solid state drive
  • the bus 108 is used to connect various functional components of the computing device 100 .
  • Bus 108 is the common communication backbone for transferring information between the various functional components of computing device 100 .
  • the bus 108 may be a transmission harness formed of conductive wires. According to different connection objects, the bus 108 can also be divided into an internal bus and an external bus.
  • the internal bus adopts the internal bus protocol to transmit information.
  • the internal bus protocol includes a bus protocol for accessing the memory space of the computing device 100 .
  • the external bus uses the external bus protocol to transmit information.
  • the external bus protocol includes a bus protocol for accessing the external memory space of the computing device 100 .
  • the memory space refers to the address space of the memory
  • the external memory space refers to the address space of the external memory.
  • the internal bus protocol includes but is not limited to peripheral component interconnect standard (peripheral component interconnect, PCI) bus, peripheral component interconnect standard high-speed (PCI Express, PCI-E) protocol, express channel interconnection (Intel TM Quick Path Interconnect, QPI) protocol, unified bus (universal bus, UB) protocol.
  • the external bus protocol includes but is not limited to a small computer system interface (small computer system interface, SCSI) protocol or a serial attached small computer system interface (Serial Attached SCSI, SAS) protocol.
  • the computing device 100 shown in FIG. 1 is illustrated by taking the external memory 107 as a remote external memory.
  • the external storage 107 includes a network card 1072 .
  • the network card 1072 can be, for example, a smart NIC network interface card (that is, a network adapter card).
  • the external memory 107 is connected to the network through the network card 1072 , and then connected to other components of the computing device 101 through the network.
  • the network may be a wired communication network, such as an optical fiber communication network, or a wireless communication network, such as a wireless local area network (wireless local area network, WLAN) or a fifth generation (the fifth generation, 5G) mobile communication network.
  • WLAN wireless local area network
  • 5G fifth generation
  • the external storage 107 of the computing device 100 may also be a local external storage, and other components of the computing device 100 such as the processor 101 may be connected to the local external storage through the bus 108 .
  • the computing device 100 may include both a remote external storage and a local external storage.
  • this embodiment of the present application may be applicable to a centralized storage or a distributed storage scenario, which is not limited in this embodiment.
  • the processor 101 when the processor 101 processes IO data, it processes data in the memory 103 .
  • the data to be processed is not in the internal memory 103, it is also necessary to perform data swap-in and swap-out operations, such as writing some data in the internal memory 103 to the external storage 107, and reading the data to be processed from the external storage 107 into the internal memory 103. Since the capacity of the memory 103 in the computing device 100 is usually limited, the processor 101 has a high probability of performing data swap-in and swap-out operations when processing IO data, which affects the efficiency of data access.
  • the embodiment of the present application provides a data access method.
  • the method can be executed by a memory expansion card.
  • the memory expansion card can convert the external storage space of the computing device 100 into a memory space, so that the computing device 100 can access the external storage 107 as accessing the internal memory 103 . That is, the processor 101 of the computing device 100 can access the external storage 107 without swapping the data in the external storage 107 into the internal memory 103 , which is equivalent to expanding the capacity of the internal memory 103 .
  • the memory expansion card receives the first data access request generated by the computing device 100 according to the internal bus protocol, wherein the internal bus protocol includes a bus protocol for accessing the memory space of the computing device 100, and the first data access request includes virtual address, and then the memory expansion card performs protocol conversion on the first data access request to obtain the second data access request in the format of the external bus protocol, the external bus protocol includes a bus protocol for accessing the external memory space of the computing device, and the The data access request includes a physical address in the external storage space, and the memory expansion card accesses the external storage space according to the second data access request.
  • the internal bus protocol includes a bus protocol for accessing the memory space of the computing device 100
  • the first data access request includes virtual address
  • the memory expansion card performs protocol conversion on the first data access request to obtain the second data access request in the format of the external bus protocol
  • the external bus protocol includes a bus protocol for accessing the external memory space of the computing device
  • the The data access request includes a physical address in the external storage space
  • the memory expansion card can shield the difference of the bus protocol and provide the computing device 100 with a memory space, such as a memory space converted from an external storage space, and the computing device 100 does not need to exchange data into the memory 103 of the computing device 100.
  • Accessible external storage 107 improves data access efficiency of computing device 100 .
  • the computing device 100 can access the external storage 107 as it accesses the internal memory 103, the computing device 100 has a higher probability of prefetching the required data, and the computing device 100 does not need to switch processes or threads, which can reduce process or thread switching The resulting overhead improves operational efficiency.
  • the data access system 300 includes a computing device 100 and a memory expansion card 200 .
  • the memory expansion card 200 is respectively connected to the processor 101 and the external memory 107 of the computing device 100 .
  • the computing device 100 may be a structure as shown in FIG. 1 , or may be another structure.
  • the computing device 100 may be a structure including a local external storage.
  • the memory expansion card 200 can be connected to the processor 101 and other components of the computing device 100 through the bus 108, and connected to the external memory 107 of the computing device 100 through the network.
  • the computing device 100 can generate the first data access request according to the internal bus protocol, and then send the first data access request to the memory expansion card 200, and the memory expansion card 200 can perform protocol conversion on the first data access request to obtain the external bus protocol format.
  • the second data access request, and then the memory expansion card 200 accesses the external storage space according to the second data access request. In this way, the computing device 100 can access the external storage space through the memory expansion card 200 .
  • the memory expansion card 200 includes a bus 201 , a processor 202 , a communication interface 203 and a memory 204 .
  • the bus 201 of the memory expansion card 200 is a public communication trunk for transmitting information between various functional components of the memory expansion card.
  • the bus 201 of the memory expansion card 200 can be divided into an internal bus and an external bus.
  • the internal bus adopts the internal bus protocol
  • the external bus adopts the external bus protocol. It should be noted that the internal bus protocol adopted by the computing device 100 and the internal bus protocol adopted by the memory expansion card 200 may be the same or different.
  • the processor 202 is mainly used to assist the computing device 100 in accelerating data access, therefore, the processor 202 may also be called a coprocessor or a core acceleration unit. Wherein, the processor 202 may be, for example, a data processing unit (data processing unit, DPU).
  • DPU data processing unit
  • the communication interface 203 may include an interface for communicating with the processor 101 of the computing device 100, and the interface may be used for receiving the first data access request generated by the computing device 100 based on the internal bus protocol, and returning the first data access request to the computing device 100. Request the corresponding access result. Based on this, the interface can also be called an internal bus protocol access unit.
  • the memory 204 is used to provide the processor 202 (the local processor of the memory expansion card 200 ) with cache services required by corresponding computing functions, and provide direct memory access space to the processor 101 of the computing device 100 , thereby expanding the memory capacity.
  • the memory 204 can adopt double data rate synchronous dynamic random access memory (double data rate synchronous dynamic random access memory, DDR SDRAM, referred to as DDR) or Apache Persistent Memory (Apache Pass, AEP) and other storage media.
  • DDR SDRAM double data rate synchronous dynamic random access memory
  • AEP Apache Persistent Memory
  • the communication interface 203 may also include an interface for communicating with a non-volatile storage medium (also called a non-volatile medium), and the interface is also called a non-volatile medium access unit.
  • the non-volatile medium access unit can complete the conversion between the internal bus protocol and the external bus protocol. For example, if the internal bus protocol is PCI-E and the external bus protocol is SAS, then the protocol conversion between PCI-E and SAS can be completed to achieve access to non-volatile storage media.
  • the non-volatile media access unit can also provide disk access functions. If the internal bus protocol and external bus protocol are both PCI-E, it is necessary to provide corresponding PCI-E IO expansion, clock and out-of-band management functions Wait. When the physical resources provided by the non-volatile medium access unit cannot meet the medium disk access requirements, the corresponding resources can also be extended through the medium expansion unit 205, so as to meet the disk access requirements.
  • the memory 204 may also have a short-term power-down backup capability.
  • the memory 204 is equipped with a battery, so when the power supply is abnormal, the battery can be used for short-term backup power, so that the data in the memory 204 can be transferred to a non-volatile medium for data protection. This data may be restored to memory 204 when power is restored.
  • the communication interface 203 may also include a network (fabric) interface unit.
  • the network interface unit can complete the conversion between the internal bus protocol and the external transmission protocol.
  • the external transmission protocol includes but is not limited to fiber channel (fibre channel, FC), Ethernet (ethernet, ETH), InfiniBand (InfiniBand, IB) or remote direct data access based on converged Ethernet (RDMA over Converged Ethernet, RoCE) etc.
  • the network interface unit can realize cross-node (such as cross-computing devices) access to memory, volatile media and non-volatile media of distributed storage or centralized storage.
  • the network interface unit may also report the medium as different types of devices for access by the processor 101 based on the properties of the medium across nodes. For example, if the inter-node medium has low-latency and volatile characteristics, a volatile memory access interface is provided to the processor 101 . For another example, if the inter-node medium has low latency and non-volatile characteristics, a non-volatile memory access interface is provided to the processor 101 . For another example, if the inter-node medium has a large capacity and high latency, a common medium access interface is provided to the processor 101 .
  • the above-mentioned memory expansion card 200 can be integrated in the computing device 100, or can be inserted into the computing device 100 by hot plugging, so as to expand the memory capacity.
  • the memory capacity may also change.
  • the memory capacity changes it can be reported to the computing device 100, for example, the operating system (operation system, OS) running on the computing device 100, thereby realizing memory semantic access, that is, converting the external memory space provided by the external storage medium into memory space, so that the computing device 100 can access it by accessing memory.
  • the memory expansion card 200 may also be pulled out to perform memory semantic deletion.
  • S502 Start the data access system 300 integrated with the memory expansion card 200, and then execute S510.
  • S504 The memory expansion card 200 in the form of a component is hot-inserted into the data access system 300, and then S510 is executed.
  • S506 The capacity of the medium accessed by the data access system 300 through the network interface unit changes.
  • S502 to S506 are several implementation manners of memory expansion, and one or more of them may be selected in actual application, which is not limited in this embodiment.
  • S508 The memory expansion card 200 obtains the capacity change information of the medium connected to the network interface unit, and then executes S514.
  • the memory expansion card 200 is connected to the computing device 100 of the data access system 300 .
  • the memory expansion card 200 obtains the basic information of the memory expansion card 200.
  • the basic information of the memory expansion card 200 includes at least one of storage characteristics, access characteristics and the like.
  • the storage characteristic may include storage capacity, volatile or non-volatile.
  • Access characteristics can include low latency or high latency.
  • S514 The memory expansion card 200 reports change information.
  • the change information indicates that the newly added memory expansion card 200 is a low-latency volatile medium, or the medium connected to the network interface unit has added a low-latency volatile medium, then execute S516.
  • the change information indicates that the newly added memory expansion card 200 is a low-latency non-volatile medium, or the medium connected to the network interface unit adds a low-latency non-volatile medium, then execute S522.
  • S530 When the change information indicates that the newly added memory expansion card 200 is a high-latency non-volatile medium, or the medium connected to the network interface unit adds a high-latency non-volatile medium, then execute S530.
  • the change information may be, for example, the capacity change information of the medium connected to the network interface unit in S508, or the basic information of the newly added memory expansion card 200 in S512.
  • S516 The computing device 100 calls a function in the operating system to generate a memory hot swap interrupt.
  • the computing device 100 may call the CONFIG_ARCH_MEMORY_PROBE function in Linux TM to generate a memory hot swap interrupt.
  • S518 The computing device 100 modifies the virtual address of the extended memory.
  • the expanded memory may be the memory provided by the newly added memory expansion card 200, or the memory expanded by the change of the medium connected to the network interface unit.
  • the computing device 100 may modify the start address and memory capacity of the above-mentioned extended memory, thereby modifying the virtual address of the extended memory.
  • S520 The computing device 100 modifies the type of the extended memory, and then executes S521.
  • the computing device 100 can modify the type of the expanded memory to RAM .
  • S521 The computing device 100 modifies the memory status file, so as to modify the expanded memory to an online status.
  • the computing device 100 can modify the "auto_online_blocks" file of Linux TM to change the extended memory to an online state.
  • the extended memory may be modified to an offline (offline) state.
  • S522 The computing device 100 calls a function in the operating system to generate a memory hot swap interrupt.
  • S524 The computing device 100 modifies the virtual address of the extended memory.
  • S526 The computing device 100 modifies the type of the extended memory, and then executes S528.
  • the computing device 100 can modify the type of the expanded memory for NVRAM.
  • the OS may also agree on a special descriptor to indicate information such as the type of the aforementioned memory.
  • S528 The computing device 100 modifies the memory status file, so as to modify the expanded memory to an online status.
  • S530 The computing device 100 performs a common medium access procedure.
  • the ordinary medium specifically refers to a high-latency non-volatile medium.
  • the computing device 100 performs a common medium access process, specifically using a high-latency non-volatile medium as an external storage, so that the computing device 100 can send a data access request to the memory expansion card 200, and the memory expansion card 200 can be used to realize that no swapping is required.
  • the data is stored in the memory 103 of the computing device 100, that is, the data in the external memory can be accessed.
  • FIG. 5 illustrates the access process of the memory expansion card 200 in detail, and then the data access method after the memory expansion is described in detail.
  • the method includes:
  • S602 The computing device 100 generates a first data access request according to an internal bus protocol.
  • S604 The computing device 100 sends a first data access request to the memory expansion card 200 .
  • the processor 101 of the computing device 100 may initiate a first data access request according to an internal bus protocol.
  • the first data access request may be used to request to add new data, delete data, find data or modify data.
  • the first data access request may include an access address, for example, the access address may be a virtual address in the memory space.
  • the first data access request further includes a command (command, CMD), which may be, for example, a read command or a write command.
  • a command CMD
  • the first data access request when used for adding data or modifying data, the first data access request further includes a write command.
  • the first data access request also carries data to be written.
  • the computing device 100 may send the first data access request to the memory expansion card 200, so as to access the external memory 107 through the memory expansion card 100 data in .
  • the memory expansion card 200 performs protocol conversion on the first data access request to obtain a second data access request in an external bus protocol format.
  • the internal bus protocol includes any one or more of PCI protocol, PCI-E protocol, QPI protocol, and UB protocol
  • the external bus protocol includes one or more of SCSI protocol and SAS protocol.
  • the memory expansion card 200 can unpack the data packet of the first data access request to obtain content such as a command and an access address, and then encapsulate the above content according to the format specified by the external bus protocol, so as to implement the protocol for the first data access request. Convert to obtain the second data access request in the external bus protocol format.
  • the external bus protocol is used to access the external memory space, based on this, the second data access request includes the physical address in the external memory space.
  • the physical address may be obtained by the memory expansion card 200 converting the virtual address in the memory space in the first data access request.
  • the access address in the first data access request generated by the computing device 100 through the processor 101 is a virtual address.
  • the address space seen by the processor 101 is the virtual memory, and the address for accessing the virtual memory is the virtual address.
  • the physical address Corresponding to it is the physical address.
  • the physical address is also called a real address.
  • the physical address may be, for example, the address of the external memory 107 of the computing device 100 .
  • the processor 101 in the computing device 100 can control the memory 103 of the computing device 100, the storage medium (such as memory and persistent media) of the memory expansion card 200, and the devices mounted on the memory expansion card 200 such as external
  • the storage 107 (such as a persistent medium such as a hard disk) is uniformly addressed to form a virtual address space, and the virtual address space is a memory space that the processor 101 can access.
  • the memory expansion card 200 can uniformly address the storage medium (such as the internal memory 204 and the low-latency non-volatile medium) of the memory expansion card 200 and the external memory 107 mounted on the memory expansion card 200 to form a virtual address space, the virtual address space is a memory space that the processor 202 of the memory expansion card 200 can access.
  • the virtual address in the first data access request is the first virtual address visible to the computing device 100 .
  • the memory expansion card 200 may translate the first virtual address visible to the computing device 100 to a second virtual address visible to the memory expansion card 200 .
  • the memory expansion card 200 maintains an index, which includes the mapping relationship between the virtual address and the physical address, and the memory expansion card 200 can convert the second virtual address into the external storage space according to the mapping relationship between the virtual address and the physical address in the index. physical address.
  • the memory expansion card 200 accesses the external memory space according to the second data access request.
  • the memory expansion card 200 can access the external memory space through the external bus according to the physical address in the second data access request. Wherein, the memory expansion card 200 may also obtain the access result, and return the access result to the computing device 100 .
  • the access result may be the found data; when the first data access request is used to add data, delete data or modify data, the access result may be a notification of successful addition, Delete the success notification or modify the success notification.
  • the external storage space includes at least one of a local external storage space and a remote external storage space.
  • the memory expansion card 200 may access the remote external storage space through remote direct memory access (RDMA) according to the second data access request.
  • RDMA remote direct memory access
  • the processor 202 of the memory expansion card 200 performs protocol conversion to obtain the second data access request, it can send the second data access request to the network interface unit, and the network interface unit completes the remote external memory access.
  • the memory expansion card 200 accesses the external storage space and the index changes, for example, when the memory expansion card 200 adds data to the external storage space, modifies data, or deletes data and causes the index to change, the memory expansion card 200 can also update the index.
  • the memory expansion card 200 adds data or modifies data in the external storage space, specifically, executes a write operation of persistent data to the external storage space. Based on this, before writing data or after writing data, the memory expansion card 200 can deduplicate/compress data to reduce the amount of data. Correspondingly, the memory expansion card 200 queries data from the external storage space, which may be to perform a read operation to the external storage space, and the memory expansion card 200 may reconstruct/decompress the data after reading the data to restore the data. It should be noted that the memory expansion card 200 can choose whether to perform deduplication/compression according to actual business requirements. For example, the memory expansion card 200 may choose not to perform deduplication/compression when the business is busy, and perform deduplication/compression when the business is idle.
  • the memory expansion card 200 performs redundancy calculation on the data before or after writing the data, so as to ensure the reliability and correctness of the data.
  • performing redundant calculation on data includes realizing redundant calculation through redundant array of independent disks (RAID), or realizing redundant calculation through erasure code (erasure code, EC).
  • the memory expansion card 200 can complete data slicing and redundant computing according to the actual business needs and the configured data redundancy strategy, and then distribute the redundant data blocks to in different media spaces.
  • the media space includes the media space provided through the network interface unit. That is, the memory expansion card 200 can distribute multiple data blocks to the current computing device 100 and other computing devices 100 . Wherein, the current computing device 100 and other computing devices 100 both have non-volatile storage media.
  • computing device 100 can access the external storage 107 like accessing the internal memory 103, and the computing device 100 can adopt the synchronous IO access mode to reduce the creation, switching and destruction of processes/threads
  • the number of times increases the computing efficiency of the processor 101 in the computing device 100 .
  • computing device 100 may maintain at least one request queue.
  • the number of request queues may correspond to the number of cores of the processor 101 in the computing device 100 , for example, may be equal to the number of cores.
  • the computing device 100 may execute the processes corresponding to the multiple data access requests in a synchronous manner. process or thread.
  • the embodiment of the present application provides a data access method.
  • the memory expansion card 200 can shield the difference of the bus protocol and provide the computing device 100 with a memory space, such as a memory space converted from an external storage space, and the computing device 100 does not need to exchange data into the memory 103 of the computing device 100 That is, the external memory 107 can be accessed through the memory expansion card 200 , thereby improving the data access efficiency of the computing device 100 .
  • the computing device 100 has a higher probability of prefetching the required data without switching processes or threads, which can reduce the overhead caused by process or thread switching, reduce the occupation of computing resources by process or thread switching, and improve computing efficiency.
  • the embodiment shown in FIG. 6 is illustrated by taking the data requested to be accessed in the external storage 107 of the computing device 100 .
  • the memory expansion card 200 can first determine whether the memory 204 of the memory expansion card 200 includes the data requested to be accessed, if so, the memory expansion card 200 can access the memory 204 of the memory expansion card 200, if not , then the memory expansion card 200 accesses the external memory 107 of the computing device 100 again.
  • the memory expansion card 200 When the memory expansion card 200 is connected with a non-volatile storage medium (such as a low-latency non-volatile storage medium), if the memory 204 of the memory expansion card 200 does not include the data to be accessed, the memory expansion card 200 also It can be determined whether the non-volatile storage medium of the memory expansion card 200 includes the data requested to be accessed, if so, the memory expansion card 200 can access the non-volatile storage medium, if not, the memory expansion card 200 accesses the computing device again 100 of external storage 107.
  • a non-volatile storage medium such as a low-latency non-volatile storage medium
  • the protocol conversion of the first data access request can be performed, specifically, the internal bus of the computing device 100
  • the protocol is converted into the internal bus protocol of the memory expansion card 200, so that the memory expansion card 200 can access the above-mentioned memory 204 or the non-volatile storage medium based on the converted internal bus protocol.
  • the memory expansion card 200 performs protocol conversion to realize semantic conversion, such as converting the memory semantics of the processor 101 into the data execution semantics of the memory expansion card 200, and correspondingly, the memory expansion card 200 accesses the internal memory 204 or the above-mentioned volatile storage After media, the access result can be semantically converted, for example, the protocol format of the access result is converted into the internal bus protocol of the computing device 100, so that the computing device 100 can obtain the access result through the internal bus.
  • the non-volatile storage medium of the memory expansion card 200 may include one or more of a local non-volatile storage medium and a remote non-volatile storage medium.
  • the memory expansion card 200 may also send the data operation request after the protocol conversion to the network interface unit.
  • the network interface unit accesses the above-mentioned remote non-volatile storage medium through a cross-node access technology (such as RDMA), performs semantic conversion on the access result, and then returns to the computing device 100 through the internal bus access unit.
  • RDMA cross-node access technology
  • the index change operation (such as: write, increase, delete, change, etc.) of the memory expansion card 200 (for example, a raid card) is involved.
  • the card 200 can modify the information in the index for use in the next query.
  • the device 700 includes:
  • a communication module 702 configured to receive a first data access request generated by a computing device according to an internal bus protocol, wherein the internal bus protocol includes a bus protocol for accessing a memory space of the computing device, and the first data access request including the virtual address in the memory space;
  • a conversion module 704 configured to perform protocol conversion on the first data access request to obtain a second data access request in the format of an external bus protocol, wherein the external bus protocol includes a protocol for accessing the external memory space of the computing device A bus protocol, the second data access request includes a physical address in the external memory space;
  • An access module 706, configured to access the external storage space according to the second data access request.
  • the virtual address in the memory space is the first virtual address visible to the computing device; the conversion module 704 is also used for:
  • the external storage space includes at least one of a local external storage space and a remote external storage space;
  • the access module 706 is specifically used for:
  • the remote direct data access RDMA is used to access the remote external storage space.
  • the internal bus protocol includes any one of the peripheral component interconnection standard PCI, the high-speed peripheral component interconnection standard PCI-E, the quick channel interconnection QPI or the unified bus UB, and the external The bus protocol includes any one of SCSI or serial connection SAS.
  • the data access device 500 may correspond to execute the method described in the embodiment of the present application, and the above-mentioned and other operations and/or functions of the various modules/units of the data access device 500 are respectively in order to realize the implementation shown in FIG. 6
  • the corresponding flow of each method in the example is not repeated here.
  • the embodiment of the present application also provides a memory expansion card 200, which is specifically used to implement the functions of the data access device 700 shown in FIG. 7 .
  • a memory expansion card 200 which is specifically used to implement the functions of the data access device 700 shown in FIG. 7 .
  • For the hardware structure of the memory expansion card 200 reference may be made to the related content description in FIG. 4 , which will not be repeated here.
  • the embodiment of the present application also provides a computer-readable storage medium.
  • the computer-readable storage medium may be any available medium that can be stored by the memory expansion card 200 or a data storage device such as a data center including one or more available media.
  • the available media may be magnetic media (eg, floppy disk, hard disk, magnetic tape), optical media (eg, DVD), or semiconductor media (eg, solid state hard disk), etc.
  • the computer-readable storage medium includes instructions, and the instructions instruct the memory expansion card 200 to execute the above data access method.
  • the embodiment of the present application also provides a computer program product.
  • the computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on the memory expansion card 200, the processes or functions according to the embodiments of the present application are generated in whole or in part.
  • the computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, from a website, computing device, or data center via Wired (eg, coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (eg, infrared, wireless, microwave, etc.) transmission to another website site, computing device, or data center.
  • Wired eg, coaxial cable, fiber optic, digital subscriber line (DSL)
  • wireless eg, infrared, wireless, microwave, etc.
  • the embodiment of the present application also provides a data access system.
  • the system 300 includes a computing device 100 and a memory expansion card 200 .
  • the computing device 100 is configured to generate a first data access request according to an internal bus protocol
  • the memory expansion card 200 is configured to receive the first data access request sent by the computing device 100, and implement a protocol on the first data access request. converting, obtaining a second data access request in the format of the external bus protocol, and accessing the external memory space according to the second data access request.

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Abstract

本申请提供了一种数据访问方法，包括：内存扩展卡接收计算设备根据内部总线协议生成的第一数据访问请求，然后内存扩展卡将第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，外部总线协议包括用于访问计算设备的外存空间的总线协议，接着内存扩展卡根据第二数据访问请求访问外存空间。内存扩展卡通过屏蔽总线协议的差异，向计算设备提供内存空间，例如是由外存空间转换的内存空间，使得计算设备无需将数据换入至计算设备的内存即可访问外存，提高了计算设备的数据访问效率。

Description

数据访问方法以及相关设备
本申请要求于2021年07月23日提交中国国家知识产权局、申请号为202110833852.9、发明名称为“一种用于数据访问的方法及装置”的中国专利申请的优先权，以及于2021年09月30日提交中国国家知识产权局、申请号为202111163646.8、发明名称为“数据访问方法以及相关设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及存储技术领域，尤其涉及一种数据访问方法、数据处理系统、内存扩展卡以及计算机可读存储介质、计算机程序产品。
背景技术
随着存储技术的不断发展，产生了不同类型的存储介质。例如，存储介质可以分为寄存器(register)、缓存(cache)、动态随机存取存储器(dynamic random-access memory，DRAM)等易失性存储介质(也称作内存)和固态驱动器(solid state drive)、硬盘驱动器(hard disk drive，HDD)、磁带等非易失性存储介质(也称作外设)。上述存储介质可以根据访问速度以及容量形成金字塔结构。该金字塔结构顶端的存储介质的访问速度快、容量小，该金字塔结构底端的存储介质的访问速度相对慢，但是容量大。
处理器如中央处理器(central processing unit，CPU)在处理输入输出(input output，IO)数据时是处理内存中的数据。当待处理的数据不在内存中时，还需要执行外设数据与内存数据的换入换出操作。
由于计算设备中内存的容量通常是有限的，因此，CPU在处理IO数据时，有较高概率执行外设数据与内存数据的换入换出操作，如此影响了数据访问的效率。
发明内容
本申请提供了一种数据访问方法，该方法通过内存扩展卡屏蔽总线协议的差异，向计算设备提供由外存空间转换的内存空间，使得计算设备的处理器可以如同访问内存一样访问外存，无需执行换入换出操作，提高了数据访问的效率。本申请还提供了上述方法对应的装置、内存扩展卡、数据访问系统、计算机可读存储介质以及计算机程序产品。
第一方面，本申请提供了一种数据访问方法。该方法可以由内存扩展卡执行。具体地，内存扩展卡接收计算设备根据内部总线协议生成的第一数据访问请求，其中，内部总线协议包括用于访问计算设备的内存空间的总线协议，第一数据访问请求包括内存空间中的虚拟地址，然后内存扩展卡将第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，该外部总线协议包括用于访问计算设备的外存空间的总线协议，第二数据访问请求包括外存空间中的物理地址，内存扩展卡根据该第二数据访问请求，访问外存空间。
在该方法中，内存扩展卡可以屏蔽总线协议的差异，向计算设备提供内存空间，例如是由外存空间转换的内存空间，如此计算设备无需将数据换入至计算设备的内存即可访问 外存，提高了计算设备的数据访问效率。
在一些可能的实现方式中，所述内存空间中的虚拟地址为对所述计算设备可见的第一虚拟地址，基于此，内存扩展卡可以先将对所述计算设备可见的第一虚拟地址转换为对所述内存扩展卡可见的第二虚拟地址，然后根据索引中的虚拟地址和物理地址的映射关系，将所述第二虚拟地址转换为所述外存空间中的物理地址。
其中，内存扩展卡通过上述地址转换，可以实现访问外存空间，计算设备可以从内存扩展卡获得访问结果，无需执行换入换出操作，提高了数据访问的效率。
以第一数据访问请求用于查询数据示例说明，该第一数据访问请求中包括对计算设备可见的第一虚拟地址，内存扩展卡可以将其转换为对内存扩展卡可见的第二虚拟地址，然后基于索引中虚拟地址和物理地址的映射关系，将第二虚拟地址转换为外存空间中的物理地址。如此内存扩展卡可以根据该物理地址访问外存空间。内存扩展卡读取到数据后，可以将数据写入该内存扩展卡的内存。计算设备可以通过内部总线读取内存扩展卡的内存，获得相应的数据。在该过程中，计算设备无需执行换入换出操作，提高了数据访问效率。
在一些可能的实现方式中，所述外存空间包括本地外存空间和远端外存空间中的至少一种。其中，远端外存空间可以是与计算设备的处理器等部件通过网络连接的外存所对应的存储空间，本地外存空间可以是与计算设备的处理器等部件直接通过总线连接的外存所对应的存储空间。当所述外存空间包括所述远端外存空间时，所述内存扩展卡可以根据所述第二数据访问请求，通过远程直接数据存取访问RDMA所述远端外存空间。
如此，内存扩展卡不仅可以用于扩展本地内存容量，还可以通过跨节点(例如跨计算设备)的扩展方法扩展远端内存容量，能够满足不同业务需求。
在一些可能的实现方式中，所述内部总线协议包括外设部件互连标准PCI、高速外设部件互连标准PCI-E、快速通道互联QPI或统一总线UB中的任意一种，所述外部总线协议包括小型计算机系统专用接口SCSI或者串行连接小型计算机系统专用接口SAS中的任意一种。
在该方法中，内存扩展卡可以根据实际需求采用相应的内部总线协议和外部总线协议进行数据访问，具有较高可用性。
在一些可能的实现方式中，所述计算设备维护有至少一个请求队列，其中，请求队列用于暂时存放数据访问请求。计算设备的处理器可以是包括多个内核，每个内核可以对应一个请求队列，基于此，请求队列的数量可以等于内核的数量。对于任意一个请求队列，当该请求队列包括多个数据访问请求对应的进程或线程时，所述计算设备(具体是计算设备的处理器的内核)可以采用同步方式执行包括第一数据访问请求在内的多个数据访问请求对应的进程或线程。
如此可以大幅度地减少进程/线程的创建、切换、销毁次数，提升计算设备的运算效率。而且，由于减少了进程/线程切换的时间，缩短了IO处理中的传输时间延时，由此可以提升分布式计算与分布式存储集群的性能。
在一些可能的实现方式中，所述内存扩展卡集成在所述计算设备或者通过热插拔插入所述计算设备。
其中，内存扩展卡集成在计算设备时，该内存扩展卡可以随着计算设备的启动而启动，进而实现自动化地扩展内存容量，加快计算设备的数据访问效率，无需用户手动操作，提 升了用户体验。内存扩展卡也可以作为热插拔组件，通过热插拔插入所述计算设备，如此可以实现按需扩展内存容量，避免资源浪费。
在一些可能的实现方式中，所述内存扩展卡包括独立磁盘冗余阵列。其中，独立磁盘冗余阵列可以实现对数据进行冗余计算，由此可以保障数据准确性和安全性，满足了业务需求。
第二方面，本申请提供了一种数据访问装置，所述装置包括：
通信模块，用于接收计算设备根据内部总线协议生成的第一数据访问请求，其中，所述内部总线协议包括用于访问所述计算设备的内存空间的总线协议，所述第一数据访问请求中包括所述内存空间中的虚拟地址；
转换模块，用于将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，其中，所述外部总线协议包括用于访问所述计算设备的外存空间的总线协议，所述第二数据访问请求中包括所述外存空间中的物理地址；
访问模块，用于根据所述第二数据访问请求访问所述外存空间。
在一些可能的实现方式中，所述内存空间中的虚拟地址为对所述计算设备可见的第一虚拟地址；所述转换模块还用于：
将对所述计算设备可见的第一虚拟地址转换为对所述内存扩展卡可见的第二虚拟地址；
根据索引中的虚拟地址和物理地址的映射关系，将所述第二虚拟地址转换为所述外存空间中的物理地址。
在一些可能的实现方式中，所述外存空间包括本地外存空间和远端外存空间中的至少一种；
所述访问模块具体用于：
当所述外存空间包括所述远端外存空间时，根据所述第二数据访问请求，通过远程直接数据存取RDMA访问所述远端外存空间。
在一些可能的实现方式中，所述内部总线协议包括外设部件互连标准PCI、高速外设部件互连标准PCI-E、快速通道互联QPI或统一总线UB中的任意一种，所述外部总线协议包括小型计算机系统专用接口SCSI或者串行连接小型计算机系统专用接口SAS中的任意一种。
第三方面，本申请提供了一种内存扩展卡。该内存扩展卡包括处理器和存储器，该存储器例如可以是内存，所述存储器存储有计算机可读指令，所述处理器执行所述计算机可读指令，使得所述内存扩展卡执行如本申请第一方面或第一方面的任一种实现方式所述的数据访问方法。
第四方面，本申请提供了一种数据访问系统。该数据访问系统包括计算设备和内存扩展卡。
所述计算设备用于根据内部总线协议生成第一数据访问请求，所述内部总线协议包括用于访问所述计算设备的内存空间的总线协议，所述第一数据访问请求中包括所述内存空间中的虚拟地址。
所述内存扩展卡用于接收所述计算设备发送的第一数据访问请求，将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，根据所述第二数据访问请求访问所述外存空间，其中，所述外部总线协议包括用于访问所述计算设备的外存空 间的总线协议，所述第二数据访问请求中包括所述外存空间中的物理地址。
第五方面，本申请提供一种计算机可读存储介质，所述计算机可读存储介质中存储有指令，所述指令指示内存扩展卡执行上述第一方面或第一方面的任一种实现方式所述的数据访问方法。
第六方面，本申请提供了一种包含指令的计算机程序产品，当其在内存扩展卡上运行时，使得内存扩展卡执行上述第一方面或第一方面的任一种实现方式所述的数据访问方法。
本申请在上述各方面提供的实现方式的基础上，还可以进行进一步组合以提供更多实现方式。
附图说明
为了更清楚地说明本申请实施例的技术方法，下面将对实施例中所需使用的附图作以简单地介绍。
图1为本申请实施例提供的计算设备的结构示意图；
图2为本申请实施例提供的一种金字塔存储体系的示意图；
图3为本申请实施例提供的一种数据访问系统的架构示意图；
图4为本申请实施例提供的一种内存扩展卡的结构示意图；
图5为本申请实施例提供的一种内存扩展方法的流程图；
图6为本申请实施例提供的一种数据访问方法的流程图；
图7为本申请实施例提供的一种数据访问装置的结构示意图。
具体实施方式
本申请实施例中的术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。
在很多应用中，部署应用的计算设备需要访问数据，以实现应用的功能。例如部署数据库应用的计算设备需要进行大量的数据访问，以更新数据库中的数据，或者是响应数据查询请求，向用户返回查询结果。又例如，部署web应用的计算设备需要进行大量的数据访问，以向用户返回请求的内容。
计算设备可以是服务器，或者是终端。终端包括但不限于台式机、笔记本电脑、智能手机等用户设备。为了便于理解，下面对计算设备的结构进行介绍。
参见图1所示的计算设备的结构示意图，计算设备100包括处理器101、输入输出设备(input output device，IO device)102、内存103、缓存104、内存管理单元(memory management unit，MMU)105、输入输出内存管理单元(input output management unit，IOMMU)106、外存107和总线108。
处理器101包括至少一个内核(core)。该内核也称作计算引擎。其中，每个内核可以独立地执行任务。当处理器101包括多个内核时，可以对来自应用的任务进行划分，使得应用能够充分利用多个内核，在特定的时间内执行更多任务。在本实施例中，处理器101可以是主处理器，例如为CPU。
输入输出设备102是指具有输入数据和/或输出数据能力的硬件设备。输入输出设备102可以分为输入设备和输出设备。其中，输入设备可以包括鼠标、键盘、操作杆、触控笔、麦克风等设备，输出设备可以包括显示器、扬声器等设备。
内存103也称作内存储器或主存储器，用于暂时存放处理器101中的运算数据。进一步地，内存103还用于暂时存放与外存107交换的数据。内存103通常可以采用动态随机存取存储器DRAM或者静态随机存取存储器(static random access memory，SRAM)等存储介质实现。
缓存104(本实施例中是指处理器缓存，如CPU缓存)是用于减少处理器101访问内存103所需平均时间的部件。参见图2，在金字塔式存储体系中，缓存104位于自顶向下的第二层，仅次于处理器101的寄存器(图1中未示出)，高于内存103(内存103位于自顶向下的第三层)。通常情况下，缓存104的容量远小于内存103，但访问速度可以接近处理器101的频率。
内存管理单元105是一种用于处理数据访问请求的计算机硬件。内存管理单元105具体用于对数据访问请求中的虚拟地址(virtual address，VA)进行映射。其中，内存管理单元105可以截获处理器101的内核发出的数据访问请求，将数据访问请求中的虚拟地址映射(或者翻译)为物理地址(physical address，PA)，以便于根据该物理地址访问内存103。
输入输出内存管理单元106实质是一种内存管理单元。类似于内存管理单元105将处理器101可见的虚拟地址映射为物理地址，输入输出内存管理单元106用于将输入输出设备可见102的虚拟地址(也可以称作设备地址或IO地址)映射为物理地址。
外存107也称作外部存储器、辅存，通常用于持久化保存数据。例如，外存107可以持久化存储处理器101中的运算数据。即使供电异常，已经写入该外存107的数据仍然能够保存，避免了数据丢失。具体实现时，外存107包括至少一个非易失性存储器1071，当外存包括多个非易失性存储器时，这多个非易失性存储器可以是相同类型，也可以是不同类型。例如，在图1的示例中，外存107可以包括两种类型的非易失性存储器，例如为存储级存储器(storage class memory，SCM)和固态硬盘(solid state drive，SSD)。
总线108用于将计算设备100的各个功能部件连接。总线108是计算设备100各种功能部件之间传送信息的公共通信干线。总线108可以是由导线形成的传输线束。根据连接对象不同，总线108还可以分为内部总线和外部总线。
其中，内部总线采用内部总线协议传送信息。内部总线协议包括用于访问所述计算设备100的内存空间的总线协议。外部总线采用外部总线协议传送信息。外部总线协议包括用于访问所述计算设备100的外存空间的总线协议。其中，内存空间是指内存的地址空间，外存空间是指外存的地址空间。
在一些实施例中，内部总线协议包括但不限于外设部件互连标准(peripheral component interconnect，PCI)总线、外设部件互连标准高速(PCI Express，PCI-E)协议、快速通道互联(Intel TM Quick Path Interconnect，QPI)协议、统一总线(universal bus，UB)协议。外部总线协议包括但不限于小型计算机系统专用接口(small computer system interface，SCSI)协议或者串行连接小型计算机系统专用接口(Serial Attached SCSI，SAS)协议。
需要说明的是，图1所示的计算设备100是以外存107为远端外存进行示例说明。如 图1所示，外存107包括网卡1072。该网卡1072例如可以是smart NIC网络接口卡(也即网络适配卡)。外存107通过该网卡1072接入网络，进而通过网络与计算设备101的其他部件连接。网络可以是有线通信网络，如光纤通信网络，也可以是无线通信网络，例如是无线局域网(wireless local area network，WLAN)或者是第五代(the fifth generation，5G)移动通信网络。
在一些可能的实现方式中，计算设备100的外存107也可以是本地外存，计算设备100的其他部件如处理器101可以通过总线108连接上述本地外存。在另一些可能的实现方式中，计算设备100可以既包括远端外存，又包括本地外存。此外，本申请实施例可以适用于集中式存储，或者分布式存储场景，本实施例对此不作限定。
在图1所示的计算设备100中，处理器101处理IO数据时是处理内存103中的数据。当待处理的数据不在内存103中时，还需要执行数据的换入换出操作，例如是将内存103中的一些数据写入外存107，并将待处理的数据从外存107读入内存103。由于计算设备100中内存103的容量通常是有限的，因此，处理器101在处理IO数据时，有较高概率执行数据的换入换出操作，如此影响了数据访问的效率。
有鉴于此，本申请实施例提供了一种数据访问方法。该方法可以由内存扩展卡执行。内存扩展卡可以将计算设备100的外存空间转换为内存空间，从而使得计算设备100如同访问内存103一样访问外存107。也即计算设备100的处理器101无需将外存107中的数据换入至内存103，即可访问外存107，相当于扩展了内存103的容量。
具体地，内存扩展卡接收计算设备100根据内部总线协议生成的第一数据访问请求，其中，内部总线协议包括用于访问计算设备100的内存空间的总线协议，第一数据访问请求包括内存空间中的虚拟地址，然后内存扩展卡将第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，该外部总线协议包括用于访问计算设备的外存空间的总线协议，第二数据访问请求包括外存空间中的物理地址，内存扩展卡根据该第二数据访问请求，访问外存空间。
在该方法中，内存扩展卡可以屏蔽总线协议的差异，向计算设备100提供内存空间，例如是由外存空间转换的内存空间，计算设备100无需将数据换入至计算设备100的内存103即可访问外存107，提高了计算设备100的数据访问效率。
进一步地，由于计算设备100可以将访问内存103一样访问外存107，因此，计算设备100有较大概率预取到需要的数据，计算设备100无需切换进程或线程，如此可以减少进程或线程切换产生的开销，提高运算效率。
为了使得本申请的技术方案更加清楚、易于理解，下面结合附图对本申请实施例的系统架构进行介绍。
参见图3所示的数据访问系统的架构示意图，数据访问系统300包括计算设备100和内存扩展卡200。内存扩展卡200分别与计算设备100的处理器101和外存107连接。其中，计算设备100可以是如图1所示的结构，也可以是其他结构，例如计算设备100可以是包括本地外存的结构。计算设备100采用图1所示的结构时，内存扩展卡200可以通过 总线108与计算设备100的处理器101等部件连接，并通过网络与计算设备100的外存107连接。
计算设备100可以根据内部总线协议生成第一数据访问请求，然后向内存扩展卡200发送该第一数据访问请求，内存扩展卡200可以将第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，接着内存扩展卡200根据第二数据访问请求，访问外存空间。如此计算设备100可以通过内存扩展卡200访问外存空间。
接下来，结合附图对内存扩展卡200的硬件结构进行介绍。
参见图4所示的内存扩展卡200的硬件结构图，内存扩展卡200包括总线201、处理器202、通信接口203和内存204。
与计算设备100的总线108类似，内存扩展卡200的总线201是内存扩展卡各种功能部件之间传送信息的公共通信干线。内存扩展卡200的总线201可以分为内部总线和外部总线。内部总线采用内部总线协议，外部总线采用外部总线协议。需要说明，计算设备100采用的内部总线协议与内存扩展卡200采用的内部总线协议可以是相同的，也可以是不同的。
处理器202主要用于协助计算设备100加速数据访问，因此，处理器202也可以称作协处理器或者是内核加速单元。其中，处理器202例如可以是数据处理单元(data processing unit，DPU)。
通信接口203可以包括用于与计算设备100的处理器101进行通信的接口，该接口可以用于接收计算设备100基于内部总线协议生成的第一数据访问请求，向计算设备100返回第一数据访问请求对应的访问结果。基于此，该接口也可以称作内部总线协议接入单元。
内存204用于为处理器202(内存扩展卡200本地的处理器)提供对应计算功能所需的缓存服务，以及向计算设备100的处理器101提供直接内存访问空间，从而扩展内存容量。其中，内存204可以采用双倍速率同步动态随机存储器(double data rate synchronous dynamic random access memory，DDR SDRAM，简称为DDR)或者是阿帕奇持久内存(Apache Pass，AEP)等等存储介质。
在一些可能的实现方式中，通信接口203还可以包括用于与非易失性存储介质(也称非易失性介质)通信的接口，该接口也称作非易失性介质接入单元。非易失性介质接入单元可以完成内部总线协议与外部总线协议的转换。例如，内部总线协议为PCI-E，外部总线协议为SAS，则可以完成PCI-E和SAS协议的转换，以实现访问非易失性存储介质。此外，非易失性介质接入单元还可以提供盘片接入功能，如内部总线协议和外部总线协议均为PCI-E，则需要提供对应的PCI-E IO扩展、时钟及带外管理功能等。当非易失性介质接入单元提供的物理资源无法满足介质盘片接入需求时，还可以通过介质扩展单元205扩展对应的资源，从而满足盘片接入需求。
其中，内存204还可以具备短期掉电备电能力。例如，内存204具备电池，因而可以在供电异常时，通过电池进行短期备电，如此可以将内存204中的数据转存至非易失性介质，进行数据保护。当供电恢复时，可以将该数据恢复至内存204。
在一些可能的实现方式中，通信接口203还可以包括网络(fabric)接口单元。具体地， 网络接口单元可以完成内部总线协议与外部传输协议的转换。其中，外部传输协议包括但不限于光纤通道(fibre channel，FC)、以太网(ethernet，ETH)、无限带宽(InfiniBand，IB)或者基于融合以太网的远程直接数据存取(RDMA over Converged Ethernet，RoCE)等。网络接口单元通过进行上述协议转换，可以实现跨节点(如跨计算设备)访问内存以及分布式存储或集中式存储的易失性介质、非易失性介质。
网络接口单元还可以基于跨节点的介质的属性，将介质上报为不同类型的设备以供处理器101访问。例如，跨节点的介质具有低延时、易失特性，则对处理器101提供易失性内存访问接口。又例如，跨节点的介质具有低延时、非易失特性，则对处理器101提供非易失性内存访问接口。还例如，跨节点的介质具有大容量、高延时特性，则对处理器101提供普通介质访问接口。
上述内存扩展卡200可以集成在计算设备100，也可以是通过热插拔方式插入计算设备100，以实现扩展内存容量。在另一些可能的实现方式中，内存扩展卡200通过网络接口单元外接的存储介质容量变化时，也可以导致内存容量变化。内存容量变化时，可以上报计算设备100，例如是上报计算设备100上运行的操作系统(operation system，OS)，由此实现内存语义接入，即将外接的存储介质提供的外存空间转换为内存空间，以使得计算设备100可以通过访问内存的形式进行访问。在一些可能的实现方式中，还可以拔出内存扩展卡200，进行内存语义删除。
为了便于理解，下面将结合附图，对内存扩展过程进行详细说明。
参见图5所示的内存扩展过程的流程图，具体包括如下步骤：
S502：集成有内存扩展卡200的数据访问系统300启动，然后执行S510。
S504：组件形态的内存扩展卡200热插入数据访问系统300，然后执行S510。
S506：数据访问系统300通过网络接口单元接入的介质的容量发生变化。
需要说明的是，S502至S506为内存扩展的几种实现方式，在实际应用时，可以选择其中一种或多种，本实施例对此不作限定。
S508：内存扩展卡200获取网络接口单元接入的介质的容量变化信息，然后执行S514。
S510：内存扩展卡200接入数据访问系统300的计算设备100。
S512：内存扩展卡200获取该内存扩展卡200的基本信息。
其中，内存扩展卡200的基本信息包括存储特性、访问特性等中的至少一种。其中，存储特性可以包括存储容量、易失或非易失。访问特性可以包括低延时或高延时。
S514：内存扩展卡200上报变化信息。当变化信息指示新加入的内存扩展卡200为低延时的易失性介质，或者网络接口单元接入的介质增加了低延时的易失性介质，则执行S516。当变化信息指示新加入的内存扩展卡200为低延时的非易失性介质，或者网络接口单元接入的介质增加了低延时的非易失性介质，则执行S522。当变化信息指示新加入的内存扩展卡200为高延时的非易失性介质，或者网络接口单元接入的介质增加了高延时的非易失性介质，则执行S530。
该变化信息例如可以是S508中网络接口单元接入的介质的容量变化信息，或者是S512中新加入的内存扩展卡200的基本信息。
S516：计算设备100调用操作系统中的函数，产生内存热插拔中断。
具体地，计算设备100可以调用Linux TM中的CONFIG_ARCH_MEMORY_PROBE函数，产生内存热插拔中断。
S518：计算设备100修改扩展的内存的虚拟地址。
其中，扩展的内存可以是新加入的内存扩展卡200提供的内存，或者是网络接口单元接入的介质变化所扩展的内存。计算设备100可以修改上述扩展的内存的起始地址和内存容量，从而修改扩展的内存的虚拟地址。
S520：计算设备100修改扩展的内存的类型，然后执行S521。
具体地，由于上报的变化信息指示新加入的内存扩展卡200为易失性介质，或者网络接口单元接入的介质新增有易失性介质，计算设备100可以修改扩展的内存的类型为RAM。
S521:计算设备100修改内存状态文件，以将扩展的内存修改为在线状态。
具体地，计算设备100可以修改Linux TM的“auto_online_blocks”文件，将扩展的内存修改为在线(online)状态。在另一些实施例中，上述扩展的内存被移除时，可以将扩展的内存修改为离线(offline)状态。
S522：计算设备100调用操作系统中的函数，产生内存热插拔中断。
S524：计算设备100修改扩展的内存的虚拟地址。
其中，S522、S524的具体实现可以参见S516、S518相关内容描述，在此不再赘述。
S526：计算设备100修改扩展的内存的类型，然后执行S528。
具体地，由于上报的变化信息指示新加入的内存扩展卡200为非易失性介质，或者网络接口单元接入的介质新增有非易失性介质，计算设备100可以修改扩展的内存的类型为NVRAM。
需要说明的是，OS也可以约定特殊描述符，以指示上述内存的类型等信息。
S528：计算设备100修改内存状态文件，以将扩展的内存修改为在线状态。
其中，计算设备100修改内存状态文件的具体实现可以参见S521，本实施例在此不再赘述。
S530：计算设备100进行普通介质接入流程。
其中，普通介质具体是指高延时的非易失性介质。其中，计算设备100进行普通介质接入流程具体是将高延时的非易失性介质作为外存，如此计算设备100可以向内存扩展卡200下发数据访问请求，通过内存扩展卡200实现无需换入数据至计算设备100的内存103，即可访问该外存中的数据。
图5对内存扩展卡200接入过程进行了详细说明，接下来对扩展内存后的数据访问方法进行详细说明。
参见图6所示的数据访问方法的流程图，该方法包括：
S602：计算设备100根据内部总线协议生成第一数据访问请求。
S604：计算设备100向内存扩展卡200发送第一数据访问请求。
计算设备100的处理器101可以根据内部总线协议发起第一数据访问请求。该第一数据访问请求可以用于请求新增数据、删除数据、查找数据或者修改数据。该第一数据访问 请求中可以包括访问地址，该访问地址例如可以是内存空间中的虚拟地址。
具体实现时，第一数据访问请求还包括命令(command，CMD)，该命令例如可以是读命令或写命令。其中，第一数据访问请求用于新增数据、修改数据时，第一数据访问请求还包括写命令。当第一数据访问请求包括写命令时，该第一数据访问请求还携带待写入的数据。
当第一数据访问请求所请求的数据在计算设备100的内存103中未命中时，计算设备100可以向内存扩展卡200发送第一数据访问请求，以便于通过该内存扩展卡100访问外存107中的数据。
S606：内存扩展卡200将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求。
具体地，内部总线协议包括PCI协议、PCI-E协议、QPI协议、UB协议中的任意一种或多种，外部总线协议包括SCSI协议、SAS协议中的一种或多种。内存扩展卡200可以将第一数据访问请求的数据包进行解包，得到命令、访问地址等内容，然后将上述内容按照外部总线协议规定的格式进行封装，从而实现对第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求。
需要说明的是，外部总线协议用于访问外存空间，基于此，第二数据访问请求中包括外存空间中的物理地址。该物理地址可以是内存扩展卡200对第一数据访问请求中内存空间中的虚拟地址进行转换得到。
其中，计算设备100通过处理器101生成的第一数据访问请求中的访问地址为虚拟地址。处理器101所看到的地址空间就是虚拟内存，访问虚拟内存的地址即为虚拟地址。与之对应的是物理地址。物理地址也称作实地址(real address)。该物理地址例如可以是计算设备100的外存107的地址。
在本申请实施例中，计算设备100中的处理器101可以对计算设备100的内存103、内存扩展卡200的存储介质(例如内存和持久化介质)和内存扩展卡200挂载的设备如外存107(例如硬盘等持久化介质)进行统一编址，形成虚拟地址空间，该虚拟地址空间为处理器101可以访问的内存空间。类似地，内存扩展卡200可以将该内存扩展卡200的存储介质(例如内存204和低延时非易失性介质)和内存扩展卡200挂载的外存107进行统一编址，形成虚拟地址空间，该虚拟地址空间为内存扩展卡200的处理器202可以访问的内存空间。
基于此，第一数据访问请求中的虚拟地址为对计算设备100可见的第一虚拟地址。内存扩展卡200可以将对计算设备100可见的第一虚拟地址转换为对内存扩展卡200可见的第二虚拟地址。内存扩展卡200维护有索引，该索引中包括虚拟地址和物理地址的映射关系，内存扩展卡200可以根据索引中的虚拟地址和物理地址的映射关系，将第二虚拟地址转换为外存空间中的物理地址。
S608：内存扩展卡200根据所述第二数据访问请求，访问所述外存空间。
具体地，内存扩展卡200可以根据第二数据访问请求中的物理地址，通过外部总线访问所述外存空间。其中，内存扩展卡200还可以获得访问结果，向计算设备100返回访问结果。当第一数据访问请求用于查找数据时，访问结果可以是查找到的数据，当第一数据 访问请求用于新增数据、删除数据或者修改数据时，该访问结果可以是新增成功通知、删除成功通知或者修改成功通知。
在一些可能的实现方式中，外存空间包括本地外存空间和远端外存空间中的至少一种。当外存空间包括远端外存空间时，内存扩展卡200可以根据所述第二数据访问请求，通过远程直接数据存取(remote direct memory access，RDMA)访问所述远端外存空间。具体地，内存扩展卡200的处理器202进行协议转换得到第二数据访问请求后，可以将该第二数据访问请求发送至网络接口单元，由网络接口单元完成远端外存访问。
当内存扩展卡200访问外存空间，导致索引发生变化时，例如内存扩展卡200向外存空间中新增数据、修改数据或者删除数据导致索引发生变化时，内存扩展卡200还可以更新索引。
内存扩展卡200向外存空间中新增数据或者修改数据，具体是向外存空间执行持久化数据的写操作。基于此，在写数据之前，或者写数据之后，内存扩展卡200可以对数据进行重删/压缩，以减少数据量。相应地，内存扩展卡200从外存空间中查询数据，可以是向外存空间执行读操作，内存扩展卡200可以在读数据之后，对数据进行重构/解压，以恢复数据。需要说明的是，内存扩展卡200可以根据实际业务需求，选择是否进行重删/压缩。例如，内存扩展卡200可以在业务繁忙时，选择不进行重删/压缩，业务空闲时，进行重删/压缩。
在一些可能的实现方式中，内存扩展卡200在写数据前，或者写数据后，对数据进行冗余计算，以保证数据可靠性与正确性。其中，对数据进行冗余计算包括通过独立磁盘冗余阵列(redundant array of independent disks，RAID)实现冗余计算，或者通过纠删码(erasure code，EC)实现冗余计算。
以EC实现冗余计算为例，内存扩展卡200可以按照实际业务需求，根据已经配置的数据冗余策略，完成数据的数据切片、冗余计算，然后将冗余后的多个数据块分发到不同的介质空间中。该介质空间包括通过网络接口单元提供的介质空间。也即内存扩展卡200可以将多个数据块分发到当前计算设备100以及其他计算设备100。其中，当前计算设备100和其他计算设备100均具备非易失性存储介质。
由于内存扩展卡200可以实现将外存空间转换为内存空间，使得计算设备100像访问内存103一样访问外存107，计算设备100可以采用同步IO访问方式，减少进程/线程的创建、切换、销毁次数，提升计算设备100中处理器101的运算效率。具体地，计算设备100可以维护有至少一个请求队列。请求队列的数量可以与计算设备100中处理器101的内核数量对应，例如可以等于内核数量。当请求队列包括多个数据访问请求对应的进程或线程时，其中，多个数据访问请求包括上述第一数据访问请求，所述计算设备100可以采用同步方式执行所述多个数据访问请求对应的进程或线程。
基于上述内容描述，本申请实施例提供了一种数据访问方法。在该方法中，内存扩展卡200可以屏蔽总线协议的差异，向计算设备100提供内存空间，例如是由外存空间转换的内存空间，计算设备100无需将数据换入至计算设备100的内存103即可通过内存扩展卡200访问外存107，由此提高了计算设备100的数据访问效率。并且，计算设备100有较大概率预取到需要的数据，无需切换进程或线程，如此可以减少进程或线程切换产生的 开销，降低进程或线程切换对计算资源的占用，提高运算效率。
图6所示实施例以请求访问的数据在计算设备100的外存107进行示例说明。在一些可能的实现方式中，内存扩展卡200可以先确定内存扩展卡200的内存204中是否包括请求访问的数据，若是，则内存扩展卡200可以访问该内存扩展卡200的内存204，若否，则内存扩展卡200再访问计算设备100的外存107。
当内存扩展卡200接入有非易失性存储介质(例如低延时非易失性存储介质)时，如果内存扩展卡200的内存204中不包括请求访问的数据，则内存扩展卡200还可以确定内存扩展卡200的非易失性存储介质中是否包括请求访问的数据，若是，则内存扩展卡200可以访问该非易失性存储介质，若否，则内存扩展卡200再访问计算设备100的外存107。
其中，内存扩展卡200在访问该内存扩展卡200的内存204或者内存扩展卡200的非易失性存储介质时，可以将第一数据访问请求进行协议转换，具体是将计算设备100的内部总线协议转换为内存扩展卡200的内部总线协议，以便于内存扩展卡200基于该转换后的内部总线协议，访问上述内存204或非易失性存储介质。其中，内存扩展卡200进行协议转换实现了语义转换，例如是将处理器101的内存语义转换为内存扩展卡200的数据执行语义，相应地，内存扩展卡200访问内存204或上述易失性存储介质后，可以将访问结果进行语义转换，例如是将访问结果的协议格式转换为计算设备100的内部总线协议，以便于计算设备100可以通过内部总线获得访问结果。
其中，内存扩展卡200的非易失性存储介质可以包括本地非易失性存储介质和远端非易失性存储介质中的一种或多种。当请求访问的数据在远端非易失性存储介质中时，内存扩展卡200还可以将协议转换后的数据操作请求发送至网络接口单元。由网络接口单元通过跨节点访问技术(如RDMA)，访问上述远端非易失性存储介质，并将访问结果进行语义转换，然后通过内部总线接入单元返回至计算设备100。
在访问内存扩展卡200的内存204、非易失性存储介质过程中，涉及内存扩展卡200(例如是raid卡)自身索引变更操作(如：写、增、删除、改等操作)，内存扩展卡200可以修改索引中的信息，以便下次查询使用。
上文结合图1至图6对本申请实施例提供的数据访问方法进行了详细介绍，下面将结合附图对本申请实施例提供的装置进行介绍。
参见图7所示的数据访问装置的结构示意图，该装置700包括：
通信模块702，用于接收计算设备根据内部总线协议生成的第一数据访问请求，其中，所述内部总线协议包括用于访问所述计算设备的内存空间的总线协议，所述第一数据访问请求中包括所述内存空间中的虚拟地址；
转换模块704，用于将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，其中，所述外部总线协议包括用于访问所述计算设备的外存空间的总线协议，所述第二数据访问请求中包括所述外存空间中的物理地址；
访问模块706，用于根据所述第二数据访问请求访问所述外存空间。
在一些可能的实现方式中，所述内存空间中的虚拟地址为对所述计算设备可见的第一 虚拟地址；所述转换模块704还用于：
将对所述计算设备可见的第一虚拟地址转换为对所述内存扩展卡可见的第二虚拟地址；
根据索引中的虚拟地址和物理地址的映射关系，将所述第二虚拟地址转换为所述外存空间中的物理地址。
在一些可能的实现方式中，所述外存空间包括本地外存空间和远端外存空间中的至少一种；
所述访问模块706具体用于：
当所述外存空间包括所述远端外存空间时，根据所述第二数据访问请求，通过远程直接数据存取RDMA访问所述远端外存空间。
在一些可能的实现方式中，所述内部总线协议包括外设部件互连标准PCI、高速外设部件互连标准PCI-E、快速通道互联QPI或统一总线UB中的任意一种，所述外部总线协议包括小型计算机系统专用接口SCSI或者串行连接小型计算机系统专用接口SAS中的任意一种。
根据本申请实施例的数据访问装置500可对应于执行本申请实施例中描述的方法，并且数据访问装置500的各个模块/单元的上述和其它操作和/或功能分别为了实现图6所示实施例中的各个方法的相应流程，为了简洁，在此不再赘述。
本申请实施例还提供了一种内存扩展卡200，该内存扩展卡200具体用于实现如图7所示的数据访问装置700的功能。内存扩展卡200的硬件结构可以参见图4相关内容描述，在此不再赘述。
本申请实施例还提供了一种计算机可读存储介质。所述计算机可读存储介质可以是内存扩展卡200能够存储的任何可用介质或者是包含一个或多个可用介质的数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘)等。该计算机可读存储介质包括指令，所述指令指示内存扩展卡200执行上述数据访问方法。
本申请实施例还提供了一种计算机程序产品。所述计算机程序产品包括一个或多个计算机指令。在内存扩展卡200上加载和执行所述计算机指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算设备或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算设备或数据中心进行传输。所述计算机程序产品可以为一个软件安装包，在需要使用前述数据访问方法的任一方法的情况下，可以下载该计算机程序产品并在内存扩展卡200上执行该计算机程序产品。
本申请实施例还提供了一种数据访问系统。参见图3所示的数据访问系统300的结构示意图，该系统300包括计算设备100和内存扩展卡200。所述计算设备100用于根据内部总线协议生成第一数据访问请求，所述内存扩展卡200用于接收所述计算设备100发送的第一数据访问请求，将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，根据所述第二数据访问请求访问所述外存空间。
上述各个附图对应的流程或结构的描述各有侧重，某个流程或结构中没有详述的部分，可以参见其他流程或结构的相关描述。

Claims (15)

  1. 一种数据访问方法，其特征在于，所述方法包括：
    内存扩展卡接收计算设备根据内部总线协议生成的第一数据访问请求，其中，所述内部总线协议包括用于访问所述计算设备的内存空间的总线协议，所述第一数据访问请求中包括所述内存空间中的虚拟地址；
    所述内存扩展卡将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，其中，所述外部总线协议包括用于访问所述计算设备的外存空间的总线协议，所述第二数据访问请求中包括所述外存空间中的物理地址；
    所述内存扩展卡根据所述第二数据访问请求，访问所述外存空间。
  2. 根据权利要求1所述的方法，其特征在于，所述内存空间中的虚拟地址为对所述计算设备可见的第一虚拟地址；所述方法还包括：
    所述内存扩展卡将对所述计算设备可见的第一虚拟地址转换为对所述内存扩展卡可见的第二虚拟地址；
    所述内存扩展卡根据索引中的虚拟地址和物理地址的映射关系，将所述第二虚拟地址转换为所述外存空间中的物理地址。
  3. 根据权利要求1或2所述的方法，其特征在于，所述外存空间包括本地外存空间和远端外存空间中的至少一种；
    当所述外存空间包括所述远端外存空间时，所述内存扩展卡根据所述第二数据访问请求，访问所述外存空间，包括：
    所述内存扩展卡根据所述第二数据访问请求，通过远程直接数据存取RDMA访问所述远端外存空间。
  4. 根据权利要求1至3任一项所述的方法，其特征在于，所述内部总线协议包括外设部件互连标准PCI、高速外设部件互连标准PCI-E、快速通道互联QPI或统一总线UB中的任意一种，所述外部总线协议包括小型计算机系统专用接口SCSI或者串行连接小型计算机系统专用接口SAS中的任意一种。
  5. 根据权利要求1至4任一项所述的方法，其特征在于，所述计算设备维护有至少一个请求队列，所述请求队列包括多个数据访问请求对应的进程或线程时，所述计算设备采用同步方式执行所述多个数据访问请求对应的进程或线程，其中，所述多个数据访问请求包括所述第一数据访问请求。
  6. 根据权利要求1至5任一项所述的方法，其特征在于，所述内存扩展卡集成在所述计算设备或者通过热插拔插入所述计算设备。
  7. 根据权利要求1至6任一项所述的方法，其特征在于，所述内存扩展卡包括独立磁盘冗余阵列。
  8. 一种数据访问装置，其特征在于，所述装置包括：
    通信模块，用于接收计算设备根据内部总线协议生成的第一数据访问请求，其中，所述内部总线协议包括用于访问所述计算设备的内存空间的总线协议，所述第一数据访问请求中包括所述内存空间中的虚拟地址；
    转换模块，用于将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第 二数据访问请求，其中，所述外部总线协议包括用于访问所述计算设备的外存空间的总线协议，所述第二数据访问请求中包括所述外存空间中的物理地址；
    访问模块，用于根据所述第二数据访问请求，访问所述外存空间。
  9. 根据权利要求8所述的装置，其特征在于，所述内存空间中的虚拟地址为对所述计算设备可见的第一虚拟地址；所述转换模块还用于：
    将对所述计算设备可见的第一虚拟地址转换为对所述内存扩展卡可见的第二虚拟地址；
    根据索引中的虚拟地址和物理地址的映射关系，将所述第二虚拟地址转换为所述外存空间中的物理地址。
  10. 根据权利要求8或9所述的装置，其特征在于，所述外存空间包括本地外存空间和远端外存空间中的至少一种；
    所述访问模块具体用于：
    当所述外存空间包括所述远端外存空间时，根据所述第二数据访问请求，通过远程直接数据存取RDMA访问所述远端外存空间。
  11. 根据权利要求8至10任一项所述的装置，其特征在于，所述内部总线协议包括外设部件互连标准PCI、高速外设部件互连标准PCI-E、快速通道互联QPI或统一总线UB中的任意一种，所述外部总线协议包括小型计算机系统专用接口SCSI或者串行连接小型计算机系统专用接口SAS中的任意一种。
  12. 一种内存扩展卡，其特征在于，包括处理器和存储器，所述存储器存储有计算机可读指令，所述处理器执行所述计算机可读指令，使得所述内存扩展卡执行如权利要求1至7任一项所述的方法。
  13. 一种计算机可读存储介质，其特征在于，包括计算机可读指令，当所述计算机可读指令在内存扩展卡上运行时，使得所述内存扩展卡执行如权利要求1至7任一项所述的方法。
  14. 一种计算机程序产品，其特征在于，包括计算机可读指令，当所述计算机可读指令在内存扩展卡上运行时，使得所述内存扩展卡执行如权利要求1至7任一项所述的方法。
  15. 一种数据访问系统，其特征在于，包括计算设备和内存扩展卡；
    所述计算设备，用于根据内部总线协议生成第一数据访问请求，其中，所述内部总线协议包括用于访问所述计算设备的内存空间的总线协议，所述第一数据访问请求中包括所述内存空间中的虚拟地址；
    所述内存扩展卡，用于接收所述计算设备发送的第一数据访问请求，将所述第一数据访问请求进行协议转换，获得外部总线协议格式的第二数据访问请求，根据所述第二数据访问请求访问所述计算设备的外存空间，其中，所述外部总线协议包括用于访问所述计算设备的外存空间的总线协议，所述第二数据访问请求中包括所述外存空间中的物理地址。
PCT/CN2022/092643 2021-07-23 2022-05-13 数据访问方法以及相关设备 WO2023000784A1 (zh)

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