WO2022267031A1 - 一种rs码译码方法及装置 - Google Patents

一种rs码译码方法及装置 Download PDF

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Publication number
WO2022267031A1
WO2022267031A1 PCT/CN2021/102464 CN2021102464W WO2022267031A1 WO 2022267031 A1 WO2022267031 A1 WO 2022267031A1 CN 2021102464 W CN2021102464 W CN 2021102464W WO 2022267031 A1 WO2022267031 A1 WO 2022267031A1
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error
codeword
polynomial
minimum length
key equation
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PCT/CN2021/102464
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English (en)
French (fr)
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唐念歧
韩永祥
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华为技术有限公司
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Priority to CN202180098816.0A priority Critical patent/CN117413474A/zh
Priority to PCT/CN2021/102464 priority patent/WO2022267031A1/zh
Publication of WO2022267031A1 publication Critical patent/WO2022267031A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received

Definitions

  • the present application relates to the field of communication technologies, and in particular to a RS code decoding method and device.
  • RS Random-Solomon, Reed-Solomon
  • the error correction principle of the RS code is to transmit a certain amount of verification information while transmitting data. When a small amount of error occurs in the transmission, the original information can be restored through these verification information.
  • the sending end encodes the information to be sent to obtain a codeword, which is modulated and then transmitted in the channel, which may be interfered during the transmission process, resulting in errors in some symbols.
  • some errors are correctable errors, and the receiving end can recover by checking information, while some errors are uncorrectable errors.
  • an uncorrectable error occurs, if the receiving end decodes the uncorrectable error, it will reduce system performance and introduce more errors, resulting in a higher bit error rate and affecting system stability.
  • the present application provides an RS code decoding method and device for detecting uncorrectable errors, thereby improving system performance and reliability.
  • a RS code decoding method including: determining a syndrome according to a codeword to be decoded, the codeword being a codeword of RS encoding; determining an error position polynomial and satisfying a key equation according to the syndrome If the minimum length satisfying the key equation is greater than the maximum error correction capability of the RS code, an uncorrectable error is detected and decoding of the codeword is abandoned; otherwise, an error is determined according to the error location polynomial position; if the quantity of determined error positions is not equal to the minimum length satisfying the key equation, an uncorrectable error is detected, and decoding of the codeword is abandoned; otherwise, the code word is decoded according to the error position Error correction is performed on the code word to obtain the decoding result of the code word.
  • the error location polynomial and the minimum length satisfying the key equation are determined by solving the key equation.
  • the key equation is:
  • deg( ⁇ (x)) represents the order of the error value polynomial ⁇ (x)
  • deg( ⁇ (x)) represents the order of the error position polynomial ⁇ (x)
  • t is the maximum error correction capability of the RS code.
  • the foregoing implementation manner can detect uncorrectable errors, thereby improving system reliability.
  • the above implementation does not need to calculate the syndrome multiple times, so the complexity and resource overhead can be reduced, thereby improving the system performance.
  • the BM algorithm or its derivative algorithm can be used to determine the error location polynomial and the minimum length satisfying the key equation.
  • the method further includes: determining an error value polynomial according to the error position polynomial.
  • the method further includes: outputting an alarm indication for indicating the detection of the uncorrectable error.
  • the method further includes: if all syndromes are equal to 0, using the information symbols in the codeword as the The decoding result of the codeword; wherein, the codeword includes at least one information symbol and at least one check symbol.
  • an RS decoder comprising: a syndrome determining unit, configured to determine a syndrome according to a codeword to be decoded, the codeword being an RS encoded codeword; an error location polynomial determining unit, using Determine the error position polynomial and the minimum length satisfying the key equation according to the accompanying formula; the error position determination unit is used to determine whether the minimum length satisfying the key equation is greater than the maximum error correction capability of the RS code, and if so, it is detected that the error cannot Correct the error, and give up decoding the codeword; otherwise determine the error position according to the error position polynomial; the error correction unit is used to judge whether the number of determined error positions is equal to the minimum length satisfying the key equation, If not, an uncorrectable error is detected, and decoding of the codeword is abandoned; otherwise, error correction is performed on the codeword according to the error position to obtain a decoding result of the codeword.
  • an RS decoder including: one or more processors; one or more memories; wherein, one or more computer programs are stored in the one or more memories, and the one or more A computer program includes instructions, which, when executed by the one or more processors, cause the RS decoder to perform the method according to any one of the above first aspects.
  • a chip in a fourth aspect, includes: one or more processors; one or more memories; wherein, one or more computer programs are stored in the one or more memories, and the one or more A computer program includes instructions that, when executed by the one or more processors, cause the chip to perform the method as described in any one of the above first aspects.
  • a computer program product is provided.
  • the computer program product When the computer program product is invoked by a computer, the computer executes the method described in any one of the above first aspects.
  • Fig. 1 is the vector space schematic diagram of RS code receiver
  • Fig. 2 is a schematic diagram of a traditional RS code decoding process
  • Fig. 3 is a schematic flow chart of RS code decoding provided by the embodiment of the present application.
  • Fig. 4 is a schematic diagram of the implementation process of the BM algorithm in the embodiment of the present application.
  • FIG. 5 is a schematic diagram of an RS decoding process provided by an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of an RS decoder provided by an embodiment of the present application.
  • the RS code is briefly introduced below.
  • RS codes are an important subclass of non-binary BCH codes, and a class of maximum-distance blockable codes.
  • the basic principle of the RS code is: for a given polynomial (called the generator polynomial g(x)), the code word polynomial calculated for each information segment is a multiple of g(x), that is, the code word
  • the coded data is a vector (D 1 , D 2 ,..., D k , C 1 , C 2 ,..., C e ), the coded vector (D 1 , D 2 ,..., D k , C 1 , C 2 ,..., C e ) is called a codeword.
  • D i (1 ⁇ i ⁇ k) is called an information symbol
  • C i (1 ⁇ i ⁇ e) is called a check symbol
  • an information symbol and a check symbol are respectively m-bit data .
  • the RS code is modulated and transmitted in the channel, and the vector received by the receiving end is expressed as:
  • e(x) is an error pattern.
  • ⁇ t the number of erroneous symbols ⁇ t occurs (that is, the weight of e(x) is less than or equal to t)
  • c(x) the codeword c(x)
  • the Hamming distance of r(x) is ⁇ .
  • the possible errors of the channel can also be understood through the Hamming sphere.
  • the Hamming sphere is defined as all vectors whose Hamming distance is less than or equal to t, then the vector space at the receiving end can be represented by Figure 1.
  • d min is the minimum distance of the code, and satisfies
  • the vector space at the receiving end consists of multiple disjoint Hamming spheres (Hamming spheres) and other vectors other than the Hamming spheres (as shown by the black dots in the figure), where the center of the Hamming sphere is the codeword (in the figure indicated by black squares).
  • the sending end encodes the information to be sent to obtain a codeword, which is modulated and then transmitted in the channel, which may be interfered during the transmission process, resulting in errors in some symbols.
  • a codeword which is modulated and then transmitted in the channel, which may be interfered during the transmission process, resulting in errors in some symbols.
  • the received vector is an element in a certain Hamming sphere, this kind of error is called a correctable error, and the decoder translates it into a codeword at the center of the Hamming sphere.
  • the receiving vector may not be in any Hamming sphere, and this error is called an uncorrectable error.
  • FIG. 2 exemplarily shows a traditional RS decoding process. As shown in the figure, the process may include:
  • the error position polynomial ⁇ (x) and the error value polynomial ⁇ (x) can be calculated by the key equation solving algorithm.
  • the key equation of the RS code is:
  • deg( ⁇ (x)) represents the order of the error value polynomial ⁇ (x)
  • deg( ⁇ (x)) represents the order of the error position polynomial ⁇ (x).
  • BM Binarylekamp-Massey
  • Euclidean algorithm Euclidean algorithm
  • BM Binarylekamp-Massey
  • RiBM Reformulation of inversionless BM
  • RiBM can improve the critical path of the BM algorithm and reduce hardware resources, which makes the RS decoding method based on BM or its derivative algorithm become the current hardware achieved mainstream.
  • the root of the error position polynomial ⁇ (x) can be solved by Chien search, and the reciprocal of the root of the error position polynomial ⁇ (x) is the error position.
  • One way is to compare the number of roots of the error location polynomial ⁇ (x) with the order deg( ⁇ (x)) of the polynomial after completing the money search, and if they are not equal, an uncorrectable error is detected . With this method, some uncorrectable errors cannot be detected.
  • Another method is: after the error correction is completed, the syndrome S(x) is calculated again with the corrected codeword. If the calculated syndrome is not equal to 0, it indicates that an uncorrectable error has been detected. This method needs to calculate the adjoint twice, which increases the computational complexity and resource overhead.
  • an embodiment of the present application provides an RS code decoding method.
  • the RS code decoding method provided by the embodiment of the present application can detect uncorrectable errors, and compared with the above-mentioned traditional error correction method, can use lower cost and can detect uncorrectable errors more comprehensively.
  • FIG. 3 it is the RS code decoding process provided by the embodiment of the present application.
  • This flow can be realized by RS code decoder, and this RS decoder can be realized by hardware, such as can be realized by integrated circuits such as field programmable gate array (field programmable gate Array, FPGA), also can be realized by software, or by the combination of software and hardware realized in a combined manner.
  • This process can also be implemented by a communication device or an electronic device with an RS decoding function.
  • the communication device may be a world interoperability for microwave access (WiMAX) access network device or a WiMAX terminal, capable of decoding received RS coded signals; for another example,
  • the electronic device may be a modem (such as a set-top box) capable of demodulating RS-encoded digital television signals, or the electronic device may be a DVD player capable of reading RS-encoded DVD data and decoding the read data. device.
  • WiMAX world interoperability for microwave access
  • WiMAX terminal capable of decoding received RS coded signals
  • the electronic device may be a modem (such as a set-top box) capable of demodulating RS-encoded digital television signals, or the electronic device may be a DVD player capable of reading RS-encoded DVD data and decoding the read data. device.
  • the process may include the following steps:
  • S301 Determine a syndrome according to a codeword to be decoded, where the codeword to be decoded is an RS encoded codeword.
  • the codeword of the RS code may be acquired or received first.
  • a WiMAX terminal receives an RS-encoded signal
  • a set-top box receives an RS-encoded digital TV signal
  • a DVD player reads a DVD disk to obtain an RS-encoded signal. data.
  • n represents the length of the codeword (that is, the total number of information symbols and check symbols included in a codeword)
  • k is the length of the information segment (that is, the number of information symbols in a codeword)
  • t is the maximum error correction capability.
  • the vector received by the receiving end is expressed as:
  • At least one syndrome is not equal to 0, it indicates that there is an error in the codeword to be decoded, and the subsequent error correction process is performed; if all syndromes are equal to 0, it indicates that the codeword to be decoded does not need to be decoded code, the information symbols in the codeword can be directly output as the decoding result.
  • S302 Determine the error location polynomial and the minimum length satisfying the key equation according to the syndrome.
  • the error position polynomial and the minimum length satisfying the key equation can be calculated by a key equation solving algorithm.
  • BM algorithm and RiBM algorithm can be used to solve key equations to obtain the error position polynomial and the minimum length satisfying the key equation.
  • 2t iterations can be performed according to the adjoint formula to obtain the error location polynomial ⁇ (x) and the minimum length L satisfying the key equation.
  • the BM algorithm finds L and the error position polynomial ⁇ (x) iteratively, so that the order deg( ⁇ (x)) ⁇ L of the error position polynomial ⁇ (x).
  • the BM algorithm keeps the error position polynomial ⁇ (x), auxiliary update polynomial B(x), auxiliary variable ⁇ and L ⁇ , L B , and uses B(x), ⁇ and L ⁇ , L B to update ⁇ (x) until the key equation.
  • the BM algorithm makes:
  • d is the i-th item coefficient of S(x) ⁇ (x). If d ⁇ 0 and L ⁇ ⁇ L B , let:
  • Fig. 4 shows the implementation process of the BM algorithm. As shown in Figure 4, the process may include the following steps:
  • S402 to S411 are iterative processes, specifically including:
  • S411 judge whether to complete 2t iterations, that is, whether the iteration number i reaches 2t, if so, then transfer to S412, otherwise return to S402 to execute the next iteration;
  • S303 Compare the minimum length that satisfies the key equation with the maximum error correction capability of the RS code, if the minimum length that satisfies the key equation is greater than the maximum error correction capability, an uncorrectable error is detected, the decoding operation of the current codeword is abandoned, and the decoding operation ends The decoding process of the codeword, otherwise go to S304.
  • an alarm indication may also be output to indicate that an uncorrectable error has been detected.
  • S304 Determine the error location according to the error location polynomial, and count the number of error locations.
  • the root of the error position polynomial ⁇ (x) can be solved by Chien serach, and the number of roots of the error position polynomial ⁇ (x) can be counted, wherein the root of the error position polynomial ⁇ (x) indicates wrong location.
  • the number of roots of the error position polynomial ⁇ (x) can be expressed as:
  • S305 Compare the number of error positions with the minimum length satisfying the key equation. If the number of error positions is not equal to the minimum length satisfying the key equation, an uncorrectable error is detected, and the decoding operation of the current codeword is abandoned, and the code word is terminated. The decoding process of the code word, otherwise transfer to S306.
  • an alarm indication may also be output to indicate that an uncorrectable error has been detected.
  • Forney's algorithm can be used to determine error values at error locations.
  • the determined error position can be substituted into the definition of the adjoint formula to obtain an equation system, and the error values of all error positions can be obtained by solving the equation system.
  • ⁇ (x) (1+ ⁇ -j1 x)(1+ ⁇ -j2 x)...(1+ ⁇ -jl x)
  • the coefficients of the error polynomial that is, the error values corresponding to each error position, can be solved by the above formula.
  • S307 Perform error correction on the codeword to be decoded according to the error position and the error value corresponding to the corresponding error position, to obtain a decoding result.
  • the error value can be added to the corresponding error position to complete error correction.
  • the embodiment of the present application there is no need to calculate the syndrome multiple times, so compared with the traditional RS code decoding method, the embodiment of the present application can reduce complexity and resource overhead, thereby improving system performance.
  • the error value polynomial can also be calculated, and when determining the error position, the error position can be determined according to the error value polynomial and the error position polynomial, for example, the Forney algorithm can be used to utilize the error position polynomial and the error position polynomial
  • the error value polynomial calculates the error value corresponding to each error location.
  • the embodiment of the present application may use the following methods to calculate the error value polynomial:
  • the RS decoding process will be described below by taking the RiBM algorithm as an example with reference to FIG. 5 .
  • the process may include:
  • S501 Calculate the syndrome S(x) according to the codeword r(x) to be decoded.
  • S503 Output the information symbol of the codeword as a decoding result, and complete the decoding of the codeword.
  • t represents the maximum error correction capability of RS coding.
  • S506 Carry out a search on the error location polynomial ⁇ (x), obtain the roots of the error location polynomial ⁇ (x), and count the number of roots of the error location polynomial ⁇ (x) within the codeword range.
  • the root of the error location polynomial ⁇ (x) can indicate the error location.
  • S509 Perform error correction on the codeword according to the error location and error value, obtain and output a decoding result.
  • the embodiment of the present application also provides an RS decoder.
  • the RS decoder may include: a syndrome determination unit 601 , an error location polynomial determination unit 602 , an error location determination unit 603 , and an error correction unit 604 .
  • Syndrome determination unit 601 configured to determine a syndrome according to a codeword to be decoded, the codeword being an RS coded codeword;
  • An error location polynomial determination unit 602 configured to determine the error location polynomial and the minimum length that satisfies the key equation according to the adjoint formula;
  • Error location determination unit 603 used to determine whether the minimum length satisfying the key equation is greater than the maximum error correction capability of the RS code, if so, an uncorrectable error is detected, and decoding of the codeword is abandoned; otherwise, it is determined according to the error location polynomial error location;
  • Error correction unit 604 is used for judging whether the quantity of the determined error position is equal to the minimum length that satisfies the key equation, if not equal, then detects the uncorrectable error, and gives up decoding the codeword; otherwise according to the error position Error correction is performed on the codeword to obtain a decoding result of the codeword.
  • the error location polynomial determination unit 602 is specifically configured to: perform 2t iterations according to the adjoint formula to obtain the error location polynomial and the minimum length satisfying the key equation, where t is the maximum error correction capability of the RS code, where, In the ith iteration, 1 ⁇ i ⁇ 2t:
  • the error position polynomial determining unit 602 also obtains the error value polynomial during the process of performing 2t iterations according to the syndrome.
  • the error correction unit 604 may calculate the error value corresponding to each error position according to the error position polynomial and the error value polynomial.
  • the error location polynomial determining unit 602 determines the error location polynomial according to the adjoint formula, it also determines the error value polynomial according to the error location polynomial.
  • the error correction unit 604 may calculate the error value corresponding to each error position according to the error position polynomial and the error value polynomial.
  • the error location determination unit 603 and/or the error correction unit 604 detects an uncorrectable error, it also outputs an alarm indication for indicating that an uncorrectable error is detected.
  • the syndrome determining unit 601 determines the syndrome according to the codeword to be decoded, if it is judged that all syndromes are equal to 0, then it is determined that the codeword does not need to be decoded, and the information symbol in the codeword is used as the The decoding result of the codeword.
  • the error position polynomial determination unit 602 can be a BM algorithm unit or a RiBM algorithm unit, for performing a correlation algorithm; the error position determination unit 603 can be a money search unit, for determining the error position by performing a money search method;
  • the error unit may be a Forney algorithm unit for calculating error values by executing Forney algorithm.
  • the embodiment of the present application further provides an RS decoder, which can implement the method flow provided in the embodiment of the present application.
  • the RS decoder may include at least one processor, and the at least one processor is configured to be coupled with a memory, and read and execute instructions in the memory to implement the steps of the method provided by the embodiment of the present application.
  • the RS decoder may further include a communication interface, configured to support the RS decoder to receive or send signaling or data.
  • the communication interface in the RS decoder can be used to realize the interaction with other electronic devices.
  • the processor may be used to implement the decoder to execute the steps in the method shown in any one of the schematic diagrams in FIG. 3 , FIG. 4 , or FIG. 5 .
  • the RS decoder may also include a memory, in which computer programs and instructions are stored, and the memory may be coupled with the processor and/or a communication interface to support the processor to call the computer programs and instructions in the memory to implement the present invention.
  • the memory can also be used to store the data involved in the method embodiment of the application, for example, to store the data and instructions necessary to support the interaction of the communication interface, and/or for The configuration information necessary for the electronic device to execute the method described in the embodiment of the present application is stored.
  • the embodiment of the present application also provides a computer-readable storage medium on which some instructions are stored. When these instructions are called and executed by the computer, the computer can complete the above-mentioned method embodiment and method implementation. methods involved in any one possible design of the example.
  • the computer-readable storage medium is not limited, for example, it may be RAM (random-access memory, random access memory), ROM (read-only memory, read-only memory), etc.
  • the present application also provides a computer program product, which can complete the method involved in the method embodiment and any possible design of the above method embodiment when the computer program product is invoked and executed by a computer.
  • the present application also provides a chip, which may include a processor and an interface circuit, for completing the above method embodiment and any possible implementation of the method embodiment.
  • a chip which may include a processor and an interface circuit, for completing the above method embodiment and any possible implementation of the method embodiment.
  • “coupled” means that two parts are joined to each other directly or indirectly, this joint may be fixed or movable, and this joint may allow flowing fluids, electricity, electrical signals or other types of signals between the two communication between components.
  • the processor in the embodiments of the present application can be a central processing unit (Central Processing Unit, CPU), and can also be other general-purpose processors, digital signal processors (Digital Signal Processor, DSP), application-specific integrated circuits (Application Specific Integrated Circuit, ASIC), Field Programmable Gate Array (Field Programmable Gate Array, FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof.
  • a general-purpose processor can be a microprocessor, or any conventional processor.
  • the method steps in the embodiments of the present application may be implemented by means of hardware, or may be implemented by means of a processor executing software instructions.
  • Software instructions can be composed of corresponding software modules, and software modules can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only Memory, registers, hard disk, removable hard disk, CD-ROM or any other form of storage medium known in the art.
  • An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium.
  • the storage medium may also be a component of the processor.
  • the processor and storage medium can be located in the ASIC.
  • the ASIC can be located in the base station or the terminal.
  • the processor and the storage medium may also exist in the base station or the terminal as discrete components.
  • all or part of them may be implemented by software, hardware, firmware or any combination thereof.
  • software When implemented using software, it may be implemented in whole or in part in the form of a computer program product.
  • the computer program product comprises one or more computer programs or instructions. When the computer program or instructions are loaded and executed on the computer, the processes or functions described in the embodiments of the present application are executed in whole or in part.
  • the computer may be a general purpose computer, a special purpose computer, a computer network, a base station, user equipment or other programmable devices.
  • the computer program or instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program or instructions may be downloaded from a website, computer, A server or data center transmits to another website site, computer, server or data center by wired or wireless means.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or a data center integrating one or more available media.
  • the available medium may be a magnetic medium, such as a floppy disk, a hard disk, or a magnetic tape; it may also be an optical medium, such as a digital video disk; and it may also be a semiconductor medium, such as a solid state disk.
  • the computer readable storage medium may be a volatile or a nonvolatile storage medium, or may include both volatile and nonvolatile types of storage media.
  • “at least one” means one or more, and “multiple” means two or more.
  • “And/or” describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural.
  • the character “/” generally indicates that the contextual objects are an “or” relationship; in the formulas of this application, the character “/” indicates that the contextual objects are a "division” Relationship.

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Abstract

提供了一种RS码译码方法及装置。本申请中，根据待译码的码字确定伴随式，码字为RS编码的码字（S301）；根据伴随式确定错误位置多项式以及满足关键方程的最小长度（S302）；若满足关键方程的最小长度大于RS编码的最大纠错能力（S303），则检测到不可纠正错误，并放弃对码字进行译码，否则，根据错误位置多项式确定错误位置；若确定出的错误位置的数量不等于满足关键方程的最小长度（S305），则检测到不可纠正错误，并放弃对码字进行译码，否则，根据错误位置对码字进行纠错，得到码字的译码结果（S307）。采用本申请可检测不可纠正错误，进而提高系统性能和可靠性。

Description

一种RS码译码方法及装置 技术领域
本申请涉及通信技术领域，尤其涉及一种RS码译码方法及装置。
背景技术
RS(Reed-Solomon，里德-所罗门)码是一类常用的纠错码，具有良好的纠错和抵抗突发错误的能力，被广泛应用在多种通信场景及标准，如IEEE 802.3bj、ITU G.975等。RS码的纠错原理是在传输数据的同时，传输一定量的校验信息，当传输出现少量错误时，可以通过这些校验信息恢复出原信息。
通信时，发送端将需要发送的信息经过编码得到码字，该码字经过调制后在信道中传输，在传输过程中可能受到干扰，从而导致一些符号发生错误。其中，有些错误属于可纠正错误，接收端可以通过校验信息进行恢复，而有些错误属于不可纠正错误。当出现不可纠正错误时，接收端如果对不可纠正错误进行译码，则会降低系统性能，引入更多错误，导致较高的误码率，影响系统稳定性。
由此可见，在对RS码进行译码时，如何检测不可纠正错误，对提升通信系统性能和稳定性具有现实意义。
发明内容
本申请提供了一种RS码译码方法及装置，用以检测不可纠正错误，进而提高系统性能和可靠性。
第一方面，提供一种RS码译码方法，包括：根据待译码的码字确定伴随式，所述码字为RS编码的码字；根据所述伴随式确定错误位置多项式以及满足关键方程的最小长度；若所述满足关键方程的最小长度大于RS编码的最大纠错能力，则检测到不可纠正错误，并放弃对所述码字进行译码，否则，根据所述错误位置多项式确定错误位置；若确定出的错误位置的数量不等于所述满足关键方程的最小长度，则检测到不可纠正错误，并放弃对所述码字进行译码，否则，根据所述错误位置对所述码字进行纠错，得到所述码字的译码结果。
可选的，根据所述伴随式，通过解关键方程来确定错误位置多项式以及满足关键方程的最小长度。可选的，所述关键方程为：
S(x)Λ(x)＝Ω(x)(mod x 2t),deg(Ω(x))<deg(Λ(x))≤t
其中，deg(Ω(x))表示错误值多项式Ω(x)的阶数，deg(Λ(x))表示错误位置多项式Λ(x)的阶数，t为RS编码的最大纠错能力。
上述实现方式，可以检测不可纠正错误，从而提高系统可靠性。另一方面，相较于传统RS码译码方法中多次计算伴随式相比，上述实现方式无需多次计算伴随式，因此可以降低复杂度以及资源开销，从而可以提高系统性能。
在一种可能的实现方式中，所述根据所述伴随式确定错误位置多项式以及满足关键方程的最小长度，包括：根据所述伴随式，进行2t次迭代，得到所述错误位置多项式以及所述满足关键方程的最小长度，t为RS编码的最大纠错能力，其中，在第i次迭代中，1≤i ≤2t：若所述伴随式和当前错误位置多项式的第i次项系数不等于零且所述满足关键方程的最小长度的当前值小于辅助变量的当前值，则保存所述满足关键方程的最小程度的当前值，按照公式L Λ＝L B+1，对所述满足关键方程的最小长度进行更新，并将所述辅助变量的值更新为所保存的满足关键方程的最小长度，其中，L Λ第i次迭代后所述满足关键方程的最小长度，L B为辅助变量；否则，保持所述满足关键方程的最小长度不变，将所述辅助变量的值递增。
可选的，可采用BM算法或其衍生算法来确定错误位置多项式以及满足关键方程的最小长度。
进一步的，在根据所述伴随式，进行2t次迭代的过程中，还得到错误值多项式。
在一种可能的实现方式中，所述根据所述伴随式确定错误位置多项式之后，还包括：根据所述错误位置多项式确定错误值多项式。
在一种可能的实现方式中，所述检测到不可纠正错误之后，所述方法还包括：输出用于指示检测到不可纠正错误的告警指示。
在一种可能的实现方式中，所述根据待译码的码字确定伴随式后，所述方法还包括：若所有伴随式均等于0，则将所述码字中的信息码元作为所述码字的译码结果；其中，所述码字中包括至少一个信息码元以及至少一个校验码元。
第二方面，提供一种RS译码器，包括：伴随式确定单元，用于根据待译码的码字确定伴随式，所述码字为RS编码的码字；错误位置多项式确定单元，用于根据所述伴随式确定错误位置多项式以及满足关键方程的最小长度；错误位置确定单元，用于确定所述满足关键方程的最小长度是否大于RS编码的最大纠错能力，若是，则检测到不可纠正错误，并放弃对所述码字进行译码；否则根据所述错误位置多项式确定错误位置；纠错单元，用于判断确定出的错误位置的数量是否等于所述满足关键方程的最小长度，若不等于，则检测到不可纠正错误，并放弃对所述码字进行译码；否则根据所述错误位置对所述码字进行纠错，得到所述码字的译码结果。
第三方面，提供一种RS译码器，包括：一个或多个处理器；一个或多个存储器；其中，所述一个或多个存储器存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令，当所述指令被所述一个或多个处理器执行时，使得所述RS译码器执行如上述第一方面任一项所述的方法。
第四方面，提供一种芯片，所述芯片包括：一个或多个处理器；一个或多个存储器；其中，所述一个或多个存储器存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令，当所述指令被所述一个或多个处理器执行时，使得所述芯片执行如上述第一方面任一项所述的方法。
第五方面，提供一种计算机程序产品，所述计算机程序产品在被计算机调用时，使得所述计算机执行如上述第一方面任一项所述的方法。
附图说明
图1为RS码接收端的向量空间示意图；
图2为传统的RS码译码流程示意图；
图3为本申请实施例提供的RS码译码的流程示意图；
图4为本申请实施例中BM算法的实现过程示意图；
图5为本申请实施例提供的一种RS译码流程示意图；
图6为本申请实施例提供的RS译码器的结构示意图。
具体实施方式
下面首先对RS码进行简单介绍。
RS码是非二进制BCH码的一个重要子类，是一类最大距离可分组码。RS码的基本原理为：对于给定的一个多项式(称为生成多项式g(x))，使得对每个信息段计算得到的码字多项式都是g(x)的倍式，即，使得码字多项式除以生成多项式g(x)所得到的余式为0，这样，如果接收到的码字多项式除以生成多项式g(x)所得到的余式不是0，则可以知道该码字存在错误，并且通过进一步计算可以纠正最多t＝(n-k)/2个错误，t称为最大纠错能力。
举例来说，将待编码的数据视为向量D＝(D 1，D 2，…，D k)，则编码后的数据为向量(D 1，D 2，…，D k，C 1，C 2，…，C e)，编码后的向量(D 1，D 2，…，D k，C 1，C 2，…，C e)被称为一个码字。其中，D i(1≤i≤k)称为一个信息码元，C i(1≤i≤e)称为一个校验码元，一个信息码元和一个校验码元分别为m比特数据。
RS码的主要参数包括(m，n，k)，其中，m表示码元符号，取自有限域GF(2 M)，n表示码字的长度(也即一个码字包含的信息码元和校验码元的总数量)，k为信息段的长度(也即一个码字中信息码元的数量)，奇偶校验位长度(即一个码字中校验码元的数量)为e＝n-k。RS编码的最大纠错能力t＝(n-k)/2。
考虑有限域
Figure PCTCN2021102464-appb-000001
令α为有限域
Figure PCTCN2021102464-appb-000002
中的本原元，则给定生成多项式g(x)表示为：
Figure PCTCN2021102464-appb-000003
其中，t∈Z +为RS码的纠错能力，如果n-k＝2t，那么(n,k)RS码可以被定义为：
{c(x)|deg(c(x))≤n-1,c(x)≡0(mod g(x))}
RS码经过调制，在信道中传输，接收端接收到的向量表示为：
Figure PCTCN2021102464-appb-000004
其中，e(x)为错误图样，当出现错误的符号个数υ≤t时(也即e(x)的重量小于或等于t)，此时有且仅有一个码字c(x)与r(x)的汉明距离为υ。当出现错误的符号个数υ>t时，可能出现两种情况：一是存在码字c′(x)与r(x)的汉明距离小于或等于t，此时译码器将r(x)译码为c′(x)；二是不存在码字与r(x)的汉明距离小于或等于t，此时超出纠错能力。上述两种情况的错误图样为不可纠正错误，其他情况的错误图样称为可纠正错误。
也可以通过汉明球来理解信道可能出现的错误。对一个码字c(x)，汉明球定义为与其汉明距离小于或等于t的全部向量，那么接收端的向量空间可以由图1表示。如图1所示，d min是码的最小距离，且满足
Figure PCTCN2021102464-appb-000005
接收端的向量空间由多个不相交的汉明球(Hamming球)以及Hamming球以外的其余向量组成(如图中的黑色圆点所示)，其中Hamming球的中心就是码字(如图中的黑色方块所示)。通信时，发送端将需要发送的信息经过编码得到码字，该码字经过调制后在信道中传输，在传输过程中可能受到干扰，从 而导致一些符号发生错误。当接收向量是某个Hamming球内的元素时，这种错误被称为可纠正错误，译码器将其译为该Hamming球中心的码字。当出现较多错误时，接收向量可能并不处在任意一个Hamming球内，这种错误被称为不可纠正错误。
如果对不可纠正错误进行译码，将会引入更多的错误，导致误码率提高，影响通信系统的稳定性。
基于生成多项式定义的RS码，其译码过程可如图2所示。图2示例性示出了一种传统的RS译码过程，如图所示，该流程可包括：
S201：根据接收到的码字r(x)计算伴随式S(x)。
该步骤中，根据接收多项式r(x)的值计算2t(2t＝n-k)个伴随式S(x)。
由伴随式的定义计算S j＝r(α j)，并分别解出S j的值。这2t个值与信道发生的错误有关。
S202：根据伴随式S(x)的值S j计算错误位置多项式Λ(x)和错误值多项式Ω(x)。
错误位置多项式可表示为：Λ(x)＝λ 0+λ 1x+λ 2x 2+…+λ tx t。
可通过关键方程求解算法来计算错误位置多项式Λ(x)和错误值多项式Ω(x)，RS码的关键方程为：
S(x)Λ(x)＝Ω(x)(mod x 2t),deg(Ω(x))<deg(Λ(x))≤t
其中，deg(Ω(x))表示错误值多项式Ω(x)的阶数，deg(Λ(x))表示错误位置多项式Λ(x)的阶数。
解上述关键方程的常见算法包括BM(Berlekamp-Massey)算法、Euclidean算法等。由于计算复杂度低，BM算法被选为常用的关键方程求解算法。此外，以BM算法为基础所衍生的RiBM(Reformulation of inversionless BM)等算法，RiBM可提升BM算法的关键路径，减少硬件资源，这使得基于BM或其衍生算法的RS译码方法成为了当前硬件实现的主流。
S203：解错误位置多项式Λ(x)，得到错误位置。
该步骤中，可通过钱搜索(Chien serach)解出错误位置多项式Λ(x)的根，错误位置多项式Λ(x)的根的倒数即为错误位置。
S204：根据错误位置以及错误值多项式Ω(x)计算错误值。
S205：根据计算出的错误位置和错误值，完成译码。
上述基于BM或其衍生算法(如RiBM)的RS译码方法，主要关注对可纠正错误的译码。为了检测不可纠正错误，目前业界采用了以下几种方法：
一种方法是：在完成钱搜索后，将错误位置多项式Λ(x)的根的个数与该多项式的阶数deg(Λ(x))进行比较，如果不相等，则检测到不可纠正错误。采用该方法，对一些不可纠正错误无法检测得到。
另一种方法是：在完成纠错后，用纠错后的码字再次计算伴随式S(x)，如果计算得到的伴随式不等于0，则表明检测到不可纠正错误。该方法需要两次计算伴随式，增加了计算复杂度和资源开销。
为了检测不可纠正错误，进而提高系统性能和可靠性，本申请实施例提供了一种RS码译码方法。本申请实施例提供的RS码译码方法可以检测到不可纠正错误，并相较于上述传统纠错方法，可以采用较低的代价并可以较为全面的对不可纠正错误进行检测。
下面结合附图，对本申请实施例进行详细描述。
参见图3，为本申请实施例提供的RS码译码流程。该流程可由RS码译码器实现，该RS译码器可由硬件实现，比如可由现场可编程门阵列(field programmable gate Array，FPGA)等集成电路实现，也可由软件实现，或者由软件和硬件相结合的方式实现。该流程也可由具有RS译码功能的通信设备或电子设备实现。举例来说，该通信设备可以是全球微波接入互操作性(world interoperability for microwave access，WiMAX)接入网设备或WiMAX终端，能够对接收到的RS编码信号进行译码；再举例来说，该电子设备可以是能够对RS编码的数字电视信号进行解调的调制解调器(比如机顶盒)，或者该电子设备可以是能够读取RS编码的DVD数据并对读取到的数据进行译码的DVD播放器。
如图3所示，该流程可包括如下步骤：
S301：根据待译码的码字确定伴随式，该待译码的码字为RS编码的码字。
可选的，在S301之前，可首先获取或接收RS编码的码字。比如，在WiMAX通信场景下，WiMAX终端接收RS编码的信号；在数字电视应用场景下，机顶盒接收RS编码的数字电视信号；在DVD应用场景下，DVD播放器读取DVD盘以获取RS编码的数据。
待译码的码字可表示为接收多项式，进而可根据接收多项式的值计算2t(2t＝n-k)个伴随式。其中，n表示码字的长度(也即一个码字包含的信息码元和校验码元的总数量)，k为信息段的长度(也即一个码字中信息码元的数量)，t为最大纠错能力。
由伴随式的定义计算伴随式S i＝r(α i)，并分别解出伴随式S i的值。示例性的，计算伴随式的原理如下：
接收端接收到的向量表示为：
r(x)＝c(x)+e(x)
如果编码使用的生成多项式g(x)为：
g(x)＝(x-α p)(x-α p+1)(x-α p+2)…(x-α p+n-k-1)
因为
c(x)≡0(mod g(x))
所以
c(α i)＝0,i＝p,p+1,…,p+n-k-1
所以
r(α i)＝c(α i)+e(α i)＝e(α i),i＝p,p+1,…,p+n-k-1
记
S i＝r(α i)＝e(α i),i＝p,p+1,…,p+n-k-1
这2t个伴随式的值与信道产生的错误有关。
可选的，若至少一个伴随式不等于0，则表明待译码的码字存在错误，则执行后续的纠错过程；若所有伴随式均等于0，则表明待译码的码字无需译码，可以直接将该码字中的信息码元作为译码结果输出。
S302：根据伴随式确定错误位置多项式、以及满足关键方程的最小长度。
该步骤中，可通过关键方程求解算法来计算错误位置多项式以及满足该关键方程的最小长度。
本申请实施例可以采用BM算法、RiBM算法等方法来解关键方程，以得到错误位置多项式以及满足关键方程的最小长度。
示例性的，该步骤中，可根据伴随式进行2t次迭代，得到错误位置多项式Λ(x)以及满足关键方程的最小长度L。在第i次迭代中(1≤i≤2t)：若伴随式和当前错误位置多项式Λ(x)的第i次项系数不等于零且当前L小于辅助变量的当前值，则保存L，按照公式L Λ＝L B+1，对L进行更新，并将该辅助变量的值更新为保存的L；否则，保持L不变，将该辅助变量的值递增。
下面以本申请实施例采用BM算法为例进行说明。
BM算法通过迭代寻找L以及错误位置多项式Λ(x)，使得错位值多项式Ω(x)的阶数deg(Ω(x))<L。
BM算法保持错误位置多项式Λ(x)、辅助更新多项式B(x)、辅助变量γ和L Λ、L B，利用B(x)、γ和L Λ、L B更新Λ(x)，直到满足关键方程。
迭代开始前，令Λ(x)＝1，B(x)＝1，γ＝1，L Λ＝0，L B＝0。
第i次迭代后，BM算法保证S(x)Λ(x)的第L,L+1,…,i次项系数为0，其中，i＝1,2,…,2t。2t次迭代后，即可得到满足关键方程的解。
第i次迭代，BM算法令：
Λ(x)＝γΛ(x)-dxB(x)
其中，d为S(x)Λ(x)的第i次项系数。如果为d≠0且L Λ≤L B，令：
B(x)＝Λ(x),γ＝d,L Λ＝L B+1,L B＝L Λ
否则，令：
B(x)＝xB(x),L B＝L B+1
通过上述BM算法的迭代过程，最终输出错误位置多项式Λ(x)以及L Λ，L Λ即为满足关键方程的最小长度。
示例性的，图4示出了BM算法的实现过程。如图4所示，该流程可包括如下步骤：
S400：进行参数初始化，令Λ(x)＝1，B(x)＝1，γ＝1，L Λ＝0，L B＝0；
S401：初始化迭代次数i＝1；
以下S402至S411为迭代过程，具体包括：
S402：计算S(x)Λ(x)的第i次项系数
Figure PCTCN2021102464-appb-000006
S403：如果d≠0且L Λ≤L B，则转入S404，否则转入S407；
S404：更新中间参数t(x)＝Λ(x)，更新错误位置多项式Λ(x)＝γΛ(x)-dxB(x)；
S405：更新B(x)＝t(x)，更新γ＝d；
S406：更新中间参数L t＝L Λ，更新L Λ＝L B+1，更新L B＝L t，然后转入S410；
S407：更新错误位置多项式Λ(x)＝γΛ(x)-dxB(x)；
S408：更新B(x)＝x B(x)；
S409：更新L B＝L B+1，然后转入S410；
S410：完成一次迭代过程，更新迭代次数i＝i+1；
S411：判断是否完成2t次迭代，即迭代次数i是否达到2t，若是，则转入S412，否则返回S402以执行下一次迭代；
S412：结束迭代，并输出错误位置多项式Λ(x)以及L Λ，L Λ的值即为满足关键方程的最小长度。
S303：比较满足关键方程的最小长度和RS编码的最大纠错能力，若满足关键方程的最小长度大于最大纠错能力，则检测到不可纠正错误，放弃对当前码字的译码操作，结束 对该码字的译码过程，否则转入S304。
可选的，如果检测到不可纠正错误，还可以输出告警指示，用于指示检测到不可纠正错误。
S304：根据错误位置多项式确定错误位置，并统计错误位置的数量。
该步骤中，可通过钱搜索(Chien serach)解出错误位置多项式Λ(x)的根，并统计错误位置多项式Λ(x)的根个数，其中，错误位置多项式Λ(x)的根指示了错误位置。
错误位置多项式Λ(x)的根的个数可表示为：
|{α i|Λ(α -i)＝0,i＝0,1,…,n-1}|
其中，“|”为集合的分界符号。
S305：比较错误位置的数量与满足关键方程的最小长度，若错误位置的数量与满足关键方程的最小长度不相等，则检测到不可纠正错误，放弃对当前码字的译码操作，结束对该码字的译码过程，否则转入S306。
可选的，如果检测到不可纠正错误，还可以输出告警指示，用于指示检测到不可纠正错误。
S306：根据错误位置，确定相应错误位置对应的错误值。
可选的，可使用Forney算法确定错误位置上的错误值。可将确定出的错误位置代入伴随式的定义式中得到一个方程组，通过解该方程组可以得到所有错误位置的错误值。
示例性的，Forney算法的原理为：
假设错误发生在位置x j1,x j2,…,x jl，j1<j2<…<jl≤n-1，则
Λ(x)＝(1+α -j1x)(1+α -j2x)…(1+α -jlx)
＝1+σ 1x+σ 2x 2+…+σ l-1x l-1+σ lx l
Figure PCTCN2021102464-appb-000007
其中：
S(x)＝1+S 1x+…,+S lx l
则：
Ω(x)＝1+(S 1+σ 1)x+(S 2+σ 1S+σ 2)x 2+…+(S l+σ 1S -1+σ 2S l-2+…+σ l)x l
Figure PCTCN2021102464-appb-000008
Figure PCTCN2021102464-appb-000009
Figure PCTCN2021102464-appb-000010
Figure PCTCN2021102464-appb-000011
令
Figure PCTCN2021102464-appb-000012
代入上式可得到：
Figure PCTCN2021102464-appb-000013
其中，
Figure PCTCN2021102464-appb-000014
中，若h≠k，其中有一项j h＝j k,j h-j k＝0,
Figure PCTCN2021102464-appb-000015
故
Figure PCTCN2021102464-appb-000016
所以有：
Figure PCTCN2021102464-appb-000017
Figure PCTCN2021102464-appb-000018
通过上式即可求解错误多项式的系数，即各错误位置对应的错误值。
S307：根据错误位置和相应错误位置对应的错误值，对待译码的码字进行纠错，得到译码结果。
该步骤中，可将错误值加到对应的错误位置上，完成纠错。
采用本申请实施例，一方面，相较于传统RS码译码方法中依赖错误位置多项式的阶数deg(Λ(x))来检测不可纠正错误，可以全面检测不可纠正错误，从而提高系统可靠性。下面以采用BM算法计算错误多项式为例进行简要说明，采用其他算法的情况类似。
考虑关键方程为：
S(x)Λ(x)＝Ω(x)(mod x 2t),deg(Ω(x))<deg(Λ(x))≤t
其中伴随式S(x)由错误图样e(x)完全确定。值得注意的是，对一些不可纠正错误，该方程并没有解。
本申请实施例中，BM算法给出了以下方程的解：
S(x)Λ(x)＝Ω(x)(mod x 2t),deg(Ω(x))<L≤2t
可以证明，对任意伴随式S(x)，上述方程均有解。
当错误图样e(x)为可纠正错误时，必定有：
deg(Ω(x))<L＝deg(Λ(x))≤t
当错误图样e(x)为不可纠正错误时，可能出现deg(Λ(x))≠L和L>t等情况。因此，传统RS码译码方法中依赖deg(Λ(x))来检测不可纠正错误是不完全可靠的。
另一方面，由于本申请实施例中，无需多次计算伴随式，因此相较于传统RS码译码方法，本申请实施例可以降低复杂度以及资源开销，从而可以提高系统性能。
可选的，在本申请的一些实施例中，还可以计算错误值多项式，并在确定错误位置时， 根据错误值多项式和错误位置多项式确定错误位置，比如，可采用Forney算法利用错误位置多项式和错误值多项式计算各错误位置对应的错误值。
可选的，本申请实施例可采用以下几种方法来计算错误值多项式：
方法一：
在计算得到错误位置多项式Λ(x)之后，通过Ω＝S(x)Λ(x)mod x 2t来计算错误值多项式Ω(x)。
方法二：
在BM算法等类似算法的迭代过程中，增加错误值多项式Ω(x)的计算。
方法三：
采用RiBM算法等类似算法时，通过以下方程来计算错误值多项式Ω (h)(x)：
S(x)Λ(x)＝Ω(x)+x 2tΩ (h)(x)
根据上述一个或多个实施例的组合，下面结合图5，以采用RiBM算法为例，对RS译码过程进行说明。
参见图5，为本申请实施例提供的一种RS译码流程，如图所示，该流程可包括：
S501：根据待译的码字r(x)计算伴随式S(x)。
S502：如果S(x)＝0，即所有伴随式均为0，表明码字r(x)不存在错误，则转入S503，否则表明码字r(x)存在错误，则转入S504。
S503：输出该码字的信息码元，作为译码结果，完成对该码字的译码。
S504：采用RiBM算法，根据伴随式S(x)计算错误位置多项式Λ(x)、满足关键方程的最小长度L以及错误值多项式Ω (h)(x)。
S505：如果L>t，则检测到不可纠正错误，结束对该码字进行译码，否则转入S506。
其中t表示RS编码的最大纠错能力。
S506：对错误位置多项式Λ(x)进行钱搜索，得到错误位置多项式Λ(x)的根，并统计错误位置多项式Λ(x)的根在码字范围内的个数。其中，错误位置多项式Λ(x)的根能够指示错误位置。
S507：如果错误位置多项式Λ(x)的根的个数与L不相等，则检测到不可纠正错误，结束对该码字进行译码，否则转入S508。
S508：采用Forney算法，利用错误位置多项式Λ(x)、错误值多项式Ω (h)(x)，计算错误值。
S509：根据错误位置和错误值，对该码字进行纠错，得到译码结果并输出。
需要说明的是，图5所示流程中各步骤的具体实现方式可参考前述实施例，在此不再重复。
基于相同的技术构思，本申请实施例还提供了一种RS译码器。
参见图6，为本申请实施例提供的RS译码器的结构示意图。该RS译码器可包括：伴随式确定单元601、错误位置多项式确定单元602、错误位置确定单元603、纠错单元604。
伴随式确定单元601，用于根据待译码的码字确定伴随式，该码字为RS编码的码字；
错误位置多项式确定单元602，用于根据伴随式确定错误位置多项式以及满足关键方程的最小长度；
错误位置确定单元603，用于确定满足关键方程的最小长度是否大于RS编码的最大纠错能力，若是，则检测到不可纠正错误，并放弃对该码字进行译码；否则根据错误位置多 项式确定错误位置；
纠错单元604，用于判断确定出的错误位置的数量是否等于满足关键方程的最小长度，若不等于，则检测到不可纠正错误，并放弃对该码字进行译码；否则根据错误位置对该码字进行纠错，得到该码字的译码结果。
可选的，错误位置多项式确定单元602，具体用于：根据所述伴随式，进行2t次迭代，得到错误位置多项式以及满足关键方程的最小长度，t为RS编码的最大纠错能力，其中，在第i次迭代中，1≤i≤2t：
若伴随式和当前错误位置多项式的第i次项系数不等于零且满足关键方程的最小长度的当前值小于辅助变量的当前值，则保存该满足关键方程的最小长度的当前值，按照公式L Λ＝L B+1，对该满足关键方程的最小长度进行更新，并将辅助变量的值更新为保存的最小长度，其中，L Λ第i次迭代后的满足关键方程的最小长度，L B为辅助变量；否则，保持满足关键方程的最小长度不变，将辅助变量的值递增。
进一步的，错误位置多项式确定单元602在根据所述伴随式，进行2t次迭代的过程中，还得到错误值多项式。相应的，纠错单元604可根据错误位置多项式和错误值多项式计算各错误位置对应的错误值。
可选的，错误位置多项式确定单元602根据伴随式确定错误位置多项式之后，还根据错误位置多项式确定错误值多项式。相应的，纠错单元604可根据错误位置多项式和错误值多项式计算各错误位置对应的错误值。
可选的，错误位置确定单元603和/或纠错单元604检测到不可纠正错误之后，还输出用于指示检测到不可纠正错误的告警指示。
可选的，伴随式确定单元601根据待译码的码字确定伴随式后，若判断所有伴随式均等于0，则确定该码字无需译码，并将码字中的信息码元作为该码字的译码结果。
可选的，错误位置多项式确定单元602可以是BM算法单元或RiBM算法单元，用于执行相关算法；错误位置确定单元603可以是钱搜索单元，用于通过执行钱搜索方法来确定错误位置；纠错单元可以是Forney算法单元，用于通过执行Forney算法计算错误值。
在此需要说明的是，本申请实施例提供的上述RS译码器，能够实现上述方法实施例所实现的所有方法步骤，且能够达到相同的技术效果，在此不再对本实施例中与方法实施例相同的部分及有益效果进行具体赘述。
基于相同的技术构思，本申请实施例还提供一种RS译码器，能够实现本申请实施例提供的方法流程。
该RS译码器可以包括至少一个处理器，所述至少一个处理器用于与存储器耦合，读取并执行所述存储器中的指令以实现本申请实施例提供的方法的步骤。可选的，该RS译码器还可以包括通信接口，用于支持该RS译码器进行信令或者数据的接收或发送。RS译码器中的通信接口，可用于实现与其他电子设备的进行交互。处理器可用于实现译码器执行如图3、图4、图5任一示意图所示的方法中的步骤。可选的，该RS译码器还可以包括存储器，其中存储有计算机程序、指令，存储器可以与处理器和/或通信接口耦合，用于支持处理器调用存储器中的计算机程序、指令以实现本申请实施例提供的方法的步骤；另外，存储器还可以用于存储本申请方法实施例所涉及的数据，例如，用于存储支持通信接口实现交互所必须的数据、指令，和/或，用于存储电子设备执行本申请实施例所述方法所必须的配置信息。
基于与上述方法实施例相同构思，本申请实施例还提供了一种计算机可读存储介质，其上存储有一些指令，这些指令被计算机调用执行时，可以使得计算机完成上述方法实施例、方法实施例的任意一种可能的设计中所涉及的方法。本申请实施例中，对计算机可读存储介质不做限定，例如，可以是RAM(random-access memory，随机存取存储器)、ROM(read-only memory，只读存储器)等。
基于与上述方法实施例相同构思，本申请还提供一种计算机程序产品，该计算机程序产品在被计算机调用执行时可以完成方法实施例以及上述方法实施例任意可能的设计中所涉及的方法。
基于与上述方法实施例相同构思，本申请还提供一种芯片，该芯片可以包括处理器以及接口电路，用于完成上述方法实施例、方法实施例的任意一种可能的实现方式中所涉及的方法，其中，“耦合”是指两个部件彼此直接或间接地结合，这种结合可以是固定的或可移动性的，这种结合可以允许流动液、电、电信号或其它类型信号在两个部件之间进行通信。
可以理解的是，本申请的实施例中的处理器可以是中央处理单元(Central Processing Unit，CPU)，还可以是其它通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现场可编程门阵列(Field Programmable Gate Array，FPGA)或者其它可编程逻辑器件、晶体管逻辑器件，硬件部件或者其任意组合。通用处理器可以是微处理器，也可以是任何常规的处理器。
本申请的实施例中的方法步骤可以通过硬件的方式来实现，也可以由处理器执行软件指令的方式来实现。软件指令可以由相应的软件模块组成，软件模块可以被存放于随机存取存储器、闪存、只读存储器、可编程只读存储器、可擦除可编程只读存储器、电可擦除可编程只读存储器、寄存器、硬盘、移动硬盘、CD-ROM或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另外，该ASIC可以位于基站或终端中。当然，处理器和存储介质也可以作为分立组件存在于基站或终端中。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机程序或指令。在计算机上加载和执行所述计算机程序或指令时，全部或部分地执行本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、基站、用户设备或者其它可编程装置。所述计算机程序或指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机程序或指令可以从一个网站站点、计算机、服务器或数据中心通过有线或无线方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是集成一个或多个可用介质的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，例如，软盘、硬盘、磁带；也可以是光介质，例如，数字视频光盘；还可以是半导体介质，例如，固态硬盘。该计算机可读存储介质可以是易失性或非易失性存储介质，或可包括易失性和非易失性两种类型的存储介质。
在本申请的各个实施例中，如果没有特殊说明以及逻辑冲突，不同的实施例之间的术 语和/或描述具有一致性、且可以相互引用，不同的实施例中的技术特征根据其内在的逻辑关系可以组合形成新的实施例。
本申请中，“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。在本申请的文字描述中，字符“/”，一般表示前后关联对象是一种“或”的关系；在本申请的公式中，字符“/”，表示前后关联对象是一种“相除”的关系。
可以理解的是，在本申请的实施例中涉及的各种数字编号仅为描述方便进行的区分，并不用来限制本申请的实施例的范围。上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定。

Claims (10)

  1. 一种RS码译码方法，其特征在于，包括：
    根据待译码的码字确定伴随式，所述码字为RS编码的码字；
    根据所述伴随式确定错误位置多项式以及满足关键方程的最小长度；
    若所述满足关键方程的最小长度大于RS编码的最大纠错能力，则检测到不可纠正错误，并放弃对所述码字进行译码，否则，根据所述错误位置多项式确定错误位置；
    若确定出的错误位置的数量不等于所述满足关键方程的最小长度，则检测到不可纠正错误，并放弃对所述码字进行译码，否则，根据所述错误位置对所述码字进行纠错，得到所述码字的译码结果。
  2. 如权利要求1所述的方法，其特征在于，所述根据所述伴随式确定错误位置多项式以及满足关键方程的最小长度，包括：
    根据所述伴随式，进行2t次迭代，得到所述错误位置多项式以及所述满足关键方程的最小长度，t为RS编码的最大纠错能力，其中，在第i次迭代中，1≤i≤2t：
    若所述伴随式和当前错误位置多项式的第i次项系数不等于零且所述满足关键方程的最小长度的当前值小于辅助变量的当前值，则保存所述满足关键方程的最小程度的当前值，按照公式L Λ＝L B+1，对所述满足关键方程的最小长度进行更新，并将所述辅助变量的值更新为所保存的满足关键方程的最小长度，其中，L Λ第i次迭代后所述满足关键方程的最小长度，L B为辅助变量；
    否则，保持所述满足关键方程的最小长度不变，将所述辅助变量的值递增。
  3. 如权利要求2所述的方法，其特征在于，在根据所述伴随式，进行2t次迭代的过程中，还得到错误值多项式。
  4. 如权利要求1或2所述的方法，其特征在于，所述根据所述伴随式确定错误位置多项式之后，还包括：
    根据所述错误位置多项式确定错误值多项式。
  5. 如权利要求1-4任一项所述的方法，其特征在于，所述检测到不可纠正错误之后，所述方法还包括：
    输出用于指示检测到不可纠正错误的告警指示。
  6. 如权利要求1-5任一项所述的方法，其特征在于，所述根据待译码的码字确定伴随式后，所述方法还包括：
    若所有伴随式均等于0，则将所述码字中的信息码元作为所述码字的译码结果；其中，所述码字中包括至少一个信息码元以及至少一个校验码元。
  7. 一种RS译码器，其特征在于，包括：
    伴随式确定单元，用于根据待译码的码字确定伴随式，所述码字为RS编码的码字；
    错误位置多项式确定单元，用于根据所述伴随式确定错误位置多项式以及满足关键方程的最小长度；
    错误位置确定单元，用于确定所述满足关键方程的最小长度是否大于RS编码的最大纠错能力，若是，则检测到不可纠正错误，并放弃对所述码字进行译码；否则根据所述错误位置多项式确定错误位置；
    纠错单元，用于判断确定出的错误位置的数量是否等于所述满足关键方程的最小长度，若不等于，则检测到不可纠正错误，并放弃对所述码字进行译码；否则根据所述错误位置 对所述码字进行纠错，得到所述码字的译码结果。
  8. 一种RS译码器，其特征在于，包括：一个或多个处理器；一个或多个存储器；其中，所述一个或多个存储器存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令，当所述指令被所述一个或多个处理器执行时，使得所述RS译码器执行如权利要求1-6任一项所述的方法。
  9. 一种芯片，其特征在于，包括：一个或多个处理器；一个或多个存储器；其中，所述一个或多个存储器存储有一个或多个计算机程序，所述一个或多个计算机程序包括指令，当所述指令被所述一个或多个处理器执行时，使得所述芯片执行如权利要求1-6任一项所述的方法。
  10. 一种计算机程序产品，其特征在于，所述计算机程序产品在被计算机调用时，使得所述计算机执行如权利要求1-6任一项所述的方法。
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