WO2022241625A1 - 电源电路及终端设备 - Google Patents

电源电路及终端设备 Download PDF

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Publication number
WO2022241625A1
WO2022241625A1 PCT/CN2021/094193 CN2021094193W WO2022241625A1 WO 2022241625 A1 WO2022241625 A1 WO 2022241625A1 CN 2021094193 W CN2021094193 W CN 2021094193W WO 2022241625 A1 WO2022241625 A1 WO 2022241625A1
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Prior art keywords
terminal
transistor
control
voltage
electrically connected
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Application number
PCT/CN2021/094193
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English (en)
French (fr)
Inventor
陈亮
谢强
王东旭
Original Assignee
华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN202180089291.4A priority Critical patent/CN116783806A/zh
Priority to PCT/CN2021/094193 priority patent/WO2022241625A1/zh
Publication of WO2022241625A1 publication Critical patent/WO2022241625A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters

Definitions

  • the present application relates to the field of power supply voltage regulation, in particular to a power supply circuit and terminal equipment.
  • a power supply circuit with high voltage input and low voltage high current output is provided in the related art.
  • the power supply circuit uses an open-loop mode transformer circuit 1 and a closed-loop mode buck circuit 2 at the high voltage input terminal. They are connected in series, and the transformer circuit 1 and the buck circuit 2 are connected in parallel at the low-voltage output terminal out.
  • the transformer circuit 1 is responsible for realizing a large current output function, but since it works in the open-loop mode, it cannot directly adjust the output voltage Vout, so it needs to use the buck circuit 2 working in the closed-loop mode.
  • the output voltage Vout is adjusted to ensure the stability of the output voltage.
  • Embodiments of the present application provide a power supply circuit and a terminal device, which can reduce the volume of the power supply circuit while realizing high-voltage input and low-voltage high-current output.
  • the present application provides a power supply circuit, including a DC power supply, a transformer conversion circuit, a voltage regulation circuit, a first capacitor, a second capacitor, and a signal output terminal; wherein, the voltage regulation circuit includes an inductor, a first terminal, a second terminal, a Three terminals; the voltage-transforming conversion circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal; the first input terminal of the voltage-transforming conversion circuit is electrically connected to the positive pole of the DC power supply, and the voltage-transforming conversion circuit The second input terminal is electrically connected to the first terminal of the voltage regulating circuit; the first output terminal of the voltage-transforming conversion circuit is electrically connected to the signal output terminal, and the second output terminal of the voltage-transforming conversion circuit is electrically connected to the ground terminal; The second terminal is electrically connected to the positive pole of the DC power supply; the third terminal of the voltage regulation circuit is electrically connected to the first output terminal or the second output terminal of the voltage transformation conversion circuit; the negative pole of the DC power supply
  • the power supply circuit provided by the embodiment of the present application, by setting the first terminal of the voltage regulation circuit to be connected to the second input terminal of the transformer conversion circuit, the second terminal to be connected to the positive pole of the DC power supply, and the third terminal It is connected with the first output end or the second output end of the voltage transformation conversion circuit; in this case, the current of the first end can be adjusted by controlling the inductance according to the voltage of the signal output end, and the input end of the voltage transformation conversion circuit can be When the voltage changes greatly (it can also be said that the voltage at the signal output terminal changes greatly), it is ensured that the current on the inductor does not increase significantly (that is, the inductor is maintained at a low current), thereby avoiding the related technology.
  • the volume of the inductor caused by outputting all the power to the signal output terminal out is beneficial to the volume reduction of the power supply circuit.
  • the voltage regulation circuit further includes a controller, and the controller controls the inductor to adjust the current at the first terminal according to the voltage at the signal output terminal.
  • the voltage regulation circuit is configured to: turn on the first path and the second path alternately according to the voltage at the signal output end, so as to control the inductor to adjust the current at the first end; wherein, the first path is the first end and the second path.
  • the path between the second end, the second path is the path between the first end and the third end; in this case, the power output to the inductor can be performed through the second end and the third end, or the power can be output through the second end to the
  • the inductor performs power output, that is, part of the power of the inductor is output to the signal output terminal through the third terminal, and part of the power is output to the DC power supply through the second terminal; or, all the power of the inductor is output to the DC power supply through the second terminal to achieve adjustment current at the first terminal.
  • the voltage regulation circuit further includes a first transistor, a second transistor, a first control terminal, and a second control terminal; the gate of the first transistor is electrically connected to the first control terminal, and the first transistor of the first transistor is electrically connected to the first control terminal.
  • One pole is electrically connected to the second terminal, the second pole of the first transistor is electrically connected to the first node; the gate of the second transistor is electrically connected to the second control terminal, and the first pole of the second transistor is electrically connected to the first node ;
  • the second pole of the second transistor is electrically connected to the third end; one end of the inductor is electrically connected to the first end, and the other end of the inductor is electrically connected to the first node.
  • the voltage regulation circuit includes a controller; the controller is electrically connected to the signal output terminal, the first control terminal, and the second control terminal; the controller is configured to: according to the voltage of the signal output terminal, send The first control signal is input, the second control signal is input to the second control terminal, and the duty cycle of the first control signal and the second control terminal is adjusted to control the duration of alternately turning on the first transistor and the second transistor.
  • the voltage regulation circuit is configured to: turn on the second path and the third path alternately according to the voltage at the signal output end, so as to control the inductor to adjust the current at the first end; wherein, the second path is the second path The path between the third end and the first end, the third path is the path between the third end and the second end; in this case, the power output to the inductor can be performed through the first end and the third end, or through the third end
  • One end outputs power to the inductance; that is, part of the power of the inductance is output to the signal output end through the third end, and part of the power is output to the first capacitor through the first end; or, all the power of the inductance is output to the second end through the first end.
  • a capacitor to adjust the current of the first terminal.
  • the voltage regulation circuit further includes a third transistor, a fourth transistor, a third control terminal, and a fourth control terminal; the gate of the third transistor is electrically connected to the third control terminal, and the third transistor’s first One pole is electrically connected to the second terminal, the second pole of the third transistor is electrically connected to the second node; the gate of the fourth transistor is electrically connected to the fourth control terminal, and the first pole of the fourth transistor is electrically connected to the first terminal , the second pole of the fourth transistor is electrically connected to the second node; one end of the inductor is electrically connected to the second node, and the other end of the inductor is electrically connected to the third end.
  • the voltage regulation circuit includes the controller; the controller is electrically connected to the signal output terminal, the third control terminal, and the fourth control terminal; the controller is configured to: according to the voltage of the signal output terminal, send The third control signal is input to the control terminal, the fourth control signal is input to the fourth control terminal, and the duty cycle of the third control signal and the fourth control signal is adjusted to control the duration of alternately turning on the third transistor and the fourth transistor.
  • the voltage regulation circuit is configured to: alternately turn on the third path, the second path, and the first path according to the voltage at the signal output terminal, and connect both ends of the inductor to the second end, so as to control the Adjusting the current at the first end; wherein, the third path is the path between the third end and the second end, the second path is the path between the third end and the first end, and the first path is the first end and the passage between the second end.
  • the voltage regulation circuit further includes a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a fifth control terminal, a sixth control terminal, a seventh control terminal, and an eighth control terminal;
  • the gate of the fifth transistor is electrically connected to the fifth control terminal, the first pole of the fifth transistor is electrically connected to the second terminal, the second pole of the fifth transistor is electrically connected to the fourth node;
  • the gate of the sixth transistor is electrically connected to the sixth
  • the control terminal is electrically connected, the first pole of the sixth transistor is electrically connected to the second terminal, the second pole of the sixth transistor is electrically connected to the third node;
  • the gate of the seventh transistor is electrically connected to the seventh control terminal, and the seventh transistor
  • the first pole of the eighth transistor is electrically connected to the first terminal, the second pole of the seventh transistor is electrically connected to the third node;
  • the gate of the eighth transistor is electrically connected to the eighth control terminal, and the first pole of the eighth transistor is electrically connected to the fourth node Electrically connected,
  • the voltage regulation circuit includes a controller; the controller is electrically connected to the signal output terminal, the fifth control terminal, the sixth control terminal, the seventh control terminal, and the eighth control terminal; the controller is configured as: Input the sixth control signal to the sixth control terminal, input the seventh control signal to the seventh control terminal, turn off the sixth transistor, and turn on the seventh transistor; and input the fifth control signal to the fifth control terminal according to the voltage of the signal output terminal, The eighth control signal is input to the eighth control terminal, and the duty cycle of the fifth control signal and the eighth control signal is adjusted to control the duration of turning on the fifth transistor and the eighth transistor alternately.
  • the voltage regulation circuit includes a controller; the controller is electrically connected to the signal output terminal, the fifth control terminal, the sixth control terminal, the seventh control terminal, and the eighth control terminal; the controller is configured to: The fifth control terminal inputs the fifth control signal, inputs the eighth control signal to the eighth control terminal, turns off the fifth transistor, and turns on the eighth transistor; and according to the voltage of the signal output terminal, inputs the sixth control signal to the sixth control terminal to The seventh control terminal inputs the seventh control signal, and adjusts the duty cycle of the sixth control signal and the seventh control signal to control the duration of alternately turning on the sixth transistor and the seventh transistor.
  • the voltage regulation circuit includes a controller; the controller is electrically connected to the signal output terminal, the fifth control terminal, the sixth control terminal, the seventh control terminal, and the eighth control terminal; the controller is configured to: The voltage of the signal output terminal, the duty cycle of the fifth control signal is input to the fifth control terminal, the sixth control signal is input to the sixth control terminal, the seventh control signal is input to the seventh control terminal, and the eighth control signal is input to the eighth control terminal. control signal, and adjust the duty cycle of the fifth control signal, the sixth control signal, the seventh control signal, and the eighth control signal, and periodically perform the first control stage, the second control stage, the third control stage, and the Four control stages.
  • the first control stage includes: closing the fifth transistor and the seventh transistor, controlling the duration of turning on the sixth transistor and the eighth transistor;
  • the second control stage includes: closing the fifth transistor and the sixth transistor, controlling turning on the seventh transistor and the The duration of the eighth transistor;
  • the third control stage includes: closing the sixth transistor and the eighth transistor, and controlling the duration of turning on the fifth transistor and the seventh transistor;
  • the fourth control stage includes: closing the seventh transistor and the eighth transistor, and controlling the opening The duration of the fifth transistor and the sixth transistor.
  • An embodiment of the present application further provides a terminal device, including a load module and a power supply circuit as provided in any one of the foregoing embodiments; the power supply circuit is connected to the load module through a signal output terminal.
  • FIG. 1 is a schematic diagram of a power supply circuit provided in the related art of the present application.
  • FIG. 2a is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 2b is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 3a is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 3b is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 4a is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 4b is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram of current regulation of a voltage regulation circuit in a power supply circuit provided by an embodiment of the present application
  • FIG. 6 is a schematic diagram of current regulation of a voltage regulation circuit in a power supply circuit provided by an embodiment of the present application.
  • FIG. 7 is a schematic diagram of current regulation of a voltage regulation circuit in a power supply circuit provided by an embodiment of the present application.
  • FIG. 8a is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • Fig. 8b is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 9a is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 9b is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 11 is a control schematic diagram of a voltage regulation circuit in a power supply circuit provided by an embodiment of the present application.
  • FIG. 12 is a schematic diagram of current regulation of a voltage regulation circuit in a power supply circuit provided by an embodiment of the present application.
  • FIG. 13 is a schematic diagram of a power supply circuit provided by an embodiment of the present application.
  • FIG. 14 is a schematic diagram of a voltage transformation conversion circuit in a power supply circuit provided by an embodiment of the present application.
  • FIG. 15 is a schematic diagram of a voltage transformation conversion circuit in a power supply circuit provided by an embodiment of the present application.
  • FIG. 16 is a schematic diagram of a controller in a power supply circuit provided by an embodiment of the present application.
  • FIG. 17 is a schematic diagram of related control signals of the controller in FIG. 16 .
  • a method, system, product or device is not necessarily limited to those steps or elements explicitly listed, but may include other steps or elements not explicitly listed or inherent to the process, method, product or device.
  • "Up”, “Down”, “Left”, “Right”, etc. are only used relative to the orientation of the components in the drawings. These directional terms are relative concepts, and they are used for description and clarification relative to , which may change accordingly according to changes in the orientation in which components are placed in the drawings.
  • the embodiment of the present application provides a terminal device, which can be electronic products such as mobile phones, TVs, tablet computers, notebooks, vehicle-mounted computers, smart watches, smart bracelets, etc. special restrictions.
  • the above-mentioned terminal equipment is provided with a power supply circuit and a load module connected to the signal output end of the power supply circuit.
  • the power supply circuit can realize the functions of high-voltage input and low-voltage high-current output to meet the power consumption demand of the load module.
  • the load module can be a chip, a power device, a processor, etc.
  • the power supply circuit can output part or all of the power of the power inductor to the signal output terminal while satisfying the high-voltage input and low-voltage high-current output of the power supply circuit by using the adjustment function of the power inductor.
  • Other ports other than the power inductor keep the current on the power inductor from changing significantly, thus avoiding the problem of large size of the power inductor, which is beneficial to the small volume requirement of the power circuit.
  • the embodiment of the present application provides a power supply circuit
  • the power supply circuit includes a DC power supply S, a voltage transformation conversion circuit 01, a voltage regulation circuit 02, a first capacitor C1, a second capacitor C2, and a signal output terminal out( It can also be called power output terminal, voltage output terminal, etc.).
  • the voltage transformation conversion circuit 01 includes a first input terminal a1, a second input terminal a2, a first output terminal b1, and a second output terminal b2; the voltage transformation conversion circuit 01 is configured to connect the first input terminal a1 and the second input terminal The voltage input by a2 is converted and then output through the first output terminal b1 and the second output terminal b2.
  • the voltage transformation conversion circuit 01 can step-down convert the voltage at the input terminal (a1, a2) and then output it through the output terminal (b1, b2), or can convert the voltage at the input terminal (a1, a2) Output is performed through the output terminals (b1, b2) after the step-up conversion; the following embodiments of the present application are all described by taking the step-down conversion of the voltage conversion circuit 01 as an example.
  • the voltage transformation conversion circuit 01 itself has a certain transformation ratio, and can convert the voltage input from the input terminals (a1, a2) according to the transformation ratio and pass it through the output terminal. (b1, b2) output; in this case, when the voltage input at the input terminal (a1, a2) increases, the output voltage at the output terminal (b1, b2) increases correspondingly according to the transformation ratio; at the input terminal (a1, a2) ) when the input voltage decreases, the output voltage of the output terminals (b1, b2) decreases correspondingly according to the transformation ratio.
  • the transformation ratio of the transformation conversion circuit 01 there is no specific limitation on the transformation ratio of the transformation conversion circuit 01 in this application; for illustration, taking the transformation ratio of the transformation transformation circuit 01 as 45:1 as an example, when the input of the transformation transformation circuit 01 When the voltage of 45V is input to the terminal (a1, a2), the voltage output from the output terminal (b1, b2) after step-down conversion by the transformer conversion circuit 01 is 1V; when the input terminal (a1, b2) of the transformer conversion circuit 01 a2) When a voltage greater than 45V is input, the output voltage of the output terminals (b1, b2) will be greater than 1V; b2) The output voltage will be less than 1V.
  • the above-mentioned voltage regulating circuit 02 includes an inductor L, a first terminal P1 , a second terminal P2 and a third terminal P3 .
  • the voltage regulation circuit 02 is configured to control the inductor L to adjust the current of the first terminal P1 according to the voltage of the signal output terminal out.
  • the voltage regulation circuit 02 may include a controller 20, through which the controller 20 controls the inductance L to adjust the first terminal according to the voltage of the signal output terminal out. P1 current.
  • connection the electrical connection between the above-mentioned DC power supply S, the voltage transformation conversion circuit 01, the voltage regulation circuit 02, the first capacitor C1, the second capacitor C2, and the signal output terminal out (Hereinafter referred to as "connection")
  • connection the electrical connection between the above-mentioned DC power supply S, the voltage transformation conversion circuit 01, the voltage regulation circuit 02, the first capacitor C1, the second capacitor C2, and the signal output terminal out
  • the first input terminal a1 of the voltage transformation conversion circuit 01 is connected to the positive pole (+) of the DC power supply S, and the negative pole (-) of the DC power supply S is connected to the ground terminal GND; the second input terminal a2 of the voltage transformation conversion circuit 01 is connected to the voltage regulation The first terminal P1 of the circuit 02 is connected; the first output terminal b1 of the voltage transformation conversion circuit 01 is connected to the signal output terminal out, and the second output terminal b2 of the voltage transformation conversion circuit 01 is connected to the ground terminal GND.
  • the two ends of the first capacitor C1 are connected between the first input terminal a1 and the second input terminal a2 of the transformation circuit 01; in this case, the first capacitor C1 can ensure that the first input terminal a1 and the second input terminal The two input terminals a2 provide a stable input voltage to the transformation circuit 01 .
  • Both ends of the second capacitor C2 are connected between the first output end b1 and the second output end b2 of the voltage transformation conversion circuit 01. There is a stable output voltage between the first output terminal b1 and the second output terminal b2, and then stable power supply is provided to the load module through the signal output terminal out.
  • the second terminal P2 of the voltage regulating circuit 02 is connected to the positive pole (+) of the DC power supply S.
  • the third terminal P3 of the voltage regulation circuit 02 in some possible implementations, as shown in FIG.
  • the terminal P3 is connected to the signal output terminal out; in some other possible implementation manners, the third terminal P3 can be connected to the second output terminal b2 of the voltage transformation conversion circuit 01, that is, the third terminal P3 is connected through the dotted line in FIG. 2a to ground GND.
  • the voltage regulation circuit 02 adjusts the current at the first terminal P1 by controlling the charging and discharging of the inductor L, thereby adjusting the voltage at the input terminals (a1, a2) of the transformation conversion circuit 01, and then controlling the output of the transformation conversion circuit 01 Terminals (b1, b2) reach the set steady-state output voltage (that is, the signal output terminal out reaches the set steady-state output voltage), so as to meet the normal power supply requirements of the load module connected to the signal output terminal out.
  • neither the first terminal P1 nor the second terminal P2 is connected to the signal output terminal out, and the voltage regulating circuit 02 can control the inductance L to charge and discharge according to the voltage of the signal output terminal out to adjust the first
  • the current at one terminal P1 can output part or all of the power to the inductor through the first terminal P1 or the second terminal P2 with a higher voltage (compared to the low-voltage signal output terminal out), that is, avoiding the inductance L All the power of the power is output to the low-voltage signal output terminal out through the third terminal P3, so as to ensure that the current on the inductor does not increase significantly (that is, the inductor maintains a low current).
  • the voltage regulation circuit 02 can output power to the inductor L through the second terminal P2 and the third terminal P3, so that part of the power of the inductor is output to the signal output terminal out through the third terminal P3 , part of the power is output to the DC power supply S through the second terminal P2, so as to ensure that the current on the inductor L does not increase significantly.
  • the voltage regulating circuit 02 can only output power to the inductor through the second terminal P2, that is, output all the power of the inductor to the DC power supply S through the second terminal P2, in this case , therefore, compared with the related art because the entire power of the inductor is output to the low-voltage signal output terminal out, the current of the inductor L is large and the volume is large, because the second terminal P2 is connected to the positive pole of the DC power supply S (+ ) connection, that is, the voltage of the second terminal P2 is greater than the low voltage of the signal output terminal out.
  • the second terminal P2 is connected to the positive pole of the DC power supply S (+ ) connection, that is, the voltage of the second terminal P2 is greater than the low voltage of the signal output terminal out.
  • the first output terminal P3 can be adjusted by controlling the inductance L according to the voltage of the signal output terminal out
  • the current at one end P1 can ensure that the current on the inductor does not occur significantly when the voltage at the input end of the transformer conversion circuit 01 changes greatly (it can also be said that the voltage at the signal output end out changes greatly). become larger (that is, the inductance is maintained at a low current), thereby avoiding the problem of large inductance caused by outputting all the power to the signal output terminal out in the related art, which is conducive to reducing the volume of the power supply circuit.
  • the voltage regulation circuit 02 can be configured to: alternately conduct the second terminal between the first terminal P1 and the second terminal P2 according to the voltage of the signal output terminal out.
  • the voltage regulating circuit 02 in the case that the voltage regulating circuit 02 includes a controller 20, the voltage regulating circuit 02 can use the controller 20 according to the voltage of the signal output terminal out , alternately conducting the first path between the first end P1 and the second end P2, and the second path between the first end P1 and the third end P3, so as to adjust the current of the first end P1.
  • the voltage regulation circuit 02 performs power output to the inductor L through the second terminal P2 and the third terminal P3 (refer to the voltage regulation circuit 1 21 below) or performs power output to the inductor L through the second terminal P2 ( Refer to the voltage regulation circuit 2 22) below to regulate the current of the first terminal P1.
  • the voltage regulation circuit one 21 (02) may include, in addition to the inductor L, a first transistor M1, a second transistor M2, a first control terminal ctrl1, The second control terminal ctrl2.
  • the first transistor M1 and the second transistor M2 both use P-type transistors, for example, they may be P-type metal oxide semiconductor field effect transistors (positive metal oxide semiconductor field effect transistors, which may be referred to as PMOS transistor for short), but the present application is not limited thereto; in some embodiments, the first transistor M1 and the second transistor M2 may also use N-type transistors, for example, N-type metal-oxide-semiconductor field-effect transistors ( negative metal oxide semiconductor field effect transistor, which can be referred to as NMOS tube for short).
  • P-type transistors for example, they may be P-type metal oxide semiconductor field effect transistors (positive metal oxide semiconductor field effect transistors, which may be referred to as PMOS transistor for short), but the present application is not limited thereto; in some embodiments, the first transistor M1 and the second transistor M2 may also use N-type transistors, for example, N-type metal-oxide-semiconductor field-effect transistors ( negative metal oxide semiconductor field effect transistor, which can be
  • the two poles (the first pole and the second pole) in the transistor other than the gate one is the source and the other is the drain, and the two are not clearly distinguished; for example, The first pole is the source, and the second pole is the drain; or, the first pole is the drain, and the second pole is the source.
  • the same is true for other transistors involved in the following, and will not be described in detail below.
  • the gate of the first transistor M1 is connected to the first control terminal ctrl1, the source of the first transistor M1 is connected to the second terminal P2, and is connected to the positive pole of the DC power supply S through the second terminal P2 (+ );
  • the drain of the first transistor M1 is connected to the first node N1;
  • the gate of the second transistor M2 is connected to the second control terminal ctrl2, and the source of the second transistor M2 is connected to the first node N1;
  • the second transistor M2 The drain is connected to the third terminal P3, that is, the drain of the second transistor M2 is connected to the signal output terminal out through the third terminal P3;
  • the first terminal of the inductor L is connected to the first node N1, and the second terminal of the inductor L It is connected to the first terminal P1, that is, the second terminal of the inductor L is connected to the second input terminal a2 of the voltage transformation conversion circuit 01 through the first terminal P1.
  • the first control signal can be input to the first control terminal ctrl1 through the controller 20 according to the voltage of the signal output terminal out, and the second control signal can be input to the second control terminal ctrl1.
  • the control terminal ctrl2 inputs the second control signal, and adjusts the duty cycle of the first control signal and the second control signal, and periodically controls the duration of the first transistor M1 and the second transistor M2 being turned on (or turned on) alternately, so that Periodically control the charging and discharging duration of the inductance L on the first path between the first terminal P1 and the second terminal P2, and the second path between the first terminal P1 and the third terminal P3; in this case, the voltage
  • the regulating circuit one 21 can output power to the inductor L through the second terminal P2 and the third terminal P3, that is, part of the power of the inductor is output to the signal output terminal out through the third terminal P3, and part of the power is output to the DC through the second terminal P2
  • the power supply S further realizing the regulation of the current of the first terminal P1, so that the signal output terminal out reaches a set steady-state output voltage.
  • the voltage regulation circuit two 22 may connect the third terminal P3 of the voltage regulation circuit one 21 shown in FIG. 3a to the ground terminal GND; in this case, According to the voltage of the signal output terminal out, the voltage regulating circuit 02 switches and controls the inductance L to switch between the paths between the first terminal P1 and the second terminal P2 and the path between the first terminal P1 and the third terminal P3, and pass through the second The terminal P2 outputs power to the inductor L, that is, all the power of the power inductor is output to the DC power supply S through the second terminal P2.
  • the first control signal can be input to the first control terminal ctrl1 through the controller 20 according to the voltage of the signal output terminal out, and the second control signal can be input to the second control terminal ctrl1.
  • the control terminal ctrl2 inputs the second control signal, and adjusts the duty cycle of the first control signal and the second control signal, and periodically controls the duration of the first transistor M1 and the second transistor M2 being turned on (or turned on) alternately, so that Periodically control the charging and discharging duration of the inductance L on the first path between the first terminal P1 and the second terminal P2, and the second path between the first terminal P1 and the third terminal P3; in this case, the voltage
  • the adjustment circuit 222 can output power to the inductor L through the second terminal P1, that is, output all the power of the power inductor to the DC power supply S through the second terminal P2, and then realize the current regulation of the first terminal P1, so that the signal output Terminal out reaches the set steady-state output voltage.
  • the second transistor M2 is turned on under the control of receiving the second control signal input from the second control terminal ctrl2, and the first transistor M1 is turned on at the first control terminal ctrl1 It is turned off (or cut off) under the control of the first input control signal.
  • the inductor L is charged, and the power is output through the third terminal P3; in this case, the current i of the first terminal P1 increases, so that the transformer The voltage of the input terminal (a1, a2) of the conversion circuit 01 increases, and then the voltage of the output terminal (b1, b2) of the voltage transformation conversion circuit 01 is adjusted to increase.
  • the first transistor M1 is turned on under the control of the first control signal input from the first control terminal ctrl1, and the second transistor M2 is turned on under the control of the second control signal input from the second control terminal ctrl2.
  • the inductance L is discharged, and the power is output through the second terminal P2; in this case, the current i of the first terminal P1 decreases, so that the input terminal (a1 , a2) the voltage decreases, and then adjust the output terminal (b1, b2) voltage of the transformation conversion circuit 01 to decrease.
  • the first transistor M1 and the second transistor M2 are a periodic control process, and for the current adjustment of the first terminal P1, the average current flowing through the inductor is used as the actual reference current.
  • the inductor current at the end of a control period T is basically the same as the inductor current at the beginning, it means that the average current of the inductor has not changed.
  • the first terminal The current of P1 basically does not change.
  • the first control signal is represented as ctrl1 in Fig. 5, Fig. 6 and Fig. 7, and the second control signal is denoted as ctrl2 and should not be considered unclear.
  • the first control signal (ctrl1) and the second control signal (ctrl2) The low-level potential in is used as the effective turn-on potential of the transistors (M1, M2).
  • the conduction period of the second transistor M2 under the control of the low potential of the second control signal (ctrl2) is 5t
  • the conduction time under control is 5t; in this case, under multiple control periods T, the average current of the inductor increases, and the average current of the first terminal P1 increases, so that the input terminal (a1, The voltage of a2)
  • the first control can be adjusted and increased.
  • D1 the duty cycle of the second control signal
  • the conduction duration of the second transistor M2 under the control of the low potential of the second control signal (ctrl2) is 3t
  • the first transistor M1 is controlled by the first control signal (ctrl1)
  • the conduction time under the control of the low potential is 7t; in this case, under multiple control periods T, the average current of the inductor decreases, and the average current of the first terminal P1 decreases, so that the voltage transformation conversion circuit
  • the voltage regulating circuit 02 can be configured to: according to the voltage of the signal output terminal out, alternately conduct the first terminal P3 between the third terminal P3 and the first terminal P1 Three paths, the fourth path between the third end P3 and the second end P2, that is, alternately control the inductance L to be located in the third path and the fourth path, so as to adjust the current of the first end P1.
  • the voltage regulation circuit 02 in the case that the voltage regulation circuit 02 includes a controller 20, the voltage regulation circuit 02 can use the controller 20 according to the voltage of the signal output terminal out , alternately conducting the second path between the third terminal P3 and the first terminal P1, and the third path between the third terminal P3 and the second terminal P2, so as to adjust the current of the first terminal P1.
  • the voltage regulation circuit 02 performs power output through the first terminal P1 and the third terminal P3 (refer to the voltage regulation circuit 3 23 below) or performs power output through the first terminal P1 (refer to the voltage regulation below Circuit 4 (24) to adjust the current at the first terminal P1.
  • the voltage regulation circuit 3 23 (02) may include a third transistor M3, a fourth transistor M4, a third control terminal ctrl3, The fourth control terminal ctrl4.
  • the gate of the third transistor M3 is connected to the third control terminal ctrl3, the source of the third transistor M3 is connected to the second terminal P2, and is connected to the positive pole (+) of the DC power supply S through the second terminal P2; the third transistor M3
  • the drain of the fourth transistor M4 is connected to the second node N2; the gate of the fourth transistor M4 is connected to the fourth control terminal ctrl4, and the source of the fourth transistor M4 is connected to the first terminal P1, that is, the source of the fourth transistor M4 passes through the fourth control terminal ctrl4.
  • One terminal P1 is connected to the second input terminal a2 of the transformation circuit 01; the drain of the fourth transistor M4 is connected to the second node N2; the first terminal of the inductor L is connected to the second node N2, and the second terminal of the inductor L It is connected to the third terminal P3, that is, the second terminal of the inductor L is connected to the signal output terminal out through the third terminal P3.
  • the third control signal can be input to the third control terminal ctrl3 through the controller 20
  • the fourth control signal can be input to the fourth control terminal ctrl4, and the third control signal can be adjusted. signal and the duty ratio of the fourth control signal to periodically control the alternate turn-on duration of the third transistor M3 and the fourth transistor M4, so as to periodically control the inductance L respectively located between the third terminal P3 and the first terminal P1.
  • the voltage regulation circuit 24 can connect the third terminal P3 of the voltage regulation circuit 3 23 shown in FIG. 6 to the ground terminal GND; in this case, The voltage regulating circuit 02 switches the second path between the third end P3 and the first end P1 and the third path between the third end P3 and the second end P2 respectively to control the inductance L according to the voltage of the signal output end out. charge and discharge, and output power through the first terminal P1, so as to adjust the current of the first terminal P1.
  • the third control signal can be input to the third control terminal ctrl3 through the controller 20, the fourth control signal can be input to the fourth control terminal ctrl4, and according to the signal output terminal
  • the voltage of out adjusts the duty cycle of the third control signal and the fourth control signal, and periodically controls the duration of alternate turn-on of the third transistor M3 and the fourth transistor M4, thereby periodically controlling the inductance L to be located at the third terminal P3 and the fourth terminal P3 respectively.
  • the inductor L performs power output, that is, the full power of the power inductor is output to the first capacitor C1 through the first terminal P1, and then the current regulation of the first terminal P1 is realized, so that the signal output terminal out reaches the set steady-state output voltage .
  • the voltage of the DC power supply S is lower than the set voltage of the input terminals (a1, a2) of the transformer conversion circuit 01, that is, the voltage of the first terminal P1 of the voltage regulation circuit 02 should be a negative voltage; for example , the voltage of the DC power supply S is 40v, and the set voltage of the input terminals (a1, a2) of the transformer conversion circuit 01 is 45v; that is, the voltage of the first terminal P1 of the voltage regulation circuit 02 is a negative voltage of -5V; assuming If the voltage of the first terminal P1 is a positive voltage, no matter whether the third transistor M3 or the fourth transistor M4 is turned on, the inductor current can only flow in one direction from the second no
  • the voltage regulation circuit 01 may be configured to alternately conduct the first path between the first terminal P1 and the second terminal P2 according to the voltage of the signal output terminal out , the second path between the first end P1 and the third end P3, that is, alternately control the inductance L to be located in the first path and the second path, so as to adjust the current of the first end P1; that is to say, the voltage regulation circuit 01 (21, 22) can realize the same regulation function as the voltage regulation circuit 01 (21, 22) provided by the first configuration mode.
  • the voltage regulation circuit 23 can also be configured to alternately conduct the third path between the third terminal P3 and the first terminal P1, the third The fourth path between the end P3 and the second end P2, that is, alternately control the inductance L to be located in the third path and the fourth path, so as to adjust the current of the first end P1; that is, the voltage regulation circuit 01 can Realize the same adjustment function as that of the voltage adjustment circuit 01 (23, 24) provided by the second setting mode.
  • the voltage regulation circuit 02 provided in the setting method 3 combines the regulation function of the voltage regulation circuit (21, 22) in the setting method 1 and the regulation function of the voltage regulating circuit (23, 24) in the setting method 2 , so as to meet the positive pressure regulation and negative pressure regulation of the power circuit.
  • the voltage regulating circuit 01 can also be configured to: according to the voltage of the signal output terminal out, alternately conduct the fourth path between the third terminal P3 and the second terminal P2, the third The second path between the terminal P3 and the first terminal P1, the first path between the first terminal P1 and the second terminal P2, and connecting both ends of the inductance L to the second terminal P2, that is, alternately controlling the inductance L is sequentially located in the fourth path, the second path, the first path and both ends are connected to the second terminal P2, so as to adjust the current of the first terminal P1.
  • the voltage regulating circuit 02 outputs power to the inductor L through the second terminal P2 and the third terminal P3, or outputs power to the inductor L through the second terminal P2, so as to adjust the current of the first terminal P1.
  • the voltage regulation circuit 02 provided in the third setting method can be provided with a controller 20, and the first terminal P1 can be controlled by the controller 20 according to the voltage of the signal output terminal out. The current is adjusted.
  • the voltage regulation circuit 02 ( 25 ) further includes a fifth transistor M5 , a sixth transistor M6 , a seventh transistor M7 , and an eighth transistor in addition to the inductor L. M8, the fifth control terminal ctrl5, the sixth control terminal ctrl6, the seventh control terminal ctrl7, and the eighth control terminal ctrl8.
  • the gate of the fifth transistor M5 is connected to the fifth control terminal ctrl5, the source of the fifth transistor M5 is connected to the second terminal P2, and is connected to the positive pole (+) of the DC power supply S through the second terminal P2; the fifth transistor The drain of M5 is connected to the fourth node N4.
  • the gate of the sixth transistor M6 is connected to the sixth control terminal ctrl6, and the source of the sixth transistor M6 is connected to the second terminal P2, that is, the source of the sixth transistor M6 is connected to the DC power supply S through the second terminal P2. positive pole (+); the drain of the sixth transistor M6 is connected to the third node N3.
  • the gate of the seventh transistor M7 is connected to the seventh control terminal ctrl7, and the source of the seventh transistor M7 is connected to the first terminal P1, that is, the source of the seventh transistor M7 is connected to the transformation circuit 01 through the first terminal P1
  • the second input terminal a2; the drain of the seventh transistor M7 is connected to the third node N3.
  • the gate of the eighth transistor M8 is connected to the eighth control terminal ctrl8, the source of the eighth transistor M8 is connected to the fourth node N4, and the drain of the eighth transistor M8 is connected to the third terminal P3, that is, the eighth transistor M8 The drain is connected to the signal output terminal out through the third terminal P3.
  • a first end of the inductor L is connected to the third node N3, and a second end of the inductor L is connected to the fourth node N4.
  • the voltage regulation circuit five 25 may include a controller 20, the controller 20 is connected to the signal output terminal out, the fifth control terminal ctrl5, and the sixth control terminal ctrl6 , the seventh control terminal ctrl7, and the eighth control terminal ctrl8.
  • control mode 1 for the control of the power supply circuit using the voltage regulating circuit 5 25 , three different control modes are provided as follows: control mode 1, control mode 2, and control mode 3.
  • control process of the power circuit may include:
  • the controller 20 inputs the sixth control signal to the sixth control terminal ctrl6 and the seventh control signal to the seventh control terminal ctrl7, turns off the sixth transistor M6, and turns on the seventh transistor M7 (that is, The control inductance L and the first terminal P1 are kept in a conduction state); the fifth control signal is input to the fifth control terminal ctrl5, and the eighth control signal is input to the eighth control terminal ctrl8; and the fifth control signal and the eighth control signal are adjusted
  • the duty cycle of the signal periodically controls the duration of the fifth transistor M5 and the eighth transistor M8 being turned on alternately, so as to realize the same function as that of the voltage regulation circuit 121 in the aforementioned configuration mode 1.
  • I won't repeat them here please refer to the aforementioned related descriptions, here I won't repeat them here.
  • control process of the power circuit may include:
  • the fifth control signal is input to the fifth control terminal ctrl5, the eighth control signal is input to the eighth control terminal ctrl8, the fifth transistor M5 is turned off, and the eighth transistor M8 is turned on (that is, The control inductance L and the third terminal P3 maintain a conduction state); input the sixth control signal to the sixth control terminal ctrl6, and input the seventh control signal to the seventh control terminal ctrl7; and adjust the sixth control signal and the seventh control signal , periodically control the duration of the sixth transistor M6 and the seventh transistor M7 being turned on alternately, so as to realize the same function as the voltage regulation circuit 3 23 in the aforementioned configuration mode 2.
  • the aforementioned related descriptions which will not be repeated here. repeat.
  • control process of the power supply circuit can be divided into four control stages: the first control stage S1, the second control stage S2, the third control stage S3, and the fourth control stage S4, the specific control process may include:
  • the controller 20 inputs the fifth control signal to the fifth control terminal ctrl5, the sixth control signal to the sixth control terminal ctrl6, the seventh control signal to the seventh control terminal ctrl7, and the sixth control terminal ctrl7.
  • the eighth control terminal ctrl8 inputs the eighth control signal; and adjusts the duty cycle of the fifth control signal, the sixth control signal, the seventh control signal, and the eighth control signal, and periodically performs the first control stage S1 and the second control Stage S2, third control stage S3, fourth control stage S4.
  • the seventh transistor M7 and the eighth transistor M8 are turned on, and in the fifth control signal .
  • the fifth transistor M5 and the sixth transistor M6 are turned off, and the inductance L is located on the path between the third terminal P3 and the first terminal P1; in this case, when the first terminal When the voltage of P1 is greater than the voltage of the third terminal P3, the slope of the inductor current i is positive (corresponding to the solid line in the second control stage S2 in Figure 12), the inductor L is charged, and the power of the inductor is passed through the third terminal P3 output to the signal output terminal out to regulate the positive pressure of the first terminal P1.
  • the slope of the inductor current i is negative (corresponding to the dotted line in the second control stage S2 in Figure 12), the inductor L is discharged, and the power of the inductor is passed through the first
  • the two terminals P2 are output to the first capacitor C1 to regulate the negative voltage of the first terminal P1.
  • the voltage regulation circuit 6 26 may connect the third terminal P3 of the voltage regulation circuit 5 25 shown in FIG. 10 to the ground terminal GND; the voltage regulation circuit 6 Other connection relationships of other circuits of 26 remain unchanged, and the specific connection relationship of related circuits can refer to the description in the aforementioned voltage regulation circuit 5 25 , which will not be repeated here.
  • the voltage regulation circuit six 26 may include a controller 20, the controller 20 is connected to the signal output terminal out, the fifth control terminal ctrl5, and the sixth control terminal ctrl6 , the seventh control terminal ctrl7, and the eighth control terminal ctrl8.
  • the control method of the aforementioned control mode 1 can be adopted (refer to the above), in this case, the structure of the voltage regulating circuit 6 26 is the same as that of the aforementioned voltage regulating circuit 2 22 (refer to FIG. 4a , FIG. 4b) have the same structure, so as to realize the same function as that of the voltage regulation circuit 222 in the aforementioned configuration mode 1.
  • the structure of the voltage regulating circuit 6 26 is the same as that of the aforementioned voltage regulating circuit 2 22 (refer to FIG. 4a , FIG. 4b) have the same structure, so as to realize the same function as that of the voltage regulation circuit 222 in the aforementioned configuration mode 1.
  • the control method of the aforementioned control mode 2 can be adopted (refer to the above), in this case, the structure of the voltage regulating circuit 6 26 is the same as that of the aforementioned voltage regulating circuit 4 24 (refer to FIG. 9a and FIG. 9b ) have the same structure, so as to realize the same function as the voltage regulation circuit 4 24 in the aforementioned arrangement mode 2.
  • the structure of the voltage regulating circuit 6 26 is the same as that of the aforementioned voltage regulating circuit 4 24 (refer to FIG. 9a and FIG. 9b ) have the same structure, so as to realize the same function as the voltage regulation circuit 4 24 in the aforementioned arrangement mode 2.
  • control method of the aforementioned control mode 3 can be adopted.
  • each control stage (S1, S2, S3, S4) in the aforementioned control mode 3. The difference between the two is only: because The third terminal P3 of the voltage regulating circuit 626 is connected to the ground terminal GND, therefore, all the power of the inductor L is output to the DC power supply through the second terminal P2.
  • the specific structure of the voltage transformation conversion circuit 01 is not limited in this application, and it can be selected and set according to actual needs.
  • the voltage transformation conversion circuit 01 may include four transistors (M a , M b , M c , M d ), a capacitor C a , two inductors (L a , L b ), transformer T10; wherein, the transformer T10 includes a primary winding S1 and two secondary windings (S2, S3).
  • the transistor Ma and the transistor Mb are connected in series between the two input terminals (a1, a2) of the voltage transformation conversion circuit 01, and one end of the inductor L a is connected to Connect the node between the transistor M a and the transistor M b , the other end of the inductor L a is connected to the first end of the capacitor C a , the second end of the capacitor C a is connected to the end of the same name of the primary winding S1; the inductor L b One end is connected to the terminal with the same name of the primary winding S1, the other end of the inductance L b is connected to the second input terminal a2 of the transformer conversion circuit 01, and the non-identical terminal of the primary winding S1 is connected to the second input terminal a2; the secondary winding S2 The terminal with the same name of the secondary winding S2 is connected to the second output terminal b2 through the transistor Mc , the non-identical terminal of the secondary
  • the voltage transformation conversion circuit 01 may include multiple capacitors (C1, C2...Cn), multiple first switches S1, multiple second switches S2 ;
  • the first switch S1 and the second switch S2 adopt complementary timing, that is, when the first switch S1 is turned on, the second switch S2 is turned off; when the first switch S1 is turned off, the second switch S2 is turned on; schematically, the first The switch S1 and the second switch S1 may use transistors, but are not limited thereto.
  • the first end of the capacitor C1 is connected to the first input terminal a1 of the voltage transformation conversion circuit 01 through a first switch S1, and the second end of the capacitor C1 is passed through
  • a first switch S1 is connected to the second input terminal a2 of the transformation circuit 01, and the second terminal of the capacitor C1 is connected to the ground terminal GND through a second switch S2;
  • multiple capacitors (C2, C3...Cn) The first ends of the capacitors are respectively connected to the first output end b1 through a first switch S1, and the second ends of multiple capacitors (C2, C3...Cn) are respectively connected to the second output end b2 through a first switch S1;
  • the capacitors (C2, C3...Cn) are connected in series through a second switch S2; the first end of the capacitor C2 is also connected to the first end of the capacitor C1 through a second switch S2.
  • controller 20 does not limit the specific structure of the aforementioned controller 20 , which can be selected and set according to actual needs.
  • the specific structure of the controller 20 will be schematically described below in conjunction with the power supply circuit shown in FIG. 3b.
  • the controller 20 may include an operational amplifier A1 and a comparator A2; wherein, the non-inverting input terminal (+) of the operational amplifier A1 is connected to the reference voltage terminal Ref (via The reference voltage terminal Ref inputs the reference setting voltage, such as 1V), the inverting input terminal (-) of the operational amplifier A1 is connected to the signal output terminal out, and the output terminal EA_O of the operational amplifier A1 is connected to the inverting input terminal ( -) connection, the stability of the negative feedback loop is maintained by the frequency compensation module; in addition, the output terminal EA_O of the operational amplifier A1 is connected with the non-inverting input terminal (+) of the comparator A2, and the inverting input terminal (-) of the comparator A2 ) input the sawtooth wave Sw; in addition, the output terminal of the comparator A2 is connected with the first control terminal ctrl1 in the transformer conversion circuit 01, and the output terminal of the comparator A2 is

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Abstract

本申请提供了一种电源电路及终端设备，涉及电源电压调节领域，能够在实现高压输入、低压大电流输出的同时，减小电源电路的体积；该电源电路包括直流电源、变压转换电路、电压调节电路、第一电容、第二电容、信号输出端；变压转换电路被配置为：将输入端输入的电压进行转换后通过输出端输出；电压调节电路被配置为：根据信号输出端的电压，控制电感调整第一端的电流；变压转换电路的第一输入端与直流电源的正极电连接，变压转换电路的第二输入端与电压调节电路的第一端电连接；变压转换电路的第一输出端与信号输出端电连接，变压转换电路的第二输出端电连接到接地端；电压调节电路的第二端与直流电源的正极连接；电压调节电路的第三端与变压转换电路的第一输出端或第二输出端连接。

Description

电源电路及终端设备 技术领域
本申请涉及电源电压调节领域，尤其涉及一种电源电路及终端设备。
背景技术
目前对高压输入、低压大电流输出的电源电路的需求越来越多，同时对于设备而言通常要求电源电路具备高效率、小体积(或者说小的占板面积)等特点，以满足其应用需求。
如图1所示，相关技术中提供了一种高压输入、低压大电流输出的电源电路，该电源电路采用在高压输入端将一个开环模式的变压电路1和一个闭环模式的buck电路2串联在一起，在低压输出端out将变压电路1和buck电路2并联在一起。在该电源电路中，变压电路1负责实现一个大电流的输出功能，但是由于其工作在开环模式下，不能直接调节输出电压Vout，因此需要通过工作在闭环模式下的buck电路2，来进行输出电压Vout的调节，以保证输出电压的稳定性。
然而，对于图1中的电源电路而言，当变压电路1的输入电压变化较大时，buck电路2为了满足对输出电压Vout的调节，其内部设置的功率电感需要将所有的功率输出至低压输出端out，使得流经功率电感的电流较大，因此需要采用较大体积的功率电感来满足需求，进而造成电源电路体积减小受到限制。
发明内容
本申请实施例提供一种电源电路及终端设备，能够在实现高压输入、低压大电流输出的同时，减小电源电路的体积。
本申请提供一种电源电路，包括直流电源、变压转换电路、电压调节电路、第一电容、第二电容、信号输出端；其中，电压调节电路包括电感、第一端、第二端、第三端；变压转换电路包括第一输入端、第二输入端、第一输出端、第二输出端；变压转换电路的第一输入端与直流电源的正极电连接，变压转换电路的第二输入端与电压调节电路的第一端电连接；变压转换电路的第一输出端与信号输出端电连接，变压转换电路的第二输出端电连接到接地端；电压调节电路的第二端与直流电源的正极电连接；电压调节电路的第三端与变压转换电路的第一输出端或第二输出端电连接；直流电源的负极电连接到接地端；第一电容的两端电连接在变压转换电路的第一输入端和第二输入端之间；第二电容的两端电连接在变压转换电路的第一输出端和第二输出端之间；变压转换电路被配置为：将第一输入端和第二输入端输入的电压进行转换后通过第一输出端和第二输出端输出；电压调节电路被配置为：根据信号输出端的电压，控制电感调整第一端的电流。
综上所述，在本申请实施例提供的电源电路中，通过设置电压调节电路的第一端与变压转换电路的第二输入端连接，第二端与直流电源的正极连接，第三端与变压转换电路的第一输出端或第二输出端连接；在此情况下，通过能够根据信号输出端的电压，控制电感来调整第一端的电流，并且能够在变压转换电路的输入端电压发生较大的变化(也可以说 信号输出端的电压发生较大变化)的情况下，保证电感上的电流不发生明显变大(即电感维持在低电流)，从而也就避免了相关技术中因将全部功率输出至信号输出端out导致的电感体积大的问题，进而有利于电源电路的体积减小。
在一些可能实现的方式，电压调节电路还包括控制器，控制器根据信号输出端的电压，控制电感来调整第一端的电流。
在一些可能实现的方式，电压调节电路被配置为：根据信号输出端的电压交替导通第一通路和第二通路，以控制电感调整第一端的电流；其中，第一通路为第一端与第二端之间的通路，第二通路为第一端和第三端之间的通路；在此情况下，能够通过第二端和第三端对电感进行功率输出，或者通过第二端对电感进行功率输出，也即电感的部分功率通过第三端输出至信号输出端，部分功率通过第二端输出至直流电源；或者，电感的全部功率通过第二端输出至直流电源，以实现调整第一端的电流。
在一些可能实现的方式中，电压调节电路还包括第一晶体管、第二晶体管、第一控制端、第二控制端；第一晶体管的栅极与第一控制端电连接，第一晶体管的第一极与第二端电连接，第一晶体管的第二极与第一节点电连接；第二晶体管的栅极与第二控制端电连接，第二晶体管的第一极与第一节点电连接；第二晶体管的第二极与第三端电连接；电感的一端与第一端电连接，电感的另一端与第一节点电连接。
在一些可能实现的方式中，电压调节电路包括控制器；控制器与信号输出端、第一控制端、第二控制端电连接；控制器配置为：根据信号输出端的电压，向第一控制端输入第一控制信号，向第二控制端输入第二控制信号，并调节第一控制信号以及第二控制端的占空比，以控制交替开启第一晶体管和第二晶体管的时长。
在一些可能实现的方式中，电压调节电路被配置为：根据信号输出端的电压交替导通第二通路和第三通路，以控制电感调整第一端的电流；其中，所述第二通路为第三端与第一端之间的通路，第三通路为第三端和第二端之间的通路；在此情况下，能够通过第一端和第三端对电感进行功率输出，或者通过第一端对电感进行功率输出；也即将电感的部分功率通过第三端输出至信号输出端，部分功率通过第一端输出至第一电容；或者，将电感的全部功率通过第一端输出至第一电容；以调整第一端的电流。
在一些可能实现的方式中，电压调节电路还包括第三晶体管、第四晶体管、第三控制端、第四控制端；第三晶体管的栅极与第三控制端电连接，第三晶体管的第一极与第二端电连接，第三晶体管的第二极与第二节点电连接；第四晶体管的栅极与第四控制端电连接，第四晶体管的第一极与第一端电连接，第四晶体管的第二极与第二节点电连接；电感的一端与第二节点电连接，电感的另一端与第三端电连接。
在一些可能实现的方式中，电压调节电路包括所述控制器；控制器与信号输出端、第三控制端、第四控制端电连接；控制器配置为：根据信号输出端的电压，向第三控制端输入第三控制信号，向第四控制端输入第四控制信号，并调节第三控制信号和第四控制信号的占空比，以控制交替开启第三晶体管和第四晶体管的时长。
在一些可能实现的方式中，电压调节电路被配置为：根据信号输出端的电压交替导通第三通路、第二通路、第一通路以及将电感的两端均连接到第二端，以控制电感调整第一端的电流；其中，第三通路为第三端与所述第二端之间的通路，第二通路为第三端与第一端之间的通路，第一通路为第一端与第二端之间的通路。
在一些可能实现的方式中，电压调节电路还包括第五晶体管、第六晶体管、第七晶体管、第八晶体管、第五控制端、第六控制端、第七控制端、第八控制端；第五晶体管的栅极与第五控制端电连接，第五晶体管的第一极与第二端电连接，第五晶体管的第二极与第四节点电连接；第六晶体管的栅极与第六控制端电连接，第六晶体管的第一极与第二端电连接，第六晶体管的第二极与第三节点电连接；第七晶体管的栅极与第七控制端电连接，第七晶体管的第一极与第一端电连接，第七晶体管的第二极与第三节点电连接；第八晶体管的栅极与第八控制端电连接，第八晶体管的第一极与第四节点电连接，第八晶体管的第二极与第三端电连接；电感的一端与第三节点电连接，电感的另一端与第四节点电连接。
在一些可能实现的方式中，电压调节电路包括控制器；控制器与信号输出端、第五控制端、第六控制端、第七控制端、第八控制端电连接；该控制器配置为：向第六控制端输入第六控制信号、向第七控制端输入第七控制信号，关闭第六晶体管，开启第七晶体管；并根据信号输出端的电压，向第五控制端输入第五控制信号，向第八控制端输入第八控制信号，调节第五控制信号和第八控制信号的占空比，以控制交替开启第五晶体管和第八晶体管的时长。
在一些可能实现的方式中，电压调节电路包括控制器；控制器与信号输出端、第五控制端、第六控制端、第七控制端、第八控制端电连接；控制器配置为：向第五控制端输入第五控制信号，向第八控制端输入第八控制信号，关闭第五晶体管，开启第八晶体管；并根据信号输出端的电压，向第六控制端输入第六控制信号，向第七控制端输入第七控制信号，调节第六控制信号和第七控制信号的占空比，以控制交替开启第六晶体管和第七晶体管的时长。
在一些可能实现的方式中，电压调节电路包括控制器；控制器与信号输出端、第五控制端、第六控制端、第七控制端、第八控制端电连接；控制器配置为：根据信号输出端的电压，向第五控制端输入第五控制信号的占空比、向第六控制端输入第六控制信号、向第七控制端输入第七控制信号、向第八控制端输入第八控制信号，并调节第五控制信号、第六控制信号、第七控制信号、第八控制信号的占空比，以周期性依次进行第一控制阶段、第二控制阶段、第三控制阶段、第四控制阶段。其中，第一控制阶段包括：关闭第五晶体管和第七晶体管，控制开启第六晶体管和第八晶体管的时长；第二控制阶段包括：关闭第五晶体管和第六晶体管，控制开启第七晶体管和第八晶体管的时长；第三控制阶段包括：关闭第六晶体管和第八晶体管，控制开启第五晶体管和第七晶体管的时长；第四控制阶段包括：关闭第七晶体管和第八晶体管，控制开启第五晶体管和第六晶体管的时长。
本申请实施例还提供一种终端设备，包括负载模块以及如前述任一种实施例提供的电源电路；该电源电路通过信号输出端与负载模块连接。
附图说明
图1为本申请相关技术提供的一种电源电路的示意图；
图2a为本申请实施例提供的一种电源电路的示意图；
图2b为本申请实施例提供的一种电源电路的示意图；
图3a为本申请实施例提供的一种电源电路的示意图；
图3b为本申请实施例提供的一种电源电路的示意图；
图4a为本申请实施例提供的一种电源电路的示意图；
图4b为本申请实施例提供的一种电源电路的示意图；
图5为本申请实施例提供的一种电源电路中电压调节电路的电流调节示意图；
图6为本申请实施例提供的一种电源电路中电压调节电路的电流调节示意图；
图7为本申请实施例提供的一种电源电路中电压调节电路的电流调节示意图；
图8a为本申请实施例提供的一种电源电路的示意图；
图8b为本申请实施例提供的一种电源电路的示意图；
图9a为本申请实施例提供的一种电源电路的示意图；
图9b为本申请实施例提供的一种电源电路的示意图；
图10为本申请实施例提供的一种电源电路的示意图；
图11为本申请实施例提供的一种电源电路中的电压调节电路的控制示意图；
图12为本申请实施例提供的一种电源电路中的电压调节电路的电流调节示意图；
图13为本申请实施例提供的一种电源电路的示意图；
图14为本申请实施例提供的一种电源电路中变压转换电路的示意图；
图15为本申请实施例提供的一种电源电路中变压转换电路的示意图；
图16为本申请实施例提供的一种电源电路中控制器的示意图；
图17为图16中的控制器的相关控制信号示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请中的附图，对本申请中的技术方案进行清楚地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书实施例和权利要求书及附图中的术语“第一”、“第二”等仅用于区分描述的目的，而不能理解为指示或暗示相对重要性，也不能理解为指示或暗示顺序。“至少一个(项)”是指一个或者多个，“多个”是指两个或两个以上。“连接”、“相连”等类似的词语，用于表达不同组件、器件之间的互通或互相作用，可以包括直接相连或通过其他组件、器件间接相连。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元。方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。“上”、“下”、“左”、“右”等仅用于相对于附图中的部件的方位而言的，这些方向性术语是相对的概念，它们用于相对于的描述和澄清，其可以根据附图中的部件所放置的方位的变化而相应地发生变化。
本申请实施例提供一种终端设备，该终端设备可以为手机、电视、平板电脑、笔记本、车载电脑、智能手表、智能手环等电子产品，本申请实施例对该终端设备的具体形式不做特殊限制。
上述终端设备中设置有电源电路以及与电源电路的信号输出端连接的负载模块，该电源电路能够实现高压输入、低压大电流输出的功能，以满足负载模块的用电需求。
本申请中对于上述负载模块的设置形式不做限制，例如，该负载模块可以是芯片、功 率器件、处理器等。
在本申请实施例提供的终端设备中，电源电路通过采用功率电感的调节作用，在满足该电源电路高压输入、低压大电流输出的同时，能够将功率电感的部分或全部功率输出至信号输出端以外的其他端口，保持功率电感上的电流不发生明显变化，从而也就避免了功率电感体积大的问题，进而有利于电源电路的小体积需求。
以下对本申请实施例提供的电源电路的设置结构进行具体说明。
参考图2a所示，本申请实施例提供一种电源电路，该电源电路包括直流电源S、变压转换电路01、电压调节电路02、第一电容C1、第二电容C2、信号输出端out(也可以称为功率输出端、电压输出端等)。
变压转换电路01包括第一输入端a1、第二输入端a2、第一输出端b1、第二输出端b2；该变压转换电路01被配置为将第一输入端a1和第二输入端a2输入的电压进行转换后通过第一输出端b1和第二输出端b2输出。示意的，该变压转换电路01可以是将输入端(a1、a2)的电压进行降压转换后通过输出端(b1、b2)进行输出，也可以是将输入端(a1、a2)的电压进行升压转换后通过输出端(b1、b2)进行输出；本申请以下实施例均是以变压转换电路01进行降压转换为例进行说明的。
对于上述变压转换电路01而言，可以理解的是，变压转换电路01自身具有一定的变压比，能够将输入端(a1、a2)输入的电压按照变压比进行转换后通过输出端(b1、b2)输出；在此情况下，在输入端(a1、a2)输入的电压增加时，输出端(b1、b2)输出的电压按照变压比对应增加；在输入端(a1、a2)输入的电压减小时，输出端(b1、b2)输出的电压按照变压比对应减小。当然，本申请中对于该变压转换电路01的变压比大小不作具体限制；示意的，以变压转换电路01的变压比为45:1为例，当该变压转换电路01的输入端(a1、a2)输入45V的电压时，通过该变压转换电路01进行降压转换后输出端(b1、b2)输出的电压则为1V；当变压转换电路01的输入端(a1、a2)输入大于45V的电压时，输出端(b1、b2)输出的电压则会大于1V，当变压转换电路01的输入端(a1、a2)输入小于45V的电压时，输出端(b1、b2)输出的电压则会小于1V。
参考图2a所示，上述电压调节电路02包括电感L、第一端P1、第二端P2、第三端P3。该电压调节电路02被配置为根据信号输出端out的电压，控制电感L来调整第一端P1的电流。示意的，参考图2b所示，在一些可能实现的方式中，该电压调节电路02中可以包括控制器20，通过该控制器20根据信号输出端out的电压，控制电感L来调整第一端P1的电流。
参考图2a、图2b所示，在该电源电路中，上述直流电源S、变压转换电路01、电压调节电路02、第一电容C1、第二电容C2、信号输出端out之间的电连接(下文均简写为“连接”)关系可以如下：
变压转换电路01的第一输入端a1与直流电源S的正极(+)连接，直流电源S的负极(-)连接到接地端GND；变压转换电路01的第二输入端a2与电压调节电路02的第一端P1连接；变压转换电路01的第一输出端b1与信号输出端out连接，变压转换电路01的第二输出端b2连接到接地端GND。
第一电容C1的两端连接在变压转换电路01的第一输入端a1和第二输入端a2之间；在此情况下，通过该第一电容C1能够保证通过第一输入端a1和第二输入端a2向变压转 换电路01提供稳定的输入电压。
第二电容C2的两端连接在变压转换电路01的第一输出端b1和第二输出端b2之间，在此情况下，通过该第二电容C2能够保证通过变压转换电路01通过第一输出端b1和第二输出端b2之间具有稳定的输出电压，进而通过信号输出端out向负载模块进行稳定的供电。
电压调节电路02的第二端P2与直流电源S的正极(+)连接。
对于电压调节电路02的第三端P3而言，在一些可能实现的方式中，参考图2a所示，第三端P3可以与变压转换电路01的第一输出端b1连接，也即第三端P3连接到信号输出端out；在另一些可能实现的方式中，第三端P3可以与变压转换电路01的第二输出端b2连接，也即第三端P3通过图2a中的虚线连接到接地端GND。
该电压调节电路02通过控制电感L的充放电来调整第一端P1的电流，实现对变压转换电路01的输入端(a1、a2)的电压进行调整，进而控制变压转换电路01的输出端(b1、b2)达到稳态的设定输出电压(也即信号输出端out达到设定的稳态输出电压)，以满足与信号输出端out连接的负载模块的正常供电需求。
另外，在上述电压调节电路02中，第一端P1和第二端P2均不与信号输出端out连接，该电压调节电路02能够根据信号输出端out的电压控制电感L进行充放电来调整第一端P1的电流，能够通过具有较高电压(相比于低压的信号输出端out)的第一端P1或第二端P2对电感进行部分或全部的功率输出，也即避免了将电感L的全部功率通过第三端P3输出至低压的信号输出端out，从而保证电感上的电流不发生明显变大(即电感维持在低电流)。
例如，在一些可能实现的方式中，该电压调节电路02可以通过第二端P2和第三端P3对电感L进行功率输出，以使得电感的部分功率通过第三端P3输出至信号输出端out，部分功率通过第二端P2输出至直流电源S，从而保证电感L上的电流不发生明显变大。
又例如，在一些可能实现的方式中，该电压调节电路02可以仅通过第二端P2对电感进行功率输出，也即将电感的全部功率通过第二端P2输出至直流电源S，在此情况下，因此，相较于相关技术中因将电感的全部功率输出至低压的信号输出端out，而导致电感L的电流大、体积大而言，由于第二端P2与直流电源S的正极(+)连接，也即第二端P2的电压要大于信号输出端out的低压，通过将电感的全部功率输出至有较高电压的第二端P2，从而保证电感L上的电流不发生明显变大。
综上所述，在本申请实施例提供的电源电路中，通过设置电压调节电路02的第一端与变压转换电路01的第二输入端a2连接，第二端P2与直流电源S的正极(+)连接，第三端P3与变压转换电路01的第一输出端b1或第二输出端b2连接；在此情况下，通过能够根据信号输出端out的电压，控制电感L来调整第一端P1的电流，并且能够在变压转换电路01的输入端电压发生较大的变化(也可以说信号输出端out的电压发生较大变化)的情况下，保证电感上的电流不发生明显变大(即电感维持在低电流)，从而也就避免了相关技术中因将全部功率输出至信号输出端out导致的电感体积大的问题，进而有利于电源电路的体积减小。
以下分别对上述电压调节电路02和变压转换电路01的具体设置方式进行进一步的说明。
示意的，以下提供三种不同设置方式下的电压调节电路02的具体电路结构。
设置方式一
在该设置方式一中，参考图3a、图4a所示，该电压调节电路02可以被配置为：根据信号输出端out的电压，交替导通第一端P1与第二端P2之间的第一通路、第一端P1与第三端P3之间的第二通路，也即交替控制电感L位于第一通路和第二通路，以对第一端P1的电流进行调整。
当然，作为另一种可能实现的方式，如图3b、图4b所示，在电压调节电路02包括控制器20的情况下，该电压调节电路02可以通过控制器20根据信号输出端out的电压，交替导通第一端P1与第二端P2之间的第一通路、第一端P1与第三端P3之间的第二通路，以对第一端P1的电流进行调整。
在此情况下，该电压调节电路02通过第二端P2和第三端P3对电感L进行功率输出(可参考下文的电压调节电路一21)或者通过第二端P2对电感L进行功率输出(可参考下文的电压调节电路二22)，以对第一端P1的电流进行调整。
示意的，以下提供两种能够满足该设置方式一中电压调节电路02的调节功能的电路结构(电压调节电路一21和电压调节电路二22)。
电压调节电路一21
如图3a所示，在一些可能实现的方式中，该电压调节电路一21(02)可以在包括电感L的基础上，还包括第一晶体管M1、第二晶体管M2、第一控制端ctrl1、第二控制端ctrl2。
需要说明的是，图3a中仅是示意的以第一晶体管M1、第二晶体管M2均采用P型晶体管，例如可以是P型金属氧化物半导体场效应晶体管(positive metal oxide semiconductor field effect transistor，可简称为PMOS管)，但本申请并不限制于此；在一些实施例中第一晶体管M1、第二晶体管M2也可以采用N型晶体管，例如，可以是N型金属氧化物半导体场效应晶体管(negative metal oxide semiconductor field effect transistor，可简称为NMOS管)。另外，在本申请实施例中，对于晶体管中除了栅极以外的两个极(第一极和第二极)，一个为源极，另一个为漏极，两者不做明确区分；例如，第一极为源极，则第二极为漏极；或者，第一极为漏极，则第二极为源极。类似的，如下文中涉及的其他晶体管均是如此，下文不再赘述。
参考图3a所示，第一晶体管M1的栅极与第一控制端ctrl1连接，第一晶体管M1的源极与第二端P2连接，并通过第二端P2连接到直流电源S的正极(+)；第一晶体管M1的漏极与第一节点N1连接；第二晶体管M2的栅极与第二控制端ctrl2连接，第二晶体管M2的源极与第一节点N1连接；第二晶体管M2的漏极与第三端P3连接，也即第二晶体管M2的漏极通过第三端P3连接到信号输出端out；电感L的第一端与第一节点N1连接，该电感L的第二端与第一端P1连接，也即该电感L的第二端通过第一端P1连接到变压转换电路01的第二输入端a2。
作为上述电压调节电路一21的另一个可替代的实现方式中，如图3b所示，该电压调节电路一21可以包括控制器20，该控制器20与信号输出端out、第一控制端ctrl1、第二控制端ctrl2连接；其他连接关系与图3a基本一致，此处不再赘述。
参考图3b所示，对于采用该电压调节电路一21的电源电路的控制而言，可以通过控 制器20根据信号输出端out的电压，向第一控制端ctrl1输入第一控制信号，向第二控制端ctrl2输入第二控制信号，并调节第一控制信号和第二控制信号的占空比，周期性的控制第一晶体管M1和第二晶体管M2交替开启(或者说导通)的时长，从而周期性控制电感L位于第一端P1与第二端P2之间的第一通路、第一端P1与第三端P3之间的第二通路上的充放电时长；在此情况下，该电压调节电路一21能够通过第二端P2和第三端P3对电感L进行功率输出，也即电感的部分功率通过第三端P3输出至信号输出端out，部分功率通过第二端P2输出至直流电源S；进而实现对第一端P1的电流调节，以使得信号输出端out达到设定的稳态输出电压。
电压调节电路二22
如图4a所示，在另一些可能实现的方式中，电压调节电路二22可以将上述图3a中示出的电压调节电路一21的第三端P3连接到接地端GND；在此情况下，电压调节电路02根据信号输出端out的电压，切换控制电感L分别位于第一端P1与第二端P2之间的通路、第一端P1与第三端P3之间的通路，并通过第二端P2对电感L进行功率输出，也即功率电感的全部功率通过第二端P2输出至直流电源S。
对于电压调节电路二22的其他电路连接关系可以对应参考前述电压调节电路一21中的相关描述，此处不再赘述。
作为上述电压调节电路二22的另一个可替代的实现方式中，如图4b所示，该电压调节电路二22可以包括控制器20，该控制器20与信号输出端out、第一控制端ctrl1、第二控制端ctrl2连接。
参考图4b所示，对于采用该电压调节电路二22的电源电路的控制而言，可以通过控制器20根据信号输出端out的电压，向第一控制端ctrl1输入第一控制信号，向第二控制端ctrl2输入第二控制信号，并调节第一控制信号和第二控制信号的占空比，周期性的控制第一晶体管M1和第二晶体管M2交替开启(或者说导通)的时长，从而周期性控制电感L位于第一端P1与第二端P2之间的第一通路、第一端P1与第三端P3之间的第二通路上的充放电时长；在此情况下，该电压调节电路二22能够通过第二端P1对电感L进行功率输出，也即将功率电感的全部功率通过第二端P2输出至直流电源S，进而实现对第一端P1的电流调节，以使得信号输出端out达到设定的稳态输出电压。
示意的，以图3a中示出的第一电压调节电路21为例，以下结合第一晶体管M1和第二晶体管M2的控制，对一个控制周期T内电感L进行一次充放电过程进行说明。
参考图5所示，在一个控制周期T的前t1时段内，第二晶体管M2在接收第二控制端ctrl2输入的第二控制信号的控制下开启，第一晶体管M1在第一种控制端ctrl1输入的第一控制信号的控制下关闭(或者说截止)，此时电感L进行充电，并通过第三端P3进行功率输出；在此情况下，第一端P1的电流i增加，使得变压转换电路01的输入端(a1、a2)的电压增加，进而调整变压转换电路01的输出端(b1、b2)电压增大。
在一个控制周期T中，t1时段之后的t2时段内，第一晶体管M1在第一控制端ctrl1输入的第一控制信号的控制下开启，第二晶体管M2在第二控制端ctrl2输入的第二控制信号的控制下关闭，此时电感L进行放电，并通过第二端P2进行功率输出；在此情况下，第一端P1的电流i减小，使得变压转换电路01的输入端(a1、a2)的电压减小，进而调整变压转换电路01的输出端(b1、b2)电压减小。
当然，实际在对第一端P1的电流进行调整时，第一晶体管M1和第二晶体管M2为周期性的控制过程，而对于第一端P1的电流调节，以流经电感的平均电流为实际参考电流。示意的，参考图5所示，在多个控制周期T下，如果一个控制周期T结束时的电感电流与开始时的电感电流基本一致，则表示电感的平均电流没有变化，此时第一端P1的电流基本不发生变化。参考图6所示，在多个控制周期T下，如果一个控制周期T结束时的电感电流大于开始时的电感电流，则表示电感的平均电流增大，此时第一端P1的电流逐渐增大。参考图7所示，在多个控制周期T下，如果一个控制周期T结束时的电感电流小于开始时的电感电流，则表示电感的平均电流减小，此时第一端P1的电流逐渐减小。以下结合图5、图6、图7对控制信号输出端out达到设定的稳态输出电压的过程进行示意说明。
首先，为了对第一控制端ctrl1输入的第一控制信号和第二控制端ctrl2输入第二控制信号进行示意，图5、图6、图7将第一控制信号表示为ctrl1，第二控制信号表示为ctrl2，而不应该被视为不清楚。另外，可以理解的是，对于图3a的电源电路中采用PMOS管的第一晶体管M1和第二晶体管M2而言，在此情况下，第一控制信号(ctrl1)和第二控制信号(ctrl2)中的低电平电位作为晶体管(M1、M2)的有效开启电位。
参考图3a所示，假设直流电源S的电压为50V，信号输出端out的设定输出电压为1V，变压转换电路01的输入端(a1、a2)的电压为45V；可以理解的是，在电源电路的控制过程，对于信号输出端out的电压调整可以分为三种状态：
一、在信号输出端out的电压为1V(即设定输出电压)时，则需要控制信号输出端out的电压稳定在1V，即稳压调节。
二、在信号输出端out的电压小于1V(即小于设定输出电压)时，则需要控制信号输出端out的电压增大至1V，即增压调节。
三、在信号输出端out的电压大于1V(即大于设定输出电压)时，则需要控制信号输出端out的电压减小至1V，即降压调节。
参考图5所示，以第一控制信号(ctrl1)和第二控制信号(ctrl2)的周期T＝10t为例；在进行稳压调节的过程，假设第一控制信号(ctrl1)的占空比D1为0.4，第二控制信号(ctrl2)的占空比D2为0.6；这样一来，在每一个控制周期T的前4t时段内，第二晶体管M2在第二控制信号(ctrl2)的低电位控制下开启，第一晶体管M1在第一控制信号(ctrl1)的高电位控制下的关闭；在每一个控制周期T的后6t时段内，第一晶体管M1在第一控制信号(ctrl1)的低电位控制下的导通，第二晶体管M2在第二控制信号(ctrl2)的高电位控制下关闭；并且在该稳压调节过程中，电感的平均电流没有变化，从而保证信号输出端out的电压维持在设定输出电压(1V)。
相比于前述稳压调节的过程，在进行增压调节的过程中(也即信号输出端out的实际电压小于设定输出电压1V)，参考图6所示，可以调整增加第一控制信号(ctrl1)的占空比D1(如D1＝0.5)，减小第二控制信号(ctrl2)的占空比D2(如D2＝0.5)，以延长电感L的充电时长，缩短电感L的放电时长；这样一来，在一个控制周期T内，第二晶体管M2在第二控制信号(ctrl2)的低电位控制下的导通时长为5t，第一晶体管M1在第一控制信号(ctrl1)的低电位控制下的导通时长为5t；在此情况下，在多个控制周期T下，电感的平均电流增加，第一端P1的平均电流增加，从而使得变压转换电路01的输入端(a1、 a2)的电压增加，进而调整信号输出端out电压增加至设定输出电压(1V)。当然，在信号输出端out增加至设定输出电压(1V)之后，可以进入前述稳压调节，以保证信号输出端out稳定在设定输出电压(1V)。
另外，相比于前述稳压调节的过程，在进行减压调节的过程中(也即信号输出端out的实际电压大于设定输出电压1V)，参考图7所示，可以调整增加第一控制信号(ctrl1)的占空比D1(如D1＝0.7)，减小第二控制信号(ctrl2)的占空比D2(如D2＝0.3)，以减小电感L的充电时长，增加电感L的放电时长；这样一来，在一个控制周期T内，第二晶体管M2在第二控制信号(ctrl2)的低电位控制下的导通时长为3t，第一晶体管M1在第一控制信号(ctrl1)的低电位控制下的导通时长为7t；在此情况下，在多个控制周期T下，电感的平均电流减小，第一端P1的平均电流减小，从而使得变压转换电路01的输入端(a1、a2)的电压减小，进而调整信号输出端out的电压下降至设定输出电压(1V)。当然，在信号输出端out减小至设定输出电压(1V)之后，可以进入前述稳压调节，以保证信号输出端out稳定在设定输出电压(1V)。
此处需要说明的是，对于采用设置方式一的两种电压调节电路(21、22)的电源电路而言，参考图3a和图4a所示，如果需要保证电压调节电路02能够对第一端P1的电流进行正常调节，则应保证直流电源S的电压至少要大于变压转换电路01的输入端(a1、a2)的设定电压，也即电压调节电路02的第一端P1的电压不能为负压；假设第一端P1的电压为负压，则会出现无论是第一晶体管M1开启，还是第二晶体管M2开启，电感电流只能单向从第一节点N1流向第三端P3并一直减小，从而也就无法实现对第一端P1的电流调整，进而无法控制信号输出端out的电压；也就是说，该采用设置方式一中提供的电压调节电路的电源电路仅可以实现正压调节，而无法实现负压调节。
设置方式二
在该设置方式二中，参考图8a、图9a所示，该电压调节电路02可以被配置为：根据信号输出端out的电压，交替导通第三端P3与第一端P1之间的第三通路、第三端P3与第二端P2之间的第四通路，也即交替控制电感L位于第三通路和第四通路，以对第一端P1的电流进行调整。
当然，作为另一种可能实现的方式，如图8b、图9b所示，在电压调节电路02包括控制器20的情况下，该电压调节电路02可以通过控制器20根据信号输出端out的电压，交替导通第三端P3与第一端P1之间的第二通路、第三端P3与第二端P2之间的第三通路，以对第一端P1的电流进行调整。
在此情况下，该电压调节电路02通过第一端P1和第三端P3进行功率输出(可参考下文的电压调节电路三23)或者通过第一端P1进行功率输出(可参考下文的电压调节电路四24)，以对第一端P1的电流进行调整。
示意的，以下提供两种能够满足该设置方式二中电压调节电路02的调节功能的电路结构(电压调节电路三23和电压调节电路四24)。
电压调节电路三23
如图8a所示，在一些可能实现的方式中，该电压调节电路三23(02)可以在包括电感L的基础上，还包括第三晶体管M3、第四晶体管M4、第三控制端ctrl3、第四控制端ctrl4。
第三晶体管M3的栅极与第三控制端ctrl3连接，第三晶体管M3的源极与第二端P2连接，并通过第二端P2连接到直流电源S的正极(+)；第三晶体管M3的漏极与第二节点N2连接；第四晶体管M4的栅极与第四控制端ctrl4连接，第四晶体管M4的源极与第一端P1连接，也即第四晶体管M4的源极通过第一端P1连接到变压转换电路01的第二输入端a2；第四晶体管M4的漏极与第二节点N2连接；电感L的第一端与第二节点N2连接，电感L的第二端与第三端P3连接，也即该电感L的第二端通过第三端P3连接到信号输出端out。
作为上述电压调节电路三23的另一个可替代的实现方式中，如图8b所示，该电压调节电路三23可以包括控制器20，该控制器20与信号输出端out、第三控制端ctrl3、第四控制端ctrl4连接；其他连接关系与图8a基本一致，此处不再赘述。
对于采用该电压调节电路三23的电源电路的控制而言，可以通过控制器20向第三控制端ctrl3输入第三控制信号，向第四控制端ctrl4输入第四控制信号，并调节第三控制信号和第四控制信号的占空比，周期性的控制第三晶体管M3和第四晶体管M4交替开启的时长，从而周期性控制电感L分别位于第三端P3与第一端P1之间的第二通路、第三端P3与第二端P2之间的第三通路上的充放电时长；在此情况下，该电压调节电路三23能够通过第一端P1和第三端P3对电感L进行功率输出，也即将功率电感的部分功率通过第三端P3输出至信号输出端out，部分功率通过第一端P1输出至第一电容C1，进而实现对第一端P1的电流调节，以使得信号输出端out达到设定的稳态输出电压。
电压调节电路四24
如图9a所示，在另一些可能实现的方式中，电压调节电路四24可以将上述图6中示出的电压调节电路三23的第三端P3连接到接地端GND；在此情况下，电压调节电路02根据信号输出端out的电压，切换控制电感L分别位于第三端P3与第一端P1之间的第二通路、第三端P3与第二端P2之间的第三通路进行充放电，并通过第一端P1进行功率输出，从而来调整第一端P1的电流。
对于电压调节电路四24的其他电路连接关系可以对应参考前述电压调节电路三23中的相关描述，此处不再赘述。
作为上述电压调节电路四24的另一个可替代的实现方式中，如图9b所示，该电压调节电路四24可以包括控制器20，该控制器20与信号输出端out、第三控制端ctrl3、第四控制端ctrl4连接。
对于采用该电压调节电路四24的电源电路的控制而言，可以通过控制器20向第三控制端ctrl3输入第三控制信号，向第四控制端ctrl4输入第四控制信号，并根据信号输出端out的电压调节第三控制信号和第四控制信号的占空比，周期性的控制第三晶体管M3和第四晶体管M4交替开启的时长，从而周期性控制电感L分别位于第三端P3与第一端P1之间的第二通路、第三端P3与第二端P2之间的第三通路上进行充放电的时长；在此情况下，该电压调节电路四24能够通过第一端P1对电感L进行功率输出，也即将功率电感的全部功率通过第一端P1输出至第一电容C1，进而实现对第一端P1的电流调节，以使得信号输出端out达到设定的稳态输出电压。
关于对于采用该设置方式二中的电压调节电路(23、24)的电源电路的稳压调节、增压调节、降压调节过程，可以对应参考图5、图6、图7以及前述设置方式一中的相关描 述，此处不再赘述。
另外，需要说明的是，对于该设置方式二的电压调节电路(23、24)的电源电路而言，参考图8a和图9a所示，如果需要保证电压调节电路02对第一端P1的电流侧正常调节，则应保证直流电源S的电压小于变压转换电路01的输入端(a1、a2)的设定电压，也即电压调节电路02的第一端P1的电压应该为负压；例如，直流电源S的电压为40v，变压转换电路01的输入端(a1、a2)的设定电压为45v；也即电压调节电路02的第一端P1的电压为-5V的负压；假设如果第一端P1的电压为正压，则会出现无论是第三晶体管M3开启，还是第四晶体管M4开启，电感电流只能单向从第二节点N2流向第三端P3并一直增加，从而也就无法实现对第一端P1的电流调整，进而无法控制信号输出端out的电压；也就是说，该采用设置方式二中提供的电压调节电路的电源电路仅可以实现负压调节，而无法实现正压调节。
设置方式三
在该设置方式三中，参考图10和图11所示，电压调节电路01可以被配置为根据信号输出端out的电压，交替导通第一端P1与第二端P2之间的第一通路、第一端P1与第三端P3之间的第二通路，也即交替控制电感L位于第一通路和第二通路，以对第一端P1的电流进行调整；也就是说该电压调节电路01(21、22)可以实现与前述设置方式一提供的电压调节电路01(21、22)相同的调节功能。
同时，参考图10和图11所示，该电压调节电路23还可以被配置为根据信号输出端out的电压，交替导通第三端P3与第一端P1之间的第三通路、第三端P3与第二端P2之间的第四通路，也即交替控制电感L位于第三通路和第四通路，以对第一端P1的电流进行调整；也就是说，该电压调节电路01可以实现与前述设置方式二提供的电压调节电路01(23、24)相同的调节功能。
也就是说，该设置方式三中提供的电压调节电路02结合了前述设置方式一的电压调节电路(21、22)的调节功能以及设置方式二中的电压调节电路(23、24)的调节功能，从而能够满足电源电路的正压调节和负压调节。
另外，在该设置方式三中，该电压调节电路01还可以被配置为：根据信号输出端out的电压，依次交替导通第三端P3与第二端P2之间的第四通路、第三端P3与第一端P1之间的第二通路、第一端P1与第二端P2之间的第一通路、以及将电感L的两端均连接到第二端P2，也即交替控制电感L依次位于第四通路、第二通路、第一通路以及两端均连接到第二端P2，以对第一端P1的电流进行调整。
在此情况下，该电压调节电路02通过第二端P2和第三端P3对电感L进行功率输出，或者通过第二端P2对电感L进行功率输出，以调整第一端P1的电流。
类似的，作为另一种可替代的实现方式，该设置方式三中提供的电压调节电路02中可以设置控制器20，通过控制器20根据信号输出端out的电压，以实现对第一端P1的电流进行调整。
示意的，如图10和图11所示，以下提供两种能够满足该设置方式三中电压调节电路02功能的电路结构(电压调节电路五25和电压调节电路六26)。
电压调节电路五25
如图10所示，在一些可能实现的方式中，该电压调节电路02(25)在包括电感L的 基础上，还包括第五晶体管M5、第六晶体管M6、第七晶体管M7、第八晶体管M8、第五控制端ctrl5、第六控制端ctrl6、第七控制端ctrl7、第八控制端ctrl8。
第五晶体管M5的栅极与第五控制端ctrl5连接，第五晶体管M5的源极与第二端P2连接，并通过该第二端P2连接到直流电源S的正极(+)；第五晶体管M5的漏极与第四节点N4连接。
第六晶体管M6的栅极与第六控制端ctrl6连接，第六晶体管M6的源极与第二端P2连接，也即第六晶体管M6的源极通过该第二端P2连接到直流电源S的正极(+)；第六晶体管M6的漏极与第三节点N3连接。
第七晶体管M7的栅极与第七控制端ctrl7连接，第七晶体管M7的源极与第一端P1连接，也即第七晶体管M7的源极通过第一端P1连接到变压转换电路01的第二输入端a2；第七晶体管M7的漏极与第三节点N3连接。
第八晶体管M8的栅极与第八控制端ctrl8连接，第八晶体管M8的源极与第四节点N4连接，第八晶体管M8的漏极与第三端P3连接，也即第八晶体管M8的漏极通过第三端P3连接到信号输出端out。
电感L的第一端与第三节点N3连接，电感L的第二端与第四节点N4连接。
作为上述电压调节电路五25的另一个可替代的实现方式中，该电压调节电路五25可以包括控制器20，该控制器20与信号输出端out、第五控制端ctrl5、第六控制端ctrl6、第七控制端ctrl7、第八控制端ctrl8。
参考图10所示，对于采用该电压调节电路五25的电源电路的控制而言，以下提供三种不同的控制模式：控制模式一、控制模式二、控制模式三。
示意的，在控制模式一下，该电源电路的控制过程可以包括：
通过控制器20根据信号输出端out的电压，向第六控制端ctrl6输入第六控制信号、向第七控制端ctrl7输入第七控制信号，关闭第六晶体管M6，开启第七晶体管M7(也即控制电感L与第一端P1之间保持导通状态)；向第五控制端ctrl5输入第五控制信号，向第八控制端ctrl8输入第八控制信号；并调节第五控制信号和第八控制信号的占空比，周期性的控制第五晶体管M5和第八晶体管M8交替开启的时长，从而实现与前述设置方式一中电压调节电路一21相同的功能，具体可以参考前述的相关描述，此处不再赘述。
示意的，在控制模式二下，该电源电路的控制过程可以包括：
通过控制器20根据信号输出端out的电压，向第五控制端ctrl5输入第五控制信号，向第八控制端ctrl8输入第八控制信号，关闭第五晶体管M5，开启第八晶体管M8(也即控制电感L与第三端P3之间保持导通状态)；向第六控制端ctrl6输入第六控制信号，向第七控制端ctrl7输入第七控制信号；并调节第六控制信号和七控制信号，周期性的控制第六晶体管M6和第七晶体管M7交替开启的时长，从而能够实现与前述设置方式二中的电压调节电路三23相同的功能，具体可以参考前述的相关描述，此处不再赘述。
示意的，参考图11(图10中电压调节电路五25的控制过程示意图)和图12所示，在控制模式三下，该电源电路的控制过程可以分为四个控制阶段：第一控制阶段S1、第二控制阶段S2、第三控制阶段S3、第四控制阶段S4，具体控制过程可以包括：
通过控制器20根据信号输出端out的电压，向第五控制端ctrl5输入第五控制信号、向第六控制端ctrl6输入第六控制信号、向第七控制端ctrl7输入第七控制信号、向第八控 制端ctrl8输入第八控制信号；并调节第五控制信号、第六控制信号、第七控制信号、第八控制信号的占空比，周期性的依次进行第一控制阶段S1、第二控制阶段S2、第三控制阶段S3、第四控制阶段S4。
参考图11中(a)和图12所示，在第一控制阶段S1，在第六控制信号、第八控制信号的控制下，第六晶体管M6和第八晶体管M8开启，在第五控制信号、第七控制信号的控制下，第五晶体管M5和第七晶体管M7关闭，此时电感L位于第三端P3与第二端P2之间的通路上进行充电，并将电感L的功率通过第三端P3输出至信号输出端out。
参考图11中(b)和图12所示，在第二控制阶段S2，在第七控制信号、第八控制信号的控制下，第七晶体管M7和第八晶体管M8开启，在第五控制信号、第六八控制信号的控制下，第五晶体管M5和第六晶体管M6关闭，此时电感L位于第三端P3与第一端P1之间的通路上；在此情况下，当第一端P1的电压大于第三端P3的电压时，电感电流i斜率为正(对应图12中第二控制阶段S2中的实线部分)，电感L进行充电，并将电感的功率通过第三端P3输出至信号输出端out，以对第一端P1进行正压调节。当第一端P1的电压小于第三端P3的电压时，电感电流i斜率为负(对应图12中第二控制阶段S2中的虚线部分)，电感L进行放电，并将电感的功率通过第二端P2输出至第一电容C1，以对第一端P1进行负压调节。
参考图11中(c)和图12所示，在第三控制阶段S3，在第五控制信号、第七控制信号的控制下，第五晶体管M5和第七晶体管M7开启，在第六控制信号、第八控制信号的控制下，第六晶体管M6和第八晶体管M8关闭，此时电感L位于第一端P1与第二端P2之间的通路进行放电，并将电感的功率通过第二端P2输出至直流电源S。
参考图11中(d)和图12所示，在第四控制阶段S4，在第五控制信号、第六控制信号的控制下，第五晶体管M5和第六晶体管M6开启，在第七控制信号、第八控制信号的控制下，第七晶体管M7和第八晶体管M8关闭，此时电感L两端均连接到第二端P2，电感L即不充电也不放电，并维持第三控制阶段S3的电流。
电压调节电路六26
如图13所示，在另一些可能实现的方式中，电压调节电路六26可以将上述图10中示出的电压调节电路五25的第三端P3连接到接地端GND；该电压调节电路六26的其他电路其他连接关系均保持不变，相关的电路连接关系具体可以对应参考前述电压调节电路五25中的描述，此处不再赘述。
作为上述电压调节电路六26的另一个可替代的实现方式中，该电压调节电路六26可以包括控制器20，该控制器20与信号输出端out、第五控制端ctrl5、第六控制端ctrl6、第七控制端ctrl7、第八控制端ctrl8。
参考图10所示，对于采用该电压调节电路六26的电源电路的控制而言，与前述采用该电压调节电路五25的电源电路的控制类似，同样可以具有三种不同的控制模式。
例如，在一些控制模式下，可以采用前述控制模式一的控制方法(可以参考前文)，在此情况下，该电压调节电路六26的结构与前述电压调节电路二22的电路(可参考图4a、图4b)结构相同，从而能够实现与前述设置方式一中电压调节电路二22相同的功能，具体可以参考前述的相关描述，此处不再赘述。
又例如，在一些控制模式下，可以采用前述控制模式二的控制方法(可以参考前文)， 在此情况下，该电压调节电路六26的结构与前述电压调节电路四24的电路(可参考图9a、图9b)结构相同，从而能够实现与前述设置方式二中电压调节电路四24相同的功能，具体可以参考前述的相关描述，此处不再赘述。
再例如，在一些控制模式下，可以采用前述控制模式三的控制方法，具体可以参考前文控制模式三中各控制阶段(S1、S2、S3、S4)的描述，两者的区别仅在于：由于电压调节电路六26的第三端P3与接地端GND连接，因此，电感L的全部功率通过第二端P2输出至直流电源。另外，本申请中对于该变压转换电路01的具体结构不作限制，实际中可以根据需要进行选择设置。
例如，如图14所示，在一些可能实现的方式中，变压转换电路01中可以包括四个晶体管(M a、M b、M c、M d)、电容C a、两个电感(L a、L b)、变压器T10；其中，变压器T10中包括原边绕组S1、两个副边绕组(S2、S3)。
示意的，参考图14所示，在变压转换电路01中，晶体管M a和晶体管M b串联在变压转换电路01的两个输入端(a1、a2)之间，电感L a的一端连接到晶体管M a和晶体管M b之间连接节点，电感L a的另一端与电容C a的第一端连接，电容C a的第二端与原边绕组S1的同名端连接；电感L b的一端与原边绕组S1的同名端，电感L b的另一端与变压转换电路01的第二输入端a2连接，原边绕组S1的非同名端连接到第二输入端a2；副边绕组S2的同名端通过晶体管M c连接到第二输出端b2，副边绕组S2的非同名端连接到第一输出端b1；副边绕组S3的同名端连接到第一输出端b1，副边绕组S3的非同名端通过晶体管M d连接到第二输出端b2。
又例如，如图15所示，在一些可能实现的方式中，变压转换电路01中可以包括多个电容(C1、C2……Cn)，多个第一开关S1、多个第二开关S2；其中，第一开关S1和第二开关S2采用互补的时序，也即第一开关S1开启时，第二开关S2关闭；第一开关S1关闭时，第二开关S2开启；示意的，第一开关S1和第二开关S1可以采用晶体管，但并不限制于此。
示意的，参考15所示，在该变压转换电路01中，电容C1的第一端通过一个第一开关S1连接到变压转换电路01的第一输入端a1，电容C1的第二端通过一个第一开关S1连接到变压转换电路01的第二输入端a2，并且该电容C1的第二端通过一个第二开关S2与接地端GND连接；多个电容(C2、C3……Cn)的第一端分别通过一个第一开关S1与第一输出端b1连接，多个电容(C2、C3……Cn)的第二端分别通过一个第一开关S1与第二输出端b2连接；多个电容(C2、C3……Cn)之间分别通过一个第二开关S2进行串联；电容C2的第一端还通过一个第二开关S2与电容C1的第一端连接。
另外，本申请中对于前述控制器20的具体结构不作限制，实际中可以根据需要进行选择设置。以下结合图3b中示出的电源电路，对控制器20的具体结构进行示意说明。
如图16和图17所示，在一些可能实现的方式中，控制器20可以包括运算放大器A1、比较器A2；其中，运算放大器A1的同相输入端(+)与参考电压端Ref连接(通过参考电压端Ref输入基准设定电压，如1V)，运算放大器A1的反相输入端(-)与信号输出端out连接，并且运算放大器A1的输出端EA_O通过频率补偿模块与反相输入端(-)连接，通过该频率补偿模块保持负反馈环路的稳定性；另外，运算放大器A1的输出端EA_O与比较器A2的同相输入端(+)连接，比较器A2的反相输入端(-)输入锯齿波Sw；另 外，比较器A2的输出端与变压转换电路01中的第一控制端ctrl1连接，同时该比较器A2的输出端还通过反向器与第二控制端ctrl2。在此情况下，当电源电路的信号输出端out比参考电压端Ref输入的基准电压设定电压时，运算放大器A1的输出端EA_O的电压会上升，比较器A2基于运算放大器A1的输出端EA_O的电压和锯齿波Sw，通过比较器A2的输出端向第二控制端ctrl2的高脉冲时间增加，第一控制端ctrl1高脉冲时间降低，流经电感L的平均电流增加，进而使得变压转换电路01的输入端电压增加，输出电压最后回到基准设定电压。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种电源电路，其特征在于，包括直流电源、变压转换电路、电压调节电路、第一电容、第二电容、信号输出端；
    所述电压调节电路包括电感、第一端、第二端、第三端；
    所述变压转换电路包括第一输入端、第二输入端、第一输出端、第二输出端；
    所述变压转换电路的第一输入端与所述直流电源的正极电连接，所述变压转换电路的第二输入端与所述电压调节电路的第一端电连接；所述变压转换电路的第一输出端与所述信号输出端电连接，所述变压转换电路的第二输出端连接到接地端；
    所述电压调节电路的第二端与所述直流电源的正极电连接；
    所述电压调节电路的第三端与所述变压转换电路的第一输出端或第二输出端电连接；
    所述直流电源的负极连接到接地端；
    所述第一电容的两端电连接在所述变压转换电路的第一输入端和第二输入端之间；
    所述第二电容的两端电连接在所述变压转换电路的第一输出端和第二输出端之间；
    所述变压转换电路被配置为：将所述第一输入端和所述第二输入端输入的电压进行转换后通过所述第一输出端和所述第二输出端输出；
    所述电压调节电路被配置为：根据所述信号输出端的电压，控制所述电感来调整所述第一端的电流。
  2. 根据权利要求1所述的电源电路，其特征在于，
    所述电压调节电路还包括控制器，所述控制器根据所述信号输出端的电压，控制所述电感来调整所述第一端的电流。
  3. 根据权利要求1或2所述的电源电路，其特征在于，
    所述电压调节电路被配置为：根据所述信号输出端的电压交替导通第一通路和第二通路，以控制所述电感调整所述第一端的电流；其中，所述第一通路为所述第一端和所述第二端之间的通路，所述第二通路为所述第一端和所述第三端之间的通路。
  4. 根据权利要求1-3任一项所述的电源电路，其特征在于，所述电压调节电路还包括第一晶体管、第二晶体管、第一控制端、第二控制端；
    所述第一晶体管的栅极与所述第一控制端电连接，所述第一晶体管的第一极与所述第二端电连接，所述第一晶体管的第二极与第一节点电连接；
    所述第二晶体管的栅极与所述第二控制端电连接，所述第二晶体管的第一极与所述第一节点电连接；所述第二晶体管的第二极与所述第三端电连接；
    所述电感的一端与所述第一端电连接，所述电感的另一端与所述第一节点电连接。
  5. 根据权利要求4所述的电源电路，其特征在于，
    所述电压调节电路包括所述控制器；所述控制器与所述信号输出端、所述第一控制端、所述第二控制端电连接；
    所述控制器配置为：根据所述信号输出端的电压，向所述第一控制端输入第一控制信号，向所述第二控制端输入第二控制信号，并调节所述第一控制信号以及所述第二控制端的占空比，以控制交替开启所述第一晶体管和所述第二晶体管的时长。
  6. 根据权利要求1或2所述的电源电路，其特征在于，
    所述电压调节电路被配置为：根据所述信号输出端的电压交替导通第二通路和第三通路，以控制所述电感调整所述第一端的电流；其中，所述第二通路为所述第三端与所述第一端之间的通路，所述第三通路为所述第三端和所述第二端之间的通路。
  7. 根据权利要求1、2或6中任一项所述的电源电路，其特征在于，
    所述电压调节电路还包括第三晶体管、第四晶体管、第三控制端、第四控制端；
    所述第三晶体管的栅极与所述第三控制端电连接，所述第三晶体管的第一极与所述第二端电连接，所述第三晶体管的第二极与第二节点电连接；
    所述第四晶体管的栅极与所述第四控制端电连接，所述第四晶体管的第一极与所述第一端电连接，所述第四晶体管的第二极与所述第二节点电连接；
    所述电感的一端与所述第二节点电连接，所述电感的另一端与所述第三端电连接。
  8. 根据权利要求7所述的电源电路，其特征在于，
    所述电压调节电路包括所述控制器；所述控制器与所述信号输出端、所述第三控制端、所述第四控制端电连接；
    所述控制器配置为：根据所述信号输出端的电压，向所述第三控制端输入第三控制信号，向所述第四控制端输入第四控制信号，并调节所述第三控制信号和所述第四控制信号的占空比，以控制交替开启所述第三晶体管和所述第四晶体管的时长。
  9. 根据权利要求1或2所述的电源电路，其特征在于，
    所述电压调节电路被配置为：根据所述信号输出端的电压交替导通第三通路、第二通路、第一通路以及将所述电感的两端均连接到所述第二端，以控制所述电感调整所述第一端的电流；其中，所述第三通路为所述第三端与所述第二端之间的通路，所述第二通路为所述第三端与所述第一端之间的通路，所述第一通路为所述第一端与所述第二端之间的通路。
  10. 根据权利要求1、2、3、6、9中任一项所述的电源电路，其特征在于，
    所述电压调节电路还包括第五晶体管、第六晶体管、第七晶体管、第八晶体管、第五控制端、第六控制端、第七控制端、第八控制端；
    所述第五晶体管的栅极与所述第五控制端电连接，所述第五晶体管的第一极与所述第二端电连接，所述第五晶体管的第二极与第四节点电连接；
    所述第六晶体管的栅极与所述第六控制端电连接，所述第六晶体管的第一极与所述第二端电连接，所述第六晶体管的第二极与第三节点电连接；
    所述第七晶体管的栅极与所述第七控制端电连接，所述第七晶体管的第一极与所述第一端电连接，所述第七晶体管的第二极与所述第三节点电连接；
    所述第八晶体管的栅极与所述第八控制端电连接，所述第八晶体管的第一极与所述第四节点电连接，所述第八晶体管的第二极与所述第三端电连接；
    所述电感的一端与所述第三节点电连接，所述电感的另一端与所述第四节点电连接。
  11. 根据权利要求10所述的电源电路，其特征在于，
    所述电压调节电路包括所述控制器；所述控制器与所述信号输出端、所述第五控制端、所述第六控制端、所述第七控制端、所述第八控制端电连接；
    所述控制器配置为：向所述第六控制端输入第六控制信号、向所述第七控制端输入第七控制信号，关闭所述第六晶体管，开启所述第七晶体管；并根据所述信号输出端的电压， 向所述第五控制端输入第五控制信号，向所述第八控制端输入第八控制信号，调节所述第五控制信号和所述第八控制信号的占空比，以控制交替开启所述第五晶体管和所述第八晶体管的时长。
  12. 根据权利要求10所述的电源电路，其特征在于，
    所述电压调节电路包括所述控制器；所述控制器与所述信号输出端、所述第五控制端、所述第六控制端、所述第七控制端、所述第八控制端电连接；
    所述控制器配置为：向所述第五控制端输入第五控制信号，向所述第八控制端输入第八控制信号，关闭所述第五晶体管，开启所述第八晶体管；并根据所述信号输出端的电压，向所述第六控制端输入第六控制信号，向所述第七控制端输入第七控制信号，调节所述第六控制信号和所述第七控制信号的占空比，以控制交替开启所述第六晶体管和所述第七晶体管的时长。
  13. 根据权利要求10所述的电源电路，其特征在于，
    所述电压调节电路包括所述控制器；所述控制器与所述信号输出端、所述第五控制端、所述第六控制端、所述第七控制端、所述第八控制端电连接；
    所述控制器配置为：根据所述信号输出端的电压，向所述第五控制端输入第五控制信号的占空比、向所述第六控制端输入第六控制信号、向所述第七控制端输入第七控制信号、向所述第八控制端输入第八控制信号，并调节所述第五控制信号、所述第六控制信号、所述第七控制信号、所述第八控制信号的占空比，以周期性依次进行第一控制阶段、第二控制阶段、第三控制阶段、第四控制阶段；
    所述第一控制阶段包括：关闭所述第五晶体管和所述第七晶体管，控制开启所述第六晶体管和所述第八晶体管的时长；
    所述第二控制阶段包括：关闭所述第五晶体管和所述第六晶体管，控制开启所述第七晶体管和所述第八晶体管的时长；
    所述第三控制阶段包括：关闭所述第六晶体管和所述第八晶体管，控制开启所述第五晶体管和所述第七晶体管的时长；
    所述第四控制阶段包括：关闭所述第七晶体管和所述第八晶体管，控制开启所述第五晶体管和所述第六晶体管的时长。
  14. 一种终端设备，其特征在于，包括负载模块以及如权利要求1-13任一项所述的电源电路；所述电源电路通过信号输出端与所述负载模块连接。
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