WO2022234832A1

WO2022234832A1 - Power conversion device and power conversion method

Info

Publication number: WO2022234832A1
Application number: PCT/JP2022/019424
Authority: WO
Inventors: 正登安東; 徹郎児島; 邦晃大塚
Original assignee: 株式会社日立製作所
Priority date: 2021-05-07
Filing date: 2022-04-28
Publication date: 2022-11-10

Abstract

In order to perform dead time compensation with consideration given to the electrical characteristics of a semiconductor element constituting a power conversion device, and minimize the error between an output voltage command and the output voltage of the power conversion device, provided is a power conversion device comprising: a switching unit that connects, to a DC power source, at least one set of at least two semiconductor elements connected in series, connects, to an AC load, a connection point of upper and lower arms constituting the at least two semiconductor elements connected in series, and converts DC power from the DC power source into AC power; a PWM signal generation unit that generates a gate signal for PWM control of a semiconductor element constituting the switching unit; a dead time generation unit that generates a dead time in which at least two semiconductor elements connected in series are in an off state; and a dead time compensation unit which compensates for the dead time, wherein the dead time generation unit generates the dead time to be a preset fixed value, and the dead time compensation unit compensates for operation delay occurring along with turning on and off semiconductor elements.

Description

Power conversion device and power conversion method

The present invention relates to a power conversion device and a power conversion method, and is suitable mainly for power conversion for railway vehicles and the like.

2. Description of the Related Art A power conversion device converts DC power into AC power or vice versa by switching operation of a semiconductor device, and is applied in many fields such as railways, automobiles, and elevators. The semiconductor elements of the upper and lower arms that make up the power conversion device perform switching operations alternately. If these semiconductor elements are turned on simultaneously due to operation delays, an excessive short-circuit current exceeding the rated current of the semiconductor elements is generated. It leads to failure of the power converter.
Therefore, in order to prevent the semiconductor elements of the upper and lower arms from being turned on at the same time, a dead time is provided during which the semiconductor elements of the upper and lower arms are turned off at the same time.

As a prior art document, in Patent Document 1, "A power converter includes a gate signal generation unit that generates a temporary gate signal from a voltage command value, and a dead time that generates a gate signal by inserting a dead time into the temporary gate signal. One or more switching element groups, in which an insertion portion and a switching element that can be switched between an on state and an off state by a gate signal are connected in series, are connected in parallel with a DC power supply to convert DC power output from the DC power supply into AC power. A bridge circuit, a current detection unit that detects the output current of the bridge circuit, and a dead current value detected by the current detection unit with reference to the characteristics of the turn-on delay time and the turn-off delay time with respect to the current value flowing through the switching element. and a variable dead time generator for calculating the time” (see abstract).

JP 2017-93073 A

Although the power conversion device described in Patent Document 1 can provide an optimum dead time according to the output current, if the dead time becomes short due to an output current detection error, a short-circuit current may occur and the power conversion device may fail. be.

Also, since the output voltage of the power converter during the dead time period depends on the positive or negative of the output current, an error occurs between this output voltage and the output voltage command. Therefore, in order to reduce the error voltage, dead time compensation is performed by moving forward or backward by the dead time the ON command or OFF command for the semiconductor element according to the positive or negative of the output current. However, if the semiconductor element is an ideal switch with no operation delay, the output voltage command and the output voltage will match and no error will occur in the output voltage. The voltage command and the output voltage do not match, causing an error in the output voltage.

Furthermore, since the operation delay of the semiconductor element described above changes according to the current flowing through the semiconductor element, the temperature of the semiconductor element, and the voltage applied to the semiconductor element, the error in the output voltage described above must be minimized. , it is necessary to set the deadtime and deadtime compensation to take these physical properties into account.

An object of the present invention is to provide a power conversion device that performs dead time compensation in consideration of the physical characteristics of the semiconductor elements described above.

In order to solve the above-described problems, a typical configuration of the power conversion device according to the present invention is to connect at least one set of at least two semiconductor elements connected in series to a DC power supply, and to connect the at least two semiconductor elements connected in series. A switching unit that connects the connection point of the upper and lower arms to an AC load to convert the DC power from the DC power supply into AC power, and a PWM signal generation that generates a gate signal for PWM-controlling the semiconductor element that constitutes the switching unit a dead time generator for generating a dead time in which both at least two semiconductor elements connected in series are turned off; and a dead time compensator for compensating for the dead time, wherein the dead time generator is configured to reduce the dead time. It is characterized in that the dead time compensator compensates for an operation delay associated with turn-on and turn-off of the semiconductor device.

According to the present invention, the error between the output voltage command and the output voltage of the power converter can be minimized by performing dead time compensation in consideration of the electrical characteristics of the semiconductor elements that make up the power converter.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing a schematic configuration of a railway vehicle to which an embodiment according to the present invention is applied; It is a figure which shows the circuit structure of the drive system containing the power converter device which concerns on a present Example. FIG. 10 is a diagram showing a timing chart when the current is in the forward direction in the conventional power converter. FIG. 4 is a diagram showing a timing chart when the current is in the positive direction in the power conversion device according to the embodiment; FIG. 4 is a diagram showing motor current dependency in the output voltage waveform of the power converter according to the embodiment. It is a figure which shows an example of the data of the current dependence of the output voltage error stored in the dead time compensation memory|storage part of the power converter device which concerns on a present Example. It is a figure which shows the element temperature dependence in the output voltage waveform of the power converter device which concerns on a present Example. It is a figure which shows an example of the data of the temperature dependence of the output voltage error stored in the dead time compensation memory|storage part of the power converter device which concerns on a present Example. It is a figure which shows the voltage dependence of the filter capacitor in the output voltage waveform of the power converter device which concerns on a present Example. It is a figure which shows an example of the data of the voltage dependence of the output voltage error stored in the dead time compensation memory|storage part of the power converter device which concerns on a present Example.

Hereinafter, as a form for carrying out the present invention, an example according to the present invention will be described using the drawings.

FIG. 1 is a diagram showing a schematic configuration of a railway vehicle (hereinafter also simply referred to as "vehicle") to which an embodiment of the present invention is applied.
The vehicle 8 rotates the wheels 3 by driving the electric motor 5 to move forward or backward. When the electric motor 5 is an induction motor, one power converter drives a plurality of electric motors (induction motors), and when the electric motor 5 is a permanent magnet synchronous motor, one power converter drives one motor. motor (permanent magnet synchronous motor) is driven.

In the power running operation, the vehicle 8 is accelerated by driving the electric motor 5 that receives power from the overhead wire 1 via the current collector 7 . Further, during a braking operation for decelerating the vehicle 8, power regeneration is performed by using the function of the electric motor 5 as a generator. The regenerated electric power generated by the electric motor 5 is returned to the overhead wire 1 via the power conversion device 6, the filter reactor 13, the contactor 11 (see FIG. 2) and the circuit breaker 9, and is supplied to another vehicle via the overhead wire 1. (not shown) is consumed as power for running. As electrical ground, the low potential side of power converter 6 is connected to rail 2 via wheels 3 . The electric motor 5 is mounted on a truck 4 which supports a vehicle 8 .

In FIG. 1, the power conversion device 6, the circuit breaker 9, and the filter reactor 13 are housed in separate boxes and arranged under the floor as electrical components for driving the vehicle 8. On the other hand, some or all of these electrical components may be housed in a single box to increase the mounting density.

Also, the voltage of the overhead line 1 is DC 600V, DC 750V, DC 1500V, DC 3000V, or AC 20kV, 25kV, or the like. In the embodiment, the voltage of the overhead wire 1 is DC.

FIG. 2 is a diagram showing a circuit configuration of a drive system including the power conversion device 6 according to this embodiment.
The power conversion device 6 constitutes a main part of a drive system that drives the electric motor 5 . This drive system is composed of a circuit breaker 9 capable of appropriately interrupting DC power supplied from the overhead wire 1, a filter reactor 13, and a power conversion device 6. FIG.

The power conversion device 6 converts DC power into AC power to drive the electric motor 5 . The power conversion device 6 includes a contactor 11, a contactor 10 and a resistor 12 for initial charging, a filter capacitor 14, switching elements Q1 to Q6, gate drive circuits 101 to 106, antiparallel diodes D1 to D6, and a current detection circuit 117a. 117c and the control unit 100. FIG.

The control unit 100 generates gate commands for the gate drive circuits 101-106. A group of switching elements Q1-Q2 are connected in series to form a U-phase, a group of switching elements Q3-Q4 are connected in series to form a V-phase, and a group of switching elements Q5-Q6 are connected in series to form a W-phase. . Although FIG. 2 shows a circuit diagram of a three-phase inverter as an example, it may be a half-bridge inverter composed only of U-phases or a full-bridge inverter composed of U-phases and V-phases.

MOSFETs, IGBTs, or multi-gate IGBTs can be used as the switching elements Q1 to Q6.
When the switching elements Q1 to Q are IGBTs (Insulated Gate Bipolar Transistors), antiparallel freewheeling diodes (hereinafter simply referred to as "diodes") connected in antiparallel to the main terminals of the respective switching elements. ) D1 to D6 are required. Each of the diodes D1-D6 allows a return current to flow when each of the switching elements Q1-Q6 is turned off.

On the other hand, if the switching elements Q1 to Q6 are MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), MOSFET body diodes may be used as the diodes D1 to D6. Thus, when a body diode is provided, the body diode of the MOSFET is used as a freewheeling diode without connecting the diode in anti-parallel with each of the switching elements Q1 to Q6. As a result, the chips of the diodes D1 to D6 can be reduced, and the power conversion device 6 can be miniaturized.

Also, the two switching elements (for example, Q1 and Q2) connected in series may be housed in the same package and formed into a 2-in-1 package.

As a semiconductor material for the switching elements Q1 to Q6 and the diodes D1 to D6, Si (silicon) or SiC (silicon carbide) or GaN (gallium nitride), which is a semiconductor with a wider bandgap than Si, can be used. Since these wide bandgap semiconductors can reduce the generated loss compared to Si, the power conversion device 6 can be miniaturized.

The power conversion device 6 outputs pulsed AC power via the filter capacitor 14 by PWM (Pulse Width Modulation) control of the switching elements Q1 to Q6. This AC power is supplied to the electric motor 5 and converted into mechanical energy, thereby causing the vehicle 8 to move forward or backward.

The initial charging of the filter capacitor 14 is performed using the contactor 10 and the resistor 12, which are charging circuits. That is, the contactor 10 is turned on while the contactor 11 is open, and the filter capacitor 14 is initially charged through the resistor 12 .

The filter capacitor 14 and the filter reactor 13 constitute a filter circuit and reduce noise current flowing from the power converter 6 to the overhead wire 1 .

Current detection circuits 117a to 117 measure currents of U-phase, V-phase and W-phase of electric motor 5, respectively. The current detection circuit may measure any two phases among the U phase, V phase and W phase, and calculate the value of the remaining one phase from those values. As a result, the number of current detection circuits can be reduced from three to two, and the size and cost of the power conversion device 6 can be reduced.
A voltage detection circuit 118 measures the voltage of the filter capacitor 14 .

Next, dead time generation and dead time compensation functions will be described.
Control unit 100 generates gate signals for switching elements Q1-Q6 from the output voltage command of power conversion device 6, and outputs the gate signals to gate drive circuits 101-106. The switching elements Q1-Q6 switch between an ON state and an OFF state according to gate signals from the gate drive circuits 101-106. A group of switching elements Q1-Q2 forms upper and lower arms by connecting main terminals of switching elements Q1 and Q2 in series. A group of switching elements Q3-Q4 and a group of switching elements Q5-Q6 have the same configuration.

In FIG. 2, the power conversion device 6 exemplifies switching element groups Q1-Q2 of a two-level circuit consisting of two switching elements Q1 and Q2. It is also possible to construct a group of switching elements Q1 to Qx of a level circuit.

The ON state or OFF state of the switching elements Q1 to Q6 is controlled by the ON or OFF PWM signal output from the control unit 100. FIG. This PWM signal is input to each gate drive circuit 101 to 106 and amplified. In the switching elements Q1-Q6, amplified gate signals are input between the respective gates and emitters of the switching elements Q1-Q6 (between the gate and source when the switching elements Q1-Q6 are MOSFETs).

Here, the PWM signal controls the switching elements Q1 and Q2 having a pair of main terminals connected in series between the positive and negative sides of the filter capacitor 14, which is a DC power supply. have. In this way, a dead time is provided for each of the PWM signals that control the series-connected pairs of switching elements Q1-Q2 group, switching element Q3-Q4 group, and switching element Q5-Q6 group. .

If the dead time is not provided, for example, there may be a timing when the switching elements Q1 and Q2 are turned on at the same time due to the operation delay time of the switching elements Q1 and Q2. In this case, the filter capacitor 14 is short-circuited by the switching elements Q1 and Q2 that are turned on at the same time.

The control section 100 is composed of a PWM signal generation section 111, a dead time storage section 112, a dead time provision section 113, a dead time compensation storage section 114, a dead time compensation section 115 and an element temperature detection section . Here, as the element temperature detection unit 116, the values obtained by measuring the temperatures of the switching elements Q1 to Q6 and the diodes D1 to D6 with a temperature detector (not shown) such as a thermistor, the switching elements Q1 to Q6 and the diodes D1 to The temperature of a cooler (not shown) that cools D6 may be measured and the element temperature estimated based on the operating state of power converter 6 may be used.

The PWM signal generation unit 111 generates a reference PWM signal with no dead time so that a desired voltage is output based on an output voltage command to the power conversion device 6 .

The dead time imparting section 113 imparts dead time to the PWM signal generating section 111 using the value stored in the dead time storage section 112 . The value stored in the dead time storage unit 112 is a fixed value that does not depend on the current value of the electric motor 5, the element temperature, and the voltage of the filter capacitor 14. FIG. For example, it is a value such as 10 μs.

The dead time compensation storage unit 114 stores dead time compensation for the voltage detection value of the filter capacitor 14 from the voltage detection circuit 118, the temperature detection value from the element temperature detection unit 116, and the current detection value of the motor 5 from the current detection circuits 117a to 117c. remember the quantity. Here, the dead time compensation amount may be calculated using at least one of these three detection values (motor current detection value, element temperature detection value, and filter capacitor voltage detection value).

The dead time compensation unit 115 performs dead time compensation using the dead time compensation amount calculated by the dead time compensation storage unit 114 on the PWM signal to which the dead time is added calculated by the dead time adding unit 113 . For example, when the dead time compensation amount calculated by the dead time compensation storage unit 114 is 8 μs, the rise or fall of the PWM signal after the dead time given by the dead time giving unit 113 calculated according to the positive or negative of the current detection circuits 117a to 117c. Move down by 8 μs.

A timing chart regarding the output of the power converter 6 in the prior art and the present invention will be described with reference to FIGS. 3 and 4. FIG. FIG. 3 is a diagram showing a timing chart when the current is in the forward direction in the power converter according to the prior art, and FIG. 4 is a diagram showing a timing chart when the current is in the forward direction in the power converter according to the present embodiment. be.

3 and 4, the horizontal axis indicates time [s], and the vertical axis indicates, from top to bottom, the output voltage command, the gate signal of switching element Q1 after dead time compensation, and the signal of switching element Q2 after dead time compensation. The gate signal, the gate signal of Q1 after the dead time is given, the gate signal of the switching element Q2 after the dead time is given, the ideal output voltage, and the output voltage considering the operation delay of the semiconductor element and the like are shown.

Also, the specifications of FIGS. 3 and 4 are the same, and the waveforms shown in FIGS. 3 and 4 focus on the operation of the switching elements Q1 and Q2 forming the U phase. Here, it is assumed that the current flowing through the electric motor 5 is directed from the power conversion device 6 to the electric motor 5 .

The output voltage command generated by the PWM signal generator 111 corresponds to the gate signal of the switching element Q1 in the switching elements Q1 and Q2 that constitute the upper and lower arms. When the output voltage command becomes High, the switching element Q1 is turned on and the output voltage becomes High. For example, when the voltage of the filter capacitor 14 is DC 1500V, when the switching element Q1 is turned on, the output voltage is 1500V, and when the switching element Q1 is turned off, the output voltage is Low. The voltage is about several volts.

However, it is necessary to provide a dead time during which the switching elements Q1 and Q2 are turned off at the same time so that the switching elements Q1 and Q2 are not turned on at the same time. The output voltage during dead time depends on the polarity of the current flowing through the motor 5 . For example, when the current flowing through the electric motor 5 is directed from the power conversion device 6 to the electric motor 5, the diode D2 of the lower arm becomes conductive during the dead time period, so the output voltage becomes Low. On the other hand, when the current flowing through the electric motor 5 is directed from the electric motor 5 to the power conversion device 6, the diode D1 of the upper arm becomes conductive during the dead time period, so the output voltage becomes High. For this reason, it is necessary to perform dead time compensation according to the polarity of the current flowing through the electric motor 5 .

The polarity of the current flowing through the electric motor 5 in FIGS. 3 and 4 is the direction from the power conversion device 6 to the electric motor 5. In this case, since the output voltage is Low during the dead time period, the output voltage is insufficient for the output voltage command. Therefore, by performing dead time compensation for advancing the rise of the gate signal of the switching element Q1, the ON time of the switching element Q1 is lengthened and the error in the output voltage is reduced.

3 and 4, the dead time compensation amount is TD. Dead time compensation amount TD is stored in dead time compensation storage unit 114 . The gate signal of the switching element Q2 after dead time compensation is a signal obtained by inverting the High/Low of the gate signal of the switching element Q1.
This dead time compensation is performed by dead time compensation section 115, and dead time is given to switching elements Q1 and Q2 subjected to dead time compensation.

FIG. 3 is a diagram showing a timing chart when the current is in the positive direction in the conventional power converter. In the prior art shown in FIG. 3, the dead time is TD, and this dead time TD has the same value as the dead time compensation amount TD. For example, if the dead time compensation amount TD is 10 μs, the dead time TD is also 10 μs. The dead time delays the rise of the gate signals of switching elements Q1 and Q2 by the dead time. As a result, it is possible to provide a period during which both switching elements Q1 and Q2 are turned off at the same time. This dead time is imparted by the dead time imparting section 113 using the numerical value of the dead time stored in the dead time storage section 112 . In the configuration according to the embodiment shown in FIG. 2, the dead time is given after the dead time compensation, but the order may be reversed.

Next, referring to FIG. 3, an ideal output voltage will be described using gate signals of switching elements Q1 and Q2 after dead time compensation and dead time.
At time 0s, the switching element Q2 is on and the switching element Q1 is off. In this case, the diode D2 of the lower arm becomes conductive, so the output voltage becomes Low.

Next, the switching elements Q1 and Q2 are both turned off at the dead time TD. In this case also, the output voltage becomes Low because the diode D2 of the lower arm is in a conductive state.

Next, when the switching element Q1 is turned on, the output voltage becomes High.
After that, the switching element Q1 is turned off, and when the dead time TD in which both the switching elements Q1 and Q2 are turned off, the diode D2 becomes conductive and the output voltage becomes Low.

From the above, it can be seen that if the on-pulse width of the output voltage command is T, the pulse width at which the ideal output voltage becomes High is also T, and both match, and no output voltage error occurs.

On the other hand, even if the gate signals are input to the switching elements Q1 to Q6, the gate drive circuits 101 to 106 and the switching elements Q1 to Q6 have their own operation delays. 3 is different from the ideal output voltage.

Here, as delay times caused by the gate drive circuits 101 to 106 and the switching elements Q1 to Q6, the delay time on the turn-on side is referred to as turn-on delay time TON, and the delay time on the turn-off side is referred to as turn-off delay time TOFF.

In FIG. 3, considering the turn-on delay time TON and the turn-off delay time TOFF with respect to the ideal output voltage, the period during which the output voltage is Low is lengthened by the turn-on delay time TON, and the period during which the output voltage is High is It is lengthened by the turn-off delay time TOFF.

That is, the pulse width at which the output voltage becomes High considering the turn-on delay time TON and the turn-off delay time TOFF is T-TON+TOFF using the output voltage command T, the turn-on delay time TON and the turn-off delay time TOFF. For example, if the output voltage command T is 50 μs, the turn-on delay time TON is 1 μs, and the turn-off delay time TOFF is 3 μs, the pulse width at which the output voltage of the actual machine goes High is 52 μs (=50 μs−1 μs+3 μs).

On the other hand, in the actual machine, there is an output voltage error of 2 μs against the output voltage command T of 50 μs, so it is necessary to improve it.

FIG. 4 is a diagram showing a timing chart when the current is in the positive direction in the power conversion device 6 according to this embodiment.
An operation mode of the dead time compensator 115 using the dead time compensation storage unit 114, which is newly employed in this embodiment, will be described.

The dead time compensation unit 115 refers to the value of the dead time compensation storage unit 114 and calculates the amount of dead time compensation. For example, in FIG. 4, at least one of the voltage detection value of the filter capacitor 14 from the voltage detection circuit 118, the temperature detection value from the element temperature detection unit 116, and the current detection value of the electric motor 5 detected by the current detection circuits 117a to 117c. , for example, the turn-on delay time TON is calculated to be 1 μs, and the turn-off delay time TOFF is calculated to be 3 μs.

Furthermore, the dead time compensator 115 uses the dead time TD (eg, 10 μs) stored in advance in the dead time storage unit 112 to calculate the dead time compensation amount TD+TON-TOFF. In this example, the final value of the dead time compensation amount calculated by dead time compensation section 115 is 8 μs (=10 μs+1 μs−3 μs).

The dead time compensator 115 advances the rise of the switching element Q1 using the dead time compensation amount TD+TON-TOFF calculated by itself. For example, as shown in FIG. 4, the rise of the switching element Q1 is advanced by 8 μs with respect to the output voltage command. Also, the gate signal of the switching element Q2 is a signal obtained by inverting the High/Low of the gate signal of the switching element Q1.

The dead time imparting section 113 imparts the dead time TD to the gate signals of the switching elements Q1 and Q2 using the value of the dead time storage section 112. This dead time TD delays the rise of each of switching elements Q1 and Q2. For example, in FIG. 4, the dead time TD is assumed to be 10 μs.

The ideal output voltage of the power conversion device 6 is a high voltage when the gate signal of the switching element Q1 is high after the dead time is given, and is low when the gate signal of the switching element Q1 is low after the dead time is given. voltage. That is, the pulse width at which the ideal output voltage becomes High coincides with the gate signal of the switching element Q1 after the dead time is given.

For example, if the pulse width of the high output voltage command is 50 μs, the pulse width of the high gate signal of the switching element Q1 after the dead time is given is 48 μs (=50 μs+8 μs (dead time compensation amount TD+TON− TOFF)-10 μs (dead time TD)). That is, a voltage error of 2 μs occurs between the output voltage command and the ideal output voltage of the power converter 6 .

On the other hand, a turn-on delay time TON and a turn-off delay time TOFF occur in the output voltage of the actual power conversion device 6 . Specifically, a turn-on delay time TON occurs when the gate signal of the switching element Q1 after the dead time is switched from Low to High, and a turn-off delay time TOFF occurs when it switches from High to Low.

For example, if the turn-on delay time TON is 1 μs and the turn-off delay time TOFF is 3 μs, the actual output voltage will have a low period 1 μs longer and a high period 3 μs longer, resulting in a total high period 2 μs longer. means That is, the pulse width at which the gate signal of the switching element Q1 becomes High after the dead time is given was 48 μs as described above, but the pulse width at which the output voltage of the actual device becomes High is 2 μs longer than 48 μs. Therefore, it becomes 50 μs. Therefore, the pulse width of the high output voltage command is 50 μs, and the output voltage error can be brought infinitely close to zero.

As described above, in this embodiment, the dead time compensation storage unit 114 is newly provided in consideration of the characteristics of the turn-on delay time TON and the turn-off delay time TOFF of the gate drive circuits 101-106 and the switching elements Q1-Q6. The dead time compensation storage unit 114 stores at least a voltage detection value of the filter capacitor 14 from the voltage detection circuit 118, a temperature detection value from the element temperature detection unit 116, and a current detection value of the motor 5 from the current detection circuits 117a to 117c. By performing dead time compensation in the dead time compensator 115 based on either of them, it is possible to bring the output voltage error infinitely close to zero.

The dead time storage unit 112 depends on the voltage detection value of the filter capacitor 14 from the voltage detection circuit 118, the temperature detection value from the element temperature detection unit 116, and the current detection values of the motor 5 from the current detection circuits 117a to 117c. A fixed value that does not apply. Since each of these detection circuits includes a detection error, if the dead time is insufficient due to the detection error, a short-circuit current may occur and the power converter 6 may fail. Therefore, the dead time storage unit 112 stores a fixed value and the dead time imparting unit 113 imparts the dead time TD so that the short-circuit current does not occur within the operating range of the power conversion device 6 .

Next, using FIGS. 5 to 10, motor current dependence (FIGS. 5 and 6), element temperature dependence (FIGS. 7 and 8), and filter capacitor voltage in the output voltage waveform of the power converter according to this embodiment. Dependencies (FIGS. 9 and 10) are described. In the following, the U-phase switching element Q1 is taken as an example from the switching elements Q1 to Q6.

In the explanation of each dependence, dead time compensation and dead time are ignored in order to explain the difference between the output voltage command and the output voltage of the actual machine, that is, the output voltage error. It should be noted that the delay time of the output voltage of the actual machine is the time until the output voltage reaches 50% of the voltage value at which it becomes High.

Also, since the polarity of the current flowing through the electric motor 5 is directed from the power converter 6 to the electric motor 5, the output voltage command corresponds to the gate signal of the switching element Q1 in the U phase.

(1) Motor Current Dependency FIG. 5 is a diagram showing the motor current dependence (hereinafter simply referred to as “current dependence”) in the output voltage waveform of the power converter according to the present embodiment. Among the motor currents flowing through the switching elements Q1 to Q6, the motor current flowing through the switching element Q1 will be described below as an example. The other switching elements Q2 to Q6 are similar to the switching element Q1 described below.

The turn-on delay and turn-off delay of the gate drive circuit 101 and the switching element Q1 depend on the current flowing through the switching element Q1. The current flowing through the switching element Q1 can be detected by using the detected value of the current flowing through the electric motor 5 and the gate signal of the switching element Q1.

Here, regarding the turn-on delay time TON, the turn-on delay time when the current flowing through the switching element Q1 is small is TON1, and the turn-on delay time when the current is large is TON2. Since the turn-on delay time TON has a characteristic of being shorter as the current is smaller and longer as the current is larger, TON2>TON1.

On the other hand, regarding the turn-off delay time TOFF, the turn-off delay time is TOFF1 when the current flowing through the switching element Q1 is small, and the turn-off delay time is TOFF2 when the current is large. Since the turn-off delay time TOFF has a characteristic that it becomes longer as the current is smaller and shorter as the current is larger, TOFF1>TOFF2.

Regarding the output voltage of the actual machine, an output voltage error of (TOFF-TON) occurs with respect to the output voltage command. This output voltage error is (TOFF1-TON1) for a small current and ( TOFF2-TON2). As described above, the turn-off delay time is TOFF1>TOFF2, and the turn-on delay time is TON2>TON1, so the output voltage error increases as the current decreases.

FIG. 6 is a diagram showing an example of current dependence data of an output voltage error stored in the dead time compensation storage unit 114 of the power converter according to this embodiment. The horizontal axis is the current [A], and the vertical axis is the output voltage error [μs]. According to the characteristics shown in FIG. 5, the output voltage error becomes larger when the current is small, and becomes smaller as the current increases. The dead time compensation storage unit 114 refers to this current dependency data to calculate the dead time compensation amount.

Specifically, when the current flowing through the switching element Q1 is small, the dead time TD of the dead time storage unit 112 is used in addition to the output voltage error TOFF1-TON1 calculated by the dead time compensation calculation unit 114. Calculate the amount of time compensation. Similarly, when the current flowing through the switching element Q1 is large, dead time compensation is performed using the dead time TD of the dead time storage unit 112 in addition to the output voltage error TOFF2-TON2 calculated by the dead time compensation calculation unit 114. Calculate quantity.

Here, the current dependency of the output voltage error shown in FIG. 6 may be presented using a line graph, an approximation function, or table values. In addition, although this current dependency is a function that reduces the voltage error with respect to the current in FIG. 6, it may be a non-linear function with respect to the current.

Furthermore, although the turn-on delay times TON1 and TON2 and the turn-off delay times TOFF1 and TOFF2 have been described as the delay times of the switching element Q1, they also include paths from the output voltage command including the gate drive circuit 101 and the output voltage of the actual machine. It may be the sum of the delay times.

Also, when the current flowing through the switching element becomes equal to or less than the set value, the dead time compensation amount may be zero, that is, a process of stopping the compensation of the output voltage error may be incorporated.

As described above, in view of the current dependency of the output voltage errors of the gate drive circuits 101 to 106 and the switching elements Q1 to Q6, the dead time compensation amount is calculated and the dead time compensation is performed, so that the power that changes from moment to moment The output voltage error can be reduced according to the current of the converter 6 .

(2) Element Temperature Dependency FIG. 7 is a diagram showing element temperature dependence (hereinafter simply referred to as "temperature dependence") in the output voltage waveform of the power converter according to the present embodiment. The element temperature of the switching element Q1 will be described below as an example from among the element temperatures of the switching elements Q1 to Q6. The other switching elements Q2 to Q6 are similar to the switching element Q1 described below.

The turn-on delay and turn-off delay of the gate drive circuit 101 and the switching element Q1 depend on the element temperature of the switching element Q1. The temperature of the switching element Q1 is measured by a temperature detector (not shown) such as a thermistor, or by measuring the temperature of a cooler (not shown) that cools the switching elements Q1 to Q6 and the diodes D1 to D6. An element temperature estimated based on the operating state of the conversion device 6 may be used.

Here, regarding the turn-on delay time TON, the switching element Q1 has a turn-on delay time TON3 when the temperature is low and a turn-on delay time TON4 when the temperature is high. Since the turn-on delay time TON has a characteristic of being shorter as the temperature is lower and longer as the temperature is higher, TON4>TON3.

On the other hand, regarding the turn-off delay time TOFF, the switching element Q1 has a turn-off delay time TOFF3 at low temperatures and a turn-off delay time TOFF4 at high temperatures. The turn-off delay time TOFF has a characteristic that the higher the temperature, the longer the turn-off delay time TOFF, and the lower the temperature, the shorter the turn-off delay time TOFF4>TOFF3.

Regarding the output voltage of the actual machine, an output voltage error of (TOFF-TON) occurs with respect to the output voltage command. This output voltage error is (TOFF3-TON3) at low temperatures, and ( TOFF4-TON4). As described above, the turn-off delay time is TOFF4>TOFF3, and the turn-on delay time is TON4>TON3, so the output voltage error increases as the temperature rises.

FIG. 8 is a diagram showing an example of temperature dependence data of output voltage error stored in the dead time compensation storage unit 14 of the power converter according to the present embodiment. The horizontal axis is temperature [° C.], and the vertical axis is output voltage error [μs]. According to the characteristics shown in FIG. 7, the output voltage error increases as the temperature increases. The dead time compensation storage unit 114 refers to this temperature dependent data to calculate the amount of dead time compensation.

Specifically, when the temperature of the switching element Q1 is low, the dead time compensation amount is calculated using the dead time TD of the dead time storage unit 112 in addition to the output voltage error TOFF3-TON3 calculated by the dead time compensation calculation unit 114. to calculate Similarly, when the temperature of the switching element Q1 is high, the dead time compensation amount is calculated using the dead time TD of the dead time storage unit 112 in addition to the output voltage error TOFF4-TON4 calculated by the dead time compensation calculation unit 114. do.

Here, the temperature dependence of the output voltage error shown in FIG. 8 may be presented using a line graph, approximate function, or table values. Also, although this temperature dependence is a function in which the voltage error increases with respect to temperature in FIG. 8, it may be a nonlinear function with respect to temperature.

Furthermore, although the turn-on delay times TON3 and TON4 and the turn-off delay times TOFF3 and TOFF4 have been described as the delay times of the switching element Q1, they also include paths from the output voltage command including the gate drive circuit 101 and the output voltage of the actual machine. It may be the sum of the delay times.

As described above, considering the temperature dependence of the output voltage errors of the gate drive circuits 101 to 106 and the switching elements Q1 to Q6, the amount of dead time compensation is calculated and the dead time compensation is performed, thereby realizing power that changes from moment to moment. The output voltage error can be reduced according to the temperature of the conversion device 6 .

(3) Filter Capacitor Voltage Dependency FIG. 9 is a diagram showing the voltage dependency of the filter capacitor 14 in the output voltage waveform of the power converter according to this embodiment (hereinafter simply referred to as "voltage dependency"). From among the voltage dependencies of the switching elements Q1 to Q6 with respect to the voltage of the filter capacitor 14, the voltage dependence of the switching element Q1 will be described below as an example. The other switching elements Q2 to Q6 are similar to the switching element Q1 described below.

The turn-on and turn-off delays of gate drive circuit 101 and switching element Q1 depend on the voltage of filter capacitor . The voltage detected by the voltage detection circuit 118 is used as the voltage of the filter capacitor 14 .

Here, regarding the turn-on delay time TON, the turn-on delay time of the switching element Q1 when the voltage of the filter capacitor 14 is low is TON5, and the turn-on delay time when the voltage is high is TON6. The turn-on delay time TON has a characteristic that the lower the voltage, the shorter the turn-on delay time TON, and the higher the voltage, the longer the turn-on delay time TON.

On the other hand, regarding the turn-off delay time TOFF, the turn-off delay time of the switching element Q1 when the voltage of the filter capacitor 14 is low is TOFF5, and the turn-off delay time when it is high is TOFF6. Since the turn-off delay time TOFF has a characteristic that the higher the voltage, the longer it is, and the lower the voltage, the shorter it is, TOFF6>TOFF5.

Regarding the output voltage of the actual machine, an output voltage error of (TOFF-TON) occurs with respect to the output voltage command, but this output voltage error is (TOFF5-TON5) at low voltage and becomes (TOFF6-TON6). As described above, the turn-off delay time is TOFF6>TOFF5, and the turn-on delay time is TON6>TON5, so the output voltage error increases as the voltage increases.

FIG. 10 is a diagram showing an example of voltage dependence data of an output voltage error stored in the dead time compensation storage unit 14 of the power converter according to this embodiment. The horizontal axis is the voltage [V], and the vertical axis is the output voltage error [μs]. Due to the characteristics shown in FIG. 9, the output voltage error increases as the voltage increases. The dead time compensation storage unit 114 refers to this voltage-dependent data to calculate the amount of dead time compensation.

Specifically, when the voltage of the filter capacitor 14 is low, the dead time is calculated using the dead time TD of the dead time storage unit 112 in addition to the output voltage error TOFF5-TON5 calculated by the dead time compensation calculation unit 114. Calculate the amount of compensation. Similarly, when the voltage of the filter capacitor 14 is high, the dead time compensation amount is calculated using the dead time TD of the dead time storage unit 112 in addition to the output voltage error TOFF6-TON6 calculated by the dead time compensation calculation unit 114. to calculate

Here, the voltage dependence of the output voltage error shown in FIG. 10 may be presented using a line graph, an approximation function, or table values. Also, although this voltage dependence is a function in which the voltage error increases with voltage in FIG. 10, it may be a nonlinear function with respect to voltage.

As described above, in view of the voltage dependence of the output voltage errors of the gate drive circuits 101 to 106 and the switching elements Q1 to Q6, the amount of dead time compensation is calculated and the dead time compensation is performed, whereby the power that changes from moment to moment The output voltage error can be reduced according to the voltage of the filter capacitor 14 of the converter 6 .

Up to this point, the case where the current flowing in the electric motor 5 flows from the electric power conversion device 6 to the electric motor 5 has been described. However, even when the electric current flows from the electric motor 5 to the electric power conversion device 6, the polarity of the output voltage error and the dead time must be considered. , the output voltage error can be similarly reduced.

The present invention is not limited to the above examples, and includes various modifications. For example, the above embodiments have been described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the described configurations.

1 overhead line, 2 rail, 3 wheel, 4 bogie, 5 electric motor, 6 power converter, 7 current collector, 8 vehicle, 9 circuit breaker, 10, 11 contactor, 12 resistor, 13 filter reactor, 14 filter capacitor, Q1 to Q6 switching element, D1 to D6 diode, 100 control section, 101 to 106 gate drive circuit, 111 PWM signal generation section, 112 dead time storage section, 113 dead time giving section, 114 dead time compensation storage section, 115 dead time Compensation section, 116 element temperature detection section, 117a to 117c current detection circuit, 118 voltage detection circuit

Claims

At least one set of at least two semiconductor elements connected in series is connected to a DC power supply, and a connection point between upper and lower arms composed of the at least two semiconductor elements connected in series is connected to an AC load to supply DC power from the DC power supply. a switching unit that converts to alternating current power;
a PWM signal generation unit that generates a gate signal for PWM-controlling the semiconductor element that constitutes the switching unit;
a dead time generator for generating a dead time in which both of the at least two semiconductor elements connected in series are turned off;
A dead time compensator for compensating for the dead time,
The dead time generator generates the dead time with a preset fixed value,
The power converter, wherein the dead time compensator compensates for an operation delay associated with turn-on and turn-off of the semiconductor element.
The power converter according to claim 1,
a current detection circuit that detects the current flowing through the AC load;
a temperature detection circuit that detects the temperature of the semiconductor element;
and a voltage detection circuit that detects the voltage of the DC power supply,
The power converter, wherein the dead time compensator compensates for the operation delay using at least one detected value from the current detection circuit, the temperature detection circuit, and the voltage detection circuit.
The power converter according to claim 2,
The dead time compensating unit has a storage unit that stores one of a line graph, an approximation function, and a table showing the characteristics of the operation delay with respect to the detection value, and the characteristics of the operation delay stored in the storage unit and compensating for the operation delay based on the power converter.
The power converter according to claim 2 or 3,
The dead time compensating unit is characterized in that, when the detected value is the current detected value from the current detection circuit, the operation delay compensation is stopped when the current detected value becomes equal to or less than a preset value. Power converter.
The power converter according to any one of claims 1 to 4,
A power converter, wherein the semiconductor element forming the switching unit is made of silicon or a semiconductor material having a wider bandgap than silicon as a base material.
The power converter according to any one of claims 1 to 5,
A power conversion device, wherein the semiconductor element constituting the switching unit is any one of a voltage-driven MOSFET, an IGBT, and a multi-gate IGBT.
A railway vehicle equipped with the power converter according to any one of claims 1 to 6.
At least one set of at least two semiconductor elements connected in series is connected to a DC power supply, and the semiconductor element constitutes a switching section that connects a connection point between upper and lower arms composed of the at least two semiconductor elements connected in series to an AC load. is PWM-controlled to convert the DC power from the DC power supply to AC power,
generating a dead time with a preset fixed value for turning off both the at least two semiconductor elements connected in series;
A power conversion method, comprising: compensating for an operation delay accompanying turn-on and turn-off of the semiconductor element.
The power conversion method according to claim 8,
A power conversion method, wherein the operation delay is compensated for by using at least one detected value of the current flowing through the AC load, the temperature detected value of the semiconductor element, and the voltage detected value of the DC power supply. .
The power conversion method according to claim 9,
A power conversion method, comprising: compensating for the operating delay based on one of a line graph, an approximation function, and a table showing characteristics of the operating delay with respect to the at least one sensed value.
The power conversion method according to claim 9 or 10,
A power conversion method, wherein when the operation delay is compensated using the current detection value, the operation delay compensation is stopped when the current detection value becomes equal to or less than a preset value.