WO2022217629A1 - 像素单元 - Google Patents

像素单元 Download PDF

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Publication number
WO2022217629A1
WO2022217629A1 PCT/CN2021/088398 CN2021088398W WO2022217629A1 WO 2022217629 A1 WO2022217629 A1 WO 2022217629A1 CN 2021088398 W CN2021088398 W CN 2021088398W WO 2022217629 A1 WO2022217629 A1 WO 2022217629A1
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WO
WIPO (PCT)
Prior art keywords
sub
pixel electrode
pixel
area
branch
Prior art date
Application number
PCT/CN2021/088398
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English (en)
French (fr)
Inventor
陈梅
陈兴武
宋琪
李冬泽
Original Assignee
Tcl华星光电技术有限公司
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Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Priority to US17/297,011 priority Critical patent/US12032246B2/en
Publication of WO2022217629A1 publication Critical patent/WO2022217629A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133707—Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes

Definitions

  • the present invention relates to the field of display technology, in particular to a pixel unit.
  • VA liquid crystal displays are widely used in TV, monitor and other display fields due to their outstanding high contrast ratio.
  • chiral multi-domain vertical alignment (Chiral VA) liquid crystal displays are gradually developed.
  • the chiral multi-domain vertical alignment type (Chiral VA) liquid crystal display is to add a chiral compound to the negative nematic phase parent liquid crystal, so that the liquid crystal molecules are reversible between the vertical alignment state (dark state) and the plane twisted state (bright state). switch.
  • the chiral multi-domain vertical alignment mode utilizes optical rotation and birefringence, which can reduce wavelength dependence and suppress dispersion; When the tipping occurs, the dark lines between domains can be effectively reduced, so as to achieve the effect of improving the penetration rate.
  • the angle between the branch and the trunk of the pixel electrode pattern in the chiral multi-domain vertical alignment mode is not uniform, generally not 45°.
  • the first object of the present invention is to provide a pixel unit, which avoids concentrated dark streaks in the bottom area of the sub-pixel region by adopting a large angle design in the angle between the fourth sub-pixel electrode branch and the left side of the lower frame of the sub-frame electrode.
  • the present invention provides a pixel unit including a main pixel area and a sub-pixel area, the main pixel area includes a main pixel electrode, the sub-pixel area includes: a sub-pixel electrode with at least one domain, and the sub-pixel electrode includes: A sub-pixel frame electrode located at the edge of the sub-pixel electrode; a first sub-pixel electrode stem and a second sub-pixel electrode stem that are perpendicular to each other; and sub-pixel electrode branches extending from the first sub-pixel electrode stem and the second sub-pixel electrode stem
  • the secondary pixel electrode trunk extends to the sub pixel frame electrode; wherein the first sub pixel electrode trunk and the second sub pixel electrode trunk and the sub pixel frame electrode divide the sub pixel area into a first sub pixel area.
  • the first partition is provided with a first sub-pixel electrode branch
  • the second partition is provided with a second sub-pixel electrode branch
  • the third partition is A third sub-pixel electrode branch is arranged, a fourth sub-pixel electrode branch is arranged in the fourth sub-region, the fourth sub-region is located in the lower right area of the sub-pixel area, and the fourth sub-pixel electrode branch is connected to the sub-pixel electrode.
  • the left included angle of the lower frame electrode of the sub-pixel frame electrode is an obtuse angle.
  • the obtuse angle ranges from 90 degrees to 120 degrees.
  • the fourth sub-pixel electrode branch and the third sub-pixel electrode branch are arranged parallel to each other.
  • first sub-pixel electrode branch and the second sub-pixel electrode branch are perpendicular to each other; the second sub-pixel electrode branch and the third sub-pixel electrode branch are parallel to each other.
  • first sub-pixel electrode branch and the second sub-pixel electrode branch are perpendicular to each other; the first sub-pixel electrode branch and the third sub-pixel electrode branch are parallel to each other.
  • first sub-pixel electrode branch and the second sub-pixel electrode branch are parallel to each other; the first sub-pixel electrode branch and the third sub-pixel electrode branch are parallel to each other.
  • first sub-pixel electrode branch and the second sub-pixel electrode branch are parallel to each other; the first sub-pixel electrode branch and the third sub-pixel electrode branch are perpendicular to each other.
  • the main pixel electrode includes: a main pixel frame electrode, located at the edge of the main pixel electrode; a first main pixel electrode trunk and a second main pixel electrode trunk orthogonal to each other; and a main pixel electrode branch, from the The first main pixel electrode trunk and the second main pixel electrode trunk extend to the main pixel border electrode; wherein the first main pixel electrode trunk and the second main pixel electrode trunk and the main pixel border
  • the electrode divides the main pixel electrode branch into a first area, a second area, a third area and a fourth area, the first area is provided with a first main pixel electrode branch, and the second area is provided with a third area
  • the pixel electrode branches are perpendicular to each other; the third main pixel electrode branch and the fourth main pixel electrode branch are per
  • the present invention also provides a pixel unit, comprising a main pixel area and a sub-pixel area surrounding the main pixel area, the main pixel area includes: a main pixel electrode, and the main pixel electrode includes first main pixels orthogonal to each other an electrode trunk and a second main pixel electrode trunk; the sub-pixel area includes: a sub-pixel electrode, and the main pixel electrode is embedded in the sub-pixel electrode; the sub-pixel electrode includes: a sub-pixel frame electrode, located in the sub-pixel electrode the edge of the sub-pixel electrode; and the sub-pixel electrode branch, a special-shaped slit is arranged between the main pixel electrode and the sub-pixel electrode; wherein the first main pixel electrode trunk and the second main pixel electrode trunk connect the The sub-pixel electrode and the sub-pixel region are divided into a first region, a second region, a third region and a fourth region, the first sub-pixel electrode branch is arranged in the first region, and the second region is arranged with a branch of the first sub-pixel electrode
  • the second sub-pixel electrode branch, the third sub-pixel electrode branch is disposed in the third area
  • the fourth sub-pixel electrode branch is disposed in the fourth area
  • the fourth area is located at the lower right of the pixel unit area
  • the left included angle between the fourth sub-pixel electrode branch and the lower border electrode of the sub-pixel border electrode is an obtuse angle.
  • the obtuse angle ranges from 90 degrees to 120 degrees.
  • the present invention proposes a pixel electrode.
  • a pixel electrode By adopting a large angle design between the fourth sub-pixel electrode branch in the fourth sub-region and the left corner of the lower frame of the sub-pixel electrode frame in the sub-pixel electrode, the existence of the sub-pixel area at the bottom area is avoided. Concentrated dark lines.
  • FIG. 1 is a schematic plan view of a pixel electrode provided by the prior art
  • FIG. 2 is a schematic plan view of a pixel unit provided in Embodiment 1 of the present invention.
  • FIG. 3 is a schematic plan view of a pixel unit provided in Embodiment 2 of the present invention.
  • FIG. 4 is a schematic plan view of a pixel unit provided in Embodiment 3 of the present invention.
  • FIG. 5 is a schematic plan view of a pixel unit according to Embodiment 4 of the present invention.
  • FIG. 6 is a schematic plan view of a pixel unit provided in Embodiment 5 of the present invention.
  • FIG. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more of said features. In the description of the present application, “plurality” means two or more, unless otherwise expressly and specifically defined.
  • Embodiment 1 of the present invention provides a pixel unit 100 including a main pixel electrode 110 located in a main pixel area and a sub pixel electrode 120 located in a sub pixel area.
  • the main pixel electrode 110 includes: a main pixel frame electrode 111, a first main pixel electrode trunk 112, a second main pixel electrode trunk 113 and a main pixel electrode branch (marks 114, 115, 116 and 117 in FIG. 2 . ).
  • the first main pixel electrode trunk 112 and the second main pixel electrode trunk 113 are orthogonal to each other.
  • the main pixel electrode branches extend from the first main pixel electrode trunk 112 and the second main pixel electrode trunk 113 to the main pixel border electrode 111 .
  • the first main pixel electrode trunk 112 , the second main pixel electrode trunk 113 and the main pixel frame electrode 111 divide the main pixel area into a first area 101 , a second area 102 , a third area 103 and Fourth District 104.
  • the first area 101 is provided with a plurality of first main pixel electrode branches 117 parallel to each other
  • the second area 102 is provided with a plurality of second main pixel electrode branches 114 parallel to each other
  • the third area 103 A plurality of third main pixel electrode branches 115 parallel to each other are arranged in the fourth region 104
  • a plurality of fourth main pixel electrode branches 116 are arranged parallel to each other in the fourth region 104 .
  • the first area 101, the second area 102, the third area 103 and the fourth area 104 are distributed in an array, the first area 101 is located in the upper left area of the main pixel area, the second area 102 is located in the upper right area of the main pixel area, and the third area 103 Located in the lower left area of the main pixel area, the fourth area 104 is located in the lower right area of the main pixel area.
  • the main pixel frame electrode 111 is located at the edge of the main pixel electrode 110 and surrounds the main pixel electrode 110 .
  • the material of the main pixel electrode 110 is indium tin oxide.
  • the first main pixel electrode branch 117 and the second main pixel electrode branch 114 are perpendicular to each other; the third main pixel electrode branch 115 and the fourth main pixel electrode branch 116 are perpendicular to each other.
  • the first main pixel electrode branch 117 and the third main pixel electrode branch 115 are perpendicular to each other, and the second main pixel electrode branch 114 and the fourth main pixel electrode branch 116 are perpendicular to each other.
  • the first main pixel electrode branch 117 and the fourth main pixel electrode branch 116 are parallel to each other, and the second main pixel electrode branch 114 and the third main pixel electrode branch 115 are parallel to each other.
  • the main pixel electrode 110 includes four display domains.
  • the sub-pixel electrode 120 includes: a sub-pixel frame electrode 121 , a first sub-pixel electrode trunk 122 , a second sub-pixel electrode trunk 125 and sub-pixel electrode branches (marked 126 , 127 , 128 , 129 in FIG. 2 ).
  • the sub-pixel frame electrode 121 branches around the sub-pixel electrode.
  • the sub-pixel electrode branches extend from the first sub-pixel electrode stem 122 and the second sub-pixel electrode stem 125 to the sub-pixel border electrode 121 .
  • the material of the sub-pixel electrode 120 is indium tin oxide.
  • the first sub-pixel electrode trunk 122 , the second sub-pixel electrode trunk 125 and the sub-pixel frame electrode 121 divide the sub-pixel electrode branches into a first partition 105 , a second partition 106 , and a third partition 107 and a fourth sub-area 108, the first sub-area 105 is provided with a plurality of mutually parallel first sub-pixel electrode branches 126, and the second sub-area 106 is provided with a plurality of mutually parallel second sub-pixel electrode branches 127,
  • the third sub-area 107 is provided with a plurality of third sub-pixel electrode branches 128 parallel to each other, and the fourth sub-area 108 is provided with a plurality of mutually parallel fourth sub-pixel electrode branches 129.
  • the fourth sub-pixel electrode The left included angle between the electrode branch 129 and the lower frame electrode of the sub-pixel frame electrode 121 is an obtuse angle.
  • the obtuse angle ranges from 90 degrees to 120 degrees.
  • the first partition 105 is located in the upper left area of the sub pixel area
  • the second partition 106 is located in the upper right area of the sub pixel area
  • the third partition 107 is located in the lower left area of the sub pixel area
  • the fourth partition 108 is located in the lower right area of the sub pixel area.
  • the first sub-pixel electrode branch 126 and the second sub-pixel electrode branch 127 are perpendicular to each other.
  • the first sub-pixel electrode branch 126 is perpendicular to the third sub-pixel electrode branch 128
  • the second sub-pixel electrode branch 127 is parallel to the third sub-pixel electrode branch 128 .
  • the electrode directions of the second sub-pixel electrode branch 127 , the third sub-pixel electrode branch 128 and the fourth sub-pixel electrode branch 129 are the same.
  • the third sub-pixel electrode branch 128 is parallel to the fourth sub-pixel electrode branch 129 .
  • the sub-pixel electrode 120 includes three display domains, the first partition 105 is a display domain, the second partition 106 is a display domain, the third partition 107 and the fourth partition 108 are a display domain, wherein the third partition is a display domain. 107 is the same as the deflection direction of the pixel electrode branches in the fourth sub-area 108 .
  • the pixel unit 100 is further provided with a thin film transistor area, including: the main pixel area thin film transistor 131 , the sub pixel area thin film transistor 132 and the sharing Thin film manifold 133 .
  • the main pixel area thin film transistor 131 is connected to the main pixel electrode 110 for controlling the main pixel electrode 110; the sub pixel area thin film transistor 132 is connected to the sub pixel electrode 120 for controlling the sub pixel electrode 120.
  • the shared thin film collector tube 133 is connected to the scan lines for controlling the voltage difference between the main pixel electrode 110 and the sub pixel electrode 120 .
  • Embodiment 2 of the present invention provides a pixel unit 100a, which is different from Embodiment 1 in that the pattern structure of the sub-pixel electrode 120a is different.
  • the first sub-pixel electrode branch 126a and the third sub-pixel electrode branch 128a are parallel to each other.
  • the second sub-pixel electrode branch 127a is perpendicular to the fourth sub-pixel electrode branch 129a, and the fourth sub-pixel electrode branch 129a and the third sub-pixel electrode branch 128a are parallel to each other.
  • the electrode directions of the first sub-pixel electrode branch 126a, the third sub-pixel electrode branch 128a, and the fourth sub-pixel electrode branch 129a are the same.
  • Embodiment 3 of the present invention provides a pixel unit 100b, which is different from Embodiment 1 in that the structure of the sub-pixel electrode 120b is different. Specifically, the first sub-pixel electrode branch 126b and the third sub-pixel electrode branch 128b are parallel to each other. The second sub-pixel electrode branch 127b and the fourth sub-pixel electrode branch 129b in the sub-pixel region are parallel to each other. The first sub-pixel electrode branch 126b and the second sub-pixel electrode branch 127b are parallel to each other.
  • the electrode biases of the first sub-pixel electrode branch 126b, the second sub-pixel electrode branch 127b, the third sub-pixel electrode branch 128b, and the fourth sub-pixel electrode branch 129b are all the same.
  • the sub-pixel electrode 120b has one display domain, and the entire pixel unit 100b has five display domains.
  • Embodiment 4 of the present invention provides a pixel unit 100c, which is different from Embodiment 1 in that the structure of the sub-pixel electrode 120c is different. Specifically, the first sub-pixel electrode branch 126c and the third sub-pixel electrode branch 128c are perpendicular to each other. The second sub-pixel electrode branch 127c and the fourth sub-pixel electrode branch 129c are perpendicular to each other. The first sub-pixel electrode branch 126c and the second sub-pixel electrode branch 127c are parallel to each other.
  • the electrode biases of the first sub-pixel electrode branch 126c and the second sub-pixel electrode branch 127c are the same.
  • the sub-pixel region 120c has two display domains.
  • the first partition 105, the second partition 106, the third partition 107, the fourth partition 108, the first region 101, the second region 102, the The third area 103 and the fourth area 104 are square regular areas.
  • the bias of the partition electrodes in the main pixel area is not limited, that is, the first main pixel electrode branch 117 area, the second main pixel electrode branch 114 , the third main pixel electrode branch 115 and The positional relationship between the fourth main pixel electrode branches 116 is limited, which does not affect the invention of the present invention.
  • Embodiment 5 of the present invention provides a pixel unit 100 d, which is different from Embodiment 1 in that the sub-pixel electrode 120 d substantially surrounds the main pixel electrode 110 d. That is, the sub-pixel area surrounds the main pixel area.
  • the first main pixel electrode trunk 112d and the second main pixel electrode trunk 113d divide the sub pixel area and the main pixel area into a first area 105d, a second area 106d, a third area 107d and a fourth area 108d.
  • the fourth area 108d is located in the lower right area of the sub pixel area and the main pixel area
  • the first area 105d is located in the upper left area of the sub pixel area and the main pixel area
  • the second area 106d is located in the upper right area of the sub pixel area and the main pixel area
  • the third area 107d is located in the lower left area of the sub-pixel area and the main pixel area.
  • the main pixel electrode 110d and the sub-pixel electrode 120d are distinguished by the main pixel frame electrode 111d, the sub-pixel frame electrode 121d and the special-shaped slit 131d.
  • the special-shaped slit 131d is disposed between the main pixel frame electrode 111d and the sub-pixel frame electrode 121d.
  • the first sub-pixel electrode branch 126d and the first main pixel electrode branch 117d are disposed in the first region 105d.
  • the second sub-pixel electrode branch 127d and the second main pixel electrode branch 114d are disposed in the first region 106d.
  • the third sub-pixel electrode branch 128d and the third main pixel electrode branch 115d are disposed in the third region 107d.
  • the fourth sub-pixel electrode branch 129d and the fourth main pixel electrode branch 116d are disposed in the fourth region 108d.
  • the first main pixel electrode branch 117d and the second main pixel electrode branch 114d are perpendicular to each other; the third main pixel electrode branch 115d and the fourth main pixel electrode branch 116d are perpendicular to each other.
  • the first main pixel electrode branch 117d and the third main pixel electrode branch 115d are perpendicular to each other, and the second main pixel electrode branch 114d and the fourth main pixel electrode branch 116d are perpendicular to each other.
  • the first main pixel electrode branch 117d and the fourth main pixel electrode branch 116d are parallel to each other, and the second main pixel electrode branch 114d and the third main pixel electrode branch 115d are parallel to each other.
  • the first sub-pixel electrode branch 126d and the third sub-pixel electrode branch 128d are parallel to each other.
  • the second sub-pixel electrode branch 127d and the fourth sub-pixel electrode branch 129d are parallel to each other.
  • the first sub-pixel electrode branch 126d and the second sub-pixel electrode branch 127d are parallel to each other.
  • the electrode biases of the first sub-pixel electrode branch 126d, the second sub-pixel electrode branch 127d, the third sub-pixel electrode branch 128d, and the fourth sub-pixel electrode branch 129d are all the same.
  • the sub-pixel region has one display domain.
  • the present invention provides a pixel unit (100, 100a, 100b, 100c, and 100d), wherein the fourth sub-pixel electrode branch and the left angle of the lower frame of the sub-pixel electrode frame are designed with a large angle in the sub-pixel area. , and the angle ranges from 90 degrees to 1200 degrees, thereby avoiding concentrated dark streaks in the bottom region of the sub-pixel electrode 120 .
  • the present invention further provides a display panel including the pixel units of Embodiments 1-4.
  • the display panel is a liquid crystal display panel
  • the cross-sectional structure of the display panel includes: a first substrate 202 , a second substrate 207 , and a liquid crystal 204 .
  • the pixel electrode is formed between the first substrate 202 and the liquid crystal 204, and the second substrate 207 is disposed opposite to the first substrate 202 and maintains a first distance from the first substrate 202;
  • the liquid crystal 204 is located between the first substrate 202 and the second substrate 207 , and the twist angle of the liquid crystal 204 is greater than or equal to 50° and less than or equal to 90°.
  • the liquid crystal 204 is doped with a chiral agent to improve the transmittance of the display panel.
  • the first pitch is greater than or equal to 2 microns and less than or equal to 5 microns; the pitch p of the liquid crystal 204 is greater than or equal to 5 microns and less than or equal to 25 microns; the optical path difference ⁇ nd of the liquid crystal 204 is greater than or equal to 300 nm and It is less than or equal to 600 nm to ensure that the twist angle of the liquid crystal 204 is equal to or equal to 50° and less than or equal to 90°.
  • the first pitch is greater than or equal to 2.8 microns and less than or equal to 4 microns; the pitch p of the liquid crystal 204 is greater than or equal to 10 microns and less than or equal to 20 microns; the optical path difference ⁇ nd of the liquid crystal 204 is greater than or equal to Equal to 400 nm and less than or equal to 500 nm.
  • the liquid crystal 204 is injected between the first substrate 202 and the second substrate 207 by means of an integrated cell, etc.
  • polymerization Physically stable vertical alignment (Polmer Stabilized Vertically Aligned (PSVA) processes the liquid crystal cell to make the liquid crystal 204 form a pretilt angle to obtain the display panel.
  • PSVA process refers to irradiating the liquid crystal cell with ultraviolet light under a power-on condition, so that the liquid crystal 204 is reversed in a certain direction, and then the polymerizable polymer in the liquid crystal 204 is irradiated by ultraviolet light.
  • the monomers are polymerized to form a certain pretilt angle.
  • the first substrate 202 further includes a thin film transistor, an alignment layer and other parts that are not shown.
  • a color resist layer 206 is disposed between the second substrate 207 and the liquid crystal 204, and further, the alignment layer and the like are not shown.
  • the display panel further includes: a sealant 205 located between the first substrate 202 and the second substrate 207 ; a first polarizer 201 located on the side of the first substrate 202 away from the second substrate 207 and, a second polarizer 208 located on the side of the second substrate 207 away from the first substrate 202 .
  • the present application also provides a display device including the display panel.
  • the display device further includes a touch panel, and the touch panel is combined with the display panel in a built-in or externally mounted manner to realize the touch function of the display device.
  • Embodiments of the present application provide a display panel and a display device.
  • the display panel includes the pixel unit 100.
  • the left included angle is designed with a large angle, and the angle is in the range of 90 degrees to 120 degrees, thereby avoiding concentrated dark lines in the bottom region of the sub-pixel electrode 120 .

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  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
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  • Crystallography & Structural Chemistry (AREA)
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Abstract

本发明提供一种像素单元。第一次像素电极主干以及所述第二次像素电极主干与所述次像素边框电极将所述次像素区划分出第一分区、第二分区、第三分区以及第四分区，第四分区中设置有第四次像素电极分支，第四分区位于次像素区的右下区域，第四次像素电极分支与次像素边框电极的下边框电极的左边夹角为钝角。

Description

像素单元 技术领域
本发明涉及显示技术领域，具体涉及一种像素单元。
 背景技术
垂直排列液晶（VA）液晶显示器由于其突出的高对比度，广泛应用在电视、监视器等显示领域。随着大尺寸、高解析度液晶显示器的发展，为了进一步增加VA液晶显示器的亮态穿透率，手性多畴垂直配向型（Chiral VA）液晶显示器逐渐发展起来。
手性多畴垂直配向型（Chiral VA）液晶显示器是在负性向列相母体液晶中加入手性化合物，使得液晶分子在垂直取向态（暗态）和平面扭曲态（亮态）之间进行可逆切换。一方面，手性多畴垂直配向型模式利用旋光性和双折射，能够降低波长依耐性，抑制色散；另一方面，手性多畴垂直配向型模式中液晶分子在加电条件下沿各个方向发生倾倒，能够有效降低畴与畴之间的暗纹，从而达到穿透率提高的效果。然而为了满足最大穿透率设计，手性多畴垂直配向型模式的像素电极图案的分枝与主干的夹角不均一，一般不为45°。
 技术问题
如图1所示，在HVA配向（HVA Curing）过程中，研究发现低电位副区底端区域，分枝13与主干12的夹角10较小的区域存在集中性暗纹11。
针对上述背景，有必要提出一种新的像素单元，在副区中像素电极分支与电极主干的交界区域均采用大角度设计。
 技术解决方案
本发明第一目的提供一种像素单元，通过在第四次像素电极分支与次边框电极的下边框左边夹角采用大角度设计，避免次像素区底部区域存在集中性暗纹。
本发明提供一种像素单元，包括主像素区和次像素区，所述主像素区包括主像素电极，所述次像素区包括：次像素电极，具有至少一个畴，所述次像素电极包括：次像素边框电极，位于所述次像素电极的边缘；相互垂直的第一次像素电极主干以及第二次像素电极主干；以及次像素电极分支，从所述第一次像素电极主干以及所述第二次像素电极主干延伸至所述次像素边框电极；其中，所述第一次像素电极主干以及所述第二次像素电极主干与所述次像素边框电极将所述次像素区划分出第一分区、第二分区、第三分区以及第四分区，所述第一分区中设置有第一次像素电极分支，所述第二分区中设置有第二次像素电极分支，所述第三分区中设置有第三次像素电极分支，所述第四分区中设置有第四次像素电极分支，所述第四分区位于所述次像素区的右下区域，所述第四次像素电极分支与所述次像素边框电极的下边框电极的左边夹角为钝角。
进一步地，所述钝角的范围为90度-120度。
进一步地，所述第四次像素电极分支与所述第三次像素电极分支相互平行设置。
进一步地，所述第一次像素电极分支与所述第二次像素电极分支相互垂直；所述第二次像素电极分支与所述第三次像素电极分支相互平行。
进一步地，所述第一次像素电极分支与所述第二次像素电极分支相互垂直；所述第一次像素电极分支与所述第三次像素电极分支相互平行。
进一步地，所述第一次像素电极分支与所述第二次像素电极分支相互平行；所述第一次像素电极分支与所述第三次像素电极分支相互平行。
进一步地，所述第一次像素电极分支与所述第二次像素电极分支相互平行；所述第一次像素电极分支与所述第三次像素电极分支相互垂直。
进一步地，所述主像素电极包括：主像素边框电极，位于所述主像素电极的边缘；相互正交的第一主像素电极主干以及第二主像素电极主干；以及主像素电极分支，从所述第一主像素电极主干以及所述第二主像素电极主干延伸至所述主像素边框电极；其中，所述第一主像素电极主干以及所述第二主像素电极主干与所述主像素边框电极将所述主像素电极分支划分出第一区、第二区、第三区以及第四区，所述第一区中设置有第一主像素电极分支，所述第二区中设置有第二主像素电极分支，所述第三区中设置有第三主像素电极分支，所述第四区中设置有第四主像素电极分支；所述第一主像素电极分支与所述第二主像素电极分支相互垂直；所述第三主像素电极分支与所述第四主像素电极分支相互垂直；所述第一主像素电极分支与所述第三主像素电极分支相互垂直，所述第二主像素电极分支与所述第四主像素电极分支相互垂直。
本发明还提供一种像素单元，包括主像素区和包围所述主像素区的次像素区，所述主像素区包括:主像素电极，所述主像素电极包括相互正交的第一主像素电极主干以及第二主像素电极主干；所述次像素区包括：次像素电极，所述主像素电极嵌设于所述次像素电极内；所述次像素电极包括：次像素边框电极，位于所述次像素电极的边缘；以及次像素电极分支，所述主像素电极与所述次像素电极之间设有一异形狭缝；其中，第一主像素电极主干以及第二主像素电极主干将所述次像素电极与所述次像素区划分为第一区域、第二区域、第三区域以及第四区域，所述第一区域中设置有第一次像素电极分支，所述第二区域中设置有第二次像素电极分支，所述第三区域中设置有第三次像素电极分支，所述第四区域中设置有第四次像素电极分支，所述第四区域位于所述像素单元的右下区域，所述第四次像素电极分支与所述次像素边框电极的下边框电极的左边夹角为钝角。
进一步地，所述钝角的范围90度-120度。
 有益效果
本发明提出一种像素电极，通过在次像素电极中将第四分区中的第四次像素电极分支与次像素电极边框的下边框的左边夹角采用大角度设计，避免次像素区底部区域存在集中性暗纹。
 附图说明
下面结合附图和实施例对本发明作进一步的描述。
图1为现有技术提供的像素电极的平面示意图；
图2为本发明实施例1提供的像素单元的平面示意图；
图3为本发明实施例2提供的像素单元的平面示意图；
图4为本发明实施例3提供的像素单元的平面示意图；
图5为本发明实施例4提供的像素单元的平面示意图；
图6为本发明实施例5提供的像素单元的平面示意图；
图7为本发明一实施例提供的显示面板的结构示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
如图2所示，本发明实施例1提供一种像素单元100，包括位于主像素区的主像素电极110和位于次像素区的次像素电极120。
所述主像素电极110包括：主像素边框电极111、第一主像素电极主干112、第二主像素电极主干113以及主像素电极分支（图2中的标记114、标记115、标记116以及标记117）。
所述第一主像素电极主干112以及所述第二主像素电极主干113相互正交。所述主像素电极分支从所述第一主像素电极主干112以及所述第二主像素电极主干113延伸至所述主像素边框电极111。
所述第一主像素电极主干112以及所述第二主像素电极主干113与所述主像素边框电极111将所述主像素区划分出第一区101、第二区102、第三区103以及第四区104。所述第一区101中设置有相互平行的多根第一主像素电极分支117，所述第二区102中设置有相互平行的多根第二主像素电极分支114，所述第三区103中设置有相互平行的多根第三主像素电极分支115，所述第四区104中设置有相互平行的多根第四主像素电极分支116。第一区101、第二区102、第三区103以及第四区104阵列分布，第一区101位于主像素区的左上区域，第二区102位于主像素区的右上区域，第三区103位于主像素区的左下区域，第四区104位于主像素区的右下区域。
所述主像素边框电极111位于所述主像素电极110的边缘且围绕所述主像素电极110。所述主像素电极110的材料为氧化铟锡。
所述第一主像素电极分支117与所述第二主像素电极分支114相互垂直；所述第三主像素电极分支115与所述第主像素四电极分支116相互垂直。所述第一主像素电极分支117与所述第三主像素电极分支115相互垂直，所述第二主像素电极分支114与所述第四主像素电极分支116相互垂直。所述第一主像素电极分支117与所述第四主像素电极分支116相互平行，所述第二主像素电极分支114与所述第三主像素电极分支115相互平行。
所述主像素电极110包括四个显示畴。
所述次像素电极120包括：次像素边框电极121、第一次像素电极主干122、第二次像素电极主干125以及次像素电极分支（图2中的标记126、127、128、129）。
所述次像素边框电极121围绕所述次像素电极分支。所述次像素电极分支从所述第一次像素电极主干122以及所述第二次像素电极主干125延伸至所述次像素边框电极121。所述次像素电极120的材料为氧化铟锡。
所述第一次像素电极主干122以及所述第二次像素电极主干125与所述次像素边框电极121将所述次像素电极分支划分出第一分区105、第二分区106、第三分区107以及第四分区108，所述第一分区105中设置有多根相互平行的第一次像素电极分支126，所述第二分区106中设置有多根相互平行的第二次像素电极分支127，所述第三分区107中设置有多根相互平行的第三次像素电极分支128，所述第四分区108中设置有多根相互平行的第四次像素电极分支129，所述第四次像素电极分支129与所述次像素边框电极121的下边框电极的左边夹角为钝角。所述钝角的范围90度~120度。第一分区105位于次像素区的左上区域，第二分区106位于次像素区的右上区域，第三分区107位于次像素区的左下区域，第四分区108位于次像素区的右下区域。
在实施例1中，所述第一次像素电极分支126与所述第二次像素电极分支127相互垂直。所述第一次像素电极分支126垂直所述第三次像素电极分支128，所述第二次像素电极分支127平行所述第三次像素电极分支128。
所述第二次像素电极分支127、所述第三次像素电极分支128以及所述第四次像素电极分支129的电极方向一致。所述第三次像素电极分支128平行所述第四次像素电极分支129。
所述次像素电极120包括三个显示畴，分别是第一分区105为一个显示畴、第二分区106为一个显示畴、第三分区107与第四分区108为一个显示畴，其中第三分区107与第四分区108中的像素电极分支的偏转方向相同。
在一实施例中，在所述主像素区与所述次像素区之间，所述像素单元100还设有一薄膜晶体管区域，包括：主像素区薄膜晶体管131、次像素区薄膜晶体管132以及共享薄膜集体管133。所述主像素区薄膜晶体管131连接所述主像素电极110，用以控制所述主像素电极110；所述次像素区薄膜晶体管132连接所述次像素电极120，用以控制所述次像素电极120。共享薄膜集体管133连接扫描线，用以控制主像素电极110与次像素电极120的电压差。
如图3所示，本发明实施例2提供一种像素单元100a，与实施例1不同之处在于，所述次像素电极120a的图案结构不同。具体的，所述第一次像素电极分支126a与所述第三次像素电极分支128a相互平行。所述第二次像素电极分支127a垂直于所述第四次像素电极分支129a，所述第四次像素电极分支129a与所述第三次像素电极分支128a相互平行。
所述第一次像素电极分支126a、所述第三次像素电极分支128a以及所述第四次像素电极分支129a的电极方向一致。
如图4所示，本发明实施例3提供一种像素单元100b，与实施例1不同之处在于，所述次像素电极120b的结构不同。具体的，所述第一次像素电极分支126b与所述第三次像素电极分支128b相互平行。所述次像素区第二次像素电极分支127b与所述第四次像素电极分支129b相互平行。所述第一次像素电极分支126b与所述第二次像素电极分支127b相互平行。
所述第一次像素电极分支126b、所述第二次像素电极分支127b、所述第三次像素电极分支128b以及所述第四次像素电极分支129b的电极偏向皆相同。
所述次像素电极120b具有一个显示畴，整个像素单元100b具有5个显示畴。
如图5所示，本发明实施例4提供一种像素单元100c，与实施例1不同之处在于，所述次像素电极120c的结构不同。具体的，所述第一次像素电极分支126c与所述第三次像素电极分支128c相互垂直。所述第二次像素电极分支127c与所述第四次像素电极分支129c相互垂直。所述第一次像素电极分支126c与所述第二次像素电极分支127c相互平行。
所述第一次像素电极分支126c与所述第二次像素电极分支127c电极偏向皆相同。所述次像素区120c具有两个显示畴。
实施例1-4中的所述第一分区105、所述第二分区106、所述第三分区107、所述第四分区108、所述第一区101、所述第二区102、所述第三区103以及所述第四区104都是方形规则区域。并且在实施例1-4中，并未对主像素区的分区电极偏向作出限定，即并未对第一主像素电极分支117区第二主像素电极分支114、第三主像素电极分支115以及第四主像素电极分支116相互之间的位置关系作出限定，这并不影响本发明的发明点。
如图6所示，本发明实施例5提供一种像素单元100d，与实施例1不同之处在于，所述次像素电极120d大致对所述主像素电极110d形成包围状。即次像素区包围主像素区。
所述第一主像素电极主干112d与第二主像素电极主干113d将次像素区与主像素区划分为第一区域105d、第二区域106d、第三区域107d以及第四区域108d。第四区域108d位于次像素区与主像素区的右下区域，第一区域105d位于次像素区与主像素区的左上区域，第二区域106d位于次像素区与主像素区的右上区域，第三区域107d位于次像素区与主像素区的左下区域。
所述主像素电极110d与所述次像素电极120d通过主像素边框电极111d、次像素边框电极121d以及异形狭缝131d进行区分。异形狭缝131d设于主像素边框电极111d与次像素边框电极121d之间。
所述第一次像素电极分支126d与所述第一主像素电极分支117d设置在第一区域105d中。所述第二次像素电极分支127d与所述第二主像素电极分支114d设置在第一区域106d中。所述第三次像素电极分支128d与所述第三主像素电极分支115d设置在第三区域107d中。所述第四次像素电极分支129d与所述第四主像素电极分支116d设置在第四区域108d中。
所述第一主像素电极分支117d与所述第二主像素电极分支114d相互垂直；所述第三主像素电极分支115d与所述第四主像素电极分支116d相互垂直。所述第一主像素电极分支117d与所述第三主像素电极分支115d相互垂直，所述第二主像素电极分支114d与所述第四主像素电极分支116d相互垂直。所述第一主像素电极分支117d与所述第四主像素电极分支116d相互平行，所述第二主像素电极分支114d与所述第三主像素电极分支115d相互平行。
所述第一次像素电极分支126d与所述第三次像素电极分支128d相互平行。所述第二次像素电极分支127d与所述第四次像素电极分支129d相互平行。所述第一次像素电极分支126d与所述第二次像素电极分支127d相互平行。所述第一次像素电极分支126d、所述第二次像素电极分支127d、所述第三次像素电极分支128d以及所述第四次像素电极分支129d的电极偏向皆相同。所述次像素区具有一个显示畴。
本发明提供一种像素单元（100、100a、100b、100c以及100d），通过在次像素区中将所述第四次像素电极分支与次像素电极边框的下边框的左边夹角采用大角度设计，并且角度的范围90度-1200度，进而可以避免次像素电极120的底部区域存在集中性暗纹。
如图7所示，本发明还提供一种显示面板，其包括实施例1-4的像素单元。
请继续参阅图7，所述显示面板为液晶显示面板，所述显示面板剖面结构包括：第一基板202、第二基板207、以及液晶204。
其中，所述像素电极形成于所述第一基板202与所述液晶204之间，所述第二基板207与所述第一基板202相对设置且与所述第一基板202保持第一间距；所述液晶204位于所述第一基板202与所述第二基板207之间，所述液晶204的扭曲角大于或等于50°且小于或等于90°。
所述液晶204中掺杂有手性剂，以提高所述显示面板的穿透率。所述第一间距大于或等于2微米且小于或等于5微米；所述液晶204的螺距p大于或等于5微米且小于或等于25微米；所述液晶204的光程差Δnd大于或等于300nm且小于或等于600nm，以保证所述液晶204的扭曲角等于或等于50°且小于或等于90°。
进一步地，所述第一间距大于或等于2.8微米且小于或等于4微米；所述液晶204的螺距p大于或等于10微米且小于或等于20微米；所述液晶204的光程差Δnd大于或等于400nm且小于或等于500nm。
所述液晶204采用一体成盒等方式注入所述第一基板202和所述第二基板207之间，在所述第一基板202和所述第二基板207贴合形成液晶盒后，采用聚合物稳定的垂直排列(Polmer Stabilized Vertivally Aligned，PSVA)对所述液晶盒进行处理，以使所述液晶204形成预倾角，得到所述的显示面板。其中，所述PSVA制程是指在加电状况对所述液晶盒进行紫外光照射，以使所述液晶204沿着某一方向倒向后，利用紫外光照射使所述液晶204内的可聚合单体聚合，形成一定的预倾角。
在一实施例中，所述第一基板202还包括薄膜晶体管、配向层等未示出部分。
所述第二基板207与所述液晶204之间设有色阻层206，进一步地，配向层等未示出部分。
所述显示面板还包括：位于所述第一基板202与所述第二基板207之间的框胶205；位于所述第一基板202远离所述第二基板207一侧的第一偏光片201；以及，位于所述第二基板207远离所述第一基板202一侧的第二偏光片208。
本申请还提供一种显示装置，包括所述的显示面板。
所述显示装置还包括触控面板，所述触控面板以内置式或外挂式的方式与所述显示面板结合，以实现所述显示装置的触控功能。
本申请实施例提供的一种显示面板及显示装置，所述显示面板包括所述像素单元100，通过在次像素电极120中将所述第四次像素电极分支与次像素电极边框的下边框的左边夹角采用大角度设计，并且角度的范围90度-120度，进而可以避免次像素电极120的底部区域存在集中性暗纹。
应当指出，对于经充分说明的本发明来说，还可具有多种变换及改型的实施方案，并不局限于上述实施方式的具体实施例。上述实施例仅仅作为本发明的说明，而不是对本发明的限制。总之，本发明的保护范围应包括那些对于本领域普通技术人员来说显而易见的变换或替代以及改型。

Claims (10)

  1. 一种像素单元，包括主像素区和次像素区，其中所述主像素区包括主像素电极，所述次像素区包括：
    次像素电极，具有至少一个畴，所述次像素电极包括：
    次像素边框电极，位于所述次像素电极的边缘；
    相互垂直的第一次像素电极主干以及第二次像素电极主干；以及
    次像素电极分支，从所述第一次像素电极主干以及所述第二次像素电极主干延伸至所述次像素边框电极；所述次像素电极分支包括第一次像素电极分支、第二次像素电极分支、第三次像素电极分支和第四次像素电极分支；
    其中，所述第一次像素电极主干以及所述第二次像素电极主干与所述次像素边框电极将所述次像素区划分出第一分区、第二分区、第三分区以及第四分区，所述第一分区中设置有第一次像素电极分支，所述第二分区中设置有第二次像素电极分支，所述第三分区中设置有第三次像素电极分支，所述第四分区中设置有第四次像素电极分支，所述第四分区位于所述次像素区的右下区域，所述第四次像素电极分支与所述次像素边框电极的下边框电极的左边夹角为钝角。
  2. 根据权利要求1所述的像素单元，其中
    所述钝角的范围为90度-120度。
  3. 根据权利要求1所述的像素单元，其中
    所述第四次像素电极分支与所述第三次像素电极分支相互平行设置。
  4. 根据权利要求3所述的像素单元，其中
    所述第一次像素电极分支与所述第二次像素电极分支相互垂直；
    所述第二次像素电极分支与所述第三次像素电极分支相互平行。
  5. 根据权利要求3所述的像素单元，其中
    所述第一次像素电极分支与所述第二次像素电极分支相互垂直；
    所述第一次像素电极分支与所述第三次像素电极分支相互平行。
  6. 根据权利要求3所述的像素单元，其中
    所述第一次像素电极分支与所述第二次像素电极分支相互平行；
    所述第一次像素电极分支与所述第三次像素电极分支相互平行。
  7. 根据权利要求3所述的像素单元，其中
    所述第一次像素电极分支与所述第二次像素电极分支相互平行；
    所述第一次像素电极分支与所述第三次像素电极分支相互垂直。
  8. 根据权利要求1所述的像素单元，其中
    所述主像素电极包括：
    主像素边框电极，位于所述主像素电极的边缘；
    相互正交的第一主像素电极主干以及第二主像素电极主干；以及
    主像素电极分支，从所述第一主像素电极主干以及所述第二主像素电极主干延伸至所述主像素边框电极；
    其中，所述第一主像素电极主干以及所述第二主像素电极主干与所述主像素边框电极将所述主像素电极分支划分出第一区、第二区、第三区以及第四区，所述第一区中设置有第一主像素电极分支，所述第二区中设置有第二主像素电极分支，所述第三区中设置有第三主像素电极分支，所述第四区中设置有第四主像素电极分支；所述第一主像素电极分支与所述第二主像素电极分支相互垂直；所述第三主像素电极分支与所述第四主像素电极分支相互垂直；所述第一主像素电极分支与所述第三主像素电极分支相互垂直，所述第二主像素电极分支与所述第四主像素电极分支相互垂直。
  9. 一种像素单元，包括主像素区和包围所述主像素区的次像素区，其中所述主像素区包括:主像素电极，所述主像素电极包括相互正交的第一主像素电极主干以及第二主像素电极主干；所述次像素区包括：
    次像素电极，所述主像素电极嵌设于所述次像素电极内；所述次像素电极包括：次像素边框电极，位于所述次像素电极的边缘；以及次像素电极分支，所述主像素电极与所述次像素电极之间设有一异形狭缝；
    其中，第一主像素电极主干以及第二主像素电极主干将所述次像素电极与所述次像素区划分为第一区域、第二区域、第三区域以及第四区域，所述第一区域中设置有第一次像素电极分支，所述第二区域中设置有第二次像素电极分支，所述第三区域中设置有第三次像素电极分支，所述第四区域中设置有第四次像素电极分支，所述第四区域位于所述像素单元的右下区域，所述第四次像素电极分支与所述次像素边框电极的下边框电极的左边夹角为钝角。
  10. 根据权利要求9所述的像素单元，其中
    所述钝角的范围90度-120度。
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