WO2022205781A1 - 量子操作执行方法、装置、芯片、设备及存储介质 - Google Patents

量子操作执行方法、装置、芯片、设备及存储介质 Download PDF

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WO2022205781A1
WO2022205781A1 PCT/CN2021/117519 CN2021117519W WO2022205781A1 WO 2022205781 A1 WO2022205781 A1 WO 2022205781A1 CN 2021117519 W CN2021117519 W CN 2021117519W WO 2022205781 A1 WO2022205781 A1 WO 2022205781A1
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quantum
target
odd
vertex
operations
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PCT/CN2021/117519
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English (en)
French (fr)
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谢磊
郑一聪
张胜誉
翟季冬
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腾讯科技（深圳）有限公司
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Priority to KR1020227005112A priority Critical patent/KR20220137614A/ko
Priority to EP21839311.4A priority patent/EP4089593A4/en
Priority to JP2022513857A priority patent/JP7381723B2/ja
Publication of WO2022205781A1 publication Critical patent/WO2022205781A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/80—Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70—Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic

Definitions

  • the embodiments of the present application relate to the field of quantum technology, and in particular, to a method, device, chip, device, and storage medium for performing quantum operations.
  • crosstalk suppression in quantum computing usually has hardware and software methods.
  • the software method mainly introduces additional waveforms to correct the distortion of the two-bit operation in the scenario of two-bit operation realized by the cross-resonance effect. , thereby mitigating the effect of crosstalk under two-bit operation.
  • the embodiments of the present application provide a quantum operation execution method, device, chip, device, and storage medium, which can realize crosstalk suppression for any type of quantum operations through software, and improve the applicability of crosstalk suppression.
  • the technical solution is as follows:
  • a method for performing a quantum operation is provided, which is performed by a computer device, and the method includes:
  • n is greater than or equal to 1, and n is an integer;
  • the target operation group includes each scheduled quantum operation
  • control waveform of the scheduled quantum operation is generated based on a specified target; the specified target is used to minimize the crosstalk between regions under the condition that the control quantum operation is not distorted; the crosstalk between regions belongs to different The crosstalk between qubits in the connected region; the connected region is obtained by dividing each qubit in the quantum computing device according to whether a quantum operation is performed or not.
  • a method for generating a control waveform of a quantum operation which is executed by a computer device, and the method includes:
  • the function parameters of the control waveform function of the scheduled quantum operation are obtained; the specified target is used to minimize the crosstalk between regions under the condition that the control quantum operation is not distorted; the crosstalk between regions belongs to Crosstalk between qubits in different connected regions; the connected regions are divided according to whether the included qubits perform quantum operations in a quantum computing device;
  • a control waveform for the scheduled quantum operation is generated based on the function parameters.
  • a quantum operation execution device comprising:
  • the quantum operation acquisition module is used to acquire n unscheduled quantum operations corresponding to the quantum circuit; n is greater than or equal to 1, and n is an integer;
  • a quantum operation scheduling module for performing operation scheduling based on the topology of the quantum computing device and the n unscheduled quantum operations to obtain a target operation group; the target operation group includes each scheduled quantum operation;
  • a quantum operation execution module configured to execute each scheduled quantum operation included in the target operation group in parallel on the quantum computing device
  • control waveform of the scheduled quantum operation is generated based on a specified target; the specified target is used to minimize the crosstalk between regions under the condition that the control quantum operation is not distorted; the crosstalk between regions belongs to different Crosstalk between qubits in the connected region; the connected region is obtained by distinguishing each qubit in the quantum computing device by whether to perform a quantum operation.
  • a control waveform generating device for quantum operation including:
  • the quantum operation acquisition module is used to acquire the scheduled quantum operations
  • a parameter acquisition module configured to acquire function parameters of the control waveform function of the scheduled quantum operation based on a specified target; the specified target is used to minimize crosstalk between regions without distortion of the control quantum operation; the Inter-regional crosstalk is the crosstalk between qubits belonging to different connected regions; the connected regions are obtained by dividing each qubit in the quantum computing device according to whether quantum operations are performed or not;
  • a waveform generation module configured to generate a control waveform of the scheduled quantum operation based on the function parameter.
  • a quantum operation chip is provided, and the quantum operation chip is used to implement the above-mentioned quantum operation execution method, or the quantum operation chip is used to implement the above-mentioned quantum operation control waveform generation method.
  • a computer device includes at least one of the above quantum operation chips.
  • a computer-readable storage medium where at least one computer instruction is stored in the storage medium, and the at least one computer instruction is executed by a processor in a computer device to make the computer device.
  • the above quantum operation execution method is realized, or the quantum operation chip is used to realize the above quantum operation control waveform generation method.
  • a computer program product includes computer instructions, and the computer instructions are executed by a processor in a computer device, so that the computer device realizes the above quantum The operation execution method, or the quantum operation chip is used to realize the control waveform generation method of the quantum operation as described above.
  • the above scheme can achieve crosstalk suppression by optimizing the execution sequence and control waveform of quantum operations based on the topology of the quantum circuit.
  • the operation type of the operation and the limitation of the realization principle can be applied to any type of quantum operation and any realization principle, thereby greatly improving the applicability of crosstalk suppression.
  • FIG. 1 is a schematic diagram of an application scenario of a solution provided by an embodiment of the present application.
  • FIG. 2 is a flowchart of a quantum operation execution method provided by an embodiment of the present application
  • FIG. 3 is a flowchart of a quantum operation execution method provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a ZZ crosstalk suppression involved in the embodiment shown in FIG. 3;
  • Fig. 5 is the schematic diagram that the quantum bit number of a kind of maximum area involved in the embodiment shown in Fig. 3 and the total number of ZZ crosstalk that cannot be suppressed mutually restrict;
  • Fig. 6 is the topology diagram involved in the embodiment shown in Fig. 3 and its dual diagram;
  • FIG. 7 is a schematic diagram of the optimal suppression solution involved in the embodiment shown in FIG. 3;
  • FIG. 8 is an example diagram of solving the optimal suppression problem involved in the embodiment shown in FIG. 3;
  • FIG. 9 is a schematic diagram of a quantum circuit involved in the embodiment shown in FIG. 3;
  • FIG. 10 is a schematic diagram of the suppression scheme involved in the embodiment shown in FIG. 3;
  • Fig. 11 is a schematic diagram showing the difference of the suppression effect involved in the embodiment shown in Fig. 3;
  • FIG. 12 is a schematic diagram of a single-bit operation involved in the embodiment shown in FIG. 3;
  • FIG. 13 is a schematic diagram of a single-bit waveform involved in the embodiment shown in FIG. 3;
  • FIG. 14 is a schematic diagram of a single-bit waveform involved in the embodiment shown in FIG. 3;
  • FIG. 15 is a schematic diagram of a single-bit operation and a two-bit operation involved in the embodiment shown in FIG. 3;
  • Fig. 16 is a kind of single-bit waveform topology diagram involved in the embodiment shown in Fig. 3;
  • FIG. 17 is a schematic diagram of a crosstalk suppression situation involved in the embodiment shown in FIG. 3;
  • FIG. 18 is a schematic diagram of another crosstalk suppression situation involved in the embodiment shown in FIG. 3;
  • Fig. 19 is a kind of two-bit waveform topology diagram involved in the embodiment shown in Fig. 3;
  • FIG. 20 is a schematic diagram showing the comparison of the suppression effect on ZZ crosstalk when the R xx ( ⁇ /2) operation involved in the embodiment shown in FIG. 3 is realized;
  • Fig. 21 is the mesh topology involved in the embodiment shown in Fig. 3;
  • FIG. 22 is a schematic diagram of the comparison of two scheduling methods involved in the embodiment shown in FIG. 3;
  • Fig. 23 is a schematic diagram of the execution quantum circuit involved in the embodiment shown in Fig. 3;
  • Fig. 24 is a schematic diagram of the quantum memory involved in the embodiment shown in Fig. 3;
  • Fig. 25 is a schematic diagram of the identity quantum circuit involved in the embodiment shown in Fig. 3;
  • Figure 26 is a block diagram of a quantum operation execution device provided by an embodiment of the present application.
  • FIG. 27 is a block diagram of a control waveform generating device for quantum operations provided by an embodiment of the present application.
  • FIG. 28 is a structural block diagram of a computer device provided by an embodiment of the present application.
  • Quantum Computation A computing method that uses the superposition and entanglement of quantum states to quickly complete computing tasks.
  • Qubit The bearing form of quantum information, some positions are abbreviated as bits in the following.
  • Quantum Operation Manipulate qubits to process the quantum information carried by qubits. Common quantum operations are Pauli X, Y, Z transform (or write ⁇ x , ⁇ y , ⁇ z ), Hadamard transform (H), Controlled Pauli X transform (CNOT) and so on. Only single-bit operations and two-bit operations can be used to complete any quantum computation, and some positions are abbreviated as operations below.
  • Quantum Circuit A description model of quantum computing, consisting of quantum bits and quantum operations on them.
  • Quantum Computing Device A physical device that performs quantum computing.
  • Hamiltonian A mathematical tool that describes the evolution of quantum systems (such as qubits).
  • the effective Hamiltonian refers to the simplified Hamiltonian obtained by transforming the original Hamiltonian coordinates and ignoring irrelevant factors.
  • Superconducting Quantum Computing Device refers to a quantum computing device in which qubits are implemented using superconducting technology.
  • applying a control waveform (Control Pulse) to affect specific terms in the Hamiltonian can affect the evolution of qubits, thereby realizing quantum operations.
  • ZZ Crosstalk due to the coupling between the high energy levels of the qubits interaction. In superconducting quantum computing devices, there is ZZ crosstalk between two bits with physical coupling, which is an always-on interaction.
  • Quantum Memory A device that stores quantum information. The difference from quantum computing devices is that its design purpose is not to calculate, but to save information for a long time, but some quantum operations can also be performed on quantum memory. (or Refresh) to prolong the information retention time.
  • Quantum Error Correction Code There are various errors in real quantum computing devices. Quantum error correction codes are used to encode qubits and improve the error tolerance rate of quantum computing.
  • Fidelity an indicator that measures the similarity between the actual value and the true value. There are different definitions in specific scenarios. The higher the fidelity, the more similar the actual value is to the true value.
  • the topology of a quantum computing device can be represented by a graph, where vertices represent qubits and edges represent couplings between qubits.
  • Planar Graph, Dual Graph A graph that can be drawn on a plane in a certain way and ensures that different edges do not intersect is called a plane graph. There is a dual graph in the plane graph. The vertices of the dual graph correspond to the faces of the plane graph. When two faces in the plane graph are adjacent, the edges of the corresponding vertices in the dual graph are connected, so that the edges of the dual graph correspond to the edges of the plane graph one-to-one.
  • the dual graph of the plane graph G is denoted as G * , and the edge (u,v) of the plane graph corresponds to the edge (u,v) * of the dual graph.
  • Shortest Path The shortest path among all paths connecting two vertices.
  • a connected component is a subgraph of a graph that satisfies the condition (connectivity condition) that paths are connected between vertices. When adding any other vertex in the graph would violate the connectivity condition, the connected component at this time is called the maximum connected component.
  • Odd-vertex Pairing When an edge set D is removed and there are no vertices with odd degrees in the remaining graph, the edge set is called odd vertex pairing. The degree of a vertex is the number of edges it connects to. Any pair of odd vertices contains all odd vertices in the graph.
  • a matching of a graph is a subgraph of the graph in which every two edges have no common vertex.
  • the maximum matching of a graph refers to the matching with the largest number of edges.
  • Vertex 2-Coloring Assign one of two colors to vertices, so that vertices connected by edges have different colors.
  • a graph is said to be a bipartite graph if it can be bicolored by its vertices.
  • Search A method to efficiently obtain a better solution among many possible solutions of a problem.
  • Common search methods include Exhaustive Search: exhaust all possibilities to select the optimal solution, Beam Search: The solution of the problem consists of the solutions of several sub-problems, and only a limited number is reserved for each sub-problem during the solution process. solution search method.
  • the ZZ crosstalk mediated by different coupling methods have different strengths, especially their signs can be opposite.
  • the crosstalk strength mediated by different methods can cancel each other, and the ZZ crosstalk can be suppressed.
  • the first three types of the above technical solutions are hardware implementation solutions, which have the disadvantage of requiring complex hardware structure and control logic.
  • the adjustable coupling scheme needs to introduce additional couplers and control lines for controlling the couplers.
  • Heterogeneous qubits put forward higher requirements on the manufacturing process of the chip, and multiple coupling methods need to precisely control the parameters of different couplings.
  • These complex hardware structures increase control complexity and introduce additional decoherence factors.
  • the solutions provided in the subsequent embodiments of this application can be used on homogeneous qubit chips with a single fixed coupling; in addition, the solutions shown in this application can also be used on the hardware of these three types of hardware implementation solutions, Has good versatility.
  • the top layer includes quantum algorithms, quantum high-level languages, and quantum compilers, and the bottom layer is quantum chips (or quantum circuits).
  • quantum architecture in the middle.
  • the quantum architecture (including quantum instruction set and quantum control microarchitecture) plays an important role in communicating quantum software and quantum hardware, and needs to provide programs such as program flow control, feedback control, precision The timing gate operation sequence and other functions.
  • the quantum instruction set is generated by the compiler, and the quantum control micro-architecture is implemented in hardware as a quantum control processor (Quantum Control Processor, QCP), and the quantum chip is completed by executing the quantum instruction set. control.
  • QCP Quantum Control Processor
  • the output of the quantum control processor ultimately controls a series of analog instruments (ie, control & reading electronic instruments).
  • analog instruments ie, control & reading electronic instruments.
  • the analog instruments here will convert digital signals into analog microwave waveforms to Quantum chip for control.
  • FIG. 1 shows a schematic diagram of an application scenario of a solution provided by an embodiment of the present application.
  • the application scenario may be a superconducting quantum computing platform, and the application scenario includes: a quantum computing device 11 , a dilution refrigerator 12 , a control device 13 and a computer 14 .
  • the quantum computing device 11 is a circuit acting on a physical quantum bit, and the quantum computing device 11 can be realized as a quantum chip, such as a superconducting quantum chip near absolute zero.
  • the dilution refrigerator 12 is used to provide an absolute zero environment for the superconducting quantum chip.
  • the control device 13 is used to control the quantum computing device 11
  • the computer 14 is used to control the control device 13
  • the written quantum program is compiled into instructions by the software in the computer 14 and sent to the control device 13 (such as an electronic/microwave control system), and the control device 13 converts the above-mentioned instructions into electronic/microwave control signals and inputs them to the dilution refrigerator 12, Controlling superconducting qubits at temperatures less than 10 mK.
  • the process of reading is reversed, and the read waveform is delivered to the quantum computing device 11 .
  • the dilution refrigerator 12 is used to provide a working environment for the quantum computing device 11 (such as a superconducting quantum chip).
  • the quantum computing device 11 is controlled by analog waveforms, so a set of mainly composed of FPGA (Field Programmable Gate Array, Field Programmable Gate Array) and ADC (Analog-to-Digital Converter)/DAC (Digital- to-Analog Converter, digital-to-analog converter) to provide control and measurement.
  • the measurement and control system is controlled by the measurement and control software of the upper computer (such as the computer 14 ), and the measurement and control software will determine the operation that needs to be performed at present, and the operation configuration of the measurement and control system.
  • the upper computer may be a classic computer such as a PC (Personal Computer, personal computer).
  • the quantum operation execution method provided by the embodiments of this application can be implemented by a classical computer (such as a PC (Personal Computer, personal computer)), for example, by executing a corresponding computer program on a classical computer to implement the method; it can also be implemented on a classical computer and a personal computer.
  • a classical computer such as a PC (Personal Computer, personal computer)
  • Executed in a hybrid device environment of quantum computers for example, steps such as control waveform generation are executed by a classical computer, while steps such as the execution of quantum operations based on control waveforms are realized by a quantum computer.
  • the computer device may be a classical computer, or may include a mixed execution environment of a classical computer and a quantum computer, which is not limited in the embodiments of the present application.
  • FIG. 2 shows a flowchart of a method for executing a quantum operation provided by an embodiment of the present application.
  • the execution body of each step of the method may be a computer device.
  • the method may include the following steps:
  • Step 21 Obtain n unscheduled quantum operations corresponding to the quantum circuit; n is greater than or equal to 1, and n is an integer.
  • the above n unscheduled quantum operations corresponding to the quantum circuit are some or all of the quantum operations that are not performed in the quantum circuit.
  • Step 22 Perform operation scheduling based on the topology of the quantum computing device and the n unscheduled quantum operations to obtain a target operation group; the target operation group includes each scheduled quantum operation.
  • the operation scheduling of quantum operations refers to: determining one or more quantum operations to be performed in parallel in a quantum computing device at a certain point in time.
  • Step 23 Execute each scheduled quantum operation included in the target operation group in parallel on the quantum computing device; the control waveform of the scheduled quantum operation is generated based on the specified target; the specified target is used to control the quantum operation.
  • each qubit in the quantum computing device can be divided into two categories at a certain moment A, one is the qubit that performs quantum operations at this moment A (multiple quantum operations can be performed in parallel), the other One is the qubits that do not perform quantum operations at time A; these two types of qubits form at least two connected regions in the topology of the quantum circuit.
  • all qubits in the connected region are of the same type, and when the connected region contains two or more qubits, any one qubit in the connected region and at least one qubit in the connected region Other qubits are adjacent (two qubits are adjacent, which means that there is an edge between the two qubits, or there is a coupling).
  • the above-mentioned inter-area crosstalk may be the ZZ crosstalk between the above-mentioned connected areas, or may also be other types of crosstalk between the above-mentioned connected areas.
  • the solutions shown in the embodiments of the present application based on the quantum circuit and the topology of the quantum computing device, perform the scheduling of quantum operations, obtain the scheduled quantum operations, and execute the scheduled quantum operations on the quantum computing device.
  • the waveform of the quantum operation to be performed is a control waveform that minimizes crosstalk between regions while ensuring that the quantum operation is not distorted on the quantum computing device; the above scheme is based on the topological structure of the quantum circuit.
  • the execution sequence of the quantum operation The crosstalk suppression can be realized by optimizing the control waveform. It is not limited by the operation type and realization principle of the quantum operation, and can be applied to any type of quantum operation with any realization principle, thus greatly improving the applicability of crosstalk suppression.
  • a method for generating an operation waveform of a quantum operation includes: obtaining a scheduled quantum operation; and obtaining a function parameter of a control waveform function of the scheduled quantum operation based on a specified target ; the specified goal is to minimize inter-regional crosstalk without distortion of control quantum operations; the inter-regional crosstalk is the crosstalk between qubits belonging to different connected regions; the connected regions are in quantum computing devices , which is divided by whether the contained qubits perform quantum operations; the control waveform of the scheduled quantum operations is generated based on the function parameters.
  • the embodiment shown in FIG. 2 above of the present application proposes an optimization scheme for the control waveform of quantum operation at the waveform control level.
  • the control waveform obtained through this scheme can effectively suppress the crosstalk between regions while realizing quantum operation; on this basis
  • a quantum circuit-based operation scheduling scheme also called circuit scheduling/quantum circuit scheduling
  • the scheduling scheme can ensure high parallelism of quantum circuit execution while achieving optimal suppression, thereby maximizing the fidelity of quantum circuit execution.
  • the solution shown in this application can work at the software level, and is based on a general qubit control model, which can avoid the complicated hardware components and control logic of the existing solution, thereby being simpler and more versatile.
  • This solution can be applied to superconducting quantum computing devices to provide high-fidelity quantum computing with suppressed crosstalk, and can also be applied to improve quantum memory and improve the retention time of quantum data.
  • FIG. 3 shows a flowchart of a method for executing a quantum operation provided by an embodiment of the present application.
  • the execution body of each step of the method may be a computer device.
  • the method may include the following steps:
  • Step 301 Obtain n unscheduled quantum operations corresponding to the quantum circuit; n is greater than or equal to 1, and n is an integer.
  • the computer device when there is a quantum computing task to be executed in the quantum computing system, the computer device can obtain the quantum circuit corresponding to the quantum computing task, and then obtain n unscheduled quantum circuits corresponding to the quantum circuit. operate.
  • the above-mentioned unscheduled quantum operations refer to quantum operations that have not been scheduled by a computer device to be executed on a quantum computing device.
  • Step 302 Obtain a schedulable set based on the n unscheduled quantum operations; the schedulable set includes schedulable quantum operations among the n unscheduled quantum operations.
  • a quantum operation A needs to be executed before the previous quantum operation B has been completed.
  • the above-mentioned quantum operation B can be called the pre-quantum operation of quantum operation A.
  • the schedulable quantum operations among the above n unscheduled quantum operations may be the quantum operations that can be performed at the current moment among the quantum operations that are not scheduled to be performed by the quantum circuit; among them, a quantum operation Executable may mean that there is no unexecuted pre-quantum operation corresponding to the quantum operation in the quantum circuit.
  • step 303 a candidate operation group is extracted from the schedulable set, and a qubit partition scheme is obtained.
  • the qubit division scheme is obtained according to the specified division method based on the topology structure; the qubit division scheme instructs that each qubit in the quantum computing device is divided into two sets of qubits, so as to be used in the quantum computing device At least two of the communication areas are formed thereon.
  • the computer device may choose to use different schemes to extract candidate operation groups, and use different schemes to obtain qubit partition schemes, based on whether the quantum operations in the schedulable set include two-bit quantum operations.
  • the following two aspects will introduce the qubit partitioning scheme of whether the quantum operations in the schedulable set include two-bit quantum operations.
  • Each quantum operation in the schedulable set is a single-bit quantum operation.
  • the computer device in response to each quantum operation in the above-mentioned schedulable set being a single-bit quantum operation, acquires the schedulable set as the above-mentioned candidate operation group.
  • each quantum operation in the schedulable set is a single-bit quantum operation
  • the computer device does not need to consider whether two bits corresponding to the same quantum operation are divided into two sets at the same time.
  • the operation group composed of all quantum operations in is obtained as the candidate operation group.
  • the computer device can obtain the target oddity vertex pairing scheme according to the second specified division method based on the topology structure; then , remove the edge corresponding to the target odd-degree vertex pairing scheme in the topological graph, and obtain the topological graph after removing the edge; then perform vertex two coloring on the topological graph after removing the edge, and obtain the above-mentioned qubit partitioning scheme.
  • the target odd-degree vertex pairing scheme is obtained according to the second specified division method, including:
  • the vertices in the complete graph are odd-degree vertices in the target dual graph;
  • the target dual graph is the dual graph of the topological graph, and the topological graph is a plan view of the topological structure of the quantum computing device;
  • the odd-degree vertex pairing scheme includes a path for each of the odd-degree vertex pairs in the target dual graph respectively;
  • the total irrepressible crosstalk is determined by the odd vertex pairing scheme
  • the path in the topological graph corresponds to the number of edges in the topological graph; the maximum number of qubits in the region is characterized by the number of vertices in the maximum connected region after the topological graph removes the cutset, which is the topological graph that removes the
  • the path in the odd vertex pairing scheme corresponds to the set of remaining edges after the edge in the topology graph;
  • the odd vertex pairing scheme with the smallest crosstalk suppression index is obtained as the target odd vertex pairing scheme.
  • the above-mentioned acquisition of at least one odd-degree vertex pairing scheme for each of the odd-degree vertex pairs includes:
  • the above-mentioned crosstalk suppression index is: ⁇ N Q +N C ;
  • N Q represents the maximum number of qubits in the region
  • N C represents the total number of unsuppressed crosstalk
  • ⁇ represents the importance of N Q and N C.
  • each quantum operation in the schedulable set is a single-bit quantum operation
  • the computer equipment does not need to consider whether two bits corresponding to the same quantum operation are divided into two sets at the same time, only It is necessary to obtain the operation group composed of all quantum operations in the schedulable set as a candidate operation group, and then obtain the final target oddity vertex pairing scheme according to the second specified division method, and then obtain qubits based on the target oddity vertex pairing scheme division plan.
  • FIG. 4 shows a schematic diagram of a ZZ crosstalk suppression involved in an embodiment of the present application.
  • Figure 4 shows an example of suppressing ZZ crosstalk on a 9 quantum computing device.
  • the identity quantum operation on the black vertex by applying the identity quantum operation on the black vertex, all ZZ crosstalk on the quantum computing device is suppressed, and in this application, this situation can be called complete suppression.
  • each qubit is divided into a separate area, so that all ZZ crosstalk on the quantum computing device is suppressed, then the quantum computing device is said to have a complete suppression scheme.
  • the topological graph of a quantum computing device is a bipartite graph, there is a complete suppression scheme for the quantum computing device.
  • FIG. 5 shows a schematic diagram of the mutual restriction between the number of qubits in a maximum area and the total number of unsuppressed ZZ crosstalk involved in an embodiment of the present application.
  • the qubits in the quantum computing device are divided into several connected regions, and the number of qubits in the largest connected region is N Q , and the total number of unsuppressed ZZ crosstalk is N C , giving Determine the coefficient ⁇ that characterizes the importance of the two. If a certain suppression scheme minimizes ⁇ N Q + N C , then the quantum computing device is said to have an optimal suppression scheme.
  • the two vertex sets S and T derived by the cut correspond to the “vertex set with waveform applied” and the “vertex set with no waveform applied”, respectively.
  • the coupling corresponding to the cut set spans different regions, so the coupling corresponding to the cut set is mediated by The crosstalk can be suppressed, in contrast, for the coupling corresponding to the complement of the cutset, since the two qubits they connect belong to the same connected region, the crosstalk mediated by the coupling corresponding to the complement of the cutset cannot be suppressed.
  • Odd vertex pairing When there is no odd degree vertex in the remaining graph after removing an edge set D, the edge set is called an odd vertex pairing. Any pair of odd vertices includes all odd vertices in the graph, because the number of odd vertices in any graph is even, so the edge set D is called a pair.
  • Dual graph There is a dual graph in the plane graph.
  • the vertices of the dual graph correspond to the faces of the plane graph. When two faces in the plane graph are adjacent, the edges of the corresponding vertices in the dual graph are connected, so that the edges of the dual graph correspond to the edges of the plane graph one-to-one.
  • the dual graph of the plane graph G is denoted as G * , and the edge (u,v) of the plane graph corresponds to the edge (u,v) * of the dual graph.
  • FIG. 6 shows a topology diagram and its dual diagram.
  • Fig. 6 shows the topological graph and its dual graph of the example shown in Fig. 5.
  • the edges with only one vertex on the boundary of the graph are all connected to s, and the odd-degree vertices in the dual graph are i and j.
  • the complement of the cut set in part (a) of Figure 5 is ⁇ (10, 11), (4, 11), (11, 12) ⁇ , corresponding to ⁇ (c, i), (c, d) in the dual graph , (d, j) ⁇ is an odd vertex pairing of the dual graph; similarly, the complement of part (b) in Figure 5 and the odd vertex pairing of the corresponding dual graph are: ⁇ (10, 11), (11, 12), (3, 4), (4, 5) ⁇ (c, i), (d, j), (c, s), (d, s) ⁇ .
  • Lemma An edge set D of a graph G is contained in a cut set E C , then remove the remaining edges of the cut set E C
  • the problem of finding cuts in topological graphs can be transformed into finding pairs of odd-degree vertices in dual graphs
  • the problem Considering that the odd-degree vertex pairing needs to include all odd-degree vertices, the simplest odd-degree vertex pairing only contains several simple paths, each path connects two odd-degree vertices, and the odd-degree vertices connected by different paths are different (as shown in the figure). 6 where ⁇ (c, i), (c, d), (d, j) ⁇ is a simple path connecting odd vertices i and j).
  • FIG. 7 shows a schematic diagram of the optimal suppression solution involved in the embodiment of the present application.
  • the optimal suppression solution algorithm shown in the present application is divided into three steps.
  • Step 1 Vertex pairing.
  • d(u,v) is the length of the shortest path between u and v
  • M 1+max ⁇ d(u,v)
  • the maximum matching algorithm is used to determine the pairing scheme. In this way, the odd vertex matching obtained by using the shortest path between the vertices that match each other contains the fewest paths, which can be used as the starting point for solving the problem. For example, for Fig.
  • Step 2 Path relaxation.
  • Step 3 Export the cut.
  • the three schemes (1), (2) and (3) obtained in step 2 correspond to (a), (b) and (c) in FIG. 11 in sequence.
  • Each quantum operation in the schedulable set contains two-bit quantum operations.
  • each two-bit quantum operation in the schedulable set is obtained to obtain a two-bit operation set; in response to the two-bit operation set containing 3 or more operations, construct two operation groups based on the two nearest quantum operations in the two-bit operation set; based on the two-bit operation set, other quantum operations except the two quantum operations are the same as
  • the distance between the two operation groups is added by i operations, i is greater than or equal to 1, and i is an integer; based on the result of the i operations added, the candidate operation group is obtained.
  • the computer device may schedule the two-bit quantum operations first, that is, the qubit division scheme is designed mainly based on the two-bit operations.
  • the computer device may first select the two nearest two-bit quantum operations and divide them into different groups to ensure that The two will not be executed at the same time, and then based on the distance between the operation outside the group and the corresponding operation group, the scale of the two groups will be gradually expanded, so as to obtain the largest possible parallelism under the premise of ensuring the crosstalk suppression effect. degree candidate operation group.
  • the distances between the other quantum operations in the two-bit operation set and the two operation groups are obtained respectively; 1 ⁇ j ⁇ i, and j is an integer; the distance corresponding to the maximum distance is The specified quantum operation is added into the specified operation group corresponding to the maximum distance; the maximum distance is the maximum value of the distances between the other quantum operations and the two operation groups; based on the topology and the specified operation group,
  • the target odd-degree vertex pairing scheme is obtained according to the first specified division method; the target odd-degree vertex pairing scheme includes paths between each odd-degree vertex pair in the target dual graph, and the target odd-degree vertex pairing scheme is used to indicate a specified operation
  • the qubit partitioning scheme of the group; the target dual graph is the dual graph of the topological graph, and the topological graph is the planar graph of the topological structure; in response to the target odd-degree vertex pairing scheme meeting the crosstalk suppression requirement, the specified quantum operation is removed from the Delete from the two-bit operation set; in response to the number of the other
  • the candidate operation group is obtained based on the result of the at least one operation addition, including:
  • this ith operation is added.
  • the operation group containing the largest number of operations is obtained as the candidate operation group.
  • the operation distance between the first quantum operation and the existing quantum operations in the first operation group is obtained; the operation distance is used to indicate that the quantum bits corresponding to the two two-bit operations are in the The sum of the shortest path lengths in the topology; the first quantum operation is any one of the other quantum operations, and the first operation group is any one of the two operation groups;
  • the distance between the first quantum operation and the first operation group is obtained.
  • the computer device may search for a qubit division scheme that satisfies the crosstalk suppression requirement by searching for an odd vertex pairing scheme in the dual graph of the topology graph.
  • each time a two-bit quantum operation is added to an operation group that is, based on the operation group after adding the operation
  • the two-bit quantum operation in obtains the target oddity vertex pairing scheme in combination with the topology of the quantum computing device, and judges whether the obtained target oddity vertex pairing scheme satisfies the crosstalk suppression requirements, if so, continue to add, if not, Then the addition needs to be stopped; when the crosstalk suppression requirements are not met, the stop addition is triggered, or when there is no two-bit quantum operation that needs to be added, the computer device can use the current two operation groups that contain the most quantum operations as a candidate operation group; Optionally, if the quantum operations contained in the current two operation groups are the same, one can be randomly selected as a candidate operation group.
  • the target singularity vertex pairing scheme is obtained according to the first specified division method, including:
  • Delete the edge corresponding to each quantum operation in the specified operation group in the target dual graph obtain the complete graph with the odd vertex in the target dual graph as the vertex; determine each pair of the odd vertex in the complete graph ; Obtain at least one odd-degree vertex pairing scheme of each of this odd-degree vertex pair; In this odd-degree vertex pairing scheme, include a path of each this odd-degree vertex pair in this target dual graph respectively; In at least one of this odd-degree vertex pairing scheme Add each quantum operation in the specified operation group to the vertex pairing scheme corresponding to the edge in the target dual graph; from at least one of the odd vertex pairing schemes, filter out the qubits corresponding to the two-bit operation that do not belong to the same group.
  • the odd vertex pairing scheme of a connected region obtain each of the odd vertex pairing schemes after screening; obtain the respective maximum area qubits of each of the odd vertex pairing schemes after screening, and, after screening, each The total number of unsuppressable crosstalk in the odd vertex pairing scheme; the total unsuppressable crosstalk is represented by the number of edges in the topology graph corresponding to the paths in the odd vertex pairing scheme; the maximum area qubit number is represented by the The topological graph is characterized by the number of vertices in the maximum connected region after removing the cut set, which is a set of edges in the topological graph after removing the paths in the odd vertex pairing scheme corresponding to the edges in the topological graph ; Based on the respective maximum area qubits of each of the odd vertex pairing schemes after screening, and the total number of irrepressible crosstalks of each of the odd vertex pairing schemes after screening, obtain each The crosstalk suppression index of the degree vertex pairing scheme; the odd vertex pairing scheme with the smallest crosstalk suppression index is obtained as the target odd vertex
  • the above-mentioned process of obtaining the qubit partitioning scheme based on the target oddity vertex pairing scheme includes: removing the edge corresponding to the target oddity vertex pairing scheme in the topology graph , obtain the topological graph after edge removal; perform vertex two-coloring on the topological graph after edge removal to obtain a qubit partition scheme (similar to the case where each quantum operation in the above schedulable set is a single-bit quantum operation, the optimal The step of deriving the cut in step three of the suppression algorithm).
  • the embodiments of the present application are improved on the basis of the above-mentioned second specified division manner, so as to be suitable for a qubit division scenario when a specified quantum operation is performed on a specified qubit.
  • the improved division manner is the above-mentioned first designated division manner.
  • the situation corresponding to the first specified division method above can be regarded as an optimal suppression problem with constraints: the quantum bits involved in the specified quantum operation are required to belong to the same set in the cut.
  • the strategy of "deleting edges first, adding edges later, and additional checks" can be used to convert the constrained problem into an unconstrained problem, and solve it by the method given by the second specified division method above.
  • Q the set of bits involved in the operation
  • Q the set of bits involved in the operation
  • Delete edges first: delete edges ⁇ (u,v) *
  • Post-adding edge After the odd-degree vertex pairing of the graph after edge deletion is given in step 2, the edge just deleted is added to the odd-degree vertex pairing.
  • step 2 each time a cut candidate is given, it is necessary to additionally check whether the candidate satisfies the requirements of the same set. condition, if not satisfied, discard the candidate.
  • FIG. 8 shows an example diagram of solving the optimal suppression problem involved in the embodiments of the present application.
  • the algorithm obtains the odd vertex pairing i ⁇ c ⁇ d ⁇ j, and then adds (i,j), and derives the cut according to the odd vertex pairing after adding (i,j), you can check that this scheme satisfies 11, 28 in the same set condition, and thus can be regarded as a solution.
  • topological graph G (V, E) and vertex set
  • (u,v) ⁇ E and u,v ⁇ Q ⁇ constitutes several connected components C 1 , C 2 ,...,C n of the topological graph G.
  • the "add edge” strategy ensures that vertices within the same connected component are in the same set in the derived cut.
  • the edge set involved in a single two-bit quantum operation only constitutes a connected component (such as the example in Figure 8), and the strategy of this scheme can give a legal solution.
  • the involved edge sets may form multiple connected components, which requires an "extra check" to ensure that qubits with different connected components belong to the same set.
  • the crosstalk suppression requirements include:
  • the maximum number of regional qubits of the target oddity vertex pairing scheme is less than the threshold of the number of bits
  • the total number of unsuppressed crosstalks for this target oddity vertex pairing scheme is less than the total number of crosstalk thresholds.
  • the crosstalk suppression requirement may be a combined limit on the number of qubits N Q in the maximum area and the total number of ZZ crosstalk N C that cannot be suppressed, for example, each of them is required to be less than a certain threshold.
  • the above algorithm 1 corresponds to the case of determining an operation group containing two-bit quantum operations, and the obtained target singularity vertex pairing scheme satisfies the crosstalk suppression requirements, and outputs the qubit division scheme corresponding to the operation group.
  • the computer equipment first needs to determine the candidate operation group that meets the crosstalk suppression requirement. After adding a two-bit quantum operation to , that is, based on the two-bit quantum operation in the operation group after the addition operation, run the vertex pairing and path relaxation steps in the above algorithm 1 to obtain the corresponding target oddity vertex pairing scheme, and then pass the Target oddity vertex pairing scheme to determine whether the current operation group meets the crosstalk suppression requirements.
  • the computer device may acquire the quantum operation as a candidate operation group.
  • the computer device may first add the two quantum operations to the same operation group, and determine that the suppression requirements are met, and if so, add the two quantum operations to the same operation group.
  • the operation group composed of two quantum operations is regarded as the candidate operation group, otherwise, the operation group composed of any one of the two quantum operations is regarded as the candidate operation group.
  • the computer device can obtain the target singularity vertex according to the first specified division method based on the above topology structure Then, based on the target odd-degree vertex pairing scheme, a qubit partition scheme is obtained (that is, the above algorithm 1 is re-executed based on the candidate operation group).
  • the computer device can also directly obtain the above-mentioned candidate operation group extraction process according to the above first specified operation group.
  • the target oddity vertex pairing scheme obtained by the division method is obtained, and then the qubit division scheme is obtained based on the target oddity vertex pairing scheme.
  • FIG. 9 shows a schematic diagram of a quantum circuit involved in an embodiment of the present application.
  • part (a) in FIG. 9 shows the topology of the quantum computing device
  • part (b) in FIG. 9 shows the quantum circuit to be executed.
  • the present application explains the algorithm shown in Table 2 above by taking the implementation of the quantum circuit shown in FIG. 9 as an example. Given a quantum circuit, construct a set of schedulable operations (corresponding to row 2 in the algorithm of Table 2), if and only if, according to data dependencies, the operations of its preorder dependencies have been executed, an operation can be considered to be schedulable for execution of.
  • the set of schedulable operations when no operation is performed, the set of schedulable operations is ⁇ H 1 ,H 2 ,...,H 8 ⁇ , and after all H operations are executed, the set of schedulable operations is ⁇ CNOT 1,4 ,CNOT 2 ,5 ,CNOT 3,6 ,X 8 ⁇ .
  • the types of operations in the set of schedulable operations are then discussed in categories (lines 3, 6). If there is only a single-bit operation, the implementation scheme is designed according to the following conclusions:
  • the set of operations can be performed in at most two time steps with optimal suppression. That is, using the optimal suppression algorithm corresponding to the second specified division method, the qubits can be divided into two sets S and T, and accordingly these single-bit operations are also divided into these two sets, then the first The waveform is applied on S in one time step, and the waveform is applied on T in the second time step, thus completing the execution in at most two time steps.
  • the set with the most operations (corresponding to rows 4 and 5 in the algorithm in Table 2) is executed, while the operations in the other set can be reserved for subsequent scheduling. In this way, the highest degree of parallelism is achieved with the best suppression.
  • FIG. 10 shows a schematic diagram of the suppression scheme involved in the embodiment of the present application.
  • the optimal suppression algorithm involved in this application gives the qubit division scheme of Fig. 10.
  • the number of H operations contained in the black vertices is 4, and the number of H operations contained in the white vertices is only 3. Therefore, black vertices contain only 3 operations. Vertex collection execution.
  • FIG. 9 shows a schematic diagram of differences in distance and suppression effect of different implementation schemes involved in the embodiments of the present application.
  • Step 304 Obtain a target operation group based on the candidate operation group and the qubit division scheme.
  • the target operation group is obtained based on the candidate operation group and the qubit division scheme, including:
  • each qubit in the quantum computing device is divided into two qubit sets; the candidate operation group is divided into sub-operation groups corresponding to the two qubit sets respectively;
  • the qubits corresponding to the quantum operations in the group are in the qubit set corresponding to the sub-operation group; the quantum operations and filling operations in the target sub-operation group are combined into the target operation group;
  • the target sub-operation group is The sub-operation group corresponding to the two qubit sets respectively includes the sub-operation group with the largest number of quantum operations;
  • the filling operation is an identity quantum operation corresponding to the filling qubit, and the filling qubit is the same as the target sub-operation.
  • the qubit set corresponding to the operation group there are other qubits except the qubit corresponding to the target sub-operation group.
  • the computer device may determine, among the two qubit sets, one qubit set corresponding to more operations in the quantum circuit as The set of target qubits on which the operation is performed, for other qubits in the target set of qubits than the qubits corresponding to the operation in the quantum circuit, on which identity quantum operations can be populated to achieve optimal crosstalk suppression effect.
  • the method further includes:
  • Each scheduled quantum operation included in the new target operation group is executed in parallel on the quantum computing device.
  • the computer device after the computer device acquires the target operation group at a time step, it can determine whether there are remaining unscheduled quantum operations in the quantum circuit, and if so, based on the remaining unscheduled quantum operations operation, re-execute the above steps 301 to 304 to obtain the target operation group at the next time step, and the computer device iteratively executes the above steps 301 to 304 until all the quantum operations in the quantum circuit are scheduled and completed.
  • Step 305 executing each scheduled quantum operation included in the target operation group on the quantum computing device in parallel.
  • the control waveform of the scheduled quantum operation is generated based on a specified target; the specified target is used to minimize the crosstalk between regions without distortion of the control quantum operation; the crosstalk between regions belongs to different connected regions The crosstalk between the qubits; the connected region is obtained by dividing each qubit in the quantum computing device according to whether the quantum operation is performed or not.
  • the computer device optimizes the control waveform of the quantum operation under the condition that the control quantum operation is not distorted, so that the crosstalk between regions is minimized.
  • the specified target is a single scalar target obtained based on the average operational fidelity of the quantum operations under the action of the control waveform, and the crosstalk between the regions.
  • the formula for this single scalar target is:
  • L is the single scalar target
  • U(T) represents the unitary transformation of the corresponding quantum operation under the action of the control waveform
  • U Target (T) represents the target unitary transformation of the corresponding quantum operation
  • F(U(T), U Target (T)) represents the average operational fidelity between U(T) and U Target (T); represents the evolution of a closed quantum system under the influence of crosstalk between the regions.
  • the computer device performs R iterations of updating the function parameters of the control waveform function of the target quantum operation;
  • R ⁇ 2 and R is an integer;
  • the target quantum operation is each of the available quantum operations. schedule the quantum operation and any one of the identity quantum operations;
  • the control waveform of the target quantum operation is generated based on the iteratively updated function parameters.
  • the computer device may perform multiple rounds of iteration on the parameters of the control waveform function of the quantum operation to be performed based on the above single scalar target.
  • the parameters of the waveform function are updated until the number of iterations is reached, or the change in the parameters is less than a certain threshold.
  • the function parameters of the control waveform function of the target quantum operation are iteratively updated for R times, including:
  • the rth control waveform is the evolution of the closed quantum system under the influence of the rth control waveform; 2 ⁇ r ⁇ R, and r is an integer; the rth control waveform The waveform is the control waveform corresponding to the function parameter after the r-1th iteration update;
  • the function parameters after the r-1th iteration update are updated to obtain the function parameters after the r-th iteration update.
  • inter-area crosstalk may be inter-area ZZ crosstalk, or may also be other types of crosstalk.
  • the waveform optimization scheme in the embodiments of the present application aims to design a waveform capable of realizing quantum operations while suppressing ZZ crosstalk given quantum operations. This scheme first considers a region with only one single-bit operation, then considers a region with only one two-bit operation, and finally considers a region composed of multiple operations of these two types.
  • FIG. 12 shows a schematic diagram of a single-bit operation involved in an embodiment of the present application. As shown in Fig. 12, this scheme needs to realize the single-bit operation on the qubit q while suppressing the ZZ crosstalk between it and the surrounding qubits.
  • ⁇ x,y (t) represents the control waveform
  • ⁇ x,y (t) represents the control waveform
  • the identity operation is omitted and not written
  • the ZZ crosstalk between qubits q and i represents its strength.
  • H(t) H Ctrl (t)+ ⁇ H Xtalk ;
  • appropriate waveforms can be selected for ⁇ x (t) and ⁇ y (t) to suppress the influence of ZZ crosstalk H Xtalk .
  • FIG. 13 shows a schematic diagram of a two-bit operation involved in an embodiment of the present application.
  • this scheme needs to achieve two-bit operations on qubits p, q while suppressing the ZZ crosstalk between them and surrounding qubits.
  • H Coupiing is the coupled form of the qubit, for example, CNOT operation can be realized, iSWAP operation is possible.
  • CNOT operation can be realized
  • iSWAP operation is possible.
  • this method requires the hardware to have a strong ability to adjust the two-bit coupling H Coupling .
  • FIG. 14 shows a schematic diagram of a single-bit waveform involved in the embodiment of the present application. If the hardware cannot provide this ability, you can use The single-bit waveform shown in Figure 14 is assisted.
  • waveforms A and C are single-bit control waveforms applied to qubit p; waveforms B and D are single-bit control waveforms applied to qubit q; waveform E is applied to the coupling term H Coupling waveform.
  • waveforms A to D are optimized, and the waveform originally used to realize the two-bit operation is directly used for E. In this way, waveform E is guaranteed to be achievable by hardware, and waveforms A to D are introduced to suppress ZZ crosstalk.
  • H(t) H Ctrl (t)+ ⁇ H Xtalk ;
  • H Ctrl (t) is the controllable part for realizing single/two-bit operation
  • H Xtalk is the cross-regional crosstalk to be suppressed
  • ⁇ is the crosstalk intensity
  • Definition representing the evolution of the system under the control waveform.
  • U Xtalk (t) represents the evolution of the system under the influence of crosstalk. Then U Xtalk (t) can be written as the expression of crosstalk intensity ⁇ :
  • T represents the duration of the operation
  • U Target (T) represents the target operation to be achieved.
  • This scheme further transforms it into a single-scalar objective multi-parameter optimization problem, which can be solved by gradient descent, for example.
  • the process is as follows:
  • A (A 1 , A 2 , . . . , A N ) is the parameter to be optimized, and T is the total waveform time.
  • F(U,V) represents the average operation fidelity between operations U and V (Average Gate Fidelity)
  • F-norm Frobenius-norm
  • w i is the weight coefficient, which usually ranges from 10 -3 to 10 -5 .
  • H(t) H Ctrl (t)+ ⁇ H Xtalk + ⁇ ′H Inner-Xtalk ;
  • ⁇ represents the equivalent intensity of the ZZ crosstalk across the region
  • ⁇ ′ represents the equivalent intensity of the ZZ crosstalk within the region
  • FIG. 15 shows a schematic diagram of a single-bit operation and a two-bit operation.
  • Figure 15 shows a region consisting of a single-bit operation (3) and a two-bit operation (1, 2) and the coupling around the region.
  • the effective Hamiltonian in this region can be written as:
  • the optimized single-bit operation waveform is applied on qubit 3 can be suppressed Crosstalk, applying an optimized two-bit operating waveform on 1, 2, can suppress 1-a, 1-b, 2-c, 2-e crosstalk, thereby suppressing all cross-regional crosstalk. That is, applying the optimized waveforms independently can suppress all crosstalk across regions. This feature ensures the scalability of the scheme shown in this application: only a region with only one single/two-bit operation needs to be optimized, It can be extended to any shape area.
  • the scheme shown in the related art usually adopts Gaussian waveform to realize single-bit operation.
  • FIG. 16 shows a single-bit waveform topology diagram involved in the embodiment of the present application.
  • a waveform is applied on qubit 1 to achieve a specific operation, and if the ZZ crosstalk is suppressed, the state of qubit 2 should remain the same before and after the waveform is applied.
  • the difference between the state of the qubit 2 after the waveform is applied and the state before the waveform is applied can be used to describe the suppression effect of the waveform on the ZZ crosstalk.
  • the unfidelity is used to describe the state difference, and the unfidelity of the two states is defined as:
  • FIG. 17 shows a schematic diagram of a crosstalk suppression situation involved in an embodiment of the present application
  • FIG. 18 shows a schematic diagram of another crosstalk suppression situation involved in an embodiment of the present application.
  • Fig. 17 shows the crosstalk suppression when the R x ( ⁇ /2) operation is realized on qubit 1
  • Fig. 18 shows the crosstalk suppression when the constant I operation is realized.
  • the horizontal axis represents different crosstalk intensities
  • the vertical axis represents the crosstalk suppression effect measured by unfidelity. The lower the unfidelity, the better the crosstalk suppression effect.
  • the optimized waveform involved in this solution has an improved suppression effect on ZZ crosstalk by 4 to 5 orders of magnitude.
  • the optimized waveforms involved in the solutions shown in this application all have strong suppression effects on crosstalk of different intensities. For example, taking the unfidelity of 10 -8 as the standard, the R x ( ⁇ /2) optimized according to the scheme can suppress the crosstalk within 6MHz, and the I waveform optimized according to the scheme can suppress the crosstalk within 8MHz. Considering that the ZZ crosstalk observed in experiments is usually less than 1MHz, it can be said that this scheme achieves strong suppression of the ZZ crosstalk.
  • FIG. 19 shows a two-bit waveform topology diagram involved in the embodiment of the present application.
  • a waveform is applied to qubits 2 and 3 to achieve a specific operation. If the ZZ crosstalk is suppressed, the states of qubits 1 and 4 should remain the same before and after the waveform is applied. Therefore, the state infidelity of qubits 1 and 4 before and after the waveform is applied is used to describe the suppression effect.
  • FIG. 20 shows a comparative schematic diagram of the suppression effect on ZZ crosstalk when the R xx ( ⁇ /2) operation is realized. Similar results to the single-bit waveform can be obtained from the analysis of Figure 20:
  • the optimized waveform involved in this solution has an improved suppression effect on ZZ crosstalk by 4 to 5 orders of magnitude. That is to say, the optimized waveforms involved in this solution have strong suppression effects on crosstalk of different intensities.
  • this scheme achieves strong suppression of ZZ crosstalk in both single-bit operation and two-bit operation in a simple and unified manner.
  • This application selects Hidden-Shift (HS) algorithm, Bernstein-Vazirani (BV) algorithm, Quantum Fourier Transform (QFT), Ising model simulation, and Quantum Volume (QV) as quantum computing tasks.
  • HS Hidden-Shift
  • BV Bernstein-Vazirani
  • QFT Quantum Fourier Transform
  • Ising model simulation Ising model simulation
  • QV Quantum Volume
  • FIG. 21 shows the mesh topology involved in the embodiment of the present application.
  • Computer simulation is carried out on the grid topology shown in Figure 21. There is ZZ crosstalk between two adjacent bits in the topology diagram, and its intensity is set to 200 kHz according to the experimental results.
  • the quantum operation scheduling scheme provided in this application is compared with the maximum parallel scheduling (Parallel Schedule), and the scheduling method involved in this application is recorded as crosstalk suppression scheduling (X-suppressed Schedule).
  • Parallel Schedule the scheduling method involved in this application is recorded as crosstalk suppression scheduling (X-suppressed Schedule).
  • X-suppressed Schedule crosstalk suppression scheduling
  • HS-4 represents the 4-bit Hidden Shift algorithm, and so on.
  • the method provided by the present application greatly reduces the impact of ZZ crosstalk on quantum computing tasks. Compared with the original method, the method provided in this application has achieved a 10-110 times improvement in the quantum computing task evaluated in this application.
  • the method provided in this application has good scalability: as the number of qubits used in quantum computing tasks increases, the improvement brought by the method provided in this application also increases.
  • the method provided in this application can not only be applied to quantum computing devices with fewer qubits at present, but also can be applied to large-scale quantum computing devices in the future.
  • the waveform optimization scheme involved in this application does not require the form of the crosstalk H Xtalk .
  • H Xtalk In addition to being applied to ZZ crosstalk, if there are other types of crosstalk, it is only necessary to replace H Xtalk with a corresponding form, and the method of this application can also be applied.
  • the above-mentioned "optimal suppression" algorithm and quantum operation scheduling algorithm are equally applicable to other crosstalks.
  • the waveform optimization method involved in this application ultimately boils down to solving a multi-objective optimization problem.
  • a solution method for converting it into a single-scalar objective multi-parameter optimization is given.
  • the gradient descent method in this method can be replaced by other optimization methods, such as Nelder-Mead (NM) algorithm, Broyden-Fletcher- Goldfarb-Shanno (BFGS) algorithm, etc.
  • NM Nelder-Mead
  • BFGS Broyden-Fletcher- Goldfarb-Shanno
  • other multi-objective optimization algorithms can also be used to solve this problem, such as genetic algorithms, simulated annealing, etc.
  • the scheme shown in this application can be used to suppress the influence of ZZ crosstalk existing in the device on the calculation when a quantum circuit is executed on a superconducting quantum computing device, and improve the fidelity of the calculation.
  • FIG. 23 shows a schematic diagram of executing a quantum circuit involved in an embodiment of the present application.
  • the quantum operation scheduling method involved in the present application can be used to process quantum circuits and generate quantum circuit execution schemes, and the waveform optimization method involved in the present application can be used to generate corresponding controls for the quantum operations involved in the execution scheme.
  • Waveform According to the quantum circuit implementation scheme, using the control waveform to control the quantum computing device can realize the implementation of the quantum circuit on the quantum computing device while suppressing the influence of ZZ crosstalk on the calculation.
  • the present application can also be applied to improve quantum memory, suppress ZZ crosstalk existing in quantum memory devices, and improve the data retention time of quantum memory.
  • FIG. 24 and FIG. 25 show a schematic diagram of a quantum memory involved in an embodiment of the present application
  • FIG. 25 illustrates a schematic diagram of an identity quantum circuit involved in an embodiment of the present application.
  • the refresh operation of quantum memory is equivalent to executing an identity quantum circuit on quantum memory.
  • the inter-regions generated when the quantum operations are performed on the quantum computing device are obtained.
  • a control waveform that minimizes crosstalk, and the quantum operation is performed on a quantum computing device based on the control waveform, thereby suppressing the inter-regional crosstalk caused by the quantum operation by optimizing the control waveform of the quantum operation, due to any type of quantum
  • the control waveform can be optimized for all operations. Therefore, the scheme can realize the crosstalk suppression for any type of quantum operation, which improves the applicability of crosstalk suppression, thereby improving the effect of crosstalk suppression.
  • FIG. 26 shows a block diagram of a quantum operation execution apparatus provided by an embodiment of the present application.
  • the apparatus has the function of implementing the above method example, and the function may be implemented by hardware or by executing corresponding software by hardware.
  • the apparatus may be the computer equipment described above, or may be provided in the computer equipment. As shown in Figure 26, the apparatus may include:
  • the quantum operation acquisition module 2601 is used to acquire n unscheduled quantum operations corresponding to the quantum circuit; n is greater than or equal to 1, and n is an integer;
  • a quantum operation scheduling module 2602 configured to perform operation scheduling based on the topology of the quantum computing device and the n unscheduled quantum operations to obtain a target operation group; the target operation group includes each scheduled quantum operation;
  • a quantum operation execution module 2603 configured to execute each scheduled quantum operation included in the target operation group in parallel on the quantum computing device
  • control waveform of the scheduled quantum operation is generated based on a specified target; the specified target is used to minimize the crosstalk between regions under the condition that the control quantum operation is not distorted; the crosstalk between regions belongs to different Crosstalk between qubits in the connected region; the connected region is obtained by distinguishing each qubit in the quantum computing device by whether to perform a quantum operation.
  • the quantum operation scheduling module 2602 includes:
  • a schedulable set obtaining submodule configured to obtain a schedulable set based on the n unscheduled quantum operations; the schedulable set includes schedulable quantum operations in the n unscheduled quantum operations;
  • a candidate operation group extraction submodule used for extracting a candidate operation group from the schedulable set
  • the division scheme obtaining sub-module is used to obtain the qubit division scheme; the qubit division scheme is obtained according to the specified division method based on the topological structure; the qubit division scheme instructs the dividing the qubits into two sets of qubits to form at least two of the connected regions on the quantum computing device;
  • a target operation group acquisition submodule configured to acquire the target operation group based on the candidate operation group and the qubit division scheme.
  • the apparatus further includes:
  • the quantum operation scheduling module 2602 is further configured to respond that there are m unscheduled quantum operations in addition to the target operation group, based on the topology, and m unscheduled quantum operations Perform operation scheduling to obtain a new target operation group; m is greater than or equal to 1, and m is an integer;
  • the quantum operation execution module 2603 is further configured to execute each scheduled quantum operation included in the new target operation group in parallel on the quantum computing device.
  • the candidate operation group extraction submodule includes:
  • a two-bit operation set acquisition unit configured to acquire each two-bit quantum operation in the schedulable set in response to the schedulable set including two-bit quantum operations, and obtain a two-bit operation set;
  • an operation group construction unit configured to construct two operation groups based on the two nearest quantum operations in the two-bit operation set in response to the two-bit operation set including 3 or more operations;
  • an operation adding unit configured to perform i operation additions based on the distance between other quantum operations except the two quantum operations and the two operation groups in the two-bit operation set, where i is greater than or equal to 1 , and i is an integer;
  • a candidate operation group acquiring unit configured to acquire the candidate operation group based on the result of adding the i operations.
  • the operation adding unit is used for,
  • the maximum distance is the maximum value of the distances between the other quantum operations and the two operation groups respectively;
  • a target odd-degree vertex pairing scheme is obtained according to the first specified division method;
  • the target odd-degree vertex pairing scheme includes paths between each odd-degree vertex pair in the target dual graph, And the target odd-degree vertex pairing scheme is used to indicate the qubit partition scheme of the specified operation group;
  • the target dual graph is a dual graph of a topological graph, and the topological graph is a plan view of the topological structure;
  • the candidate operation group obtaining unit is configured to respond to the ith operation that the number of the other quantum operations added is 0, or, in response to the ith operation
  • the target odd-degree vertex pairing scheme obtained during the adding process does not meet the crosstalk suppression requirement, and among the two operation groups after the i-th operation is added, the operation group containing the largest number of operations is obtained as the Candidate Action Group.
  • the operation adding unit when the target odd-degree vertex pairing scheme is obtained based on the topological structure and the specified operation group according to the first specified division method, the operation adding unit is used for,
  • the odd-degree vertex pairing scheme includes a path for each of the odd-degree vertex pairs in the target dual graph;
  • each quantum operation in the specified operation group corresponds to an edge in the target dual graph
  • the total number of irrepressible crosstalks It is characterized by the number of edges in the topological graph corresponding to the paths in the odd vertex pairing scheme;
  • the maximum number of qubits in the region is characterized by the number of vertices in the maximum connected region after the cutset is removed from the topological graph , the cut set is the set of the remaining edges after removing the paths in the odd-degree vertex pairing scheme from the topology graph corresponding to the edges in the topology graph;
  • the odd vertex pairing scheme corresponding to the smallest crosstalk suppression index is acquired as the target odd vertex pairing scheme.
  • the crosstalk suppression requirements include:
  • the maximum number of regional qubits of the target oddity vertex pairing scheme is less than the threshold of the number of bits
  • the total number of unsuppressed crosstalks of the target oddity vertex pairing scheme is less than the total number of crosstalk thresholds.
  • the operation adding unit when obtaining the distances between the other quantum operations in the two-bit operation set and the two operation groups respectively, the operation adding unit for,
  • the operation distance between the first quantum operation and each existing quantum operation in the first operation group is obtained; the operation distance is used to indicate that the quantum bits corresponding to the two two-bit operations are in the sum of the shortest path lengths in the topology; the first quantum operation is any one of the other quantum operations, and the first operation group is any one of the two operation groups;
  • the distance between the first quantum operation and the first operation group is obtained.
  • the candidate operation group extraction submodule is configured to acquire the schedulable set as the candidate operation in response to each quantum operation in the schedulable set being a single-bit quantum operation Group;
  • the division scheme obtains sub-modules, including:
  • a pairing scheme obtaining unit configured to obtain the target oddity vertex pairing scheme according to the second specified division method based on the topology structure
  • an edge removing unit used for removing the edge corresponding to the target odd-degree vertex pairing scheme in the topological graph, and obtaining the topological graph after removing the edge;
  • the coloring unit is used for performing vertex two-coloring on the topological graph after edge removal to obtain a qubit division scheme.
  • the pairing scheme acquiring unit is configured to:
  • the vertices in the complete graph are odd-degree vertices in the target dual graph
  • the target dual graph is a dual graph of a topology graph
  • the topology graph is a plan view of the topology of the quantum computing device
  • the odd-degree vertex pairing scheme includes a path of each described odd-degree vertex pair in the target dual graph respectively;
  • the path in the degree-vertex pairing scheme is represented by the number of edges in the topological graph; the maximum number of qubits in the region is represented by the number of vertices in the maximum connected region after the cutset is removed from the topological graph.
  • the set is the set of the remaining edges after removing the paths in the odd vertex pairing scheme from the topological graph corresponding to the edges in the topological graph;
  • the odd vertex pairing scheme corresponding to the smallest crosstalk suppression index is obtained as a target odd vertex pairing scheme.
  • the operation adding unit or the pairing scheme acquiring unit is configured to:
  • the crosstalk suppression index is: ⁇ N Q +N C ;
  • N Q represents the maximum number of regional qubits
  • N C represents the total number of unsuppressed crosstalk
  • ⁇ represents the importance of N Q and N C.
  • the target operation group obtains submodules for,
  • the candidate operation group into sub-operation groups corresponding to the two qubit sets respectively; the qubits corresponding to the quantum operations in the sub-operation groups are located in the quantum operations corresponding to the sub-operation groups within the set of bits;
  • the target sub-operation group is the sub-operation group corresponding to the two qubit sets respectively, including the number of quantum operations The most sub-operation group;
  • the padding operation is the identity quantum operation corresponding to the padding qubit, the padding qubit is the set of qubits corresponding to the target sub-operation group, except for the target sub-operation group corresponding to the other qubits than the corresponding qubit.
  • the specified target is a single scalar target obtained based on the average operational fidelity of quantum operations under the action of a control waveform and the inter-regional crosstalk.
  • the formula of the single scalar target is:
  • L is the single scalar target
  • U(T) represents the unitary transformation of the corresponding quantum operation under the action of the control waveform
  • U Target (T) represents the target unitary transformation of the corresponding quantum operation
  • F(U(T) , U Target (T)) represents the average operational fidelity between U (T) and U Target (T); represents the evolution of a closed quantum system under the influence of crosstalk between said regions.
  • the apparatus further includes:
  • an iterative update module configured to perform R times of iterative update on the function parameters of the control waveform function of the target quantum operation based on the single scalar target; R ⁇ 2 and R is an integer; the target quantum operation is each of the schedulable quantum operations operation and any one of the identity quantum operations;
  • a waveform generation module configured to generate a control waveform of the target quantum operation based on the iteratively updated function parameters.
  • the iterative update module is used to:
  • the first system evolution is the evolution of the closed quantum system under the influence of the rth control waveform; 2 ⁇ r ⁇ R, and r is an integer; the rth The first control waveform is the control waveform corresponding to the function parameter after the r-1th iteration update;
  • the function parameters after the r-1th iteration update are updated based on the single scalar target in the rth iteration process, and the function parameters after the rth iteration update are obtained.
  • the inter-regional crosstalk includes inter-regional ZZ crosstalk.
  • the inter-regions generated when the quantum operations are performed on the quantum computing device are obtained.
  • a control waveform that minimizes crosstalk, and the quantum operation is performed on a quantum computing device based on the control waveform, thereby suppressing the inter-regional crosstalk caused by the quantum operation by optimizing the control waveform of the quantum operation, due to any type of quantum
  • the control waveform can be optimized for all operations. Therefore, the scheme can realize the crosstalk suppression for any type of quantum operation, which improves the applicability of crosstalk suppression, thereby improving the effect of crosstalk suppression.
  • FIG. 27 shows a block diagram of an apparatus for generating control waveforms for quantum operations provided by an embodiment of the present application.
  • the apparatus may include:
  • a quantum operation acquisition module 2701 used to acquire the scheduled quantum operations
  • a parameter acquisition module 2702 configured to acquire function parameters of the control waveform function of the scheduled quantum operation based on a specified target; the specified target is used to minimize crosstalk between regions without distortion of the control quantum operation;
  • the inter-regional crosstalk is the crosstalk between qubits belonging to different connected regions; the connected region is obtained by dividing each qubit in the quantum computing device according to whether a quantum operation is performed or not;
  • a waveform generation module 2703 configured to generate a control waveform of the scheduled quantum operation based on the function parameter.
  • the inter-regions generated when the quantum operations are performed on the quantum computing device are obtained.
  • FIG. 28 shows a structural block diagram of a computer device provided by an embodiment of the present application.
  • the computer device can be used to implement the methods provided in the above embodiments.
  • the computer device 2800 includes a processing unit (such as a CPU (Central Processing Unit, central processing unit), a GPU (Graphics Processing Unit, graphics processing unit), and an FPGA (Field Programmable Gate Array, Field Programmable Logic Gate Array, etc.) 2801, including RAM (Random-Access Memory, random access memory) 2802 and ROM (Read-Only Memory, read-only memory) 2803 system memory 2804, and a system bus 2805 connecting the system memory 2804 and the central processing unit 2801.
  • a processing unit such as a CPU (Central Processing Unit, central processing unit), a GPU (Graphics Processing Unit, graphics processing unit), and an FPGA (Field Programmable Gate Array, Field Programmable Logic Gate Array, etc.) 2801, including RAM (Random-Access Memory, random access memory) 2802 and ROM (Read-Only Memory, read-only memory) 2803 system memory 2804, and a system bus 2805 connecting the system memory 2804 and the central processing unit 2801.
  • RAM Random-Access Memory, random
  • the computer device 2800 also includes a basic input/output system (I/O system) 2806 that helps transfer information between various devices within the server, and a basic input/output system (I/O system) 2806 for storing an operating system 2813, application programs 2814, and other program modules 2815
  • I/O system basic input/output system
  • the basic input/output system 2806 includes a display 2808 for displaying information and input devices 2809 such as a mouse, keyboard, etc., for user input of information.
  • input devices 2809 such as a mouse, keyboard, etc.
  • both the display 2808 and the input device 2809 are connected to the central processing unit 2801 through the input and output controller 2810 connected to the system bus 2805.
  • the basic input/output system 2806 may also include an input output controller 2810 for receiving and processing input from a number of other devices such as a keyboard, mouse, or electronic stylus.
  • input output controller 2810 also provides output to a display screen, printer, or other type of output device.
  • the mass storage device 2807 is connected to the central processing unit 2801 through a mass storage controller (not shown) connected to the system bus 2805.
  • the mass storage device 2807 and its associated computer-readable media provide non-volatile storage for the computer device 2800. That is, the mass storage device 2807 may include a computer-readable medium (not shown) such as a hard disk or a CD-ROM (Compact Disc Read-Only Memory) drive.
  • Computer-readable media can include computer storage media and communication media.
  • Computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data.
  • Computer storage media include RAM, ROM, EPROM (Erasable Programmable Read-Only Memory, Erasable Programmable Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory, Electrically Erasable Programmable Read-Only Memory), flash memory or Other solid-state storage technologies, CD-ROM, DVD (Digital Video Disc, high-density digital video disc) or other optical storage, cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices.
  • the system memory 2804 and the mass storage device 2807 described above may be collectively referred to as memory.
  • the computer device 2800 may also be connected to a remote computer on the network through a network such as the Internet to run. That is, the computer device 2800 can be connected to the network 2812 through the network interface unit 2811 connected to the system bus 2805, or can also use the network interface unit 2811 to connect to other types of networks or remote computer systems (not shown) .
  • the memory also includes at least one instruction, at least one piece of program, set of code or set of instructions stored in the memory and configured to be executed by one or more processors , in order to realize the above quantum operation execution method.
  • a computer-readable storage medium stores at least one instruction, at least one segment of a program, a code set or an instruction set, the at least one instruction, the at least one segment
  • the program, the code set or the instruction set when executed by the processor, implements the above quantum operation execution method.
  • the computer-readable storage medium may include: ROM (Read-Only Memory, read-only memory), RAM (Random-Access Memory, random access memory), SSD (Solid State Drives, solid-state hard disk), or an optical disk.
  • the random access memory may include ReRAM (Resistance Random Access Memory, resistive random access memory) and DRAM (Dynamic Random Access Memory, dynamic random access memory).
  • a computer program product or computer program comprising computer instructions stored in a computer readable storage medium.
  • the processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the methods shown in the above embodiments.
  • a quantum operation chip is also provided, and the quantum operation chip is used to implement the method shown in the above-mentioned embodiment.
  • references herein to "a plurality” means two or more.
  • "And/or" which describes the association relationship of the associated objects, means that there can be three kinds of relationships, for example, A and/or B, which can mean that A exists alone, A and B exist at the same time, and B exists alone.
  • the character "/" generally indicates that the associated objects are an "or” relationship.
  • the numbering of the steps described in this document only exemplarily shows a possible execution sequence between the steps. In some other embodiments, the above steps may also be executed in different order, such as two different numbers. The steps are performed at the same time, or two steps with different numbers are performed in a reverse order to that shown in the figure, which is not limited in this embodiment of the present application.

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Abstract

本申请公开了一种量子操作执行方法、装置、芯片、设备及存储介质，涉及量子技术领域。所述量子操作执行方法包括：获取与量子电路对应的n个未调度的量子操作；基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组；在所述量子计算器件上并行执行所述目标操作组中包含的各个被调度的量子操作；所述被调度的量子操作的控制波形是基于指定目标生成的；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；上述方案能够适用于任意类型和任意实现原理的量子操作，从而极大的提高了串扰抑制的适用性。

Description

量子操作执行方法、装置、芯片、设备及存储介质
本申请要求于2021年04月01日提交的、申请号为202110357168.8、发明名称为“量子操作执行方法、装置及量子操作芯片”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及量子技术领域，特别涉及一种量子操作执行方法、装置、芯片、设备及存储介质。
背景技术
在量子计算器件中，量子比特之间的耦合会导致量子比特之间存在串扰，而如何抑制量子比特之间的串扰，是量子计算中急需解决的问题。
在相关技术中，量子计算中的串扰抑制通常有硬件方式和软件方式，其中，软件方式主要是在利用交叉共振效应实现的两比特操作的场景中，引入额外的波形来纠正两比特操作的失真，从而减轻两比特操作下的串扰影响。
然后，上述基于软件的串扰抑制方式只适用于利用交叉共振效应实现的两比特操作的场景，导致串扰抑制的适用性较差。
发明内容
本申请实施例提供了一种量子操作执行方法、装置、芯片、设备及存储介质，能够通过软件方式实现对任意类型量子操作的串扰抑制，提高了串扰抑制的适用性。技术方案如下：
根据本申请实施例的一个方面，提供了一种量子操作执行方法，由计算机设备执行，所述方法包括：
获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数；
基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组；所述目标操作组包含各个被调度的量子操作；
在所述量子计算器件上并行执行所述目标操作组中包含的各个被调度的量子操作；
其中，所述被调度的量子操作的控制波形是基于指定目标生成的；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是以是否执行量子操作，对所述量子计算器件中的各个量子比特进行划分得到的。
根据本申请实施例的一个方面，提供了一种量子操作的控制波形生成方法，由计算机设备执行，所述方法包括：
获取被调度的量子操作；
基于指定目标，获取所述被调度的量子操作的控制波形函数的函数参数；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是在量子计算器件中，以包含的量子比特是否执行量子操作进行划分的；
基于所述函数参数生成所述被调度的量子操作的控制波形。
根据本申请实施例的一个方面，提供了一种量子操作执行装置，所述装置包括：
量子操作获取模块，用于获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数；
量子操作调度模块，用于基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组；所述目标操作组包含各个被调度的量子操作；
量子操作执行模块，用于在所述量子计算器件上并行执行所述目标操作组中包含的各个被调度的量子操作；
其中，所述被调度的量子操作的控制波形是基于指定目标生成的；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是所述量子计算器件中的各个量子比特以是否执行量子操作进行区分得到的。
根据本申请实施例的一个方面，提供了一种量子操作的控制波形生成装置，包括：
量子操作获取模块，用于获取被调度的量子操作；
参数获取模块，用于基于指定目标，获取所述被调度的量子操作的控制波形函数的函数参数；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是以是否执行量子操作，对所述量子计算器件中的各个量子比特进行划分得到的；
波形生成模块，用于基于所述函数参数生成所述被调度的量子操作的控制波形。
根据本申请实施例的一个方面，提供了一种量子操作芯片，所述量子操作芯片用于实现如上所述的量子操作执行方法，或者，所述量子操作芯片用于实现如上所述的量子操作的控制波形生成方法。
根据本申请实施例的一个方面，提供了一种计算机设备，所述计算机设备中包含至少一个上述的量子操作芯片。
根据本申请实施例的一个方面，提供了一种计算机可读存储介质，所述存储介质中存储有至少一条计算机指令，所述至少一条计算机指令由计算机设备中的处理器，使得所述计算机设备实现如上所述的量子操作执行方法，或者，所述量子操作芯片用于实现如上所述的量子操作的控制波形生成方法。
根据本申请实施例的一个方面，提供了一种计算机程序产品，所述计算机程序产品包括计算机指令，所述计算机指令由计算机设备中的处理器执行，使得所述计算机设备实现如上所述的量子操作执行方法，或者，所述量子操作芯片用于实现如上所述的量子操作的控制波形生成方法。
本申请实施例提供的技术方案至少包括如下有益效果：
基于量子电路，以及量子计算器件的拓扑结构，进行量子操作的调度，得到被调度的量子操作，并在量子计算器件上执行被调度的量子操作，其中，执行的量子操作的波形，是在量子计算器件上保证量子操作不失真的情况下，使得区域间串扰最小化的控制波形；上述方案基于量子电路的拓扑结构对量子操作的执行顺序和控制波形进行优化即可以实现串扰抑制，不受量子操作的操作类型以及实现原理的限制，能够适用于任意类型和任意实现原理的量子操作，从而极大的提高了串扰抑制的适用性。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请一个实施例提供的方案应用场景的示意图；
图2是本申请一个实施例提供的量子操作执行方法的流程图；
图3是本申请一个实施例提供的量子操作执行方法的流程图；
图4是图3所示实施例涉及的一种ZZ串扰抑制示意图；
图5是图3所示实施例涉及的一种最大区域的量子比特数和不可被抑制的ZZ串扰总个 数相互制约的示意图；
图6是图3所示实施例涉及的拓扑图及其对偶图；
图7是图3所示实施例涉及的最优抑制求解示意图；
图8是图3所示实施例涉及的最优抑制问题求解示例图；
图9是图3所示实施例涉及的量子电路示意图；
图10是图3所示实施例涉及的抑制方案示意图；
图11是图3所示实施例涉及的抑制效果差异示意图；
图12是图3所示实施例涉及的一种单比特操作示意图；
图13是图3所示实施例涉及的单比特波形示意图；
图14是图3所示实施例涉及的单比特波形示意图；
图15是图3所示实施例涉及的单比特操作和两比特操作的示意图；
图16是图3所示实施例涉及的一种单比特波形拓扑图；
图17是图3所示实施例涉及的串扰抑制情况示意图；
图18是图3所示实施例涉及的另一种串扰抑制情况示意图；
图19是图3所示实施例涉及的一种两比特波形拓扑图；
图20是图3所示实施例涉及的实现R xx(π/2)操作时对ZZ串扰的抑制效果对比示意图；
图21是图3所示实施例涉及的网格拓扑；
图22是图3所示实施例涉及的两种调度方式的对比示意图；
图23是图3所示实施例涉及的执行量子电路的示意图；
图24是图3所示实施例涉及的量子内存的示意图；
图25是图3所示实施例涉及的恒等量子电路示意图；
图26本申请一个实施例提供的量子操作执行装置的框图；
图27本申请一个实施例提供的量子操作的控制波形生成装置的框图；
图28是本申请一个实施例提供的计算机设备的结构框图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施方式作进一步地详细描述。
在对本申请实施例进行介绍说明之前，首先对本申请中涉及的一些名词进行解释说明。
1、量子计算(Quantum Computation)：利用量子态的叠加和纠缠等性质快速完成计算任务的一种计算方式。
2、量子比特(Qubit)：量子信息的承载形式，下文中部分位置简写为比特。
3、量子操作(Quantum Operation)：对量子比特进行操纵，从而对量子比特承载的量子信息进行处理。常见的量子操作有泡利X、Y、Z变换(或写作σ x、σ y、σ z)，哈达玛变换(H)，受控泡利X变换(CNOT)等。只使用单比特操作和两比特操作，可完成任意的量子计算，下文中部分位置简写为操作。
4、量子电路(Quantum Circuit)：量子计算的一种描述模型，由量子比特以及在量子比特上的量子操作组成。
5、量子计算器件(Quantum Computing Device)：执行量子计算的物理装置。
6、量子电路执行并行度(Execution Parallelism)：在量子计算器件上执行量子电路时，同时执行的量子操作个数。
7、哈密顿量(Hamiltonian)：描述量子系统(例如量子比特)演化的数学工具。有效哈密顿量指的是对原哈密顿量进行坐标变换并忽略无关因素后得到的简化哈密顿量。
8、超导量子计算器件(Superconducting Quantum Computing Device)：指量子比特采用超导技术实现的量子计算器件。在超导量子计算器件中，施加控制波形(Control Pulse)影响哈 密顿量中特定项，可影响量子比特演化，从而实现量子操作。
9、ZZ串扰(ZZ Crosstalk)：由于量子比特高能级之间的耦合而产生的
Figure PCTCN2021117519-appb-000001
相互作用。在超导量子计算器件中，具有物理耦合的两个比特间存在ZZ串扰，这是一种永久存在(always-on)的相互作用。
10、量子内存(Quantum Memory)：保存量子信息的装置，与量子计算器件的不同之处在于，其设计目的不在于计算，而在于长时间保存信息，但量子内存上也可以进行某些量子操作(或称刷新(Refresh))以延长信息保存时间。
11、量子纠错码(Quantum Error Correction Code)：真实的量子计算器件存在各种错误，量子纠错码用于编码量子比特，提高量子计算的容错率。
12、保真度(Fidelity)：衡量实际值与真值相似度的指标，具体场景中有不同定义形式。保真度越高，实际值与真值越相似。
13、图(Graph)：数学上，图由顶点与连接顶点的边组成，记为G＝(V,E)，其中V是顶点集，E是边集。量子计算器件的拓扑结构可用图表示，其中顶点代表量子比特，边代表量子比特间的耦合。
14、平面图(Planar Graph)、对偶图(Dual Graph)：能够以某种方式画在平面上并保证不同边不相交的图称为平面图。平面图存在对偶图，对偶图的顶点对应平面图的面，当平面图中两个面相邻时，对偶图中对应顶点之间连边，这样对偶图的边就与平面图的边一一对应。平面图G的对偶图记为G *，平面图的边(u,v)对应对偶图的边(u,v) *。
15、最短路(Shortest Path)：连接两个顶点的所有路径中最短的路径。
16、连通分量(Connected Component)：连通分量是图的子图，满足各顶点之间均存在路径相连的条件(连通性条件)。当增加图中的任何其他顶点都会违背连通性条件时，此时的连通分量称为最大连通分量。
17、割(Cut)、割集(Cut-Set)：图G＝(V,E)的割C＝(S,T)是将图的顶点集V划分成两个不相交的集合S和T的一种划分，其对应的割集E C是图的边集E中两端点分属S和T的边组成的集合，即E C＝{(u,v)|u∈S,V∈T}。
18、奇度顶点配对(Odd-vertex Pairing)：当移除一个边集D后剩下的图中没有奇数度的顶点，则称该边集为奇度顶点配对。一个顶点的度数为其所连边的个数。任何奇度顶点配对均包含图中所有奇度顶点。
19、最大匹配(Maximum Matching)：图的一个匹配是图的一个子图，其中每两条边都没有公共顶点。图的最大匹配指的是边数最多的匹配。
20、顶点二着色(Vertex 2-Coloring)：为顶点赋予两种颜色中的一种，使得有边相连的顶点颜色不同。如果一个图可以顶点二着色，则称该图是二分图(Bipartite Graph)。
21、搜索(Search)：在问题的众多可能解中，高效地求得较优解的方法。常见搜索方法有穷尽搜索(Exhaustive Search)：穷尽所有可能选取最优解，集束搜索(Beam Search)：问题的解由若干个子问题的解组成，在求解过程中对于每个子问题仅保留有限个数解的搜索方法。
在相关技术中，抑制ZZ串扰的技术方案可分为四类：
1)采用可调节的耦合。ZZ串扰需要通过量子比特间的耦合介导，在不需要耦合时，可通过调低耦合强度，等效地“关闭”耦合，从而抑制串扰。
2)采用异构量子比特。ZZ串扰的强度与耦合相连的两个量子比特的非谐性有关，当它们的非谐性等大反号(绝对值相同，符号相反)时，ZZ串扰强度为0。通过使用异构的量子比特，可以实现非谐性的等大反号，从而实现对ZZ串扰的抑制。
3)引入多种耦合方式。不同耦合方式介导的ZZ串扰具有不同的强度，特别是它们的符号可以相反。通过引入多种耦合方式，使得不同方式介导的串扰强度相互抵消，可抑制ZZ串扰。
4)施加额外波形。在执行两比特操作时，ZZ串扰会使两比特操作失真，通过施加额外波形，可以一定程度上纠正这种失真，减轻ZZ串扰的影响。
上述技术方案中前三类为硬件实现方案，其缺点在于需要复杂的硬件结构与控制逻辑。例如，可调节耦合方案需要引入额外的耦合器和控制耦合器的控制线，异构量子比特对芯片的制造工艺提出了更高的要求，多种耦合方式则需要精确地控制不同耦合的参数，这些复杂的硬件结构增加了控制复杂性并引入了额外的退相干因素。与这些方案相比，本申请后续实施例提供的方案可用在具有单个固定耦合的同构量子比特芯片上；此外，本申请所示的的方案也可用于这三类硬件实现方案的硬件上，具有良好的通用性。
而对于施加额外波形这一方案，其缺点在于适用性差。这一方案针对利用交叉共振效应实现的两比特操作设计，目前未有工作表明其可用于其他方式实现的操作或单比特操作。与之相比，本申请后续实施例提供的方案既适用于单比特操作也适用于双比特操作，且对操作的实现技术没有特殊要求。
总而言之，本申请提出了一种更加简单、通用的串扰抑制方法，无需复杂硬件结构支持，且具有高适用性。
在全栈可编程量子计算机的框架中，顶层包括量子算法、量子高级语言和量子编译器，底层是量子芯片(或称为量子电路)。为了使得两者连接在一起，与经典计算机类似，在中间层有了量子体系结构。在这样一台全栈可编程量子计算机中，量子体系结构(包括量子指令集和量子控制微体系结构)承担着沟通量子软件与量子硬件的重要作用，需要提供诸如程序流控制、反馈控制、精确的时序门操作序列等功能。
在具体的实现上，量子指令集由编译器产生，而量子控制微体系结构在硬件上实现为一个量子控制处理器(Quantum Control Processor，QCP)，并通过执行量子指令集来完成对量子芯片的控制。该量子控制处理器的输出最终控制的是一系列模拟仪器(即控制&读取电子仪器)，如在超导量子计算体系中，这里的模拟仪器就会将数字信号转换为模拟微波波形来对量子芯片进行控制。
请参考图1，其示出了本申请一个实施例提供的方案应用场景的示意图。如图1所示，该应用场景可以是超导量子计算平台，该应用场景包括：量子计算器件11、稀释制冷机12、控制设备13和计算机14。
量子计算器件11是一种作用在物理量子比特上的电路，量子计算器件11可以实现成为量子芯片，如处于绝对零度附近的超导量子芯片。稀释制冷机12用于为超导量子芯片提供绝对零度的环境。
控制设备13用于对量子计算器件11进行控制，计算机14用于对控制设备13进行控制。例如，编写好的量子程序经过计算机14中的软件编译成指令发送给控制设备13(如电子/微波控制系统)，控制设备13将上述指令转换为电子/微波控制信号输入到稀释制冷机12，控制处于小于10mK温度的超导量子比特。读取的过程则与之相反，读取波形被输送到量子计算器件11。
其中，稀释制冷机12用于为量子计算器件11(如超导量子芯片)提供工作环境。量子计算器件11由模拟波形进行控制，因此需要一套主要由FPGA(Field Programmable Gate Array，现场可编程逻辑门阵列)和ADC(Analog-to-Digital Converter，模数转换器)/DAC(Digital-to-Analog Converter，数模转换器)组成的测控系统来提供控制和测量。测控系统又由上位机(比如计算机14)的测控软件进行控制，测控软件会决定当前需要进行的操作，以及对测控系统进行操作配置等。上位机可以是诸如PC(Personal Computer，个人计算机)之类的经典计算机。
在对本申请方法实施例进行介绍说明之前，先对该方法的运行环境进行介绍说明。本申请实施例提供的量子操作执行方法，其可以由经典计算机(如PC(Personal Computer，个人 计算机))执行实现，例如通过经典计算机执行相应的计算机程序以实现该方法；也可以在经典计算机和量子计算机的混合设备环境下执行，例如由经典计算机执行控制波形生成等步骤，而由量子计算机实现基于控制波形的量子操作执行等步骤。
在下述方法实施例中，为了便于说明，仅以各步骤的执行主体为计算机设备进行介绍说明。应当理解的是，该计算机设备可以是经典计算机，也可以包括经典计算机和量子计算机的混合执行环境，本申请实施例对此不作限定。
请参考图2，其示出了本申请一个实施例提供的量子操作执行方法的流程图。该方法各步骤的执行主体可以是计算机设备。该方法可以包括如下几个步骤：
步骤21，获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数。
上述与量子电路对应的n个未调度的量子操作，是量子电路中未被执行的部分或者全部量子操作。
步骤22，基于量子计算器件的拓扑结构，以及n个该未调度的量子操作进行操作调度，获得目标操作组；该目标操作组包含各个被调度的量子操作。
在本申请实施例中，量子操作的操作调度是指：确定在某个时间点上，在量子计算器件中并行执行的一个或者多个量子操作。
步骤23，在该量子计算器件上并行执行该目标操作组中包含的各个被调度的量子操作；该被调度的量子操作的控制波形是基于指定目标生成的；该指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；该区域间串扰是分属于不同的连通区域的量子比特之间的串扰；该连通区域是以是否执行量子操作，对该量子计算器件中的各个量子比特进行划分得到的。
在本申请实施例中，量子计算器件中的各个量子比特在某一时刻A可以分为两类，一类是在该时刻A执行量子操作的量子比特(可以多个量子操作并行执行)，另一类是时刻A未执行量子操作的量子比特；这两类量子比特在量子电路的拓扑结构中形成至少两个连通区域。
对于一个连通区域，该连通区域中全部量子比特的类型相同，并且，当该连通区域包含两个或者两个以上量子比特时，该连通区域中的任意一个量子比特与该连通区域中的至少一个其它量子比特相邻(两个量子比特相邻，是指两个量子比特之间存在边，或者说存在耦合)。
并且，对于量子计算器件中的相邻的两个量子比特，若在时刻A，这两个量子比特的类型不同，则这两个量子比特在时刻A分属于不同的连通区域。
其中，上述区域间串扰可以是上述连通区域间的ZZ串扰，或者，也可以是上述连通区域间的其他类型串扰。
综上所述，本申请实施例所示的方案，基于量子电路，以及量子计算器件的拓扑结构，进行量子操作的调度，得到被调度的量子操作，并在量子计算器件上执行被调度的量子操作，其中，执行的量子操作的波形，是在量子计算器件上保证量子操作不失真的情况下，使得区域间串扰最小化的控制波形；上述方案基于量子电路的拓扑结构对量子操作的执行顺序和控制波形进行优化即可以实现串扰抑制，不受量子操作的操作类型以及实现原理的限制，能够适用于任意类型和任意实现原理的量子操作，从而极大的提高了串扰抑制的适用性。
在本申请的一个实施例中，还提供一种量子操作的操作波形生成方法，该方法包括：获取被调度的量子操作；基于指定目标，获取该被调度的量子操作的控制波形函数的函数参数；该指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；该区域间串扰是分属于不同的连通区域的量子比特之间的串扰；该连通区域是在量子计算器件中，以包含的量子比特是否执行量子操作进行划分的；基于该函数参数生成该被调度的量子操作的控制波形。
本申请上述图2所示实施例在波形控制层面提出了一种量子操作的控制波形的优化方案，通过该方案得到的控制波形能够在实现量子操作的同时有效地抑制区域间串扰；在此基础上， 还进一步在量子电路层面提出一种基于量子电路的操作调度方案(也可以称为电路调度/量子电路调度)。该调度方案能够在实现最优抑制的同时保证量子电路执行的高并行度，从而最大程度地提高量子电路执行的保真度。
本申请所示的方案可以工作在软件层面，基于通用的量子比特控制模型，能够避免现有方案复杂的硬件组件与控制逻辑，从而更为简单、通用。本方案可应用于超导量子计算器件以提供抑制串扰的高保真度量子计算，亦可应用于改进量子内存，提高量子数据的保存时间。
请参考图3，其示出了本申请一个实施例提供的量子操作执行方法的流程图。该方法各步骤的执行主体可以是计算机设备。该方法可以包括如下几个步骤：
步骤301，获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数。
在本申请实施例中，当量子计算系统中存在待执行的量子计算任务时，计算机设备可以获取到与该量子计算任务对应的量子电路，进而获取到与量子电路对应的n个未调度的量子操作。
其中，上述未调度的量子操作，是指尚未被计算机设备调度在量子计算器件上执行的量子操作。
步骤302，基于n个未调度的量子操作获取可调度集合；该可调度集合中包含n个未调度的量子操作中可调度的量子操作。
在一个量子电路中，两个或者两个以上的量子操作之间可能会存在依赖关系，或者说是执行顺序关系；也就是说，一个量子操作A，需要在前一个量子操作B已经执行完成的情况下，才可以被调度执行，上述的量子操作B可以称为量子操作A的前置量子操作。
在一种可能的实现方式中，上述n个未调度的量子操作中可调度的量子操作，可以是量子电路未被调度执行的量子操作中，当前时刻可执行的量子操作；其中，一个量子操作可执行，可以是指量子电路中不存在与该量子操作对应的，未执行的前置量子操作。
步骤303，从该可调度集合中提取出候选操作组，并获取量子比特划分方案。
其中，该量子比特划分方案是基于该拓扑结构，按照指定划分方式得到的；该量子比特划分方案指示将该量子计算器件中的各个量子比特划分为两个量子比特集合，以在该量子计算器件上形成至少两个该连通区域。
在本申请实施例中，计算机设备可以基于可调度集合中的量子操作是否包含两比特量子操作，选择使用不同的方案来提取候选操作组，以及使用不同的方案来获取量子比特划分方案。下面分两个方面，对可调度集合中的量子操作是否包含两比特量子操作的量子比特划分方案进行介绍。
一)可调度集合中的各个量子操作为单比特量子操作。
在一种可能的实现方式中，响应于上述可调度集合中的各个量子操作为单比特量子操作，计算机设备将可调度集合获取为上述候选操作组。
当可调度集合中的各个量子操作均为单比特量子操作时，计算机设备不需要考虑是否有与同一个量子操作对应的两个比特被同时划分到两个集合的情况，只需要将可调度集合中的全部量子操作构成的操作组，获取为候选操作组。
其中，若候选操作组是可调度集合中包含的量子操作时单比特量子操作时提取的操作组，则计算机设备可以基于该拓扑结构，按照第二指定划分方式获得目标奇度顶点配对方案；然后，在拓扑图中去除与目标奇度顶点配对方案对应的边，获得去边后的拓扑图；再对去边后的拓扑图进行顶点二着色，获得上述量子比特划分方案。
在一种可能的实现方式中，上述基于该拓扑结构，按照第二指定划分方式获得目标奇度顶点配对方案，包括：
获取完全图，该完全图中的顶点为目标对偶图中的奇度顶点；该目标对偶图是拓扑图的对偶图，该拓扑图是该量子计算器件的拓扑结构的平面图；
在该完全图中确定配对的各个奇度顶点对；
获取各个该奇度顶点对的至少一种奇度顶点配对方案；该奇度顶点配对方案中包含各个该奇度顶点对分别在该目标对偶图中的一条路径；
获取至少一种该奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种该奇度顶点配对方案各自的不可抑制的串扰总数；该不可抑制的串扰总数由该奇度顶点配对方案中的路径对应在该拓扑图中的边数进行表征；该最大区域量子比特数由该拓扑图除去割集之后的最大连通区域中的顶点数进行表征，该割集是该拓扑图中除去该奇度顶点配对方案中的路径对应在该拓扑图中的边之后剩余的边组成的集合；
基于至少一种该奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种该奇度顶点配对方案各自的不可抑制的串扰总数，获取至少一种该奇度顶点配对方案的串扰抑制指数；
将对应该串扰抑制指数最小的该奇度顶点配对方案，获取为目标奇度顶点配对方案。
在一种可能的实现方式中，上述获取各个该奇度顶点对的至少一种奇度顶点配对方案，包括：
获取各个该奇度顶点对各自在该完全图中的前k短路径；k≥1，且k为整数；
对各个该奇度顶点对各自在该完全图中的前k短路径进行组合，获得至少一种该奇度顶点配对方案。
在一种可能的实现方式中，上述串扰抑制指数为：αN Q+N C；
其中，N Q表示该最大区域量子比特数，N C表示该不可抑制的串扰总数，α表示N Q和N C的重要程度。
结合上述内容的介绍，当可调度集合中的各个量子操作为单比特量子操作时，计算机设备不需要考虑是否有与同一个量子操作对应的两个比特被同时划分到两个集合的情况，只需要将可调度集合中的全部量子操作构成的操作组，获取为候选操作组，而后按照第二指定划分方式，得到最终的目标奇度顶点配对方案，再基于目标奇度顶点配对方案得到量子比特划分方案。
其中，对于第二指定划分方式，我们旨在通过选择性地在一些量子比特上施加恒等操作来最大程度抑制ZZ串扰。请参考图4，其示出了本申请实施例涉及的一种ZZ串扰抑制示意图。其中，图4展示了一个在9量子计算器件上抑制ZZ串扰的例子。在这个例子中，通过在黑色顶点上施加恒等量子操作，量子计算器件上所有的ZZ串扰均被抑制，本申请中，可以称这种情况为完全抑制。
其中，通过在量子比特上施加量子操作，将每个量子比特划分在单独的区域内，使得量子计算器件上所有的ZZ串扰均被抑制，则称该量子计算器件存在完全抑制方案。
其中，若一个量子计算器件的拓扑图是二分图，则该量子计算器件存在完全抑制方案。
对于不存在完全抑制的拓扑结构，至少存在一个区域，其包含两个或者两个以上的量子比特，这两个或者两个以上的量子比特组成的连通区域内的串扰不被抑制。对于这种情况，需要关注两个指标：最大区域的量子比特数和不可被抑制的ZZ串扰总个数；这两个指标相互制约。请参考图5，其示出了本申请实施例涉及的一种最大区域的量子比特数和不可被抑制的ZZ串扰总个数相互制约的示意图。
为了表征这种制约，本申请提出了“最优抑制”概念：
通过在量子比特上施加量子操作，将量子计算器件中的量子比特划分在若干连通区域内，记最大连通区域的量子比特数为N Q，不可被抑制的ZZ串扰总个数为N C，给定表征二者重要程度的系数α，若某种抑制方案使得αN Q+N C最小，则称该量子计算器件存在最优抑制方案。
例如，在图5所示的拓扑结构中，图5中的(a)部分所示的方案为最优抑制方案时，对应α＝0，图5中的(b)部分所示的方案为最优抑制方案时，对应α＝1.5，图5中的(c)部分所示的方案为最优抑制方案时，对应α＝2。
为了求解最优抑制方案，可以将其转化为图的割问题：
图G＝(V,E)的割C＝(S,T)，是将图的顶点集V划分成两个不相交的集合S和T的一种划分方式，其对应的割集E C是图的边集E中两端点分属S和T的边组成的集合，即E C＝{(u,v)|u∈S,V∈T}。
寻找最优抑制方案的等价问题：给定图G＝(V,E)和重要度系数α，寻找一个割C＝(S,T)，使得αN Q+N C最小，其中N Q为G移除割集E C后的最大连通分量的顶点数，N C为G移除割集E C后剩下的边的总数。
通过割导出的两个顶点集S和T分别对应“施加波形的顶点集”和“不施加波形的顶点集”，与割集对应的耦合跨越不同区域，因此与割集对应的耦合介导的串扰可被抑制，与之相反，对于与割集的补对应的耦合，由于它们相连的两个量子比特属于同一连通区域内，因此与割集的补对应的耦合介导的串扰不可被抑制。
在给出上述图问题的解后，只需要对“施加波形的顶点集”中的量子比特施加量子操作，即可实现最优抑制。例如图4中，黑白两色顶点分别构成了顶点集S和T，虚线边含于割集内，故这些耦合介导的串扰可被抑制，而实线边不属于割集，其介导的串扰不可被抑制。
解决上述图的割问题是困难的：考虑α＝0的情况，需要找到一个割，使得除去割集后剩下的边最少，即割集包含的边最多，这是最大割问题，属于非确定性多项式时间完全(NP-Complete)问题，不存在普适的多项式算法。因此，本申请考虑采用启发式方法进行求解。此外，考虑到大多数拓扑量子纠错码的拓扑结构均为平面图结构，本申请针对平面图设计本申请的方案。本申请所示的方案基于以下概念：
奇度顶点配对：当移除一个边集D后剩下的图中没有奇数度的顶点，则称该边集为奇度顶点配对。任何奇度顶点配对均包含图中所有奇度顶点，因为任何图中奇度顶点的个数均为偶数，因而称边集D为配对。
对偶图：平面图存在对偶图，对偶图的顶点对应平面图的面，当平面图中两个面相邻时，对偶图中对应顶点之间连边，这样对偶图的边就与平面图的边一一对应。平面图G的对偶图记为G *，平面图的边(u,v)对应对偶图的边(u,v) *。
定理：仅当图G的一个边集D的补
Figure PCTCN2021117519-appb-000002
在对偶图G *中对应的边集
Figure PCTCN2021117519-appb-000003
是对偶图G *的一个奇度顶点配对时，图G的一个边集D含于一个割集E C。
例如，请参考图6，其示出了一种拓扑图及其对偶图。其中，图6给出了图5所示例子的拓扑图及其对偶图，图中边界上只有一个顶点的边均与s相连对偶图中的奇度顶点为i和j。图5中的(a)部分中割集的补为{(10，11)，(4，11)，(11，12)}，对应对偶图中{(c，i)，(c，d)，(d，j)}是对偶图的一个奇度顶点配对；类似地，图5中的(b)部分割集的补以及对应对偶图的奇度顶点配对为：{(10，11)，(11，12)，(3，4)，(4，5)→(c，i)，(d，j)，(c，s)，(d，s)}。
引理：图G的一个边集D含于一个割集E C，则移除割集E C剩下的边
Figure PCTCN2021117519-appb-000004
根据上述定理及引理，在拓扑图中寻找割的问题，可转化为在对偶图中寻找奇度顶点配对
Figure PCTCN2021117519-appb-000005
的问题。考虑到奇度顶点配对需要包含所有奇度顶点，则最简单的奇度顶点配对仅仅包含若干简单路径，每条路径连接两个奇度顶点，且不同路径连接的奇度顶点各异(如图6中{(c，i)，(c，d)，(d，j)}为一条连接奇度顶点i和j的简单路径)。此外，由于拓扑图中移除割集剩下的边
Figure PCTCN2021117519-appb-000006
因而可以为上述每条路径选取最短路，这样试图最小化
Figure PCTCN2021117519-appb-000007
也就是最小化
Figure PCTCN2021117519-appb-000008
这可以作为求解最优抑制问题的起点。为了综合考虑最大连通分量的顶点数N Q，本方案可以对最短路进行松弛：通过考虑前k短路，寻找最优抑制问题的解。请参考图7，其示出了本申请实施例涉及的最优抑制求解示意图，本申请所示的最优抑制求解算法分为三个步骤。
步骤一：顶点配对。
构造以对偶图中奇度顶点为顶点的完全图，边(u,v)的边权为M＝d(u,v)，d(u,v)是u,v 间最短路长度，M＝1+max{d(u,v)|u,v是对偶图中的奇度顶点}。在完全图上采用最大匹配算法确定配对方案，这样，在相互匹配的顶点间采用最短路得到的奇度顶点匹配所含路径最少，可作为求解问题的起点。例如，针对图11，构造以顶点i和j为顶点的完全图，(i,j)边权为最短路径长度(1+3)-3＝1。由于只有两个点，因而最大匹配即为{(i,j)}。
步骤二：路径松弛。
对于每个匹配的顶点对，依次尝试其前k短路，对于每次尝试，求得N Q和N C，计算αN Q+N C，求得问题的解。例如，i、j间最短路为(1)i→c→d→j，对应的N Q＝4,N C＝3，考虑其前3短路，有(2)i→c→s→d→j，(3)i→c→s→l→k→j，根据α的不同，会得到不同的解。
步骤三：导出割。
根据步骤二得到的奇度顶点配对，在拓扑图中去除与奇度顶点配对对应的对偶边，剩下的图是二分图，故通过顶点二着色可导出割C＝(S,T)。例如，步骤二得到的三种方案(1)、(2)、(3)依次对应图11中的(a)、(b)、(c)。
二)可调度集合中的各个量子操作包含两比特量子操作。
在一种可能的实现方式中，响应于该可调度集合中包含两比特量子操作，获取该可调度集合中的各个两比特量子操作，得到两比特操作集合；响应于该两比特操作集合中包含3个或者3个以上操作，基于该两比特操作集合中，距离最近的两个量子操作构建两个操作组；基于该两比特操作集合中，除了该两个量子操作之外的其它量子操作与该两个操作组之间的距离，执行i次操作添加，i大于等于1，且i为整数；基于该i次操作添加的结果，获取该候选操作组。
在本申请实施例中，当可调度集合中包含两比特量子操作时，计算机设备可以先对其中的两比特量子操作进行调度，也就是以两比特操作为主设计量子比特划分方案。
为了尽可能的提高量子操作的并行度，计算机设备可以选取同时执行不会降低抑制效果的操作。在量子计算器件中，距离较近的两个量子操作同时执行时，通常会降低串扰抑制效果，而距离较远的两个量子操作同时执行，则不会对串扰抑制效果产生较大的影响。因此，在本申请实施例中，当两比特操作集合中包含3个或者3个以上操作时，计算机设备可以首先选取距离最近的两个两比特量子操作，将其分在不同的组，以确保两者不会同时执行，而后基于组外的操作到对应的操作组之间的距离，逐步扩充这两个组的规模，以在保证串扰抑制效果的前提下，获取到具有尽可能大的并行度的候选操作组。
在一种可能的实现方式中，基于该两比特操作集合中，除了该两个量子操作之外的其它量子操作与该两个操作组之间的距离，执行i次操作添加，包括：
在第j次操作添加过程中，获取该两比特操作集合中的该其它量子操作分别与该两个操作组之间的距离；1≤j≤i，且j为整数；将与最大距离对应的指定量子操作，添加入与该最大距离对应的指定操作组；该最大距离是该其它量子操作分别与该两个操作组之间的距离中的最大值；基于该拓扑结构以及该指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案；该目标奇度顶点配对方案包括目标对偶图中的各个奇度顶点对之间的路径，且该目标奇度顶点配对方案用于指示指定操作组的该量子比特划分方案；该目标对偶图是拓扑图的对偶图，该拓扑图是该拓扑结构的平面图；响应于该目标奇度顶点配对方案满足串扰抑制要求，将该指定量子操作从该两比特操作集合中删除；响应于删除该指定量子操作之后的该其它量子操作的数量不为0，执行下一次操作添加过程。
在一种可能的实现方式中，该基于该至少一次操作添加的结果，获取该候选操作组，包括：
响应于该第i次操作添加后的该其它量子操作的数量为0，或者，响应于该第i次操作添加过程中得到的该目标奇度顶点配对方案不满足该串扰抑制要求，将该第i次操作添加后的该两个操作组中，包含操作数量最多的操作组获取为该候选操作组。
在一种可能的实现方式中，该在第j次操作添加过程中，获取该两比特操作集合中的该其它量子操作分别与该两个操作组之间的距离，包括：
在第j次操作添加过程中，获取第一量子操作与第一操作组中已有的各个量子操作之间的操作距离；该操作距离用于指示与两个两比特操作对应的量子比特在该拓扑结构中的最短路径长度之和；该第一量子操作是该其它量子操作中的任意一个，该第一操作组是该两个操作组中的任意一个；
基于该第一量子操作与该第一操作组中已有的各个量子操作之间的操作距离，获取该第一量子操作与该第一操作组之间的距离。
在本申请实施例中，对于两个两比特量子操作a＝(a 1,a 2)和b＝(b 1,b 2)，两者间的距离定义为D(a,b)＝∑ i∑ jd(a i,b j)，其中，d(a i,b j)表示量子比特a i和b j之间的最短路长度。操作a＝(a 1,a 2)和一组操作G的距离定义为：
Figure PCTCN2021117519-appb-000009
由于量子计算器件的拓扑结构可以通过拓扑图来表示，而与操作组中的操作对应的量子比特，对应的就是图中的顶点，量子比特之间的耦合关系，对应的就是图中的边；因此，在本申请实施例中，计算机设备可以通过在拓扑图的对偶图中寻找奇度顶点配对方案的方式，来搜索满足串扰抑制要求的量子比特划分方案。而在逐步扩充两个操作组，以获取到具有尽可能大的并行度的候选操作组的过程中，每次向一个操作组中添加一个两比特量子操作之后，即基于添加操作后的操作组中的两比特量子操作，结合量子计算器件的拓扑结构获取目标奇度顶点配对方案，并判断获取到的目标奇度顶点配对方案是否满足串扰抑制要求，如果满足，则继续添加，如果不满足，则需要停止添加；当不满足串扰抑制要求时触发停止添加，或者，不存在需要添加的两比特量子操作时，计算机设备可以将当前两个操作组中包含量子操作最多的一个作为候选操作组；可选的，如果当前两个操作组中包含的量子操作数量相同，则可以随机选择一个作为候选操作组。
在一种可能的实现方式中，该基于该拓扑结构以及该指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案，包括：
在该目标对偶图中删除与该指定操作组中的各个量子操作对应的边；获取以该目标对偶图中的奇度顶点为顶点的完全图；在该完全图中确定各个该奇度顶点对；获取各个该奇度顶点对的至少一种奇度顶点配对方案；该奇度顶点配对方案中包含各个该奇度顶点对分别在该目标对偶图中的一条路径；在至少一种该奇度顶点配对方案中添加该指定操作组中的各个量子操作对应在该目标对偶图中的边；从至少一种该奇度顶点配对方案中，筛除与该两比特操作对应的量子比特不属于同一个连通区域的奇度顶点配对方案，获得筛除后的各个该奇度顶点配对方案；获取筛除后的各个该奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个该奇度顶点配对方案各自的不可抑制的串扰总数；该不可抑制的串扰总数由该奇度顶点配对方案中的路径对应在该拓扑图中的边数进行表征；该最大区域量子比特数由该拓扑图除去割集之后的最大连通区域中的顶点数进行表征，该割集是该拓扑图中除去该奇度顶点配对方案中的路径对应在该拓扑图中的边之后剩余的边组成的集合；基于筛除后的各个该奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个该奇度顶点配对方案各自的不可抑制的串扰总数，获取筛除后的各个该奇度顶点配对方案的串扰抑制指数；将对应该串扰抑制指数最小的该奇度顶点配对方案，获取为目标奇度顶点配对方案。
其中，在可调度集合中包含两比特量子操作的情况下，上述基于目标奇度顶点配对方案，获取量子比特划分方案的过程包括：在该拓扑图中去除与目标奇度顶点配对方案对应的边，获得去边后的该拓扑图；对去边后的该拓扑图进行顶点二着色，获得量子比特划分方案(类似上述可调度集合中的各个量子操作为单比特量子操作的情况下，最优抑制算法的步骤三中的导出割的步骤)。
对于可调度集合中包含两比特量子操作的情况，由于与两比特量子操作对应的量子比特 为两个，因此，如果直接按照上述第二指定划分方式进行量子比特的划分，则可能会将与一个两比特量子操作对应的两个量子比特划分到不同的集合中。进一步地，若同时执行多个量子操作，原则上这些操作涉及的量子比特需要属于同一个集合，但第二指定划分方式亦不能保证这一点。对此，本申请实施例在上述第二指定划分方式的基础上进行改进，以适用于在指定量子比特上进行指定量子操作时的量子比特划分场景。该改进后的划分方式即为上述第一指定划分方式。
上述第一指定划分方式对应的情况可视为带有约束的最优抑制问题：要求指定的量子操作所涉及的量子比特在割中属于同一集合。本方案可以采用“先删边，后加边，额外检查”的策略将带有约束的问题转为无约束问题，采用上述第二指定划分方式给出的方法求解。记操作涉及的比特集合为Q，要求Q中的量子比特在割中属于同一集合。
先删边：在对偶图中删去边{(u,v) *|(u,v)∈E且u,v∈Q}。
后加边：在步骤二给出删边后的图的奇度顶点配对后，将方才删去的边加入到奇度顶点配对中。
额外检查：上述两个步骤在某些情况下无法确保Q中的量子比特均在同一集合内，因而在步骤二中，每给出一个割候选时，均需要额外检查该候选是否满足同一集合的条件，如果不满足则放弃该候选。
例如，请参考图8，其示出了本申请实施例涉及的最优抑制问题求解示例图。假设需要在图8中的量子比特11、28上执行两比特操作，先在对偶图中删去(11,28) *＝(i,j)，使用第二指定划分方式给出的最优抑制算法得到奇度顶点配对i→c→d→j，而后加入(i,j)，根据加入(i,j)后的奇度顶点配对导出割，可以检查这个方案满足11、28同在一个集合的条件，因而可作为一个解。
给定拓扑图G＝(V,E)及顶点集
Figure PCTCN2021117519-appb-000010
边集{(u,v)|(u,v)∈E且u,v∈Q}构成了拓扑图G的若干连通分量C 1,C 2,…,C n，上述“先删边，再加边”策略能够确保同一连通分量内的顶点在导出的割中处于同一集合。
根据上述结论，单个两比特量子操作涉及的边集只构成一个连通分量(例如图8中的例子)，本方案的策略能给出合法解。对于多个两比特量子操作，其涉及的边集可能构成多个连通分量，此情形需要“额外检查”来确保不同连通分量的量子比特同属一个集合。
本方案将完整的算法总结在表1中。其中遍历由前k短路组成的奇度顶点配对，可使用包括穷尽搜索(Exhaustive Search)、集束搜索(Beam Search)在内的搜索算法。
表1
Figure PCTCN2021117519-appb-000011
Figure PCTCN2021117519-appb-000012
在一种可能的实现方式中，该串扰抑制要求包括：
该目标奇度顶点配对方案的最大区域量子比特数小于比特数阈值；
以及，
该目标奇度顶点配对方案的不可抑制的串扰总数小于串扰总数阈值。
在本申请实施例中，在调度这些两比特量子操作时，需要在满足串扰抑制要求的情况下尽可能地提高执行并行度。在本申请中，串扰抑制要求可以是对最大区域的量子比特数N Q和不可被抑制的ZZ串扰总个数N C的综合限制，例如要求二者各自小于某些阈值。
其中，上述算法1对应的是确定一个包含两比特量子操作的操作组，且得到的目标奇度顶点配对方案满足串扰抑制要求的情况下，输出与该操作组对应的量子比特划分方案的情况。而在本申请实施例所示的方案中，对于计算机设备首先需要确定出满足串扰抑制要求的候选操作组，也就是说，在上述逐步扩充两个操作组的过程中，每次向一个操作组中添加一个两比特量子操作之后，即基于添加操作后的操作组中的两比特量子操作，运行上述算法1中的顶点配对和路径松弛步骤，得到对应的目标奇度顶点配对方案，然后通过该目标奇度顶点配对方案，确定当前的操作组是否满足串扰抑制要求。
在一个示例性的方案中，当两比特操作集合中只包含1个量子操作时，计算机设备可以将该量子操作获取为候选操作组。
在另一个示例性的方案中，当两比特操作集合中包含2个量子操作时，计算机设备可以先将这2个量子操作加入同一个操作组，并确定收满足抑制要求，若是，则将这2个量子操作组成的操作组作为候选操作组，否则，将这2个量子操作中任意一个操作组成的操作组，作为候选操作组。
在一种可能的实现方式中，若候选操作组是可调度集合中包含两比特量子操作时提取的操作组，则计算机设备可以基于上述拓扑结构，按照第一指定划分方式获得该目标奇度顶点配对方案，然后再基于目标奇度顶点配对方案，获取量子比特划分方案(即上述基于候选操作组重新执行上述算法1)。
在另一种可能的实现方式中，若候选操作组是可调度集合中包含两比特量子操作时提取的操作组，则计算机设备也可以直接获取上述候选操作组提取过程中，按照上述第一指定划分方式获取的目标奇度顶点配对方案，然后再基于目标奇度顶点配对方案，获取量子比特划分方案。
本申请实施例所示的方案，对于执行量子电路来说，需要选择何时执行哪些操作，即对量子电路进行调度，不同的调度方案会导致串扰抑制效果和执行并行度的不同。本申请涉及的调度方法综合考虑这两种因素，在实现最优抑制的同时尽可能地提高电路执行的并行度。本申请涉及的调度算法流程可以如表2所示。
表2
Figure PCTCN2021117519-appb-000013
Figure PCTCN2021117519-appb-000014
请参考图9，其示出了本申请实施例涉及的量子电路示意图。其中，图9中的(a)部分示出了量子计算器件的拓扑结构，图9中的(b)部分示出了待执行的量子电路。本申请以执行图9所示的量子电路为例解释上述表2所示的算法。给定量子电路，构造可调度操作集合(对应表2算法中的行2)，当且仅当根据数据依赖，其前序依赖的操作均已被执行时，可以认为一个操作是可以被调度执行的。例如，图9中，未执行任何操作时，可调度操作集合为{H 1,H 2,…,H 8}，当所有H操作执行后，可调度操作集合为{CNOT 1,4,CNOT 2,5,CNOT 3,6,X 8}。然后分类讨论可调度操作集合中操作的类型(行3、6)。如果只有单比特操作，依据以下结论设计执行方案：
对于一组可调度的单比特操作，可以以最优抑制方式在至多两个时间步内执行这组操作。也就是，采用第二指定划分方式对应的最优抑制算法，可将量子比特分为S,T两个集合，相应地这些单比特操作也被分在这两个集合中，则可以在第一个时间步内在S上施加波形，第二个时间步内在T上施加波形，从而在至多两个时间步内执行完毕。
对于本申请所示的电路调度算法，执行含有操作最多的集合(对应表2算法中的行4、5)，而对于另一个集合中的操作，可以留待后续调度。通过这种方式，在最好的抑制效果下实现了最高的并行度。
例如：请参考图10，其示出了本申请实施例涉及的抑制方案示意图。对图15中的拓扑而言，本申请涉及的最优抑制算法给出图10的量子比特划分方案，黑色顶点含有的H操作个数为4，白色顶点含有的操作只有3个，因而选取黑色顶点集合执行。
另一种情况，如果可执行操作集合含有两比特操作，那么通过本申请所示的方案中，对应表2算法中的行7，以两比特量子操作为主涉及量子比特划分方案。
例如，对于图9中的所有CNOT操作，D(CNOT 1,4,CNOT 2,5)＝D(CNOT 2,5,CNOT 3,6)＝6，D(CNOT 1,4,CNOT 3,6)＝10。针对图9中的CNOT操作，请参考图11，其示出了本申请实施例涉及的不同执行方案的距离和抑制效果差异示意图。
对于两比特量子操作，本申请首先选取距离最近的两个量子操作，将其分在不同的组，以确保两者不会同时执行；而后逐步扩充这两个组的规模：通过依次选取距离最远的操作，直到不满足抑制要求为止。例如，对于图9中的CNOT操作，选取距离最近的CNOT 1,4,CNOT 2,5并分为两组，A＝{CNOT 1,4}，B＝{CNOT 2,5}，对于剩下的CNOT 3,6，其距A组比B组远，因而将其加入A组，最终得到A＝{CNOT 1,4,CNOT 3,6}，B＝{CNOT 2,5}。
对于一组可执行的两比特量子操作，多次调用算法3，直到该组操作均被调度，如果最终这组操作被分在了K个时间步执行，则这组操作中距离前K小的操作一定分属不同时间步。也就是说，在距离衡量抑制效果的情形下，执行时间的增加(并行度的减少，退相干错误的增加)能带来抑制效果的提升，因为每增加一个时间步，就会有两个距离最近的操作被分开执行。
在给出上述A,B组后，本方案可以选择操作最多的组执行。例如，对于图9的CNOT操作，选取组A＝{CNOT 1,4,CNOT 3,6}，此时的量子比特划分方案为图11中的(b)部分所示，根据可执行操作集合{CNOT 1,4,CNOT 2,5,CNOT 3,6,X 8}，最终执行CNOT 1,4,CNOT 3,6,X 8。
步骤304，基于候选操作组以及量子比特划分方案，获取目标操作组。
在一种可能的实现方式中，基于候选操作组以及该量子比特划分方案，获取该目标操作组，包括：
基于该量子比特划分方案，将该量子计算器件中的各个量子比特划分为两个量子比特集合；将该候选操作组划分为与该两个量子比特集合分别对应的子操作组；与该子操作组中的量子操作对应的量子比特，处于与该子操作组对应的该量子比特集合内；将目标子操作组中的量子操作以及填充操作，合并为该目标操作组；该目标子操作组是与该两个量子比特集合分别对应的该子操作组中，包含量子操作数量最多的子操作组；与该填充操作是填充量子比特对应的恒等量子操作，该填充量子比特是与该目标子操作组对应的量子比特集合中，除了与该目标子操作组对应的量子比特之外的其它量子比特。
在本申请实施例中，对于获取到的量子比特划分方案对应的两个量子比特集合，计算机设备可以将两个量子比特集合中，对应在量子电路中的操作较多的一个量子比特集合确定为执行操作的目标量子比特集合，对于该目标量子比特集合中除了与量子电路中的操作对应的量子比特之外的其它量子比特，可以在这些其它量子比特上填充恒等量子操作，以实现最优的串扰抑制效果。
在一种可能的实现方式中，基于候选操作组以及量子比特划分方案，获取该目标操作组之后，还包括：
响应于在该目标操作组之外，还存在m个未调度的量子操作，基于该拓扑结构，以及m个未调度的量子操作进行操作调度，获得新的该目标操作组；m大于等于1，且m为整数；
在该量子计算器件上并行执行新的该目标操作组中包含的各个被调度的量子操作。
在本申请实施例中，计算机设备每获取到一个时间步上的目标操作组之后，可以判断量子电路中是否还存在剩余的未被调度的量子操作，若是，则基于剩余的未被调度的量子操作，重新执行上述步骤301至步骤304，得到下一个时间步上的目标操作组，计算机设备迭代执行上述步骤301至步骤304，直至量子电路中的量子操作全部被调度完成。
步骤305，在该量子计算器件上并行执行该目标操作组中包含的各个被调度的量子操作。
其中，该被调度的量子操作的控制波形是基于指定目标生成的；该指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；该区域间串扰是分属于不同的连通区域的量子比特之间的串扰；该连通区域是以是否执行量子操作，对该量子计算器件中的各个量子比特进行划分得到的。
在本申请实施例中，计算机设备对于要执行的量子操作，在控制量子操作不失真的情况下，优化量子操作的控制波形，使得区域间串扰被最小化。
在一种可能的实现方式中，该指定目标是基于量子操作在控制波形作用下的平均操作保真度，以及该区域间串扰获得的单标量目标。
在一种可能的实现方式中，该单标量目标的公式为：
Figure PCTCN2021117519-appb-000015
其中，L为该单标量目标，U(T)表示对应的量子操作在控制波形作用下的的酉变换，U Target(T)表示对应的量子操作的目标酉变换，F(U(T),U Target(T))表示U(T)与U Target(T)之间的平均操作保真度；
Figure PCTCN2021117519-appb-000016
表示在该区域间串扰影响下的封闭量子系统的演化。
在一种可能的实现方式中，计算机设备基于该单标量目标，对目标量子操作的控制波形函数的函数参数进行R次迭代更新；R≥2且R为整数；该目标量子操作是各个该可调度量子操作以及该恒等量子操作中的任意一个；
基于迭代更新后的该函数参数生成该目标量子操作的控制波形。
在本申请实施例中，计算机设备可以基于上述单标量目标，对待执行的量子操作的控制波形函数的参数进行多轮迭代，每一轮迭代过程中，在上一轮迭代的基础上，对控制波形函数的参数进行更新，直至达到迭代次数，或者参数的变化小于某一阈值。
在一种可能的实现方式中，该基于该单标量目标，对目标量子操作的控制波形函数的函数参数进行R次迭代更新，包括：
获取第r次迭代过程中的第一系统演化，该第一系统演化是在第r个控制波形影响下的封闭量子系统的演化；2≤r≤R，且r为整数；该第r个控制波形是与第r-1次迭代更新后的该函数参数对应的控制波形；
基于该第一系统演化获取第二系统演化，该第二系统演化是第r次迭代过程中的该区域间串扰影响下的封闭量子系统的演化；
基于该第二系统演化，以及该目标量子操作在该第r个控制波形作用下的平均操作保真度，获取第r次迭代过程中的该单标量目标；
基于第r次迭代过程中的该单标量目标对第r-1次迭代更新后的该函数参数进行更新，获得第r次迭代更新后的该函数参数。
在本申请实施例中，上述区域间串扰可以是区域间的ZZ串扰，或者，也可以是其他类型串扰。
以上述区域间串扰为ZZ串扰为例，本申请实施例中的波形优化方案旨在给定量子操作，设计能够实现量子操作同时抑制ZZ串扰的波形。本方案首先考虑只有一个单比特操作的区域，然后考虑只有一个两比特操作的区域，最后考虑由多个这两种操作组成的区域。
1)只有一个单比特操作的区域。
请参考图12，其示出了本申请实施例涉及的一种单比特操作示意图。如图12所示，本方案需要在量子比特q上实现单比特操作的同时，抑制其与周围量子比特间的ZZ串扰。
该区域的有效哈密顿量可以写作：
Figure PCTCN2021117519-appb-000017
其中，Ω x,y(t)表示控制波形，
Figure PCTCN2021117519-appb-000018
表示量子比特q上的泡利X/Y/Z操作，恒等操作省略不写，
Figure PCTCN2021117519-appb-000019
表示量子比特q与i之间的ZZ串扰，λ i表示其强度。
取λ＝∑ iλ i，上面的哈密顿量可整理为：
H(t)＝H Ctrl(t)+λH Xtalk；
其中，
Figure PCTCN2021117519-appb-000020
Figure PCTCN2021117519-appb-000021
本方案可以为Ω x(t)与Ω y(t)选取适当的波形，以抑制ZZ串扰H Xtalk的影响。
2)只有一个两比特操作的区域。
请参考图13，其示出了本申请实施例涉及的两比特操作示意图。如图13所示，本方案需要在量子比特p,q上实现两比特操作的同时抑制其与周围量子比特间的ZZ串扰。
该区域的有效哈密顿量可以写作：
Figure PCTCN2021117519-appb-000022
其中，λ＝∑ iλ i+∑ jλ j，λ′＝λ pq。H Coupiing为量子比特的耦合形式，例如，
Figure PCTCN2021117519-appb-000023
Figure PCTCN2021117519-appb-000024
可实现CNOT操作，
Figure PCTCN2021117519-appb-000025
可实现iSWAP操作。通过为Ω(t)选取适当的波形，以抑制跨区域的ZZ串扰H Xtalk的影响。然而这种方法要求硬件能够对两比特耦合H Coupling具有较强的调节能力，请参考图14，其示出了本申请实施例涉及的单比特波形示意图，如果硬件无法提供这种能力，可采用如图14所示的单比特波形进行辅助。
如图14所示，波形A、C是施加在量子比特p上的单比特控制波形；波形B、D是施加在量子比特q上的单比特控制波形；波形E为施加在耦合项H Coupling上的波形。
描述上述控制波形的哈密顿量为：
Figure PCTCN2021117519-appb-000026
在优化时，只优化波形A～D，而对E直接采用原本用于实现两比特操作的波形。通过这种方式，保证波形E是硬件可实现的，同时引入波形A～D来抑制ZZ串扰。
3)波形优化。
由上面的介绍可以看出，无论是单比特操作还是两比特操作情形，哈密顿量部分可写作：
H(t)＝H Ctrl(t)+λH Xtalk；
其中，H Ctrl(t)是可控制部分，用于实现单/两比特操作，H Xtalk是要抑制的跨区域串扰，λ是串扰强度。首先给出以下结论：
封闭量子系统按照H(t)＝H Ctrl(t)+λH Xtalk进行演化，演化对应的酉变换可写作：
U(t)＝U Ctrl(t)U Xtalk(t)；
其中，U Ctrl(t)由
Figure PCTCN2021117519-appb-000027
定义，表示控制波形下系统的演化。
U Xtalk(t)表示串扰影响下系统的演化。则U Xtalk(t)可写作串扰强度λ的表达式：
Figure PCTCN2021117519-appb-000028
记
Figure PCTCN2021117519-appb-000029
则
Figure PCTCN2021117519-appb-000030
由上述结论可知，当
Figure PCTCN2021117519-appb-000031
均为0时，
Figure PCTCN2021117519-appb-000032
Figure PCTCN2021117519-appb-000033
即彻底消除了串扰的影响。在本申请的一种可能的实现方案中，可以选择消除λ前n阶的影响，此时，可以将n阶串扰抑制问题总结为以下多目标优化问题：
Figure PCTCN2021117519-appb-000034
subject to U(T)＝U Target(T)；
其中，T表示操作持续的时间，U Target(T)表示要实现的目标操作。
本方案进一步将其转化为单标量目标多参数优化问题，比如，可以采用梯度下降方法求解。该过程如下：
首先，为波形Ω(t)选取一种带参数的函数形式。例如，选用N个不同频率的余弦函数之和的形式：
Figure PCTCN2021117519-appb-000035
其中，A＝(A 1,A 2,…,A N)为待优化参数，T为波形总时间。
其次，构造如下的单标量目标：
Figure PCTCN2021117519-appb-000036
其中，F(U,V)表示操作U和V之间的平均操作保真度(Average Gate Fidelity)，
Figure PCTCN2021117519-appb-000037
Figure PCTCN2021117519-appb-000038
为矩阵X的F-范数(Frobenius-范数)，w i为权重系数，通常取值在10 -3～10 -5。
在求解时，本方案可以通过求解薛定谔方程获得每个时刻的U Ctrl(t)，进而采用数值积分的方法求得
Figure PCTCN2021117519-appb-000039
最终求得L。通过数值求导的方法求得
Figure PCTCN2021117519-appb-000040
采用梯度下降方法更新参数A。
4)由多个单/两比特操作组成的区域。
当区域由多个单/两比特操作组成时，类似上面的情形，区域的有效哈密顿量可以写作：
H(t)＝H Ctrl(t)+λH Xtalk+λ′H Inner-Xtalk；
其中，λ表示跨区域的ZZ串扰的等效强度，λ′表示区域内ZZ串扰的等效强度。
在这种情况下，为了抑制跨区域的串扰，无需重新优化波形，只需要将按照上面方法优化出的波形应用在对应的操作上即可。例如，请参考图15，其示出了一种单比特操作和两比特操作的示意图。其中，图15展示了一个由一个单比特操作(3)和一个两比特操作(1、2)组成的区域及区域周围的耦合。该区域的有效哈密顿量可写作：
Figure PCTCN2021117519-appb-000041
对比之前情形的哈密顿量，可以得到，在量子比特3上应用优化的单比特操作波形
Figure PCTCN2021117519-appb-000042
可以抑制
Figure PCTCN2021117519-appb-000043
串扰，在1、2上应用优化的两比特操作波形，可以抑制1-a、1-b、2-c、2-e串扰，从而抑制所有跨区域的串扰。也就是说，独立地应用优化过的波形即可抑制所有跨区域的串扰，这一特点保证了本申请所示方案的可扩展性：只需对只有一个单/两比特操作的区域进行优化，即可扩展到任意形状的区域上。
本申请后续内容通过计算机模拟仿真实验来说明本申请所示方案带来的改进。首先对比分析相关技术中的波形和使用本方案涉及的优化后的波形对ZZ串扰的抑制效果，然后对比分析我们的方案在量子计算任务上对相关技术方案的提升。
一、波形对ZZ串扰的抑制效果。
1)单比特波形。
相关技术所示的方案通常采用高斯波形实现单比特操作，本方案采用N项余弦波形叠加实现单比特操作，取N＝5。
为了刻画单比特波形对ZZ串扰的抑制效果，请参考图16，其示出了本申请实施例涉及的一种单比特波形拓扑图。在图16所示的拓扑中，在量子比特1上施加波形实现特定操作，如果ZZ串扰被抑制，则量子比特2的状态在施加波形前后应该保持一致。
本申请中，可采用施加波形后量子比特2的状态与施加波形前状态的差异刻画波形对ZZ串扰的抑制效果。这里采用不保真度来刻画状态差异，两个状态的不保真度定义为：
Figure PCTCN2021117519-appb-000044
其中，<α|β>为|α>和|β>的内积。
请参考图17，其示出了本申请实施例涉及的串扰抑制情况示意图，请参考图18，其示出了本申请实施例涉及的另一种串扰抑制情况示意图。其中，图17展示了在量子比特1上实现R x(π/2)操作时的串扰抑制情况，图18展示了实现恒等I操作时的串扰抑制情况。横轴表示不同的串扰强度，纵轴表示不保真度衡量的串扰抑制效果，不保真度越低，串扰抑制效果越好。
通过图17和图18的对比分析可得到如下结果：
相比于高斯波形，本方案涉及的优化后的波形对ZZ串扰的抑制效果提升了4～5个数量级。
本申请所示的方案涉及的优化后的波形对不同强度的串扰均存在强抑制效果。例如，以不保真度10 -8为标准，按照本方案优化的R x(π/2)能够抑制6MHz以内的串扰，按照本方案优化的I波形能够抑制8MHz以内的串扰。考虑到实验上观测到的ZZ串扰通常小于1MHz，可以说本方案实现了对ZZ串扰的强抑制。
2)两比特波形。
相关技术中的方案通常采用平顶高斯波形实现两比特操作，本方案考虑
Figure PCTCN2021117519-appb-000045
类型的耦合，并采用直接在耦合项上施加波形的方式实现两比特操作。本方案采用N项余弦波形叠加，取N＝5。
为了刻画两比特波形对ZZ串扰的抑制效果，请参考图19，其示出了本申请实施例涉及的一种两比特波形拓扑图。在图19所示的拓扑中，在量子比特2、3上施加波形实现特定操作，如果ZZ串扰被抑制，则量子比特1、4的状态在施加波形前后应该保持一致。因而，采用施加波形前后量子比特1、4的状态不保真度来刻画抑制效果。
请参考图20，其示出了实现R xx(π/2)操作时对ZZ串扰的抑制效果的对比示意图。通过图20的分析可得到与单比特波形相似的结果：
相比于平顶高斯波形，本方案涉及的优化后的波形对ZZ串扰的抑制效果提升了4～5个数量级。也就是说，本方案涉及的优化后的波形对不同强度的串扰均存在强抑制效果。
综合而言，本方案以一种简单、统一的方式，在单比特操作和两比特操作均实现了对ZZ串扰的强抑制。
二、量子计算任务上的提升。
本申请选择Hidden-Shift(HS)算法，Bernstein–Vazirani(BV)算法，量子傅立叶变换(Quantum Fourier Transform，QFT)，Ising模型模拟，量子容量估计(Quantum Volume，QV)作为量子计算任务。请参考图21，其示出了本申请实施例涉及的网格拓扑。在图21所示的网格拓扑上进行计算机仿真模拟，拓扑图中相邻的两比特之间存在ZZ串扰，根据实验结果设定其强度为200kHz。
本申请提供量子操作调度的方案与最大化并行方式调度(Parallel Schedule)进行对比，本申请涉及的调度方式记为串扰抑制调度(X-suppressed Schedule)。请参考图22，其示出了两种调度方式的对比示意图。
在图22中，不同量子计算任务上，本申请提供的调度方式(X-suppressed Schedule)相比最大化并行方式调度(Parallel Schedule)带来明显的提升。
其中，图22中的横轴说明：HS-4表示4比特的Hidden Shift算法，其他以此类推。
从图22中可得出如下结果：
本申请提供的方法相比最大化并行方式调度，大幅降低了ZZ串扰对量子计算任务的影响。在本申请评测的量子计算任务上，本申请提供的方法相比原先方法取得了10～110倍的提升。
本申请提供的方法具有良好扩展性：随着量子计算任务所用量子比特数目的增加，本申请提供的方法带来的提升也增加。本申请提供的方法不仅能适用于当下量子比特较少的量子计算器件，也能适用于未来大规模量子计算器件。
本申请涉及的波形优化方案对串扰H Xtalk的形式没有要求，除了应用于ZZ串扰外，如果有其他类型串扰的话，只需要将H Xtalk替换为相应的形式，本申请的方法亦可适用。类似地，上述的“最优抑制”算法和量子操作调度算法同样可适用于其他串扰。
本申请涉及的波形优化方法最终归结为求解一个多目标优化问题。上述实施例中给出了一种将其转为单标量目标多参数优化的求解方法，该方法中的梯度下降法可替换为其它优化方法，例如Nelder-Mead(NM)算法，Broyden-Fletcher-Goldfarb-Shanno(BFGS)算法等。除此之外，其他多目标优化算法也可用于求解该问题，例如遗传算法，模拟退火等。
本申请所示的方案可以用于在超导量子计算器件上执行量子电路时，抑制器件中存在的ZZ串扰对计算的影响，提高计算的保真度。请参考图23，其示出了本申请实施例涉及的执行量子电路的示意图。如图23所示，本申请涉及的量子操作调度方法可以用于处理量子电路，生成量子电路执行方案，本申请涉及的波形优化方法用于为执行方案中所涉及到的量子操作生成对应的控制波形；依据量子电路执行方案，使用控制波形控制量子计算器件，可实现在量子计算器件上执行量子电路的同时抑制ZZ串扰对计算的影响。
本申请涉及也可以应用于改进量子内存，抑制量子内存器件中存在的ZZ串扰，提高量子内存的数据保存时间。请参考图24和图25，其中图24示出了本申请实施例涉及的量子内存的示意图，图25示出了本申请实施例涉及的恒等量子电路示意图。如图24和25所示，量子内存的刷新操作等效于在量子内存上执行恒等量子电路。
综上所述，本申请实施例所示的方案，对于量子计算器件对应的量子操作，在保证量子操作不失真的情况下，获取使得量子操作在所述量子计算器件上执行时产生的区域间串扰最小化的控制波形，并基于该控制波形在量子计算器件上执行该量子操作，从而通过对量子操作的控制波形进行优化的方式来抑制该量子操作引起的区域间串扰，由于任意类型的量子操作都可以进行控制波形的优化，因此，该方案能够实现对任意类型量子操作的串扰抑制，提高了串扰抑制的适用性，从而提高串扰抑制的效果。
请参考图26，其示出了本申请一个实施例提供的量子操作执行装置的框图。该装置具有实现上述方法示例的功能，所述功能可以由硬件实现，也可以由硬件执行相应的软件实现。该装置可以是上文介绍的计算机设备，也可以设置在计算机设备中。如图26所示，该装置可以包括：
量子操作获取模块2601，用于获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数；
量子操作调度模块2602，用于基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组；所述目标操作组包含各个被调度的量子操作；
量子操作执行模块2603，用于在所述量子计算器件上并行执行所述目标操作组中包含的各个被调度的量子操作；
其中，所述被调度的量子操作的控制波形是基于指定目标生成的；所述指定目标用于在 控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是所述量子计算器件中的各个量子比特以是否执行量子操作进行区分得到的。
在一种可能的实现方式中，所述量子操作调度模块2602，包括：
可调度集合获取子模块，用于基于n个所述未调度的量子操作获取可调度集合；所述可调度集合中包含n个所述未调度的量子操作中可调度的量子操作；
候选操作组提取子模块，用于从所述可调度集合中提取出候选操作组；
划分方案获取子模块，用于获取量子比特划分方案；所述量子比特划分方案是基于所述拓扑结构，按照指定划分方式得到的；所述量子比特划分方案指示将所述量子计算器件中的各个量子比特划分为两个量子比特集合，以在所述量子计算器件上形成至少两个所述连通区域；
目标操作组获取子模块，用于基于所述候选操作组以及所述量子比特划分方案，获取所述目标操作组。
在一种可能的实现方式中，所述装置还包括：
所述量子操作调度模块2602，还用于响应于在所述目标操作组之外，还存在m个所述未调度的量子操作，基于所述拓扑结构，以及m个所述未调度的量子操作进行操作调度，获得新的所述目标操作组；m大于等于1，且m为整数；
所述量子操作执行模块2603，还用于在所述量子计算器件上并行执行新的所述目标操作组中包含的各个被调度的量子操作。
在一种可能的实现方式中，所述候选操作组提取子模块，包括：
两比特操作集合获取单元，用于响应于所述可调度集合中包含两比特量子操作，获取所述可调度集合中的各个两比特量子操作，得到两比特操作集合；
操作组构建单元，用于响应于所述两比特操作集合中包含3个或者3个以上操作，基于所述两比特操作集合中，距离最近的两个量子操作构建两个操作组；
操作添加单元，用于基于所述两比特操作集合中，除了所述两个量子操作之外的其它量子操作与所述两个操作组之间的距离，执行i次操作添加，i大于等于1，且i为整数；
候选操作组获取单元，用于基于所述i次操作添加的结果，获取所述候选操作组。
在一种可能的实现方式中，所述操作添加单元，用于，
在第j次操作添加过程中，获取所述两比特操作集合中的所述其它量子操作分别与所述两个操作组之间的距离；1≤j≤i，且j为整数；
将与最大距离对应的指定量子操作，添加入与所述最大距离对应的指定操作组；所述最大距离是所述其它量子操作分别与所述两个操作组之间的距离中的最大值；
基于所述拓扑结构以及所述指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案；所述目标奇度顶点配对方案包括目标对偶图中的各个奇度顶点对之间的路径，且所述目标奇度顶点配对方案用于指示指定操作组的所述量子比特划分方案；所述目标对偶图是拓扑图的对偶图，所述拓扑图是所述拓扑结构的平面图；
响应于所述目标奇度顶点配对方案满足串扰抑制要求，将所述指定量子操作从所述两比特操作集合中删除；
响应于删除所述指定量子操作之后的所述其它量子操作的数量不为0，执行下一次操作添加过程。
在一种可能的实现方式中，所述候选操作组获取单元，用于响应于所述第i次操作添加后的所述其它量子操作的数量为0，或者，响应于所述第i次操作添加过程中得到的所述目标奇度顶点配对方案不满足所述串扰抑制要求，将所述第i次操作添加后的所述两个操作组中，包含操作数量最多的操作组获取为所述候选操作组。
在一种可能的实现方式中，在基于所述拓扑结构以及所述指定操作组，按照第一指定划 分方式获得目标奇度顶点配对方案时，所述操作添加单元，用于，
在所述目标对偶图中删除与所述指定操作组中的各个量子操作对应的边；
获取以所述目标对偶图中的奇度顶点为顶点的完全图；
在所述完全图中确定各个所述奇度顶点对；
获取各个所述奇度顶点对的至少一种奇度顶点配对方案；所述奇度顶点配对方案中包含各个所述奇度顶点对分别在所述目标对偶图中的一条路径；
在至少一种所述奇度顶点配对方案中添加所述指定操作组中的各个量子操作对应在所述目标对偶图中的边；
从至少一种所述奇度顶点配对方案中，筛除与所述两比特操作对应的量子比特不属于同一个连通区域的奇度顶点配对方案，获得筛除后的各个所述奇度顶点配对方案；
获取筛除后的各个所述奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个所述奇度顶点配对方案各自的不可抑制的串扰总数；所述不可抑制的串扰总数由所述奇度顶点配对方案中的路径对应在所述拓扑图中的边数进行表征；所述最大区域量子比特数由所述拓扑图除去割集之后的最大连通区域中的顶点数进行表征，所述割集是所述拓扑图中除去所述奇度顶点配对方案中的路径对应在所述拓扑图中的边之后剩余的边组成的集合；
基于筛除后的各个所述奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个所述奇度顶点配对方案各自的不可抑制的串扰总数，获取筛除后的各个所述奇度顶点配对方案的串扰抑制指数；
将对应所述串扰抑制指数最小的所述奇度顶点配对方案，获取为所述目标奇度顶点配对方案。
在一种可能的实现方式中，所述串扰抑制要求包括：
所述目标奇度顶点配对方案的最大区域量子比特数小于比特数阈值；
以及，
所述目标奇度顶点配对方案的不可抑制的串扰总数小于串扰总数阈值。
在一种可能的实现方式中，在第j次操作添加过程中，获取所述两比特操作集合中的所述其它量子操作分别与所述两个操作组之间的距离时，所述操作添加单元，用于，
在第j次操作添加过程中，获取第一量子操作与第一操作组中已有的各个量子操作之间的操作距离；所述操作距离用于指示与两个两比特操作对应的量子比特在所述拓扑结构中的最短路径长度之和；所述第一量子操作是所述其它量子操作中的任意一个，所述第一操作组是所述两个操作组中的任意一个；
基于所述第一量子操作与所述第一操作组中已有的各个量子操作之间的操作距离，获取所述第一量子操作与所述第一操作组之间的距离。
在一种可能的实现方式中，所述候选操作组提取子模块，用于响应于所述可调度集合中的各个量子操作为单比特量子操作，将所述可调度集合获取为所述候选操作组；
所述划分方案获取子模块，包括：
配对方案获取单元，用于基于所述拓扑结构，按照第二指定划分方式获得目标奇度顶点配对方案；
去边单元，用于在所述拓扑图中去除与所述目标奇度顶点配对方案对应的边，获得去边后的所述拓扑图；
着色单元，用于对去边后的所述拓扑图进行顶点二着色，获得量子比特划分方案。
在一种可能的实现方式中，所述配对方案获取单元，用于，
获取完全图，所述完全图中的顶点为目标对偶图中的奇度顶点；所述目标对偶图是拓扑图的对偶图，所述拓扑图是所述量子计算器件的拓扑结构的平面图；
在所述完全图中确定配对的各个奇度顶点对；
获取各个所述奇度顶点对的至少一种奇度顶点配对方案；所述奇度顶点配对方案中包含 各个所述奇度顶点对分别在所述目标对偶图中的一条路径；
获取至少一种所述奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种所述奇度顶点配对方案各自的不可抑制的串扰总数；所述不可抑制的串扰总数由所述奇度顶点配对方案中的路径对应在所述拓扑图中的边数进行表征；所述最大区域量子比特数由所述拓扑图除去割集之后的最大连通区域中的顶点数进行表征，所述割集是所述拓扑图中除去所述奇度顶点配对方案中的路径对应在所述拓扑图中的边之后剩余的边组成的集合；
基于至少一种所述奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种所述奇度顶点配对方案各自的不可抑制的串扰总数，获取至少一种所述奇度顶点配对方案的串扰抑制指数；
将对应所述串扰抑制指数最小的所述奇度顶点配对方案，获取为目标奇度顶点配对方案。
在一种可能的实现方式中，在获取各个所述奇度顶点对的至少一种奇度顶点配对方案时，所述操作添加单元或者所述配对方案获取单元，用于，
获取各个所述奇度顶点对各自在所述完全图中的前k短路径；k≥1，且k为整数；
对各个所述奇度顶点对各自在所述完全图中的前k短路径进行组合，获得至少一种所述奇度顶点配对方案。
在一种可能的实现方式中，所述串扰抑制指数为：αN Q+N C；
其中，N Q表示所述最大区域量子比特数，N C表示所述不可抑制的串扰总数，α表示N Q和N C的重要程度。
在一种可能的实现方式中，所述目标操作组获取子模块，用于，
基于所述量子比特划分方案，将所述量子计算器件中的各个量子比特划分为两个量子比特集合；
将所述候选操作组划分为与所述两个量子比特集合分别对应的子操作组；与所述子操作组中的量子操作对应的量子比特，处于与所述子操作组对应的所述量子比特集合内；
将目标子操作组中的量子操作以及填充操作，合并为所述目标操作组；所述目标子操作组是与所述两个量子比特集合分别对应的所述子操作组中，包含量子操作数量最多的子操作组；所述填充操作是与填充量子比特对应的恒等量子操作，所述填充量子比特是与所述目标子操作组对应的量子比特集合中，除了与所述目标子操作组对应的量子比特之外的其它量子比特。
在一种可能的实现方式中，所述指定目标是基于量子操作在控制波形作用下的平均操作保真度，以及所述区域间串扰获得的单标量目标。
在一种可能的实现方式中，所述单标量目标的公式为：
Figure PCTCN2021117519-appb-000046
其中，L为所述单标量目标，U(T)表示对应的量子操作在控制波形作用下的的酉变换，U Target(T)表示对应的量子操作的目标酉变换，F(U(T),U Target(T))表示U(T)与U Target(T)之间的平均操作保真度；
Figure PCTCN2021117519-appb-000047
表示在所述区域间串扰影响下的封闭量子系统的演化。
在一种可能的实现方式中，所述装置还包括：
迭代更新模块，用于基于所述单标量目标，对目标量子操作的控制波形函数的函数参数进行R次迭代更新；R≥2且R为整数；所述目标量子操作是各个所述可调度量子操作以及所述恒等量子操作中的任意一个；
波形生成模块，用于基于迭代更新后的所述函数参数生成所述目标量子操作的控制波形。
在一种可能的实现方式中，所述迭代更新模块，用于，
获取第r次迭代过程中的第一系统演化，所述第一系统演化是在第r个控制波形影响下的封闭量子系统的演化；2≤r≤R，且r为整数；所述第r个控制波形是与第r-1次迭代更新后的所述函数参数对应的控制波形；
基于所述第一系统演化获取第二系统演化，所述第二系统演化是第r次迭代过程中的所述区域间串扰影响下的封闭量子系统的演化；
基于所述第二系统演化，以及所述目标量子操作在所述第r个控制波形作用下的平均操作保真度，获取第r次迭代过程中的所述单标量目标；
基于第r次迭代过程中的所述单标量目标对第r-1次迭代更新后的所述函数参数进行更新，获得第r次迭代更新后的所述函数参数。
在一种可能的实现方式中，所述区域间串扰包括区域间ZZ串扰。
综上所述，本申请实施例所示的方案，对于量子计算器件对应的量子操作，在保证量子操作不失真的情况下，获取使得量子操作在所述量子计算器件上执行时产生的区域间串扰最小化的控制波形，并基于该控制波形在量子计算器件上执行该量子操作，从而通过对量子操作的控制波形进行优化的方式来抑制该量子操作引起的区域间串扰，由于任意类型的量子操作都可以进行控制波形的优化，因此，该方案能够实现对任意类型量子操作的串扰抑制，提高了串扰抑制的适用性，从而提高串扰抑制的效果。
请参考图27，其示出了本申请一个实施例提供的量子操作的控制波形生成装置的框图。如图27所示，该装置可以包括：
量子操作获取模块2701，用于获取被调度的量子操作；
参数获取模块2702，用于基于指定目标，获取所述被调度的量子操作的控制波形函数的函数参数；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是以是否执行量子操作，对所述量子计算器件中的各个量子比特进行划分得到的；
波形生成模块2703，用于基于所述函数参数生成所述被调度的量子操作的控制波形。
其中，上述量子操作的控制波形生成装置生成被调度的量子操作的控制波形的过程，可以参考上述图3所示实施例中的相关介绍，此处不再赘述。
综上所述，本申请实施例所示的方案，对于量子计算器件对应的量子操作，在保证量子操作不失真的情况下，获取使得量子操作在所述量子计算器件上执行时产生的区域间串扰最小化的控制波形，从而通过对量子操作的控制波形进行优化的方式来抑制该量子操作引起的区域间串扰，由于任意类型的量子操作都可以进行控制波形的优化，因此，该方案能够实现对任意类型量子操作的串扰抑制，提高了串扰抑制的适用性，从而提高串扰抑制的效果。
需要说明的是，上述实施例提供的装置，在实现其功能时，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将设备的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。另外，上述实施例提供的装置与方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
请参考图28，其示出了本申请一个实施例提供的计算机设备的结构框图。该计算机设备可以用于实施上述实施例中提供的方法。以该计算机设备为经典计算机为例：
该计算机设备2800包括处理单元(如CPU(Central Processing Unit，中央处理器)、GPU(Graphics Processing Unit，图形处理器)和FPGA(Field Programmable Gate Array，现场可编程逻辑门阵列)等)2801、包括RAM(Random-Access Memory，随机存储器)2802和ROM(Read-Only Memory，只读存储器)2803的系统存储器2804，以及连接系统存储器2804和中央处理单元2801的系统总线2805。该计算机设备2800还包括帮助服务器内的各个器件之间传输信息的基本输入/输出系统(Input Output System，I/O系统)2806，和用于存储操作系统2813、应用程序2814和其他程序模块2815的大容量存储设备2807。
该基本输入/输出系统2806包括有用于显示信息的显示器2808和用于用户输入信息的诸如鼠标、键盘之类的输入设备2809。其中，该显示器2808和输入设备2809都通过连接到系 统总线2805的输入输出控制器2810连接到中央处理单元2801。该基本输入/输出系统2806还可以包括输入输出控制器2810以用于接收和处理来自键盘、鼠标、或电子触控笔等多个其他设备的输入。类似地，输入输出控制器2810还提供输出到显示屏、打印机或其他类型的输出设备。
该大容量存储设备2807通过连接到系统总线2805的大容量存储控制器(未示出)连接到中央处理单元2801。该大容量存储设备2807及其相关联的计算机可读介质为计算机设备2800提供非易失性存储。也就是说，该大容量存储设备2807可以包括诸如硬盘或者CD-ROM(Compact Disc Read-Only Memory，只读光盘)驱动器之类的计算机可读介质(未示出)。
不失一般性，该计算机可读介质可以包括计算机存储介质和通信介质。计算机存储介质包括以用于存储诸如计算机可读指令、数据结构、程序模块或其他数据等信息的任何方法或技术实现的易失性和非易失性、可移动和不可移动介质。计算机存储介质包括RAM、ROM、EPROM(Erasable Programmable Read-Only Memory，可擦写可编程只读存储器)、EEPROM(Electrically Erasable Programmable Read-Only Memory，电可擦写可编程只读存储器)、闪存或其他固态存储其技术，CD-ROM、DVD(Digital Video Disc，高密度数字视频光盘)或其他光学存储、磁带盒、磁带、磁盘存储或其他磁性存储设备。当然，本领域技术人员可知该计算机存储介质不局限于上述几种。上述的系统存储器2804和大容量存储设备2807可以统称为存储器。
根据本申请实施例，该计算机设备2800还可以通过诸如因特网等网络连接到网络上的远程计算机运行。也即计算机设备2800可以通过连接在该系统总线2805上的网络接口单元2811连接到网络2812，或者说，也可以使用网络接口单元2811来连接到其他类型的网络或远程计算机系统(未示出)。
所述存储器还包括至少一条指令、至少一段程序、代码集或指令集，该至少一条指令、至少一段程序、代码集或指令集存储于存储器中，且经配置以由一个或者一个以上处理器执行，以实现上述量子操作执行方法。
在一个示例性实施例中，还提供了一种计算机可读存储介质，所述存储介质中存储有至少一条指令、至少一段程序、代码集或指令集，所述至少一条指令、所述至少一段程序、所述代码集或指令集在被处理器执行时以实现上述量子操作执行方法。
可选地，该计算机可读存储介质可以包括：ROM(Read-Only Memory，只读存储器)、RAM(Random-Access Memory，随机存储器)、SSD(Solid State Drives，固态硬盘)或光盘等。其中，随机存取记忆体可以包括ReRAM(Resistance Random Access Memory，电阻式随机存取记忆体)和DRAM(Dynamic Random Access Memory，动态随机存取存储器)。
在一个示例性实施例中，还提供了一种计算机程序产品或计算机程序，所述计算机程序产品或计算机程序包括计算机指令，所述计算机指令存储在计算机可读存储介质中。计算机设备的处理器从所述计算机可读存储介质中读取所述计算机指令，所述处理器执行所述计算机指令，使得所述计算机设备执行上述实施例所示的方法。
在一个示例性实施例中，还提供了一种量子操作芯片，该量子操作芯片用于实现如上所述实施例所示的方法。
应当理解的是，在本文中提及的“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系。另外，本文中描述的步骤编号，仅示例性示出了步骤间的一种可能的执行先后顺序，在一些其它实施例中，上述步骤也可以不按照编号顺序来执行，如两个不同编号的步骤同时执行，或者两个不同编号的步骤按照与图示相反的顺序执行，本申请实施例对此不作限定。
以上所述仅为本申请的示例性实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (30)

  1. 一种量子操作执行方法，由计算机设备执行，所述方法包括：
    获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数；
    基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组；所述目标操作组包含各个被调度的量子操作；
    在所述量子计算器件上并行执行所述目标操作组中包含的各个被调度的量子操作；
    其中，所述被调度的量子操作的控制波形是基于指定目标生成的；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是以是否执行量子操作，对所述量子计算器件中的各个量子比特进行划分得到的。
  2. 根据权利要求1所述的方法，所述基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组，包括：
    基于n个所述未调度的量子操作获取可调度集合；所述可调度集合中包含n个所述未调度的量子操作中可调度的量子操作；
    从所述可调度集合中提取出候选操作组；
    获取量子比特划分方案；所述量子比特划分方案是基于所述拓扑结构，按照指定划分方式得到的；所述量子比特划分方案指示将所述量子计算器件中的各个量子比特划分为两个量子比特集合，以在所述量子计算器件上形成至少两个所述连通区域；
    基于所述候选操作组以及所述量子比特划分方案，获取所述目标操作组。
  3. 根据权利要求2所述的方法，所述从所述可调度集合中提取出候选操作组，包括：
    响应于所述可调度集合中包含两比特量子操作，获取所述可调度集合中的各个两比特量子操作，得到两比特操作集合；
    响应于所述两比特操作集合中包含3个或者3个以上操作，基于所述两比特操作集合中，距离最近的两个量子操作构建两个操作组；
    基于所述两比特操作集合中的其它量子操作与所述两个操作组之间的距离，执行i次操作添加，i大于等于1，且i为整数；所述其它量子操作是所述两比特操作集合中除了所述两个量子操作之外的量子操作；
    基于所述i次操作添加的结果，获取所述候选操作组。
  4. 根据权利要求3所述的方法，所述基于所述两比特操作集合中的其它量子操作与所述两个操作组之间的距离，执行i次操作添加，包括：
    在第j次操作添加过程中，获取所述两比特操作集合中的所述其它量子操作分别与所述两个操作组之间的距离；1≤j≤i，且j为整数；
    将与最大距离对应的指定量子操作，添加入与所述最大距离对应的指定操作组；所述最大距离是所述其它量子操作分别与所述两个操作组之间的距离中的最大值；
    基于所述拓扑结构以及所述指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案；所述目标奇度顶点配对方案包括目标对偶图中的各个奇度顶点对之间的路径，且所述目标奇度顶点配对方案用于指示所述指定操作组的所述量子比特划分方案；所述目标对偶图是拓扑图的对偶图，所述拓扑图是所述拓扑结构的平面图；
    响应于所述目标奇度顶点配对方案满足串扰抑制要求，将所述指定量子操作从所述两比特操作集合中删除；
    响应于删除所述指定量子操作之后的所述其它量子操作的数量不为0，执行下一次操作添加过程。
  5. 根据权利要求4所述的方法，所述基于所述拓扑结构以及所述指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案，包括：
    在所述目标对偶图中删除与所述指定操作组中的各个量子操作对应的边；
    获取以所述目标对偶图中的奇度顶点为顶点的完全图；
    在所述完全图中确定各个所述奇度顶点对；
    获取各个所述奇度顶点对的至少一种奇度顶点配对方案；所述奇度顶点配对方案中包含各个所述奇度顶点对分别在所述目标对偶图中的一条路径；
    在至少一种所述奇度顶点配对方案中添加所述指定操作组中的各个量子操作对应在所述目标对偶图中的边；
    从至少一种所述奇度顶点配对方案中，筛除与所述两比特操作对应的量子比特不属于同一个连通区域的奇度顶点配对方案，获得筛除后的各个所述奇度顶点配对方案；
    获取筛除后的各个所述奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个所述奇度顶点配对方案各自的不可抑制的串扰总数；所述不可抑制的串扰总数由所述奇度顶点配对方案中的路径对应在所述拓扑图中的边数进行表征；所述最大区域量子比特数由所述拓扑图除去割集之后的最大连通区域中的顶点数进行表征，所述割集是所述拓扑图中除去所述奇度顶点配对方案中的路径对应在所述拓扑图中的边之后剩余的边组成的集合；
    基于筛除后的各个所述奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个所述奇度顶点配对方案各自的不可抑制的串扰总数，获取筛除后的各个所述奇度顶点配对方案的串扰抑制指数；
    将对应所述串扰抑制指数最小的所述奇度顶点配对方案，获取为所述目标奇度顶点配对方案。
  6. 根据权利要求2所述的方法，所述从所述可调度集合中提取出候选操作组，包括：
    响应于所述可调度集合中的各个量子操作为单比特量子操作，将所述可调度集合获取为所述候选操作组；
    所述获取量子比特划分方案，包括：
    基于所述拓扑结构，按照第二指定划分方式获得目标奇度顶点配对方案；
    在所述拓扑图中去除与所述目标奇度顶点配对方案对应的边，获得去边后的所述拓扑图；
    对去边后的所述拓扑图进行顶点二着色，获得所述量子比特划分方案。
  7. 根据权利要求6所述的方法，所述基于所述拓扑结构，按照第二指定划分方式获得目标奇度顶点配对方案，包括：
    获取完全图，所述完全图中的顶点为目标对偶图中的奇度顶点；所述目标对偶图是拓扑图的对偶图，所述拓扑图是所述量子计算器件的拓扑结构的平面图；
    在所述完全图中确定配对的各个奇度顶点对；
    获取各个所述奇度顶点对的至少一种奇度顶点配对方案；所述奇度顶点配对方案中包含各个所述奇度顶点对分别在所述目标对偶图中的一条路径；
    获取至少一种所述奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种所述奇度顶点配对方案各自的不可抑制的串扰总数；所述不可抑制的串扰总数由所述奇度顶点配对方案中的路径对应在所述拓扑图中的边数进行表征；所述最大区域量子比特数由所述拓扑图除去割集之后的最大连通区域中的顶点数进行表征，所述割集是所述拓扑图中除去所述奇度顶点配对方案中的路径对应在所述拓扑图中的边之后剩余的边组成的集合；
    基于至少一种所述奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种所述奇度顶点配对方案各自的不可抑制的串扰总数，获取至少一种所述奇度顶点配对方案的串扰抑制指数；
    将对应所述串扰抑制指数最小的所述奇度顶点配对方案，获取为所述目标奇度顶点配对方案。
  8. 根据权利要求5或7所述的方法，所述串扰抑制指数为：αN Q+N C；
    其中，N Q表示所述最大区域量子比特数，N C表示所述不可抑制的串扰总数，α表示N Q和 N C的重要程度。
  9. 根据权利要求2所述的方法，所述基于所述候选操作组以及所述量子比特划分方案，获取所述目标操作组，包括：
    基于所述量子比特划分方案，将所述量子计算器件中的各个量子比特划分为两个量子比特集合；
    将所述候选操作组划分为与所述两个量子比特集合分别对应的子操作组；与所述子操作组中的量子操作对应的量子比特，处于与所述子操作组对应的所述量子比特集合内；
    将目标子操作组中的量子操作以及填充操作，合并为所述目标操作组；所述目标子操作组是与所述两个量子比特集合分别对应的所述子操作组中，包含量子操作数量最多的子操作组；所述填充操作是与填充量子比特对应的恒等量子操作，所述填充量子比特是与所述目标子操作组对应的量子比特集合中，除了与所述目标子操作组对应的量子比特之外的其它量子比特。
  10. 根据权利要求1所述的方法，所述指定目标是基于量子操作在控制波形作用下的平均操作保真度，以及所述区域间串扰获得的单标量目标。
  11. 根据权利要求10所述的方法，所述方法还包括：
    基于所述单标量目标，对目标量子操作的控制波形函数的函数参数进行R次迭代更新；R≥2且R为整数；所述目标量子操作是各个所述可调度量子操作以及所述恒等量子操作中的任意一个；
    基于迭代更新后的所述函数参数生成所述目标量子操作的控制波形。
  12. 根据权利要求11所述的方法，所述基于所述单标量目标，对目标量子操作的控制波形函数的函数参数进行R次迭代更新，包括：
    获取第r次迭代过程中的第一系统演化，所述第一系统演化是在第r个控制波形影响下的封闭量子系统的演化；2≤r≤R，且r为整数；所述第r个控制波形是与第r-1次迭代更新后的所述函数参数对应的控制波形；
    基于所述第一系统演化获取第二系统演化，所述第二系统演化是第r次迭代过程中的所述区域间串扰影响下的封闭量子系统的演化；
    基于所述第二系统演化，以及所述目标量子操作在所述第r个控制波形作用下的平均操作保真度，获取第r次迭代过程中的所述单标量目标；
    基于第r次迭代过程中的所述单标量目标对第r-1次迭代更新后的所述函数参数进行更新，获得第r次迭代更新后的所述函数参数。
  13. 一种量子操作的控制波形生成方法，由计算机设备执行，所述方法包括：
    获取被调度的量子操作；
    基于指定目标，获取所述被调度的量子操作的控制波形函数的函数参数；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是在量子计算器件中，以包含的量子比特是否执行量子操作进行划分的；
    基于所述函数参数生成所述被调度的量子操作的控制波形。
  14. 一种量子操作执行装置，所述装置包括：
    量子操作获取模块，用于获取与量子电路对应的n个未调度的量子操作；n大于等于1，且n为整数；
    量子操作调度模块，用于基于量子计算器件的拓扑结构，以及n个所述未调度的量子操作进行操作调度，获得目标操作组；所述目标操作组包含各个被调度的量子操作；
    量子操作执行模块，用于在所述量子计算器件上并行执行所述目标操作组中包含的各个被调度的量子操作；
    其中，所述被调度的量子操作的控制波形是基于指定目标生成的；所述指定目标用于在 控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是所述量子计算器件中的各个量子比特以是否执行量子操作进行区分得到的。
  15. 根据权利要求14所述的装置，所述量子操作调度模块，包括：
    可调度集合获取子模块，用于基于n个所述未调度的量子操作获取可调度集合；所述可调度集合中包含n个所述未调度的量子操作中可调度的量子操作；
    候选操作组提取子模块，用于从所述可调度集合中提取出候选操作组；
    划分方案获取子模块，用于获取量子比特划分方案；所述量子比特划分方案是基于所述拓扑结构，按照指定划分方式得到的；所述量子比特划分方案指示将所述量子计算器件中的各个量子比特划分为两个量子比特集合，以在所述量子计算器件上形成至少两个所述连通区域；
    目标操作组获取子模块，用于基于所述候选操作组以及所述量子比特划分方案，获取所述目标操作组。
  16. 根据权利要求15所述的装置，所述候选操作组提取子模块，包括：
    两比特操作集合获取单元，用于响应于所述可调度集合中包含两比特量子操作，获取所述可调度集合中的各个两比特量子操作，得到两比特操作集合；
    操作组构建单元，用于响应于所述两比特操作集合中包含3个或者3个以上操作，基于所述两比特操作集合中，距离最近的两个量子操作构建两个操作组；
    操作添加单元，用于基于所述两比特操作集合中的其它量子操作与所述两个操作组之间的距离，执行i次操作添加，i大于等于1，且i为整数；所述其它量子操作是所述两比特操作集合中除了所述两个量子操作之外的量子操作；
    候选操作组获取单元，用于基于所述i次操作添加的结果，获取所述候选操作组。
  17. 根据权利要求16所述的装置，所述操作添加单元，用于，
    在第j次操作添加过程中，获取所述两比特操作集合中的所述其它量子操作分别与所述两个操作组之间的距离；1≤j≤i，且j为整数；
    将与最大距离对应的指定量子操作，添加入与所述最大距离对应的指定操作组；所述最大距离是所述其它量子操作分别与所述两个操作组之间的距离中的最大值；
    基于所述拓扑结构以及所述指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案；所述目标奇度顶点配对方案包括目标对偶图中的各个奇度顶点对之间的路径，且所述目标奇度顶点配对方案用于指示所述指定操作组的所述量子比特划分方案；所述目标对偶图是拓扑图的对偶图，所述拓扑图是所述拓扑结构的平面图；
    响应于所述目标奇度顶点配对方案满足串扰抑制要求，将所述指定量子操作从所述两比特操作集合中删除；
    响应于删除所述指定量子操作之后的所述其它量子操作的数量不为0，执行下一次操作添加过程。
  18. 根据权利要求17所述的装置，在基于所述拓扑结构以及所述指定操作组，按照第一指定划分方式获得目标奇度顶点配对方案时，所述操作添加单元，用于，
    在所述目标对偶图中删除与所述指定操作组中的各个量子操作对应的边；
    获取以所述目标对偶图中的奇度顶点为顶点的完全图；
    在所述完全图中确定各个所述奇度顶点对；
    获取各个所述奇度顶点对的至少一种奇度顶点配对方案；所述奇度顶点配对方案中包含各个所述奇度顶点对分别在所述目标对偶图中的一条路径；
    在至少一种所述奇度顶点配对方案中添加所述指定操作组中的各个量子操作对应在所述目标对偶图中的边；
    从至少一种所述奇度顶点配对方案中，筛除与所述两比特操作对应的量子比特不属于同 一个连通区域的奇度顶点配对方案，获得筛除后的各个所述奇度顶点配对方案；
    获取筛除后的各个所述奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个所述奇度顶点配对方案各自的不可抑制的串扰总数；所述不可抑制的串扰总数由所述奇度顶点配对方案中的路径对应在所述拓扑图中的边数进行表征；所述最大区域量子比特数由所述拓扑图除去割集之后的最大连通区域中的顶点数进行表征，所述割集是所述拓扑图中除去所述奇度顶点配对方案中的路径对应在所述拓扑图中的边之后剩余的边组成的集合；
    基于筛除后的各个所述奇度顶点配对方案各自的最大区域量子比特数，以及，筛除后的各个所述奇度顶点配对方案各自的不可抑制的串扰总数，获取筛除后的各个所述奇度顶点配对方案的串扰抑制指数；
    将对应所述串扰抑制指数最小的所述奇度顶点配对方案，获取为所述目标奇度顶点配对方案。
  19. 根据权利要求15所述的装置，所述候选操作组提取子模块，用于响应于所述可调度集合中的各个量子操作为单比特量子操作，将所述可调度集合获取为所述候选操作组；
    所述划分方案获取子模块，包括：
    配对方案获取单元，用于基于所述拓扑结构，按照第二指定划分方式获得目标奇度顶点配对方案；
    去边单元，用于在所述拓扑图中去除与所述目标奇度顶点配对方案对应的边，获得去边后的所述拓扑图；
    着色单元，用于对去边后的所述拓扑图进行顶点二着色，获得量子比特划分方案。
  20. 根据权利要求19所述的装置，所述配对方案获取单元，用于，
    获取完全图，所述完全图中的顶点为目标对偶图中的奇度顶点；所述目标对偶图是拓扑图的对偶图，所述拓扑图是所述量子计算器件的拓扑结构的平面图；
    在所述完全图中确定配对的各个奇度顶点对；
    获取各个所述奇度顶点对的至少一种奇度顶点配对方案；所述奇度顶点配对方案中包含各个所述奇度顶点对分别在所述目标对偶图中的一条路径；
    获取至少一种所述奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种所述奇度顶点配对方案各自的不可抑制的串扰总数；所述不可抑制的串扰总数由所述奇度顶点配对方案中的路径对应在所述拓扑图中的边数进行表征；所述最大区域量子比特数由所述拓扑图除去割集之后的最大连通区域中的顶点数进行表征，所述割集是所述拓扑图中除去所述奇度顶点配对方案中的路径对应在所述拓扑图中的边之后剩余的边组成的集合；
    基于至少一种所述奇度顶点配对方案各自的最大区域量子比特数，以及，至少一种所述奇度顶点配对方案各自的不可抑制的串扰总数，获取至少一种所述奇度顶点配对方案的串扰抑制指数；
    将对应所述串扰抑制指数最小的所述奇度顶点配对方案，获取为目标奇度顶点配对方案。
  21. 根据权利要求18或20所述的装置，所述串扰抑制指数为：αN Q+N C；
    其中，N Q表示所述最大区域量子比特数，N C表示所述不可抑制的串扰总数，α表示N Q和N C的重要程度。
  22. 根据权利要求15所述的装置，所述目标操作组获取子模块，用于，
    基于所述量子比特划分方案，将所述量子计算器件中的各个量子比特划分为两个量子比特集合；
    将所述候选操作组划分为与所述两个量子比特集合分别对应的子操作组；与所述子操作组中的量子操作对应的量子比特，处于与所述子操作组对应的所述量子比特集合内；
    将目标子操作组中的量子操作以及填充操作，合并为所述目标操作组；所述目标子操作组是与所述两个量子比特集合分别对应的所述子操作组中，包含量子操作数量最多的子操作组；所述填充操作是与填充量子比特对应的恒等量子操作，所述填充量子比特是与所述目标 子操作组对应的量子比特集合中，除了与所述目标子操作组对应的量子比特之外的其它量子比特。
  23. 根据权利要求14所述的装置，所述指定目标是基于量子操作在控制波形作用下的平均操作保真度，以及所述区域间串扰获得的单标量目标。
  24. 根据权利要求23所述的装置，所述装置还包括：
    迭代更新模块，用于基于所述单标量目标，对目标量子操作的控制波形函数的函数参数进行R次迭代更新；R≥2且R为整数；所述目标量子操作是各个所述可调度量子操作以及所述恒等量子操作中的任意一个；
    波形生成模块，用于基于迭代更新后的所述函数参数生成所述目标量子操作的控制波形。
  25. 根据权利要求24所述的装置，所述迭代更新模块，用于，
    获取第r次迭代过程中的第一系统演化，所述第一系统演化是在第r个控制波形影响下的封闭量子系统的演化；2≤r≤R，且r为整数；所述第r个控制波形是与第r-1次迭代更新后的所述函数参数对应的控制波形；
    基于所述第一系统演化获取第二系统演化，所述第二系统演化是第r次迭代过程中的所述区域间串扰影响下的封闭量子系统的演化；
    基于所述第二系统演化，以及所述目标量子操作在所述第r个控制波形作用下的平均操作保真度，获取第r次迭代过程中的所述单标量目标；
    基于第r次迭代过程中的所述单标量目标对第r-1次迭代更新后的所述函数参数进行更新，获得第r次迭代更新后的所述函数参数。
  26. 一种量子操作的控制波形生成装置，所述装置包括：
    量子操作获取模块，用于获取被调度的量子操作；
    参数获取模块，用于基于指定目标，获取所述被调度的量子操作的控制波形函数的函数参数；所述指定目标用于在控制量子操作不失真的情况下使区域间串扰最小化；所述区域间串扰是分属于不同的连通区域的量子比特之间的串扰；所述连通区域是以是否执行量子操作，对所述量子计算器件中的各个量子比特进行划分得到的；
    波形生成模块，用于基于所述函数参数生成所述被调度的量子操作的控制波形。
  27. 一种量子操作芯片，所述量子操作芯片用于实现如权利要求1至12任一所述的量子操作执行方法，或者，所述量子操作芯片用于实现如权利要求13所述的量子操作的控制波形生成方法。
  28. 一种计算机设备，所述计算机设备中包含至少一个如权利要求27所述的量子操作芯片。
  29. 一种计算机可读存储介质，所述存储介质中存储有至少一条计算机指令，所述至少一条计算机指令由计算机设备中的处理器，使得所述计算机设备实现如权利要求1至12任一所述的量子操作执行方法，或者，如权利要求13所述的量子操作的控制波形生成方法。
  30. 一种计算机程序产品，所述计算机程序产品包括计算机指令，所述计算机指令由计算机设备中的处理器执行，使得所述计算机设备实现如权利要求1至12任一所述的量子操作执行方法，或者，如权利要求13所述的量子操作的控制波形生成方法。
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