WO2022194068A1 - 闪存配置方法、装置、电子设备和存储介质 - Google Patents

闪存配置方法、装置、电子设备和存储介质 Download PDF

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Publication number
WO2022194068A1
WO2022194068A1 PCT/CN2022/080551 CN2022080551W WO2022194068A1 WO 2022194068 A1 WO2022194068 A1 WO 2022194068A1 CN 2022080551 W CN2022080551 W CN 2022080551W WO 2022194068 A1 WO2022194068 A1 WO 2022194068A1
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Prior art keywords
flash memory
target
memory configuration
configuration data
logical
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PCT/CN2022/080551
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English (en)
French (fr)
Inventor
唐欢
曹建业
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维沃移动通信有限公司
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Publication of WO2022194068A1 publication Critical patent/WO2022194068A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

Definitions

  • the present application belongs to the technical field of electronic devices, and in particular relates to a flash memory configuration method, device, electronic device and storage medium.
  • UFS Universal Flash Storage
  • the purpose of the embodiments of the present application is to provide a flash memory configuration method, apparatus, electronic device, and storage medium, which enable users to configure the flash memory flexibly and autonomously.
  • an embodiment of the present application provides a method for configuring a flash memory, and the method includes:
  • the flash memory of the electronic device is configured and saved according to the target logical area.
  • an embodiment of the present application provides a flash memory configuration device, and the device includes:
  • a receiving module configured to receive the first input from the user on the configuration options of the target flash memory
  • a determining module configured to determine the target flash memory configuration data corresponding to the target flash memory configuration option in response to the first input
  • the determining module is also used to determine the target logical area corresponding to the target flash memory configuration data
  • the configuration module is used to configure and save the flash memory of the electronic device according to the target logical area.
  • an embodiment of the present application provides an electronic device, the electronic device includes a processor, a memory, and a program or instruction stored in the memory and executable on the processor.
  • the program or instruction is executed by the processor, the The steps of the method of the first aspect.
  • an embodiment of the present application provides a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or instruction is executed by a processor, the steps of the method of the first aspect are implemented.
  • an embodiment of the present application provides a chip, where the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is configured to run programs or instructions to implement the method of the first aspect.
  • a first input of a target flash memory configuration option from a user may be received first, and in response to the first input, target flash memory configuration data corresponding to the target flash memory configuration option is determined, and a target logic region corresponding to the target flash memory configuration data is determined , and then configure and save the flash memory of the electronic device according to the target logical area.
  • the user can configure the flash memory flexibly and independently, improving the user experience.
  • FIG. 1 is one of schematic diagrams of a flash memory configuration interface provided by an embodiment of the present application.
  • FIG. 2 is a schematic flowchart of a flash memory configuration method provided by an embodiment of the present application
  • FIG. 3 is a schematic diagram of a flash memory configuration scenario provided according to the related art.
  • FIG. 4 is a schematic diagram of a flash memory configuration scenario provided by an embodiment of the present application.
  • FIG. 5 is a second schematic diagram of a flash memory configuration interface provided by an embodiment of the present application.
  • FIG. 6 is a third schematic diagram of a flash memory configuration interface provided by an embodiment of the present application.
  • FIG. 7 is a fourth schematic diagram of a flash memory configuration interface provided by an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a flash memory configuration device provided by an embodiment of the present application.
  • FIG. 9 is one of the schematic structural diagrams of the electronic device provided by the embodiment of the present application.
  • FIG. 10 is a second schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • first, second and the like in the description and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances so that the embodiments of the present application can be practiced in sequences other than those illustrated or described herein, and distinguish between “first”, “second”, etc.
  • the objects are usually of one type, and the number of objects is not limited.
  • the first object may be one or more than one.
  • “and/or” in the description and claims indicates at least one of the connected objects, and the character “/" generally indicates that the associated objects are in an "or” relationship.
  • the embodiments of the present application provide a flash memory configuration method, apparatus, electronic device, and storage medium, which can first receive a user's first input of a target flash memory configuration option, and determine a target in response to the first input.
  • the target flash memory configuration data corresponding to the flash memory configuration option is determined, and the target logical area corresponding to the target flash memory configuration data is determined, and then the flash memory of the electronic device is configured and saved according to the target logical area.
  • the user can configure the flash memory flexibly and independently, improving the user experience.
  • the flash memory configuration method provided in the embodiment of the present application may be applied to a flash memory configuration scenario of an electronic device such as a mobile phone, a tablet computer, a notebook computer, or a personal computer, which is not limited in this application.
  • an option of "flash memory personalization configuration” is displayed on the display interface of the electronic device, and the user can click on the option.
  • the electronic device may determine target flash configuration data corresponding to the target flash configuration option.
  • the target flash memory configuration data is a configuration parameter of the target logical area. Then, the target logical area corresponding to the target flash memory configuration data is determined, and the flash memory of the electronic device is configured and saved according to the target logical area, so as to meet the needs of the user to configure the flash memory independently.
  • FIG. 2 is a schematic flowchart of a flash memory configuration method provided by an embodiment of the present application. As shown in FIG. 2 , the flash memory configuration method can be applied to an electronic device, and the flash memory configuration method includes the following steps:
  • S210 Receive a first input of a target flash memory configuration option from a user.
  • the user may receive the first input of the target flash memory configuration option.
  • the target flash memory configuration option is an operation option provided by the electronic device to the user for flash memory configuration.
  • the flash memory may include UFS flash memory or an embedded multimedia controller (Embedded Multi Media Card, eMMC) or the like.
  • the electronic device may display an option of "flash memory personalization configuration" under the "system management” option of the setting interface for the user to operate.
  • the first input may be an operation on the target flash memory configuration option, such as clicking or long pressing, which is not specifically limited in this application.
  • the ratio of the unused running memory to the total running memory of the electronic device may be acquired, and the flash memory configuration data corresponding to the ratio is determined as the target flash memory configuration data
  • the target flash memory configuration data may be configuration parameters of the target logical area. In this way, appropriate flash memory configuration data can be determined based on the usage of the running memory for subsequent reasonable configuration of the flash memory.
  • the flash memory configuration level corresponding to the ratio may be determined according to the ratio and the preset ratio threshold, and the flash memory configuration data corresponding to the flash memory configuration level may be determined as the target flash memory configuration data. This allows precise determination of the target flash configuration data for flash configuration.
  • the flash memory configuration level corresponding to the ratio can be determined by judging the ratio between the multiple preset ratio thresholds, and then the flash memory configuration data corresponding to the flash memory configuration level is determined as the target flash memory configuration data.
  • the ratio of the unused running memory to the total running memory is T, and there are three preset ratio thresholds, which are t1, t2, and t3, and t1 ⁇ t2 ⁇ t3. If T ⁇ t1, determine that the flash memory configuration level corresponding to T is level 4; if t1 ⁇ T ⁇ t2, determine that the flash memory configuration level corresponding to T is level 3; if t2 ⁇ T ⁇ t3, determine that the flash memory configuration level corresponding to T is level 3 2; If T>t3, determine that the flash memory configuration level corresponding to T is level 1, so that the flash memory configuration data corresponding to the flash memory configuration level can be determined as the target flash memory configuration data.
  • a flash memory configuration level corresponding to the target flash memory configuration option may be determined, and the flash memory configuration data corresponding to the flash memory configuration level is determined as the target flash memory configuration data.
  • the target flash configuration option is bound to the flash configuration level. This allows the user to autonomously and intuitively determine the target flash configuration data for flash configuration based on the target flash configuration options.
  • a "level 1" option, a “level 2” option, a “level 3” option, and a “level 4" option are displayed on the display interface of the electronic device.
  • the electronic device determines the flash memory configuration level corresponding to the "level 1" option, that is, level 1, and determines level 1.
  • the corresponding flash configuration data is the target flash configuration data.
  • the target logical area is a logical area that needs to be configured in the flash memory of the electronic device.
  • the configuration method of flash memory results in that the configured logical area can only be a large logical area with consecutive logical addresses, and there may be some logical areas that do not need to be configured.
  • the logical regions in the UFS flash memory include HPB Region0, HPB Region1, ..., HPB RegionX .
  • HPB Pinned Regions are configured with only two fields (wHPBPinnedRegionStartIdx and wNumHPBPinnedRegions).
  • the HPB pinned region is a logical region that stores the mapping relationship between logical addresses and physical addresses in the running memory.
  • the target flash memory configuration data may include parameters such as the number of sub-logical region blocks, the identification of the sub-logical region blocks, the starting addresses of the sub-logical region blocks, and the number of logical regions in the sub-logical region blocks. Wherein, every two sub-logical region blocks are separated from each other, so at least one sub-logical region block corresponding to the target flash memory configuration data can be determined, and the logical region in the at least one sub-logical region block is determined as the target logical region. In this way, the logical area that does not need to be configured can be flexibly avoided by separating the sub-logical area blocks, and the waste of running memory can be solved.
  • the wCurHPBPinnedRegionArea field that is, the identifier of the sub-logical region block
  • the wMaxHPBPinnedRegionArea field that is, the number of sub-logical region blocks
  • the logical regions in the UFS flash memory include HPB Region0, HPB Region1, ..., HPB RegionX.
  • wMaxHPBPinnedRegionArea is 03h, and three separate sub-logic area blocks are configured.
  • wCurHPBPinnedRegionArea is 00h, indicating that the first sub-logical region block is configured
  • wHPBPinnedRegionStartIdx is the starting address of the sub-logical region block is 00h, indicating that the first sub-logical region block is configured from HPB Region0
  • wNumHPBPinnedRegions is the sub-logical region block in the configuration
  • the number of logical regions is 02h, indicating that the first sub-logical region block contains two consecutive HPB regions, and the first sub-logical region block includes HPB Region0 and HPB Region1
  • wCurHPBPinnedRegionArea is 01h, indicating that the second sub-logical region block is configured
  • wHPBPinnedRegionStartIdx is 03h, indicating that the second sub-logical region block is configured from HPB Region3
  • wNumHPBPinnedRegions is 01h, indicating that the second sub-logical region block contains 1 HPB region, and the second sub-logical
  • the mapping relationship between the logical address and the physical address of the target logical region may be stored in the running memory of the electronic device.
  • the mapping relationship of the target logical region can be stored in the target region in the running memory, which saves the time for reading the mapping relationship from the flash memory during the data reading process, and improves the data reading speed.
  • a first input of a target flash memory configuration option from a user may be received first, and in response to the first input, target flash memory configuration data corresponding to the target flash memory configuration option is determined, and a target logic region corresponding to the target flash memory configuration data is determined , and then configure and save the flash memory of the electronic device according to the target logical area.
  • the user can configure the flash memory flexibly and independently, improving the user experience.
  • the electronic device when the electronic device displays the “personalized memory configuration” option, the user can click the “personalized memory configuration” option, and then the electronic device will display the interface shown in FIG. 6 ,
  • the interface includes prompt information prompting the user whether to apply the system recommended solution.
  • the user can click the "OK" option to confirm to adopt the scheme recommended by the system. Based on this, the electronic device can determine the attribute data of the flash memory corresponding to the "OK" option.
  • the upper-level process in the electronic device can apply for 10,000 buffers.
  • the remaining ratio of available memory that is, the ratio of unused memory to all memory
  • the upper-layer process writes the data in the buffer into the target partition P.
  • the recorded data can be read from the target partition P and judged.
  • the average value T of the remaining memory ratios of all data is calculated. .
  • T ⁇ t1 determine "off” flash configuration level
  • t1 ⁇ T ⁇ t2 determine "default” flash configuration level
  • t2 ⁇ T ⁇ t3 determine "center” flash configuration level
  • T>t3 determine "" Maximum” flash configuration level.
  • the flash memory attribute data corresponding to the flash memory configuration level can be determined according to the preset correspondence between the flash memory configuration level and the flash memory attribute data, and the determined flash memory attribute data can be written into the target partition P.
  • the flash memory attribute data includes a flash memory configuration enable identifier and the number of logical areas to be configured, and the number of logical areas to be configured indicates the number of logical areas to be configured in the flash memory.
  • the corresponding relationship between the flash configuration level and the flash attribute data may be as follows:
  • bLuEnable indicates the flash configuration enable flag
  • wLUMaxActiveHPBRegions indicates the number of logical regions to be configured.
  • the electronic device when the user clicks the "Cancel” option, the electronic device will display the interface shown in Figure 7, prompting the user to select 4 different flash memory configuration levels, namely "off", “default”, “center” ",”maximum".
  • the electronic device can determine the flash memory configuration level corresponding to the "Default” option, that is, the "Default” flash memory configuration level, and set the "Default” flash memory configuration level to the "Default” option. ”
  • the flash attribute data corresponding to the flash configuration level is written into the target partition P.
  • the electronic device enters a restart process, reads the enable flag and the number of regions to be configured in the current properties of the UFS flash memory, that is, bLuEnable and wLUMaxActiveHPBRegions in the current properties of the UFS flash memory, and reads Take bLuEnable and wLUMaxActiveHPBRegions in the target partition. Determine whether bLuEnable and wLUMaxActiveHPBRegions in the current attribute of the UFS flash memory are the same as bLuEnable and wLUMaxActiveHPBRegions in the target partition P. If not, update bLuEnable and wLUMaxActiveHPBRegions in the target partition P to the attributes of the UFS flash memory.
  • the kernel determines the target flash memory configuration data corresponding to bLuEnable and wLUMaxActiveHPBRegions in the properties of the UFS flash memory, and determines at least one sub-logical region block corresponding to the target flash memory configuration data.
  • the sum of the number of logical regions in all sub-logical region blocks is equal to the number of logical regions to be configured, and then the logical region in the sub-logical region block is used as the target logical region, and the HPB entry of the target logical region is stored in the running memory.
  • the electronic device displays the main interface, and the configuration is complete.
  • the execution body may be a flash memory configuration device applied to an electronic device, or a control module in the flash memory configuration device for executing the flash memory configuration method;
  • a flash memory configuration apparatus applied to an electronic device performs a flash memory configuration method as an example to describe the flash memory configuration apparatus applied to an electronic device provided by the embodiments of the present application.
  • FIG. 8 is a schematic structural diagram of a flash memory configuration apparatus provided by an embodiment of the present application. As shown in FIG. 8 , the flash memory configuration apparatus 800 includes:
  • the receiving module 810 is configured to receive the first input of the target flash memory configuration option from the user.
  • the determining module 820 is configured to, in response to the first input, determine target flash memory configuration data corresponding to the target flash memory configuration option.
  • the determining module 820 is further configured to determine a target logical area corresponding to the target flash memory configuration data.
  • the configuration module 830 is configured to configure and save the flash memory of the electronic device according to the target logical area.
  • a first input of a target flash memory configuration option from a user may be received first, and in response to the first input, target flash memory configuration data corresponding to the target flash memory configuration option is determined, and a target logic region corresponding to the target flash memory configuration data is determined , and then configure and save the flash memory of the electronic device according to the target logical area.
  • the user can configure the flash memory flexibly and independently, improving the user experience.
  • the determining module 820 includes: an obtaining unit, configured to obtain a ratio of the unused running memory to the total running memory of the electronic device in response to the first input.
  • the first determining unit is configured to determine that the flash memory configuration data corresponding to the ratio is the target flash memory configuration data. In this way, appropriate flash memory configuration data can be determined based on the usage of the running memory for subsequent reasonable configuration of the flash memory.
  • the first determining unit is specifically configured to determine a flash memory configuration level corresponding to the ratio according to the ratio and a preset ratio threshold.
  • the determining module 820 includes: a second determining unit, configured to determine a flash memory configuration level corresponding to the target flash memory configuration option in response to the first input.
  • the second determining unit is further configured to determine that the flash memory configuration data corresponding to the flash memory configuration level is the target flash memory configuration data. This allows the user to autonomously and intuitively determine the target flash configuration data for flash configuration based on the target flash configuration options.
  • the target flash configuration data includes the number of sub-logical region blocks, the identification of the sub-logical region block, the starting address of the sub-logical region block, and the number of logical regions in the sub-logical region block.
  • the determining module 820 includes: a third determining unit, configured to determine at least one sub-logical region block corresponding to the target flash memory configuration data.
  • the third determining unit is further configured to determine the logical area in the at least one sub-logical area block as the target logical area. In this way, the logical area that does not need to be configured can be flexibly avoided by separating the sub-logical area blocks, and the waste of running memory can be solved.
  • the configuration module 830 includes: a storage unit, configured to store the mapping relationship between the logical address and the physical address of the target logical area to the running memory of the electronic device, so as to save reading the mapping from the flash memory during the data reading process Relationship time, improve data read speed.
  • the flash memory includes UFS flash memory.
  • the flash memory configuration apparatus 800 in this embodiment of the present application may be an apparatus, or may be a component, an integrated circuit, or a chip in a terminal.
  • the apparatus may be a mobile electronic device or a non-mobile electronic device.
  • the mobile electronic device may be a mobile phone, a tablet computer, a notebook computer, a palmtop computer, an in-vehicle electronic device, a wearable device, an Ultra-Mobile Personal Computer (UMPC), a netbook, or a personal digital assistant (Personal Digital Assistant).
  • UMPC Ultra-Mobile Personal Computer
  • netbook or a personal digital assistant (Personal Digital Assistant).
  • non-mobile electronic devices can be servers, network attached storage (Network Attached Storage, NAS), personal computer (Personal Computer, PC), television (Television, TV), teller machine or self-service machine, etc., this application Examples are not specifically limited.
  • Network Attached Storage NAS
  • PC Personal Computer
  • TV Television, TV
  • teller machine or self-service machine etc.
  • the flash memory configuration apparatus 800 in this embodiment of the present application may be an apparatus, or may be a component, an integrated circuit, or a chip in a terminal.
  • the flash memory configuration apparatus 800 in this embodiment of the present application may be an apparatus having an operating system.
  • the operating system may be an Android (Android) operating system, an IOS operating system, or other possible operating systems, which are not specifically limited in the embodiments of the present application.
  • the flash memory configuration apparatus 800 provided in this embodiment of the present application can implement each process implemented by the method embodiments in FIG. 2 to FIG. 7 , and to avoid repetition, details are not repeated here.
  • an embodiment of the present application further provides an electronic device 900, including a processor 901, a memory 902, a program or an instruction stored in the memory 902 and executable on the processor 901, and the program or instruction is processed
  • an electronic device 900 including a processor 901, a memory 902, a program or an instruction stored in the memory 902 and executable on the processor 901, and the program or instruction is processed
  • the device 901 is executed, each process of the above embodiments of the flash memory configuration method is implemented, and the same technical effect can be achieved. To avoid repetition, details are not described here.
  • the electronic devices in the embodiments of the present application include mobile electronic devices and non-mobile electronic devices.
  • FIG. 10 is a schematic diagram of a hardware structure of an electronic device provided by an embodiment of the present application.
  • the electronic device 1000 includes but is not limited to: a radio frequency unit 1001, a network module 1002, an audio output unit 1003, an input unit 1004, a sensor 1005, display unit 1006, user input unit 1007, interface unit 1008, memory 1009, processor 1010 and other components.
  • the electronic device 1000 may also include a power source (such as a battery) for supplying power to various components, and the power source may be logically connected to the processor 1010 through a power management system, so that the power management system can manage charging, discharging, and power functions. consumption management and other functions.
  • a power source such as a battery
  • the power management system can manage charging, discharging, and power functions. consumption management and other functions.
  • the structure of the electronic device shown in FIG. 10 does not constitute a limitation on the electronic device, and the electronic device may include more or less components than the one shown, or combine some components, or arrange different components, which will not be repeated here. .
  • the user input unit 1007 is configured to receive the first input from the user on the configuration options of the target flash memory.
  • the processor 1010 is configured to, in response to the first input, determine target flash memory configuration data corresponding to the target flash memory configuration option.
  • the processor 1010 is further configured to determine a target logical area corresponding to the target flash memory configuration data.
  • the processor 1010 is configured to configure and save the flash memory of the electronic device according to the target logical area.
  • a first input of a target flash memory configuration option from a user may be received first, and in response to the first input, target flash memory configuration data corresponding to the target flash memory configuration option is determined, and a target logic region corresponding to the target flash memory configuration data is determined , and then configure and save the flash memory of the electronic device according to the target logical area.
  • the user can configure the flash memory flexibly and independently, improving the user experience.
  • the processor 1010 is specifically configured to, in response to the first input, obtain a ratio of the unused operating memory to the total operating memory of the electronic device.
  • the processor 1010 is specifically configured to determine a flash memory configuration level corresponding to the ratio according to the ratio and a preset ratio threshold.
  • the processor 1010 is specifically configured to determine the flash configuration level corresponding to the target flash configuration option in response to the first input.
  • the target flash configuration data includes the number of sub-logical region blocks, the identification of the sub-logical region block, the starting address of the sub-logical region block, and the number of logical regions in the sub-logical region block.
  • the processor 1010 is specifically configured to determine at least one sub-logical region block corresponding to the target flash memory configuration data.
  • a logical area in at least one sub-logical area block is determined as a target logical area. In this way, the logical area that does not need to be configured can be flexibly avoided by separating the sub-logical area blocks, and the waste of running memory can be solved.
  • the processor 1010 is specifically configured to store the mapping relationship between the logical address and the physical address of the target logical region to the running memory of the electronic device, so as to save the time of reading the mapping relationship from the flash memory during the data reading process , to improve the data reading speed.
  • the flash memory includes UFS flash memory.
  • the input unit 1004 may include a graphics processor (Graphics Processing Unit, GPU) and a microphone, and the graphics processor can be used to capture data from an image capture device (such as a camera) in a video capture mode or an image capture mode.
  • the acquired still picture or video image data is processed.
  • the display unit 1006 may include a display panel, which may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like.
  • the user input unit 1007 includes a touch panel and other input devices. Touch panel, also known as touch screen.
  • the touch panel may include two parts, a touch detection device and a touch controller.
  • Memory 1009 may be used to store software programs as well as various data, including but not limited to application programs and operating systems.
  • the processor 1010 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface, and application programs, and the like, and the modem processor mainly processes wireless communication. It can be understood that, the above-mentioned modulation and demodulation processor may not be integrated into the processor 1010.
  • Embodiments of the present application further provide a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or instruction is executed by a processor, each process of the foregoing flash memory configuration method embodiment is implemented, and the same technology can be achieved. The effect, in order to avoid repetition, is not repeated here.
  • the processor is the processor in the electronic device in the above embodiment.
  • the readable storage medium includes a computer-readable storage medium, such as a computer read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk or an optical disk, and the like.
  • An embodiment of the present application further provides a chip, where the chip includes a processor and a communication interface, the communication interface is coupled with the processor, and the processor is used for running a program or an instruction to implement each process of the foregoing flash memory configuration method embodiment, and can achieve the same The technical effect, in order to avoid repetition, will not be repeated here.
  • the chip mentioned in the embodiments of the present application may also be referred to as a system-on-chip, a system-on-chip, a system-on-a-chip, or a system-on-a-chip, or the like.
  • processors may be, but are not limited to, general purpose processors, special purpose processors, application specific processors, or field programmable logic circuits. It will also be understood that each block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can also be implemented by special purpose hardware for performing the specified functions or actions, or by special purpose hardware and/or A combination of computer instructions is implemented.
  • the method of the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is better implementation.
  • the technical solution of the present application can be embodied in the form of a software product in essence or in a part that contributes to the prior art, and the computer software product is stored in a storage medium (such as ROM/RAM, magnetic disk, CD-ROM), including several instructions to make a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) execute the methods described in the various embodiments of this application.
  • a storage medium such as ROM/RAM, magnetic disk, CD-ROM

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Abstract

本申请公开了一种闪存配置方法、装置、电子设备和存储介质，属于电子设备技术领域。该方法包括：接收用户对目标闪存配置选项的第一输入；响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据；确定目标闪存配置数据对应的目标逻辑区域；根据目标逻辑区域对电子设备的闪存进行配置并保存。

Description

闪存配置方法、装置、电子设备和存储介质
相关申请的交叉引用
本申请主张2021年3月19日在中国提交的中国专利申请号202110296039.2的优先权，其全部内容通过引用包含于此。
技术领域
本申请属于电子设备技术领域，具体涉及一种闪存配置方法、装置、电子设备和存储介质。
背景技术
在手机、平板电脑等电子设备成为用户日常生活必需品的情况下，电子设备技术的发展日新月异。其中，电子设备中使用的存储技术已经发展到了通用闪存存储(Universal Flash Storage，UFS)3.1。但是，UFS闪存在出厂时就已配置好，后续用户无法自主配置UFS闪存，用户使用体验较差。
发明内容
本申请实施例的目的是提供一种闪存配置方法、装置、电子设备和存储介质，能够使用户灵活自主地配置闪存。
第一方面，本申请实施例提供了一种闪存配置方法，该方法包括：
接收用户对目标闪存配置选项的第一输入；
响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据；
确定目标闪存配置数据对应的目标逻辑区域；
根据目标逻辑区域对电子设备的闪存进行配置并保存。
第二方面，本申请实施例提供了一种闪存配置装置，该装置包括：
接收模块，用于接收用户对目标闪存配置选项的第一输入；
确定模块，用于响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据；
确定模块，还用于确定目标闪存配置数据对应的目标逻辑区域；
配置模块，用于根据目标逻辑区域对电子设备的闪存进行配置并保存。
第三方面，本申请实施例提供了一种电子设备，该电子设备包括处理器、存储器及存储在存储器上并可在处理器上运行的程序或指令，程序或指令被处理器执行时实现如第一方面的方法的步骤。
第四方面，本申请实施例提供了一种可读存储介质，可读存储介质上存储程序或指令，程序或指令被处理器执行时实现如第一方面的方法的步骤。
第五方面，本申请实施例提供了一种芯片，芯片包括处理器和通信接口，通信接口和处理器耦合，处理器用于运行程序或指令，实现如第一方面的方法。
在本申请实施例中，可以先接收用户对目标闪存配置选项的第一输入，响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据，并确定目标闪存配置数据对应的目标逻辑区域，然后根据目标逻辑区域对电子设备的闪存进行配置并保存。如此可以使用户灵活自主地配置闪存，提高用户使用体验。
附图说明
图1是本申请实施例提供的闪存配置界面的示意图之一；
图2是本申请实施例提供的闪存配置方法的流程示意图；
图3是根据相关技术提供的闪存配置场景的示意图；
图4是本申请实施例提供的闪存配置场景的示意图；
图5是本申请实施例提供的闪存配置界面的示意图之二；
图6是本申请实施例提供的闪存配置界面的示意图之三；
图7是本申请实施例提供的闪存配置界面的示意图之四；
图8是本申请实施例的提供的闪存配置装置的结构示意图；
图9是本申请实施例的提供的电子设备的结构示意图之一；
图10是本申请实施例的提供的电子设备的结构示意图之二。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”、“第二”等是用于区别类似的对象，而不用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施，且“第一”、“第二”等所区分的对象通常为一类，并不限定对象的个数，例如第一对象可以是一个，也可以是多个。此外，说明书以及权利要求中“和/或”表示所连接对象的至少其中之一，字符“/”，一般表示前后关联对象是一种“或”的关系。
针对背景技术中出现的问题，本申请实施例提供了一种闪存配置方法、装置、电子设备和存储介质，可以先接收用户对目标闪存配置选项的第一输入，响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据，并确定目标闪存配置数据对应的目标逻辑区域，然后根据目标逻辑区域对电子设备的闪存进行配置并保存。如此可以使用户灵活自主地配置闪存，提高用户使用体验。
下面结合附图，通过具体的实施例及其应用场景对本申请实施例提供的闪存配置方法、装置、电子设备和存储介质进行详细地说明。
作为一个示例，本申请实施例提供的闪存配置方法可以应用于手机、平板电脑、笔记本电脑或者个人计算机等电子设备的闪存配置场景，本申请在此不做限制。
示例性地，如图1所示，电子设备的显示界面上显示“闪存个性化配置”选项，用户可以对该选项进行点击。响应于用户的点击输入，电子设备可以确定目标闪存配置选项对应的目标闪存配置数据。其中，目标闪存配置数据是目标逻辑区域的配置参数。然后确定目标闪存配置数据对应的目标逻辑区域，根 据目标逻辑区域对电子设备的闪存进行配置并保存，满足用户自主配置闪存的需求。
图2是本申请实施例提供的一种闪存配置方法的流程示意图，如图2所示，该闪存配置方法可以应用于电子设备，该闪存配置方法包括以下步骤：
S210，接收用户对目标闪存配置选项的第一输入。
具体地，在电子设备显示目标闪存配置选项的情况下，可以接收用户对目标闪存配置选项的第一输入。其中，目标闪存配置选项是电子设备提供给用户用于闪存配置的操作选项。可选地，闪存可以包括UFS闪存或者嵌入式多媒体控制器(Embedded Multi Media Card，eMMC)等等。
示例性地，如图1所示，电子设备可以在设置界面的“系统管理”选项下显示“闪存个性化配置”选项，以供用户操作。
其中，第一输入可以是点击或者长按等对目标闪存配置选项的操作，本申请在此不做具体限定。
S220，响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据。
在一个实施例中，响应于第一输入，可以获取电子设备的未使用运行内存与全部运行内存的比值，确定比值对应的闪存配置数据为目标闪存配置数据，
其中，目标闪存配置数据可以是目标逻辑区域的配置参数。如此可以根据运行内存的使用情况确定合适的闪存配置数据，以用于后续闪存的合理配置。
示例性地，可以根据比值与预设比值阈值，确定比值对应的闪存配置等级，并确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。如此可以精确确定用于闪存配置的目标闪存配置数据。
在一个实施例中，可以通过判断比值与多个预设比值阈值之间的大小，确定比值对应的闪存配置等级，进而确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。
作为一个示例，未使用运行内存与全部运行内存的比值为T，存在3个预设比值阈值，分别为t1、t2、t3，且t1<t2<t3。如果T<t1，确定T对应的闪存配置等级为等级4；如果t1<T<t2，确定T对应的闪存配置等级为等级3；如果 t2<T<t3，确定T对应的闪存配置等级为等级2；如果T>t3，确定T对应的闪存配置等级为等级1，从而可以确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。
在另一个实施例中，响应于第一输入，可以确定目标闪存配置选项对应的闪存配置等级，确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。
其中，目标闪存配置选项与闪存配置等级绑定。如此可以根据目标闪存配置选项，使用户自主直观地确定用于闪存配置的目标闪存配置数据。
作为一个示例，电子设备的显示界面上显示“等级1”选项、“等级2”选项、“等级3”选项和“等级4”选项。用户点击“等级1”选项，将“等级1”选项作为目标闪存配置选项，电子设备响应于用户点击“等级1”选项，确定“等级1”选项对应的闪存配置等级即等级1，确定等级1对应的闪存配置数据为目标闪存配置数据。
S230，确定目标闪存配置数据对应的目标逻辑区域。
其中，目标逻辑区域是电子设备的闪存中需要配置的逻辑区域。
目前，闪存配置方式会导致配置的逻辑区域只能是逻辑地址连续的一大块逻辑区域，其中可能存在一些不需要配置的逻辑区域。
在一个示例中，以UFS闪存中的主机性能提升器(Host Performance Booster，HPB)的配置为例，如图3所示，UFS闪存中的逻辑区域包括HPB Region0、HPB Region1、……、HPB RegionX。目前配置HPB固定区域(HPB Pinned Regions)只有两个字段(wHPBPinnedRegionStartIdx和wNumHPBPinnedRegions)，其中，HPB固定区域为将逻辑地址与物理地址的映射关系存储至运行内存的逻辑区域。wHPBPinnedRegionStartIdx＝00h表示HPB固定区域从HPB Region0开始配置，wNumHPBPinnedRegions＝03h表示HPB固定区域包含连续的3个HPB Regions。也就是说，HPB固定区域包括HPB Region0、HPB Region1和HPB Region2。假如图3中的HPB Region1不需要配置，以目前的闪存配置方式来说，并不能将其规避，如此将会造成运行内存的浪费。
因此在一个实施例中，目标闪存配置数据可以包括子逻辑区域块的数量、子逻辑区域块的标识、子逻辑区域块的起始地址和子逻辑区域块中的逻辑区域的数量等参数。其中，每两个子逻辑区域块相互分离，因此可以确定目标闪存配置数据对应的至少一个子逻辑区域块，并确定至少一个子逻辑区域块中的逻辑区域为目标逻辑区域。如此可以通过分离的子逻辑区域块，灵活规避无需配置的逻辑区域，解决运行内存的浪费问题。
在一个实施例中，仍以UFS闪存中的HPB的配置为例，可以增加wCurHPBPinnedRegionArea字段即子逻辑区域块的标识，来表示当前配置的是第几块分离的子逻辑区域块作为HPB固定区域，增加wMaxHPBPinnedRegionArea字段即子逻辑区域块的数量，来表示最大能够配置多少块分离的子逻辑区域块作为HPB固定区域。
示例性地，如图4所示，UFS闪存中的逻辑区域包括HPB Region0、HPB Region1、……、HPB RegionX。wMaxHPBPinnedRegionArea为03h，配置出了三块分离式的子逻辑区域块。其中，wCurHPBPinnedRegionArea为00h，表示配置第一块子逻辑区域块，wHPBPinnedRegionStartIdx即子逻辑区域块的起始地址为00h，表示第一子逻辑区域块从HPB Region0开始配置，wNumHPBPinnedRegions即子逻辑区域块中的逻辑区域的数量为02h，表示第一子逻辑区域块包含连续的2个HPB regions，第一子逻辑区域块包括HPB Region0和HPB Region1；wCurHPBPinnedRegionArea为01h，表示配置第二块子逻辑区域块，wHPBPinnedRegionStartIdx为03h，表示第二子逻辑区域块从HPB Region3开始配置，wNumHPBPinnedRegions为01h，表示第二子逻辑区域块包含1个HPB regions，第二子逻辑区域块包括HPB Region3；wCurHPBPinnedRegionArea为02h，表示配置第三块子逻辑区域块，wHPBPinnedRegionStartIdx为Nh，表示第三子逻辑区域块从HPB RegionN开始配置，wNumHPBPinnedRegions为03h，表示第三子逻辑区域块包含连续的3个HPB regions，第三子逻辑区域块包括HPB RegionN、HPB Region(N+1)和HPB Region(N+2)。进而可以确定第一子逻辑区域块、第二子逻辑区域块 和第三子逻辑区域块中的逻辑区域为目标逻辑区域。
S240，根据目标逻辑区域对电子设备的闪存进行配置并保存。
在一个实施例中，可以将目标逻辑区域的逻辑地址与物理地址的映射关系存储至电子设备的运行内存。具体地，可以将目标逻辑区域的映射关系存储至运行内存中的目标区域，节省在数据读取过程中从闪存中读取映射关系的时间，提高数据读取速度。
在本申请实施例中，可以先接收用户对目标闪存配置选项的第一输入，响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据，并确定目标闪存配置数据对应的目标逻辑区域，然后根据目标逻辑区域对电子设备的闪存进行配置并保存。如此可以使用户灵活自主地配置闪存，提高用户使用体验。
下面以UFS闪存中的HPB的配置为例，对本申请实施例提供的闪存配置方法进行详细说明，具体如下：
在一个示例中，如图5所示，在电子设备显示“存储器个性化配置”选项的情况下，用户可以点击“存储器个性化配置”选项，之后电子设备会显示如图6所示的界面，该界面包括提示用户是否应用系统推荐方案的提示信息。用户可以点击“确定”选项，确定采用系统推荐的方案。基于此，电子设备可以确定“确定”选项对应的闪存属性数据。
具体地，电子设备中的上层进程可以申请10000缓存(buffer)，在电子设备亮屏的情况下，每隔1分钟统计一次可用内存剩余比值，也即未使用内存与全部内存的比值，写入buffer，超过10000次后再写入第1次的位置。每次电子设备关机的时候，上层进程将buffer中的数据写入目标分区P。在确定闪存属性数据时，可以从目标分区P读出记录的数据并进行判断，在目标分区P中的可用内存剩余比值数据大于10000条的情况下，计算所有数据的内存剩余比值的平均值T。例如，存在3个预设比值阈值，分别为t1、t2、t3，且t1<t2<t3。如果T<t1，确定“关闭”闪存配置等级；如果t1<T<t2，确定“默认”闪存配置等级；如果t2<T<t3，确定“居中”闪存配置等级；如果T>t3，确定“最大”闪存配置等级。
可以理解，在目标分区P中的可用内存剩余比值数据小于10000条的情况下，可以确定“默认”闪存配置等级。从而可以根据预设的闪存配置等级与闪存属性数据的对应关系，确定闪存配置等级对应的闪存属性数据，将确定的闪存属性数据写入目标分区P。其中，闪存属性数据包括闪存配置使能标识和待配置逻辑区域数量，待配置逻辑区域数量表示闪存中将要配置的逻辑区域的数量。
其中，闪存配置等级与闪存属性数据的对应关系可以如下：
“关闭”：bLuEnable＝1，wLUMaxActiveHPBRegions＝0；
“默认”：bLuEnable＝2，wLUMaxActiveHPBRegions＝2048；
“居中”：bLuEnable＝2，wLUMaxActiveHPBRegions＝4096；
“最大”：bLuEnable＝2，wLUMaxActiveHPBRegions＝8192。
其中，bLuEnable表示闪存配置使能标识，wLUMaxActiveHPBRegions表示待配置逻辑区域数量。
示例性地，在用户点击“取消”选项的情况下，电子设备会显示如图7所示的界面，提示用户选择4种不同的闪存配置等级，分别为“关闭”、“默认”、“居中”、“最大”。
在一个示例中，以UFS闪存为256GB的手机为例，在用户点击“关闭”选项的情况下，电子设备会告知用户：“该操作会关闭UFS HPB功能，会降低数据读取速度，但是不会占用运行内存”；在用户点击“默认”选项的情况下，电子设备会告知用户：“该操作会打开HPB功能，会提高对于HPB入口(HPB entry)即UFS中的逻辑区域的逻辑地址与物理地址的映射关系的缓存命中率，提高数据读取速度，但是会占用64M运行内存”；在用户点击“居中”选项的情况下，电子设备会告知用户：“该操作会打开HPB功能，会提高对于HPB入口的缓存命中率，提高数据读取速度，但是会占用128M运行内存”；在用户点击“最大”选项的情况下，电子设备会告知用户：“该操作会打开HPB功能，会提高对于HPB入口的缓存命中率，提高数据读取速度，但是会占用256M运行内存”。如图7所示，在用户点击了“默认”选项，且点击了“确定”选项的 情况下，电子设备可以确定“默认”选项对应的闪存配置等级即“默认”闪存配置等级，将“默认”闪存配置等级对应的闪存属性数据写入目标分区P。
在一个实施例中，电子设备进入重启过程，在启动加载(Boot Loader)阶段读取UFS闪存当前属性中的使能标识与待配置区域数量，即UFS闪存当前属性中的bLuEnable和wLUMaxActiveHPBRegions，并且读取目标分区中的bLuEnable和wLUMaxActiveHPBRegions。判断UFS闪存当前属性中的bLuEnable和wLUMaxActiveHPBRegions与目标分区P中的bLuEnable和wLUMaxActiveHPBRegions是否相同。若不相同，则将目标分区P中的bLuEnable和wLUMaxActiveHPBRegions更新至UFS闪存的属性中。若相同，则不更新。然后启动电子设备的内核，内核初始化UFS闪存过程中，确定UFS闪存的属性中的bLuEnable和wLUMaxActiveHPBRegions对应的目标闪存配置数据，并确定该目标闪存配置数据对应的至少一个子逻辑区域块。其中，全部子逻辑区域块中的逻辑区域的数量之和等于待配置逻辑区域数量，进而将子逻辑区域块中的逻辑区域作为目标逻辑区域，并将目标逻辑区域的HPB入口存储至运行内存。电子设备显示主界面，配置完成。
需要说明的是，本申请实施例提供的闪存配置方法，执行主体可以为应用于电子设备的闪存配置装置，或者该闪存配置装置中用于执行闪存配置方法的控制模块；本申请实施例中以应用于电子设备的闪存配置装置执行闪存配置方法为例，说明本申请实施例提供的应用于电子设备的闪存配置装置。
图8是本申请实施例提供的闪存配置装置的结构示意图，如图8所示，该闪存配置装置800包括：
接收模块810，用于接收用户对目标闪存配置选项的第一输入。
确定模块820，用于响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据。
确定模块820，还用于确定目标闪存配置数据对应的目标逻辑区域。
配置模块830，用于根据目标逻辑区域对电子设备的闪存进行配置并保存。
在本申请实施例中，可以先接收用户对目标闪存配置选项的第一输入，响 应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据，并确定目标闪存配置数据对应的目标逻辑区域，然后根据目标逻辑区域对电子设备的闪存进行配置并保存。如此可以使用户灵活自主地配置闪存，提高用户使用体验。
在一个实施例中，确定模块820包括：获取单元，用于响应于第一输入，获取电子设备的未使用运行内存与全部运行内存的比值。
第一确定单元，用于确定比值对应的闪存配置数据为目标闪存配置数据。如此可以根据运行内存的使用情况确定合适的闪存配置数据，以用于后续闪存的合理配置。
在一个实施例中，第一确定单元，具体用于根据比值与预设比值阈值，确定比值对应的闪存配置等级。
确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。如此可以精确确定用于闪存配置的目标闪存配置数据。
在一个实施例中，确定模块820包括：第二确定单元，用于响应于第一输入，确定目标闪存配置选项对应的闪存配置等级。
第二确定单元，还用于确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。如此可以根据目标闪存配置选项，使用户自主直观地确定用于闪存配置的目标闪存配置数据。
在一个实施例中，目标闪存配置数据包括子逻辑区域块的数量、子逻辑区域块的标识、子逻辑区域块的起始地址和子逻辑区域块中的逻辑区域的数量。
确定模块820包括：第三确定单元，用于确定目标闪存配置数据对应的至少一个子逻辑区域块。
第三确定单元，还用于确定至少一个子逻辑区域块中的逻辑区域为目标逻辑区域。如此可以通过分离的子逻辑区域块，灵活规避无需配置的逻辑区域，解决运行内存的浪费问题。
在一个实施例中，配置模块830包括：存储单元，用于将目标逻辑区域的逻辑地址与物理地址的映射关系存储至电子设备的运行内存，节省在数据读取过程中从闪存中读取映射关系的时间，提高数据读取速度。
在一个实施例中，闪存包括UFS闪存。
本申请实施例中的闪存配置装置800可以是装置，也可以是终端中的部件、集成电路、或芯片。该装置可以是移动电子设备，也可以为非移动电子设备。示例性的，移动电子设备可以为手机、平板电脑、笔记本电脑、掌上电脑、车载电子设备、可穿戴设备、超级移动个人计算机(Ultra-Mobile Personal Computer，UMPC)、上网本或者个人数字助理(Personal Digital Assistant，PDA)等，非移动电子设备可以为服务器、网络附属存储器(Network Attached Storage，NAS)、个人计算机(Personal Computer，PC)、电视机(Television，TV)、柜员机或者自助机等，本申请实施例不作具体限定。
本申请实施例中的闪存配置装置800可以是装置，也可以是终端中的部件、集成电路、或芯片。
本申请实施例中的闪存配置装置800可以为具有操作系统的装置。该操作系统可以为安卓(Android)操作系统，可以为IOS操作系统，还可以为其他可能的操作系统，本申请实施例不作具体限定。
本申请实施例提供的闪存配置装置800能够实现图2至图7的方法实施例实现的各个过程，为避免重复，这里不再赘述。
如图9所示，本申请实施例还提供一种电子设备900，包括处理器901，存储器902，存储在存储器902上并可在处理器901上运行的程序或指令，该程序或指令被处理器901执行时实现上述闪存配置方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要注意的是，本申请实施例中的电子设备包括移动电子设备和非移动电子设备。
图10是本申请实施例的提供的电子设备的硬件结构示意图，如图10所示，该电子设备1000包括但不限于：射频单元1001、网络模块1002、音频输出单元1003、输入单元1004、传感器1005、显示单元1006、用户输入单元1007、接口单元1008、存储器1009以及处理器1010等部件。
本领域技术人员可以理解，电子设备1000还可以包括给各个部件供电的 电源(比如电池)，电源可以通过电源管理系统与处理器1010逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。图10中示出的电子设备结构并不构成对电子设备的限定，电子设备可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置，在此不再赘述。
其中，用户输入单元1007，用于接收用户对目标闪存配置选项的第一输入。
处理器1010，用于响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据。
处理器1010，还用于确定目标闪存配置数据对应的目标逻辑区域。
处理器1010，用于根据目标逻辑区域对电子设备的闪存进行配置并保存。
在本申请实施例中，可以先接收用户对目标闪存配置选项的第一输入，响应于第一输入，确定目标闪存配置选项对应的目标闪存配置数据，并确定目标闪存配置数据对应的目标逻辑区域，然后根据目标逻辑区域对电子设备的闪存进行配置并保存。如此可以使用户灵活自主地配置闪存，提高用户使用体验。
在一个实施例中，处理器1010，具体用于响应于第一输入，获取电子设备的未使用运行内存与全部运行内存的比值。
确定比值对应的闪存配置数据为目标闪存配置数据。如此可以根据运行内存的使用情况确定合适的闪存配置数据，以用于后续闪存的合理配置。
在一个实施例中，处理器1010，具体用于根据比值与预设比值阈值，确定比值对应的闪存配置等级。
确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。如此可以精确确定用于闪存配置的目标闪存配置数据。
在一个实施例中，处理器1010，具体用于响应于第一输入，确定目标闪存配置选项对应的闪存配置等级。
确定闪存配置等级对应的闪存配置数据为目标闪存配置数据。如此可以根据目标闪存配置选项，使用户自主直观地确定用于闪存配置的目标闪存配置数据。
在一个实施例中，目标闪存配置数据包括子逻辑区域块的数量、子逻辑区 域块的标识、子逻辑区域块的起始地址和子逻辑区域块中的逻辑区域的数量。
处理器1010，具体用于确定目标闪存配置数据对应的至少一个子逻辑区域块。
确定至少一个子逻辑区域块中的逻辑区域为目标逻辑区域。如此可以通过分离的子逻辑区域块，灵活规避无需配置的逻辑区域，解决运行内存的浪费问题。
在一个实施例中，处理器1010，具体用于将目标逻辑区域的逻辑地址与物理地址的映射关系存储至电子设备的运行内存，节省在数据读取过程中从闪存中读取映射关系的时间，提高数据读取速度。
在一个实施例中，闪存包括UFS闪存。
应理解的是，本申请实施例中，输入单元1004可以包括图形处理器(Graphics Processing Unit，GPU)和麦克风，图形处理器对在视频捕获模式或图像捕获模式中由图像捕获装置(如摄像头)获得的静态图片或视频的图像数据进行处理。显示单元1006可包括显示面板，可以采用液晶显示器、有机发光二极管等形式来配置显示面板。用户输入单元1007包括触控面板以及其他输入设备。触控面板，也称为触摸屏。触控面板可包括触摸检测装置和触摸控制器两个部分。其他输入设备可以包括但不限于物理键盘、功能键(比如音量控制按键、开关按键等)、轨迹球、鼠标、操作杆，在此不再赘述。存储器1009可用于存储软件程序以及各种数据，包括但不限于应用程序和操作系统。处理器1010可集成应用处理器和调制解调处理器，其中，应用处理器主要处理操作系统、用户界面和应用程序等，调制解调处理器主要处理无线通信。可以理解的是，上述调制解调处理器也可以不集成到处理器1010中。
本申请实施例还提供一种可读存储介质，可读存储介质上存储有程序或指令，该程序或指令被处理器执行时实现上述闪存配置方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
其中，处理器为上述实施例中的电子设备中的处理器。可读存储介质，包括计算机可读存储介质，如计算机只读存储器(Read-Only Memory，ROM)、 随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等。
本申请实施例另提供了一种芯片，芯片包括处理器和通信接口，通信接口和处理器耦合，处理器用于运行程序或指令，实现上述闪存配置方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
应理解，本申请实施例提到的芯片还可以称为系统级芯片、系统芯片、芯片系统或片上系统芯片等。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。此外，需要指出的是，本申请实施方式中的方法和装置的范围不限按示出或讨论的顺序来执行功能，还可包括根据所涉及的功能按基本同时的方式或按相反的顺序来执行功能，例如，可以按不同于所描述的次序来执行所描述的方法，并且还可以添加、省去、或组合各种步骤。另外，参照某些示例所描述的特征可在其他示例中被组合。
上面参考根据本申请的实施例的方法、装置(系统)和计算机程序产品的流程图和/或框图描述了本申请的各方面。应当理解，流程图和/或框图中的每个方框以及流程图和/或框图中各方框的组合可以由计算机程序指令实现。这些计算机程序指令可被提供给通用计算机、专用计算机、或其它可编程数据处理装置的处理器，以产生一种机器，使得经由计算机或其它可编程数据处理装置的处理器执行的这些指令使能对流程图和/或框图的一个或多个方框中指定的功能/动作的实现。这种处理器可以是但不限于是通用处理器、专用处理器、特殊应用处理器或者现场可编程逻辑电路。还可理解，框图和/或流程图中的每个方框以及框图和/或流程图中的方框的组合，也可以由执行指定的功能或动作的专用硬件来实现，或可由专用硬件和计算机指令的组合来实现。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实 施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本申请各个实施例所述的方法。
上面结合附图对本申请的实施例进行了描述，但是本申请并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本申请的启示下，在不脱离本申请宗旨和权利要求所保护的范围情况下，还可做出很多形式，均属于本申请的保护之内。

Claims (19)

  1. 一种闪存配置方法，包括：
    接收用户对目标闪存配置选项的第一输入；
    响应于所述第一输入，确定所述目标闪存配置选项对应的目标闪存配置数据；
    确定所述目标闪存配置数据对应的目标逻辑区域；
    根据所述目标逻辑区域对电子设备的闪存进行配置并保存。
  2. 根据权利要求1所述的方法，其中，所述响应于所述第一输入，确定所述目标闪存配置选项对应的目标闪存配置数据，包括：
    响应于所述第一输入，获取所述电子设备的未使用运行内存与全部运行内存的比值；
    确定所述比值对应的闪存配置数据为所述目标闪存配置数据。
  3. 根据权利要求2所述的方法，其中，所述确定所述比值对应的闪存配置数据为所述目标闪存配置数据，包括：
    根据所述比值与预设比值阈值，确定所述比值对应的闪存配置等级；
    确定所述闪存配置等级对应的闪存配置数据为所述目标闪存配置数据。
  4. 根据权利要求1所述的方法，其中，所述响应于所述第一输入，确定所述目标闪存配置选项对应的目标闪存配置数据，包括：
    响应于所述第一输入，确定所述目标闪存配置选项对应的闪存配置等级；
    确定所述闪存配置等级对应的闪存配置数据为所述目标闪存配置数据。
  5. 根据权利要求1-4任意一项所述的方法，其中，所述目标闪存配置数据包括子逻辑区域块的数量、子逻辑区域块的标识、子逻辑区域块的起始地址和子逻辑区域块中的逻辑区域的数量；
    所述确定所述目标闪存配置数据对应的目标逻辑区域，包括：
    确定所述目标闪存配置数据对应的至少一个子逻辑区域块；
    确定所述至少一个子逻辑区域块中的逻辑区域为所述目标逻辑区域。
  6. 根据权利要求1-4任意一项所述的方法，其中，所述根据所述目标逻辑 区域对电子设备的闪存进行配置并保存，包括：
    将所述目标逻辑区域的逻辑地址与物理地址的映射关系存储至所述电子设备的运行内存。
  7. 根据权利要求1-4任意一项所述的方法，其中，所述闪存包括UFS闪存。
  8. 一种闪存配置装置，包括：
    接收模块，用于接收用户对目标闪存配置选项的第一输入；
    确定模块，用于响应于所述第一输入，确定所述目标闪存配置选项对应的目标闪存配置数据；
    确定模块，还用于确定所述目标闪存配置数据对应的目标逻辑区域；
    配置模块，用于根据所述目标逻辑区域对电子设备的闪存进行配置并保存。
  9. 根据权利要求8所述的装置，其中，所述确定模块包括：
    获取单元，用于响应于所述第一输入，获取所述电子设备的未使用运行内存与全部运行内存的比值；
    第一确定单元，用于确定所述比值对应的闪存配置数据为所述目标闪存配置数据。
  10. 根据权利要求9所述的装置，其中，所述第一确定单元具体用于：
    根据所述比值与预设比值阈值，确定所述比值对应的闪存配置等级；
    确定所述闪存配置等级对应的闪存配置数据为所述目标闪存配置数据。
  11. 根据权利要求8所述的装置，其中，所述确定模块包括：
    第二确定单元，用于响应于所述第一输入，确定所述目标闪存配置选项对应的闪存配置等级；
    所述第二确定单元，还用于确定所述闪存配置等级对应的闪存配置数据为所述目标闪存配置数据。
  12. 根据权利要求8-11任意一项所述的装置，其中，所述目标闪存配置数据包括子逻辑区域块的数量、子逻辑区域块的标识、子逻辑区域块的起始地址和子逻辑区域块中的逻辑区域的数量，所述确定模块包括：
    第三确定单元，用于确定所述目标闪存配置数据对应的至少一个子逻辑区 域块；
    所述第三确定单元，还用于确定所述至少一个子逻辑区域块中的逻辑区域为所述目标逻辑区域。
  13. 根据权利要求8-11任意一项所述的装置，其中，所述配置模块包括：
    存储单元，用于将所述目标逻辑区域的逻辑地址与物理地址的映射关系存储至所述电子设备的运行内存。
  14. 根据权利要求8-11任意一项所述的装置，其中，所述闪存包括UFS闪存。
  15. 一种电子设备，包括处理器，存储器及存储在所述存储器上并可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如权利要求1-7任一项所述的闪存配置方法的步骤。
  16. 一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如权利要求1-7任一项所述的闪存配置方法的步骤。
  17. 一种计算机程序产品，所述程序产品被存储在非易失的存储介质中，所述程序产品被至少一个处理器执行以实现如权利要求1-7任一项所述的闪存配置方法的步骤。
  18. 一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如权利要求1-7任一项所述的闪存配置方法的步骤。
  19. 一种电子设备，用于执行如权利要求1-7任一项所述的闪存配置方法的步骤。
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