WO2022193367A1 - Display panel and manufacturing method therefor - Google Patents

Display panel and manufacturing method therefor Download PDF

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Publication number
WO2022193367A1
WO2022193367A1 PCT/CN2021/084274 CN2021084274W WO2022193367A1 WO 2022193367 A1 WO2022193367 A1 WO 2022193367A1 CN 2021084274 W CN2021084274 W CN 2021084274W WO 2022193367 A1 WO2022193367 A1 WO 2022193367A1
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WO
WIPO (PCT)
Prior art keywords
layer
emitting device
light
thin film
display panel
Prior art date
Application number
PCT/CN2021/084274
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French (fr)
Chinese (zh)
Inventor
邹伟
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/286,464 priority Critical patent/US20230157142A1/en
Publication of WO2022193367A1 publication Critical patent/WO2022193367A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/8794Arrangements for heating and cooling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/86Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method thereof.
  • OLED Organic Light-Emitting Diode
  • the service life is one of the important parameters for evaluating the level of the device.
  • the length of the device life is directly related to the service life of the product.
  • the decay curve of organic light emitting (OEL, Organic Electro-Luminescence) devices usually consists of short-term fast decay and long-term slow decay, which is an irreversible process. The former can be eliminated by the aging process before leaving the factory, so that only slow life decay of the EL device is involved in actual use.
  • the lifespan decay in actual products is not only related to the aging process of EL, the current mainstream Active-matrix Organic Light-Emitting Diode (AMOLED, Active-matrix Organic Light-Emitting Diode) also needs to consider the thin film transistor (TFT) at the bottom. Impact. As the mobile phone is used in different environments, such as temperature changes, it will lead to multiple factors. In the initial stage of OLED lighting, due to the influence of temperature on the mobility of TFT and EL devices, the brightness of the screen rapidly decreases by 1% to 5%. This phenomenon is called Initial. drop (initial decay).
  • the industry-recognized lifespan evaluation standard that is, the time it takes for the brightness to decay to 95% of the initial value (T95)
  • the initial drop will greatly deviate from the actual lifespan of the EL, which is not conducive to device development and meeting customer needs.
  • the present application provides a display panel and a manufacturing method thereof, which alleviates the problem of brightness attenuation due to the influence of temperature during the initial stage of display.
  • the present application provides a display panel, which includes a thin film transistor array layer, a light emitting device layer, a thermal thin film layer and a pixel driving circuit;
  • the thin film transistor array layer includes at least one driving transistor;
  • the light emitting device layer is formed with at least one light emitting device layer. device;
  • a thermal film layer, the thermal thin film layer is formed with at least one thermistor;
  • the pixel driving circuit includes a driving transistor, a thermistor and a light-emitting device; wherein, at least one thermistor is connected in series with the driving transistor and the light-emitting device. in the light circuit.
  • the present application provides a display panel, which includes a thin film transistor array layer, a light emitting device layer, and a thermal thin film layer;
  • the thin film transistor array layer includes at least one driving transistor;
  • the light emitting device layer is formed with at least one light emitting device;
  • the thin film layer is formed with at least one thermistor; wherein, the at least one thermistor is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
  • the heat-sensitive thin film layer is adjacent to the thin film transistor array layer or the light emitting device layer.
  • thermosensitive thin film layer is located between the thin film transistor array layer and the light emitting device layer.
  • the display panel further includes at least one via hole; the first end of the via hole is connected to the first end of the thermistor; the second end of the via hole is connected to the drive One of the transistor and the light-emitting device is connected; the other one of the driving transistor and the light-emitting device is connected to the second end of the thermistor.
  • the light emitting device layer includes an anode layer; the anode layer includes an anode; and the width of the anode is greater than or equal to that of the thermistor.
  • the display panel further includes a flat layer; the flat layer is located between the thin film transistor array layer and the light emitting device layer.
  • the heat sensitive thin film layer is located between the flat layer and the thin film transistor array layer.
  • thermosensitive thin film layer is located between the flat layer and the light emitting device layer; the via hole is located at least in the flat layer.
  • the thermistor at least partially covers the first end of the via hole or the second end of the via hole.
  • the present application provides a method for preparing a display panel, which includes: preparing a thin film transistor array layer, where the thin film transistor array layer includes at least one driving transistor; preparing at least one thermal thin film layer, the thermal thin film layer includes at least one thermal a thermistor; preparing a light-emitting device layer, the light-emitting device layer includes at least one light-emitting device; and connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
  • the display panel and the manufacturing method thereof provided by the present application can reduce or eliminate the attenuation of the luminous brightness caused by the temperature by connecting at least one thermistor in series in the luminous circuit formed by the driving transistor and the light emitting device, and can meet the life evaluation standard recognized in the industry , which is conducive to meeting the needs of customers.
  • FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 2 is another schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a pixel circuit in a conventional technical solution.
  • FIG. 4 is a schematic structural diagram of a pixel circuit provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram showing the comparison of luminous lifetimes when different pixel circuits are used.
  • FIG. 6 is a schematic flowchart of a method for fabricating a display panel according to an embodiment of the present application.
  • the present embodiment provides a display panel, which includes a thin film transistor array layer 20 , a light emitting device layer 70 and a thermal thin film layer 50 ;
  • the thin film transistor array layer 20 includes at least A driving transistor;
  • the light-emitting device layer 70 is formed with at least one light-emitting device;
  • the thermal film layer 50 is formed with at least one thermistor; wherein, at least one thermistor is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
  • this embodiment proposes an Initial In the drop design method, a thermistor is connected in series in the circuit where the EL device is located, and the temperature sensitivity of the thermistor is used to compensate the current, thereby realizing the corresponding brightness compensation and solving the process limitation caused by the life problem. limit and yield loss.
  • the current flowing through the light-emitting device decreases rapidly.
  • the resistance of the thermistor decreases with the increase of temperature, which indirectly increases the resistance between the source and the drain of the driving transistor.
  • the cross voltage, the Vds of the drive transistor increases the current flowing through the light-emitting device, compensating for the temperature-induced brightness drop.
  • the corresponding brightness compensation can also be performed.
  • this embodiment does not change the process conditions of the light emitting device layer 70 and the thin film transistor array layer 20 by adding external structures, and can be applied to various light emitting material systems and OLED device structures.
  • the display panel provided by the present application can reduce or eliminate the attenuation of the luminous brightness caused by the temperature by connecting at least one thermistor in series in the luminous circuit formed by the driving transistor and the light emitting device, and can meet the life-span assessment generally recognized in the industry. standard, which is conducive to meeting the needs of customers.
  • thermosensitive thin film layer 50 is located between the thin film transistor array layer 20 and the light emitting device layer 70 .
  • the display panel further includes at least one via hole 31; the first end of the via hole 31 is connected to the first end of the thermistor; the second end of the via hole 31 is connected to one of the driving transistor and the light emitting device connected; the other of the driving transistor and the light emitting device is connected to the second end of the thermistor.
  • the via hole 31 may be located at least in the flat layer 30, and the via hole 31 is used to realize the electrical connection between the thermistor and the driving transistor DTFT and/or the light emitting device OLED. Therefore, based on the function of the via hole 31 , the via hole 31 may also pass through other film layers in the display panel.
  • the light emitting device layer 70 includes an anode layer 60; the anode layer 60 includes an anode; and the width of the anode is greater than or equal to the width of the thermistor.
  • the heat sensitive thin film layer 50 is located between the thin film transistor array layer 20 and the anode layer 60 .
  • the thin film transistor array layer 20 may include a source-drain layer, and the source-drain layer includes a source electrode and a drain electrode of the driving transistor DTFT.
  • the thermistor R may be electrically connected to one of the source and the drain of the driving transistor DTFT. Alternatively, the thermistor R may also be electrically connected to the anode of the light emitting device.
  • the display panel includes a planarization layer 30 ; the planarization layer 30 is located between the thin film transistor array layer 20 and the light emitting device layer 70 .
  • the source and drain layers may be adjacent to the flat layer 30 .
  • the depth of the via hole 31 can be reduced.
  • thermosensitive thin film layer 50 is located between the flat layer 30 and the light emitting device layer 70 .
  • the thermosensitive thin film layer 50 is adjacent to the light emitting device layer 70 .
  • the display panel further includes at least one of the substrate 10 and an encapsulation layer.
  • the substrate 10 is located on one side of the thin film transistor array layer 20 and away from the flat layer 30 .
  • the encapsulation layer is located on one side of the light emitting device layer 70 and away from the substrate 10 .
  • the substrate 10 may be, but not limited to, a glass substrate, and may also be a flexible PI substrate.
  • a pixel definition layer 40 , an anode layer 60 and a light emitting device layer 70 on one side of the flat layer 30 may be disposed in sequence.
  • a plurality of light-emitting devices may be formed in the light-emitting device layer 70, and at least one light-emitting device may include a hole injection layer (HITL), a hole transport layer (HTL), an electron blocking layer (EBL), a blue light Light Emitting Layer (EML), Hole Blocking Layer (HBL), Electron Transport Layer (ETL), Electron Injection Layer (EIL), Cathode and Light Extraction Layer (CPL).
  • HTL hole injection layer
  • HTL hole transport layer
  • EBL electron blocking layer
  • EML blue light Light Emitting Layer
  • HBL Hole Blocking Layer
  • ETL Electron Transport Layer
  • EIL Electron Injection Layer
  • the encapsulation layer may include a first inorganic layer 80 , an organic layer 90 and a second inorganic layer 100 that are stacked in sequence.
  • the materials of the first inorganic layer 80 and the second inorganic layer 100 may be any one of silicon nitride, silicon oxide or silicon oxynitride.
  • the heat-sensitive thin film layer 50 can be completed by at least one method of evaporation, magnetron sputtering, laser deposition, and etching.
  • the material of the heat-sensitive thin film layer 50 may include, but is not limited to, inorganic materials such as MnCoNiO-based, MnCoCuO-based and the like. It can also choose a positive temperature coefficient (PTC) material according to the current rise caused by the temperature rise when the light-emitting device is working; conversely, a negative temperature coefficient (NTC) material can also be used.
  • PTC positive temperature coefficient
  • NTC negative temperature coefficient
  • the thermistor when the device is in the initial stage of operation, the temperature rises and the current drops rapidly, and the thermistor will decrease the impedance with the temperature rise, thereby indirectly increasing the Vds cross-voltage of the driving transistor, thereby increasing the current and compensating for the Decreases in brightness due to temperature.
  • the heat-sensitive film layer 50 may be translucent, but not limited to. The choice of transparency can be achieved by adjusting the thickness of the heat-sensitive thin film layer 50 . It can be understood that the resistance value of the thermistor can also be selected according to at least one of parameters such as the thickness of the thermal thin film layer 50, the shape and size of the thermistor.
  • the heat-sensitive film layer 50 includes a first heat-sensitive film layer and a second heat-sensitive film layer.
  • the first heat sensitive thin film layer may be located between the flat layer and the anode layer.
  • the second heat-sensitive thin film layer may be located between the planarization layer and the thin film transistor array layer.
  • the first thermal film layer is formed with a plurality of first thermistors;
  • the second thermal film layer is formed with a plurality of second thermistors.
  • the first thermistor may at least partially cover one of the first end of the via hole and the second end of the via hole.
  • the second thermistor may at least partially cover the other of the first end of the via and the second end of the via.
  • thermosensitive thin film layer 50 is located between the planarization layer 30 and the thin film transistor array layer 20 .
  • the heat sensitive thin film layer 50 is adjacent to the thin film transistor array layer 20 .
  • the thermistor at least partially covers the first end of the via hole 31 or the second end of the via hole 31 .
  • the display panel further includes a pixel circuit, and the pixel circuit includes a corresponding driving transistor, and the driving transistor is located in the thin film transistor array layer 20 .
  • the pixel circuit may include a driving transistor DTFT and a light emitting device OLED.
  • One of the source/drain of the driving transistor DTFT is used to access the first power supply signal VDD; the other of the source/drain of the driving transistor DTFT is connected to the anode of the light emitting device OLED; the cathode of the light emitting device OLED is used for The second power supply signal VSS is connected; the gate of the driving transistor DTFT is used for accessing the scan signal.
  • the potential of the first power supply signal VDD is higher than the potential of the second power supply signal VSS.
  • the pixel circuit may include a driving transistor DTFT, a light emitting device OLED, and a thermistor R.
  • One of the source/drain of the driving transistor DTFT is used to access the first power supply signal VDD; the other of the source/drain of the driving transistor DTFT is connected to the first end of the thermistor R; the thermistor R
  • the second end of the OLED is connected to the anode of the light-emitting device OLED; the cathode of the light-emitting device OLED is used to connect the second power supply signal VSS; the gate of the driving transistor DTFT is used to connect to the scanning signal.
  • the potential of the first power supply signal VDD is higher than the potential of the second power supply signal VSS.
  • the pixel circuit shown in FIG. 4 is connected in series with a thermistor R in the light-emitting circuit formed by the driving transistor DTFT and the light-emitting device OLED, and the thermistor R can be For sensing the temperature of the driving transistor DTFT and/or the light emitting device OLED.
  • the light-emitting lifespans between the two are quite different.
  • the light-emitting lifespan of the pixel circuit shown in FIG. The light emission lifetime driven by the pixel circuit becomes the improved light emission lifetime.
  • FIG. 5 for sub-pixels of different colors, there are also differences in their luminous lifetimes.
  • the upper left panel in FIG. 5 is a schematic diagram showing the comparison of white light lifetime of white sub-pixels, wherein the lower curve is the white light lifetime curve before improvement, and the upper side curve is the improved white light lifetime curve.
  • the initial brightness of the white light life curve before improvement dropped sharply at the beginning, and the initial brightness of the improved white light life curve actually increased further at the beginning, and exceeded 100% brightness.
  • the upper right panel in Figure 5 is a schematic diagram showing the comparison of the red light lifetime of the red sub-pixels, wherein the lower curve is the red light lifetime curve before improvement, and the upper side curve is the improved red light lifetime curve.
  • the initial brightness of the red light lifetime curve before improvement drops sharply at the beginning, and the initial brightness of the improved red light lifetime curve decreases relatively slowly. It can be seen from the comparison that after 300 hours of testing, the brightness of the red light life curve before improvement has attenuated to between 92% and 94% of the initial brightness, while the brightness of the improved red light life curve has only attenuated to 96% of the initial brightness. % to 98%.
  • the lower left panel in FIG. 5 is a schematic diagram showing the comparison of green light lifetime of green sub-pixels, wherein the lower curve is the green light lifetime curve before improvement, and the upper side curve is the green light lifetime curve after improvement.
  • the initial brightness of the green light life curve before the improvement drops sharply at the beginning, and the initial brightness of the improved green light life curve first rises, and then slowly decreases. slip.
  • the comparison shows that after 300 hours of testing, the brightness of the green light life curve before improvement has decayed to about 92% of the initial brightness, while the brightness of the improved green light life curve has only attenuated to about 97% of the initial brightness.
  • the lower right panel in FIG. 5 is a schematic diagram of blue light lifetime comparison of blue sub-pixels, wherein the lower curve is the blue light lifetime curve before improvement, and the upper side curve is the improved blue light lifetime curve.
  • the initial brightness of the blue light lifetime curve before the improvement drops sharply at the beginning, and the initial brightness of the improved blue light lifetime curve first rises and then falls relatively slowly. It can be seen from the comparison that after 300 hours of testing, the brightness of the blue light life curve before improvement has attenuated to about 95% of the initial brightness, while the brightness of the improved blue light life curve has only attenuated to about 96.5% of the initial brightness.
  • the use of the pixel circuit provided in the present application can significantly improve the problem of brightness attenuation in the initial stage of light emission, and can meet the life evaluation standard recognized in the industry.
  • this embodiment provides a method for manufacturing a display panel, which includes the following steps:
  • Step S10 preparing a thin film transistor array layer, where the thin film transistor array layer includes at least one driving transistor.
  • Step S20 preparing at least one thermosensitive thin film layer, and the thermosensitive thin film layer includes at least one thermistor.
  • Step S30 preparing a light-emitting device layer, the light-emitting device layer includes at least one light-emitting device.
  • step S40 connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
  • this embodiment provides a display device, which includes the display panel in any of the above-mentioned embodiments.
  • the display device provided by the present application reduces or eliminates the attenuation of the luminous brightness caused by the temperature by connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device, and can meet the life-span evaluation standard recognized in the industry. , which is conducive to meeting the needs of customers.

Abstract

A display panel and a manufacturing method therefor. The display panel comprises a thin-film transistor array layer (20), a light-emitting device layer (70), and a thermosensitive thin film layer (50). At least one thermistor (R) is connected in series in a light-emitting circuit consisting of a driving transistor (DTFT) and a light-emitting device (OLED), so as to reduce or eliminate attenuation of the temperature on light-emitting brightness, so that the accepted life evaluation standard in the industry can be met.

Description

显示面板及其制备方法Display panel and method of making the same 技术领域technical field
本申请涉及显示技术领域,具体涉及一种显示面板及其制备方法。The present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method thereof.
背景技术Background technique
在有机发光二极管(OLED,Organic Light-Emitting Diode)中,使用寿命为评估器件水平的重要参数之一,在现有中小尺寸量产显示产品上,器件寿命的长短直接关系到产品的使用寿命。有机发光(OEL,Organic Electro-Luminescence)器件衰减曲线通常会有短时间的快衰和长时间的慢衰组成,为不可逆过程。前者可以通过出厂前的寿命老化(aging)工艺消除,从而在实际使用中仅涉及到EL器件慢速寿命衰减。In organic light-emitting diodes (OLED, Organic Light-Emitting Diode), the service life is one of the important parameters for evaluating the level of the device. In the existing small and medium-sized mass production display products, the length of the device life is directly related to the service life of the product. The decay curve of organic light emitting (OEL, Organic Electro-Luminescence) devices usually consists of short-term fast decay and long-term slow decay, which is an irreversible process. The former can be eliminated by the aging process before leaving the factory, so that only slow life decay of the EL device is involved in actual use.
然而,实际产品上的寿命衰减不仅仅涉及到EL的老化过程,当前主流的有源矩阵有机发光二级管(AMOLED,Active-matrix Organic Light-Emitting Diode)还需考虑底部的薄膜晶体管(TFT)的影响。随着手机使用环境的不同,如温度变化等,会导致多重因素共同影响。在OLED点亮初期,因温度对TFT和EL器件迁移率有影响,导致屏幕亮度快速衰减1%~5%,该现象即为Initial drop(初始衰减)。因此,如果使用业内公认的寿命评估标准,即亮度衰减至初始的95%所用时间(T95)来评估的话,Initial drop会大大偏离EL实际使用寿命,不利于器件的开发与满足客户的需求。However, the lifespan decay in actual products is not only related to the aging process of EL, the current mainstream Active-matrix Organic Light-Emitting Diode (AMOLED, Active-matrix Organic Light-Emitting Diode) also needs to consider the thin film transistor (TFT) at the bottom. Impact. As the mobile phone is used in different environments, such as temperature changes, it will lead to multiple factors. In the initial stage of OLED lighting, due to the influence of temperature on the mobility of TFT and EL devices, the brightness of the screen rapidly decreases by 1% to 5%. This phenomenon is called Initial. drop (initial decay). Therefore, if the industry-recognized lifespan evaluation standard is used, that is, the time it takes for the brightness to decay to 95% of the initial value (T95), the initial drop will greatly deviate from the actual lifespan of the EL, which is not conducive to device development and meeting customer needs.
需要注意的是,上述关于背景技术的介绍仅仅是为了便于清楚、完整地理解本申请的技术方案。因此,不能仅仅由于其出现在本申请的背景技术中,而认为上述所涉及到的技术方案为本领域所属技术人员所公知的。It should be noted that the above description of the background technology is only for facilitating a clear and complete understanding of the technical solutions of the present application. Therefore, it should not be considered that the above-mentioned technical solutions are known to those skilled in the art just because they appear in the background art of the present application.
技术问题technical problem
本申请提供一种显示面板及其制备方法,缓解了显示初期过程中,因温度影响致使亮度衰减的问题。The present application provides a display panel and a manufacturing method thereof, which alleviates the problem of brightness attenuation due to the influence of temperature during the initial stage of display.
技术解决方案technical solutions
第一方面,本申请提供一种显示面板,其包括薄膜晶体管阵列层、发光器件层、热敏薄膜层以及像素驱动电路;薄膜晶体管阵列层包括至少一个驱动晶体管;发光器件层形成有至少一个发光器件;热敏薄膜层,热敏薄膜层形成有至少一个热敏电阻;像素驱动电路包括驱动晶体管、热敏电阻以及发光器件;其中,至少一个热敏电阻串接于驱动晶体管与发光器件构成的发光回路中。In a first aspect, the present application provides a display panel, which includes a thin film transistor array layer, a light emitting device layer, a thermal thin film layer and a pixel driving circuit; the thin film transistor array layer includes at least one driving transistor; the light emitting device layer is formed with at least one light emitting device layer. device; a thermal film layer, the thermal thin film layer is formed with at least one thermistor; the pixel driving circuit includes a driving transistor, a thermistor and a light-emitting device; wherein, at least one thermistor is connected in series with the driving transistor and the light-emitting device. in the light circuit.
第二方面,本申请提供一种显示面板,其包括薄膜晶体管阵列层、发光器件层以及热敏薄膜层;薄膜晶体管阵列层包括至少一个驱动晶体管;发光器件层形成有至少一个发光器件;热敏薄膜层形成有至少一个热敏电阻;其中,至少一个热敏电阻串接于驱动晶体管与发光器件构成的发光回路中。In a second aspect, the present application provides a display panel, which includes a thin film transistor array layer, a light emitting device layer, and a thermal thin film layer; the thin film transistor array layer includes at least one driving transistor; the light emitting device layer is formed with at least one light emitting device; The thin film layer is formed with at least one thermistor; wherein, the at least one thermistor is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
基于第一方面,在第一方面的第一种实施方式中,热敏薄膜层邻接薄膜晶体管阵列层或者发光器件层。Based on the first aspect, in a first embodiment of the first aspect, the heat-sensitive thin film layer is adjacent to the thin film transistor array layer or the light emitting device layer.
基于第一方面的第一种实施方式,在第一方面的第二种实施方式中,热敏薄膜层位于薄膜晶体管阵列层与发光器件层之间。Based on the first embodiment of the first aspect, in the second embodiment of the first aspect, the thermosensitive thin film layer is located between the thin film transistor array layer and the light emitting device layer.
基于第一方面,在第一方面的第三种实施方式中,显示面板还包括至少一个过孔;过孔的第一端与热敏电阻的第一端连接;过孔的第二端与驱动晶体管和发光器件中的一个连接;驱动晶体管和发光器件中的另一个与热敏电阻的第二端连接。Based on the first aspect, in a third implementation manner of the first aspect, the display panel further includes at least one via hole; the first end of the via hole is connected to the first end of the thermistor; the second end of the via hole is connected to the drive One of the transistor and the light-emitting device is connected; the other one of the driving transistor and the light-emitting device is connected to the second end of the thermistor.
基于第一方面的第三种实施方式,在第一方面的第四种实施方式中,发光器件层包括阳极层;阳极层包括阳极;阳极的宽度大于或者等于热敏电阻的宽度。Based on the third embodiment of the first aspect, in a fourth embodiment of the first aspect, the light emitting device layer includes an anode layer; the anode layer includes an anode; and the width of the anode is greater than or equal to that of the thermistor.
基于第一方面的第四种实施方式,在第一方面的第五种实施方式中,显示面板还包括平坦层;平坦层位于薄膜晶体管阵列层与发光器件层之间。Based on the fourth implementation manner of the first aspect, in a fifth implementation manner of the first aspect, the display panel further includes a flat layer; the flat layer is located between the thin film transistor array layer and the light emitting device layer.
基于第一方面的第五种实施方式,在第一方面的第六种实施方式中,热敏薄膜层位于平坦层与薄膜晶体管阵列层之间。Based on the fifth implementation manner of the first aspect, in a sixth implementation manner of the first aspect, the heat sensitive thin film layer is located between the flat layer and the thin film transistor array layer.
基于第一方面的第五种实施方式,在第一方面的第七种实施方式中,热敏薄膜层位于平坦层与发光器件层之间;过孔至少位于平坦层中。Based on the fifth embodiment of the first aspect, in the seventh embodiment of the first aspect, the thermosensitive thin film layer is located between the flat layer and the light emitting device layer; the via hole is located at least in the flat layer.
基于第一方面的第三种实施方式,在第一方面的第八种实施方式中,热敏电阻至少部分覆盖过孔的第一端或者过孔的第二端。Based on the third implementation manner of the first aspect, in an eighth implementation manner of the first aspect, the thermistor at least partially covers the first end of the via hole or the second end of the via hole.
第三方面,本申请提供一种显示面板的制备方法,其包括:制备薄膜晶体管阵列层,薄膜晶体管阵列层包括至少一个驱动晶体管;制备至少一热敏薄膜层,热敏薄膜层包括至少一个热敏电阻;制备发光器件层,发光器件层包括至少一个发光器件;以及串接至少一个热敏电阻于驱动晶体管与发光器件构成的发光回路中。In a third aspect, the present application provides a method for preparing a display panel, which includes: preparing a thin film transistor array layer, where the thin film transistor array layer includes at least one driving transistor; preparing at least one thermal thin film layer, the thermal thin film layer includes at least one thermal a thermistor; preparing a light-emitting device layer, the light-emitting device layer includes at least one light-emitting device; and connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
有益效果beneficial effect
本申请提供的显示面板及其制备方法,通过在驱动晶体管与发光器件构成的发光回路中串接至少一个热敏电阻,来降低或者消除温度对发光亮度的衰减,可以满足业内公认的寿命评估标准,有利于满足客户的需求。The display panel and the manufacturing method thereof provided by the present application can reduce or eliminate the attenuation of the luminous brightness caused by the temperature by connecting at least one thermistor in series in the luminous circuit formed by the driving transistor and the light emitting device, and can meet the life evaluation standard recognized in the industry , which is conducive to meeting the needs of customers.
附图说明Description of drawings
图1为本申请实施例提供的显示面板的一种结构示意图。FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
图2为本申请实施例提供的显示面板的另一种结构示意图。FIG. 2 is another schematic structural diagram of a display panel according to an embodiment of the present application.
图3为传统技术方案中像素电路的结构示意图。FIG. 3 is a schematic structural diagram of a pixel circuit in a conventional technical solution.
图4为本申请实施例提供的像素电路的一种结构示意图。FIG. 4 is a schematic structural diagram of a pixel circuit provided by an embodiment of the present application.
图5为采用不同像素电路时发光寿命的对比示意图。FIG. 5 is a schematic diagram showing the comparison of luminous lifetimes when different pixel circuits are used.
图6为本申请实施例提供的显示面板的制备方法的流程示意图。FIG. 6 is a schematic flowchart of a method for fabricating a display panel according to an embodiment of the present application.
本发明的实施方式Embodiments of the present invention
为使本申请的目的、技术方案及效果更加清楚、明确,以下参照附图并举实施例对本申请进一步详细说明。应当理解,此处所描述的具体实施例仅用以解释本申请,并不用于限定本申请。In order to make the objectives, technical solutions and effects of the present application clearer and clearer, the present application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.
请参阅图1至图2,如图1所示,本实施例提供了一种显示面板,其包括薄膜晶体管阵列层20、发光器件层70以及热敏薄膜层50;薄膜晶体管阵列层20包括至少一个驱动晶体管;发光器件层70形成有至少一个发光器件;热敏薄膜层50形成有至少一个热敏电阻;其中,至少一个热敏电阻串接于驱动晶体管与发光器件构成的发光回路中。Referring to FIGS. 1 to 2 , as shown in FIG. 1 , the present embodiment provides a display panel, which includes a thin film transistor array layer 20 , a light emitting device layer 70 and a thermal thin film layer 50 ; the thin film transistor array layer 20 includes at least A driving transistor; the light-emitting device layer 70 is formed with at least one light-emitting device; the thermal film layer 50 is formed with at least one thermistor; wherein, at least one thermistor is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
需要进行说明的是,研究发现,Initial drop与屏体温度关系较大,因此,发光屏幕在点亮初期,其亮度会的快速衰减,会导致显示产品的寿命规格不达标。为解决该问题,本实施例提出了一种Initial drop的设计方式,在EL器件所在回路中串联一热敏电阻,利用该热敏电阻的温度敏感性对电流进行补偿效果,进而实现了对应的亮度补偿,解决了因为寿命问题带来的工艺受限与良率损失。It should be noted that the study found that the initial drop has a great relationship with the temperature of the screen. Therefore, the brightness of the light-emitting screen will decay rapidly in the early stage of lighting, which will lead to the failure of the life specification of the display product. To solve this problem, this embodiment proposes an Initial In the drop design method, a thermistor is connected in series in the circuit where the EL device is located, and the temperature sensitivity of the thermistor is used to compensate the current, thereby realizing the corresponding brightness compensation and solving the process limitation caused by the life problem. limit and yield loss.
例如,当发光器件工作初期,温度上升导致流经发光器件中的电流迅速下降,此时,热敏电阻会随温度上升而阻抗下降,进而间接提高了驱动晶体管的源极与漏极之间的跨压,即驱动晶体管的Vds,进而提高了流经发光器件中的电流,补偿了因温度导致的亮度下降。反之,当温度下降时,同样可以进行对应亮度的补偿。For example, when the temperature rises in the early stage of operation of the light-emitting device, the current flowing through the light-emitting device decreases rapidly. At this time, the resistance of the thermistor decreases with the increase of temperature, which indirectly increases the resistance between the source and the drain of the driving transistor. The cross voltage, the Vds of the drive transistor, in turn increases the current flowing through the light-emitting device, compensating for the temperature-induced brightness drop. Conversely, when the temperature drops, the corresponding brightness compensation can also be performed.
基于上述分析,本实施例通过增加外部结构的方式,并不改变发光器件层70与薄膜晶体管阵列层20的制程工艺条件,可以适用于各种发光材料体系与OLED器件结构中。Based on the above analysis, this embodiment does not change the process conditions of the light emitting device layer 70 and the thin film transistor array layer 20 by adding external structures, and can be applied to various light emitting material systems and OLED device structures.
可以理解的是,本申请提供的显示面板,通过在驱动晶体管与发光器件构成的发光回路中串接至少一个热敏电阻,来降低或者消除温度对发光亮度的衰减,可以满足业内公认的寿命评估标准,有利于满足客户的需求。It can be understood that the display panel provided by the present application can reduce or eliminate the attenuation of the luminous brightness caused by the temperature by connecting at least one thermistor in series in the luminous circuit formed by the driving transistor and the light emitting device, and can meet the life-span assessment generally recognized in the industry. standard, which is conducive to meeting the needs of customers.
在其中一个实施例中,热敏薄膜层50位于薄膜晶体管阵列层20与发光器件层70之间。In one embodiment, the thermosensitive thin film layer 50 is located between the thin film transistor array layer 20 and the light emitting device layer 70 .
在其中一个实施例中,显示面板还包括至少一个过孔31;过孔31的第一端与热敏电阻的第一端连接;过孔31的第二端与驱动晶体管和发光器件中的一个连接;驱动晶体管和发光器件中的另一个与热敏电阻的第二端连接。In one embodiment, the display panel further includes at least one via hole 31; the first end of the via hole 31 is connected to the first end of the thermistor; the second end of the via hole 31 is connected to one of the driving transistor and the light emitting device connected; the other of the driving transistor and the light emitting device is connected to the second end of the thermistor.
其中,过孔31可以至少位于平坦层30中,该过孔31用于实现热敏电阻与驱动晶体管DTFT和/或发光器件OLED的电性连接。因此,基于该过孔31的作用,该过孔31也可能会穿越显示面板中的其它膜层。Wherein, the via hole 31 may be located at least in the flat layer 30, and the via hole 31 is used to realize the electrical connection between the thermistor and the driving transistor DTFT and/or the light emitting device OLED. Therefore, based on the function of the via hole 31 , the via hole 31 may also pass through other film layers in the display panel.
在其中一个实施例中,发光器件层70包括阳极层60;阳极层60包括阳极;阳极的宽度大于或者等于热敏电阻的宽度。In one embodiment, the light emitting device layer 70 includes an anode layer 60; the anode layer 60 includes an anode; and the width of the anode is greater than or equal to the width of the thermistor.
在其中一个实施例中,热敏薄膜层50位于薄膜晶体管阵列层20与阳极层60之间。In one embodiment, the heat sensitive thin film layer 50 is located between the thin film transistor array layer 20 and the anode layer 60 .
其中,薄膜晶体管阵列层20可以包括源漏极层,该源漏极层包括驱动晶体管DTFT的源极和漏极。热敏电阻R可以与驱动晶体管DTFT的源极和漏极中的一个电性连接。或者,热敏电阻R也可以与发光器件的阳极电性连接。Wherein, the thin film transistor array layer 20 may include a source-drain layer, and the source-drain layer includes a source electrode and a drain electrode of the driving transistor DTFT. The thermistor R may be electrically connected to one of the source and the drain of the driving transistor DTFT. Alternatively, the thermistor R may also be electrically connected to the anode of the light emitting device.
在其中一个实施例中,显示面板包括平坦层30;平坦层30位于薄膜晶体管阵列层20与发光器件层70之间。In one of the embodiments, the display panel includes a planarization layer 30 ; the planarization layer 30 is located between the thin film transistor array layer 20 and the light emitting device layer 70 .
可以理解的是,源漏极层可以与该平坦层30邻接。可以减少过孔31的深度。It can be understood that the source and drain layers may be adjacent to the flat layer 30 . The depth of the via hole 31 can be reduced.
在其中一个实施例中,热敏薄膜层50位于平坦层30与发光器件层70之间。热敏薄膜层50邻接发光器件层70。In one embodiment, the thermosensitive thin film layer 50 is located between the flat layer 30 and the light emitting device layer 70 . The thermosensitive thin film layer 50 is adjacent to the light emitting device layer 70 .
在其中一个实施例中,显示面板还包括基板10和封装层中的至少一个。其中,基板10位于薄膜晶体管阵列层20的一侧,且远离平坦层30。封装层位于发光器件层70的一侧,且远离基板10。In one of the embodiments, the display panel further includes at least one of the substrate 10 and an encapsulation layer. Wherein, the substrate 10 is located on one side of the thin film transistor array layer 20 and away from the flat layer 30 . The encapsulation layer is located on one side of the light emitting device layer 70 and away from the substrate 10 .
其中,基板10可以但不限于为玻璃基板,还可以为柔性PI基板。Wherein, the substrate 10 may be, but not limited to, a glass substrate, and may also be a flexible PI substrate.
在其中一个实施例中,在显示面板上,可以依次设置有位于平坦层30一侧的像素定义层40、阳极层60以及发光器件层70。其中,在该发光器件层70中可以形成有多个发光器件,至少一个发光器件可以包括依次设置的空穴注入层(HITL)、空穴传输层(HTL)、电子阻挡层(EBL)、蓝光发光层(EML)、空穴阻挡层(HBL)、电子传输层(ETL)、电子注入层(EIL)、阴极以及光提取层(CPL)。In one embodiment, on the display panel, a pixel definition layer 40 , an anode layer 60 and a light emitting device layer 70 on one side of the flat layer 30 may be disposed in sequence. A plurality of light-emitting devices may be formed in the light-emitting device layer 70, and at least one light-emitting device may include a hole injection layer (HITL), a hole transport layer (HTL), an electron blocking layer (EBL), a blue light Light Emitting Layer (EML), Hole Blocking Layer (HBL), Electron Transport Layer (ETL), Electron Injection Layer (EIL), Cathode and Light Extraction Layer (CPL).
在其中一个实施例中,封装层可以包括依次叠层设置的第一无机层80、有机层90以及第二无机层100。其中,第一无机层80、第二无机层100的材料均可以为氮化硅、氧化硅或氮氧化硅中的任一种。In one embodiment, the encapsulation layer may include a first inorganic layer 80 , an organic layer 90 and a second inorganic layer 100 that are stacked in sequence. Wherein, the materials of the first inorganic layer 80 and the second inorganic layer 100 may be any one of silicon nitride, silicon oxide or silicon oxynitride.
在其中一个实施例中,热敏薄膜层50可使用蒸镀、磁控溅射、激光沉积以及蚀刻等至少一种方法完成。热敏薄膜层50的材料可以但不限于包括MnCoNiO基、MnCoCuO基等无机材料。其还可以根据发光器件工作时,温度上升导致的电流上升可以选用正温度系数(PTC)材料;反之,也可以选用负温度系数(NTC)材料。In one embodiment, the heat-sensitive thin film layer 50 can be completed by at least one method of evaporation, magnetron sputtering, laser deposition, and etching. The material of the heat-sensitive thin film layer 50 may include, but is not limited to, inorganic materials such as MnCoNiO-based, MnCoCuO-based and the like. It can also choose a positive temperature coefficient (PTC) material according to the current rise caused by the temperature rise when the light-emitting device is working; conversely, a negative temperature coefficient (NTC) material can also be used.
具体地,以NTC材料为例,当器件工作初期,温度上升导致电流迅速下降,热敏电阻会随温度上升而阻抗下降,进而间接提高了驱动晶体管的Vds跨压,进而提高了电流,补偿了因温度导致的亮度下降。Specifically, taking the NTC material as an example, when the device is in the initial stage of operation, the temperature rises and the current drops rapidly, and the thermistor will decrease the impedance with the temperature rise, thereby indirectly increasing the Vds cross-voltage of the driving transistor, thereby increasing the current and compensating for the Decreases in brightness due to temperature.
其中,热敏薄膜层50可以但不限于为半透明的。可以通过调节热敏薄膜层50的厚度实现其透明度的选择。可以理解的是,热敏电阻的阻值还可以根据热敏薄膜层50的厚度、热敏电阻的形状、大小等参数中的至少一个进行选择。Wherein, the heat-sensitive film layer 50 may be translucent, but not limited to. The choice of transparency can be achieved by adjusting the thickness of the heat-sensitive thin film layer 50 . It can be understood that the resistance value of the thermistor can also be selected according to at least one of parameters such as the thickness of the thermal thin film layer 50, the shape and size of the thermistor.
在其中一个实施例中,热敏薄膜层50包括第一热敏薄膜层和第二热敏薄膜层。第一热敏薄膜层可以位于平坦层与阳极层之间。第二热敏薄膜层可以位于平坦层与薄膜晶体管阵列层之间。其中,第一热敏薄膜层形成有多个第一热敏电阻;第二热敏薄膜层形成有多个第二热敏电阻。第一热敏电阻可以至少部分覆盖过孔的第一端和过孔的第二端中的一个。第二热敏电阻可以至少部分覆盖过孔的第一端和过孔的第二端中的另一个。In one embodiment, the heat-sensitive film layer 50 includes a first heat-sensitive film layer and a second heat-sensitive film layer. The first heat sensitive thin film layer may be located between the flat layer and the anode layer. The second heat-sensitive thin film layer may be located between the planarization layer and the thin film transistor array layer. Wherein, the first thermal film layer is formed with a plurality of first thermistors; the second thermal film layer is formed with a plurality of second thermistors. The first thermistor may at least partially cover one of the first end of the via hole and the second end of the via hole. The second thermistor may at least partially cover the other of the first end of the via and the second end of the via.
如图2所示,在其中一个实施例中,热敏薄膜层50位于平坦层30与薄膜晶体管阵列层20之间。热敏薄膜层50邻接薄膜晶体管阵列层20。As shown in FIG. 2 , in one embodiment, the thermosensitive thin film layer 50 is located between the planarization layer 30 and the thin film transistor array layer 20 . The heat sensitive thin film layer 50 is adjacent to the thin film transistor array layer 20 .
如图1和图2所示,在其中一个实施例中,热敏电阻至少部分覆盖过孔31的第一端或者过孔31的第二端。As shown in FIGS. 1 and 2 , in one embodiment, the thermistor at least partially covers the first end of the via hole 31 or the second end of the via hole 31 .
其中,可以理解的是,该显示面板还包括像素电路,该像素电路包括对应的驱动晶体管,该驱动晶体管位于薄膜晶体管阵列层20中。Wherein, it can be understood that the display panel further includes a pixel circuit, and the pixel circuit includes a corresponding driving transistor, and the driving transistor is located in the thin film transistor array layer 20 .
基于上述技术,在其中一个实施例中,如图3所示,该像素电路可以包括驱动晶体管DTFT以及发光器件OLED。驱动晶体管DTFT的源极/漏极中的一个用于接入第一电源信号VDD;驱动晶体管DTFT的源极/漏极中的另一个与发光器件OLED的阳极连接;发光器件OLED的阴极用于连接第二电源信号VSS;驱动晶体管DTFT的栅极用于接入扫描信号。其中,第一电源信号VDD的电位高于第二电源信号VSS的电位。Based on the above technology, in one embodiment, as shown in FIG. 3 , the pixel circuit may include a driving transistor DTFT and a light emitting device OLED. One of the source/drain of the driving transistor DTFT is used to access the first power supply signal VDD; the other of the source/drain of the driving transistor DTFT is connected to the anode of the light emitting device OLED; the cathode of the light emitting device OLED is used for The second power supply signal VSS is connected; the gate of the driving transistor DTFT is used for accessing the scan signal. Wherein, the potential of the first power supply signal VDD is higher than the potential of the second power supply signal VSS.
在其中一个实施例中,如图4所示,该像素电路可以包括驱动晶体管DTFT、发光器件OLED以及热敏电阻R。驱动晶体管DTFT的源极/漏极中的一个用于接入第一电源信号VDD;驱动晶体管DTFT的源极/漏极中的另一个与热敏电阻R的第一端连接;热敏电阻R的第二端与发光器件OLED的阳极连接;发光器件OLED的阴极用于连接第二电源信号VSS;驱动晶体管DTFT的栅极用于接入扫描信号。其中,第一电源信号VDD的电位高于第二电源信号VSS的电位。In one embodiment, as shown in FIG. 4 , the pixel circuit may include a driving transistor DTFT, a light emitting device OLED, and a thermistor R. One of the source/drain of the driving transistor DTFT is used to access the first power supply signal VDD; the other of the source/drain of the driving transistor DTFT is connected to the first end of the thermistor R; the thermistor R The second end of the OLED is connected to the anode of the light-emitting device OLED; the cathode of the light-emitting device OLED is used to connect the second power supply signal VSS; the gate of the driving transistor DTFT is used to connect to the scanning signal. Wherein, the potential of the first power supply signal VDD is higher than the potential of the second power supply signal VSS.
可以理解的是,与图3所示的像素电路相比,图4所示的像素电路在驱动晶体管DTFT与发光器件OLED构成的发光回路中串联了一个热敏电阻R,该热敏电阻R可以用于感测驱动晶体管DTFT和/或发光器件OLED的温度。It can be understood that, compared with the pixel circuit shown in FIG. 3, the pixel circuit shown in FIG. 4 is connected in series with a thermistor R in the light-emitting circuit formed by the driving transistor DTFT and the light-emitting device OLED, and the thermistor R can be For sensing the temperature of the driving transistor DTFT and/or the light emitting device OLED.
基于图3与图4所示的像素电路,两者之间的发光寿命具有较大不同,以下将图3所示的像素电路驱动的发光寿命成为改善前的发光寿命,将图4所示的像素电路驱动的发光寿命成为改善后的发光寿命。具体如图5所示,针对不同颜色的子像素,其发光寿命同样存在差异。Based on the pixel circuits shown in FIG. 3 and FIG. 4 , the light-emitting lifespans between the two are quite different. In the following, the light-emitting lifespan of the pixel circuit shown in FIG. The light emission lifetime driven by the pixel circuit becomes the improved light emission lifetime. Specifically, as shown in FIG. 5 , for sub-pixels of different colors, there are also differences in their luminous lifetimes.
例如,如图5中左上小图所示为白色子像素的白光寿命对比示意图,其中,下侧曲线为改善前的白光寿命曲线,上侧曲线为改善后的白光寿命曲线。在起点即时间横轴为0小时(hr)处,改善前的白光寿命曲线的初始亮度一开始即急剧下滑,改善后的白光寿命曲线的初始亮度一开始反而得到了进一步的上升,并超过了100%亮度。同时,经过对比可知,经过300小时的试验,改善前的白光寿命曲线的亮度已经衰减至初始亮度的92%至94%之间,而改善后的白光寿命曲线的亮度仅衰减至初始亮度的96%至98%之间。For example, the upper left panel in FIG. 5 is a schematic diagram showing the comparison of white light lifetime of white sub-pixels, wherein the lower curve is the white light lifetime curve before improvement, and the upper side curve is the improved white light lifetime curve. At the starting point, that is, at 0 hours (hr) on the horizontal axis of time, the initial brightness of the white light life curve before improvement dropped sharply at the beginning, and the initial brightness of the improved white light life curve actually increased further at the beginning, and exceeded 100% brightness. At the same time, it can be seen from the comparison that after 300 hours of testing, the brightness of the white light life curve before improvement has attenuated to between 92% and 94% of the initial brightness, while the brightness of the improved white light life curve has only attenuated to 96% of the initial brightness. % to 98%.
如图5中右上小图所示为红色子像素的红光寿命对比示意图,其中,下侧曲线为改善前的红光寿命曲线,上侧曲线为改善后的红光寿命曲线。在起点即时间横轴为0小时(hr)处,改善前的红光寿命曲线的初始亮度一开始即急剧下滑,改善后的红光寿命曲线的初始亮度较为缓慢地下滑。经过对比可知,经过300小时的试验,改善前的红光寿命曲线的亮度已经衰减至初始亮度的92%至94%之间,而改善后的红光寿命曲线的亮度仅衰减至初始亮度的96%至98%之间。The upper right panel in Figure 5 is a schematic diagram showing the comparison of the red light lifetime of the red sub-pixels, wherein the lower curve is the red light lifetime curve before improvement, and the upper side curve is the improved red light lifetime curve. At the starting point, that is, when the horizontal axis of time is 0 hours (hr), the initial brightness of the red light lifetime curve before improvement drops sharply at the beginning, and the initial brightness of the improved red light lifetime curve decreases relatively slowly. It can be seen from the comparison that after 300 hours of testing, the brightness of the red light life curve before improvement has attenuated to between 92% and 94% of the initial brightness, while the brightness of the improved red light life curve has only attenuated to 96% of the initial brightness. % to 98%.
如图5中左下小图所示为绿色子像素的绿光寿命对比示意图,其中,下侧曲线为改善前的绿光寿命曲线,上侧曲线为改善后的绿光寿命曲线。在起点即时间横轴为0小时(hr)处,改善前的绿光寿命曲线的初始亮度一开始即急剧下滑,改善后的绿光寿命曲线的初始亮度先有所上升后,才较为缓慢地下滑。经过对比可知,经过300小时的试验,改善前的绿光寿命曲线的亮度已经衰减至初始亮度的92%附近,而改善后的绿光寿命曲线的亮度仅衰减至初始亮度的97%左右。The lower left panel in FIG. 5 is a schematic diagram showing the comparison of green light lifetime of green sub-pixels, wherein the lower curve is the green light lifetime curve before improvement, and the upper side curve is the green light lifetime curve after improvement. At the starting point, where the horizontal axis of time is 0 hours (hr), the initial brightness of the green light life curve before the improvement drops sharply at the beginning, and the initial brightness of the improved green light life curve first rises, and then slowly decreases. slip. The comparison shows that after 300 hours of testing, the brightness of the green light life curve before improvement has decayed to about 92% of the initial brightness, while the brightness of the improved green light life curve has only attenuated to about 97% of the initial brightness.
如图5中右下小图所示为蓝色子像素的蓝光寿命对比示意图,其中,下侧曲线为改善前的蓝光寿命曲线,上侧曲线为改善后的蓝光寿命曲线。在起点即时间横轴为0小时(hr)处,改善前的蓝光寿命曲线的初始亮度一开始即急剧下滑,改善后的蓝光寿命曲线的初始亮度先有所上升后,才较为缓慢地下滑。经过对比可知,经过300小时的试验,改善前的蓝光寿命曲线的亮度已经衰减至初始亮度的95%附近,而改善后的蓝光寿命曲线的亮度仅衰减至初始亮度的96.5%左右。The lower right panel in FIG. 5 is a schematic diagram of blue light lifetime comparison of blue sub-pixels, wherein the lower curve is the blue light lifetime curve before improvement, and the upper side curve is the improved blue light lifetime curve. At the starting point, where the horizontal axis of time is 0 hours (hr), the initial brightness of the blue light lifetime curve before the improvement drops sharply at the beginning, and the initial brightness of the improved blue light lifetime curve first rises and then falls relatively slowly. It can be seen from the comparison that after 300 hours of testing, the brightness of the blue light life curve before improvement has attenuated to about 95% of the initial brightness, while the brightness of the improved blue light life curve has only attenuated to about 96.5% of the initial brightness.
综上分析可知,采用本申请中提供的像素电路可以明显改善发光初始阶段的亮度衰减问题,能够满足业内公认的寿命评估标准。Based on the above analysis, it can be seen that the use of the pixel circuit provided in the present application can significantly improve the problem of brightness attenuation in the initial stage of light emission, and can meet the life evaluation standard recognized in the industry.
如图6所示,在其中一个实施例中,本实施例提供一种显示面板的制备方法,其包括以下步骤:As shown in FIG. 6 , in one embodiment, this embodiment provides a method for manufacturing a display panel, which includes the following steps:
步骤S10:制备薄膜晶体管阵列层,薄膜晶体管阵列层包括至少一个驱动晶体管。Step S10 : preparing a thin film transistor array layer, where the thin film transistor array layer includes at least one driving transistor.
步骤S20:制备至少一热敏薄膜层,热敏薄膜层包括至少一个热敏电阻。Step S20 : preparing at least one thermosensitive thin film layer, and the thermosensitive thin film layer includes at least one thermistor.
步骤S30:制备发光器件层,发光器件层包括至少一个发光器件。Step S30 : preparing a light-emitting device layer, the light-emitting device layer includes at least one light-emitting device.
以及步骤S40:串接至少一个热敏电阻于驱动晶体管与发光器件构成的发光回路中。And step S40 : connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
可以理解的是,在本实施例的制备方法中,以上步骤并没有严格的执行顺序,可以实现本实例的发明构思的制备方法均可应用于本实施例中显示面板的制备过程。It can be understood that, in the preparation method of this embodiment, the above steps do not have a strict execution order, and the preparation method that can realize the inventive concept of this embodiment can be applied to the preparation process of the display panel in this embodiment.
可以理解的是,本实施例提供的显示面板的制备方法,通过在驱动晶体管与发光器件构成的发光回路中串接至少一个热敏电阻,同样可以来降低或者消除温度对发光亮度的衰减,可以满足业内公认的寿命评估标准,有利于满足客户的需求。It can be understood that, in the preparation method of the display panel provided in this embodiment, by connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device, it can also reduce or eliminate the attenuation of the light-emitting brightness caused by the temperature. Meeting industry-recognized life-span assessment criteria helps meet customer needs.
在其中一个实施例中,本实施例提供一种显示装置,其包括上述任一实施例中的显示面板。In one of the embodiments, this embodiment provides a display device, which includes the display panel in any of the above-mentioned embodiments.
可以理解的是,本申请提供的显示装置通过在驱动晶体管与发光器件构成的发光回路中串接至少一个热敏电阻,来降低或者消除温度对发光亮度的衰减,可以满足业内公认的寿命评估标准,有利于满足客户的需求。It can be understood that the display device provided by the present application reduces or eliminates the attenuation of the luminous brightness caused by the temperature by connecting at least one thermistor in series in the light-emitting circuit formed by the driving transistor and the light-emitting device, and can meet the life-span evaluation standard recognized in the industry. , which is conducive to meeting the needs of customers.
可以理解的是,对本领域普通技术人员来说,可以根据本申请的技术方案及其发明构思加以等同替换或改变,而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。It can be understood that for those of ordinary skill in the art, equivalent replacements or changes can be made according to the technical solutions and inventive concepts of the present application, and all these changes or replacements should belong to the protection scope of the appended claims of the present application.

Claims (20)

  1. 一种显示面板,包括:A display panel, comprising:
    薄膜晶体管阵列层,所述薄膜晶体管阵列层包括至少一个驱动晶体管;a thin film transistor array layer, the thin film transistor array layer includes at least one driving transistor;
    发光器件层,所述发光器件层形成有至少一个发光器件;a light emitting device layer formed with at least one light emitting device;
    热敏薄膜层,所述热敏薄膜层形成有至少一个热敏电阻;以及a thermally sensitive film layer formed with at least one thermistor; and
    像素驱动电路,所述像素驱动电路包括所述驱动晶体管、所述热敏电阻以及所述发光器件;a pixel drive circuit, the pixel drive circuit includes the drive transistor, the thermistor, and the light-emitting device;
    其中,至少一个所述热敏电阻串接于所述驱动晶体管与所述发光器件构成的发光回路中。Wherein, at least one of the thermistors is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
  2. 根据权利要求1所述的显示面板,其中,所述热敏薄膜层邻接所述薄膜晶体管阵列层或者所述发光器件层。The display panel of claim 1, wherein the heat-sensitive thin film layer is adjacent to the thin film transistor array layer or the light emitting device layer.
  3. 根据权利要求2所述的显示面板,其中,所述热敏薄膜层位于所述薄膜晶体管阵列层与所述发光器件层之间。The display panel of claim 2, wherein the heat sensitive thin film layer is located between the thin film transistor array layer and the light emitting device layer.
  4. 根据权利要求1所述的显示面板,其中,所述显示面板还包括至少一个过孔;所述过孔的第一端与所述热敏电阻的第一端连接;所述过孔的第二端与所述驱动晶体管和所述发光器件中的一个连接;所述驱动晶体管和所述发光器件中的另一个与所述热敏电阻的第二端连接。The display panel of claim 1, wherein the display panel further comprises at least one via hole; a first end of the via hole is connected to a first end of the thermistor; a second end of the via hole The terminal is connected to one of the driving transistor and the light-emitting device; the other one of the driving transistor and the light-emitting device is connected to the second terminal of the thermistor.
  5. 根据权利要求4所述的显示面板,其中,所述发光器件层包括阳极层;所述阳极层包括阳极;所述阳极的宽度大于或者等于所述热敏电阻的宽度。The display panel of claim 4, wherein the light emitting device layer includes an anode layer; the anode layer includes an anode; and a width of the anode is greater than or equal to a width of the thermistor.
  6. 根据权利要求5所述的显示面板,其中,所述显示面板还包括平坦层;所述平坦层位于所述薄膜晶体管阵列层与所述发光器件层之间;所述过孔至少位于所述平坦层中。The display panel according to claim 5, wherein the display panel further comprises a flat layer; the flat layer is located between the thin film transistor array layer and the light emitting device layer; the via hole is located at least in the flat layer in the layer.
  7. 根据权利要求6所述的显示面板,其中,所述热敏薄膜层位于所述平坦层与所述薄膜晶体管阵列层之间。The display panel of claim 6, wherein the heat sensitive thin film layer is located between the flat layer and the thin film transistor array layer.
  8. 根据权利要求6所述的显示面板,其中,所述热敏薄膜层位于所述平坦层与所述发光器件层之间。The display panel of claim 6, wherein the heat-sensitive thin film layer is located between the flat layer and the light emitting device layer.
  9. 根据权利要求4所述的显示面板,其中,所述热敏电阻至少部分覆盖所述过孔的第一端或者所述过孔的第二端。The display panel of claim 4, wherein the thermistor at least partially covers the first end of the via hole or the second end of the via hole.
  10. 一种显示面板,包括:A display panel, comprising:
    薄膜晶体管阵列层,所述薄膜晶体管阵列层包括至少一个驱动晶体管;a thin film transistor array layer, the thin film transistor array layer includes at least one driving transistor;
    发光器件层,所述发光器件层形成有至少一个发光器件;以及a light emitting device layer formed with at least one light emitting device; and
    热敏薄膜层,所述热敏薄膜层形成有至少一个热敏电阻;a heat-sensitive film layer, the heat-sensitive film layer is formed with at least one thermistor;
    其中,至少一个所述热敏电阻串接于所述驱动晶体管与所述发光器件构成的发光回路中。Wherein, at least one of the thermistors is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
  11. 根据权利要求10所述的显示面板,其中,所述热敏薄膜层邻接所述薄膜晶体管阵列层或者所述发光器件层。The display panel of claim 10, wherein the heat sensitive thin film layer is adjacent to the thin film transistor array layer or the light emitting device layer.
  12. 根据权利要求11所述的显示面板,其中,所述热敏薄膜层位于所述薄膜晶体管阵列层与所述发光器件层之间。The display panel of claim 11, wherein the heat sensitive thin film layer is located between the thin film transistor array layer and the light emitting device layer.
  13. 根据权利要求10所述的显示面板,其中,所述显示面板还包括至少一个过孔;所述过孔的第一端与所述热敏电阻的第一端连接;所述过孔的第二端与所述驱动晶体管和所述发光器件中的一个连接;所述驱动晶体管和所述发光器件中的另一个与所述热敏电阻的第二端连接。The display panel of claim 10, wherein the display panel further comprises at least one via hole; a first end of the via hole is connected to a first end of the thermistor; a second end of the via hole is connected to the first end of the thermistor; The terminal is connected to one of the driving transistor and the light-emitting device; the other one of the driving transistor and the light-emitting device is connected to the second terminal of the thermistor.
  14. 根据权利要求13所述的显示面板,其中,所述发光器件层包括阳极层;所述阳极层包括阳极;所述阳极的宽度大于或者等于所述热敏电阻的宽度。The display panel of claim 13, wherein the light emitting device layer includes an anode layer; the anode layer includes an anode; and a width of the anode is greater than or equal to a width of the thermistor.
  15. 根据权利要求14所述的显示面板,其中,所述显示面板还包括平坦层;所述平坦层位于所述薄膜晶体管阵列层与所述发光器件层之间;所述过孔至少位于所述平坦层中。The display panel according to claim 14, wherein the display panel further comprises a flat layer; the flat layer is located between the thin film transistor array layer and the light emitting device layer; the via hole is located at least in the flat layer in the layer.
  16. 根据权利要求15所述的显示面板,其中,所述热敏薄膜层位于所述平坦层与所述薄膜晶体管阵列层之间。16. The display panel of claim 15, wherein the heat-sensitive thin film layer is located between the flat layer and the thin film transistor array layer.
  17. 根据权利要求15所述的显示面板,其中,所述热敏薄膜层位于所述平坦层与所述发光器件层之间。The display panel of claim 15, wherein the heat sensitive thin film layer is located between the flat layer and the light emitting device layer.
  18. 根据权利要求13所述的显示面板,其中,所述热敏电阻至少部分覆盖所述过孔的第一端或者所述过孔的第二端。The display panel of claim 13, wherein the thermistor at least partially covers the first end of the via hole or the second end of the via hole.
  19. 根据权利要求10所述的显示面板,其中,所述热敏电阻串接于所述驱动晶体管的源极/漏极中的一个与所述发光器件的阳极之间。The display panel of claim 10, wherein the thermistor is connected in series between one of the source/drain of the driving transistor and the anode of the light emitting device.
  20. 一种显示面板的制备方法,包括:A preparation method of a display panel, comprising:
    制备薄膜晶体管阵列层,所述薄膜晶体管阵列层包括至少一个驱动晶体管;preparing a thin film transistor array layer, the thin film transistor array layer comprising at least one driving transistor;
    制备至少一热敏薄膜层,所述热敏薄膜层包括至少一个热敏电阻;preparing at least one thermosensitive film layer, the thermosensitive film layer comprising at least one thermistor;
    制备发光器件层,所述发光器件层包括至少一个发光器件;以及preparing a light emitting device layer, the light emitting device layer including at least one light emitting device; and
    串接至少一个所述热敏电阻于所述驱动晶体管与所述发光器件构成的发光回路中。At least one thermistor is connected in series in the light-emitting circuit formed by the driving transistor and the light-emitting device.
PCT/CN2021/084274 2021-03-19 2021-03-31 Display panel and manufacturing method therefor WO2022193367A1 (en)

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