WO2022184008A1

WO2022184008A1 - Many-core route mapping method and apparatus, device and medium

Info

Publication number: WO2022184008A1
Application number: PCT/CN2022/078236
Authority: WO
Inventors: 王封; 祝夭龙
Original assignee: 北京灵汐科技有限公司
Priority date: 2021-03-01
Filing date: 2022-02-28
Publication date: 2022-09-09
Also published as: CN114996199A

Abstract

Disclosed are a many-core route mapping method and apparatus, device, and a medium. Said method comprises: determining a target transmission clock of route data to be planned between core nodes in a many-core system (S110); determining, from a plurality of time slices, at least one target time slice to which the target transmission clock belongs (S120); and according to the currently planned route resource corresponding to each target time slice, determining a route path of said route data in each target time slice, so as to perform route mapping (S130). In the present application, route paths are respectively planned according to time slices, improving the utilization rate of network on chip route resources.

Description

Many-core route mapping method, device, device and medium

technical field

The embodiments of the present application relate to the technical field of many-core chips, and in particular, to a many-core route mapping method, apparatus, device, and medium.

Background technique

In the design of many-core (including multi-core) chips, NOC (Network On Chip) is a common solution for realizing communication between cores. Among them, NOC performance is the key to whether the performance of the entire chip can be improved, and route mapping will It has a great influence on the communication efficiency of NOC.

SUMMARY OF THE INVENTION

Embodiments of the present application provide a many-core route mapping method, apparatus, device, and medium, so as to improve the utilization rate of routing resources during many-core route mapping.

In a first aspect, an embodiment of the present application provides a many-core route mapping method, including:

Determine the target transmission clock of the data to be routed between the core nodes in the many-core system;

From a plurality of time slices, determine at least one target time slice to which the target transmission clock belongs;

Determine the routing path of the to-be-planned routing data in each of the target time slices according to the currently planned routing resources corresponding to each of the target time slices, so as to perform route mapping.

In a second aspect, an embodiment of the present application provides a many-core route mapping device, including:

a transmission clock determination module, used for determining the target transmission clock of the data to be routed between the core nodes in the many-core system;

a time slice determination module, configured to determine at least one target time slice to which the target transmission clock belongs from a plurality of time slices;

The routing path planning module is configured to determine the routing path of the to-be-planned routing data in each of the target time slices according to the currently planned routing resources corresponding to each target time slice, so as to perform route mapping.

In a third aspect, embodiments of the present application provide an electronic device, including one or more processors; and a storage device, on which one or more programs are stored, when the one or more programs are stored by the one or more programs The processor executes, so that the one or more processors implement the many-core route mapping method according to any one of claims 1 to 9; one or more I/O interfaces are connected between the processors and the Between the memories, it is configured to realize the information interaction between the processor and the memory.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, implements the many-core route mapping method described in any embodiment of the present application.

In a fifth aspect, embodiments of the present application provide a computer program product, including computer-readable codes, or a non-volatile computer-readable storage medium carrying computer-readable codes, when the computer-readable codes are stored in an electronic device When running in the processor, the processor in the electronic device executes the route mapping method for implementing the many cores described in any embodiment of the present application.

In the technical solution of the embodiment of the present application, according to the target transmission clock of the planned routing data between the core nodes in the many-core system, at least one target time slice corresponding to the to-be-planned routing data is determined, and then according to the target time slice corresponding to each target time slice The corresponding currently planned routing resource determines the routing path of the routing data to be planned in each target time slice, so as to perform route mapping. In the above technical solution, routing paths are planned according to time slices, which can avoid the phenomenon that some paths are blocked and some routes are idle due to different routing times, so as to make full use of routing resources and improve the utilization rate of on-chip network routing resources. , which is beneficial to improve routing efficiency.

Description of drawings

1 is a schematic diagram of a network-on-chip in an embodiment of the present application;

2 is a flowchart of a route mapping method for many cores in an embodiment of the present application;

3 is a schematic diagram of time slice division and routing path planning in an embodiment of the present application;

4 is a flowchart of a route mapping method for many cores in an embodiment of the present application;

5 is a schematic structural diagram of a many-core route mapping apparatus in an embodiment of the present application;

FIG. 6 is a schematic diagram of a hardware structure of an electronic device in an embodiment of the present application.

Detailed ways

The present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application. In addition, it should be noted that, for the convenience of description, the drawings only show some but not all structures related to the present application.

Before discussing the exemplary embodiments in greater detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart depicts various operations (or steps) as a sequential process, many of the operations may be performed in parallel, concurrently, or concurrently. Additionally, the order of operations can be rearranged. The process may be terminated when its operation is complete, but may also have additional steps not included in the figures. The processes may correspond to methods, functions, procedures, subroutines, subroutines, and the like.

In the related art, the routing volume is the data volume transmitted by the routing; in the routing planning process, the routing path is usually planned based on the principle that the routing volume of a single path is the smallest on the premise of the shortest path. In an on-chip network, there are usually multiple paths between a source core node and a target core node. The shortest path between the two refers to the path with the fewest core node hops, and a single path refers to two adjacent core nodes. When there are multiple shortest paths between the source core node and the target core node, the shortest path with the smallest routing amount of a single path can be selected as the planned path from the source core node to the target core node.

After the overall routing is planned, the routing volume between each two core nodes is almost the same. However, once the routing path is determined, in the actual data transmission process, some paths may be blocked and some routes may be idle due to different routing times, resulting in insufficient utilization of routing resources of the on-chip network and low routing efficiency.

Taking the on-chip network shown in Figure 1 as an example, it is assumed that the planned path from the source core node A to the target core node D is (A-B-C-D each letter represents a core node on the many-core chip), and the source core node S to the target core node D The planned path is S-A-H-G-D, and the planned path from the source core node A to the target core node E is A-H-I-F-E. If the route of the path A-B-C-D has completed all data transmission within the first 100 clocks (clk), it will be idle in the following clocks , while the route S-A-H-G-D and the route A-H-I-F-E transmit data between the 200th clock and the 300th clock, the two routes will be blocked between the paths A-H, while the paths A-B-C-D are still idle, and the routing resources are obvious. underutilized. At this time, if the planned path from the source core node S to the target core node D is S-A-B-C-D, the utilization rate of routing resources can be significantly improved, and path congestion can be avoided.

Embodiments of the present disclosure provide a many-core route mapping method, by determining a target transmission clock of to-be-planned routing data between core nodes in a many-core system; from multiple time slices, determining at least one of the target transmission clocks to which the target transmission clock belongs Target time slice: According to the current planning routing resources corresponding to each target time slice, determine the routing path of the to-be-planned routing data within each target time slice for route mapping, which can significantly improve the utilization of routing resources, thereby improving the Communication efficiency of many-core systems.

2 is a flowchart of a many-core route mapping method provided by an embodiment of the present application. The embodiment of the present application can be applied to the situation of performing routing path planning on a network-on-chip of a many-core chip. It is implemented by the route mapping device of the core, which can be implemented in software and/or hardware, and can generally be integrated in electronic equipment.

As shown in FIG. 2 , the route mapping method of the many-core provided by the embodiment of the present application includes:

S110. Determine the target transmission clock of the routing data to be planned between the core nodes in the many-core system.

In this step, the routing data to be planned refers to the data on the many-core chip that is transmitted from the source core node to the target core node and needs to be planned for the on-chip network routing path. The core node refers to a node device corresponding to one core in the many-core chip, and the source core node and the target core node are the starting and ending core nodes of the routing data to be planned.

In this embodiment of the present application, the target transmission clock of the routing data to be planned refers to the clock range occupied by the routing data to be planned for transmission on the on-chip network. For example, it may be the transmission start and end clock, and may also be the transmission start clock and the transmission clock duration. The transmission clock duration may be determined according to the quotient of the data volume of the routing data to be planned and the routing bandwidth. Exemplarily, when the clock (clk) of some routing data to be planned starts to be transmitted (starting clock) at the 20th clock, 20 clocks (transmission clock duration) need to be transmitted.

For convenience of description, in the description of the following embodiments, the Mth clock may be simply referred to as the clock M, where M is an integer greater than or equal to 1. For example, the 20th clock may be referred to as clock 20 for short, and the 40th clock may be referred to as clock 40 for short.

S120. From the multiple time slices, determine at least one target time slice to which the target transmission clock belongs.

In this step, the time slice is obtained by dividing the clock, and each time slice includes at least one clock.

In some embodiments, before step S110, the method further includes: S11, counting target transmission clocks with different routing data to be planned, and obtaining all clocks with different routing data to be planned; S12, dividing time slices according to all the clocks to obtain Multiple time slices and clocks included in each time slice.

Exemplarily, the multiple time slices may be time slices obtained by dividing all clocks evenly. The number of time slices is related to the number of clocks included in each time slice. The smaller the number of clocks included in each time slice, the greater the time slice. the greater the number.

In this embodiment of the present application, the number of clocks included in different time slices is not exactly the same. Among the multiple time slices obtained by division, the number of clocks included in any two time slices may be the same or different.

In some embodiments, after determining the clocks included in each time slice, the target transmission clock may be compared with the clocks included in each time slice, so as to determine each time slice to which the target transmission clock belongs, The time slice is called the target time slice.

For example, the target transmission clock is clock 20 to clock 40, the clocks included in the first time slice are clock 0 to clock 10, the clocks included in the second time slice are clock 11 to clock 30, and the clocks included in the third time slice are clocks are clocks 31 to 40, and the target time slices to which the target transmission clock belongs are the second time slice and the third time slice.

S130: Determine a routing path of the routing data to be planned within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform route mapping.

In some embodiments, when the routing data to be planned is only transmitted in part of the clock, the routing path of the routing data to be planned only needs to be determined in the corresponding target time slice, and the route of the routing data to be planned does not need to be determined in the remaining time slices The path will not occupy the routing resources in the rest of the time slice.

In the embodiment of the present application, for each target time slice, the routing paths of the routing data to be planned are separately planned. The routing paths planned in each target time slice are integrated, that is, the finally determined routing path of the routing data to be planned.

Optionally, when the number of target time slices is multiple, the routing paths of the routing data to be planned in different target time slices are not exactly the same. For multiple target time slices, the routing paths of the routing data to be planned in any two target time slices may be the same or different. For example, the routing path of the routing data to be planned from source core node A to target core node D in the second time slice is A-B-C-D, and the routing data to be planned from source core node A to target core node D in the third time slice The routing path is A-H-G-D.

The routing path of the routing data to be planned in each target time slice is specifically determined with reference to the currently planned routing resources in the target time slice. The currently planned routing resource refers to the status of routing planning at the current moment, and specifically refers to the planned routing paths and their routing quantities.

That is, when determining the routing path of the to-be-planned routing data in a certain target time slice, only the currently planned routing resources in the target time slice are considered, and the currently planned routing resources in other target time slices do not need to be considered.

When determining the routing path of the to-be-planned routing data within the target time slice according to the currently planned routing resources corresponding to the target time slice, a routing path can be selected based on the principle of the minimum total amount of routing data for a single path, wherein a single path is adjacent path between two cores.

Optionally, according to the currently planned routing resources corresponding to the target time slice, determine the routing path of the to-be-planned routing data within the target time slice, which may be specifically:

Determine the total amount of currently planned routing data of a single path included in the target time slice; according to the target path selection strategy, according to the total current planned routing data of a single path included in the target time slice, determine that the to-be-planned routing data is within the target time slice routing path.

The total amount of currently planned routing data refers to the total amount of planned routing data at the current moment. For example, a routing data with a data volume of 10 has been planned on a single path between core node A and core node H. If the number of routing data is 15, the total amount of currently planned routing data of a single path between the core node A and the core node H is 25.

The target path selection strategy may be any strategy for path selection of the route to be planned on the on-chip network, which aims to improve the utilization rate of routing resources and avoid path congestion, which is not specifically limited in this embodiment of the present application.

Exemplarily, the target path selection strategy may be based on the minimum number of node hops between the source core node and the target core node, and preferentially select the path with the smallest total amount of routing data for a single path. When planning the route between the source core node and the target core node, the general direction of the routing path can be determined first according to the principle of the minimum number of hops between the source core node and the target core node, and then the overall direction of the routing data can be determined according to a single path. The final routing path of the to-be-planned routing data within the target time slice is determined according to the principle of the least amount.

Specifically, each single path of the to-be-planned routing data from the source core node to the target core node in the on-chip network can be sequentially determined according to the above target path selection strategy, and these single paths are integrated as the to-be-planned routing data at the target time On-chip routing paths.

Taking the route planning from source core node A to target core node D as an example, it is assumed that the number of core node hops from core node A to core node D via core node H is the same as the number of core node hops from core node A to core node D via core node B. If the number of node hops is equal and least, then the routing path from core node A to core node D via core node H can be selected, or the routing path from core node A to core node D via core node B can be selected; When selecting a single path between core node A and core node H, or selecting a single path between core node A and core node B, the single path with the smallest total amount of routing data is preferentially selected. If core node A passes through the single path between core node B If the total amount of routing data of the path is the smallest, then a single path between core node A and core node B is selected, that is, the routing path between the source core node A and the target core node D is planned to be the core node A through the core node B to the core node. The routing path of node D.

Further, in some embodiments, according to the target path selection strategy, according to the total amount of currently planned routing data of a single path included in the target time slice, the routing path of the to-be-planned routing data in the target time slice is determined, which may specifically include the following: step:

For the current core node involved in the routing path of the to-be-planned routing data in the target time slice, determine a horizontal single path and a vertical single path corresponding to the current core node;

If the total amount of current planned routing data of a single path in the horizontal direction and a single path in the vertical direction is not equal, then determine the next core node corresponding to the current core node according to the single path with the smallest total amount of currently planned routing data;

If the total amount of currently planned routing data of a single horizontal path and a single vertical path is equal, the next core node corresponding to the current core node is determined according to the single horizontal path or the single vertical path.

After determining the current core node of the routing data to be planned (the first current core node is the source core node of the routing data to be planned):

First, a single horizontal path and a single vertical path corresponding to the current core node are determined. Among them, a single path in the horizontal direction refers to a single horizontal path to the left or a single path to the right horizontally determined according to the principle of the minimum number of hops between the source core node and the target core node; The vertical upward single path or the vertical downward single path determined by the principle of least hops between the core node and the target core node.

Secondly, it is judged whether the total amount of the current planning routing data of the horizontal single path and the vertical single path corresponding to the current core node is equal. And determine the next core node corresponding to the current core node according to the single path, and take it as the current core node again; if so, select a horizontal single path or a vertical single path as the planned single path according to the preset priority, and The next core node corresponding to the current core node is determined according to the single path, and is taken as the current core node again.

For the re-determined current core node, the above process is repeated until the next core node corresponding to the current core node is determined as the target core node of the routing data to be planned, and the planning of the routing path of the routing data to be planned within the target time slice is completed. .

Taking the on-chip network shown in Figure 1 as an example, it is assumed that the source core node of the data to be planned is core node A, the target core node is core node D, the routing data volume is 20, and the currently planned routing data of each single path in the target time slice The total amount is: the total current planned routing data of a single path between core node S and core node A is 10, and the current planned routing data total of a single path between core node A and core node H is 10. The current total planned routing data of a single path between H and core node G is 10, and the current planned routing data of a single path between core node G and core node D is 10. The total current planning routing data of a single path between core node A and core node B is 0, and the current planning routing data total of a single path between core node B and core node C is 0, and core node C to core node. The current total planned routing data of a single path between D is 0.

First, take core node A as the current core node, and determine the single horizontal path corresponding to core node A as core node A according to the principle of the minimum number of hops between the source core node and the target core node (the number of node hops is three hops). A single path to the core node H, the vertical single path corresponding to the core node A is a single path between the core node A and the core node B.

Secondly, since the total amount of current planned routing data of a single path in the horizontal direction corresponding to core node A is 10, and the total amount of current planned routing data of a single path in the vertical direction corresponding to core node A is 0, it is determined that the total amount of planned routing data of a single path in the vertical direction corresponding to core node A is 0. The total amount of current planning routing data of the corresponding single path in the horizontal direction and the single path in the vertical direction is not equal, so the single vertical path corresponding to the core node A is used as the planned single path, and the core node is determined according to the single path. For the next core node B corresponding to A, the current core node is updated from core node A to core node B.

In this cycle, after planning a single path between core node A and core node B, the following single paths are a single path between core node B and core node C, and a single path between core node C and core node D, thus , the routing path of the routing data to be planned within the target time slice is core node A-core node B-core node C-core node D.

On the basis of the above target path selection strategy, the target path selection strategy may further include: if based on the minimum number of node hops between the source core node and the target core node, preferentially select the path with the smallest total amount of routing data for a single path to meet the preset requirements If the overload condition is exceeded, you can comprehensively consider the number of node hops and the total amount of current planned routing data to re-determine the alternative routing paths for the routing data to be planned, and evaluate the alternative routing paths to select the evaluation result among the alternative routing paths. The optimal routing path is used as the final routing path of the routing data to be planned.

The overload condition may be, for example, that the total amount of path routing data is greater than the set quantity threshold, or the ratio of the total amount of path routing data to the to-be-planned routing data reaches a set target value, which is not specifically limited in this embodiment of the present application.

Exemplarily, evaluating the alternative routing path may be to score the alternative routing path according to the respective proportions of the number of node hops and the total amount of currently planned routing data, and obtain a routing path with an optimal evaluation result according to the scoring result; The alternative routing paths are evaluated, and the alternative routing paths may also be scored according to a preset evaluation function, and a routing path with an optimal evaluation result is obtained according to the scoring result. How to evaluate the alternative routing paths may be determined according to actual applications, which is not specifically limited in this embodiment of the present application.

Still taking the on-chip network shown in Figure 1 as an example, assume that the source core node of the data to be planned is core node A, the target core node is core node D, and the path with the least number of node hops between the source core node and the target core node is the path A-B-C-D and paths A-H-G-D, if one of the two paths is determined according to the principle that the total amount of routing data on a single path satisfies the preset overload condition, if the total amount of routing data on the path is greater than the set number threshold, it is necessary to comprehensively consider node hops Re-determine the alternative routing path of the to-be-planned routing data based on the total number of routing data and the current total planned routing data. At this time, on the premise of increasing the number of path node hops, the path with a smaller total routing data per path can be selected as the alternative routing path. For example, if the total amount of routing data for a single path is zero, assuming that the selected alternative routing paths are path A-S-J-K-C-D and path A-H-I-F-E-D, these two paths can be evaluated, and the best evaluated path is used as the route data to be planned. Final routing path.

In the case where the target transmission clocks of the data to be planned belong to multiple target time slices, the routing paths of the data to be planned in each target time slice need to be sequentially determined as the data transmission paths.

After a routing path of the to-be-planned routing data is planned, the other routing paths of the to-be-planned data are continued to be planned, until the planning of all the to-be-planned routing data routing paths is completed.

When the overall routing path planning is completed, the total amount of routing between each two core nodes in each time slice is similar. After mapping to the many-core chip, the corresponding data packets can be transmitted according to the determined routing path.

Further, before determining at least one target time slice to which the target transmission clock belongs, the route mapping method of the embodiment of the present application may further include: adjusting a plurality of time slices according to the current routing information, and updating the time slices included in each time slice. Clock to get updated multiple time slices.

Among them, the smaller the time slice, the greater the number of time slices, and the finer the routing path planning, and the higher the route utilization rate. However, the number of time slices is directly related to the number of routing table entries, and the number of routing paths in each time slice is directly related to the number of routing entries in the routing table. Therefore, the storage space occupied by the routing instructions and the size of the time slice can be balanced by adjusting the time slice.

In some embodiments, adjusting multiple time slices according to the current routing information may include: determining the total target number of time slices according to the size of the routing table and/or the number of routing entries, and dividing the time obtained by dividing according to the total target quantity slices are split or merged.

Among them, according to the balancing strategy of the storage space occupied by routing instructions and the size of time slices, the total target number of time slices can be determined, and according to the difference between the current number of time slices and the total number of targets, the divided time slices are processed. Split or merge.

In some embodiments, the time slice of routing data whose data volume is less than the data volume threshold may be regarded as a time slot with a small task volume, and the time slot of routing data whose data volume is greater than or equal to the data volume threshold may be regarded as a time slot with a large task volume The two time slices with a small amount of tasks are combined into one time slice, or the larger time slice can be split into multiple time slices.

In some implementations, the adjustment of the time slice obtained by division may include: if the routing paths planned in adjacent time slices are consistent, combining the adjacent time slices into one time slice.

If the routing paths in multiple adjacent time slices are completely consistent, these adjacent multiple time slices can be combined into one time slice to reduce routing table entries, optimize the number of routes, and reduce the number of routes. The effect of the size of the storage space occupied by the instruction.

In the technical solutions of the embodiments of the present application, at least one target time slice corresponding to the to-be-planned routing data is determined according to the target transmission clock of the to-be-planned routing data, and then the to-be-planned routing resources are determined according to the currently planned routing resources corresponding to each target time slice. The routing path of routing data within each target time slice for routing mapping. In the above technical solution, routing paths are planned according to time slices, which can avoid the phenomenon that some paths are blocked and some routes are idle due to different routing times, so as to make full use of routing resources and improve the utilization rate of on-chip network routing resources. , which is beneficial to improve routing efficiency.

For example, assuming that 10 time slices are divided, as shown in Figure 3 (only some time slices are shown in the figure), the transmission data from the core node S to the core node D may be transmitted in the first time slice. Related Art The paths in the last nine time slices (not fully shown in the figure) are also occupied, but in fact, the routing paths in the later time slices are all empty. Then, based on the total data volume of all time slices, this path is exclusively used in all time slices, and the rest of the transmitted data needs to be transmitted by detours, which will bring additional routing resource consumption.

In the technical solutions provided in the embodiments of the present application, the routing path from the core node S to the core node D in the next nine time slices is not occupied, and other data can be transmitted via the core node S and the core node D (assuming that the It is used by the transmission data from the core node O to the core node P), thereby improving the routing utilization rate and reducing the congestion. Furthermore, the technical solutions of the embodiments of the present application individually plan routing paths for each time slice, which improves routing efficiency, reduces detours and congestion, reduces total routing time, and improves information throughput.

4 is a flowchart of a many-core route mapping method provided by an embodiment of the present application. The embodiment of the present application is embodied on the basis of the foregoing embodiment, wherein, in determining the route between the core nodes in the many-core system Before the target transmission clocks of the routing data to be planned, the method provided by the embodiment of the present application further includes: counting target transmission clocks of different routing data to be planned to obtain all clocks of different routing data to be planned; dividing time slices according to all the clocks to obtain Multiple time slices and clocks included in each time slice.

As shown in FIG. 4 , the route mapping method of the many-core provided by the embodiment of the present application includes:

S410. Determine the target transmission clock of the routing data to be planned between the core nodes in the many-core system.

S420: Counting target transmission clocks of different routing data to be planned, to obtain all clocks of different routing data to be planned.

S430. Divide the time slices according to all the clocks to obtain multiple time slices and the clocks included in each time slice.

In this embodiment of the present application, before determining the target time slice to which the target transmission clock belongs, the time slice may be firstly divided according to all the clocks, and the clock corresponding to each time slice is determined.

Exemplarily, the clock can be divided evenly to obtain multiple time slices, and each time slice includes the same number of clocks; it is also possible to non-uniformly divide the clock to obtain multiple time slices, and the clocks included in different time slices The numbers are not exactly the same.

In some embodiments, in step S430, the steps of dividing time slices according to all the clocks may specifically include: S21, according to the data volume of the multiple pieces of routing data to be planned and the target transmission clock of each piece of routing data to be planned, perform time Slice segmentation; S22, if the starting and ending core nodes of at least two of the multiple pieces of routing data to be planned are the same, determine the overlapping clock according to the target transmission clocks of the at least two routing data to be planned, and divide the overlapping clock as a time piece.

In the above step S21, statistics may be performed on each piece of data to be routed, and the number of time slices may be determined according to the target transmission clock and data volume of the plurality of pieces of data to be routed, so as to realize the division of time slices.

For example, a piece of data to be routed with the largest amount of data may be selected, and the target transmission clock of the piece of data to be routed may be divided into one time slice or multiple time slices.

For another example, several pieces of data to be routed with a small amount of data can be selected. If the target transmission clocks of these pieces of data to be routed are close to each other or there are overlapping clocks, the target transmission clocks of these pieces of data to be routed are integrated as a time slice. or multiple slices.

For another example, if the target transmission clocks of the data to be routed from core node A to core node D are the first N clocks, the first N clocks can be divided into a time slice; If the target transmission clock of the routing data is the last N clocks, the last N clocks can be divided into a time slice.

According to the target transmission clock and data volume of each piece of routing data to be planned, the manner of performing time slice segmentation may be determined according to the actual situation, which is not specifically limited in this embodiment of the present application.

In the above step S22, the time slice may be divided according to the target transmission clock of each piece of routing data to be planned and the starting and ending core nodes.

In this embodiment, if in each piece of routing data to be planned, there are multiple pieces of routing data to be planned with the same starting and ending core nodes, that is, multiple pieces of routing data to be planned with the same source core node and target core node, the A plurality of target transmission clocks of data to be routed are divided into time slices.

For example, if the starting and ending core nodes of the two routing data to be planned are the same, and there is no overlapping clock between the target transmission clocks of the two routing data to be planned, the target transmission clocks of the two routing data to be planned can be regarded as a time slice respectively. Divide.

Further, according to the target transmission clock and the starting and ending core nodes of each piece of routing data to be planned, time slice segmentation may include: if the starting and ending core nodes of the two pieces of routing data to be planned are the same, then according to the two pieces of routing data to be planned, the starting and ending core nodes are the same. The target transfer clock determines the overlapping clock and divides the overlapping clock as a time slice.

If the starting and ending core nodes of the two routing data to be planned are the same, and there is an overlapping clock between the target transmission clocks of the two routing data to be planned, the overlapping clock can be divided as a time slice. Further, the respective non-overlapping clocks in the two target transmission clocks of the data to be routed to be planned may be divided as a time slice respectively.

For example, the starting and ending core nodes of the two routing data to be planned are both core node S and core node D. Among them, the target transmission clock of one routing data to be planned is the 20th clock to the 40th clock, and the other one is the routing data to be planned. The target transmission clock is the 30th clock to the 50th clock. Therefore, the overlapping clocks of the two target transmission clocks of the data to be routed are the 30th clock to the 40th clock, so the 30th clock to the 40th clock can be 40 clocks are divided as a time slice. In addition, the 20th clock to the 30th clock may be divided as one time slice, and the 40th clock to the 50th clock may be divided as one time slice.

That is, when the time slice is divided, the principle is to minimize the overlapping time of different routes passing through the same path. Furthermore, in the time slice corresponding to the 20th clock to the 30th clock, and in the time slice corresponding to the 40th clock to the 50th clock, the two data to be routed can be time-division multiplexed with the same maximum For the optimal path, in the time slice corresponding to the 30th clock to the 40th clock, there is only one to-be-planned route data to plan the above-mentioned optimal route, and the other to-be-planned route data to re-plan its suboptimal route.

S440. From the multiple time slices, determine at least one target time slice to which the target transmission clock belongs.

S450: Determine a routing path of the routing data to be planned within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform route mapping.

Further, the time slice obtained by the segmentation can also be adjusted to balance the size of the storage space occupied by the routing instruction and the size of the time slice.

For details that are not explained in detail in the embodiments of the present application, please refer to the foregoing embodiments, which will not be repeated here.

According to the many-core route mapping method of the embodiment of the present application, it is possible to reduce route congestion on the premise that each route path is the shortest route, thereby improving route efficiency.

FIG. 5 is a schematic structural diagram of a many-core route mapping apparatus provided by an embodiment of the present application. The embodiment of the present application may be applied to a situation in which routing paths are planned for a network-on-chip on a many-core chip, and the apparatus may adopt software and/or hardware. It can be realized in a way and can generally be integrated in electronic equipment. As shown in FIG. 5 , the apparatus 500 includes: a transmission clock determination module 510 , a time slice determination module 520 and a routing path planning module 530 . in,

The transmission clock determination module 510 is used to determine the target transmission clock of the to-be-planned routing data between the core nodes in the many-core system;

a time slice determining module 520, configured to determine at least one target time slice to which the target transmission clock belongs from a plurality of time slices;

The routing path planning module 530 is configured to determine the routing path of the routing data to be planned within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform route mapping.

In the technical solutions of the embodiments of the present application, at least one target time slice corresponding to the to-be-planned routing data is determined according to the target transmission clock of the to-be-planned routing data, and then the to-be-planned routing resources are determined according to the currently planned routing resources corresponding to each target time slice The routing path of routing data within each target time slice for routing mapping. In the above technical solution, routing paths are planned according to time slices, which can avoid the phenomenon that some paths are blocked and some routes are idle due to different routing times, so as to make full use of routing resources and improve the utilization rate of on-chip network routing resources. , which is beneficial to improve routing efficiency.

Optionally, the number of target time slices is multiple, wherein the routing paths of the routing data to be planned in different target time slices are not exactly the same.

Optionally, the above-mentioned device further includes: a time slice segmentation module, configured to count the target transmission clocks of different to-be-planned routing data before determining the target transmission clocks of the to-be-planned routing data between the core nodes in the many-core system, Obtain all clocks with different routing data to be planned; divide time slices according to all clocks to obtain multiple time slices and the clocks included in each time slice.

Optionally, the number of clocks included in different time slices is not the same.

Optionally, the time slice segmentation module is specifically used to perform time slice segmentation according to the target transmission clock and data volume of each piece of routing data to be planned; the time slice segmentation module is also specifically used if at least one of the If the starting and ending core nodes of the two routing data to be planned are the same, the overlapping clock is determined according to the target transmission clocks of the at least two routing data to be planned, and the overlapping clock is divided into a time slice.

Optionally, the above device further includes: a time slice adjustment module, configured to adjust multiple time slices according to the current routing information before determining at least one target time slice to which the target transmission clock belongs, and update the time slices included in each time slice. Clock to get updated multiple time slices.

Optionally, a time slice adjustment module, which is specifically used to determine the total target number of time slices according to the size of the routing table and/or the number of routing entries, and to split or merge the obtained time slices according to the total number of targets; If the planned routing paths in adjacent time slices are consistent, the adjacent time slices are merged into one time slice.

Optionally, the routing path planning module 330 is specifically configured to determine the total amount of currently planned routing data of a single path included in the target time slice; wherein, a single path is a path between two adjacent cores; according to the target path selection strategy, The routing path of the to-be-planned routing data in the target time slice is determined according to the total amount of currently planned routing data of a single path included in the target time slice.

Further, the routing path planning module 330 is specifically configured to determine a horizontal single path and a vertical single path corresponding to the current core node for the current core node involved in the routing path of the routing data to be planned within the target time slice; if If the total amount of currently planned routing data of a single horizontal path and a single vertical path is not equal, the next core node corresponding to the current core node is determined according to the single path with the smallest total planned routing data; If the total amount of currently planned routing data for a single vertical path is equal, the next core node corresponding to the current core node is determined according to a single horizontal path or a single vertical path.

The above-mentioned many-core route mapping apparatus can execute the many-core route-mapping method provided by any embodiment of the present application, and has corresponding functional modules and beneficial effects corresponding to the executed many-core route-mapping method.

FIG. 6 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application. As shown in FIG. 6 , the electronic device includes: one or more processors 601 ; and a memory 602 on which one or more programs are stored. When the one or more programs are executed by the one or more processors, one or more programs are executed. Multiple processors implement the task mapping method of the first aspect of the embodiments of the present application; one or more I/O interfaces 603 are connected between the processors and the memory, and are configured to implement information interaction between the processor and the memory. The processor 601 is a device with data processing capability, including but not limited to a central processing unit (CPU), etc.; the memory 602 is a device with data storage capability, including but not limited to random access memory (RAM, more specifically Such as SDRAM, DDR, etc.), read only memory (ROM), electrified erasable programmable read only memory (EEPROM), flash memory (FLASH); the I/O interface (read and write interface) 603 is connected between the processor 601 and the memory 602 , can realize the information interaction between the processor 601 and the memory 602, which includes but is not limited to a data bus (Bus) and the like.

In some embodiments, the processor 601, the memory 602, and the I/O interface 603 are interconnected by a bus, which in turn is connected to other components of the computing device.

In some embodiments, the memory 602, as a non-transitory computer-readable storage medium, may be used to store software programs and computer-executable programs, such as program instructions corresponding to a many-core route mapping method in the embodiments of the present application , including: determining the target transmission clock of the to-be-planned routing data between the core nodes in the many-core system; from multiple time slices, determining at least one target time slice to which the target transmission clock belongs; The currently planned routing resources are determined, and the routing path of the to-be-planned routing data in each target time slice is determined for routing mapping.

The processor 601 executes various functional applications and data processing of the chip by running the software program instructions stored in the memory 602, ie, implements a many-core route mapping method in any embodiment of the above method.

The memory 602 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required by at least one function; the storage data area may store data created according to the use of the chip, and the like. Additionally, memory 602 may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device.

Embodiments of the present application also provide a storage medium containing computer-executable instructions, and the computer-executable instructions are used to implement a many-core route mapping method when executed by a processor. The method includes: determining a core in a many-core system The target transmission clock of the to-be-planned routing data between nodes; from multiple time slices, determine at least one target time slice to which the target transmission clock belongs; according to the currently planned routing resources corresponding to each target time slice, determine the to-be-planned route The routing path of data within each target time slice for route mapping.

Optionally, the computer-executable instructions, when executed by the processor, may also be used to implement the technical solution of a many-core route mapping method provided by any embodiment of the present application.

Embodiments of the present application also provide a computer program product, including computer-readable codes, or a non-volatile computer-readable storage medium carrying the computer-readable codes, when the computer-readable codes run in a processor of an electronic device , the processor in the electronic device executes the route mapping method for implementing the many-core of the above embodiment.

From the above description of the embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software and necessary general-purpose hardware, and of course can also be implemented by hardware, but in many cases the former is a better implementation manner . Based on such understanding, the technical solutions of the present application can be embodied in the form of software products in essence or the parts that make contributions to related technologies, and the computer software products can be stored in a computer-readable storage medium, such as a computer floppy disk, A read-only memory (ROM), a random access memory (RAM), a flash memory (FLASH), a hard disk or an optical disk, etc., include several instructions to make the chip execute the methods of the various embodiments of the present application.

It is worth noting that, in the embodiment of the above-mentioned many-core route mapping device, the included units and modules are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be realized; In addition, the specific names of the functional units are only for the convenience of distinguishing from each other, and are not used to limit the protection scope of the present application.

Note that the above are only preferred embodiments of the present application and applied technical principles. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present application. Therefore, although the present application has been described in detail through the above embodiments, the present application is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present application. The scope is determined by the scope of the appended claims.

Claims

A route mapping method for many cores, comprising:

Determine the target transmission clock of the data to be routed between the core nodes in the many-core system;

From a plurality of time slices, determine at least one target time slice to which the target transmission clock belongs;

Determine the routing path of the to-be-planned routing data in each of the target time slices according to the currently planned routing resources corresponding to each of the target time slices, so as to perform route mapping.
The method according to claim 1, wherein the number of the target time slices is multiple, wherein the routing paths of the to-be-planned routing data in different target time slices are not identical.
The method according to claim 1, wherein before the determining the target transmission clock of the data to be routed between the core nodes in the many-core system, the method further comprises:

Counting target transmission clocks of different routing data to be planned, to obtain all clocks of the routing data different to be planned;

Divide the time slices according to all the clocks to obtain multiple time slices and the clocks included in each time slice.
The method according to claim 3, wherein the dividing a time slice according to all the clocks comprises:

According to the data volume of the multiple pieces of routing data to be planned and the target transmission clock of each piece of the routing data to be planned, time slice segmentation is performed;

Wherein, if at least two of the multiple pieces of the to-be-planned routing data have the same starting and ending core nodes, an overlapping clock is determined according to the target transmission clocks of the at least two to-be-planned routing data, and the overlapping clocks are switched to divided as a time slice.
The method according to claim 1, wherein before the determining of at least one target time slice to which the target transmission clock belongs, the method further comprises:

The multiple time slices are adjusted according to the current routing information, and the clock included in each time slice is updated to obtain updated multiple time slices.
The method according to claim 5, wherein the adjusting the multiple time slices according to the current routing information comprises:

Determine the total target number of time slices according to the size of the routing table and/or the number of routing bars, and split or merge the time slices obtained by splitting according to the total target number;

Wherein, if the planned routing paths in adjacent time slices are consistent, the adjacent time slices are merged into one time slice.
The method according to claim 1, wherein the determining the routing path of the to-be-planned routing data within the target time slice according to the currently planned routing resources corresponding to the target time slice comprises:

Determine the total amount of currently planned routing data of a single path included in the target time slice; wherein, the single path is a path between two adjacent cores;

According to the target path selection strategy, the routing path of the to-be-planned routing data in the target time slice is determined according to the total amount of currently planned routing data of a single path included in the target time slice.
The method according to claim 7, wherein, according to the target path selection strategy, according to the total amount of currently planned routing data of a single path included in the target time slice, it is determined that the to-be-planned routing data is in the Routing paths within the target time slice, including:

For the current core node involved in the routing path of the to-be-planned routing data in the target time slice, determine a horizontal single path and a vertical single path corresponding to the current core node;

If the total amount of currently planned routing data of the single path in the horizontal direction and the single path in the vertical direction is not equal, determine the next path corresponding to the current core node according to the single path with the smallest total amount of the currently planned routing data. a core node;

If the total amount of the currently planned routing data of the single horizontal path and the single vertical path is equal, then determine the current core node corresponding to the single horizontal path or the single vertical path. next core node.
The method according to any one of claims 1-8, wherein the number of clocks included in different time slices is not exactly the same.
A kind of route mapping device of many cores, is characterized in that, comprises:

a transmission clock determination module, used for determining the target transmission clock of the data to be routed between the core nodes in the many-core system;

a time slice determination module, configured to determine at least one target time slice to which the target transmission clock belongs from a plurality of time slices;

The routing path planning module is configured to determine the routing path of the to-be-planned routing data in each of the target time slices according to the currently planned routing resources corresponding to each target time slice, so as to perform route mapping.
An electronic device comprising:

one or more processors;

A storage device having one or more programs stored thereon which, when executed by the one or more processors, cause the one or more processors to implement any one of claims 1 to 9 a method as described;

One or more I/O interfaces, connected between the processor and the memory, are configured to realize the information interaction between the processor and the memory.
A computer-readable storage medium on which a computer program is stored, characterized in that, when the program is executed by a processor, the method according to any one of claims 1-9 is implemented.
A computer program product comprising computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, which when executed in a processor of an electronic device, the electronic A processor in the device executes the method for implementing any of claims 1-9.