WO2022166122A1 - 可编程的光芯片、终端 - Google Patents

可编程的光芯片、终端 Download PDF

Info

Publication number
WO2022166122A1
WO2022166122A1 PCT/CN2021/107517 CN2021107517W WO2022166122A1 WO 2022166122 A1 WO2022166122 A1 WO 2022166122A1 CN 2021107517 W CN2021107517 W CN 2021107517W WO 2022166122 A1 WO2022166122 A1 WO 2022166122A1
Authority
WO
WIPO (PCT)
Prior art keywords
optical
programmable
core
basic device
chip
Prior art date
Application number
PCT/CN2021/107517
Other languages
English (en)
French (fr)
Inventor
欧阳伯灵
崔乃迪
冯俊波
郭进
Original Assignee
联合微电子中心有限责任公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 联合微电子中心有限责任公司 filed Critical 联合微电子中心有限责任公司
Priority to US17/924,346 priority Critical patent/US20230185155A1/en
Publication of WO2022166122A1 publication Critical patent/WO2022166122A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/29Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the position or the direction of light beams, i.e. deflection
    • G02F1/31Digital deflection, i.e. optical switching
    • G02F1/313Digital deflection, i.e. optical switching in an optical waveguide structure
    • G02F1/3136Digital deflection, i.e. optical switching in an optical waveguide structure of interferometric switch type
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122Basic optical elements, e.g. light-guiding paths
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/29Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the position or the direction of light beams, i.e. deflection
    • G02F1/31Digital deflection, i.e. optical switching
    • G02F1/311Cascade arrangement of plural switches
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/29Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the position or the direction of light beams, i.e. deflection
    • G02F1/31Digital deflection, i.e. optical switching
    • G02F1/313Digital deflection, i.e. optical switching in an optical waveguide structure
    • G02F1/3137Digital deflection, i.e. optical switching in an optical waveguide structure with intersecting or branching waveguides, e.g. X-switches and Y-junctions
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00Nanooptics, e.g. quantum optics or photonic crystals

Definitions

  • Embodiments of the present invention relate to the field of integrated photonic chips, and in particular, to a programmable optical chip and a terminal.
  • the photonic integration industry is currently in the initial stage of large-scale integration. With the wide application of optical chips in optical communication, optical quantum computing, microwave photonics and other fields, the functions that optical chips need to achieve become more and more complex. Similar to the development process of the integrated circuit industry, photonic integration There is an urgent need in the field for a programmable optical chip that can promote the rapid development of the photonics integration industry as well as the Field Programmable Gate Array (FPGA).
  • FPGA Field Programmable Gate Array
  • Programmable optical chips have a large number of potential applications in optical communication, photonic artificial intelligence, microwave photonics, optical quantum computing, optical sensing and other fields.
  • the current mainstream optical chips in the industry are developed and customized according to the specific needs of users, that is, an optical chip for a certain application needs to go through the design, development and production process before it can be put into use, and requires a long period of design, development and production. cycle, the production efficiency is low, and the production cost is relatively high. Therefore, there is an urgent need for a programmable optical chip, which can realize various functions by programming the optical chip, thereby reducing the production cost of the optical chip.
  • the technical problem solved by the embodiments of the present invention is to provide a programmable optical chip.
  • the optical chip can realize a variety of different functions.
  • an embodiment of the present invention provides a programmable optical chip, the optical chip includes: one or more first transmission paths for transmitting optical signals in the programmable optical chip; A programmable basic device, the first programmable basic device is arrayed in a first preset shape; an optical IP core, the first programmable basic device is located between the optical IP core and the first programmable basic device Optical coupling between basic devices and between the optical IP cores via the first transmission path; wherein the optical IP cores include one or more types of optical soft cores, and/or, one or more types of optical soft cores A class of light-fixed cores, each light-fixed core comprising a second programmable base device and one or more second transmission paths for transmitting optical signals within said light-soft core, each light-fixed core comprising a third programmable base device a programming base device, one or more third transmission paths for transmitting the optical signal within the optical solid core, and a first optical device for processing the optical signal; the first programmable base The device
  • the second programmable basic devices are arranged in an array of a second preset shape, and different types of optical soft cores satisfy one or more of the following: the second preset shape is different, the second programmable The type of the base device is different, the size of the second programmable base device is different, the number of the second programmable base device is different, and the overall shape of the second programmable base device is different.
  • the optical IP core further includes: one or more types of optical hard cores, where the optical hard core is a second optical device for processing the optical signal.
  • the optical hard core includes one or more of the following: a power amplifier, a laser, a detector, a modulator, a light intensity monitor, an attenuator, a filter, a delay line, and a wavelength division multiplexer.
  • the optical solidification core includes one or more of the following: a programmable delay line, a programmable filter, a programmable modulator, and a programmable wavelength division multiplexer.
  • the optical chip satisfies one or more of the following: the first programmable basic device may be a Mach-Zehnder interferometer-based optical switch or a microelectromechanical device; the second programmable basic device may be Mach-Zehnder interferometer-based optical switch or MEMS device; the third programmable basic device may be a Mach-Zehnder interferometer-based optical switch or MEMS device.
  • the optical IP core is located on the periphery of the plurality of first transmission paths or embedded in the interior of the plurality of first transmission paths.
  • the optical chip further includes an optical interface for inputting or outputting optical signals
  • the optical interface includes a grating coupling-based interface and an edge-coupling-based interface.
  • the optical chip further includes: an electrical interface, where the electrical interface is used for inputting or outputting electrical signals.
  • the first programmable basic devices are arranged in a hexagonal array.
  • the plurality of second programmable basic devices in each optical soft core are arranged in a grid array or a triangular array.
  • the first transmission path, the second transmission path, and the third transmission path are optical waveguides.
  • Embodiments of the present invention further provide a terminal, where the terminal includes the above-mentioned programmable optical chip.
  • the optical chip includes an optical soft core and/or an optical solid core
  • the second programmable basic device in the optical soft core can be used to control the optical signal transmitted in the second transmission path.
  • Path or phase the third programmable basic device in the optical solid core can be used to control the path and phase of the optical signal in the third transmission path, so that the transmission paths of the optical signal in both the optical soft core and the optical solid core can be Controllability
  • the transmission path of the optical signal in the optical soft core can be controlled by the setting of the second programmable basic device
  • the transmission path of the optical signal in the optical solid core can be controlled by the setting of the third programmable basic device
  • the phase of the optical signal can also be set by the second programmable basic device and/or the third programmable basic device, whereby the optical soft core and/or the optical solid core can also be controlled by controlling the phase of the optical signal. Therefore, the optical soft core and the optical solid core in the embodiments of the present invention can meet different functional requirements and performance
  • the second programmable basic devices in the optical soft core according to the embodiment of the present invention are arranged in an array of a second preset shape, and the second preset shape and the second programmable basic device in different types of optical soft cores are arranged in an array.
  • One or more of the type, size, quantity, and overall shape can be different, and can be set in the same Different types of optical soft cores are set on the optical chip to meet the differentiated requirements of different functions for the optical soft core, so that the optical chip can realize more complex functions, and the optical chip after manufacturing can achieve more complex programming effects. .
  • FIG. 1 is a schematic structural diagram of a programmable optical chip in an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a first optical soft core in an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a second optical soft core in an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a third optical soft core in an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a photosolid core in an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of another programmable optical chip according to an embodiment of the present invention.
  • an embodiment of the present invention provides a programmable optical chip, the optical chip includes: one or more first transmission paths for transmitting optical signals in the programmable optical chip; A programmable basic device, the first programmable basic device is arranged in a first preset array; an optical IP core, between the optical IP core and the first programmable basic device, the first programmable basic device Optical coupling between devices and between the optical IP cores via the first transmission path; wherein the optical IP cores include one or more types of optical soft cores, and/or, one or more types of optical soft cores optical solid cores, each optical soft core includes a second programmable base device and one or more second transmission paths for transmitting optical signals within the optical soft core, each optical solid core includes a third programmable a basic device, one or more third transmission paths for transmitting the optical signal within the photofixation core, and a first optical device for processing the optical signal; the first programmable basic device for controlling the path and phase of the optical signal transmitted in the first transmission
  • the optical chip includes an optical soft core and/or an optical solid core
  • the second programmable basic device in the optical soft core can be used to control the path of the optical signal transmitted in the second transmission path or Phase
  • the third programmable basic device in the optical-solid core can be used to control the path and phase of the optical signal in the third transmission path, so that the transmission paths of the optical signal in the optical-soft core and the optical-solid core are controllable
  • the transmission path of the optical signal in the optical soft core can be controlled by setting the second programmable basic device
  • the transmission path of the optical signal in the optical solid core can be controlled by the setting of the third programmable basic device.
  • the phase of the signal can also be set by the second programmable basic device and/or the third programmable basic device, whereby the phase of the optical signal in the optical soft core and/or the optical solid core can also be controlled by controlling the phase of the optical signal. Therefore, the optical soft core and the optical solid core can meet different functional requirements and performance requirements, so that the optical chip can realize a variety of different functions.
  • FIG. 1 shows a schematic structural diagram of a programmable optical chip in an embodiment of the present invention.
  • the optical chip may include: one or more first transmission paths 11 for transmitting optical signals within the optical chip, a first programmable basic device 12 and an optical IP core 13 .
  • the first optical transmission path 11 may be an optical waveguide.
  • the first programmable base device 12 may be used to control the path and/or phase of the optical signal transmitted in the first transmission path 11 .
  • the first programmable basic device 12 can also be used to control the transmission amount of the optical signal in the first transmission path 11 .
  • the first programmable basic device 12 has at least one input interface, the input interface is connected to the first transmission path 11, and the optical signal transmitted in the first transmission path 11 can be input to the first transmission path 11 via the input interface.
  • a programmable base device 12 in a programmable base device 12 .
  • the first programmable basic device 12 has a plurality of output interfaces, and each output interface is connected to the first transmission path 11 .
  • one or more of the paths through which the optical signal is output from the first programmable basic device 12 can be set by controlling the electrical signal applied to the first programmable basic device 12 .
  • the phase of the optical signal can also be controlled by setting the first programmable basic device 12 , that is, by controlling the phase applied to the first programmable basic device 12 .
  • the electrical signal sets the phase of the optical signal input to the first programmable basic device 12, or sets the phase of the optical signal output from the first programmable basic device 12 by controlling the electrical signal applied to the first programmable basic device 12, when When optical signals are simultaneously input to the first programmable basic device 12 from multiple input interfaces or output from multiple output interfaces simultaneously, the interference of the optical signals passing through the first programmable basic device 12 can be controlled by controlling the phases of the optical signals.
  • first programmable basic devices 12 on the optical chip are connected by the first transmission path 11 , and the optical signals from each output interface of the first programmable basic device 12 are transmitted to the first transmission path 11 . , and then transmitted to other first programmable basic devices 12 .
  • the transmission path of the optical signal on the optical chip and the interference of the optical signal can be controlled by setting the first programmable basic device 12 .
  • the first programmable basic device 12 may be an optical switch based on a Mach-Zehnder Interferometer (MZI), or a Micro-Electro-Mechanical System (MEMS), but not Not limited to this.
  • MZI Mach-Zehnder Interferometer
  • MEMS Micro-Electro-Mechanical System
  • the first programmable basic devices 12 on the optical chip are arranged in an array, and the first programmable basic devices 12 are connected via the first transmission path 11 , and the first programmable basic devices 12 on the optical chip are arranged in an array.
  • the programming basic device 12 and the first transmission path 11 can form an optical connection network, and the optical connection network can play the role of optical routing.
  • the plurality of first programmable basic devices 12 may be arrayed in a first predetermined shape.
  • the first programmable basic devices 12 can be arranged in a hexagonal array, also can be arranged in a quadrilateral array, and can also be arranged in a pentagonal array, but it is not limited thereto.
  • FIG. 1 shows that a plurality of first programmable basic devices 12 are arranged in a hexagonal array, that is, the first predetermined shape is a hexagonal shape.
  • the arrays of the first programmable basic devices 12 may have the same shape.
  • the distances between the two first programmable basic devices 12 may be different, that is, the lengths of the first transmission paths 11 may be different. Therefore, the arrays of the first programmable basic devices constitute The size of the first preset shape can be different.
  • first programmable basic devices 12 when arrayed in a first preset shape, a plurality of first transmission paths 11 may also form a mesh structure having the same shape.
  • the first programmable basic devices 12 are arranged in a hexagonal array. At this time, it is convenient to control the optical signal on the optical chip by controlling the first programmable basic device 12.
  • the transmission path that is, when the first programmable base devices 12 are arranged in a hexagonal array, has better flexibility in the control of the transmission path of the optical signal.
  • optical IP core 13 may be optically coupled with the first programmable basic device 12 via the first transmission path 11
  • the optical signal output by the optical IP core 13 can be transmitted to the first transmission path 11 and transmitted to the first programmable base device 12 via the first transmission path 11, so that the first programmable base The device performs spectral control on the optical signal output by the optical IP core 13 .
  • the optical signal output by the first programmable basic device 12 can be transmitted to the optical IP core 13 via the first transmission path 11 , so that the optical IP core 13 performs the optical signal output from the first programmable basic device 12 . deal with.
  • optical IP cores 13 are optically coupled via the first transmission path 11 , that is, the optical signal output by the optical IP core 13 can be transmitted to other optical IP cores 13 via the first transmission path 11 to Make other optical IP cores continue to process the optical signal.
  • optical IP core 13 may be located at the periphery 102 of the plurality of first transmission paths 11 , or may be embedded in the interior 103 of the plurality of first transmission paths 11 .
  • the embodiment of the present invention does not impose any restrictions on the position of the optical IP core 13 on the optical chip. In the actual application of the optical chip, the position of the optical IP core 13 can be adjusted accordingly as required. .
  • the optical IP core 13 may be embedded in the optical connection network and connected to the first transmission path 11 , and the optical IP core 13 may also be located at the periphery of the optical connection network and connected to the first transmission path 11 . That is, the fact that the optical IP core 13 is located at the periphery 102 of the first transmission path 11 means that the optical IP core 13 is located at the periphery of the optical connection network structure formed by the multiple first transmission paths 11 and the multiple first programmable basic devices 12 .
  • optical IP core 13 is embedded inside the first transmission path 11 103 does not mean that the optical IP core 13 is located inside a single first transmission path 11 , but means that the optical IP core 13 is located in the first transmission path 11 In the structure of the optical connection network formed with a plurality of first programmable basic devices 12 .
  • the optical chip may include an optical connection network and an optical IP core 13
  • the optical connection network may include the first transmission path 11 and the first programmable basic device 12 .
  • the optical IP cores 13 are embedded in the interiors 103 of the plurality of first transmission paths 11.
  • the distance between the two first programmable basic devices 12 can be determined according to the size of the optical IP core 13, in other words, the size of the first preset shape formed by the array arrangement of the first programmable basic devices 12 can be adapted to the embedded multiple The size of the optical IP core 13 in the interior 103 of the first transmission path 11.
  • the optical IP core 13 is embedded in the interiors 103 of the multiple first transmission paths 11 , which can shorten the optical signal transmission path and improve the transmission efficiency. , it can also reduce the area of the optical chip and improve the integration of the optical chip. It should also be noted that the most reasonable position can also be selected according to the characteristics of the optical IP core 13 and the function to be implemented.
  • optical IP core 13 may include one or more types of optical soft cores.
  • FIG. 2 shows a schematic structural diagram of an optical soft core in an embodiment of the present invention.
  • the optical soft core may include one or more second transmission paths 21 and a second programmable basic device 22 for transmitting optical signals within the optical soft core.
  • the second transmission path 21 may be an optical waveguide.
  • the second programmable base device 22 may be used to control the path and/or phase of the optical signal transmitted in the second transmission path 21 .
  • the second programmable basic device 22 can also be used to control the transmission amount of the optical signal in the second transmission path 21 .
  • the second programmable basic device 22 has at least one input interface, the input interface is connected to the second transmission path 21, and the optical signal transmitted in the second transmission path 21 can be input through the input interface. in the second programmable base device 22 described above.
  • the second programmable basic device also has a plurality of output interfaces, and each output interface is connected to the second transmission path 21 .
  • one or more output interfaces through which the second programmable basic device 22 is outputted can be set by controlling the electrical signal applied to the second programmable basic device 22 , so as to realize the spectral control.
  • the phase of the optical signal transmitted in the optical soft core can also be controlled by setting the second programmable base device 22, that is, by controlling the phase applied to the second programmable base device 22
  • the electrical signal on the base device 22 can also set the phase of the optical signal input to the second programmable base device 22, or by controlling the electrical signal applied to the second programmable base device 22 can also set the phase from the second programmable base device 22.
  • the phase of the optical signal output by 22, when the optical signal is input from multiple input interfaces of the second programmable basic device 22 or output from multiple output interfaces at the same time, can be controlled by controlling the phase of the optical signal in the optical soft core. Interference of the optical signal of the second programmable base device 22 .
  • the second programmable basic devices 22 in the optical soft core are connected by the second transmission path 21, and the optical signals from each output interface of the second programmable basic device 22 can continue to be transmitted to the second transmission. In the path 21 , it is further transmitted to other second programmable basic devices 22 .
  • the transmission path and/or phase of the optical signal in the optical soft core can be controlled by setting the second programmable basic device 22.
  • the functions and/or performances of the optical soft cores are also different due to different transmission paths or different phases in the core.
  • the transmission path and/or phase in the core to change the function and/or performance of the optical soft core. Therefore, the optical soft core in the embodiment of the present invention has the property of being programmable and reusable.
  • the second programmable basic device 22 may be an optical switch including a Mach-Zehnder interferometer, or may be a micro-electromechanical device, but is not limited thereto.
  • the second programmable basic devices 22 are arrayed in a second preset shape, and the second preset shape may be set during the design process of the optical chip. It should be noted that the second preset shape refers to a shape formed by an array of a plurality of second programmable basic devices 22 , and does not refer to the shape of the second programmable basic device 22 itself.
  • the shape formed by the array arrangement of the plurality of second programmable basic devices 22 may refer to the array arrangement of each preset number of second programmable basic devices 22 in the optical soft core, and the preset number of second programmable basic devices 22 are arranged in an array.
  • the shape of the polygon formed by the programming basic device 22, the preset number is less than or equal to the number of all the second programmable basic devices in the optical soft core. For example, every six second programmable basic devices 22 are arrayed to form a hexagon, or every three second programmable basic devices 22 are arrayed to form a triangle.
  • the second preset shape is a square formed by arranging every four second programmable basic devices 22 in an array, but it is not limited thereto.
  • the first predetermined shape and the second predetermined shape may be different.
  • the functions and/or performances of different types of optical soft cores may be different.
  • the function refers to the application category of the optical soft core.
  • the optical soft core may have the function of a delay line or a function of a filter, but is not limited thereto.
  • the performance refers to the specific performance of the optical soft core when implementing a certain function, for example, the specific delay time for the optical soft core to execute the delay line function.
  • different types of optical soft cores may satisfy one or more of the following: the second preset shape is different, the type of the second programmable basic device 22 is different, the second The size of the programmable basic device is different, the number of the second programmable basic device is different, and the overall shape of the second programmable basic device is different.
  • the types of the optical soft core are different. That is, according to different application requirements for the optical chip, the shape of the array arrangement of the second programmable basic devices 22 in the optical soft core may be different.
  • the second programmable basic devices 22 in the optical soft core can be arranged in a quadrilateral array.
  • the second programmable basic devices 22 in the optical soft core may be arranged in a grid array.
  • FIG. 3 shows a schematic structural diagram of another optical soft core.
  • the optical soft core shown in FIG. 3 can be used for optical computing, and the arrangement of the second programmable basic devices 22 is a grid (Grid) array arrangement.
  • the optical soft core shown in FIG. 3 can effectively realize matrix operation, improve the speed of calculation, and have good generality.
  • the plurality of second transmission paths 21 may be intersected.
  • the types of the second programmable basic devices 22 are different, and the types of the optical soft cores are also different.
  • the type of the second programmable basic device 22 in the optical soft core A is an optical switch based on a Mach-Zehnder interferometer
  • the type of the second programmable basic device 22 in the optical soft core B is an optical switch based on a microelectromechanical device switch, the optical soft core A and the optical soft core B belong to different types of optical soft cores.
  • the type of the optical soft core is also different. More specifically, the length of the second programmable device 22 in the optical soft core is different, and the type of the optical soft core is also different. . It should be noted that the different sizes of the second programmable basic devices 22 do not refer to the case where the same optical soft core includes second programmable basic devices 22 of different sizes, but refer to the second programmable basic device 22 in the optical soft core X. The size of the programming base device 22 is different from the size of the second programmable base device 22 in the optical soft core Y.
  • the type of the optical soft core is also different.
  • the overall shape of the second programmable basic device 22 in the optical soft core is different, the types of the optical soft core are also different. It should be noted that the overall shape of the second programmable basic device 22 refers to the overall shape formed by arranging all the second programmable basic devices 22 in the optical soft core.
  • FIG. 4 shows a schematic structural diagram of a third optical soft core in an embodiment of the present invention.
  • the optical soft core shown in FIG. 4 can also be used for optical computing, and the overall shape of the second programmable basic device 22 in the optical soft core shown in FIG. 4 is a triangle.
  • the difference in the second preset shape formed by the array arrangement of the second programmable basic device 22 for example, the difference in the shape of a quadrilateral and a hexagon
  • the One or more of type difference, size difference, quantity difference, and overall shape difference to indicate the difference in the category of the optical soft core.
  • the difference in the shape of the array arrangement of the second programmable basic device 22 and/or the difference in type, size, quantity, and overall shape of the second programmable basic device 22 can be used to make all the
  • the optical chip can have a variety of different types of optical soft cores. Through different types of optical soft cores, the optical chip can realize more abundant and complex functions. Compared with the use of a single type of optical soft core to achieve complex functions, It can reduce the number of devices on the optical chip, reduce power consumption, and reduce control difficulty.
  • the optical soft core may be located at the periphery of the plurality of first transmission paths, or may be embedded in the interior of the plurality of first transmission paths.
  • the position of the optical soft core on the optical chip reference may be made to the above description about the position of the optical IP core in the optical chip, and details are not repeated here.
  • optical IP core may also include one or more types of photo-solid cores.
  • FIG. 5 shows a schematic structural diagram of a photo-solidification core in an embodiment of the present invention.
  • the light-fixing core includes one or more third transmission paths 41 for transmitting the optical signal in the light-fixing core, a third programmable basic device 42, and a third transmission path for processing the light signal.
  • An optical device 43 It needs to be clear that the first optical device 43 in the light-fixing core determines the function of the light-fixing core, and the third programmable device 42 in the light-fixing core can be used to adjust the performance of the first optical device 43 in the light-fixing core, so that the It can meet the requirements for different performances of the same first optical device. In other words, the function of the light-fixing core is fixed, but the specific performance of the light-fixing core under this function can be changed by programming the third programmable basic device 42 and other operations.
  • the third transmission path 41 may be an optical waveguide.
  • the optical coupling between the first optical device 43 and the third programmable basic device 42 is via the third transmission path 41 .
  • the third programmable basic device 42 is used to control the path and/or phase of the optical signal transmitted in the third transmission path 41 .
  • the third programmable basic device 42 can also be used to control the transmission amount of the optical signal in the third transmission path 41 .
  • the third programmable basic device 43 has at least one input interface, and the input interface is connected to the third transmission path 41 , and the optical signal transmitted in the third transmission path 41 can be input through the input interface.
  • the third programmable base unit 42 also has a plurality of output interfaces, and each output interface is connected to the third transmission path 41 .
  • one or more paths through which the optical signal is output from the third programmable basic device 42 can be set by controlling the electrical signal applied to the third programmable basic device 42 output interface, so as to realize the split light control.
  • the phase of the optical signal transmitted in the light-fixing core can also be controlled by setting the third programmable basic device 42, that is, by controlling The electrical signal on the basic device 42 can also set the phase input to the third programmable basic device 42, or can also set the output from the third programmable basic device 42 by controlling the electrical signal applied to the third programmable basic device 42
  • the phase of the optical signal can be controlled to pass through the third programmable basic device by controlling the phase of the optical signal. 42 interference of the optical signal.
  • the photo-solidification core may further include a first optical device 43 .
  • the first optical device 43 may be an optical component for processing optical signals, and the optical component may be a delay line, a filter, a modulator, a wavelength division multiplexer and other optical components that process the optical signal to achieve part of the optical device function, but not limited thereto. It should be noted that, compared with complete optical devices such as delay lines, filters, modulators, and wavelength division multiplexers that can independently implement specific functions, the first optical device 43 in the embodiment of the present invention needs to be combined with the first optical device 43 in the embodiment of the present invention.
  • the three programmable basic devices 42 and the third transmission path 41 are connected to realize the function of the optical solidification core.
  • the optical signals of the respective output interfaces of the third programmable basic device 42 may continue to be transmitted to the third transmission path 41 , and further transmitted to the first optical device 43 via the third transmission path 41 .
  • the third programmable basic device 42 may be an optical switch including a Mach-Zehnder interferometer, or a micro-electromechanical device, but is not limited thereto.
  • the first optical device 43 in the light-fixing core shown in FIG. 5 is a delay line, and the light-fixing core is used to delay the optical signal for a period of time, that is, the function of the light-fixing core is to delay the optical signal , at this time, the third programmable device 42 can be set by programming or the like to change the transmission path of the optical signal in the first optical device 43 , so as to control the specific time length of delaying the optical signal.
  • the first optical device 43 includes a first path 430 and a second path 431.
  • the optical path of the first path 430 is ⁇ L1
  • the optical path of the second path 431 is ⁇ L2, and ⁇ L1 is not equal to ⁇ L2.
  • the output interface 420 of the third programmable basic device 42 is connected to the first path through the third transmission path 41
  • the output interface 421 is connected to the second path through the third transmission path 41
  • the electrical signal is selected, the output interface of the optical signal output from the third programmable basic device 42 is selected, and the optical path of the optical signal in the first optical device 43 is selected.
  • the light-fixing core is used to select the wavelength of the optical signal, that is, the function of the light-fixing core is a filter
  • the state of the third programmable device 42 can be set by programming and other operations to change the transmission path of the optical signal in the photo-solid core, thereby controlling the free spectral range of the micro-ring filter.
  • the light-fixing core in the embodiment of the present invention includes the third transmission path 41 , the third programmable basic device 42 and the first optical device 43 , the functions of which are determined by the first optical device 43 , that is, the The function is fixed and cannot be changed by programming operations on the third programmable base device 42 .
  • the specific performance under the specific function of the light-fixing core is programmable, and the transmission path and/or phase of the optical signal in the light-fixing core can be controlled by setting the third programmable basic device 42, and the optical signal is in the light-fixing core.
  • the performance of the light-fixing core is different, that is, in the embodiment of the present invention, the setting of the third programmable basic device 42 is used to change the transmission path of the optical signal in the light-fixing core and/or or phase to change the properties of the photofixed nuclei.
  • the photo-solidification core may be located on the periphery of the first transmission path, or may be embedded in the interior of the plurality of first transmission paths.
  • the position of the optical solid core on the optical chip reference may be made to the above description about the position of the optical IP core in the optical chip, which will not be repeated here.
  • FIG. 6 shows a schematic structural diagram of another programmable optical chip in an embodiment of the present invention.
  • the optical chip shown in FIG. 6 may include one or more first transmission paths 31 for transmitting optical signals, a first programmable basic device 32 , an optical soft core 33 , and an optical solid core 35 .
  • first transmission paths 31 for transmitting optical signals
  • first programmable basic device 32 for transmitting optical signals
  • optical soft core 33 for transmitting optical signals
  • optical solid core 35 for transmitting optical signals
  • the optical IP core on the optical chip may further include one or more types of optical hard cores 34, and the optical hard core 34 is a second optical device for processing the optical signal.
  • the optical hard core may include one or more of the following: power amplifiers, lasers, detectors, modulators, light intensity monitors, attenuators, wavelength division multiplexers, but not limited thereto. It should be clear that, different from the first optical device, the second optical device is a complete optical device that can independently implement a specific function.
  • the optical hard core 34 may further include: a high-performance filter, a high-performance delay line, and the like.
  • the optical hard core 34 does not include programmable basic devices, and the function and performance of the optical hard core 34 cannot be changed through programming and other operations, that is, the optical hard core is opposite to the concept of programmable, It has the characteristics that its function and performance cannot be changed by programming and other operations after molding.
  • the transmission path and/or phase of the optical signal in the optical hard core 34 cannot be changed by setting the programmable basic device, and thus cannot be changed by setting the programmable basic device.
  • the function or performance of the optical hard core 34 is not include programmable basic devices, and the function and performance of the optical hard core 34 cannot be changed through programming and other operations, that is, the optical hard core is opposite to the concept of programmable, It has the characteristics that its function and performance cannot be changed by programming and other operations after molding.
  • the optical hard core 34 has good versatility, and can be used to realize part of the universal functions and/or standard performance in the optical chip, without the need to program the optical soft core 33 to achieve the universal functions and/or Or standard performance, which can reduce the area of the optical chip and improve the integration of the optical chip.
  • the optical hard core 34 may be located at the periphery of the plurality of first transmission paths 31 , or may be embedded in the interior of the plurality of first transmission paths 31 .
  • the optical hard core 34 on the optical chip reference may be made to the above description about the position of the optical IP core in the optical chip, and details are not repeated here.
  • the optical chip may further include an optical interface 36, which may be used for inputting or outputting optical signals, and the optical interface 36 may be an interface based on grating coupling or an interface based on edge coupling.
  • the optical interface may be located around the optical connection network.
  • the optical interface 36 can also be connected to the optical IP core via the first transmission path 31 , so that the optical signal input from the outside is transmitted to the optical IP core, or the optical interface 36 can also be connected via the first transmission path 31 It is connected to the first programmable basic device 32, so that the externally input optical signal can be transmitted to the first programmable basic device 32 first, and then to the optical IP core.
  • the optical signal output from the optical IP core can also be transmitted to the optical interface 36 via the first transmission path 31 and/or the first programmable basic device 32 for further transmission to the outside of the optical chip.
  • the optical chip may further include an electrical interface 37, and the electrical interface 37 is used for inputting or outputting electrical signals, and the electrical signals may be used to control the first programmable basic device 32, the second programmable The electrical control signal of the programmable basic device and the third programmable basic device.
  • the electrical signal can also be an electrical control signal used to control the optical hard core 34 (for example: a modulator, a power amplifier), and the electrical control signal can turn on or off the optical hard core 34 or control the working parameters of the optical hard core 34 Make settings, for example, select the magnification of the power amplifier, etc., but not limited to this.
  • the electrical signal can also be an electrical control signal for controlling the first optical device in the photo-solidification core 35, and the electrical control signal can set the working parameters of the first optical device.
  • the setting of the working parameters can only be based on one or more parameter options provided by the existing device, and the programmable basic device is not used.
  • the electrical signal may also be an electrical signal generated by the optical hard core 34 and used to carry optical signal information, for example, the electrical signal may be light intensity information measured by a photodetector.
  • the electrical interface 37 may be a DC signal interface or an AC signal interface, for example, a radio frequency signal interface.
  • the electrical signal can also be used to control the first programmable basic device 32 to perform optical switching on the optical signal in the first transmission path 31 , that is, by changing the voltage applied to the first programmable basic device 31 .
  • the electrical signal can also be used to control the second programmable basic device to perform optical switching on the optical signal in the second transmission path, that is, by changing the electrical signal applied to the second programmable basic device, the The transmission path and/or phase of the optical signal in the optical soft core 33 , so as to realize the programming operation on the second programmable basic device in the optical soft core 33 to change the function and/or performance of the optical soft core 33 .
  • the electrical signal can also be used to control the third programmable basic device to perform optical switching on the optical signal in the third transmission path, that is, by changing the electrical signal applied to the third programmable basic device, the optical signal is changed.
  • the transmission path and/or phase within the light-fixing core 35 thereby enabling a programming operation on the third programmable base device in the light-fixing core 35 to change the performance of the light-fixing core 35 .
  • the optical chip may further include an electrical connection wire 38, which is used to transmit the above-mentioned electrical signals, one end of the electrical connection wire 38 is connected to the electrical interface 37, and the other end of the electrical connection wire 38 may be It is connected to any one of the optical soft core 33 , the optical solid core 35 , the optical hard core 34 and the first programmable basic device 32 .
  • an embodiment of the present invention provides an optical chip
  • the optical chip may include an optical IP core
  • the optical IP core may be an optical soft core, an optical solid core, or an optical hard core.
  • the function and performance of the optical soft core can be realized by programming the second programmable basic device, which is the most flexible and can be used to realize the function of the device with lower frequency
  • the function and performance of the optical hard core are both Fixed, versatile, high frequency of use, easy to operate, and high reliability
  • the function of the optical solid core is fixed, but different performance and flexibility can be achieved by programming the third programmable basic device. It is between the optical hard core and the optical soft core.
  • the optical chip may be applied to the fields of optical communication, photonic artificial intelligence, microwave photonics, optical quantum computing, optical sensing, etc., which is not limited in the embodiment of the present invention.
  • the embodiments of the present invention define the architecture of the programmable optical chip in detail and completely, laying a foundation for the development of the programmable optical chip in the direction of large-scale and multi-function.
  • the programmable optical chip provided by the embodiment of the present invention has higher device efficiency, can realize richer and more complex functions, and also solves the problem that different functional devices have different design requirements for the optical chip.
  • An embodiment of the present invention further provides a terminal, where the terminal may include the above-mentioned programmable optical chip.
  • the terminal may be a terminal and may refer to various forms of terminals, access terminals, subscriber units, subscriber stations, subscriber terminals, terminal equipment, vehicle-mounted equipment, Internet of Things equipment, and the like.
  • the terminal may be applied to fields such as optical communication, photonic artificial intelligence, microwave photonics, optical quantum computing, and optical sensing, which is not limited in the embodiment of the present invention.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optical Integrated Circuits (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Optical Communication System (AREA)

Abstract

一种可编程的光芯片和终端,所述光芯片包括:用于在所述可编程的光芯片内传输光信号的一条或多条第一传输路径;第一可编程基础器件,所述第一可编程基础器件呈阵列排列;光IP核,所述光IP核以及所述第一可编程基础器件之间、所述光IP核之间经由所述第一传输路径光耦合;所述光IP核包括光软核,和/或,光固核,其中,每种光软核包括第二可编程基础器件以及用于在所述光软核内传输光信号的一条或多条第二传输路径,每种光固核包括第三可编程基础器件、用于在所述光固核内传输所述光信号的一条或多条第三传输路径和用于对所述光信号进行处理的第一光学器件。本发明的方案中通过对光芯片进行编程等操作即可使光芯片实现多种不同的功能。

Description

可编程的光芯片、终端 技术领域
本发明实施例涉及集成光子芯片领域,尤其涉及一种可编程的光芯片和终端。
背景技术
光子集成产业目前处于大规模集成的起步阶段,随着光芯片在光通信、光量子计算、微波光子等领域的广泛应用,光芯片需要实现的功能愈加复杂,同集成电路产业发展历程类似,光子集成领域迫切需要一种与电现场可编程逻辑门阵列(Field Programmable Gate Array,FPGA)一样可以推动光子集成产业快速发展的可编程的光芯片。
可编程的光芯片在光通信、光子人工智能、微波光子、光量子计算、光传感等领域都有着大量的潜在应用。但目前业界主流的光芯片均是根据用户的特定需求开发定制的,也即,针对某一应用需求的光芯片,需要经过设计研发和生产过程才能投入使用,需要经过较长的设计研发和制作周期,生产效率较低,生产成本也比较高。因此,亟需一种可编程的光芯片,通过对光芯片进行编程操作即可使光芯片实现多种不同的功能,从而降低光芯片的生产成本。
发明内容
本发明实施例解决的技术问题是提供一种可编程的光芯片,通过对光芯片进行编程等操作可以使光芯片实现多种不同的功能。
为解决上述技术问题,本发明实施例提供一种可编程的光芯片,所述光芯片包括:用于在所述可编程的光芯片内传输光信号的一条或多条第一传输路径;第一可编程基础器件,所述第一可编程基础器件呈第一预设形状阵列排列;光IP核,所述光IP核和所述第一可编程基础器件之间、所述第一可编程基础器件之间、所述光IP核之间经由所述第一传输路径光耦合;其中,所述光IP核包括一种或多种类别的光软核,和/或,一种或多种类别的光固核,每种光软核包括第二可编程基础器件以及用于在所述光软核内传输光信号的一条或多条第二传输路径,每种光固核包括第三可编程基础器件、用于在所述光固核内传输所述光信号的一条或多条第三传输路径和用于对所述光信号进行处理的第一光学器件;所述第一可编程基础器件用于控制在所述第一传输路径中传输的光信号的路径和相位,所述第二可编程基础器件用于控制在所述第二传输路径传输的光信号的路径和相位,所述第三可编程基础器件用于控制在所述第三传输路径中传输的光信号的路径和相位。
可选的,所述第二可编程基础器件呈第二预设形状阵列排列,不同类别的光软核满足以下一项或多项:所述第二预设形状不同、所述第二可编程基础器件的类型不同、所述第 二可编程基础器件的尺寸不同、所述第二可编程基础器件的数量不同、所述第二可编程基础器件的整体形状不同。
可选的,所述光IP核还包括:一种或多种类别的光硬核,所述光硬核为用于对所述光信号进行处理的第二光学器件。
可选的,所述光硬核包括以下一项或多项:功率放大器、激光器、探测器、调制器、光强度监测器、衰减器、滤波器、延时线、波分复用器。
可选的,所述光固核包括以下一项或多项:可编程延时线、可编程滤波器、可编程调制器、可编程波分复用器。
可选的,所述光芯片满足以下一项或多项:所述第一可编程基础器件可以是基于马赫曾德尔干涉仪的光开关或微机电器件;所述第二可编程基础器件可以是基于马赫曾德尔干涉仪的光开关或微机电器件;所述第三可编程基础器件可以是基于马赫曾德尔干涉仪的光开关或微机电器件。
可选的,所述光IP核位于多条第一传输路径的外围或内嵌于多条第一传输路径的内部。
可选的,所述光芯片还包括光学接口,所述光学接口用于输入或输出光信号,所述光学接口包括基于光栅耦合的接口和基于边缘耦合的接口。
可选的,所述光芯片还包括:电学接口,所述电学接口用于输入或输出电信号。
可选的,所述第一可编程基础器件呈六边形阵列排列。
可选的,所述光芯片用于光计算时,每个光软核中的多个第二可编程基础器件呈网格阵列排列或三角形阵列排列。
可选的,所述第一传输路径、所述第二传输路径、所述第三传输路径为光波导。
本发明实施例实施例还提供一种终端,所述终端包含上述的可编程的光芯片。
与现有技术相比,本发明实施例实施例的技术方案具有以下有益效果:
在本发明实施例实施例的方案中,光芯片包括光软核和/或光固核,光软核中的第二可编程基础器件可以用于控制在第二传输路径中传输的光信号的路径或相位,光固核中的第三可编程基础器件可以用于控制第三传输路径中光信号的路径和相位,由此光信号在光软核和光固核内的传输路径均具有均可控性,可以通过对第二可编程基础器件的设置来控制光信号在光软核内的传输路径,通过对第三可编程基础器件的设置来控制光信号在光固核内的传输路径,此外,光信号的相位也可以通过第二可编程基础器件和/或第三可编程基础器件进行设置,由此还可以通过控制光信号的相位来控制光软核和/或光固核中的光信号的干涉,因此,本发明实施例实施例中的光软核和光固核可以满足不同的功能需求和性能需 求,从而使得光芯片能够实现多种不同的功能,并且使得制造完成后的光芯片获得可编程的效果。
进一步,本发明实施例实施例的光软核中第二可编程基础器件呈第二预设形状阵列排列,不同类别的光软核中所述第二预设形状、第二可编程基础器件的类型、尺寸、数量、整体形状中的一项或多项可以是不同的,可以通过设置光软核中第二可编程基础器件的类型、尺寸、数量、阵列排列的形状、整体形状,在同一光芯片上设置不同类别的光软核,以满足不同功能对光软核的差异化需求,以使得光芯片能够实现更加丰富复杂的功能,以及使得制造完成后的光芯片实现更加复杂的编程效果。
附图说明
图1是本发明实施例中一种可编程的光芯片的结构示意图。
图2是本发明实施例中第一种光软核的结构示意图。
图3是本发明实施例中第二种光软核的结构示意图。
图4是本发明实施例中第三种光软核的结构示意图。
图5是本发明实施例中一种光固核的结构示意图。
图6是本发明实施例中另一种可编程的光芯片的结构示意图。
具体实施方式
如背景技术所述,目前业界主流的光芯片均是根据用户的特定需求开发定制的,完成后不可改变其功能,导致灵活性低、生产成本高。亟需一种可编程的光芯片,通过对该光芯片进行编程使光芯片实现多种不同的功能,以降低光芯片的生产成本。
为了解决上述技术问题,本发明实施例提供一种可编程的光芯片,所述光芯片包括:用于在所述可编程的光芯片内传输光信号的一条或多条第一传输路径;第一可编程基础器件,所述第一可编程基础器件呈第一预设阵列排列;光IP核,所述光IP核和所述第一可编程基础器件之间、所述第一可编程基础器件之间、所述光IP核之间经由所述第一传输路径光耦合;其中,所述光IP核包括一种或多种类别的光软核,和/或,一种或多种类别的光固核,每种光软核包括第二可编程基础器件以及用于在所述光软核内传输光信号的一条或多条第二传输路径,每种光固核包括第三可编程基础器件、用于在所述光固核内传输所述光信号的一条或多条第三传输路径和用于对所述光信号进行处理的第一光学器件;所述第一可编程基础器件用于控制在所述第一传输路径中传输的光信号的路径和相位,所述第二可编程基础器件用于控制在所述第二传输路径中传输的光信号的路径和相位,所述第三可编程基础器件用于控制在所述第三传输路径中传输的光信号的路径和相位。
在本发明实施例的方案中,光芯片包括光软核和/或光固核,光软核中的第二可编程基 础器件可以用于控制在第二传输路径中传输的光信号的路径或相位,光固核中的第三可编程基础器件可以用于控制第三传输路径中光信号的路径和相位,由此光信号在光软核和光固核内的传输路径均具有可控性,可以通过对第二可编程基础器件的设置来控制光信号在光软核内的传输路径,通过对第三可编程基础器件的设置来控制光信号在光固核内的传输路径,此外,光信号的相位也可以通过第二可编程基础器件和/或第三可编程基础器件进行设置,由此还可以通过控制光信号的相位来控制光软核和/或光固核中的光信号的干涉,因此,光软核和光固核可以满足不同的功能需求和性能需求,从而使得光芯片能够实现多种不同的功能。
为使本发明的上述目的、特征和有益效果能够更为明显易懂,下面结合附图对本发明的具体实施例做详细的说明。
参考图1,图1示出了本发明实施例中一种可编程的光芯片的结构示意图。
所述光芯片可以包括:用于在所述光芯片内传输光信号的一条或多条第一传输路径11、第一可编程基础器件12和光IP核13。其中,第一光传输路径11可以是光波导。
进一步地,所述第一可编程基础器件12可以用于控制在第一传输路径11中传输的光信号的路径和/或相位。
进一步地,第一可编程基础器件12还可以用于控制第一传输路径11中光信号的传输量。
具体而言,所述第一可编程基础器件12具有至少一个输入接口,所述输入接口与第一传输路径11连接,在第一传输路径11中传输的光信号可以经由输入接口输入所述第一可编程基础器件12中。所述第一可编程基础器件12具有多个输出接口,每个输出接口与第一传输路径11连接。对于输入至第一可编程基础器件12中的光信号,可以通过控制施加在第一可编程基础器件12上的电信号来设置光信号从第一可编程基础器件12输出时经过的一个或多个输出接口,从而实现分光控制。
在本发明的一个非限制性实施例中,还可以通过对所述第一可编程基础器件12的设置来控制光信号的相位,也即,通过控制施加在第一可编程基础器件12上的电信号设置输入第一可编程基础器件12的光信号的相位,或通过控制施加在第一可编程基础器件12上的电信号设置从第一可编程基础器件12输出的光信号的相位,当光信号同时从多个输入接口输入第一可编程基础器件12或同时从多个输出接口输出时,可以通过控制光信号的相位来控制经过第一可编程基础器件12的光信号的干涉。
进一步地,所述光芯片上的两两第一可编程基础器件12之间由第一传输路径11连接,从第一可编程基础器件12的各个输出接口的光信号传输至第一传输路径11中,进而传输 至其他第一可编程基础器件12。
由此,本发明实施例中,可以通过对第一可编程基础器件12的设置来控制光信号在光芯片上的传输路径以及光信号的干涉。其中,所述第一可编程基础器件12可以是基于马赫曾德尔干涉仪(Mach–Zehnder Interferometer,MZI)的光开关,也可以是微机电器件(Micro-Electro-Mechanical System,MEMS),但并不限于此。
进一步地,本发明实施例中光芯片上的第一可编程基础器件12呈阵列排列,且两两第一可编程基础器件12之间经由第一传输路径11连接,光芯片上的第一可编程基础器件12和第一传输路径11可以形成光连接网络,光连接网络可以起到光路由的作用。
进一步地,多个第一可编程基础器件12可以呈第一预设形状阵列排列。例如,第一可编程基础器件12可以呈六边形阵列排列,也可以呈四边形阵列排列,还可以呈五边形阵列排列,但并不限于此。图1示出了多个第一可编程基础器件12呈六边形阵列排列,也即,所述第一预设形状为六边形。在同一光芯片上,第一可编程基础器件12阵列排列构成的形状可以是相同的。
进一步地,两两第一可编程基础器件12之间的距离可以是不同的,也即,所述第一传输路径11的长度可以是不同的,由此,第一可编程基础器件阵列排列构成的第一预设形状的大小可以是不同的。
需要说明的是,当所述第一可编程基础器件12呈第一预设形状阵列排列时,多个第一传输路径11也可以构成具有相同形状的网状结构。
在本发明的一个非限制性实施例中,第一可编程基础器件12呈六边形阵列排列,此时,可以便利地通过控制第一可编程基础器件12来控制光信号在光芯片上的传输路径,也即,当第一可编程基础器件12呈六边形阵列排列时,在进行光信号的传输路径的控制时具有更好的灵活性。
进一步地,所述光IP核13可以经由第一传输路径11与所述第一可编程基础器件12光耦合
具体而言,所述光IP核13的输出的光信号可以传输至第一传输路径11,并经由第一传输路径11传输至第一可编程基础器件12中,以便所述第一可编程基础器件对光IP核13输出的光信号进行分光控制。
进一步地,第一可编程基础器件12输出的光信号可以经由第一传输路径11传输至光IP核13中,以使所述光IP核13对第一可编程基础器件12输出的光信号进行处理。
进一步地,所述光IP核13之间经由所述第一传输路径11光耦合,也即,光IP核13输出的光信号可以经由第一传输路径11传输至其他光IP核13中,以使其他的光IP核继续 对光信号进行处理。
进一步地,所述光IP核13可以位于多条第一传输路径11的外围102,也可以内嵌于多条第一传输路径11的内部103。
需要明确的是,本发明实施例对所述光IP核13在光芯片上的位置并不做任何限制,在所述光芯片的实际应用中,光IP核13的位置可以根据需要进行相应调整。
换言之,所述光IP核13可以内嵌于光连接网络中,并与第一传输路径11连接,光IP核13还可以位于光连接网络的外围,并与第一传输路径11连接。也即,光IP核13位于第一传输路径11的外围102是指,光IP核13位于多条第一传输路径11和多个第一可编程基础器件12构成的光连接网络的结构的外围。光IP核13内嵌于位于第一传输路径11的内部103并非是指光IP核13位于单个第一传输路径11的内部,而是指所述光IP核13位于所述第一传输路径11和多个第一可编程基础器件12构成的光连接网络的结构之中。
因此,所述光芯片可以包括光连接网络以及光IP核13,所述光连接网络可以包括所述第一传输路径11和第一可编程基础器件12。
在本发明的一个非限制性实施例中,光IP核13内嵌于多条第一传输路径11的内部103,此时,所述两两第一可编程基础器件12之间的距离(也即,第一传输路径11的长度)可以根据光IP核13的尺寸大小确定,换言之,第一可编程基础器件12阵列排列构成的第一预设形状的大小可以适应于所述内嵌于多条第一传输路径11的内部103的光IP核13的大小。
需要说明的是,相比于光IP核13位于第一传输路径11的外围102,光IP核13内嵌于多条第一传输路径11的内部103可以缩短光信号传输的路径,提高传输效率,还可以缩小光芯片的面积,提高光芯片的集成度。还需要说明的是,还可以根据光IP核13自身的特点和所要实现的功能选择最合理的位置。
进一步地,所述光IP核13可以包括一种或多种类别的光软核。
参考图2,图2示出了本发明实施例中一种光软核的结构示意图。
所述光软核可以包括用于在所述光软核内传输光信号的一条或多条第二传输路径21以及第二可编程基础器件22。其中,所述第二传输路径21可以是光波导。
具体而言,所述第二可编程基础器件22可以用于控制在第二传输路径21中传输的光信号的路径和/或相位。
进一步地,第二可编程基础器件22还可以用于控制第二传输路径21中光信号的传输量。
具体而言,所述第二可编程基础器件22具有至少一个输入接口,所述输入接口与所述 第二传输路径21连接,在第二传输路径21中传输的光信号可以经由输入接口输入所述第二可编程基础器件22中。所述第二可编程基础器件还具有多个输出接口,每个输出接口与第二传输路径21连接。对于输入至第二可编程基础器件22中的光信号,可以通过控制施加在第二可编程基础器件22上的电信号设置从第二可编程基础器件22输出时经过的一个或多个输出接口,从而实现分光控制。
在本发明的一个非限制性实施例中,还可以通过对第二可编程基础器件22的设置来控制在光软核中传输的光信号的相位,也即,通过控制施加在第二可编程基础器件22上的电信号还可以设置输入第二可编程基础器件22的光信号的相位,或通过控制施加在第二可编程基础器件22上的电信号还可以设置从第二可编程基础器件22输出的光信号的相位,当光信号同时从第二可编程基础器件22的多个输入接口输入或同时从多个输出接口输出时,可以通过控制光软核中光信号的相位来控制经过第二可编程基础器件22的光信号的干涉。
进一步地,所述光软核中两两第二可编程基础器件22之间由第二传输路径21连接,从第二可编程基础器件22的各个输出接口的光信号可以继续传输至第二传输路径21中,进而传输至其他第二可编程基础器件22中。
由此,本发明实施例中,对于同一个光软核,可以通过对第二可编程基础器件22的设置来控制光信号在光软核中的传输路径和/或相位,光信号在光软核中的传输路径不同或相位不同,所述光软核的功能和/或性能也不同,也即,本发明实施例中通过对第二可编程基础器件22的设置来改变光信号在光软核中的传输路径和/或相位,以改变光软核的功能和/或性能。因此,本发明实施例中的光软核具有可编程可复用的性质。其中,所述第二可编程基础器件22可以是包括马赫曾德尔干涉仪的光开关,也可以是微机电器件,但并不限于此。
进一步地,所述第二可编程基础器件22呈第二预设形状阵列排列,所述第二预设形状可以是在所述光芯片的设计过程中设置的。需要说明的是,所述第二预设形状是指多个第二可编程基础器件22阵列排列形成的形状,并不是指第二可编程基础器件22自身的形状。
还需要说明的是,多个第二可编程基础器件22阵列排列形成的形状可以是指光软核中每预设数量个第二可编程基础器件22阵列排列,该预设数量个第二可编程基础器件22形成的多边形的形状,预设数量小于或等于光软核中所有第二可编程基础器件的数量。例如,每六个第二可编程基础器件22阵列排列形成的六边形,或者,每三个第二可编程基础器件22阵列排列形成的三角形。以图2为例,图2所示的光软核中,第二预设形状为每四个第二可编程基础器件22阵列排列形成的正方形,但并不限于此。
在本发明的一个非限制性实施例中,所述第一预设形状和第二预设形状可以是不同的。
进一步地,当所述光芯片包括多个类别的光软核时,不同类别的光软核的功能和/或性能可以是不同的。需要说明的是,所述功能是指光软核的用途类别,例如,所述光软核可以具有延时线的功能,也可以具有滤波器的功能,但并不限于此。所述性能是指光软核在实现某一功能时的具体表现,例如,光软核执行延时线功能是具体的延时的时间。
进一步地,本发明实施例中,不同类别的光软核可以满足以下一项或多项:所述第二预设形状不同、所述第二可编程基础器件22的类型不同、所述第二可编程基础器件的尺寸不同、所述第二可编程基础器件的数量不同、所述第二可编程基础器件的整体形状不同。
具体而言,光软核中的第二可编程基础器件22阵列排列形成的第二预设形状不同时,光软核的类别不同。也即,针对所述光芯片所面向的不同的应用需求,所述光软核中第二可编程基础器件22阵列排列的形状可以是不同的。例如,针对微环结构应用的光芯片,所述光软核中的第二可编程基础器件22可以呈四边形阵列排列。针对光计算的光芯片,所述光软核中的第二可编程基础器件22可以呈网格阵列排列。
参考图3,图3示出了另一种光软核的结构示意图。图3示出的光软核可以用于光计算,第二可编程基础器件22的排列方式即为网格(Grid)阵列排列。在进行光计算时,图3示出的光软核可以有效地实现矩阵运算,提高了计算的速度,且具有较好的通用性。需要说明的是,多条第二传输路径21之间可以是交叉的。
继续参考图2,第二可编程基础器件22的类型不同,所述光软核的类别也不同。例如,光软核A中的第二可编程基础器件22的类型为基于马赫曾德尔干涉仪的光开关,光软核B中的第二可编程基础器件22的类型为基于微机电器件的光开关,则光软核A和光软核B属于不同类别的光软核。
进一步地,第二可编程基础器件22的尺寸不同时,所述光软核的类别也不同,更具体地,光软核中第二可编程器件22的长度不同,光软核的类别也不同。需要说明的是,第二可编程基础器件22的尺寸不同并非是指同一个光软核中包含尺寸不同的第二可编程基础器件22的情况,而是指光软核X中的第二可编程基础器件22的尺寸和光软核Y中的第二可编程基础器件22的尺寸不同。
进一步地,光软核中包含的第二可编程基础器件22的数量不同时,所述光软核的类别也不同。
进一步地,光软核中第二可编程基础器件22的整体形状不同时,光软核的类别也不同。需要说明的是,第二可编程基础器件22的整体形状是指光软核中所有第二可编程基础器件22排列后形成的整体的形状。
参考图4,图4示出了本发明实施例中第三种光软核的结构示意图。图4示出的光软 核也可以用于光计算,图4所示的光软核中第二可编程基础器件22的整体形状为三角形。
由此,本发明实施例中直观地采用第二可编程基础器件22阵列排列构成的第二预设形状的差异(例如,四边形、六边形的形状差异)、第二可编程基础器件22的类型差异、尺寸差异、数量差异、整体形状差异中的一项或多项来指示所述光软核的类别的差异。
由上,随着光芯片所要实现的功能愈加复杂,同一类别的光软核很难满足不同功能的需求,即使可以采用同一类别的光软核实现多种不同的功能,通常需要增加光芯片上光软核的数量来满足复杂的功能需求,由于会导致光芯片上器件数量的增加,会大大增加光芯片的功耗,在实际使用时控制难度也较大。因此,本发明实施例中,可以通过第二可编程基础器件22的阵列排列的形状差异,和/或第二可编程基础器件22的类型差异、尺寸差异、数量差异、整体形状差异,使得所述光芯片可以具有多种不同类别的光软核,通过不同类别的光软核可以使光芯片可以实现更加丰富、复杂的功能,相比于采用单一类别的光软核来实现复杂功能时,可以降低光芯片上的器件数量,减少功耗,降低控制难度。
进一步地,所述光软核可以位于多条第一传输路径的外围,也可以内嵌于多条第一传输路径的内部。关于光软核在光芯片上的位置的具体内容可以参照上文关于光IP核在光芯片中位置的相关描述,在此不再赘述。
进一步地,所述光IP核还可以包括一种或多种类别的光固核。
参考图5,图5示出了本发明实施例中一种光固核的结构示意图。
所述光固核包括用于在所述光固核内传输所述光信号的一条或多条第三传输路径41、第三可编程基础器件42和用于对所述光信号进行处理的第一光学器件43。需要明确的是,光固核中的第一光学器件43决定光固核的功能,光固核中的第三可编程器件42可以用于调整光固核中第一光学器件43的性能,使其能够满足对同一第一光学器件不同性能的需求。换言之,所述光固核的功能是固定的,但所述光固核在该功能下的具体性能是可以通过对第三可编程基础器件42进行编程等操作改变的。
具体而言,所述第三传输路径41可以是光波导。第一光学器件43和第三可编程基础器件42之间经由第三传输路径41光耦合。
进一步地,所述第三可编程基础器件42用于控制在所述第三传输路径41中传输的光信号的路径和/或相位。
进一步地,第三可编程基础器件42还可以用于控制第三传输路径41中光信号的传输量。
具体而言,所述第三可编程基础器件43具有至少一个输入接口,所述输入接口与所述第三传输路径41连接,在第三传输路径41中传输的光信号可以经由输入接口输入所述第 三可编程基础器件42中。所述第三可编程基础器42件还具有多个输出接口,每个输出接口与第三传输路径41连接。对于输入至第三可编程基础器件42中的光信号,可以通过控制施加在第三可编程基础器件42上的电信号设置光信号从第三可编程基础器件42输出时经过的一个或多个输出接口,从而实现分光控制。
在本发明的一个非限制性实施例中,还可以通过对第三可编程基础器件42的设置来控制在光固核中传输的光信号的相位,也即,通过控制施加在第三可编程基础器件42上的电信号还可以设置输入第三可编程基础器件42的的相位,或通过控制施加在第三可编程基础器件42上的电信号还可以设置从第三可编程基础器件42输出的光信号的相位,当光信号同时从第三可编程基础器件42的多个输入接口输入或同时从多个输出接口输出时,可以通过控制光信号的相位来控制经过第三可编程基础器件42的光信号的干涉。
进一步地,所述光固核中还可以包括第一光学器件43。所述第一光学器件43可以是对光信号进行处理的光学组件,所述光学组件可以是延时线、滤波器、调制器、波分复用器等光学器件中对光信号进行处理以实现该光学器件功能的部分,但并不限于此。需要说明的是,区比于延时线、滤波器、调制器、波分复用器等这些可以独立实现特定功能的完整的光学器件,本发明实施例中的第一光学器件43需要与第三可编程基础器件42、第三传输路径41连接后实现该光固核的功能。
进一步地,所述第三可编程基础器件42的各个输出接口的光信号可以继续传输至第三传输路径41,并经由第三传输路径41继续传输至第一光学器件43中。第三可编程基础器件42可以是包括马赫曾德尔干涉仪的光开关,也可以是微机电器件,但并不限于此。
例如,图5所示的光固核中的第一光学器件43为延时线,所述光固核用于将光信号延迟一段时间,也即,所述光固核的功能为延迟光信号,此时,可以通过编程等操作第三可编程器件42对进行设置,以改变光信号在第一光学器件43中的传输路径,从而控制延迟光信号的具体时间长度。
具体而言,所述第一光学器件43包括第一路径430和第二路径431,所述第一路径430的光程为ΔL1,第二路径431的光程为ΔL2,且ΔL1不等于ΔL2。第三可编程基础器件42的输出接口420经过第三传输路径41连接至第一路径,输出接口421经过第三传输路径41连接至第二路径,通过控制施加在第三可编程基础器件42上的电信号,选择光信号从第三可编程基础器件42输出的输出接口,从而选择光信号在第一光学器件43中的光程。通过第一光学器件43以及对多个第三可编程基础器件43的设置,可以实现光信号的多种可能的延时情况。
又例如,所述光固核中的第一光学器件43为微环滤波器,则所述光固核用于对光信号 进行波长选择,也即,所述光固核的功能为滤波器,此时,可以通过编程等操作设置第三可编程器件42的状态,以改变光信号在光固核中的传输路径,从而控制微环滤波器的自由光谱范围。
由此,本发明实施例中的光固核包括第三传输路径41、第三可编程基础器件42以及第一光学器件43,其功能由第一光学器件43决定,也即,光固核的功能是固定的,不可通过对第三可编程基础器件42的编程操作改变。光固核特定功能下的具体性能是可编程的,可以通过对第三可编程基础器件42的设置来控制光信号在光固核中的传输路径和/或相位,光信号在光固核中的传输路径不同或者相位不同,所述光固核的性能不同,也即,本发明实施例中通过对第三可编程基础器件42的设置来改变光信号在光固核中的传输路径和/或相位,以改变光固核的性能。
进一步地,所述光固核可以位于第一传输路径的外围,也可以内嵌于多个第一传输路径的内部。关于光固核在光芯片上的位置的具体内容可以参照上文关于光IP核在光芯片中位置的相关描述,在此不再赘述。
参考图6,图6示出了本发明实施例中另一种可编程的光芯片的结构示意图。
图6示出的光芯片可以包括用于传输光信号的一条或多条第一传输路径31、第一可编程基础器件32、光软核33、光固核35。关于用于传输光信号的一条或多条第一传输路径31、第一可编程基础器件32、光软核33、光固核35的具体内容可以参照上文描述,在此不再赘述。
进一步地,光芯片上的光IP核还可以包括一种或多种类别的光硬核34,所述光硬核34为用于对所述光信号进行处理的第二光学器件。例如,所述光硬核可以包括以下一项或多项:功率放大器、激光器、探测器、调制器、光强度监测器、衰减器、波分复用器,但并不限于此。需要明确的是,区别于第一光学器件,第二光学器件是可以独立实现特定功能的完整的光学器件。
在本发明的一个非限制性实施例中,所述光硬核34还可以包括:高性能滤波器、高性能延时线等。
需要明确的是,所述光硬核34不包括可编程基础器件,所述光硬核34的功能和性能不能通过编程等操作改变,也即,所述光硬核与可编程的概念相对,具有成型后不可再通过编程等操作改变其功能及性能的特点。换言之,本发明实施例的方案中,无法通过对可编程基础器件的设置来改变光信号在光硬核34中的传输路径和/或相位,也就无法通过对可编程基础器件的设置来改变光硬核34的功能或性能。
因此,光硬核34的通用性较好,可以用于实现光芯片中部分的通用性的功能和/或标 准的性能,而无需通过对光软核33进行编程来实现通用性的功能和/或标准的性能,能够减小光芯片面积,提高光芯片的集成度。
进一步地,所述光硬核34可以位于多条第一传输路径31的外围,也可以内嵌于多条第一传输路径31的内部。关于光硬核34在光芯片上的位置的具体内容可以参照上文关于光IP核在光芯片中位置的相关描述,在此不再赘述。
进一步地,所述光芯片还可以包括光学接口36,所述光学接口36可以用于输入或输出光信号,所述光学接口36可以是基于光栅耦合的接口,也可以是基于边缘耦合的接口。所述光学接口可以位于所述光连接网络的四周。
进一步地,所述光学接口36还可以经由第一传输路径31与光IP核连接,以使外部输入的光信号传输至光IP核中,或者所述光学接口36还可以经由第一传输路径31与第一可编程基础器件32连接,以使外部输入的光信号可以先传输至第一可编程基础器件32中,再传输至光IP核中。光IP核中输出的光信号也可以经由第一传输路径31和/或第一可编程基础器件32传输至光学接口36,以进一步传输至光芯片外部。
进一步地,所述光芯片还可以包括电学接口37,所述电学接口37用于输入或输出电信号,所述电信号可以是用于控制所述第一可编程基础器件32、所述第二可编程基础器件、第三可编程基础器件的电控制信号。所述电信号还可以是用于控制光硬核34(例如:调制器、功率放大器)的电控制信号,该电控制信号可以开启或关闭光硬核34或者是对光硬核34的工作参数进行设置,例如,选择功率放大器的放大倍数等,但并不限于此。所述电信号还可以是用于控制光固核35中第一光学器件的电控制信号,该电控制信号可以对第一光学器件的工作参数进行设置。
需要说明的是,上文描述的通过电信号对光硬核34或者光固核35中第一光学器件的工作参数进行设置区别于本发明实施例中所称的“可编程”。可以理解的是,本发明实施例中的“可编程”是指控制施加在各个第一可编程基础器件32上的电控制信号,来对第一可编程基础器件32进行控制,以改变光信号在光连接网络中的传输路径/或相位,和/或控制施加在各个第二可编程基础器件上的电控制信号,来对第二可编程基础器件进行控制,以改变光信号在光软核33中的传输路径和/或相位,和/或控制施加在各个第三可编程基础器件上的电控制信号,来对第三可编程基础器件进行控制,以改变光信号在光固核35中的传输路径和/或相位。而对工作参数进行设置只能是基于已有器件提供的一个或多个参数选项进行选择,并未使用可编程基础器件。
所述电信号还可以是所述光硬核34生成的用于携带光信号信息的电信号,例如,所述电信号可以是光探测器测量得到的光强信息。其中,所述电学接口37可以是直流信号接口, 也可以是交流信号接口,例如,可以是射频信号接口。
具体而言,所述电信号还可以用于控制第一可编程基础器件32对第一传输路径31中的光信号进行光交换,也即,通过改变施加在第一可编程基础器件31上的电信号,改变光信号在光芯片上的传输路径和/或相位。
具体而言,电信号还可以用于控制第二可编程基础器件对第二传输路径中的光信号进行光交换,也即,通过改变施加在第二可编程基础器件上的电信号,可以改变光信号在光软核33内的传输路径和/或相位,从而实现对光软核33内的第二可编程基础器件的编程操作,以改变光软核33的功能和/或性能。
进一步地,电信号还可以用于控制第三可编程基础器件对第三传输路径中的光信号进行光交换,也即,通过改变施加在第三可编程基础器件上的电信号,改变光信号在光固核35内的传输路径和/或相位,从而实现对光固核35中的第三可编程基础器件的编程操作,以改变光固核35的性能。
进一步地,所述光芯片还可以包括电连接线38,所述电连接线38用于传输上述电信号,所述电连接线38的一端与电学接口37连接,电连接线38的另一端可以与光软核33、光固核35、光硬核34、第一可编程基础器件32中的任意一个连接。
由上可知,本发明实施例提供了一种光芯片,所述光芯片可以包括光IP核,所述光IP核可以是光软核、光固核、光硬核。其中,光软核的功能和性能均可通过对第二可编程基础器件进行编程操作实现,灵活性最强,可以用于实现使用频率较低的器件功能;光硬核的功能和性能均是固定的,具有通用性,使用频率高,易操作性、可靠性较高;光固核的功能是固定的,但可以通过对第三可编程基础器件进行编程操作来实现不同的性能,灵活性居于光硬核和光软核之间。所述光芯片可以应用于光通信、光子人工智能、微波光子、光量子计算、光传感等领域,本发明实施例对此并不限定。
由此,本发明实施例详细完备地定义了可编程的光芯片的架构,为可编程光芯片向大规模化、多功能化方向发展奠定了基础。本发明实施例提出的可编程的光芯片具有更高的器件效率,可以实现更丰富更复杂的功能,同时也解决了不同功能器件对光芯片设计需求不同的问题。
本发明实施例还提供了一种终端,所述终端可以包括上述的可编程的光芯片。所述终端可以是终端可以指各种形式的终端、接入终端、用户单元、用户站、用户终端、终端设备、车载设备、物联网设备等。所述终端可以应用于光通信、光子人工智能、微波光子、光量子计算、光传感等领域,本发明实施例对此并不限定。
应理解,本文中术语“和/或”,仅仅是一种描述关联对象的关联关系,表示可以存在 三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。另外,本文中字符“/“,表示前后关联对象是一种“或”的关系。
本申请实施例中出现的“多个”是指两个或两个以上。
本申请实施例中出现的第一、第二等描述,仅作示意与区分描述对象之用,没有次序之分,也不表示本申请实施例中对设备个数的特别限定,不能构成对本申请实施例的任何限制。
虽然本发明披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (13)

  1. 一种可编程的光芯片,所述光芯片包括:
    用于在所述光芯片内传输光信号的一条或多条第一传输路径;
    第一可编程基础器件,所述第一可编程基础器件呈第一预设形状阵列排列;
    光IP核,所述光IP核和所述第一可编程基础器件之间、所述第一可编程基础器件之间、所述光IP核之间经由所述第一传输路径光耦合;
    其中,所述光IP核包括一种或多种类别的光软核,和/或,一种或多种类别的光固核,每种光软核包括第二可编程基础器件以及用于在所述光软核内传输光信号的一条或多条第二传输路径,每种光固核包括第三可编程基础器件、用于在所述光固核内传输所述光信号的一条或多条第三传输路径和用于对所述光信号进行处理的第一光学器件;
    所述第一可编程基础器件用于控制在所述第一传输路径中传输的所述光信号的路径和相位,所述第二可编程基础器件用于控制在所述第二传输路径中传输的光信号的路径和相位,所述第三可编程基础器件用于控制在所述第三传输路径中传输的光信号的路径和相位。
  2. 根据权利要求1所述的可编程的光芯片,其中,所述第二可编程基础器件呈第二预设形状阵列排列,
    不同类别的光软核满足以下一项或多项:
    所述第二预设形状不同、所述第二可编程基础器件的类型不同、所述第二可编程基础器件的尺寸不同、所述第二可编程基础器件的数量不同、所述第二可编程基础器件的整体形状不同。
  3. 根据权利要求1所述的可编程的光芯片,其特征在于,所述光IP核还包括:一种或多种类别的光硬核,所述光硬核为用于对所述光信号进行处理的第二光学器件。
  4. 根据权利要求3所述的可编程的光芯片,其中,所述光硬核包括以下一项或多项:功率放大器、激光器、探测器、调制器、光强度监测器、衰减器、滤波器、延时线、波分复用器。
  5. 根据权利要求1所述的可编程的光芯片,其中,所述光固核包括以下一项或多项:可编程延时线、可编程滤波器、可编程调制器、可编程波分复用器。
  6. 根据权利要求1所述的可编程的光芯片,其中,所述光芯片满足以下一项或多项:
    所述第一可编程基础器件是基于马赫曾德尔干涉仪的光开关或微机电器件;
    所述第二可编程基础器件是基于马赫曾德尔干涉仪的光开关或微机电器件;
    所述第三可编程基础器件是基于马赫曾德尔干涉仪的光开关或微机电器件。
  7. 根据权利要求1所述的可编程的光芯片,其中,所述光IP核位于多条第一传输路径 的外围或内嵌于多条第一传输路径的内部。
  8. 根据权利要求1所述的可编程的光芯片,其中,所述光芯片还包括光学接口,所述光学接口用于输入或输出光信号,所述光学接口包括基于光栅耦合的接口和基于边缘耦合的接口。
  9. 根据权利要求1所述的可编程的光芯片,其中,所述光芯片还包括:电学接口,所述电学接口用于输入或输出电信号。
  10. 根据权利要求1所述的可编程的光芯片,其中,所述第一可编程基础器件呈六边形阵列排列。
  11. 根据权利要求1所述的可编程的光芯片,其中,所述光芯片用于光计算时,每个光软核中的多个第二可编程基础器件呈网格阵列排列或三角形阵列排列。
  12. 根据权利要求1所述的可编程的光芯片,其中,所述第一传输路径、所述第二传输路径和所述第三传输路径为光波导。
  13. 一种终端,所述终端包含权利要求1至12任一项所述的可编程的光芯片。
PCT/CN2021/107517 2021-02-04 2021-07-21 可编程的光芯片、终端 WO2022166122A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/924,346 US20230185155A1 (en) 2021-02-04 2021-07-21 Programmable optical chip and terminal

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202110156450.XA CN112817891B (zh) 2021-02-04 2021-02-04 可编程的光芯片、终端
CN202110156450.X 2021-02-04

Publications (1)

Publication Number Publication Date
WO2022166122A1 true WO2022166122A1 (zh) 2022-08-11

Family

ID=75861458

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/107517 WO2022166122A1 (zh) 2021-02-04 2021-07-21 可编程的光芯片、终端

Country Status (3)

Country Link
US (1) US20230185155A1 (zh)
CN (1) CN112817891B (zh)
WO (1) WO2022166122A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112817891B (zh) * 2021-02-04 2022-10-18 联合微电子中心有限责任公司 可编程的光芯片、终端

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102202005A (zh) * 2011-07-12 2011-09-28 西安电子科技大学 可重配置的光片上网络及配置方法
CN103246088A (zh) * 2013-05-10 2013-08-14 北京工业大学 一种矩形结构的马赫-曾德尔电光调制器
CN105122833A (zh) * 2014-03-20 2015-12-02 华为技术有限公司 一种光片上网络、动态调整光链路带宽的方法及装置
CN105763962A (zh) * 2014-12-18 2016-07-13 华为技术有限公司 光片上网络、光路由器和传输信号的方法
CN112817891A (zh) * 2021-02-04 2021-05-18 联合微电子中心有限责任公司 可编程的光芯片、终端

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040027644A1 (en) * 2002-08-09 2004-02-12 Lockheed Martin Corporation Programmable photonic device and method
CN1275413C (zh) * 2002-12-30 2006-09-13 北京邮电大学 光网络中避免光信号冲突的突发统计复用方法
US7548668B2 (en) * 2007-11-21 2009-06-16 Alcatel-Lucent Usa Inc. Programmable optical array
US20120170933A1 (en) * 2010-12-29 2012-07-05 Christopher Doerr Core-selective optical switches
US9788088B2 (en) * 2013-09-21 2017-10-10 Mark E. Boduch Method and apparatus for optical node construction using field programmable photonics
CN103576345A (zh) * 2013-10-28 2014-02-12 华中科技大学 一种基于集成硅波导的可编程光学滤波器
US9354039B2 (en) * 2014-06-06 2016-05-31 Massachusetts Institute Of Technology Methods, systems, and apparatus for programmable quantum photonic processing
CN109477938B (zh) * 2016-06-02 2021-10-29 麻省理工学院 用于光学神经网络的设备和方法
CN106936736B (zh) * 2017-04-11 2019-05-21 西安电子科技大学 基于双层布局的可扩展光片上网络结构及其通信方法
ES2695323B2 (es) * 2018-11-19 2019-05-16 Univ Valencia Politecnica Metodo de configuracion y optimizacion de dispositivos fotonicos programables basados en estructuras malladas de guiaondas opticas integradas
US11073658B2 (en) * 2018-12-28 2021-07-27 Universitat Politècnica De València Photonic chip, field programmable photonic array and programmable circuit
CN111683304B (zh) * 2020-05-13 2021-12-14 中国科学院西安光学精密机械研究所 在光波导和/或光芯片上实现的全光衍射神经网络及系统

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102202005A (zh) * 2011-07-12 2011-09-28 西安电子科技大学 可重配置的光片上网络及配置方法
CN103246088A (zh) * 2013-05-10 2013-08-14 北京工业大学 一种矩形结构的马赫-曾德尔电光调制器
CN105122833A (zh) * 2014-03-20 2015-12-02 华为技术有限公司 一种光片上网络、动态调整光链路带宽的方法及装置
CN105763962A (zh) * 2014-12-18 2016-07-13 华为技术有限公司 光片上网络、光路由器和传输信号的方法
CN112817891A (zh) * 2021-02-04 2021-05-18 联合微电子中心有限责任公司 可编程的光芯片、终端

Also Published As

Publication number Publication date
CN112817891A (zh) 2021-05-18
CN112817891B (zh) 2022-10-18
US20230185155A1 (en) 2023-06-15

Similar Documents

Publication Publication Date Title
CN105829933B (zh) 波导偏振分离和偏振转换器
CN103281153B (zh) 一种基于硅基液晶的m×n端口的可重构光分插复用器
Dupuis et al. Modeling and Characterization of a Nonblocking $4\times 4$ Mach–Zehnder Silicon Photonic Switch Fabric
WO2020177064A1 (zh) 分光器芯片、分光器组件、分光器装置和光纤盒
CN103487889A (zh) 基于双谐振腔耦合马赫-曾德尔光开关结构
CN103308988A (zh) 一种基于5个微环谐振器的4×4非阻塞光学交换网络
CN102540345B (zh) 基于微环谐振器的低损耗低串扰四端口无阻塞光学路由器
WO2022166122A1 (zh) 可编程的光芯片、终端
CN107450126A (zh) 一种偏振分束器及其设计方法
CN203311035U (zh) 一种基于硅基液晶的m×n端口的可重构光分插复用器
Zhou et al. Self-learning photonic signal processor with an optical neural network chip
CN104834059B (zh) 一种光传输过程中的模式转换方法及装置
CN204188832U (zh) 偏振分束器
CN109491175A (zh) 一种基于模式复用的可重构导向逻辑器件
CN105676370B (zh) 一种基于微环谐振腔的全光分组交换开关
CN104503028A (zh) 一种偏振相同的时分复用装置及制作方法
CN108563042A (zh) 一种基于光子晶体和纳米线波导的马赫曾德尔型调制器
CN109240019B (zh) 一种二进制全光比较器
Govdeli et al. On-chip switch and add/drop multiplexer design with left-handed behavior in photonic crystals
CN104678676B (zh) 一种基于微环谐振器的可逆光学逻辑器件
CN207408621U (zh) 一种偏振分束器
CN111562652B (zh) 一种基于合成光学网格的双输入双输出光学开关
CN106788864B (zh) 一种集成化可重构光插分复用器
CN114488409A (zh) 基于可调耦合器级联耦合共振光波导的可重构光学滤波器芯片
CN206149282U (zh) 一种集成化可重构光插分复用器

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21924126

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21924126

Country of ref document: EP

Kind code of ref document: A1