WO2022165804A1 - 一种滞后三相电压还原方法、系统及相关设备 - Google Patents

一种滞后三相电压还原方法、系统及相关设备 Download PDF

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WO2022165804A1
WO2022165804A1 PCT/CN2021/075820 CN2021075820W WO2022165804A1 WO 2022165804 A1 WO2022165804 A1 WO 2022165804A1 CN 2021075820 W CN2021075820 W CN 2021075820W WO 2022165804 A1 WO2022165804 A1 WO 2022165804A1
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phase voltage
phase
voltage
sequence
value
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PCT/CN2021/075820
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English (en)
French (fr)
Inventor
邓家勇
刘鹏飞
刘晓红
吴壬华
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深圳欣锐科技股份有限公司
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Priority to CN202180002691.7A priority Critical patent/CN113678356A/zh
Priority to PCT/CN2021/075820 priority patent/WO2022165804A1/zh
Publication of WO2022165804A1 publication Critical patent/WO2022165804A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4216—Arrangements for improving power factor of AC input operating from a three-phase input voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present application relates to the field of three-phase alternating current, and in particular, to a method, system and related equipment for restoring a hysteresis three-phase voltage.
  • PFC Power Factor Correction
  • EMC Electromagnetic Compatibility
  • the present application provides a method, system and related equipment for restoring the lagging three-phase voltage, which can restore the lagging three-phase voltage, avoid the influence of the three-phase voltage lagging on PFC control, and reduce the risk of power factor reduction, so that the Power utilization can be maintained at a relatively high level.
  • the present application provides a method for restoring a hysteresis three-phase voltage, the method comprising: obtaining two-phase voltages of three-phase voltages in a three-phase PFC circuit; The cosine value of another phase voltage in the three-phase voltage; based on the cosine value of the other phase voltage, the three-phase voltage is processed in advance to obtain the restored value of the three-phase voltage.
  • the problem of three-phase voltage lag caused by hardware filtering is processed in advance, the three-phase voltage value before the lag is restored, and the influence of the three-phase voltage lag on the PFC is reduced, so that the power The factor can still be controlled at a high level, that is, the power utilization rate can be maintained at a high level.
  • the method further includes: judging and identifying the phase sequence of the three-phase voltage, and determining that the phase sequence of the three-phase voltage is a positive sequence or a Negative order.
  • the phase sequence of the three-phase voltage is determined, and the two-phase voltage to be obtained can be determined, so that the subsequent restoration operation can be carried out smoothly.
  • the judging and identifying the phase sequence of the three-phase voltage includes: setting two counters, and the two counters are based on a preset counting period time length, respectively used to count the duration of the two-phase voltage when the two-phase voltage crosses zero; compare the values corresponding to the two counters, and determine the three-phase voltage according to the comparison result. Phase sequence.
  • the number of preset counting cycles after the zero-crossing point of the two-phase voltage is counted by two counters, and then the phase sequence of the three-phase voltage is judged according to the counting results of the two counters, which can accurately distinguish Whether the output is a positive sequence three-phase voltage or a negative sequence three-phase voltage.
  • the performing advance processing on the voltage of the other phase includes: determining the voltage according to a time constant of a filter in the three-phase PFC circuit Leading value of the three-phase voltage.
  • the lead value of the three-phase voltage can be determined according to the time constant of the filter in the three-phase PFC circuit, and the accurate acquisition of the lead value of the three-phase voltage ensures the accuracy of the three-phase voltage reduction value.
  • the present application provides a hysteresis three-phase voltage reduction device, which is characterized by comprising: an acquisition unit for acquiring two-phase voltages among three-phase voltages in a three-phase PFC circuit; a calculation unit for The two-phase voltage in the three-phase voltage is calculated to obtain the cosine value of the other phase voltage in the three-phase voltage; the restoration unit is used to advance the three-phase voltage based on the cosine value of the other phase voltage. processing to obtain the restored value of the three-phase voltage.
  • the method further includes: a judgment unit, configured to judge and identify the phase sequence of the three-phase voltage, and determine that the phase sequence of the three-phase voltage is positive order or negative order.
  • the judging unit is specifically configured to: set up two counters, and the two counters are respectively used for when the two counters are used according to a preset counting period duration.
  • the phase voltage crosses zero, the duration of the two-phase voltage is counted; the numerical values corresponding to the two counters are compared, and the phase sequence of the three-phase voltage is determined according to the comparison result.
  • the restoration unit when used to perform advanced processing on the three-phase voltage, it is specifically used for: according to the time constant of the filter in the three-phase PFC circuit , and determine the leading value of the three-phase voltage.
  • a computing device in a third aspect, includes a processor and a memory, the memory is used for storing a program code, and the processor is used for the program code in the memory to execute the above-mentioned first aspect and in combination with the above-mentioned Any one of the implementation manners of the first aspect provides a method for restoring a hysteresis three-phase voltage.
  • a computer-readable storage medium stores a computer program.
  • the computer program is executed by the processor, the first aspect and any one of the first aspect can be implemented.
  • a method for restoring the hysteresis three-phase voltage provided by an implementation manner.
  • the present application provides a computer program product, the computer program includes instructions that, when the computer program is executed by a computer, enables the computer to execute the above-mentioned first aspect and any implementation manner in combination with the above-mentioned first aspect Provided is a flow chart of a method for restoring a hysteresis three-phase voltage.
  • the above-mentioned device for restoring the three-phase voltage with lag provided in the second aspect
  • a computing device provided in the third aspect a computer-readable storage medium provided in the fourth aspect
  • a computer-readable storage medium provided in the fifth aspect All of the computer program products are used to execute the method for restoring the hysteresis three-phase voltage provided by the first aspect. Therefore, for the beneficial effects that can be achieved, reference may be made to the beneficial effects in the method for restoring the hysteresis three-phase voltage provided in the first aspect, which will not be repeated here.
  • FIG. 1 is a schematic structural diagram of a hysteresis three-phase voltage reduction system provided by an embodiment of the present application
  • FIG. 2 is a schematic flowchart of a method for reducing a three-phase voltage with a lag provided by an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of a hysteresis three-phase voltage reduction device provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a computing device provided by an embodiment of the present application.
  • Three-phase voltage is the voltage between phases. There are many voltage standards around the world. Three-phase voltage 220V is one type, three-phase 380V is another type, and there are other voltages; in addition, there are 50HZ and 60HZ frequencies. of.
  • the three-phase voltage standard in my country is 380V, and the frequency between each phase is the same, and the frequency is 50Hz.
  • the commonly used three-phase power can be understood as follows: three different two-pole generators all generate alternating current, and the current and voltage are all sine waves, but the rotation and power generation sequence of these three generators are different, and their sine waves are in the same The instantaneous values are also different. If a sine wave is zero degrees, the second is 120 degrees, and the third is 240 degrees (-120 degrees). Of course, the third is 120 degrees away from the first. This difference between them is fixed, and the difference in this angle is called the phase difference.
  • the so-called three-phase power is a power supply with three phase differences.
  • the AC power systems in the world are generally ABC three-phase, and the positive sequence, negative sequence, and zero sequence components of the power system are determined according to the order of the ABC three-phase (phase difference).
  • Positive sequence Phase A leads Phase B by 120 degrees
  • Phase B leads Phase C by 120 degrees
  • Phase C leads Phase A by 120 degrees
  • Negative sequence Phase A is 120 degrees behind Phase B
  • Phase B is 120 degrees behind Phase C
  • Phase C is behind Phase A Phase 120 degrees
  • zero sequence ABC three-phase phase is the same.
  • Power factor correction is a technology to improve the power factor of electrical equipment.
  • Power factor refers to the relationship between effective power and total power consumption (apparent power), that is, the ratio of effective power divided by total power consumption (apparent power). Basically, the power factor can measure the degree to which electricity is effectively utilized. Power factor is a parameter used to measure the power efficiency of electrical equipment, and low power factor represents low power efficiency.
  • the time constant is a constant representing the time course of the transition reaction, and refers to the time required for the physical quantity to decay from the maximum value to 1/e of the maximum value. Alternatively, for a quantity that decays exponentially, the time required for its amplitude to decay to 1/e of the initial value (the above-mentioned maximum value) is called the time constant.
  • the time constant is the product of the resistor and capacitor. If the unit of C is ⁇ F (microfarad), the unit of R is M ⁇ (megaohm), and the unit of time constant is second.
  • the time required for the terminal voltage of the capacitor to reach the maximum value (equal to IR) (1-1/e), that is, about 0.63 times, is the time constant, and in the circuit When disconnected, the time constant is the time required for the terminal voltage of the capacitor to reach 1/e of the maximum value, that is, about 0.37 times.
  • the hysteresis three-phase voltage restoration system 100 includes a switch module 110 , a capacitor module 120 , an inductance module 130 , a hardware filter module 140 , a hysteresis three-phase voltage restoration device 150 , a voltage module 160 , a current module 170 and a power supply module 180.
  • the hardware filter module 140 may cause the three-phase voltage lag, which affects the PFC control, and the lag three-phase voltage restoration device 150 restores the lag three-phase voltage.
  • the present application provides a method for restoring the three-phase voltage with lag.
  • the method uses a counter to determine the phase sequence of the three-phase voltage,
  • the time constant of the filter in the phase PFC circuit is used to determine the lead value, so as to accurately realize the restoration of the lag voltage, and also reduce the influence of the three-phase voltage lag on the power factor.
  • the method includes but is not limited to the following steps:
  • the three-phase voltage includes the A-phase voltage, the B-phase voltage, and the C-phase voltage, and the voltage value of the B-phase voltage and the C-phase voltage in the three-phase PFC circuit are obtained.
  • S220 Calculate the cosine value of another phase voltage in the three-phase voltages.
  • phase sequence of the three-phase voltages that is, determine whether the three-phase voltages are positive sequence or negative sequence.
  • Two counters are set, and the two counters are respectively used to count the duration of the two-phase voltage when the two-phase voltage in the three-phase voltage crosses zero according to the preset counting period;
  • the numerical values corresponding to the two counters are compared, and the phase sequence of the three-phase voltage is determined according to the comparison result.
  • the preset count period can be set according to actual needs and experimental data, which is not limited in this application.
  • two counters are set, one is CntB and the other is CntC.
  • the counter CntB is cleared
  • the counter CntC is cleared.
  • the two counters count the durations of the B-phase voltage and the C-phase voltage, respectively. If the preset count period is 15 ⁇ s, the counter CntB and the counter CntC count every 15 ⁇ s, and continue to accumulate after the B-phase voltage and the C-phase voltage respectively cross zero.
  • CntB and CntC stop counting, and compare the counts of CntB and CntC, that is, compare the interval time from the B-phase voltage zero-crossing point to the A-phase zero-crossing point and the C-phase voltage zero-crossing point to the A-phase zero-crossing point.
  • Interval time that is, the duration of comparing the B-phase voltage and C-phase voltage described above. If CntB ⁇ CntC, the three-phase voltage is judged to be in positive sequence, otherwise, the three-phase voltage is judged to be in negative sequence.
  • U a is the voltage value of the A-phase voltage
  • U b is the voltage value of the B-phase voltage
  • U c the voltage value of the C-phase voltage
  • U is the peak value of the AC voltage.
  • U a is the voltage value of the A-phase voltage
  • U b is the voltage value of the B-phase voltage
  • U c the voltage value of the C-phase voltage
  • U is the peak value of the AC voltage.
  • ⁇ can be set according to the actual situation, which is not limited in this application.
  • S230 Perform advance processing on the voltage of the other phase to obtain a restored value of the three-phase voltage.
  • the B-phase voltage and C-phase voltage after the advance treatment can be obtained as follows:
  • the B-phase voltage and C-phase voltage after the advance treatment can be obtained as follows:
  • advance value ⁇ can be set according to the time constant of the filter and experimental data, which is not limited in this application.
  • FIG. 3 is a schematic structural diagram of a three-phase voltage reduction device with lag provided by the present application, and the device for reducing three-phase voltage with lag is used to perform the method for reducing three-phase voltage with lag described in FIG. 2 .
  • the application does not limit the division of the functional units of the three-phase voltage hysteresis reduction device, and each unit in the hysteresis three-phase voltage reduction device can be added, decreased or combined as required.
  • the operations and/or functions of each unit in the device for restoring the hysteresis three-phase voltage are respectively in order to implement the corresponding flow of the method described in FIG. 2 , and are not described here for brevity.
  • Figure 3 exemplarily provides a division of functional units:
  • the hysteresis three-phase voltage restoration device 300 includes: an acquisition unit 310 , a calculation unit 320 , a restoration unit 330 and a judgment unit 340 .
  • the obtaining unit 310 is configured to obtain two-phase voltages among the three-phase voltages in the three-phase PFC circuit.
  • the calculation unit 320 is configured to calculate the cosine value of another phase voltage of the three-phase voltages based on the two-phase voltages of the three-phase voltages.
  • the restoration unit 330 is configured to perform advance processing on the three-phase voltage based on the cosine value of the other phase voltage to obtain the restoration value of the three-phase voltage.
  • the judging unit 340 is configured to judge and identify the phase sequence of the three-phase voltage, and determine whether the three-phase voltage is a positive sequence or a negative sequence.
  • each unit included in the hysteresis three-phase voltage reduction device 300 may be a software unit, a hardware unit, or a part of a software unit and a part of a hardware unit. .
  • the lag three-phase voltage reduction device 300 and the lag three-phase voltage reduction device 150 may have the same structure or composition, or may have different structures or compositions, but they perform the same function and have the same role.
  • FIG. 4 is a schematic structural diagram of a computing device provided by an embodiment of the present application.
  • the computing device 400 includes a processor 410 , a communication interface 420 and a memory 430 , and the processor 410 , the communication interface 420 and the memory 430 are connected to each other through an internal bus 440 .
  • the computing device 400 may be the lag three-phase voltage reduction device 300 in FIG. 3 , and the functions performed by the lag three-phase voltage reduction device 300 in FIG. 3 are actually processed by the lag three-phase voltage reduction device 300 .
  • the processor 410 may be composed of one or more general-purpose processors, such as a central processing unit (central processing unit, CPU), or a combination of a CPU and a hardware chip.
  • the above-mentioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD) or a combination thereof.
  • the above-mentioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a general array logic (generic array logic, GAL) or any combination thereof.
  • the communication interface 420 is used to communicate with other devices or communication networks, such as Ethernet, radio access network (RAN), core network, wireless local area network (Wireless Local Area Networks, WLAN) and the like.
  • RAN radio access network
  • WLAN wireless Local Area Networks
  • the bus 440 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus or the like.
  • PCI peripheral component interconnect
  • EISA extended industry standard architecture
  • the bus 440 can be divided into an address bus, a data bus, a control bus, and the like. For ease of presentation, only one thick line is used in FIG. 4, but it does not mean that there is only one bus or one type of bus.
  • the memory 430 may include a volatile memory (volatile memory), such as random access memory (RAM); the memory 430 may also include a non-volatile memory (non-volatile memory), such as a read-only memory (read- only memory, ROM), flash memory (flash memory), hard disk drive (HDD) or solid-state drive (solid-state drive, SSD); the memory 430 may also include a combination of the above types.
  • the memory 430 is used to store the program code for executing the embodiment of the method for restoring the three-phase voltage with a lag. In one embodiment, the memory 430 can also cache other data, and the processor 410 controls the execution to realize the three-phase delay.
  • the functional units shown in the voltage reduction device 300 are used to implement the method steps in the method embodiment shown in FIG.
  • Embodiments of the present application further provide a computer-readable storage medium, on which a computer program is stored.
  • the program When the program is executed by a processor, it can implement some or all of the steps described in the above method embodiments, and realize the above The function of any one of the functional units described in FIG. 3 .
  • the embodiments of the present application also provide a computer program product, which, when running on a computer or a processor, enables the computer or processor to execute the method steps in any of the above-mentioned methods with the hysteresis three-phase voltage reduction device 300 as the main body of execution. one or more steps. If each component module of the above-mentioned device is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in the computer-readable storage medium.
  • An embodiment of the present application further provides a chip system, where the chip system includes a processor, which is used to support the hysteresis three-phase voltage reduction device 300 to implement the method steps in any of the above methods with the hysteresis three-phase voltage reduction device 300 as the execution body one or more steps.
  • the chip system further includes a memory for storing necessary program instructions and data of the data sending device.
  • the chip system may be composed of chips, or may include chips and other discrete devices.
  • the size of the sequence numbers of the above-mentioned processes does not mean the sequence of execution, and the execution sequence of each process should be determined by its functions and internal logic, and should not be implemented in the present application.
  • the implementation of the examples constitutes no limitation.
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium.
  • the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program codes .
  • the modules in the apparatus of the embodiment of the present application may be combined, divided and deleted according to actual needs.

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Abstract

一种滞后三相电压还原方法、还原装置及相关计算设备、计算机可读存储介质。其中，该方法包括：获取三相电压中的两相电压；根据所述三相电压中的两相电压，计算得到所述三相电压中的另一相电压的余弦值；根据所述另一相电压的余弦值，对所述另一相电压进行超前处理，得到所述另一相电压的还原值；根据所述另一相电压的还原值，计算得到所述三相电压中的两相电压对应的电压还原值。该方法避免了三相电压滞后对PFC控制的影响，降低了功率因数减小的风险，使得电力利用率能维持在比较高的水平。

Description

一种滞后三相电压还原方法、系统及相关设备 技术领域
本申请涉及三相交流电领域，尤其涉及一种滞后三相电压还原方法、系统及相关设备。
背景技术
功率因数校正(Power Factor Correction，PFC)是针对非正弦电流波形畸变而采取的一种技术，主要目的是解决因容性负载导致电流波形严重畸变而产生的电磁干扰(Electromagnetic Interference，EMI)和电磁兼容(Electromagnetic Compatibility，EMC)问题，提高功率因数。在三相PFC电路中，三相电压由于硬件滤波会存在比较大的滞后，而这种滞后会影响PFC在提高功率因数方面的作用，因此如何有效对滞后的三相电压进行还原是目前亟待解决的问题。
发明内容
本申请提供了一种滞后三相电压的还原方法、系统及相关设备，能够还原滞后的三相电压，避免了三相电压滞后对PFC控制的影响，并且降低了功率因数减小的风险，使得电力利用率能维持在比较高的水平。
第一方面，本申请提供一种滞后三相电压还原方法，所述方法包括：获取三相PFC电路中三相电压中的两相电压；基于所述三相电压中的两相电压，计算得到所述三相电压中的另一相电压的余弦值；基于所述另一相电压的余弦值，对所述三相电压进行超前处理，得到所述三相电压的还原值。
在本申请提供的方案中，对硬件滤波造成的三相电压滞后的问题，进行了超前处理，还原了滞后前的三相电压值，减少了三相电压滞后给PFC带来的影响，使得功率因数仍能控制在较高水平，即能让电力利用率维持在较高水平。
结合第一方面，在第一方面的一种可能的实现方式中，所述方法还包括：对所述三相电压的相序进行判断识别，确定所述三相电压的相序为正序或负序。
在本申请提供的方案中，需要判断三相电压为正序还是负序，这是因为相序不同三相电压的相位不同，超前处理的过程也会有所不同。首先确定三相电压的相序，可以确定需要获取的两相电压是哪两相电压，使得后续还原操作能顺利进行。
结合第一方面，在第一方面的一种可能的实现方式中，所述对所述三相电压的相序进行判断识别，包括：设置两个计数器，所述两个计数器根据预设计数周期时长，分别用于当所述两相电压过零时对所述两相电压的持续时间进行计数；对所述两个计数器所对应的数值大小进行比较，根据比较结果确定所述三相电压的相序。
在本申请提供的方案中，通过两个计数器分别对两相电压过零点后的预设计数周期的数量进行计数，然后根据两个计数器的计数结果来判断三相电压的相序，能准确区分出是正序三相电压还是负序三相电压。
结合第一方面，在第一方面的一种可能的实现方式中，所述对所述另一相电压进行超 前处理，包括：根据所述三相PFC电路中滤波器的时间常数，确定所述三相电压的超前值。
在本申请提供的方案中，可以根据三相PFC电路中滤波器的时间常数，确定三相电压的超前值，而三相电压超前值的准确获取保障了三相电压还原值的准确性。
第二方面，本申请提供一种滞后三相电压还原装置，其特征在于，包括：获取单元，用于获取三相PFC电路中三相电压中的两相电压；计算单元，用于基于所述三相电压中的两相电压，计算得到所述三相电压中的另一相电压的余弦值；还原单元，用于基于所述另一相电压的余弦值，对所述三相电压进行超前处理，得到所述三相电压的还原值。
结合第二方面，在第二方面的一种可能的实现方式中，还包括：判断单元，用于对所述三相电压的相序进行判断识别，确定所述三相电压的相序为正序或负序。
结合第二方面，在第二方面的一种可能的实现方式中，所述判断单元具体用于：设置两个计数器，所述两个计数器根据预设计数周期时长，分别用于当所述两相电压过零时对所述两相电压的持续时间进行计数；对所述两个计数器所对应的数值大小进行比较，根据比较结果确定所述三相电压的相序。
结合第二方面，在第二方面的一种可能的实现方式中，还原单元用于对所述三相电压进行超前处理时，具体用于：根据所述三相PFC电路中滤波器的时间常数，确定所述三相电压的超前值。
第三方面，提供了一种计算设备，所述计算设备包括处理器和存储器，所述存储器用于存储程序代码，所述处理器用于所述存储器中的程序代码执行上述第一方面以及结合上述第一方面中的任意一种实现方式所提供的滞后三相电压的还原方法。
第四方面，提供了计算机可读存储介质，所述计算机可读存储介质存储有计算机程序，当该计算机程序被处理器执行时，可以实现上述第一方面以及结合上述第一方面中的任意一种实现方式所提供的滞后三相电压的还原方法。
第五方面，本申请提供了一种计算机程序产品，该计算机程序包括指令，当该计算机程序被计算机执行时，使得计算机可以执行上述第一方面以及结合上述第一方面中的任意一种实现方式所提供的滞后三相电压的还原方法的流程。
可以理解地，上述提供的第二方面提供的滞后三相电压的还原装置、第三方面提供的一种计算设备、第四方面提供的一种计算机可读存储介质，以及第五方面提供的一种计算机程序产品均用于执行第一方面所提供的滞后三相电压的还原方法。因此，其所能达到的有益效果可参考第一方面所提供的滞后三相电压的还原方法中的有益效果，此处不再赘述。
附图说明
图1是本申请实施例提供的一种滞后三相电压还原系统的结构示意图；
图2是本申请实施例提供的一种滞后三相电压还原方法的流程示意图；
图3是本申请实施例提供的一种滞后三相电压还原装置的结构示意图；
图4是本申请实施例提供的一种计算设备的结构示意图。
具体实施方式
下面结合附图对本申请实施例中的技术方案进行清楚、完整的描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
首先，结合附图对本申请中所涉及的部分用语和相关技术进行解释说明，以便于本领域技术人员理解。
三相电压就是相与相之间的电压，世界各国的电压标准有多种，三相电压220V是一种，三相380V又是一种，还有其他电压的；另外，频率也有50HZ和60HZ的。我国三相电压标准为380V，每一相之间的频率都是一样，频率为50Hz。通常用的三相电可以这样理解：三个不同的二极发电机，发的都是交流电，电流电压都是正弦波，但是这三个发电机的转动发电顺序不同，各自的正弦波在同一瞬间的值也不一样，一个如果是零度的正弦波，第二个就是120度，第三个就是240度(-120度)，当然第三个与第一个也相差120度。它们的这种差值是固定的，这种角度的差值就叫相位差，所谓三相电，就是存在三个相位差的电源。
当前世界上的交流电力系统一般都是ABC三相的，而电力系统的正序，负序，零序分量便是根据ABC三相的顺序(相位的区别)来定的。正序：A相领先B相120度，B相领先C相120度，C相领先A相120度；负序：A相落后B相120度，B相落后C相120度，C相落后A相120度；零序：ABC三相相位相同。
功率因数校正(Power Factor Correction，PFC)是一种为了提高用电设备功率因数的技术。功率因数(Power Factor)指的是有效功率与总耗电量(视在功率)之间的关系，也就是有效功率除以总耗电量(视在功率)的比值。基本上功率因数可以衡量电力被有效利用的程度，当功率因数值越大，代表其电力利用率越高。功率因数是用来衡量用电设备用电效率的参数，低功率因数代表低电力效能。
时间常数是表示过渡反应的时间过程的常数，指该物理量从最大值衰减到最大值的1/e所需要的时间。或者，对于某一按指数规律衰变的量，其幅值衰变为初始值(上述最大值)的1/e时所需的时间称为时间常数。在电阻、电容的电路中，时间常数是电阻和电容的乘积。若C的单位是μF(微法)，R的单位是MΩ(兆欧)，时间常数的单位就是秒。在这样的电路中，当恒定电流I流过时，电容的端电压达到最大值(等于IR)的(1-1/e)时，即约0.63倍所需要的时间即是时间常数，而在电路断开时，时间常数是电容的端电压达到最大值的1/e，即约0.37倍时所需要的时间。
为了便于理解本申请实施例，首先对本申请实施例提供的一种滞后三相电压还原系统进行描述。如图1所示，该滞后三相电压还原系统100包括开关模块110、电容模块120、电感模块130、硬件滤波模块140、滞后三相电压还原装置150、电压模块160、电流模块170以及电源模块180。其中，硬件滤波模块140会造成三相电压滞后，影响PFC控制，而滞后三相电压还原装置150对滞后的三相电压进行还原。
为了降低硬件滤波对PFC控制造成的影响，使得功率因数和电力利用率在较高水平，本申请提供了一种滞后三相电压还原方法，该方法利用计数器判断三相电压的相序，通过三相PFC电路中滤波器的时间常数来确定超前值，从而准确实现滞后电压的还原，同时也降低了三相电压滞后对功率因数的影响。
基于图1所示的滞后三相电压还原系统的示意图，下面对本申请实施例提供的一种滞后三相电压还原方法进行详细描述。如图2所示，该方法包括但不限于以下步骤：
S210：获取三相电压中的两相电压。
具体地，三相电压包括A相电压、B相电压和C相电压，获取三相PFC电路中B相电压的电压值和C相电压的电压值。
S220：计算得到所述三相电压中的另一相电压的余弦值。
具体地，首先判断三相电压的相序，即确定所述三相电压为正序还是负序。设置两个计数器，所述两个计数器根据预设计数周期时长，分别用于当所述三相电压中的两相电压过零时，对该两相电压的持续时间进行计数；然后对所述两个计数器所对应的数值大小进行比较，根据比较结果确定所述三相电压的相序。
可理解，所述预设计数周期可根据实际需要和实验数据进行设置，本申请中对此不作限制。
示例性的，设置两个计数器，一个为CntB，另一个为CntC，当B相电压过零时，计数器CntB清零，当C相电压过零时，计数器CntC清零。当B相电压和C相电压分别过零后，该两个计数器分别对B相电压和C相电压的持续时间进行计数。若预设计数周期时长为15μs，则计数器CntB和计数器CntC每隔15μs计数一次，并在B相电压和C相电压分别过零后持续累加。当A相电压过零点时，CntB和CntC停止计数，比较CntB和CntC计数次数的大小，即比较B相电压过零点到A相过零点的间隔时间和C相电压过零点到A相过零点的间隔时间，也就是比较上文所述B相电压和C相电压的持续时间。若CntB<CntC，则判断所述三相电压为正序，否则，判断所述三相电压为负序。
当三相电压为正序时，设置所述正序三相电压的电压分别为：U a＝U sin(ωt)、
Figure PCTCN2021075820-appb-000001
和
Figure PCTCN2021075820-appb-000002
其中U a为A相电压的电压值，U b为B相电压的电压值，U c为C相电压的电压值，U为交流电压的峰值，根据获取到的B相电压和C相电压，计算A相电压的余弦值。获取A相电压的余弦值的具体过程如下：
1、展开U b(B相电压)和U c(C相电压)。
可得：
Figure PCTCN2021075820-appb-000003
Figure PCTCN2021075820-appb-000004
2、U c(C相电压)减去U b(B相电压)
则有：
Figure PCTCN2021075820-appb-000005
3、变换可得：
Figure PCTCN2021075820-appb-000006
当三相电压为负序时，设置所述正序三相电压的电压分别为：U a＝U sin(ωt)、
Figure PCTCN2021075820-appb-000007
和
Figure PCTCN2021075820-appb-000008
其中U a为A相电压的电压值，U b为B相电压的电压值，U c为C相电压的电压值，U为交流电压的峰值，根据获取到的B相电压和C相电压，计算A相电压的余弦值。获取A相电压的余弦值的具体过程如下：
1、展开U b(B相电压)和U c(C相电压)。
可得：
Figure PCTCN2021075820-appb-000009
Figure PCTCN2021075820-appb-000010
2、U b(C相电压)减去U c(B相电压)
则有：
Figure PCTCN2021075820-appb-000011
3、变换可得：
Figure PCTCN2021075820-appb-000012
需要说明的是，ω可根据实际情况进行设置，本申请对此不作限制。
S230：对所述另一相电压进行超前处理，得到所述三相电压的还原值。
具体地，用三相PFC电路中滤波器的时间常数乘ω可得A相电压的超前值，将该超前值设为θ，则可得经过超前处理的A相电压为：U' a＝U sin(ωt)cos(θ)+Ucos(ωt)sin(θ)
当三相电压为正序时，结合上述所获取的A相电压的余弦值，可得：
Figure PCTCN2021075820-appb-000013
对B相电压和C相电压进行与上述对A相电压的超前处理相同的超前处理，其超前值也为θ，可得经过超前处理的B相电压和C相电压分别为：
Figure PCTCN2021075820-appb-000014
当三相电压为负序时，结合上述所获取的A相电压的余弦值，可得：
Figure PCTCN2021075820-appb-000015
对B相电压和C相电压进行与上述对A相电压的超前处理相同的超前处理，其超前值也为θ，可得经过超前处理的B相电压和C相电压分别为：
Figure PCTCN2021075820-appb-000016
可理解，超前值θ可由根据滤波器的时间常数以及实验数据进行设置，在本申请中对此不作限制。
上述详细阐述了本申请实施例的方法，为了便于更好的实施本申请实施例的上述方案，相应地，下面还提供用于配合实施的相关设备。
如图3所示，图3是本申请提供的一种滞后三相电压还原装置的结构示意图，该滞后三相电压的还原装置用于执行上述图2所述的滞后三相电压还原方法。本申请对该滞后三相电压的还原装置的功能单元的划分不做限定，可以根据需要对该滞后三相电压的还原装置中的各个单元进行增加、减少或合并。此外，滞后三相电压的还原装置中的各个单元的操作和/或功能分别为了实现上述图2所描述的方法的相应流程，为了简洁，在此不再赘述。图3示例性的提供了一种功能单元的划分：
滞后三相电压还原装置300包括：获取单元310、计算单元320、还原单元330和判断单元340。
获取单元310，用于获取三相PFC电路中三相电压中的两相电压。
计算单元320，用于基于所述三相电压中的两相电压，计算得到所述三相电压中的另一相电压的余弦值。
还原单元330，用于基于所述另一相电压的余弦值，对所述三相电压进行超前处理，得到所述三相电压的还原值。
判断单元340，用于对所述三相电压的相序进行判断识别，确定所述三相电压为正序 或负序。
上述三个单元之间互相可通过通信通路进行数据传输，应理解，滞后三相电压还原装置300包括的各单元可以为软件单元、也可以为硬件单元，还可以部分为软件单元部分为硬件单元。
需要说明的是，滞后三相电压还原装置300和滞后三相电压还原装置150可以有相同的结构或组成，也可以有不同的结构或组成，但是它们执行相同的功能，具备相同的作用。
参见图4，图4是本申请实施例提供的一种计算设备的结构示意图。如图4所示，该计算设备400包括：处理器410、通信接口420以及存储器430，所述处理器410、通信接口420以及存储器430通过内部总线440相互连接。
所述计算设备400可以是图3中的滞后三相电压还原装置300，图3中的滞后三相电压还原装置300所执行的功能实际上是由所述滞后三相电压的还原装置300的处理器410来执行。
所述处理器410可以由一个或者多个通用处理器构成，例如中央处理器(central processing unit，CPU)，或者CPU和硬件芯片的组合。上述硬件芯片可以是专用集成电路(application-specific integrated circuit，ASIC)、可编程逻辑器件(programmable logic device，PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(complex programmable logic device，CPLD)、现场可编程逻辑门阵列(field-programmable gate array，FPGA)、通用阵列逻辑(generic array logic，GAL)或其任意组合。
通信接口420用于与其他设备或通信网络通信，如以太网，无线接入网(RAN)，核心网，无线局域网(Wireless Local Area Networks，WLAN)等。
总线440可以是外设部件互连标准(peripheral component interconnect，PCI)总线或扩展工业标准结构(extended industry standard architecture，EISA)总线等。所述总线440可以分为地址总线、数据总线、控制总线等。为便于表示，图4中仅用一条粗线表示，但不表示仅有一根总线或一种类型的总线。
存储器430可以包括易失性存储器(volatile memory)，例如随机存取存储器(random access memory，RAM)；存储器430也可以包括非易失性存储器(non-volatile memory)，例如只读存储器(read-only memory，ROM)、快闪存储器(flash memory)、硬盘(hard disk drive，HDD)或固态硬盘(solid-state drive，SSD)；存储器430还可以包括上述种类的组合。存储器430用于存储执行以上述滞后三相电压的还原方法实施例的程序代码，在一种实施方式中，存储器430还可以缓存其他数据，并由处理器410来控制执行，以实现滞后三相电压还原装置300所示的功能单元，或者用于实现图2所示的方法实施例中以滞后三相电压还原装置300为执行主体的方法步骤。
本申请实施例还提供一种计算机可读存储介质，其上存储有计算机程序，该程序被处理器执行时，可以实现上述方法实施例中记载的任意一种的部分或全部步骤，以及实现上述图3所描述的任意一个功能单元的功能。
本申请实施例还提供了一种计算机程序产品，当其在计算机或处理器上运行时，使得 计算机或处理器执行上述任一个方法中以滞后三相电压还原装置300为执行主体的方法步骤的一个或多个步骤。上述所涉及的设备的各组成模块如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在所述计算机可读取存储介质中。
本申请实施例还提供了一种芯片系统，该芯片系统包括处理器，用于支持滞后三相电压还原装置300实现上述任一个方法中以滞后三相电压的还原装置300为执行主体的方法步骤的一个或多个步骤。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存数据发送设备必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包含芯片和其他分立器件。
在上述实施例中，对各个实施例的描述各有侧重，某个实施例中没有详述的部分，可以参见其它实施例的相关描述。
应理解，本文中涉及的第一、第二、第三、第四以及各种数字编号仅为描述方便进行的区分，并不用来限制本申请的范围。
应理解，本文中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
还应理解，在本申请的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
本申请实施例方法中的步骤可以根据实际需要进行顺序调整、合并和删减。
本申请实施例装置中的模块可以根据实际需要进行合并、划分和删减。
以上所述，以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (10)

  1. 一种滞后三相电压还原方法，其特征在于，所述方法包括：
    获取三相PFC电路中三相电压中的两相电压；
    基于所述三相电压中的两相电压，计算得到所述三相电压中的另一相电压的余弦值；
    基于所述另一相电压的余弦值，对所述三相电压进行超前处理，得到所述三相电压的还原值。
  2. 如权利要求1所述的方法，其特征在于，所述方法还包括：
    对所述三相电压的相序进行判断识别，确定所述三相电压的相序为正序或负序。
  3. 如权利要求2所述的方法，其特征在于，所述对所述三相电压的相序进行判断识别，包括：
    设置两个计数器，所述两个计数器根据预设计数周期时长，分别用于当所述两相电压过零时对所述两相电压的持续时间进行计数；
    对所述两个计数器所对应的数值大小进行比较，根据比较结果确定所述三相电压的相序。
  4. 如权利要求1-3任一项所述的方法，其特征在于，所述对所述三相电压进行超前处理，包括：
    根据所述三相PFC电路中滤波器的时间常数，确定所述三相电压的超前值。
  5. 一种滞后三相电压还原装置，其特征在于，包括：
    获取单元，用于获取三相PFC电路中三相电压中的两相电压；
    计算单元，用于基于所述三相电压中的两相电压，计算得到所述三相电压中的另一相电压的余弦值；
    还原单元，用于基于所述另一相电压的余弦值，对所述三相电压进行超前处理，得到所述三相电压的还原值。
  6. 如权利要求5所述的装置，其特征在于，还包括：
    判断单元，用于对所述三相电压的相序进行判断识别，确定所述三相电压的相序为正序或负序。
  7. 如权利要求6所述的装置，其特征在于，所述判断单元具体用于：
    设置两个计数器，所述两个计数器根据预设计数周期时长，分别用于当所述两相电压过零时对所述两相电压的持续时间进行计数；
    对所述两个计数器所对应的数值大小进行比较，根据比较结果确定所述三相电压的相序。
  8. 如权利要求5-7任一项所述的装置，其特征在于，还原单元用于对所述三相电压进行超前处理时，具体用于：
    根据所述三相PFC电路中滤波器的时间常数，确定所述三相电压的超前值。
  9. 一种计算设备，其特征在于，所述计算设备包括存储器和处理器，所述处理器执行所述存储器存储的计算机指令，使得所述计算设备执行权利要求1-4任一项所述的方法。
  10. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质存储有计算机程序，该计算机程序被处理器执行时实现上述权利要求1-4任意一项所述的方法。
PCT/CN2021/075820 2021-02-07 2021-02-07 一种滞后三相电压还原方法、系统及相关设备 WO2022165804A1 (zh)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5859530A (en) * 1996-08-07 1999-01-12 Ch. Beha Gmbh Technische Neuentwicklungen Process for determining the phase sequence in a three-phase network (rotary current network)
CN101788615A (zh) * 2010-01-11 2010-07-28 中色科技股份有限公司 一种简易三相工频交流电相序测量的方法及检测设备
CN102128969A (zh) * 2010-10-26 2011-07-20 北京鼎汉技术股份有限公司 一种高抗干扰能力的pfc电路输入电压检测方法
CN106468735A (zh) * 2015-08-17 2017-03-01 珠海格力节能环保制冷技术研究中心有限公司 相位角获取方法和系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5859530A (en) * 1996-08-07 1999-01-12 Ch. Beha Gmbh Technische Neuentwicklungen Process for determining the phase sequence in a three-phase network (rotary current network)
CN101788615A (zh) * 2010-01-11 2010-07-28 中色科技股份有限公司 一种简易三相工频交流电相序测量的方法及检测设备
CN102128969A (zh) * 2010-10-26 2011-07-20 北京鼎汉技术股份有限公司 一种高抗干扰能力的pfc电路输入电压检测方法
CN106468735A (zh) * 2015-08-17 2017-03-01 珠海格力节能环保制冷技术研究中心有限公司 相位角获取方法和系统

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