WO2022143741A1 - 存储设备管理方法、设备及存储系统 - Google Patents

存储设备管理方法、设备及存储系统 Download PDF

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Publication number
WO2022143741A1
WO2022143741A1 PCT/CN2021/142390 CN2021142390W WO2022143741A1 WO 2022143741 A1 WO2022143741 A1 WO 2022143741A1 CN 2021142390 W CN2021142390 W CN 2021142390W WO 2022143741 A1 WO2022143741 A1 WO 2022143741A1
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storage capacity
user
visible
storage
storage device
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PCT/CN2021/142390
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English (en)
French (fr)
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陈滔
薛强
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华为技术有限公司
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Publication of WO2022143741A1 publication Critical patent/WO2022143741A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0727—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a storage system, e.g. in a DASD or network based storage system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/0644—Management of space entities, e.g. partitions, extents, pools
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0688—Non-volatile semiconductor memory arrays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0689—Disk arrays, e.g. RAID, JBOD
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5022—Mechanisms to release resources

Definitions

  • the present invention relates to the field of information technology, and in particular, to a storage device management method, device and storage system.
  • Redundant Array of Independent Disks (RAID) technology is a technology widely used in storage systems to ensure data reliability.
  • RAID reconstruction When a hard disk is damaged in the storage system, the data on the undamaged hard disk and the verification data can be restored. Calculate the data on the damaged hard disk, such a process is called RAID reconstruction. Data loss and reconstruction in the hard disk not only improves data reliability, but also faces the problem of hard disk performance.
  • an embodiment of the present invention provides a storage device management method, the method includes:
  • the access device obtains fault information of the first storage device; wherein the fault information is used to indicate that a component of the first storage device is faulty; the first storage device includes multiple components, and the multiple components are used to provide the user-visible storage capacity of the first storage device and the storage capacity of the redundant space; the access device is used to access the user-visible storage capacity;
  • the access device sends a first release command to the first storage device according to the fault information; the first release command is used to release the first user-visible storage capacity from the user-visible storage capacity; wherein the The first user-visible storage capacity is no greater than the storage capacity provided by the failed component.
  • the component is a plurality of particle packages connected on a channel, or one or more particle packages, or one or more particles, or one or more flash memory chips.
  • the method further includes: acquiring, by the access device, information about the storage capacity of the failed component, so as to determine the storage capacity loss caused by the failure of the component.
  • the access device obtains the storage capacity of the failed component, specifically including:
  • the access device obtains the storage capacity of the failed component from the failure information.
  • the storage device may carry the storage capacity of the failed component in the failure information.
  • the first release command is used to release the first user-visible storage capacity from the user-visible storage capacity, and specifically includes: the first release command is used to release the first user-visible storage capacity from the logical block address of the first storage device. The end position begins to release the first user-visible storage capacity, thereby ensuring the continuity of logical block addresses.
  • the first release command is used to release the first user-visible storage capacity from the user-visible storage capacity, and specifically includes:
  • the first release command is used to release the logical block address of the first visible storage capacity from the logical block addresses of the first storage device mapped to the physical address of the failed component.
  • the method also includes:
  • the access device sends a second release command to the first storage device; the second release command is used to release a second user-visible storage capacity from the user-visible storage capacity; wherein the first user-visible storage capacity
  • the sum of the capacity and the second user-visible storage capacity is not greater than the storage capacity provided by the failed component.
  • the corresponding user-visible storage capacity can be released in multiple stages. For example, proportional release based on storage device usage.
  • first release command and the second release command are specifically an unmap (unmap) command or a deallocate (deallocate) command.
  • the method also includes:
  • the access device copies the data in the logical block address corresponding to the first user-visible storage capacity to the second storage device, thereby ensuring that the data in the released logical block address in the first storage device is not lost.
  • the first storage device is a solid state hard disk SSD.
  • an embodiment of the present invention provides a storage device management method.
  • the storage device includes multiple components, and the multiple components provide the storage device with user-visible storage capacity and storage capacity of redundant space; access a device for accessing the user-visible storage capacity; the method includes:
  • the storage device sends fault information to the access device; the fault information is used to indicate that a component of the storage device is faulty;
  • the storage device receives a first release command sent by the access device; the first release command is a command for releasing the first user-visible storage capacity from the user-visible storage capacity; wherein, the first user-visible storage capacity The storage capacity is not greater than that provided by the failed component;
  • the storage device erases the data stored in the first user-visible storage capacity according to the first release command.
  • the storage device releases a user-visible storage capacity that is not greater than the storage capacity provided by the failed storage component, thereby reducing or not occupying redundant storage capacity without affecting the use of the entire storage device.
  • the storage capacity of the free space is reduced, thereby reducing the write amplification of the SSD and improving the storage performance.
  • the method also includes:
  • the storage device sends the storage capacity information provided by the failed component to the access device.
  • the first release command is specifically used to release the first user-visible storage capacity from the end position of the logical block address of the storage device.
  • the first release command is specifically used to release the logical block address of the first visible storage capacity from the logical block addresses mapped by the storage device to the physical address of the failed component.
  • the method also includes:
  • the storage device receives a second release command sent by the access device;
  • the second release command is a command for releasing the second user-visible storage capacity from the user-visible storage capacity; wherein, the first user-visible storage capacity The sum of the storage capacity and the second user-visible storage capacity is not greater than the storage capacity provided by the failed component;
  • the storage device erases the data stored in the second user-visible storage capacity according to the second release command.
  • first release command and the second release command are unmap (unmap) commands or deallocate (deallocate) commands.
  • the storage device is a solid state drive (SSD).
  • an embodiment of the present invention provides an access device, including various units, for implementing various solutions of the first aspect.
  • an embodiment of the present invention provides a storage device, which includes multiple components, the multiple components provide the storage device with user-visible storage capacity and storage capacity of redundant space; an access device is used to access the storage device. User-visible storage capacity; the storage device further includes a plurality of units for implementing various solutions of the second aspect.
  • an embodiment of the present invention provides an access device, including a processor and an interface, the processor communicates with the interface, and the processor is used to implement various solutions of the first aspect.
  • an embodiment of the present invention provides a storage device, the storage device includes a storage device controller and multiple components, the multiple components provide the storage device with storage of user-visible storage capacity and redundant space capacity; an access device is used to access the user-visible storage capacity; and the storage device controller is used to implement various solutions of the second aspect.
  • an embodiment of the present invention provides a storage system, where the storage system includes the access device of the fifth aspect and the storage device of the sixth aspect.
  • an embodiment of the present invention provides a computer program product, where the computer program product includes computer program instructions, and when a computer executes the computer program instructions, various solutions of the first aspect are executed.
  • an embodiment of the present invention provides a computer-readable storage medium, where computer program instructions are stored in the computer-readable storage medium, and when a computer executes the computer program instructions, various solutions of the first aspect are executed.
  • FIG. 1 is a schematic diagram of a storage system according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a storage array controller according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a distributed storage system according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a server in a distributed storage system according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of an SSD according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of an SSD basic storage unit in an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a block group relationship in a storage system according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of an operation flow of an access device according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of releasing user-visible storage space according to an embodiment of the present invention.
  • FIG. 10 is a schematic diagram of an operation flow of a storage device according to an embodiment of the present invention.
  • FIG. 11 is a schematic structural diagram of an access device according to an embodiment of the present invention.
  • FIG. 12 is a schematic structural diagram of a storage device according to an embodiment of the present invention.
  • the storage system in this embodiment of the present invention may be a storage array (such as of 18000 series, V6 series).
  • the storage array includes the controller 101 and a plurality of SSDs.
  • the SSD can be located in the disk enclosure of the storage array.
  • the controller 101 includes a central processing unit (CPU) 201, a memory 202 and an interface 203.
  • the memory 202 stores computer program instructions, and the CPU 201 executes the computer program instructions in the memory 202 to manage the storage system. And data access operations, data recovery and other operations.
  • a Field Programmable Gate Array or other hardware may also be used to perform all operations of the CPU 201 in the embodiments of the present invention, or the FPGA or other hardware and the CPU 201 may be used separately. for executing part of the operations of the CPU 201 according to the embodiment of the present invention.
  • the processor is used to refer to the combination of the CPU 201 and the memory 202 , as well as the above-mentioned various implementations, and the processor communicates with the interface 203 .
  • the interface 203 may be a Networking Interface Card (NIC) or a Host Bus Adaptor (HBA).
  • the storage system in this embodiment of the present invention may also be a distributed storage system (such as of series), etc. by of 100D series.
  • the distributed block storage system includes multiple servers, such as server 1, server 2, server 3, server 4, server 5 and server 6, and the servers communicate with each other through InfiniBand or Ethernet.
  • the number of servers in the distributed block storage system may be increased according to actual requirements, which is not limited in this embodiment of the present invention.
  • the server of the distributed block storage system includes the structure shown in FIG. 4 .
  • each server in the distributed block storage system includes a central processing unit (CPU) 401, a memory 402, an interface 403, SSD1, SSD 2 and SSD 3, and the memory 402 stores computer program instructions , the CPU 401 executes the program instructions in the memory 402 to execute corresponding operations.
  • the interface 403 can be a hardware interface, such as a network interface card (Network Interface Card, NIC) or a host bus adapter (Host Bus Adaptor, HBA), etc., or can be a program interface module or the like.
  • FPGA Field Programmable Gate Array
  • the CPU 401 and the memory 402 , the FPGA and other hardware replacing the CPU 401 , or the combination of the FPGA and other hardware replacing the CPU 401 and the CPU 401 are collectively referred to as a processor.
  • the interface 403 may be a network interface card (Networking Interface Card, NIC) or a host bus adapter (Host Bus Adaptor, HBA).
  • NIC Network Interface Card
  • HBA host bus adapter
  • the server responsible for storage management in the distributed storage system is called a controller. Specifically, the controller is used to perform storage space management, data access, and the like.
  • SSD uses page as read and write unit and block as erase unit.
  • SSD can realize channel, package, flash chip, die, plane, etc. Levels of parallelism for data access.
  • SSD organizes flash memory particle packages in a multi-channel manner. Multiple particle packages can be connected to each channel. Transmission channels are shared among multi-particle packages, but instructions can be executed independently.
  • FIG. 5 for the specific structure of the SSD, which includes an interface 501 , an SSD controller 502 , a channel 503 , and a package 504 .
  • One package 504 includes multiple flash memory chips, each flash memory chip includes one or more particles, each particle includes multiple flash memory chips, each flash memory chip includes multiple blocks, and each block includes multiple pages.
  • the interface 501 may support the Serial Attached Small Computer System Interface (SAS) protocol, the Non-Volatile Memory Express (NVMe) protocol or the Peripheral Component Interconnect Express, PCIe) protocol interface, etc.
  • SAS Serial Attached Small Computer System Interface
  • NVMe Non-Volatile
  • the basic storage unit of NAND Flash in SSD is a floating gate transistor, and one floating gate transistor corresponds to one cell.
  • the structure of the floating gate transistor is shown in FIG. 6 , including a control gate, an oxide layer, a floating gate layer (Floating Gate), a tunnel oxide layer from top to bottom, and a source electrode, a drain electrode and a substrate at the bottom.
  • a floating gate layer for storing electrons is formed on the transistor where the current is unidirectionally conducted between the source (Source) and the drain (Drain), and the floating gate layer is surrounded by an insulating layer up and down, so that the electrons are easy to enter and difficult to exit, and the storage in the The electrons inside do not disappear due to loss of power, so flash memory is non-volatile memory.
  • the floating gate transistor realizes writing and erasing data to the floating gate transistor by charging and discharging electrons on the floating gate layer. When writing data, a positive voltage is applied to the control gate, so that electrons enter the floating gate layer through the insulating layer, that is, the process of writing data is a charging process.
  • a positive voltage is applied to the substrate to make electrons pass through the insulating layer of the floating gate layer, thereby releasing electrons from the floating gate layer.
  • the data is stored in binary of 0 and 1. According to whether there are two states of electrons in the floating gate layer, 0 and 1 of the data can be represented, so that the data can be stored. Generally, the state with electrons is recorded as 0, and the state without electrons is recorded as 1. Since the floating gate transistors of the same physical block are located on the same substrate, when electrons are released from the floating gate layer, all electrons on the same physical block are released, that is, when erasing data, the entire Physical block data.
  • the unit cell can be divided into the following types of units: single-level cell (Single Level Cell, SLC), multi-level cell (Multi-Level Cell, MLC), three-level cell ( Triple Level Cell, TLC) and Quad Level Cell (QLC).
  • SLC Single Level Cell
  • MLC multi-level cell
  • TLC Triple Level Cell
  • QLC Quad Level Cell
  • the number of bits that a cell can store is also called the capacity of the cell.
  • each cell can store 1 bit of data, that is, a floating gate transistor expresses the stored 1 bit data by two states of whether there is one electron in the floating gate layer. Therefore, the 1-bit data that the floating gate transistor corresponding to SLC can store can be represented by 0 and 1.
  • each cell can store 2bit data, that is, a floating gate transistor expresses 2bit data by 4 states of whether there are at most 2 electrons in the floating gate layer. Therefore, the 2-bit data that can be stored by the floating gate transistor corresponding to the MLC can be represented by 00, 01, 10, and 11.
  • TLC each cell can store 3bit data, that is, a floating gate transistor expresses 3bit data by 8 states of whether there are at most 3 electrons in the floating gate layer. Therefore, the 3-bit data that the floating gate transistor corresponding to TLC can store can be represented by 000, 001, 010, 011, 100, 101, 110, and 111.
  • QLC each cell can store 4bit data, that is, a floating gate transistor expresses 4bit data by 16 states of whether there are up to 4 electrons in the floating gate layer.
  • SSDs can only be erased in units of physical blocks. If a physical block contains physical pages that store valid data, the SSD needs to read and write valid data into physical pages of other blocks before erasing the data in the physical block. This process is called garbage collection. An erase operation is not required as long as the physical page is free.
  • SSD provides redundant space (Over Provisioning, OP). The redundant space ensures that a large number of physical blocks are in the blank and reserved state, which helps to maintain the consistency of SSD performance and reduce write amplification.
  • OP refers to the storage capacity of NAND Flash provided by SSD that exceeds the user-visible storage capacity.
  • the user-visible storage capacity of SSD is 400G, but the total storage capacity of NAND Flash is 512G, and the extra storage capacity of 112G is redundant space. storage capacity.
  • SSD users can see the storage capacity, which is provided to users in the form of logical addresses.
  • a user in this embodiment of the present invention refers to a device that accesses the SSD, that is, an access device. Specifically, it can be a controller in a server or a storage array. In another implementation, it can also be a host or a terminal device.
  • the logical address is the logical block address (Logical Block Address, LBA).
  • LBA Logical Block Address
  • the SSD uses the Flash Translation Layer (FTL) to map the LBA to the physical page (page) on the physical block of the SSD, and establishes the LBA to The mapping relationship of physical page addresses.
  • FTL Flash Translation Layer
  • the SSD includes components that provide storage capacity, such as channels, packages, flash chips, dies, and planes. Therefore, the storage capacity of SSD is provided by components.
  • an SSD fails, usually only one or a few components of the SSD fail, not the entire SSD. That is to say, when a fault occurs inside the SSD, the storage capacity potentially affected by the fault is not the total storage capacity of the entire SSD, but a part of the storage capacity of the SSD.
  • the storage capacity affected by the fault is referred to as the The component is a faulty component.
  • the faulty component may be a plurality of particle packages connected on a channel, or one or more particles, or one or more flash memory chips.
  • the SSD is faulty, and the data stored in the faulty component needs to be restored.
  • the failure of a component of the SSD may be the failure of the entire failed component, or the failure of a part of the failed component.
  • the entire particle may not be accessible, and the storage capacity provided by the entire particle may not be available.
  • a pellet fails, it may be that some of the storage capacity in the pellet is unavailable.
  • SSD monitors the status of each component. Specifically, the SSD controller monitors the status of components using background inspection and other methods. The SSD can also determine the state of the component according to the number of times of erasing the physical block in each component, that is, determine the state of the component according to the degree of wear.
  • the controller 101 may acquire the status of the components of the SSD.
  • the specific implementation may be that the storage system queries the status of the components of the SSD, or the SSD actively reports the status of the components.
  • the storage system can obtain the status of the components of the SSD, specifically, the controller of the storage array obtains the status of the components of the SSD.
  • the controller 101 can obtain the mapping relationship between the logical block address of the SSD and the physical address provided by the component, that is, the mapping relationship between the logical block address of the SSD and the physical page on the component of the SSD.
  • the specific implementation can be obtained by the controller 101 through a query, or actively reported by the SSD.
  • the mapping of the logical block addresses of the SSD to the physical addresses on the components of the SSD may include multiple levels of mapping. For example, the mapping between the logical block address of the SSD and the virtual logical block group, and the mapping between the virtual logical block group and the physical block or physical page; or the mapping between the logical block address of the SSD and the physical block group, and the mapping between the physical block group and the physical page.
  • the controller 101 may acquire component information of the SSD, for example, one or more of the component types, component data, and storage capacity provided by each component that the component information of the SSD may contain.
  • the embodiment of the present invention is described by taking one SSD including 140 particles and the user-visible storage capacity of the SSD as 32TB as an example.
  • the user-visible storage capacity of SSD is 32TB, which can provide 32TB of logical addresses, or can provide 32TB of address space.
  • the storage capacity of the redundant space of the SSD is 3TB.
  • each particle provides 556GB of storage capacity
  • 128 of the 140 particles provide 32TB of user-visible storage capacity
  • the other 12 of the 140 particles provide 3TB of redundant storage capacity.
  • the SSD provides a logical block address of 32TB, that is, a CK capacity of 32TB.
  • the SSD provides fixed-length blocks (Chunk, CK) to form a resource pool
  • the controller 101 uses a redundancy algorithm, such as an erasure code (Erasure Coding, EC) algorithm or a redundant array of independent disks (Redundancy array of independent disks, RAID) algorithm
  • the Chunks from different SSDs are formed into block groups (Chunk Group, CKG), and the CKG is divided into blocks of fixed granularity (Extent), which is the logical unit number (Logical Unit Number, LUN) provided by the storage array to the outside. ) provides storage resources.
  • CKG consists of CK1, CK2 and CK3.
  • CK1 is provided by the first chip of SSD1, CK2 is provided by the second chip of SSD2, and CK3 is provided by the third chip of SSD3.
  • CK1 corresponds to LBA1 of SSD1
  • CK2 corresponds to LBA2 of SSD2
  • CK3 corresponds to LBA3 of SSD3.
  • LBA1 is mapped to the physical address provided by the first particle of SSD1
  • LBA2 is mapped to the physical address provided by the second particle of SSD2
  • LBA3 is mapped to the physical address provided by the third particle of SSD3.
  • SSD1, SSD2, and SSD3 each include 140 particles, the storage capacity visible to the user is 32TB, and the redundant space is 3TB as an example for description.
  • the CK of the SSD when selecting a CK from multiple SSDs to form a CKG, it may be considered to select the CK of the SSD based on the load.
  • the load can be the type of input and output (InputOutput, IO), the temperature of IO, and so on.
  • the CK of the SSD may also be selected based on an equalization algorithm.
  • the first particle of SSD1 is faulty, and SSD1 sends fault information to the controller 101 to indicate that the particle is faulty.
  • SSD1 sends fault information to controller 101, which can be SSD1 actively sending fault information to controller 101; it can also send fault information to controller 101 based on the query of controller 101, which is collectively referred to as controller 101 receiving from the controller 101 side.
  • the fault information may include the number of faulty particles, or the fault information may include an identifier of the faulty particle, or the fault information may include storage capacity provided by the faulty particle, and the like.
  • the fault information may include the logical block address range of the SSD1 affected by the first particle.
  • the controller 101 may acquire component information of the SSD. Therefore, in the case where the fault information only contains the number of the faulty particles or the identification of the faulty particles in the fault information, the controller 101 can still obtain the storage capacity information provided by the faulty component.
  • SSD1 sends component failure information to the controller 101, and the controller 101 determines the affected logical block address range, that is, the CK affected by the fault, according to the correspondence between the logical block addresses of SSD1 and the components.
  • the controller 101 restores the data stored in the CK affected by the fault according to the CKG where the CK affected by the fault is located, so that it is not necessary to restore all the data stored in the SSD1, and the quantity of data to be restored is reduced.
  • the controller 101 can write the recovered data to the SSD1, and the SSD1 stores the recovered data in a physical page in the redundant space of the SSD1, so that the CK used to store the recovered data is still the original CK, and the SSD1 Only the mapping of logical block addresses to physical page addresses needs to be updated.
  • SSD1 can restore the data mapped to the logical block address of the first particle based on the internal data recovery mechanism of the SSD, without the need to restore all the data stored in SSD1, reducing the amount of data that needs to be restored. At the same time, the consumption of computing resources when the controller 101 performs data recovery is also reduced.
  • SSD1 can restore data mapped to the logical block address of the first particle based on a redundant array of independent disks (Redundancy array of independent disks, RAID) mechanism inside SSD1.
  • SSD1 can store the recovered data in a physical page in the redundant space of SSD1, so that the CK used to store the recovered data is still the original CK, and SSD1 only needs to update the mapping from logical block addresses to physical page addresses.
  • the SSD 1 may not need to send the failure information for specifically indicating the failure of the first particle to the controller 101 .
  • failure information may only contain information on the storage capacity affected by the failed component. For example, the storage capacity of 256GB is lost, that is, the storage capacity provided by the first particle.
  • the data recovered based on the above two data recovery methods may also be stored in other SSDs, and the controller 101 selects a new CK for storing the recovered data.
  • the first particle of the SSD1 due to the failure of the first particle of the SSD1, the first particle cannot provide the corresponding storage capacity. Under the condition that the logical block address provided by the SSD1 remains unchanged, the redundant space of the SSD1 is required to provide the storage capacity lost by the failure of the first particle, thereby consuming the storage capacity of the redundant space.
  • the embodiment of the present invention provides a solution as shown in FIG. 8 , including:
  • the access device receives failure information of the first storage device
  • the failure information is used to indicate that a component of the first storage device fails;
  • the first storage device includes multiple components, and the multiple components are used to provide user-visible storage capacity of the first storage device and the storage capacity of the redundant space;
  • the access device is used to access the user-visible storage capacity;
  • the access device sends a first release command to the first storage device according to the fault information
  • the first release command is used to release the first user-visible storage capacity from the user-visible storage capacity; wherein the first user-visible storage capacity is not greater than the storage capacity provided by the failed component.
  • the access device sends a second release command to the first storage device; the second release command is used to release a second user-visible storage capacity from the user-visible storage capacity; wherein the first The sum of the user-visible storage capacity and the second user-visible storage capacity is not greater than the storage capacity provided by the failed component.
  • the access device copies the data in the logical block address corresponding to the first user-visible storage capacity to the second storage device.
  • the user-visible storage capacity is embodied in the form of logical block addresses, and releasing the user-visible storage capacity means releasing the corresponding logical block address.
  • the FTL can be located in the SSD or in the access device.
  • the visible storage capacity of some users may be smaller than the storage capacity of the first particle.
  • the part of the user-visible storage capacity released may be the entire storage capacity provided by the first particle. Release the user-visible storage capacity of the SSD, which is implemented by reducing the logical block addresses provided by the SSD.
  • One implementation may release at least a part of the logical block addresses mapped to the physical page of the first granularity. Because the logical block addresses are linearly continuous addresses, the above-mentioned way of releasing the logical block addresses may cause discontinuity of the logical block addresses provided by the SSD.
  • the logical block address of the corresponding user-visible storage capacity is released from the end position of the logical block address of the SSD. Because the logical block address is a linearly delivered logical address, the end position of the logical block address begins to be released, that is, the logical block address corresponding to the user-visible storage capacity is released from the largest logical block address to the smallest logical block address.
  • the capacity of the logical block address mapped to the physical page of the first granularity is 256GB
  • the logical block address range of the capacity embodied by the user of the SSD is 0-(32TB-1), as shown in Figure 9, from the position of 32TB-1
  • Start to release the 256GB logical block address capacity, and the released logical block address is used indicates that the logical block address range of the SSD becomes 0-(31.75TB-1), thereby ensuring the continuity of logical block addresses.
  • the released logical block addresses are no longer used, that is, the controller 101 no longer writes data to the CK corresponding to the released logical block addresses, and the SSD no longer establishes a mapping from the released logical block addresses to physical pages.
  • the controller 101 may mark the CK corresponding to the released logical block address as unavailable.
  • the controller 101 may release the user-visible storage capacity multiple times. For example, 64GB of user-visible storage capacity can be released each time, or the user-visible storage capacity can be released multiple times according to the usage rate of the SSD, but the total released user-visible storage capacity does not exceed 256GB, that is, it does not exceed the storage provided by the first particle that failed capacity.
  • an embodiment of the present invention provides a storage device for executing the solution shown in FIG. 10 , including:
  • the storage device sends fault information to the access device
  • the fault information is used to indicate that a component of the storage device is faulty
  • the storage device receives a first release command sent by the access device
  • the first release command is a command for releasing the first user-visible storage capacity from the user-visible storage capacity; wherein, the first user-visible storage capacity is not greater than the storage capacity provided by the failed component;
  • the storage device erases the data stored in the first user-visible storage capacity according to the first release command.
  • the SSD erases the data stored in the first user-visible storage capacity according to the release command, and may determine the time to start the erasing operation based on the specific situation of the SSD. For example, the erasing operation can be started immediately after receiving the release command, or the erasing operation can be started after a period of time after receiving the release command.
  • the storage device receives the second release command sent by the access device; the second release command is used to release the second user-visible storage capacity from the user-visible storage capacity. Command; wherein, the first The sum of a user-visible storage capacity and the second user-visible storage capacity is not greater than the storage capacity provided by the failed component;
  • the storage device erases the data stored in the second user-visible storage capacity according to the second release command.
  • the above operation of releasing the logical block address of the SSD can use different commands according to the different protocols supported by the SSD.
  • the controller 101 may use an unmap command to release the corresponding logical block address of the SSD.
  • the controller 101 may use a deallocate command to release the corresponding logical block address of the SSD.
  • the controller 101 can also use a private command to release the corresponding logical block address of the SSD.
  • the SSD erases the data in the user-visible storage capacity that needs to be released according to the unmap command or the deallocate command.
  • the SSD may mark the released logical block address as unavailable or no longer allocated, and may also make the released logical block address invisible to the controller 101 .
  • the controller 101 may also record the state of the corresponding CK, and no longer use the CK corresponding to the released user-visible storage capacity.
  • the controller releases the user-visible storage capacity that is not larger than the storage capacity provided by the first particle, thereby reducing or not occupying redundant space without affecting the use of the entire SSD. Therefore, the write amplification of SSD is reduced and the storage performance is improved.
  • the controller 101 of the storage array may organize storage resources in a manner not based on CK, which is not limited in this embodiment of the present invention.
  • the logical address in this embodiment of the present invention may also be KV in a key-value (Key-Value, KV) disk, or a log in a log (log) disk, or the like.
  • the SSD may support an open channel SSD. In an SSD supporting an open channel, the external storage capacity provided by the SSD may be provided in the form of a continuous storage space, rather than a logical block address. , or physical space. Another implementation, a single SSD can provide multiple user-visible storage capacities.
  • the embodiments of the present invention can also be applied to a Shingled Magnetic Recording (SMR) disk.
  • SMR Shingled Magnetic Recording
  • the embodiments of the present invention may also be applied to distributed storage, server or terminal device storage, and the like. This embodiment of the present invention does not limit this. Therefore, the controllers, servers, terminal devices of the storage array, and servers in the distributed storage devices that implement the functions of the above embodiments are all referred to as access devices.
  • an embodiment of the present invention provides an access device for implementing the above-mentioned corresponding method of the embodiment of the present invention, as shown in FIG. 11 , including: a receiving unit 1101 and a sending unit 1102 .
  • the receiving unit 1101 is configured to receive fault information of the first storage device; wherein the fault information is used to indicate that a component of the first storage device is faulty; the first storage device includes multiple components, and the A plurality of components are used to provide the user-visible storage capacity of the first storage device and the storage capacity of the redundant space; the access device is used to access the user-visible storage capacity; the sending unit 1102 is used to send the first storage device The storage device sends a first release command; the first release command is used to release the first user-visible storage capacity from the user-visible storage capacity; wherein the first user-visible storage capacity is not greater than that provided by the failed component storage.
  • the obtaining unit 1101 is further configured to obtain information of the storage capacity of the component in which the fault occurs.
  • the obtaining unit 1101 is specifically configured to obtain the storage capacity of the failed component from the failure information.
  • the first release command is specifically used to release the first user-visible storage capacity from the end position of the logical block address of the first storage device.
  • the first release command is specifically used to release the logical block address of the first visible storage capacity from the logical block addresses mapped from the first storage device to the physical address of the failed component.
  • the sending unit 1102 is further configured to send a second release command to the first storage device; the second release command is used to release the second user-visible storage capacity from the user-visible storage capacity; wherein , the sum of the first user-visible storage capacity and the second user-visible storage capacity is not greater than the storage capacity provided by the failed component.
  • first release command and the second release command are specifically an unmap (unmap) command or a deallocate (deallocate) command.
  • the access device further includes a copying unit configured to copy the data in the logical block address corresponding to the first user-visible storage capacity to the second storage device.
  • the access device shown in FIG. 11 For one hardware implementation of the access device shown in FIG. 11 , reference may be made to the structure of a controller, a server, a terminal device, and a server in a distributed storage device of a storage array, which is not repeated in this embodiment of the present invention.
  • the access device shown in FIG. 11 in the embodiment of the present invention may also be implemented by software or implemented by hardware and software jointly.
  • an embodiment of the present invention also provides a storage device.
  • the storage device includes multiple components 1201 , and the multiple components provide the storage device with storage of user-visible storage capacity and redundant space. capacity; an access device is used to access the user-visible storage capacity; the storage device further includes:
  • a sending unit 1202 configured to send fault information to the access device; the fault information is used to indicate that a component of the storage device is faulty;
  • a receiving unit 1203, configured to receive a first release command sent by the access device; the first release command is a command for releasing the first user-visible storage capacity from the user-visible storage capacity; wherein the first The user-visible storage capacity is not greater than the storage capacity provided by the failed component;
  • a release unit 1204, configured to erase the data stored in the first user-visible storage capacity according to the first release command.
  • the sending unit 1202 is further configured to send the storage capacity information provided by the failed component to the access device.
  • the first release command is specifically used to release the first user-visible storage capacity from the end position of the logical block address of the storage device.
  • the first release command is specifically used to release the logical block address of the first visible storage capacity from the logical block addresses mapped by the storage device to the physical address of the failed component.
  • the receiving unit 1203 is further configured to receive the second release command sent by the access device; the second release command is used to release the second user-visible storage capacity from the user-visible storage capacity. Command; Wherein, the sum of the first user-visible storage capacity and the second user-visible storage capacity is not greater than the storage capacity provided by the failed component;
  • the erasing unit 1204 is further configured to erase the data stored in the second user-visible storage capacity according to the second release command.
  • the access device shown in FIG. 12 in the embodiment of the present invention may also be implemented by software or implemented by hardware and software jointly.
  • An embodiment of the present invention further provides a storage system including an access device and a storage device.
  • a storage system including an access device and a storage device.
  • Computer program instructions are stored in the computer-readable storage medium. When the computer program instructions are executed on the controller 101 shown in FIG. 1 or the server shown in FIG. 4 , the method in the embodiment of the present invention is executed.
  • Embodiments of the present invention provide a computer program product containing computer program instructions, and when the computer program instructions run on the controller 101 shown in FIG. 1 or the server shown in FIG. 4 , the methods in the embodiments of the present invention are executed.
  • Each unit of the data recovery apparatus provided by the embodiment of the present invention may be implemented by a processor, may also be implemented jointly by a processor and a memory, or may be implemented by software.
  • Embodiments of the present invention provide a computer program product containing computer program instructions, and when the computer program instructions are executed in a computer, the method executed by the access device in the embodiments of the present invention is executed.
  • An embodiment of the present invention also provides a non-volatile readable storage medium, where the non-volatile readable storage medium contains computer program instructions, when the computer program instructions are run in a computer, the access in the embodiments of the present invention is performed. The method performed by the device.
  • the storage system provided in the embodiment of the present invention may also be a storage system that supports files, or a storage system that supports objects, or a storage system that supports both blocks and files, or a storage system that supports both blocks and objects, or a storage system that supports both blocks and objects at the same time.
  • the disclosed systems, devices and methods may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium.
  • the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several computer program instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, etc., which can store computer program instructions. medium.

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Abstract

本发明实施例提供一种存储设备管理方法，所述方法包括：访问设备获得第一存储设备的故障信息；所述故障信息用于指示所述第一存储设备的组件发生故障；向所述第一存储设备发送第一释放命令以从存储设备的用户可见存储容量中释放第一用户可见存储容量；所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。

Description

存储设备管理方法、设备及存储系统 技术领域
本发明涉及信息技术领域，特别涉及一种存储设备管理方法、设备及存储系统。
背景技术
独立硬盘冗余阵列(Redundant Array of Independent Disks，RAID)技术是存储系统中广泛使用的保证数据可靠性的技术，当存储系统发生硬盘损坏时，通过未损坏硬盘上数据和校验数据，可以重新计算出损坏硬盘上的数据，这样一个过程被称为RAID的重构。硬盘中数据丢失重构，在提高数据可靠性的同时，也面临硬盘性能的问题。
发明内容
第一方面，本发明实施例提供了一种存储设备管理方法，所述方法包括：
访问设备获得第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；
所述访问设备根据所述故障信息向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
本发明实施例在存储设备组件发生故障，释放一定容量的用户可见存储容量，减少存储设备对冗余空间的存储容量的占用，从而减少存储设备写放大，提高了写性能。
可选的，所述组件为一个通道上连接的多个颗粒封装，或者为一个或多个颗粒封装，或者为一个或多个颗粒，或者为一个或多个闪存片。
进一步的，所述方法还包括：所述访问设备获取所述发生故障的组件的存储容量的信息，从而确定因为组件发生故障导致的存储容量损失。
进一步的，所述访问设备获取所述发生故障的组件的存储容量，具体包括：
所述访问设备从所述故障信息中获取所述发生故障的组件的存储容量。存储设备可以在故障信息中携带发生故障的组件的存储容量。
进一步的，所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量，具体包括：所述第一释放命令用于从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量，从而保证逻辑块地址的连续性。
进一步的，所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量，具体包括：
所述第一释放命令用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
进一步的，所述方法还包括：
所述访问设备向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用 户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。本发明实施例可以分多次释放相应的用户可见存储容量。例如，基于存储设备的使用率，按比例释放。
进一步的，所述第一释放命令和所述第二释放命令具体为去映射(unmap)命令或去分配(deallocate)命令。
进一步的，所述方法还包括：
所述访问设备将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备，从而保证第一存储设备中被释放的逻辑块地址中的数据不丢失。
进一步的，所述第一存储设备为固态硬盘SSD。
第二方面，本发明实施例提供了一种存储设备管理方法，所述存储设备包含多个组件，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储容量；所述方法包括：
所述存储设备向所述访问设备发送故障信息；所述故障信息用于指示所述存储设备的组件发生故障；
所述存储设备接收所述访问设备发送的第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量的命令；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量；
所述存储设备根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
本发明实施例，存储设备在组件发生故障后，释放掉不大于发生故障的存储组件所能够提供的存储容量的用户可见存储容量，在不影响整个存储设备的使用的同时，减少或不占用冗余空间的存储容量，从而减少了SSD的写放大，提高了存储性能。
进一步的，所述方法还包括：
所述存储设备向所述访问设备发送所述发生故障的组件提供的存储容量信息。
进一步的，所述第一释放命令具体用于从所述存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
进一步的，所述第一释放命令具体用于从所述存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
进一步的，所述方法还包括：
所述存储设备接收所述访问设备发送的第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量的命令；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
所述存储设备根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
进一步的，所述第一释放命令和所述第二释放命令为去映射(unmap)命令或去分配(deallocate)命令。
进一步的，所述存储设备为固态硬盘SSD。
第三方面，本发明实施例提供了一种访问设备，包括各单元，用于实现第一方面各种方案。
第四方面，本发明实施例提供了一种存储设备，包含多个组件，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储 容量；所述存储设备还包括多个单元用于实现第二方面各种方案。
第五方面，本发明实施例提供了一种访问设备，包括处理器和接口，处理器和接口通信，处理器用于实现第一方面各种方案。
第六方面，本发明实施例提供了一种存储设备，所述存储设备包含存储设备控制器和多个组件，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储容量；所述存储设备控制器用于实现第二方面各种方案。
第七方面，本发明实施例提供了一种存储系统，所述存储系统包含第五方面的访问设备和第六方面的存储设备。
第八方面，本发明实施例提供了一种计算机程序产品，所述计算机程序产品包含计算机程序指令，当计算机执行所述计算机程序指令以执行第一方面各种方案。
第九方面，本发明实施例提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序指令，当计算机执行所述计算机程序指令以执行第一方面各种方案。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍。
图1为本发明实施例的存储系统示意图；
图2为本发明实施例的存储阵列控制器结构示意图；
图3为本发明实施例分布式存储系统示意图；
图4为本发明实施例分布式存储系统中的服务器结构示意图；
图5为本发明实施例SSD的结构示意图；
图6为本发明实施例中SSD基本存储单元示意图；
图7为本发明实施例存储系统中块组关系示意图；
图8为本发明实施例访问设备操作流程示意图
图9为本发明实施例释放用户可见存储空间示意图；
图10为本发明实施例存储设备操作流程示意图；
图11为本发明实施例访问设备结构示意图；
图12为本发明实施例存储设备结构示意图。
具体实施方式
下面对本申请实施例中的技术方案进行更详细地描述。
如图1所示，本发明实施例中的存储系统，可以为存储阵列(如
Figure PCTCN2021142390-appb-000001
的
Figure PCTCN2021142390-appb-000002
18000系列，
Figure PCTCN2021142390-appb-000003
V6系列)。存储阵列包括控制器101和多块SSD。其中，SSD可以位于存储阵列的硬盘框。如图2所示，控制器101包含中央处理单元(Central Processing Unit,CPU)201、存储器202和接口203，存储器202中存储计算机程序指令，CPU201执行存储器202中的计算机程序指令对存储系统进行管理及数据访问操作、数据恢复等操作。另外，为节省CPU201的计算资原，现场可编程门阵列(Field Programmable Gate Array,FPGA)或其他硬件也可以用于执行本发明实施例中CPU201全部操作，或者，FPGA或其他硬件与CPU201分别用于执行本发明实施例CPU201的部分操作。为方便描述，本发明实施例统一用 处理器来指CPU201和存储器202的组合，以及上述各种实现，处理器与接口203通信。接口203可以为网络接口卡(Networking Interface Card,NIC)、主机总线适配器(Host Bus Adaptor,HBA)。
进一步的，本发明实施例的存储系统还可以为分布式存储系统(如
Figure PCTCN2021142390-appb-000004
的
Figure PCTCN2021142390-appb-000005
系列)等。以
Figure PCTCN2021142390-appb-000006
的
Figure PCTCN2021142390-appb-000007
100D系列。示例性的如图3所示，分布式块存储系统包括多台服务器，如服务器1、服务器2、服务器3、服务器4、服务器5和服务器6，服务器间通过InfiniBand或以太网络等互相通信。在实际应用当中，分布式块存储系统中服务器的数量可以根据实际需求增加，本发明实施例对此不作限定。
分布式块存储系统的服务器中包含如图4所示的结构。如图4所示，分布式块存储系统中的每台服务器包含中央处理单元(Central Processing Unit,CPU)401、内存402、接口403、SSD1、SSD 2和SSD 3，内存402中存储计算机程序指令，CPU401执行内存402中的程序指令执行相应的操作。接口403可以为硬件接口，如网络接口卡(Network Interface Card,NIC)或主机总线适配器(Host Bus Adaptor,HBA)等，也可以为程序接口模块等。另外，为节省CPU401的计算资原，现场可编程门阵列(Field Programmable Gate Array,FPGA)或其他硬件也可以代替CPU401执行上述相应的操作，或者，FPGA或其他硬件与CPU401共同执行上述相应的操作。为方便描述，本发明实施例将CPU401与内存402、FPGA及其他替代CPU401的硬件或FPGA及其他替代CPU401的硬件与CPU401的组合统称为处理器。接口403可以为网络接口卡(Networking Interface Card,NIC)、主机总线适配器(Host Bus Adaptor,HBA)。在分布式存储系统中，负责分布式存储系统中存储管理的服务器称为控制器。具体的，控制器用于执行存储空间管理，数据访问等。
SSD以页(page)为读写单元，以块(block)为擦除单元，SSD可以实现通道(channel)、颗粒封装(package)、闪存芯片、颗粒(die)、闪存片(plane)等多个级别的数据访问的并行。SSD以多通道方式组织闪存颗粒封装，每个通道上可连接多个颗粒封装，多颗粒封装之间共享传输通道，但可独立执行指令。SSD具体结构可参考图5，包含接口501、SSD控制器502、channel503、封装504。其中，一个封装504中包含多个闪存芯片，每一个闪存芯片包含一个或多个颗粒，每一个颗粒包含多个闪存片，每一个闪存片包含多个块，每一个块包含多个页。其中，接口501可以是支持串行连接小型计算机系统接口(Serial Attached Small Computer System Interface,SAS)协议、非易失性内存快速(Non-Volatile Memory Express,NVMe)协议或者快速外设互联(Peripheral Component Interconnect Express,PCIe)协议的接口等。
SSD中的NAND Flash的基本存储单元是浮栅晶体管，一个浮栅晶体管对应一个cell。浮栅晶体管的结构如图6的所示，从上至下包含控制栅极、氧化层、浮栅层(Floating Gate)、隧道氧化层，最下面是源极、漏极和衬底。其中，在源极(Source)和漏极(Drain)之间电流单向传导的晶体管上形成存储电子的浮栅层，浮栅层上下被绝缘层包围，从而使电子易进难出，存储在里面的电子不会因为掉电而消失，所以闪存是非易失性存储器。浮栅晶体管通过对浮栅层进行充放电子来实现对浮栅晶体管写入和擦除数据。在写入数据的时候，在控制栅极施加正电压，使电子通过绝缘层进入浮栅层，即写入数据的过程是充电过程。擦除数据时，在衬底加正电压，使电子从浮栅层的绝缘层穿过，从而把电子从浮栅层中释放。数据是以0和1二进制进行保存的，根据浮栅层中有没有电子两种状态，可以表示数据的0和1，这样就可以进行数据的存储。一般把有电子的状态记为0，没有电子的状态记为1。由于同一 个物理块的浮栅晶体管位于同一个衬底，因此，在将电子从浮栅层中释放时，会将同一个物理块上所有电子释放，即在擦除数据时，会擦除整个物理块的数据。
目前根据单元cell能够存储的比特(bit)数量的不同，可以分为以下类型的单元：单级单元(Single Level Cell,SLC)、多级单元(Multi-Level Cell,MLC)、三级单元(Triple Level Cell,TLC)和四级单元(Quad Level Cell,QLC)。Cell能够存储的bit数量也称为cell的容量。其中，SLC，每个单元能够存储1bit数据，即一个浮栅晶体管通过将浮栅层中有无1个电子2种状态表示存储的1bit数据。因此，SLC对应的浮栅晶体管可以存储的1bit数据可以用0和1来表示。MLC，每个单元能够存储2bit数据，即一个浮栅晶体管通过将浮栅层中的是否有最多2个电子的4种状态表示2bit数据。因此，MLC对应的浮栅晶体管可以存储的2bit数据可以用00、01、10、11来表示。TLC，每个单元能够存储3bit数据，即一个浮栅晶体管通过将浮栅层中的是否有最多3个电子的8种状态表示3bit数据。因此，TLC对应的浮栅晶体管可以存储的3bit数据可以用000、001、010、011、100、101、110、111来表示。QLC，每个单元能够存储4bit数据，即一个浮栅晶体管通过将浮栅层中的是否有最多4个电子的16种状态表示4bit数据。
由于SSD只能以物理块为单位进行擦除。如果物理块包含存储有效数据的物理页，SSD在擦除物理块中的数据之前，需要将有效数据读出并且写入到其他块的物理页中。这一过程称为垃圾回收。只有物理页处于空闲状态，才不需要进行擦除操作。为此，SSD提供了冗余空间(Over Provisioning,OP)。冗余空间保证大量物理块块处于空白和保留状态，有助于保持SSD性能的一致性，减少写放大。OP是指SSD提供的超出用户可见存储容量的NAND Flash的存储容量，例如：SSD的用户可见存储容量是400G，但是NAND Flash总存储容量是512G，那么多出的112G的存储容量就是冗余空间的存储容量。冗余空间在NAND Flash总存储容量的比例越大，那么SSD的写放大越小。
SSD用户可见存储容量，对用户是以逻辑地址的形式提供的。本发明实施例中的用户是指访问SSD的设备，即访问设备。具体，可以是服务器或存储阵列中的控制器。在另一种实现中，还可以是主机或终端设备。在SSD中，逻辑地址为逻辑块地址(Logical Block Address,LBA)，SSD使用闪存转换层(Flash Translation Layer,FTL)将LBA映射到SSD的物理块上的物理页(page)，并且建立LBA到物理页地址的映射关系。
根据SSD的结构，SSD包含提供存储容量的组件，例如，通道(channel)、颗粒封装(package)、闪存芯片、颗粒(die)和闪存片(plane)等。因此，SSD的存储容量是由组件提供的。SSD发生故障，通常只是SSD的一个或几个组件发生故障，而不是整个SSD发生故障。也就是说当SSD内部发生故障时，潜在的受该故障影响的存储容量并不是整个SSD的总存储容量，而是SSD的一部分存储容量，本发明实施例称受该故障影响的存储容量所在的组件为故障组件。根据SSD的结构，故障组件可以是一个通道上连接的多个颗粒封装，或者一个或多个颗粒，或者一个或多个闪存片等。本发明实施例中，SSD发生故障，需要对该故障组件存储的数据进行恢复。实际应用场景中，SSD的组件发生故障可以是该故障组件整体发生故障，也可以是该故障组件中的一部分发生故障。例如，以组件为颗粒为例，一个颗粒发生故障，可能整个颗粒都不能够访问，由整个颗粒提供的存储容量都不可以使用。另一种情况，一个颗粒发生故障，可能是颗粒中部分存储容量不可以使用。SSD监控每一个组件的状态。具体实现， SSD控制器使用后台巡检等方式监控组件的状态。SSD还可以根据每一个组件内的物理块Block的擦除次数确定组件的状态，即根据磨损程度确定组件的状态。
本发明实施例中，控制器101可以获取SSD的组件的状态。具体实现可以是存储系统查询SSD的组件的状态，或者由SSD主动上报组件的状态。以存储系统为存储阵列为例，存储系统可以获取SSD的组件的状态，具体为存储阵列的控制器获取SSD的组件的状态。
进一步的，控制器101可以获取SSD的逻辑块地址与组件提供的物理地址之间的映射关系，即SSD的逻辑块地址与SSD的组件上的物理页的映射关系。具体实现，可以由控制器101通过查询获取，或由SSD主动上报。另一种实现，SSD的逻辑块地址与SSD的组件上的物理地址的映射，可以包含多级映射。例如，SSD的逻辑块地址与虚拟逻辑块组的映射，虚拟逻辑块组与物理块或物理页的映射；或者SSD的逻辑块地址与物理块组的映射，物理块组与物理页的映射。
控制器101可以获取SSD的组件信息，例如SSD的组件信息可以包含的组件类型、组件数据以及每一个组件提供的存储容量中一种或几种。
本发明实施例以1个SSD包含140个颗粒，SSD的用户可见存储容量为32TB为例进行描述。SSD的用户可见存储容量为32TB，即可提供32TB的逻辑地址，或称为可提供32TB的地址空间。SSD的冗余空间的存储容量为3TB。其中，每一个颗粒提供556GB的存储容量，则140个颗粒中的128个颗粒提供32TB的用户可见存储容量，140个颗粒中的另外12个颗粒提供3TB的冗余空间的存储容量。结合图1所示的存储阵列，SSD提供32TB的逻辑块地址，即32TB的CK容量。其中，SSD提供固定长度的块(Chunk，CK)组成资源池,控制器101根据使用冗余算法，例如纠删码(Erasure Coding,EC)算法或独立磁盘冗余阵列(Redundancy array of independent disks,RAID)算法，将分别来不同的SSD的Chunk组成块组(Chunk Group,CKG)，将CKG划分成固定粒度的块(Extent)，为存储阵列对外部提供的逻辑单元号(Logical Unit Number,LUN)提供存储资源。如图7所示，CKG由CK1、CK2和CK3组成。CK1由SSD1的第1颗粒提供，CK2由SSD2的第2颗粒提供，CK3由SSD3的第3颗粒提供。CK1对应SSD1的LBA1，CK2对应SSD2的LBA2，CK3对应SSD3的LBA3。其中，LBA1映射到SSD1的第1颗粒提供的物理地址；LBA2映射到SSD2的第2颗粒提供的物理地址，LBA3映射到SSD3的第3颗粒提供的物理地址。本发明实施例中以SSD1、SSD2和SSD3均包含140个颗粒，用户可见存储容量均为32TB，冗余空间均为3TB为例进行说明。本发明实施例中，从多个SSD选择CK组成CKG时，可以考虑根据基于负载选择SSD的CK。负载可以为输入输出(InputOutput,IO)的类型，IO冷热度等。本发明实施例也可以基于均衡算法选择SSD的CK。
本发明实施例中，例如，SSD1的第1颗粒发生故障，SSD1向控制器101发送故障信息，用于指示颗粒发生故障。SSD1向控制器101发送故障信息，可以是SSD1主动向控制器101发送故障信息；也可以是基于控制器101的查询向控制器101发送故障信息，从控制器101侧，统称为控制器101接收SSD1的故障信息。具体的，该故障信息可以包含发生故障的颗粒的数量，或者该故障信息包含发生故障的颗粒的标识，或者故障信息可以包含发生故障的颗粒提供的存储容量等。该故障信息可以包含受第1颗粒影响的SSD1的逻辑块地址范围。结合本发明实施例前面的描述，控制器101可以获取SSD的组件信息。因此，在故障信息仅仅包含发生故障的颗粒的数量或者该故障信息发生故障的颗粒的标识的情况下，控制器101仍然可以获得发生故障的组件提供的存储容量信息。一种实现，SSD1向控制器101发送组件 故障信息，控制器101根据SSD1的逻辑块地址与组件的对应关系确定受影响的逻辑块地址范围，即受故障影响的CK。控制器101根据受故障影响的CK所在CKG恢复出受故障影响的CK存储的数据，从而不需要对SSD1存储的所有数据进行恢复，减少了需要恢复的数据的数量。控制器101可以将恢复出来的数据写入到SSD1，SSD1将恢复出来的数据存储到SSD1的冗余空间中的物理页，从而保持用来存储恢复出来的数据的CK仍然是原来的CK，SSD1只需要更新逻辑块地址到物理页地址的映射。
另外一种实现，SSD1可以基于SSD内部的数据恢复机制，恢复映射到第1颗粒的逻辑块地址中的数据，在不需要对SSD1存储的所有数据进行恢复，减少了需要恢复的数据的数量的同时，也减少了控制器101进行数据恢复时的计算资源消耗。例如，SSD1可以基于SSD1内部的独立磁盘冗余阵列(Redundancy array of independent disks,RAID)机制恢复映射到第1颗粒的逻辑块地址中的数据。SSD1可以将恢复出来的数据存储到SSD1的冗余空间中的物理页，从而保持用来存储恢复出来的数据的CK仍然是原来的CK，SSD1只需要更新逻辑块地址到物理页地址的映射。因此，SSD1可以不需要向控制器101发送用于具体指示第1颗粒发生故障的故障信息。例如，故障信息可以只包含发生故障的组件影响的存储容量的信息。如256GB的存储容量损失，即第1颗粒所提供的存储容量。
基于上述两种数据恢复方式恢复出来的数据还可以存储到其他SSD中，控制器101选择新的CK用于存储恢复出来的数据。
上述几种实现方式，由于SSD1的第1颗粒发生故障，第1颗粒不能够提供相应的存储容量。在SSD1提供的逻辑块地址不变的情况下，需要SSD1的冗余空间来提供第1颗粒故障损失的存储容量，从而消耗了冗余空间的存储容量。
如前面所描述，冗余空间的存储容量的减少，会增加写放大，影响SSD的写性能。为此，本发明实施例，提供了如图8所示的方案，包括：
801：访问设备接收第一存储设备的故障信息；
其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；
802：所述访问设备根据所述故障信息向所述第一存储设备发送第一释放命令；
所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
进一步的，所述访问设备向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。
所述访问设备将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备。
本发明实施例在存储设备组件发生故障，释放一定容量的用户可见存储容量，减少存储设备对冗余空间的存储容量的占用，从而减少存储设备写放大，提高了写性能。
仍以前面的SSD为例进行说明，在第1颗粒发生故障，可以释放SSD1的部分用户可见存储容量。在基于FTL机制的SSD中，用户可见存储容量以逻辑块地址形式体现，释放用户可见存储容量，即释放相应逻辑块地址。FTL可以们于SSD中，也可以位于访问设备。部分 用户可见存储容量可以小于第1颗粒的存储容量。释放的部分用户可见存储容量可以是第1颗粒提供的全部存储容量。释放SSD的用户可见存储容量，具体实现为减少SSD提供的逻辑块地址。其中，一种实现方式可以将映射到第1颗粒的物理页的至少一部分逻辑块地址释放。因为逻辑块地址为线性连续的地址，上述这种逻辑块地址释放方式可能会造成SSD提供的逻辑块地址的不连续。另一种实现方式，从SSD的逻辑块地址结束位置开始释放相应用户可见存储容量的逻辑块地址。因为逻辑块地址是线性递交的逻辑地址，因此逻辑块地址结束位置开始释放，即从最大逻辑块地址向最小逻辑块地址方向释放相应用户可见存储容量的逻辑块地址。例如，映射到第1颗粒的物理页的逻辑块地址的容量为256GB，SSD的用户体现的容量的逻辑块地址范围0-(32TB-1)，如图9所示，则从32TB-1位置开始释放256GB的逻辑块地址容量，释放掉的逻辑块地址用
Figure PCTCN2021142390-appb-000008
表示，则SSD的逻辑块地址范围变为0-(31.75TB-1)，从而保证逻辑块地址的连续性。当需要释放的逻辑块地址对应的物理页存储有数据时，在释放该逻辑块地址前，将逻辑块地址对应的物理页中的数据迁移到其他SSD。被释放掉的逻辑块地址不再使用，即控制器101不再向释放掉的逻辑块地址对应的CK写入数据，SSD也不再建立释放掉的逻辑块地址到物理页的映射。控制器101可以将释放掉的逻辑块地址对应的CK标识为不可用。
另一种实现，控制器101可以分多次释放用户可见存储容量。例如，每次可以释放64GB用户可见存储容量，或者按照SSD的使用率多次释放用户可见存储容量，但释放的用户可以存储容量总和不超过256GB，即不超过发生故障的第1颗粒提供的存储容量。
相应的，本发明实施例提供了一种存储设备，用于执行如图10所示的方案，包括：
1001：所述存储设备向所述访问设备发送故障信息；
其中，所述故障信息用于指示所述存储设备的组件发生故障；
1002：所述存储设备接收所述访问设备发送的第一释放命令；
其中，所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量的命令；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量；
1003：所述存储设备根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
SSD根据释放命令擦除所述第一用户可见存储容量中存储的数据可以基于SSD具体情况决定启动擦除操作的时间。例如，可以在接收到释放命令立即启动擦除操作，也可以在接收释放命令一段时间后再启动擦除操作。
进一步的，所述存储设备接收所述访问设备发送的第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量的命令；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
所述存储设备根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
结合前面实施你描述，上述释放SSD的逻辑块地址的操作，根据SSD所支持协议不同，可以使用不同的命令。例如，针对支持SAS协议的SSD，控制器101可以使用去映射(unmap) 命令释放掉SSD相应的逻辑块地址。针对支持NVMe协议的SSD，控制器101可以使用去分配(deallocate)命令释放掉SSD相应的逻辑块地址。控制器101也可以使用私有命令释放掉SSD相应的逻辑块地址。SSD根据unmap命令或deallocate命令擦除上述需要释放的用户可见存储容量中的数据。即需要释放的逻辑块地址对应的物理页上的数据，解除需要释放掉的逻辑块地址与物理页之间的映射。SSD可以将释放掉的逻辑块地址标识为不可用，或者不再分配状态，还可以将释放掉的逻辑块地址对控制器101不可见。控制器101也可以记录相应CK的状态，不再使用释放掉的用户可见存储容量对应的CK。
本发明实施例，在第1颗粒发生故障后，控制器释放掉不大于第1颗粒提供的存储容量大小的用户可见存储容量，在不影响整个SSD的使用的同时，减少或不占用冗余空间的存储容量，从而减少了SSD的写放大，提高了存储性能。
本发明另一实施例中，存储阵列的控制器101可以不基于CK的方式组织存储资源，本发明实施例对此不作限制。本发明实施例中的逻辑地址还可以是键值(Key-Value,KV)盘中的KV，或者日志(log)盘的log等。本发明另一实施例中，SSD可以支持开放通道(open channel)的SSD，在支持开放通道的SSD中，SSD对外提供的存储容量可以基于连续存储空间的形式提供，而不是逻辑块地址的形式，或者是物理空间。另一种实现，一个SSD可以提供多个用户可见存储容量。本发明实施例还可以应用于叠瓦式磁记录(Shingled Magnetic Recording,SMR)盘。本发明实施例还可以应用于分布式存储、服务器或者终端设备存储等。本发明实施例对此不作限定。因此，将存储阵列的控制器、服务器、终端设备以及实现上述实施例功能的分布式存储设备中的服务器均称为访问设备。
相应的，本发明实施例提供了一种访问设备，用于实现本发明实施例上述相应的方法，如图11所示，包括：接收单元1101和发送单元1102。其中，接收单元1101，用于接收第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；发送单元1102，用于向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
进一步的，所述获取单元1101还用于获取所述发生故障的组件的存储容量的信息。
进一步的，所述获取单元1101具体用于从所述故障信息中获取所述发生故障的组件的存储容量。
进一步的，所述第一释放命令具体用于从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
进一步的，所述第一释放命令具体用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
进一步的，所述发送单元1102，还用于向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。
进一步的，所述第一释放命令和所述第二释放命令具体为去映射(unmap)命令或去分配(deallocate)命令。
进一步的，访问设备还包括复制单元，用于将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备。
图11所示的访问设备，其中一种硬件实现，可以参考存储阵列的控制器、服务器、终端设备以及分布式存储设备中的服务器的结构，本发明实施例在此不再赘述。另一种实现，本发明实施例图11所示的访问设备还可以由软件实现或者由硬件与软件共同实现。
相应的，本发明实施例还提供了一种存储设备，如图12所示，存储设备包含多个组件1201，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储容量；所述存储设备还包括：
发送单元1202，用于向所述访问设备发送故障信息；所述故障信息用于指示所述存储设备的组件发生故障；
接收单元1203，用于接收所述访问设备发送的第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量的命令；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量；
释放单元1204，用于根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
进一步的，所述发送单元1202，还用于向所述访问设备发送所述发生故障的组件提供的存储容量信息。
进一步的，所述第一释放命令具体用于从所述存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
进一步的，所述第一释放命令具体用于从所述存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
进一步的，所述接收单元1203，还用于接收所述访问设备发送的第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量的命令；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
所述擦除单元1204，还用于根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
图12所示的存储设备，其中一种硬件实现，可以参考前述实施例中的SSD、SMR盘等的结构，本发明实施例在此不再赘述。另一种实现，本发明实施例图12所示的访问设备还可以由软件实现或者由硬件与软件共同实现。
本发明实施例还提供了一种包含访问设备和存储设备的存储系统，具体实现可以参考本发明前面实施例的描述，在此不再赘述。
该计算机可读存储介质中存储有计算机程序指令，当该计算机程序指令在图1所示的控制器101或者图4所示的服务器上运行时，执行本发明实施例中的方法。
本发明实施例提供了一种包含计算机程序指令的计算机程序产品，当该计算机程序指令在图1所示的控制器101或者图4所示的服务器运行时，执行本发明实施例中的方法。
本发明实施例提供的数据恢复装置的各单元可以由处理器实现，也可以由处理器与存储器共同实现，也可以由软件实现。
本发明实施例提供了一种包含计算机程序指令的计算机程序产品，当该计算机程序指令 在计算机中运行时，执行本发明实施例中的访问设备执行的方法。
本发明实施例还提供了一种非易失性可读存储介质，非易失性可读存储介质包含计算机程序指令，当该计算机程序指令在计算机中运行时，执行本发明实施例中的访问设备执行的方法。
本发明实施例中提供的存储系统还可以是支持文件的存储系统，或者支持对象的存储系统，或者为同时支持块和文件的存储系统，或者为同时支持块和对象的存储系统，或者为同时支持文件和对象的存储系统，或者为同时支持块、文件和对象的存储系统。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本发明所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干计算机程序指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机存取存储器(random access memory，RAM)、磁碟或者光盘等各种可以存储计算机程序指令的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (57)

  1. 一种存储设备管理方法，其特征在于，所述方法包括：
    访问设备接收第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；
    所述访问设备根据所述故障信息向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
  2. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    所述访问设备获取所述发生故障的组件的存储容量的信息。
  3. 根据权利要求2所述的方法，其特征在于，所述访问设备获取所述发生故障的组件的存储容量，具体包括：
    所述访问设备从所述故障信息中获取所述发生故障的组件的存储容量。
  4. 根据权利要求1所述的方法，其特征在于，所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量，具体包括：
    所述第一释放命令用于从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  5. 根据权利要求1所述的方法，其特征在于，所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量，具体包括：
    所述第一释放命令用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  6. 根据权利要求1-5任一所述的方法，其特征在于，所述方法还包括：
    所述访问设备向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。
  7. 根据权利要求6所述的方法，其特征在于，所述第一释放命令和所述第二释放命令具体为去映射(unmap)命令或去分配(deallocate)命令。
  8. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    所述访问设备将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备。
  9. 根据权利要求1-8任一所述的方法，其特征在于，所述第一存储设备为固态硬盘SSD。
  10. 一种存储设备管理方法，其特征在于，所述存储设备包含多个组件，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储容量；所述方法包括：
    所述存储设备向所述访问设备发送故障信息；所述故障信息用于指示所述存储设备的组件发生故障；
    所述存储设备接收所述访问设备发送的第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量的命令；其中，所述第一用户可见存储容量不 大于发生故障的组件提供的存储容量；
    所述存储设备根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
  11. 根据权利要求10所述的方法，其特征在于，所述方法还包括：
    所述存储设备向所述访问设备发送所述发生故障的组件提供的存储容量信息。
  12. 根据权利要求10所述的方法，其特征在于，所述第一释放命令具体用于从所述存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  13. 根据权利要求10所述的方法，其特征在于，所述第一释放命令具体用于从所述存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  14. 根据权利要求10-13任一所述的方法，其特征在于，所述方法还包括：
    所述存储设备接收所述访问设备发送的第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量的命令；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
    所述存储设备根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
  15. 根据权利要求14所述的方法，其特征在于，所述第一释放命令和所述第二释放命令为去映射(unmap)命令或去分配(deallocate)命令。
  16. 根据权利要求10-15任一所述的方法，其特征在于，所述存储设备为固态硬盘SSD。
  17. 一种访问设备，其特征在于，包括：
    接收单元，用于接收第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；
    发送单元，用于根据所述故障信息向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
  18. 根据权利要求17所述的访问设备，其特征在于，所述获取单元还用于：
    获取所述发生故障的组件的存储容量的信息。
  19. 根据权利要求18所述的访问设备，其特征在于，所述获取单元具体用于从所述故障信息中获取所述发生故障的组件的存储容量。
  20. 根据权利要求17所述的访问设备，其特征在于，所述第一释放命令具体用于从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  21. 根据权利要求17所述的访问设备，其特征在于，所述第一释放命令具体用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  22. 根据权利要求17-21任一所述的访问设备，其特征在于，所述发送单元，还用于向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。
  23. 根据权利要求22所述的访问设备，其特征在于，所述第一释放命令和所述第二释放 命令具体为去映射(unmap)命令或去分配(deallocate)命令。
  24. 根据权利要求17所述的访问设备，其特征在于，还包括复制单元，用于将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备。
  25. 一种存储设备，其特征在于，所述存储设备包含多个组件，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储容量；所述存储设备还包括：
    发送单元，用于向所述访问设备发送故障信息；所述故障信息用于指示所述存储设备的组件发生故障；
    接收单元，用于接收所述访问设备发送的第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量的命令；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量；
    释放单元，用于根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
  26. 根据权利要求25所述的存储设备，其特征在于，所述发送单元，还用于向所述访问设备发送所述发生故障的组件提供的存储容量信息。
  27. 根据权利要求25所述的存储设备，其特征在于，所述第一释放命令具体用于从所述存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  28. 根据权利要求25所述的存储设备，其特征在于，所述第一释放命令具体用于从所述存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  29. 根据权利要求25-28任一所述的存储设备，其特征在于，
    所述接收单元，还用于接收所述访问设备发送的第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量的命令；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
    所述擦除单元，还用于根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
  30. 根据权利要求25-29任一所述的存储设备，其特征在于，所述第一释放命令和所述第二释放命令为去映射(unmap)命令或去分配(deallocate)命令。
  31. 一种访问设备，其特征在于，包括：接口和处理器，所述接口与所述处理器通信；其中，所述处理器用于：
    接收第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；
    根据所述故障信息向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
  32. 根据权利要求31所述的访问设备，其特征在于，所述处理器还用于：
    获取所述发生故障的组件的存储容量的信息。
  33. 根据权利要求32所述的访问设备，其特征在于，所述处理器具体用于从所述故障信息中获取所述发生故障的组件的存储容量。
  34. 根据权利要求31所述的访问设备，其特征在于，所述第一释放命令用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  35. 根据权利要求31所述的访问设备，其特征在于，所述第一释放命令用于从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  36. 根据权利要求31-35任一所述的访问设备，其特征在于，所述处理器还用于向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。
  37. 根据权利要求36所述的访问设备，其特征在于，所述第一释放命令和所述第二释放命令具体为去映射(unmap)命令或去分配(deallocate)命令。
  38. 根据权利要求31所述的访问设备，其特征在于，所述处理器具体还用于将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备。
  39. 一种存储设备，其特征在于，所述存储设备包含存储设备控制器和多个组件，所述多个组件为所述存储设备提供用户可见存储容量和冗余空间的存储容量；访问设备用于访问所述用户可见存储容量；所述存储设备控制器用于：
    向所述访问设备发送故障信息；所述故障信息用于指示所述存储设备的组件发生故障；
    接收所述访问设备发送的第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量的命令；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量；
    释放单元，用于根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
  40. 根据权利要求39所述的存储设备，其特征在于，所述存储设备控制器，还用于向所述访问设备发送所述发生故障的组件提供的存储容量信息。
  41. 根据权利要求39所述的存储设备，其特征在于，所述第一释放命令具体用于从所述存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  42. 根据权利要求39所述的存储设备，其特征在于，所述第一释放命令具体用于从所述存储设备映射到所述发生故障的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  43. 根据权利要求39-42任一所述的存储设备，其特征在于，所述存储设备控制器，还用于：
    接收所述访问设备发送的第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量的命令；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
    根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
  44. 根据权利要求43所述的存储设备，其特征在于，所述第一释放命令和所述第二释放命令为去映射(unmap)命令或去分配(deallocate)命令。
  45. 一种存储系统，其特征在于，所述存储系统包含访问设备和第一存储设备；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；其中，
    所述访问设备用于：
    访问设备接收第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；
    根据所述故障信息向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量；
    所述存储设备用于：
    向所述访问设备发送所述故障信息；
    接收所述第一释放命令；
    根据所述第一释放命令擦除所述第一用户可见存储容量中存储的数据。
  46. 根据权利要求45所述的存储系统，其特征在于，所述访问设备还用于获取所述发生故障的组件的存储容量的信息。
  47. 根据权利要求45所述的存储系统，其特征在于，所述访问设备用于从所述故障信息中获取所述发生故障的组件的存储容量。
  48. 根据权利要求45所述的存储系统，其特征在于，所述第一释放命令用于从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  49. 根据权利要求45所述的存储系统，其特征在于，所述第一释放命令用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  50. 根据权利要求45-49所述的存储系统，其特征在于，
    所述访问设备还用于向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量；
    所述第一存储设备还用于：
    接收所述第二释放命令；
    根据所述第二释放命令擦除所述第二用户可见存储容量中存储的数据。
  51. 根据权利要求45-50所述的存储系统，其特征在于，所述访问设备还用于将所述第一用户可见存储容量对应的逻辑块地址中的数据复制到第二存储设备。
  52. 一种计算机程序产品，其特征在于，所述计算机程序产品包含计算机程序指令，当计算机执行所述计算机程序指令以执行下列操作：
    接收第一存储设备的故障信息；其中，所述故障信息用于指示所述第一存储设备的组件发生故障；所述第一存储设备包含多个组件，所述多个组件用于提供所述第一存储设备的用户可见存储容量和冗余空间的存储容量；所述访问设备用于访问所述用户可见存储容量；
    根据所述故障信息向所述第一存储设备发送第一释放命令；所述第一释放命令用于从所述用户可见存储容量中释放第一用户可见存储容量；其中，所述第一用户可见存储容量不大于发生故障的组件提供的存储容量。
  53. 根据权利要求52所述的计算机程序产品，其特征在于，当所述计算机执行所述计算机程序指令还用于获取所述发生故障的组件的存储容量的信息。
  54. 根据权利要求52所述的计算机程序产品，其特征在于，所述第一释放命令具体用于 从所述第一存储设备的逻辑块地址的结束位置开始释放所述第一用户可见存储容量。
  55. 根据权利要求52所述的计算机程序产品，其特征在于，所述第一释放命令具体用于从所述第一存储设备映射到所述发生故障的组件的物理地址的逻辑块地址中释放第一可见存储容量的逻辑块地址。
  56. 根据权利要求52-55任一所述的计算机程序产品，其特征在于，所述计算机执行所述计算机程序指令还用于向所述第一存储设备发送第二释放命令；所述第二释放命令用于从所述用户可见存储容量中释放第二用户可见存储容量；其中，所述第一用户可见存储容量和所述第二用户可见存储容量之和不大于发生故障的组件提供的存储容量。
  57. 根据权利要求56所述的计算机程序产品，其特征在于，所述第一释放命令和所述第二释放命令具体为去映射(unmap)命令或去分配(deallocate)命令。
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160070482A1 (en) * 2014-09-08 2016-03-10 Pure Storage, Inc. Adjusting storage capacity in a computing system
CN107003938A (zh) * 2014-09-02 2017-08-01 桑迪士克科技有限责任公司 触发用于减小多存储设备存储系统中的存储设备的声明容量的过程

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107003938A (zh) * 2014-09-02 2017-08-01 桑迪士克科技有限责任公司 触发用于减小多存储设备存储系统中的存储设备的声明容量的过程
US20160070482A1 (en) * 2014-09-08 2016-03-10 Pure Storage, Inc. Adjusting storage capacity in a computing system

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