WO2022134721A1 - 5g fast cell search method and apparatus based on downlink synchronization and soft bit combination - Google Patents

5g fast cell search method and apparatus based on downlink synchronization and soft bit combination Download PDF

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Publication number
WO2022134721A1
WO2022134721A1 PCT/CN2021/121707 CN2021121707W WO2022134721A1 WO 2022134721 A1 WO2022134721 A1 WO 2022134721A1 CN 2021121707 W CN2021121707 W CN 2021121707W WO 2022134721 A1 WO2022134721 A1 WO 2022134721A1
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domain data
data
synchronization signal
frequency
soft
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PCT/CN2021/121707
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French (fr)
Chinese (zh)
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刘鹏军
常越
田炜
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浪潮软件科技有限公司
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Publication of WO2022134721A1 publication Critical patent/WO2022134721A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
    • H04J11/0069—Cell search, i.e. determining cell identity [cell-ID]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
    • H04J11/0023—Interference mitigation or co-ordination
    • H04J11/005—Interference mitigation or co-ordination of intercell interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
    • H04J2011/0096—Network synchronisation

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  • the present invention relates to the technical field of 5G physical layer, and in particular, to a cell search method and device for 5G fast downlink synchronization and soft bit combining.
  • the configuration of 5G wireless system parameters is an important parameter that affects system performance and system indicators.
  • the Physical Broadcast Channel (PBCH) and SSB (SS/PBCH block) in the 5G system carry synchronization information and system information for terminal access. , including the Primary Synchronization Signal (PSS), the Secondary Synchronization Signal (SSS), and the Master Information Block (MIB).
  • PSS Primary Synchronization Signal
  • SSS Secondary Synchronization Signal
  • MIB Master Information Block
  • the flexible time-frequency domain configuration of 5G SSB is suitable for applications in more vertical industries, but because the 5G frequency band is higher than Long Term Evolution (LTE), network coverage and inter-cell interference problems follow.
  • LTE Long Term Evolution
  • the cell search process of the terminal mainly includes three parts: primary synchronization signal search, secondary synchronization signal search and physical broadcast channel detection.
  • the terminal can obtain the most basic information required to access the 5G cell by demodulating the signal transmitted on the PBCH, including the transmission position of MIB and Remaining Minimum System Information (RMSI).
  • the terminal obtains the physical cell ID (Physical Cell ID, PCI), frequency synchronization and downlink time synchronization (including radio frame timing, time slot timing and symbol timing) of the cell through cell search.
  • the present invention provides a cell search method and device for 5G fast downlink synchronization and soft bit combining, which can improve the signal-to-noise ratio of PBCH channels in the scenario of long-distance coverage and large interference.
  • the present invention provides a 5G fast downlink synchronization and soft bit combining cell search method, comprising the following steps:
  • the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
  • the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails
  • the second polar code decoding is performed after combining the same soft bits.
  • the first position of the time domain data of the preset time length after frequency shifting and the The first serial number corresponding to the first position specifically includes the following steps:
  • the historical frame header is a valid value, obtain the relative position of the maximum peak value of the primary synchronization signal that was successfully synchronized last time in the time domain data of the preset time length according to the frame header information of the historical frame header;
  • Low-pass filtering and sliding correlation operation are performed on the time-domain data of the preset time length after frequency shifting in the form of time-domain data of two symbol lengths adjacent to the maximum peak relative position of the primary synchronization signal, to obtain the The first position and the corresponding first sequence number; wherein, the first position is the position of the maximum correlation value of the primary synchronization signal in the time domain data of the preset time length.
  • the relative position of the maximum peak value of the primary synchronization signal for the time domain data of the preset time length after frequency shifting is adjacent to two symbols
  • Low-pass filtering and sliding correlation operation are performed by means of time-domain data of the length to obtain the first position and the corresponding first sequence number, which specifically includes the following steps:
  • Low-pass filtering is performed on the time domain data of the preset time length after frequency shifting with the length data of two adjacent symbols at the relative position of the maximum peak value of the main synchronization signal, and traversing the local sequence of the main synchronization signal and the adjacent two symbols. Perform a sliding correlation operation on the filtered time domain data of the time domain data of the symbol length to obtain the sliding correlation value of the main synchronization signal;
  • the maximum value search is performed on the sliding correlation value of the primary synchronization signal to obtain the sliding correlation maximum value of the primary synchronization signal and its second position in the time domain data of two adjacent symbol lengths. According to the second position and the adjacent The position of the time domain data of two symbol lengths in the time domain data of the preset time length is to obtain the first position and the corresponding first sequence number.
  • the first position of the time domain data of the preset time length after frequency shifting and the The first serial number corresponding to the first position further includes the following steps:
  • the maximum value search is performed on the sliding correlation value of the primary synchronization signal to obtain the first position and the corresponding first sequence number.
  • the frequency domain data of the secondary synchronization signal is obtained according to the first position, and a sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the secondary synchronization
  • the sliding maximum correlation value of the frequency domain data of the signal and the corresponding second sequence number, and based on the first sequence number and the second sequence number, the physical cell identifier is obtained, which specifically includes the following steps:
  • the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, which specifically includes the following steps:
  • a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the first decoding data is descrambled once to obtain the first descrambling data, and de-interleaving the first descrambled data to extract main information block information;
  • Detect the soft merging flag bit if the soft merging flag bit is 1, start the soft merging process, traverse the descrambling sequence to descramble the LLRs, accumulate the descrambled LLRs into the corresponding LLRbuffer, and perform operations on the merged corresponding LLRbuffer.
  • the polar code decoding for the second time if the polar code decoding for the second time is successful, a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the second decoding data is performed. One descrambling is performed to obtain the second descrambled data, and the second descrambled data is deinterleaved to extract the main information block information.
  • the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, further comprising the following steps:
  • the soft combining flag bit is set to 1, and the rate matching data is stored in LLRData1.
  • the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, further comprising the following steps:
  • the second polar code decoding succeeds and fails, continue to traverse the descrambling sequence once until all the decoding is performed with the complete descrambling sequence and the polar code.
  • the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, further comprising the following steps:
  • the soft combining flag is 0, the synchronization is exited and the main information block information code stream is reported to the media intervention control layer and the synchronization history frame header is updated.
  • the present invention also provides a 5G fast downlink synchronization and soft bit combining cell search device, including:
  • a frequency-shifting module for acquiring time-domain data and storing it in a buffer with a preset time length, performing frequency-shifting processing on the time-domain data, and moving the data to near zero frequency;
  • a first acquisition module configured to acquire, based on the validity of the historical frame header, the first position of the time domain data of the preset time length after frequency shifting and the first sequence number corresponding to the first position;
  • the second acquisition module acquires the frequency domain data of the secondary synchronization signal according to the first position, and performs a sliding correlation operation on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding first two serial numbers, and based on the first serial number and the second serial number, a physical cell identity is obtained;
  • a detection module configured to detect the physical broadcast channel according to the physical cell identifier to obtain main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and the first polar code After the code decoding fails, the same soft bits are combined for the second polar code decoding.
  • the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, when the processor executes the program, the 5G fast downlink as described in any of the above is implemented. Synchronization and soft bits combine steps of a cell search method.
  • the present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, realizes the 5G fast downlink synchronization and soft-bit combining cell search method described in any of the above. step.
  • the present invention also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of any of the above-mentioned 5G fast downlink synchronization and soft-bit combining cell search methods.
  • the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention can quickly complete the initial cell search based on the historical frame header position in the downlink synchronization process, and effectively improve the cell PSS peak search efficiency.
  • the initial synchronization 20ms time domain data PSS search requires sliding correlation calculation of 560 OFDM symbols, but the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention only needs to process 2 symbols to perform PSS search based on the historical frame header position.
  • FIG. 1 is a schematic flowchart of a 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention
  • FIG. 2 is a schematic diagram of obtaining PSS peak value based on historical frame header position sliding correlation operation in the 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention
  • FIG. 3 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR0 assuming the first 20ms received in the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention
  • FIG. 4 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR1 assuming the first 20ms received in the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention
  • FIG. 5 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR2 assuming that the first 20ms is received in the 5G fast downlink synchronization and soft-bit merging cell search method provided by the present invention
  • FIG. 6 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR3 assuming that the first 20ms is received in the 5G fast downlink synchronization and soft-bit merging cell search method provided by the present invention
  • FIG. 7 is a schematic structural diagram of an interpretable strategy game multi-player style evaluation device provided by the present invention.
  • FIG. 8 is a schematic structural diagram of an electronic device provided by the present invention.
  • the descrambling data appearing in the text is the soft bit information, and the soft bit is also called the maximum log-likelihood ratio Log-Likelihood Ratio , referred to as LLR.
  • the PSS search of the terminal determines the time-frequency domain resource positions of other symbols of all SSBs, and the PBCH detection determines the demodulation performance of the physical broadcast channel. Therefore, for the 5G weak coverage and high interference scenarios, the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention aim to improve and optimize from the above two points.
  • the 5G fast downlink synchronization and soft bit combining cell search method of the present invention is described below with reference to FIG. 1 , and the method includes the following steps:
  • the terminal receives the time domain data, and stores the time domain data in a double-rate synchronous dynamic random access memory (Double Data Rate, DDR) buffer of a digital signal processor (Digital Signal Process, DSP) in a pipelined form, each The buffer stores the time-domain data of a preset time length, and calls the Field-Programmable Gate Array (FPGA) or accelerator to perform frequency-shift processing on the time-domain data, and moves the time-domain data to the vicinity of zero frequency for the following Prepare for low pass filtering.
  • DDR double-rate synchronous dynamic random access memory
  • DSP Digital Signal Process
  • step S100 the preset time is 20ms, since the number of fast Fourier transform points of each symbol is fixed, and the number of symbols of 20ms data under each subcarrier interval is fixed, so the total number of sampling points of 20ms time domain data is fixed, marked as 20msTimeDataLen , the time domain data of the preset time length is TimeData20ms.
  • TimeData20ms of the preset time length read the time-domain data of the remaining three PBCH symbols of the SSB according to the first position PssMaxPos, perform fast Fourier transform processing, and obtain these three Frequency domain data PBCHFreData of PBCH symbols.
  • the 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention can quickly complete the initial cell search based on the historical frame header position in the downlink synchronization process, effectively improve the cell PSS peak search efficiency, compared with the initial synchronization in the traditional method.
  • 20ms time domain data PSS search requires sliding correlation calculation of 560 OFDM symbols, but the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention only needs to process 2 symbols to perform PSS search based on historical frame header positions; At the same time, in the process of detecting PBCH, after a decoding failure, the same soft bits are combined and then decoded again, thereby improving the signal-to-noise ratio of the PBCH channel in the scenario of long-distance coverage and large interference.
  • Step S200 specifically includes the following steps:
  • step S210 it is necessary to judge the validity of the historical frame header in the system.
  • the goal is to get the first position PssMaxPos.
  • the historical frame header will be saved in the shared memory of the system after the synchronization is successful, and it will be updated every time the synchronization is successful.
  • After the terminal is powered on it is initialized to an invalid value, that is, the first synchronization when the terminal is powered on cannot be synchronized based on the historical frame header.
  • the historical frame header information should also be changed to an invalid value.
  • step S210 the frame header information of 20ms will be saved after the system downlink synchronization is successful, that is, a 20ms frame header is calculated by the relative position of the maximum peak position of the successfully synchronized PSS at 20ms.
  • the maximum peak relative position HistoryPSSMaxPos of the PSS that has been successfully synchronized last time in the time domain data TimeData20ms of the preset time length can be calculated, and then start to search for the PSS peak.
  • Step S230 specifically includes:
  • the DSP performs low-pass filtering on the time domain data TimeData20ms of the preset time length after frequency shifting in the DDR buffer, and the time domain data of two symbol lengths adjacent to the relative position of the PSS maximum peak value, and traverses and uses three PSS local sequences and The filtered time domain data of the two symbol lengths are subjected to sliding correlation operation to obtain the sliding correlation value of the PSS, and the sliding correlation value of the PSS is stored in the corresponding memory CorBuffer1.
  • step S231 low-pass filtering is performed by taking HistoryPSSMaxPos as the center to read the length data of two symbols before and after, that is, the number of sampling points of two fast Fourier transform window lengths.
  • Step S200 further includes the following steps:
  • the DSP performs low-pass filtering on the time-domain data TimeData20ms of the preset time length after frequency shifting in the DDR buffer (one symbol is read at a time, that is, the number of sampling points with a fast Fourier transform window length), and traverses and uses
  • the three PSS local sequences perform sliding correlation operation with the filtered time domain data of the symbol to obtain the sliding correlation value of PSS, and access the sliding correlation value of PSS to the corresponding memory CorBuffer1 until the time domain data of preset time length TimeData20ms
  • Step S300 specifically includes the following steps:
  • TimeData20ms the first position PssMaxPos is shifted backward by an orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) symbol data, and the time domain data of the SSS symbol is taken out, and the fast Fourier transform is performed to obtain the SSS The frequency domain data of SSSFreData.
  • OFDM Orthogonal Frequency Division Multiplexing
  • the PCI can be calculated according to the protocol by using the second serial number NID1 and the first serial number NID2.
  • Step S400 specifically includes the following steps:
  • the demodulated data DeModuData traverses the descrambling sequence for secondary descrambling and the output is obtained.
  • the second descramble data DeScr2Data is performed, and the rate matching data DeRMData is obtained by performing rate matching on the second descramble data DeScr2Data.
  • a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the decoded data DePolarData is descrambled once, the descrambled data DeScr1Data is output, and DeScr1Data is performed De-interleave and extract MIB information.
  • the second Polar decoding is performed on the combined corresponding LLRbuffer. If the second Polar decoding is successful, deinterleaving is performed to extract MIB information.
  • Step S400 also includes the following steps:
  • step S480 specifically, the descrambling sequence is traversed once in the order of SCR1, SCR2, SCR3 and SCR4, and LLRData1 is descrambled and accumulated into LLRBuf1-LLRBuf4 respectively.
  • step S400 is repeated until the L SSBIdx of all SSB configurations are traversed.
  • step S400 For each time domain data TimeData20ms, the above step S400 is repeated until the decoding is successful, and the process ends.
  • the time domain data TimeData of each preset time length is 20ms
  • the preset initial synchronization time is 20ms period
  • the PBCH repetition period is 80ms
  • the corresponding merging times are also different. If the corresponding primary and secondary scrambling sequences are all four, the maximum number of combinations is six. If the CRC check is still unsuccessful after more than six times of combined decoding, it is considered that the wireless channel environment is too poor during this period, exceeding the PBCH detection limit of the terminal, and the combined decoding process ends.
  • Figure 3 to Figure 4 show the corresponding relationship and process of accumulating and merging the corresponding LLRs into the Buffer after one descrambling.
  • the bold boxes in each figure represent the MIB and the scrambling/descrambling sequence information in the combined buffer to be decoded, and the 4 kinds of scrambling/descrambling sequences correspond one-to-one.
  • the goal of combined decoding is to combine and decode all the time. If the decoding fails all the time, the combined decoding attempt process ends until the MIB and adding/descrambling information shown in the bold box appear in the combined soft-bit buffer. . In the four cases listed in FIG. 3 to FIG.
  • the maximum number of times of merging attempts is 6, and the same MIB information can be traversed through all the corresponding adding/descrambling sequences. If the CRC check is still unsuccessful after 6 times of combined decoding, it is considered that the wireless channel environment is too bad during this period, exceeding the PBCH detection limit of the terminal, and the combined decoding process ends.
  • the 5G fast downlink synchronization and soft bit combination cell search apparatus described below and the 5G fast downlink synchronization and soft bit combination cell search method described above can be referred to each other correspondingly.
  • the 5G fast downlink synchronization and soft bit combining cell search device of the present invention is described below with reference to FIG. 7 , and the device includes:
  • the frequency shift module 100 is used for the terminal to receive the time domain data, store the time domain data in the DDR buffer of the DSP in the form of pipeline, each buffer saves the time domain data of a preset time length, and calls the FPGA or accelerator to synchronize the time
  • the domain data is frequency-shifted, and the time-domain data is moved to the vicinity of the zero frequency to prepare for the subsequent low-pass filtering.
  • the preset time is 20ms. Since the number of fast Fourier transform points of each symbol is fixed, and the number of symbols of 20ms data under each subcarrier interval is fixed, the total number of sampling points of 20ms time domain data is fixed, and the mark is 20msTimeDataLen, and the time domain data of the preset time length is TimeData20ms.
  • the first obtaining module 200 is configured to obtain, based on the validity of the historical frame header, the first position of the time domain data TimeData20ms of the preset time length after the frequency shift and the first sequence number corresponding to the first position.
  • the second obtaining module 300 is configured to obtain the frequency domain data SSSFreData of the SSS according to the first position PssMaxPos, and perform a sliding correlation operation on the frequency domain data of the SSS to obtain the sliding maximum correlation value of the frequency domain data SSSFreData of the SSS and the corresponding first Two serial numbers, and based on the first serial number and the second serial number, the PCI is obtained.
  • TimeData20ms of the preset time length read the time-domain data of the remaining three PBCH symbols of the SSB according to the first position PssMaxPos, perform fast Fourier transform processing, and obtain these three Frequency domain data PBCHFreData of PBCH symbols.
  • the detection module 400 is configured to detect the PBCH according to the PCI to obtain MIB information, and the detection of the PBCH includes the first polar code decoding and merging the same soft bits after the first polar code decoding fails After the second polar code decoding.
  • the 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention can quickly complete the initial cell search based on the historical frame header position in the downlink synchronization process, effectively improve the cell PSS peak search efficiency, compared with the initial synchronization in the traditional method.
  • 20ms time domain data PSS search requires sliding correlation calculation of 560 OFDM symbols, but the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention only needs to process 2 symbols to perform PSS search based on historical frame header positions; At the same time, in the process of detecting PBCH, after a decoding failure, the same soft bits are combined and then decoded again, thereby improving the signal-to-noise ratio of the PBCH channel in the scenario of long-distance coverage and large interference.
  • the first acquisition module 200 specifically includes:
  • the first judging unit 210 judges whether the history frame header in the system is valid.
  • the validity of the historical frame header in the system needs to be judged.
  • the goal is to get the first position PssMaxPos.
  • the historical frame header will be saved in the shared memory of the system after the synchronization is successful, and it will be updated every time the synchronization is successful.
  • After the terminal is powered on it is initialized to an invalid value, that is, the first synchronization when the terminal is powered on cannot be synchronized based on the historical frame header.
  • the historical frame header information should also be changed to an invalid value.
  • the frame header information of 20ms will be saved after the system downlink synchronization is successful, that is, a 20ms frame header is calculated by the relative position of the maximum peak position of the successfully synchronized PSS at 20ms.
  • the first obtaining unit 220 is used to calculate the maximum peak relative position HistoryPSSMaxPos of the PSS that has been successfully synchronized last time in the time domain data TimeData20ms of the preset time length according to the frame header information of the historical frame header if the historical frame header is a valid value, and start searching for PSS peaks afterwards.
  • the second acquisition unit 230 is configured to perform low-pass filtering and sliding correlation operation on the time-domain data after the frequency shift with the maximum peak relative position of PSS HistoryPSSMaxPos and the time-domain data of two adjacent symbol lengths, to obtain the first position and the corresponding first serial number.
  • the second obtaining unit 230 specifically includes:
  • the first processing unit 231 is used for the DSP to perform low-pass filtering on the time-domain data TimeData20ms of the preset time length after frequency shifting in the DDR buffer with the time-domain data of two symbol lengths adjacent to the relative position of the PSS maximum peak value, and traverse and use the time domain data of two symbol lengths.
  • the three PSS local sequences and the filtered time domain data of the two symbol lengths perform sliding correlation operation to obtain the sliding correlation value of the PSS, and store the sliding correlation value of the PSS into the corresponding memory CorBuffer1.
  • low-pass filtering is performed by reading the length data of the two symbols before and after the HistoryPSSMaxPos as the center, that is, the number of sampling points with the length of two fast Fourier transform windows.
  • the second processing unit 232 is configured to perform maximum search on the sliding correlation value of the PSS in the memory CorBuffer1, and find the sliding correlation maximum value of the PSS and its second position TempPssPos in the time domain data of the two symbol lengths. , according to the second position TempPssPos and the position of these two symbols in the time domain data TimeData20ms of the preset time length, obtain the first position PssMaxPos in the time domain data TimeData20ms of the preset time length (this position is the PSS The position of the maximum correlation value in 20msTimeDataLen) and the corresponding first sequence number NID2.
  • the first obtaining module 200 further includes:
  • the third acquisition unit 240 is used for the DSP to perform low-frequency data TimeData20ms (one symbol is read at a time, that is, the number of sampling points with a fast Fourier transform window length) in the DDR buffer with a preset time length after frequency shifting. Pass filtering, and traverse the three PSS local sequences and the filtered time domain data of the symbol to perform sliding correlation operation to obtain the sliding correlation value of PSS, and access the sliding correlation value of PSS to the corresponding memory CorBuffer1 until the preset time.
  • the sliding correlation operation of all symbols in the length of time domain data TimeData20ms ends;
  • the fourth acquisition unit 250 is used to perform maximum search for the sliding correlation value of the PSS in the memory CorBuffer1, find the sliding correlation maximum value of the PSS and its first position PssMaxPos and the time domain data TimeData20ms of the preset time length. Corresponding serial number NID2.
  • the second obtaining module 300 specifically includes:
  • the third processing unit 310 is configured to offset backward one Orthogonal Frequency Division Multiplexing (OFDM) symbol data at the first position PssMaxPos in the time domain data TimeData20ms, and extract the time domain data of the SSS symbols, and perform The frequency domain data SSSFreData of SSS is obtained by fast Fourier transform processing.
  • OFDM Orthogonal Frequency Division Multiplexing
  • the fifth acquisition unit 320 is used to traverse the sliding correlation value of 336 kinds of SSS local sequences and the frequency domain data SSSFreData of the SSS, access the sliding correlation value of the frequency domain data SSSFreData of the SSS and find the maximum correlation value SssMaxValue of the SSS and the corresponding The second serial number NID1;
  • the sixth obtaining unit 330 is configured to calculate the PCI according to the protocol through the second serial number NID1 and the first serial number NID2.
  • the detection module 400 specifically includes:
  • the first detection unit 410 is configured to obtain frequency domain data of a demodulation reference signal (Demodulation Reference Signal, DMRS) according to the PCI, and traverse the SSBIdx to generate a DMRS local sequence.
  • a demodulation reference signal (Demodulation Reference Signal, DMRS) according to the PCI
  • the second detection unit 420 is configured to perform channel estimation on the DMRS frequency domain data and obtain an equalization factor, de-equalize the PBCH data through the equalization factor, and perform Quadrature Phase Shift Keying (QPSK) on the equalized output. Demodulate, and output the demodulated data DeModuData.
  • QPSK Quadrature Phase Shift Keying
  • the third detection unit 430 has four types of scrambling sequences used in the scrambling process, so the descrambling sequences also correspond to four types, which are SCR1, SCR2, SCR3 and SCR4 respectively.
  • the secondary descrambling output obtains the secondary descrambling data DeScr2Data, and the rate matching data DeScr2Data is descrambled for the secondary descrambling data DeScr2Data to obtain the rate matching data DeRMData.
  • the fourth detection unit 440 is used to perform the first polar code (Polar) decoding (first attempt) on the rate matching data DeRMData, the Polar decoding output is the decoded data DePolarData, and the cyclic redundancy check code (Cyclic Redundancy Check, CRC) check to determine whether the first Polar decoding is successful.
  • the first polar code Polar
  • the Polar decoding output is the decoded data DePolarData
  • the cyclic redundancy check code Cyclic Redundancy Check, CRC
  • the fifth detection unit 450 is configured to calculate a descrambling sequence according to the lower 3 bits and the lower 2 bits of the frame number if the first Polar decoding is successful, and descramble the decoded data DePolarData once, and output the descrambled data DeScr1Data, and de-interleave DeScr1Data to extract MIB information.
  • the detection module 400 also includes:
  • the seventh detection unit 410 is configured to set the soft combining flag LLRCombFlag to 1 if the first Polar decoding fails, and store the rate matching data DeRMData in LLRData1.
  • the eighth detection unit 480 is configured to continue traversing the descrambling sequence once if the second Polar decoding succeeds and fails until all the four descrambling sequences and Polar decoding are used up.
  • the eighth detection unit 480 specifically traverses the descrambling sequence once in the order of SCR1, SCR2, SCR3, and SCR4, and descrambles LLRData1 and accumulates them into LLRBuf1-LLRBuf4 respectively.
  • step S400 is repeated until the L SSBIdx of all SSB configurations are traversed.
  • the above-mentioned detection module 400 is repeated until the decoding is successful, and the process ends.
  • the time domain data TimeData of each preset time length is 20ms
  • the preset initial synchronization time is 20ms period
  • the PBCH repetition period is 80ms
  • the corresponding merging times are also different. If the corresponding primary and secondary scrambling sequences are all four, the maximum number of combinations is six. If the CRC check is still unsuccessful after more than six times of combined decoding, it is considered that the wireless channel environment is too poor during this period, exceeding the PBCH detection limit of the terminal, and the combined decoding process ends.
  • FIG. 8 illustrates a schematic diagram of the physical structure of an electronic device.
  • the electronic device may include: a processor (processor) 810, a communication interface (Communications Interface) 820, a memory (memory) 830 and a communication bus 840,
  • the processor 810 , the communication interface 820 , and the memory 830 communicate with each other through the communication bus 840 .
  • the processor 810 can invoke the logic instructions in the memory 830 to execute the 5G fast downlink synchronization and soft bit combining cell search method, and the method includes the following steps:
  • the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
  • the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails
  • the second polar code decoding is performed after combining the same soft bits.
  • the above-mentioned logic instructions in the memory 830 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.
  • the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.
  • the aforementioned storage medium includes: U disk, mobile hard disk, Read-Only Memory (ROM, Read-Only Memory), Random Access Memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program codes .
  • the present invention also provides a computer program product, the computer program product includes a computer program, the computer program can be stored on a non-transitory computer-readable storage medium, and when the computer program is executed by a processor, the computer can Execute the 5G fast downlink synchronization and soft bit combining cell search method provided by the above methods, and the method includes the following steps:
  • the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
  • the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails
  • the second polar code decoding is performed after combining the same soft bits.
  • the present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored, and the computer program is implemented by a processor to execute the 5G fast downlink synchronization and soft bit combining provided by the above methods.
  • Cell search method the method includes the following steps:
  • the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
  • the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails
  • the second polar code decoding is performed after combining the same soft bits.
  • the device embodiments described above are only illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in One place, or it can be distributed over multiple network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution in this embodiment. Those of ordinary skill in the art can understand and implement it without creative effort.
  • each embodiment can be implemented by means of software plus a necessary general hardware platform, and certainly can also be implemented by hardware.
  • the above-mentioned technical solutions can be embodied in the form of software products in essence or the parts that make contributions to the prior art, and the computer software products can be stored in computer-readable storage media, such as ROM/RAM, magnetic A disc, an optical disc, etc., includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the methods described in various embodiments or some parts of the embodiments.

Abstract

The present invention relates to the technical field of 5G physical layers, and provides a 5G fast cell search method and apparatus based on downlink synchronization and soft bit combination. The method comprises: acquiring time domain data and storing same in a buffer according to a preset time length, and performing frequency shifting processing on the time domain data, so as to shift the data to be close to zero frequency; on the basis of the validity of a historical frame header, acquiring a first position of the time domain data of the preset time length after frequency shifting, and a first sequence number that corresponds to the first position; acquiring frequency domain data of a secondary synchronization signal according to the first position, and performing a sliding correlation operation on the frequency domain data of the secondary synchronization signal, so as to obtain the maximum sliding correlation value of the frequency domain data of the secondary synchronization signal and a corresponding second sequence number, and obtaining a physical cell identifier on the basis of the first sequence number and the second sequence number; and detecting a physical broadcast channel according to the physical cell identifier, so as to obtain information of a master information block. By means of the present invention, the signal-to-noise ratio of a PBCH can be improved in a scenario with long-distance coverage and relatively large interference.

Description

一种5G快速下行同步及软比特合并小区搜索方法及装置A 5G fast downlink synchronization and soft bit combining cell search method and device
相关申请的交叉引用CROSS-REFERENCE TO RELATED APPLICATIONS
本申请要求于2020年12月24日提交的申请号为202011549452.7，发明名称为“一种5G快速下行同步及软比特合并小区搜索方法”的中国专利申请的优先权，其通过引用方式全部并入本文。This application claims the priority of the Chinese patent application with the application number 202011549452.7 filed on December 24, 2020, and the invention title is "a method for 5G fast downlink synchronization and soft-bit combining cell search", which is incorporated by reference in its entirety This article.
技术领域technical field
本发明涉及5G物理层技术领域，尤其涉及一种5G快速下行同步及软比特合并小区搜索方法及装置。The present invention relates to the technical field of 5G physical layer, and in particular, to a cell search method and device for 5G fast downlink synchronization and soft bit combining.
背景技术Background technique
5G无线系统参数的配置是影响系统性能和系统指标的重要参数，5G系统中的物理广播信道(Physical Broadcast Channel，PBCH)和SSB(SS/PBCH block)携带着终端接入的同步信息和系统信息，包括主同步信号(Primary Synchronization Signal，PSS)、辅同步信号(Secondary Synchronization Signal，SSS)以及主信息块(Master Information Block，MIB)。5G的SSB灵活时频域配置适应了更多垂直行业的应用，但由于5G频段相比长期演进(Long Term Evolution，LTE)更高，因此网络覆盖和小区间干扰问题随之而来。The configuration of 5G wireless system parameters is an important parameter that affects system performance and system indicators. The Physical Broadcast Channel (PBCH) and SSB (SS/PBCH block) in the 5G system carry synchronization information and system information for terminal access. , including the Primary Synchronization Signal (PSS), the Secondary Synchronization Signal (SSS), and the Master Information Block (MIB). The flexible time-frequency domain configuration of 5G SSB is suitable for applications in more vertical industries, but because the 5G frequency band is higher than Long Term Evolution (LTE), network coverage and inter-cell interference problems follow.
终端在开机后，首先进行小区选择，对于初始小区选择，需要执行小区搜索过程。终端的小区搜索过程主要包括主同步信号搜索，辅同步信号搜索和物理广播信道检测三部分。终端通过解调PBCH上传输的信号可以获得接入5G小区所需的最基本信息，包括MIB和剩余最小系统信息(Remaining Minimum System Information，RMSI)的传输位置。终端通过小区搜索获取到该小区的物理小区标识(Physical Cell ID，PCI)、频率同步和下行时间同步(包括无线帧定时、时隙定时和符号定时)。After the terminal is powered on, it first performs cell selection, and for initial cell selection, a cell search process needs to be performed. The cell search process of the terminal mainly includes three parts: primary synchronization signal search, secondary synchronization signal search and physical broadcast channel detection. The terminal can obtain the most basic information required to access the 5G cell by demodulating the signal transmitted on the PBCH, including the transmission position of MIB and Remaining Minimum System Information (RMSI). The terminal obtains the physical cell ID (Physical Cell ID, PCI), frequency synchronization and downlink time synchronization (including radio frame timing, time slot timing and symbol timing) of the cell through cell search.
针对覆盖距离较远或干扰较大场景，在5G环境下快速下行同步及软比特合并小区搜索方案是目前业界亟待解决的重要课题。For scenarios with long coverage distances or large interference, fast downlink synchronization and soft-bit merging cell search solutions in the 5G environment are important issues to be solved urgently in the industry.
发明内容SUMMARY OF THE INVENTION
本发明提供一种5G快速下行同步及软比特合并小区搜索方法及装置，实现在远距离覆盖及干扰较大的场景下提升了PBCH信道的信噪比。The present invention provides a cell search method and device for 5G fast downlink synchronization and soft bit combining, which can improve the signal-to-noise ratio of PBCH channels in the scenario of long-distance coverage and large interference.
本发明提供一种5G快速下行同步及软比特合并小区搜索方法，包括以下步骤：The present invention provides a 5G fast downlink synchronization and soft bit combining cell search method, comprising the following steps:
获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；Acquire time-domain data and save it in a buffer with a preset time length, perform frequency-shift processing on the time-domain data, and move the data to near zero frequency;
基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；Based on the validity of the historical frame header, obtain the first position of the time domain data of the preset time length after the frequency shift and the first sequence number corresponding to the first position;
根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识；According to the first position, the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。According to the physical cell identifier, the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails The second polar code decoding is performed after combining the same soft bits.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号，具体包括以下步骤：According to the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention, the first position of the time domain data of the preset time length after frequency shifting and the The first serial number corresponding to the first position specifically includes the following steps:
判断所述历史帧头是否有效；Determine whether the historical frame header is valid;
若所述历史帧头为有效值，根据所述历史帧头的帧头信息获取所述预设时间长度的所述时域数据中上次同步成功过的主同步信号的最大峰值相对位置；If the historical frame header is a valid value, obtain the relative position of the maximum peak value of the primary synchronization signal that was successfully synchronized last time in the time domain data of the preset time length according to the frame header information of the historical frame header;
对移频后所述预设时间长度的所述时域数据的以主同步信号的最大峰值相对位置相邻两个符号长度的时域数据的方式进行低通滤波以及滑动相关运算，得到所述第一位置以及对应的所述第一序列号；其中，所述第一位置为主同步信号的最大相关值在所述预设时间长度的所述时域数据中的位置。Low-pass filtering and sliding correlation operation are performed on the time-domain data of the preset time length after frequency shifting in the form of time-domain data of two symbol lengths adjacent to the maximum peak relative position of the primary synchronization signal, to obtain the The first position and the corresponding first sequence number; wherein, the first position is the position of the maximum correlation value of the primary synchronization signal in the time domain data of the preset time length.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述对移频后所述预设时间长度的所述时域数据的以主同步信号的最大峰 值相对位置相邻两个符号长度的时域数据的方式进行低通滤波以及滑动相关运算，得到所述第一位置以及对应的所述第一序列号，具体包括以下步骤：According to the 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention, the relative position of the maximum peak value of the primary synchronization signal for the time domain data of the preset time length after frequency shifting is adjacent to two symbols Low-pass filtering and sliding correlation operation are performed by means of time-domain data of the length to obtain the first position and the corresponding first sequence number, which specifically includes the following steps:
对移频后所述预设时间长度的所述时域数据以主同步信号的最大峰值相对位置相邻两个符号的长度数据进行低通滤波，并遍历主同步信号本地序列与相邻两个符长度的时域数据的滤波后时域数据进行滑动相关运算，得到主同步信号的滑动相关值；Low-pass filtering is performed on the time domain data of the preset time length after frequency shifting with the length data of two adjacent symbols at the relative position of the maximum peak value of the main synchronization signal, and traversing the local sequence of the main synchronization signal and the adjacent two symbols. Perform a sliding correlation operation on the filtered time domain data of the time domain data of the symbol length to obtain the sliding correlation value of the main synchronization signal;
对主同步信号的滑动相关值进行最大值查找，获取主同步信号的滑动相关最大值及其在相邻两个符号长度的时域数据中的第二位置，根据所述第二位置和相邻两个符号长度的时域数据在所述预设时间长度的所述时域数据中的位置，得到所述第一位置及对应的所述第一序列号。The maximum value search is performed on the sliding correlation value of the primary synchronization signal to obtain the sliding correlation maximum value of the primary synchronization signal and its second position in the time domain data of two adjacent symbol lengths. According to the second position and the adjacent The position of the time domain data of two symbol lengths in the time domain data of the preset time length is to obtain the first position and the corresponding first sequence number.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号，还包括以下步骤：According to the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention, the first position of the time domain data of the preset time length after frequency shifting and the The first serial number corresponding to the first position further includes the following steps:
若所述历史帧头是无效值，对移频后所述预设时间长度的所述时域数据以每次读取一个符号进行低通滤波以及滑动相关运算，得到主同步信号的滑动相关值；If the historical frame header is an invalid value, perform low-pass filtering and sliding correlation operation on the time domain data of the preset time length after frequency shifting by reading one symbol at a time to obtain the sliding correlation value of the main synchronization signal ;
对主同步信号的滑动相关值进行最大值查找，得到所述第一位置及对应的所述第一序列号。The maximum value search is performed on the sliding correlation value of the primary synchronization signal to obtain the first position and the corresponding first sequence number.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识，具体包括以下步骤：According to the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention, the frequency domain data of the secondary synchronization signal is obtained according to the first position, and a sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the secondary synchronization The sliding maximum correlation value of the frequency domain data of the signal and the corresponding second sequence number, and based on the first sequence number and the second sequence number, the physical cell identifier is obtained, which specifically includes the following steps:
将所述第一位置向后偏移一个正交频分复用技术符号数据，得到辅同步信号的时域数据，基于辅同步信号的时域数据，得到辅同步信号的频域数据；Offset the first position backward by an OFDM symbol data to obtain time domain data of the secondary synchronization signal, and obtain frequency domain data of the secondary synchronization signal based on the time domain data of the secondary synchronization signal;
遍历辅同步信号本地序列与辅同步信号的频域数据的滑动相关值，得到辅同步信号的频域数据的滑动相关值，并获取辅同步信号的最大相关值及对应的所述第二序列号；Traverse the sliding correlation value of the local sequence of the secondary synchronization signal and the frequency domain data of the secondary synchronization signal, obtain the sliding correlation value of the frequency domain data of the secondary synchronization signal, and obtain the maximum correlation value of the secondary synchronization signal and the corresponding second sequence number ;
根据所述第一序列号和所述第二序列号，得到物理小区标识。According to the first sequence number and the second sequence number, a physical cell identity is obtained.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，具体包括以下步骤：According to the 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention, the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, which specifically includes the following steps:
根据物理小区标识得到所述预设时间长度的所述时域数据的解调参考信号的频域数据，遍历SSBIdx生成解调参考信号本地序列；Obtain the frequency domain data of the demodulation reference signal of the time domain data of the preset time length according to the physical cell identifier, and traverse the SSBIdx to generate a local sequence of the demodulation reference signal;
对解调参考信号的频域数据进行信道估计得到均衡因子，基于所述均衡因子对物理广播信道解均衡输出，并在均衡输出后进行正交相移键控解调，得到解调数据。Perform channel estimation on the frequency domain data of the demodulation reference signal to obtain an equalization factor, de-equalize and output the physical broadcast channel based on the equalization factor, and perform quadrature phase shift keying demodulation after equalization output to obtain demodulated data.
对所述解调数据遍历解扰序列进行二次解扰输出得到二次解扰数据，并对所述二次解扰数据解速率匹配，得到速率匹配数据；performing secondary descrambling output on the demodulated data traversing the descrambling sequence to obtain secondary descrambling data, and performing rate matching on the secondary descrambling data to obtain rate matching data;
对速率匹配数据进行所述第一次极性码译码，得到所述第一译码数据；performing the first polar code decoding on the rate matching data to obtain the first decoding data;
若所述第一次极性码译码成功，则根据帧号的低3位和低2位计算一次解扰序列，并对第一译码数据进行一次解扰，得到第一解扰数据，并对所述第一解扰数据进行解交织，提取到主信息块信息；If the decoding of the polar code for the first time is successful, a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the first decoding data is descrambled once to obtain the first descrambling data, and de-interleaving the first descrambled data to extract main information block information;
检测软合并标志位，若软合并标志位为1，启动软合并流程，遍历解扰序列对LLR进行解扰，将解扰后的LLR累加到对应的LLRbuffer中，并对合并后的对应LLRbuffer进行所述第二次极性码译码，若所述第二次极性码译码成功，则根据帧号的低3位和低2位计算一次解扰序列，并对第二译码数据进行一次解扰，得到第二解扰数据，并对所述第二解扰数据进行解交织，提取到主信息块信息。Detect the soft merging flag bit, if the soft merging flag bit is 1, start the soft merging process, traverse the descrambling sequence to descramble the LLRs, accumulate the descrambled LLRs into the corresponding LLRbuffer, and perform operations on the merged corresponding LLRbuffer. The polar code decoding for the second time, if the polar code decoding for the second time is successful, a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the second decoding data is performed. One descrambling is performed to obtain the second descrambled data, and the second descrambled data is deinterleaved to extract the main information block information.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，还包括以下步骤：According to the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention, the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, further comprising the following steps:
若所述第一次极性码译码成功失败，则将软合并标志位置为1，并将速率匹配数据存到LLRData1中。If the first polar code decoding succeeds and fails, the soft combining flag bit is set to 1, and the rate matching data is stored in LLRData1.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，还包括以下步骤：According to the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention, the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, further comprising the following steps:
若所述第二次极性码译码成功失败，则继续遍历一次解扰序列直到全部用完全部解扰序列和极性码译码。If the second polar code decoding succeeds and fails, continue to traverse the descrambling sequence once until all the decoding is performed with the complete descrambling sequence and the polar code.
根据本发明提供的5G快速下行同步及软比特合并小区搜索方法，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，还包括以下步骤：According to the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention, the physical broadcast channel is detected according to the physical cell identifier to obtain the main information block information, further comprising the following steps:
若软合并标志位为0，退出同步并向媒体介入控制层上报主信息块信息码流并更新同步的历史帧头。If the soft combining flag is 0, the synchronization is exited and the main information block information code stream is reported to the media intervention control layer and the synchronization history frame header is updated.
本发明还提供一种5G快速下行同步及软比特合并小区搜索装置，包括：The present invention also provides a 5G fast downlink synchronization and soft bit combining cell search device, including:
移频模块，用于获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；a frequency-shifting module for acquiring time-domain data and storing it in a buffer with a preset time length, performing frequency-shifting processing on the time-domain data, and moving the data to near zero frequency;
第一获取模块，用于基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；a first acquisition module, configured to acquire, based on the validity of the historical frame header, the first position of the time domain data of the preset time length after frequency shifting and the first sequence number corresponding to the first position;
第二获取模块，根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识；The second acquisition module acquires the frequency domain data of the secondary synchronization signal according to the first position, and performs a sliding correlation operation on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding first two serial numbers, and based on the first serial number and the second serial number, a physical cell identity is obtained;
检测模块，用于根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。a detection module, configured to detect the physical broadcast channel according to the physical cell identifier to obtain main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and the first polar code After the code decoding fails, the same soft bits are combined for the second polar code decoding.
本发明还提供一种电子设备，包括存储器、处理器及存储在存储器上并可在处理器上运行的计算机程序，所述处理器执行所述程序时实现如上述任一种所述5G快速下行同步及软比特合并小区搜索方法的步骤。The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, when the processor executes the program, the 5G fast downlink as described in any of the above is implemented. Synchronization and soft bits combine steps of a cell search method.
本发明还提供一种非暂态计算机可读存储介质，其上存储有计算机程序，该计算机程序被处理器执行时实现如上述任一种所述5G快速下行同步及软比特合并小区搜索方法的步骤。The present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, realizes the 5G fast downlink synchronization and soft-bit combining cell search method described in any of the above. step.
本发明还提供一种计算机程序产品，包括计算机程序，所述计算机程序被处理器执行时实现如上述任一种所述5G快速下行同步及软比特合并小区搜索方法的步骤。The present invention also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of any of the above-mentioned 5G fast downlink synchronization and soft-bit combining cell search methods.
本发明提供的5G快速下行同步及软比特合并小区搜索方法及装置，能够在下行同步过程中基于历史帧头位置快速完成初始小区搜索，有效提升了小区PSS峰值搜索效率，相较于传统方法中初始同步20ms时域数据PSS搜索需要滑动相关计算560个OFDM符号，但本发明提供的5G快速下行同步及软比特合并小区搜索方法及装置基于历史帧头位置进行PSS搜索只需要处理2个符号即可；同时在检测PBCH过程中，一次译码失败后将相同软比特进行合并后再次译码，从而在远距离覆盖及干扰较大的场景下提升了PBCH信道的信噪比。The 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention can quickly complete the initial cell search based on the historical frame header position in the downlink synchronization process, and effectively improve the cell PSS peak search efficiency. Compared with the traditional method The initial synchronization 20ms time domain data PSS search requires sliding correlation calculation of 560 OFDM symbols, but the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention only needs to process 2 symbols to perform PSS search based on the historical frame header position. Yes; at the same time, in the process of detecting PBCH, after a decoding failure, the same soft bits are combined and then decoded again, thereby improving the signal-to-noise ratio of the PBCH channel in the scenario of long-distance coverage and large interference.
附图说明Description of drawings
为了更清楚地说明本发明或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。In order to explain the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are the For some embodiments of the invention, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.
图1是本发明提供的5G快速下行同步及软比特合并小区搜索方法的流程示意图；1 is a schematic flowchart of a 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention;
图2是为本发明提供的5G快速下行同步及软比特合并小区搜索方法中基于历史帧头位置滑动相关运算求出PSS峰值示意图；2 is a schematic diagram of obtaining PSS peak value based on historical frame header position sliding correlation operation in the 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention;
图3是为本发明提供的5G快速下行同步及软比特合并小区搜索方法中假设第1个20ms收到的MIB0和加扰序列SCR0的合并流程示意图；FIG. 3 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR0 assuming the first 20ms received in the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention;
图4是为本发明提供的5G快速下行同步及软比特合并小区搜索方法中假设第1个20ms收到的MIB0和加扰序列SCR1的合并流程示意图；FIG. 4 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR1 assuming the first 20ms received in the 5G fast downlink synchronization and soft-bit combining cell search method provided by the present invention;
图5是为本发明提供的5G快速下行同步及软比特合并小区搜索方法中假设第1个20ms收到的MIB0和加扰序列SCR2的合并流程示意图；FIG. 5 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR2 assuming that the first 20ms is received in the 5G fast downlink synchronization and soft-bit merging cell search method provided by the present invention;
图6是为本发明提供的5G快速下行同步及软比特合并小区搜索方法中假设第1个20ms收到的MIB0和加扰序列SCR3的合并流程示意图；FIG. 6 is a schematic diagram of a merged flow diagram of MIB0 and scrambling sequence SCR3 assuming that the first 20ms is received in the 5G fast downlink synchronization and soft-bit merging cell search method provided by the present invention;
图7是本发明提供的可解释的策略游戏多玩家风格评估装置的结构示意图；7 is a schematic structural diagram of an interpretable strategy game multi-player style evaluation device provided by the present invention;
图8是本发明提供的电子设备的结构示意图。FIG. 8 is a schematic structural diagram of an electronic device provided by the present invention.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚，下面将结合本发明中的附图，对本发明中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。In order to make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention. , not all examples. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
首先对本发明的5G快速下行同步及软比特合并小区搜索方法及装置中出现的名词进行解释，文中出现的解扰数据为软比特信息，而软比特也叫最大对数似然比Log-Likelihood Ratio，简称LLR。First, the terms appearing in the 5G fast downlink synchronization and soft bit merging cell search method and device of the present invention are explained. The descrambling data appearing in the text is the soft bit information, and the soft bit is also called the maximum log-likelihood ratio Log-Likelihood Ratio , referred to as LLR.
小区下同同步过程，终端的PSS搜索决定了所有SSB的其他符号时频域资源位置，PBCH检测决定了物理广播信道解调性能。因此针对5G弱覆盖高干扰场景，本发明提供的5G快速下行同步及软比特合并小区搜索方法及装置旨在从上面两点进行改进优化。In the co-synchronization process in the cell, the PSS search of the terminal determines the time-frequency domain resource positions of other symbols of all SSBs, and the PBCH detection determines the demodulation performance of the physical broadcast channel. Therefore, for the 5G weak coverage and high interference scenarios, the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention aim to improve and optimize from the above two points.
下面结合图1描述本发明的5G快速下行同步及软比特合并小区搜索方法，该方法包括以下步骤：The 5G fast downlink synchronization and soft bit combining cell search method of the present invention is described below with reference to FIG. 1 , and the method includes the following steps:
S100、终端收到时域数据，以流水形式将时域数据存入数字信号处理器(Digital Signal Process，DSP)的双倍速率同步动态随机存储器(Double Data Rate，DDR)缓冲器中，每个缓冲器保存预设时间长度的时域数据，调用现场可编程门阵列(Field-Programmable Gate Array，FPGA)或加速器对时域数据进行移频处理，将时域数据移到零频附近，为后面低通滤波做准备。S100. The terminal receives the time domain data, and stores the time domain data in a double-rate synchronous dynamic random access memory (Double Data Rate, DDR) buffer of a digital signal processor (Digital Signal Process, DSP) in a pipelined form, each The buffer stores the time-domain data of a preset time length, and calls the Field-Programmable Gate Array (FPGA) or accelerator to perform frequency-shift processing on the time-domain data, and moves the time-domain data to the vicinity of zero frequency for the following Prepare for low pass filtering.
在步骤S100中，预设时间为20ms，由于每个符号的快速傅里叶变换点数固定，每种子载波间隔下20ms数据的符号数固定，因此20ms时域数据总的采样点数固定，标记为20msTimeDataLen，预设时间长度的时域数据即TimeData20ms。In step S100, the preset time is 20ms, since the number of fast Fourier transform points of each symbol is fixed, and the number of symbols of 20ms data under each subcarrier interval is fixed, so the total number of sampling points of 20ms time domain data is fixed, marked as 20msTimeDataLen , the time domain data of the preset time length is TimeData20ms.
S200、基于历史帧头的有效性，获取移频后预设时间长度的时域数据TimeData20ms的第一位置及第一位置对应的第一序列号。S200. Based on the validity of the historical frame header, obtain a first position of the time domain data TimeData20ms of a preset time length after frequency shifting and a first sequence number corresponding to the first position.
S300、根据第一位置PssMaxPos，获取SSS的频域数据SSSFreData，并对SSS的频域数据进行滑动相关运算，得到SSS的频域数据SSSFreData的滑动最大相关值及对应的第二序列号，并基于第一序列号与第二序列 号，得到PCI。S300. Obtain the frequency domain data SSSFreData of the SSS according to the first position PssMaxPos, and perform a sliding correlation operation on the frequency domain data of the SSS to obtain the sliding maximum correlation value of the frequency domain data SSSFreData of the SSS and the corresponding second sequence number, and based on The first serial number and the second serial number, get PCI.
在本实施例中，在预设时间长度的时域数据TimeData20ms中，根据第一位置PssMaxPos读取该SSB的其余三个PBCH符号的时域数据，进行快速傅里叶变换处理，得到这三个PBCH符号的频域数据PBCHFreData。In this embodiment, in the time-domain data TimeData20ms of the preset time length, read the time-domain data of the remaining three PBCH symbols of the SSB according to the first position PssMaxPos, perform fast Fourier transform processing, and obtain these three Frequency domain data PBCHFreData of PBCH symbols.
S400、根据PCI，对PBCH进行检测，得到MIB信息，对PBCH进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。S400. According to the PCI, detect the PBCH to obtain MIB information, and the detection of the PBCH includes the first polar code decoding and the second polar code decoding after the failure of the first polar code decoding and combining the same soft bits. Subpolar code decoding.
本发明提供的5G快速下行同步及软比特合并小区搜索方法，能够在下行同步过程中基于历史帧头位置快速完成初始小区搜索，有效提升了小区PSS峰值搜索效率，相较于传统方法中初始同步20ms时域数据PSS搜索需要滑动相关计算560个OFDM符号，但本发明提供的5G快速下行同步及软比特合并小区搜索方法及装置基于历史帧头位置进行PSS搜索只需要处理2个符号即可；同时在检测PBCH过程中，一次译码失败后将相同软比特进行合并后再次译码，从而在远距离覆盖及干扰较大的场景下提升了PBCH信道的信噪比。The 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention can quickly complete the initial cell search based on the historical frame header position in the downlink synchronization process, effectively improve the cell PSS peak search efficiency, compared with the initial synchronization in the traditional method. 20ms time domain data PSS search requires sliding correlation calculation of 560 OFDM symbols, but the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention only needs to process 2 symbols to perform PSS search based on historical frame header positions; At the same time, in the process of detecting PBCH, after a decoding failure, the same soft bits are combined and then decoded again, thereby improving the signal-to-noise ratio of the PBCH channel in the scenario of long-distance coverage and large interference.
步骤S200具体包括以下步骤：Step S200 specifically includes the following steps:
S210、判断系统中历史帧头是否有效。S210. Determine whether the historical frame header in the system is valid.
步骤S210中，需要判断系统中历史帧头的有效性。目标是为了得到第一位置PssMaxPos。历史帧头会在同步成功之后保存在系统的共享内存中，每次同步成功都会更新。终端开机后初始化成无效值，即终端开机的第一次同步无法基于历史帧头同步。另外在使用基于历史帧头位置同步的方法失败一定次数(根据实际场景决定)后，该历史帧头信息也要改成无效值。In step S210, it is necessary to judge the validity of the historical frame header in the system. The goal is to get the first position PssMaxPos. The historical frame header will be saved in the shared memory of the system after the synchronization is successful, and it will be updated every time the synchronization is successful. After the terminal is powered on, it is initialized to an invalid value, that is, the first synchronization when the terminal is powered on cannot be synchronized based on the historical frame header. In addition, after the method based on the historical frame header position synchronization fails for a certain number of times (determined according to the actual scene), the historical frame header information should also be changed to an invalid value.
具体的，在步骤S210中，系统下行同步成功后会保存的20ms的帧头信息，即通过同步成功的PSS的最大峰值位置在20ms的相对位置，算出一个20ms的帧头。Specifically, in step S210, the frame header information of 20ms will be saved after the system downlink synchronization is successful, that is, a 20ms frame header is calculated by the relative position of the maximum peak position of the successfully synchronized PSS at 20ms.
S220、若历史帧头是有效值，根据历史帧头的帧头信息可以算出预设时间长度的时域数据TimeData20ms中上次同步成功过的PSS的最大峰值相对位置HistoryPSSMaxPos，并在之后开始搜索PSS峰值。S220. If the historical frame header is a valid value, according to the frame header information of the historical frame header, the maximum peak relative position HistoryPSSMaxPos of the PSS that has been successfully synchronized last time in the time domain data TimeData20ms of the preset time length can be calculated, and then start to search for the PSS peak.
S230、对移频后的时域数据以PSS的最大峰值相对位置 HistoryPSSMaxPos相邻两个符号长度的时域数据进行低通滤波以及滑动相关运算，得到第一位置以及对应的第一序列号。S230. Perform low-pass filtering and sliding correlation operation on the time-domain data after the frequency shift with the maximum peak relative position of the PSS, HistoryPSSMaxPos, of the time-domain data of two adjacent symbol lengths to obtain a first position and a corresponding first sequence number.
步骤S230具体包括：Step S230 specifically includes:
S231、DSP将DDR缓冲器中移频后预设时间长度的时域数据TimeData20ms以PSS最大峰值相对位置相邻两个符号长度的时域数据进行低通滤波，并遍历使用三种PSS本地序列与这两个符号长度的时域数据的滤波后时域数据进行滑动相关运算，得到PSS的滑动相关值，存取PSS的滑动相关值到相应的内存CorBuffer1中。S231. The DSP performs low-pass filtering on the time domain data TimeData20ms of the preset time length after frequency shifting in the DDR buffer, and the time domain data of two symbol lengths adjacent to the relative position of the PSS maximum peak value, and traverses and uses three PSS local sequences and The filtered time domain data of the two symbol lengths are subjected to sliding correlation operation to obtain the sliding correlation value of the PSS, and the sliding correlation value of the PSS is stored in the corresponding memory CorBuffer1.
具体的，步骤S231中，是以HistoryPSSMaxPos为中心读取前后两个符号的长度数据，即两个快速傅里叶变换窗长的采样点数进行低通滤波。Specifically, in step S231 , low-pass filtering is performed by taking HistoryPSSMaxPos as the center to read the length data of two symbols before and after, that is, the number of sampling points of two fast Fourier transform window lengths.
S232、对内存CorBuffer1中的PSS的滑动相关值进行最大值查找，找出PSS的滑动相关最大值及其在这两个符号长度的时域数据在中的第二位置TempPssPos，根据第二位置TempPssPos和这两个符号在预设时间长度的时域数据TimeData20ms中的位置，很快得到预设时间长度的时域数据TimeData20ms中的第一位置PssMaxPos(该位置即为PSS的最大相关值在20msTimeDataLen中的位置)及对应的第一序列号NID2。S232 , search for the maximum value of the sliding correlation value of the PSS in the memory CorBuffer1, find the maximum sliding correlation value of the PSS and its second position TempPssPos in the time domain data of the two symbol lengths, according to the second position TempPssPos And the position of these two symbols in the time domain data TimeData20ms of the preset time length, the first position PssMaxPos in the time domain data TimeData20ms of the preset time length is quickly obtained (this position is the maximum correlation value of the PSS in 20msTimeDataLen position) and the corresponding first serial number NID2.
步骤S200还包括以下步骤：Step S200 further includes the following steps:
S240、DSP将DDR缓冲器中的移频后预设时间长度的时域数据TimeData20ms(每次读取一个符号，即一个快速傅里叶变换窗长的采样点数)进行低通滤波，并遍历使用三种PSS本地序列与该符号的滤波后时域数据进行滑动相关运算，得到PSS的滑动相关值，存取PSS的滑动相关值到相应的内存CorBuffer1中，直到预设时间长度的时域数据TimeData20ms中所有符号的滑动相关运算结束；S240. The DSP performs low-pass filtering on the time-domain data TimeData20ms of the preset time length after frequency shifting in the DDR buffer (one symbol is read at a time, that is, the number of sampling points with a fast Fourier transform window length), and traverses and uses The three PSS local sequences perform sliding correlation operation with the filtered time domain data of the symbol to obtain the sliding correlation value of PSS, and access the sliding correlation value of PSS to the corresponding memory CorBuffer1 until the time domain data of preset time length TimeData20ms The sliding correlation operation of all symbols in , ends;
S250、对内存CorBuffer1中的PSS的滑动相关值进行最大值查找，找出PSS的滑动相关最大值及其在预设时间长度的时域数据TimeData20ms中的第一位置PssMaxPos及对应的序列号NID2。S250. Perform a maximum search for the sliding correlation value of the PSS in the memory CorBuffer1, and find the maximum sliding correlation value of the PSS and its first position PssMaxPos and the corresponding serial number NID2 in the time domain data TimeData20ms of the preset time length.
步骤S300具体包括以下步骤：Step S300 specifically includes the following steps:
S310、在时域数据TimeData20ms中第一位置PssMaxPos向后偏移一个正交频分复用技术(Orthogonal Frequency Division Multiplexing，OFDM)符号数据并取出SSS符号的时域数据，进行快速傅立叶变换处理得到SSS 的频域数据SSSFreData。S310. In the time domain data TimeData20ms, the first position PssMaxPos is shifted backward by an orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) symbol data, and the time domain data of the SSS symbol is taken out, and the fast Fourier transform is performed to obtain the SSS The frequency domain data of SSSFreData.
S320、遍历336种SSS本地序列与SSS的频域数据SSSFreData的滑动相关值，存取SSS的频域数据SSSFreData的滑动相关值并找出SSS的最大相关值SssMaxValue及对应的第二序列号NID1；S320, traverse the sliding correlation value of 336 kinds of SSS local sequences and the frequency domain data SSSFreData of the SSS, access the sliding correlation value of the frequency domain data SSSFreData of the SSS and find the maximum correlation value SssMaxValue of the SSS and the corresponding second sequence number NID1;
S330、可通过第二序列号NID1和第一序列号NID2，根据协议计算出PCI。S330, the PCI can be calculated according to the protocol by using the second serial number NID1 and the first serial number NID2.
步骤S400具体包括以下步骤：Step S400 specifically includes the following steps:
S410、根据PCI可得到解调参考信号(Demodulation Reference Signal，DMRS)的频域数据，遍历SSBIdx生成DMRS本地序列。S410. Obtain frequency domain data of a demodulation reference signal (Demodulation Reference Signal, DMRS) according to the PCI, and traverse the SSBIdx to generate a DMRS local sequence.
S420、对DMRS频域数据做信道估计并求出均衡因子，通过均衡因子对PBCH数据解均衡输出，对均衡输出做正交相移键控(Quadrature Phase Shift Keying，QPSK)解调，输出得到解调数据DeModuData。S420. Perform channel estimation on the DMRS frequency domain data and obtain an equalization factor, de-equalize the PBCH data through the equalization factor, and perform Quadrature Phase Shift Keying (QPSK) demodulation on the equalized output, and the output is obtained. Adjust the data DeModuData.
S430、加扰过程中使用的扰码序列共有4种，因此解扰序列也对应四种，分别为SCR1、SCR2、SCR3和SCR4，对解调数据DeModuData遍历解扰序列进行二次解扰输出得到二次解扰数据DeScr2Data，并对二次解扰数据DeScr2Data解速率匹配，得到速率匹配数据DeRMData。S430. There are four kinds of scrambling code sequences used in the scrambling process, so the descrambling sequences also correspond to four kinds, namely SCR1, SCR2, SCR3 and SCR4. The demodulated data DeModuData traverses the descrambling sequence for secondary descrambling and the output is obtained. The second descramble data DeScr2Data is performed, and the rate matching data DeRMData is obtained by performing rate matching on the second descramble data DeScr2Data.
S440、对速率匹配数据DeRMData进行第一次极性码(Polar)译码(首次尝试)，Polar译码输出为译码数据DePolarData，并进行循环冗余校验码(Cyclic Redundancy Check，CRC)校验，以判断第一次Polar译码是否成功。S440. Perform the first polar code (Polar) decoding on the rate matching data DeRMData (first attempt), the Polar decoding output is the decoded data DePolarData, and perform Cyclic Redundancy Check (CRC) calibration test to judge whether the first Polar decoding is successful.
S450、若第一次Polar译码成功，则根据帧号的低3位和低2位计算一次解扰序列，并对译码数据DePolarData进行一次解扰，输出解扰数据DeScr1Data，并对DeScr1Data进行解交织，提取到MIB信息。S450. If the first Polar decoding is successful, a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the decoded data DePolarData is descrambled once, the descrambled data DeScr1Data is output, and DeScr1Data is performed De-interleave and extract MIB information.
S460、检测LLRCombFlag，若LLRCombFlag＝1，启动软合并流程，遍历上述四种解扰序列对LLR进行解扰，将解扰后的LLR累加到对应的LLRbuffer中。对合并后的对应LLRbuffer进行第二次Polar译码。若第二次Polar译码成功则进行解交织，提取MIB信息。S460: Detect LLRCombFlag, if LLRCombFlag=1, start the soft combining process, traverse the above four descrambling sequences to descramble the LLR, and accumulate the descrambled LLR into the corresponding LLRbuffer. The second Polar decoding is performed on the combined corresponding LLRbuffer. If the second Polar decoding is successful, deinterleaving is performed to extract MIB information.
步骤S400还包括以下步骤：Step S400 also includes the following steps:
S470、若第一次Polar译码失败，则将软合并标志位LLRCombFlag置为1，并将速率匹配数据DeRMData存到LLRData1中。S470. If the first Polar decoding fails, set the soft combining flag bit LLRCombFlag to 1, and store the rate matching data DeRMData in LLRData1.
S480、若第二次Polar译码成功失败则继续遍历一次解扰序列直到全部用完四种解扰序列和Polar译码。S480. If the second Polar decoding succeeds and fails, continue to traverse the descrambling sequence once until all the four descrambling sequences and Polar decoding are used up.
步骤S480中，具体的是按SCR1、SCR2、SCR3和SCR4的顺序一次解扰序列的遍历，分别对LLRData1解扰累加到LLRBuf1-LLRBuf4中。In step S480, specifically, the descrambling sequence is traversed once in the order of SCR1, SCR2, SCR3 and SCR4, and LLRData1 is descrambled and accumulated into LLRBuf1-LLRBuf4 respectively.
S490、若LLRCombFlag＝0，退出同步并向MAC层上报MIB码流并在DDR内存中更新同步的历史帧头位置信息。S490, if LLRCombFlag=0, exit the synchronization and report the MIB code stream to the MAC layer and update the synchronized historical frame header position information in the DDR memory.
由于协议规定网络会在SFN mod 8＝0(即每80ms时长)的时刻初始化扰码序列，每次解扰序列为SCR1时，对应的LLRBufx要清空。Since the protocol stipulates that the network will initialize the scrambling sequence at the moment when SFN mod 8=0 (that is, every 80ms duration), each time the descrambling sequence is SCR1, the corresponding LLRBufx should be cleared.
当一次解扰序列全遍历完，开始遍历下一个SSBIdx，重复步骤S400，直到遍历完全部SSB配置数目L个SSBIdx。When all the descrambling sequences are traversed once, the next SSBIdx starts to be traversed, and step S400 is repeated until the L SSBIdx of all SSB configurations are traversed.
由于协议中SSB可以分为多种场景，SSB配置数目L可以为4/8/64，共三种情况，本实施例中以L＝8进行举例。Since the SSB in the protocol can be divided into various scenarios, the number L of SSB configurations can be 4/8/64, there are three cases in total, and L=8 is used as an example in this embodiment.
对每一个时域数据TimeData20ms，重复上述步骤S400，直至译码成功，进程结束。For each time domain data TimeData20ms, the above step S400 is repeated until the decoding is successful, and the process ends.
在本实施例中，每一个预设时间长度的时域数据TimeData20ms，初始同步预设时间也就是20ms周期，PBCH重复周期80ms，对应一次和二次扰码序列均为四种。假设某时刻接收到的PBCH MIB及一次加扰序列和二次加扰序列不同，对应的合并次数也不同。若对应一次和二次扰码序列均为四种，则最大合并次数为六次。如果超过六次合并译码后CRC校验仍然不成功，则认为这段时间内无线信道环境太差，超过了终端的PBCH检测极限，合并译码流程结束。In this embodiment, the time domain data TimeData of each preset time length is 20ms, the preset initial synchronization time is 20ms period, the PBCH repetition period is 80ms, and there are four corresponding primary and secondary scrambling sequences. Assuming that the PBCH MIB and the primary scrambling sequence and the secondary scrambling sequence received at a certain time are different, the corresponding merging times are also different. If the corresponding primary and secondary scrambling sequences are all four, the maximum number of combinations is six. If the CRC check is still unsuccessful after more than six times of combined decoding, it is considered that the wireless channel environment is too poor during this period, exceeding the PBCH detection limit of the terminal, and the combined decoding process ends.
一次解扰后对应的LLR累加合并到Buffer的对应关系及流程如图3到图4所示。各附图中的加粗框表示尝试译码的合并buffer中MIB及加/解扰序列信息，且4种加/解扰序列一一对应。合并译码的目标是一直合并译码，如果一直译码失败，则一直到合并的软比特buffer中出现加粗框中所示的MIB、加/解扰信息，才算合并译码尝试流程结束。图3到图6中列举的4种情况，最大尝试合并次数为6次即可将相同的MIB信息遍历完全部对应的加/解扰序列。如果超过6次合并译码后CRC校验仍然不成功，则认为这段时间内无线信道环境太差，超过了终端的PBCH检测极限，合并译码流程结束。Figure 3 to Figure 4 show the corresponding relationship and process of accumulating and merging the corresponding LLRs into the Buffer after one descrambling. The bold boxes in each figure represent the MIB and the scrambling/descrambling sequence information in the combined buffer to be decoded, and the 4 kinds of scrambling/descrambling sequences correspond one-to-one. The goal of combined decoding is to combine and decode all the time. If the decoding fails all the time, the combined decoding attempt process ends until the MIB and adding/descrambling information shown in the bold box appear in the combined soft-bit buffer. . In the four cases listed in FIG. 3 to FIG. 6 , the maximum number of times of merging attempts is 6, and the same MIB information can be traversed through all the corresponding adding/descrambling sequences. If the CRC check is still unsuccessful after 6 times of combined decoding, it is considered that the wireless channel environment is too bad during this period, exceeding the PBCH detection limit of the terminal, and the combined decoding process ends.
下文描述的5G快速下行同步及软比特合并小区搜索装置与上文描述的5G快速下行同步及软比特合并小区搜索方法可相互对应参照。The 5G fast downlink synchronization and soft bit combination cell search apparatus described below and the 5G fast downlink synchronization and soft bit combination cell search method described above can be referred to each other correspondingly.
下面结合图7描述本发明的5G快速下行同步及软比特合并小区搜索装置，该装置包括：The 5G fast downlink synchronization and soft bit combining cell search device of the present invention is described below with reference to FIG. 7 , and the device includes:
移频模块100，用于终端收到时域数据，以流水形式将时域数据存入DSP的DDR缓冲器中，每个缓冲器保存预设时间长度的时域数据，调用FPGA或加速器对时域数据进行移频处理，将时域数据移到零频附近，为后面低通滤波做准备。The frequency shift module 100 is used for the terminal to receive the time domain data, store the time domain data in the DDR buffer of the DSP in the form of pipeline, each buffer saves the time domain data of a preset time length, and calls the FPGA or accelerator to synchronize the time The domain data is frequency-shifted, and the time-domain data is moved to the vicinity of the zero frequency to prepare for the subsequent low-pass filtering.
在移频模块100中，预设时间为20ms，由于每个符号的快速傅里叶变换点数固定，每种子载波间隔下20ms数据的符号数固定，因此20ms时域数据总的采样点数固定，标记为20msTimeDataLen，预设时间长度的时域数据即TimeData20ms。In the frequency shift module 100, the preset time is 20ms. Since the number of fast Fourier transform points of each symbol is fixed, and the number of symbols of 20ms data under each subcarrier interval is fixed, the total number of sampling points of 20ms time domain data is fixed, and the mark is 20msTimeDataLen, and the time domain data of the preset time length is TimeData20ms.
第一获取模块200，用于基于历史帧头的有效性，获取移频后预设时间长度的时域数据TimeData20ms的第一位置及第一位置对应的第一序列号。The first obtaining module 200 is configured to obtain, based on the validity of the historical frame header, the first position of the time domain data TimeData20ms of the preset time length after the frequency shift and the first sequence number corresponding to the first position.
第二获取模块300，用于根据第一位置PssMaxPos，获取SSS的频域数据SSSFreData，并对SSS的频域数据进行滑动相关运算，得到SSS的频域数据SSSFreData的滑动最大相关值及对应的第二序列号，并基于第一序列号与第二序列号，得到PCI。The second obtaining module 300 is configured to obtain the frequency domain data SSSFreData of the SSS according to the first position PssMaxPos, and perform a sliding correlation operation on the frequency domain data of the SSS to obtain the sliding maximum correlation value of the frequency domain data SSSFreData of the SSS and the corresponding first Two serial numbers, and based on the first serial number and the second serial number, the PCI is obtained.
在本实施例中，在预设时间长度的时域数据TimeData20ms中，根据第一位置PssMaxPos读取该SSB的其余三个PBCH符号的时域数据，进行快速傅里叶变换处理，得到这三个PBCH符号的频域数据PBCHFreData。In this embodiment, in the time-domain data TimeData20ms of the preset time length, read the time-domain data of the remaining three PBCH symbols of the SSB according to the first position PssMaxPos, perform fast Fourier transform processing, and obtain these three Frequency domain data PBCHFreData of PBCH symbols.
检测模块400，用于根据PCI，对PBCH进行检测，得到MIB信息，对PBCH进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。The detection module 400 is configured to detect the PBCH according to the PCI to obtain MIB information, and the detection of the PBCH includes the first polar code decoding and merging the same soft bits after the first polar code decoding fails After the second polar code decoding.
本发明提供的5G快速下行同步及软比特合并小区搜索方法，能够在下行同步过程中基于历史帧头位置快速完成初始小区搜索，有效提升了小区PSS峰值搜索效率，相较于传统方法中初始同步20ms时域数据PSS搜索需要滑动相关计算560个OFDM符号，但本发明提供的5G快速下行同步及软比特合并小区搜索方法及装置基于历史帧头位置进行PSS搜索只 需要处理2个符号即可；同时在检测PBCH过程中，一次译码失败后将相同软比特进行合并后再次译码，从而在远距离覆盖及干扰较大的场景下提升了PBCH信道的信噪比。The 5G fast downlink synchronization and soft bit combining cell search method provided by the present invention can quickly complete the initial cell search based on the historical frame header position in the downlink synchronization process, effectively improve the cell PSS peak search efficiency, compared with the initial synchronization in the traditional method. 20ms time domain data PSS search requires sliding correlation calculation of 560 OFDM symbols, but the 5G fast downlink synchronization and soft bit combining cell search method and device provided by the present invention only needs to process 2 symbols to perform PSS search based on historical frame header positions; At the same time, in the process of detecting PBCH, after a decoding failure, the same soft bits are combined and then decoded again, thereby improving the signal-to-noise ratio of the PBCH channel in the scenario of long-distance coverage and large interference.
第一获取模块200具体包括：The first acquisition module 200 specifically includes:
第一判断单元210、判断系统中历史帧头是否有效。The first judging unit 210 judges whether the history frame header in the system is valid.
第一判断单元210中，需要判断系统中历史帧头的有效性。目标是为了得到第一位置PssMaxPos。历史帧头会在同步成功之后保存在系统的共享内存中，每次同步成功都会更新。终端开机后初始化成无效值，即终端开机的第一次同步无法基于历史帧头同步。另外在使用基于历史帧头位置同步的方法失败一定次数(根据实际场景决定)后，该历史帧头信息也要改成无效值。In the first judgment unit 210, the validity of the historical frame header in the system needs to be judged. The goal is to get the first position PssMaxPos. The historical frame header will be saved in the shared memory of the system after the synchronization is successful, and it will be updated every time the synchronization is successful. After the terminal is powered on, it is initialized to an invalid value, that is, the first synchronization when the terminal is powered on cannot be synchronized based on the historical frame header. In addition, after the method based on the historical frame header position synchronization fails for a certain number of times (determined according to the actual scene), the historical frame header information should also be changed to an invalid value.
具体的，在第一判断单元210中，系统下行同步成功后会保存的20ms的帧头信息，即通过同步成功的PSS的最大峰值位置在20ms的相对位置，算出一个20ms的帧头。Specifically, in the first judging unit 210, the frame header information of 20ms will be saved after the system downlink synchronization is successful, that is, a 20ms frame header is calculated by the relative position of the maximum peak position of the successfully synchronized PSS at 20ms.
第一获取单元220，用于若历史帧头是有效值，根据历史帧头的帧头信息可以算出预设时间长度的时域数据TimeData20ms中上次同步成功过的PSS的最大峰值相对位置HistoryPSSMaxPos，并在之后开始搜索PSS峰值。The first obtaining unit 220 is used to calculate the maximum peak relative position HistoryPSSMaxPos of the PSS that has been successfully synchronized last time in the time domain data TimeData20ms of the preset time length according to the frame header information of the historical frame header if the historical frame header is a valid value, and start searching for PSS peaks afterwards.
第二获取单元230，用于对移频后的时域数据以PSS的最大峰值相对位置HistoryPSSMaxPos相邻两个符号长度的时域数据进行低通滤波以及滑动相关运算，得到第一位置以及对应的第一序列号。The second acquisition unit 230 is configured to perform low-pass filtering and sliding correlation operation on the time-domain data after the frequency shift with the maximum peak relative position of PSS HistoryPSSMaxPos and the time-domain data of two adjacent symbol lengths, to obtain the first position and the corresponding first serial number.
第二获取单元230具体包括：The second obtaining unit 230 specifically includes:
第一处理单元231，用于DSP将DDR缓冲器中移频后预设时间长度的时域数据TimeData20ms以PSS最大峰值相对位置相邻两个符号长度的时域数据进行低通滤波，并遍历使用三种PSS本地序列与这两个符号长度的时域数据的滤波后时域数据进行滑动相关运算，得到PSS的滑动相关值，存取PSS的滑动相关值到相应的内存CorBuffer1中。The first processing unit 231 is used for the DSP to perform low-pass filtering on the time-domain data TimeData20ms of the preset time length after frequency shifting in the DDR buffer with the time-domain data of two symbol lengths adjacent to the relative position of the PSS maximum peak value, and traverse and use the time domain data of two symbol lengths. The three PSS local sequences and the filtered time domain data of the two symbol lengths perform sliding correlation operation to obtain the sliding correlation value of the PSS, and store the sliding correlation value of the PSS into the corresponding memory CorBuffer1.
具体的，第一处理单元231中，是以HistoryPSSMaxPos为中心读取前后两个符号的长度数据，即两个快速傅里叶变换窗长的采样点数进行低通滤波。Specifically, in the first processing unit 231, low-pass filtering is performed by reading the length data of the two symbols before and after the HistoryPSSMaxPos as the center, that is, the number of sampling points with the length of two fast Fourier transform windows.
第二处理单元232，用于对内存CorBuffer1中的PSS的滑动相关值进行最大值查找，找出PSS的滑动相关最大值及其在这两个符号长度的时域数据在中的第二位置TempPssPos，根据第二位置TempPssPos和这两个符号在预设时间长度的时域数据TimeData20ms中的位置，很快得到预设时间长度的时域数据TimeData20ms中的第一位置PssMaxPos(该位置即为PSS的最大相关值在20msTimeDataLen中的位置)及对应的第一序列号NID2。The second processing unit 232 is configured to perform maximum search on the sliding correlation value of the PSS in the memory CorBuffer1, and find the sliding correlation maximum value of the PSS and its second position TempPssPos in the time domain data of the two symbol lengths. , according to the second position TempPssPos and the position of these two symbols in the time domain data TimeData20ms of the preset time length, obtain the first position PssMaxPos in the time domain data TimeData20ms of the preset time length (this position is the PSS The position of the maximum correlation value in 20msTimeDataLen) and the corresponding first sequence number NID2.
第一获取模块200还包括：The first obtaining module 200 further includes:
第三获取单元240，用于DSP将DDR缓冲器中的移频后预设时间长度的时域数据TimeData20ms(每次读取一个符号，即一个快速傅里叶变换窗长的采样点数)进行低通滤波，并遍历使用三种PSS本地序列与该符号的滤波后时域数据进行滑动相关运算，得到PSS的滑动相关值，存取PSS的滑动相关值到相应的内存CorBuffer1中，直到预设时间长度的时域数据TimeData20ms中所有符号的滑动相关运算结束；The third acquisition unit 240 is used for the DSP to perform low-frequency data TimeData20ms (one symbol is read at a time, that is, the number of sampling points with a fast Fourier transform window length) in the DDR buffer with a preset time length after frequency shifting. Pass filtering, and traverse the three PSS local sequences and the filtered time domain data of the symbol to perform sliding correlation operation to obtain the sliding correlation value of PSS, and access the sliding correlation value of PSS to the corresponding memory CorBuffer1 until the preset time. The sliding correlation operation of all symbols in the length of time domain data TimeData20ms ends;
第四获取单元250，用于对内存CorBuffer1中的PSS的滑动相关值进行最大值查找，找出PSS的滑动相关最大值及其在预设时间长度的时域数据TimeData20ms中的第一位置PssMaxPos及对应的序列号NID2。The fourth acquisition unit 250 is used to perform maximum search for the sliding correlation value of the PSS in the memory CorBuffer1, find the sliding correlation maximum value of the PSS and its first position PssMaxPos and the time domain data TimeData20ms of the preset time length. Corresponding serial number NID2.
第二获取模块300具体包括：The second obtaining module 300 specifically includes:
第三处理单元310，用于在时域数据TimeData20ms中第一位置PssMaxPos向后偏移一个正交频分复用技术(Orthogonal Frequency Division Multiplexing，OFDM)符号数据并取出SSS符号的时域数据，进行快速傅立叶变换处理得到SSS的频域数据SSSFreData。The third processing unit 310 is configured to offset backward one Orthogonal Frequency Division Multiplexing (OFDM) symbol data at the first position PssMaxPos in the time domain data TimeData20ms, and extract the time domain data of the SSS symbols, and perform The frequency domain data SSSFreData of SSS is obtained by fast Fourier transform processing.
第五获取单元320，用于遍历336种SSS本地序列与SSS的频域数据SSSFreData的滑动相关值，存取SSS的频域数据SSSFreData的滑动相关值并找出SSS的最大相关值SssMaxValue及对应的第二序列号NID1；The fifth acquisition unit 320 is used to traverse the sliding correlation value of 336 kinds of SSS local sequences and the frequency domain data SSSFreData of the SSS, access the sliding correlation value of the frequency domain data SSSFreData of the SSS and find the maximum correlation value SssMaxValue of the SSS and the corresponding The second serial number NID1;
第六获取单元330，用于可通过第二序列号NID1和第一序列号NID2，根据协议计算出PCI。The sixth obtaining unit 330 is configured to calculate the PCI according to the protocol through the second serial number NID1 and the first serial number NID2.
检测模块400具体包括：The detection module 400 specifically includes:
第一检测单元410，用于根据PCI可得到解调参考信号(Demodulation Reference Signal，DMRS)的频域数据，遍历SSBIdx生成DMRS本地序 列。The first detection unit 410 is configured to obtain frequency domain data of a demodulation reference signal (Demodulation Reference Signal, DMRS) according to the PCI, and traverse the SSBIdx to generate a DMRS local sequence.
第二检测单元420，用于对DMRS频域数据做信道估计并求出均衡因子，通过均衡因子对PBCH数据解均衡输出，对均衡输出做正交相移键控(Quadrature Phase Shift Keying，QPSK)解调，输出得到解调数据DeModuData。The second detection unit 420 is configured to perform channel estimation on the DMRS frequency domain data and obtain an equalization factor, de-equalize the PBCH data through the equalization factor, and perform Quadrature Phase Shift Keying (QPSK) on the equalized output. Demodulate, and output the demodulated data DeModuData.
第三检测单元430，用于加扰过程中使用的扰码序列共有4种，因此解扰序列也对应四种，分别为SCR1、SCR2、SCR3和SCR4，对解调数据DeModuData遍历解扰序列进行二次解扰输出得到二次解扰数据DeScr2Data，并对二次解扰数据DeScr2Data解速率匹配，得到速率匹配数据DeRMData。The third detection unit 430 has four types of scrambling sequences used in the scrambling process, so the descrambling sequences also correspond to four types, which are SCR1, SCR2, SCR3 and SCR4 respectively. The secondary descrambling output obtains the secondary descrambling data DeScr2Data, and the rate matching data DeScr2Data is descrambled for the secondary descrambling data DeScr2Data to obtain the rate matching data DeRMData.
第四检测单元440，用于对速率匹配数据DeRMData进行第一次极性码(Polar)译码(首次尝试)，Polar译码输出为译码数据DePolarData，并进行循环冗余校验码(Cyclic Redundancy Check，CRC)校验，以判断第一次Polar译码是否成功。The fourth detection unit 440 is used to perform the first polar code (Polar) decoding (first attempt) on the rate matching data DeRMData, the Polar decoding output is the decoded data DePolarData, and the cyclic redundancy check code (Cyclic Redundancy Check, CRC) check to determine whether the first Polar decoding is successful.
第五检测单元450，用于若第一次Polar译码成功，则根据帧号的低3位和低2位计算一次解扰序列，并对译码数据DePolarData进行一次解扰，输出解扰数据DeScr1Data，并对DeScr1Data进行解交织，提取到MIB信息。The fifth detection unit 450 is configured to calculate a descrambling sequence according to the lower 3 bits and the lower 2 bits of the frame number if the first Polar decoding is successful, and descramble the decoded data DePolarData once, and output the descrambled data DeScr1Data, and de-interleave DeScr1Data to extract MIB information.
第六检测单元460，用于检测LLRCombFlag，若LLRCombFlag＝1，启动软合并流程，遍历上述四种解扰序列对LLR进行解扰，将解扰后的LLR累加到对应的LLRbuffer中。对合并后的对应LLRbuffer进行第二次Polar译码。若第二次Polar译码成功则进行解交织，提取MIB信息。The sixth detection unit 460 is used to detect the LLRCombFlag. If LLRCombFlag=1, start the soft combining process, traverse the above four descrambling sequences to descramble the LLR, and accumulate the descrambled LLR into the corresponding LLRbuffer. The second Polar decoding is performed on the combined corresponding LLRbuffer. If the second Polar decoding is successful, deinterleaving is performed to extract MIB information.
检测模块400还包括：The detection module 400 also includes:
第七检测单元410，用于若第一次Polar译码失败，则将软合并标志位LLRCombFlag置为1，并将速率匹配数据DeRMData存到LLRData1中。The seventh detection unit 410 is configured to set the soft combining flag LLRCombFlag to 1 if the first Polar decoding fails, and store the rate matching data DeRMData in LLRData1.
第八检测单元480，用于若第二次Polar译码成功失败则继续遍历一次解扰序列直到全部用完四种解扰序列和Polar译码。The eighth detection unit 480 is configured to continue traversing the descrambling sequence once if the second Polar decoding succeeds and fails until all the four descrambling sequences and Polar decoding are used up.
第八检测单元480中，具体的是按SCR1、SCR2、SCR3和SCR4的顺序一次解扰序列的遍历，分别对LLRData1解扰累加到LLRBuf1-LLRBuf4中。The eighth detection unit 480 specifically traverses the descrambling sequence once in the order of SCR1, SCR2, SCR3, and SCR4, and descrambles LLRData1 and accumulates them into LLRBuf1-LLRBuf4 respectively.
第九检测单元490，用于若LLRCombFlag＝0，退出同步并向MAC层上报MIB码流并在DDR内存中更新同步的历史帧头位置信息。The ninth detection unit 490 is configured to, if LLRCombFlag=0, exit the synchronization and report the MIB stream to the MAC layer and update the synchronized historical frame header position information in the DDR memory.
由于协议规定网络会在SFN mod 8＝0(即每80ms时长)的时刻初始化扰码序列，每次解扰序列为SCR1时，对应的LLRBufx要清空。Since the protocol stipulates that the network will initialize the scrambling sequence at the moment when SFN mod 8=0 (that is, every 80ms duration), each time the descrambling sequence is SCR1, the corresponding LLRBufx should be cleared.
当一次解扰序列全遍历完，开始遍历下一个SSBIdx，重复步骤S400，直到遍历完全部SSB配置数目L个SSBIdx。When all the descrambling sequences are traversed once, the next SSBIdx starts to be traversed, and step S400 is repeated until the L SSBIdx of all SSB configurations are traversed.
由于协议中SSB可以分为多种场景，SSB配置数目L可以为4/8/64，共三种情况，本实施例中以L＝8进行举例。Since the SSB in the protocol can be divided into various scenarios, the number L of SSB configurations can be 4/8/64, there are three cases in total, and L=8 is used as an example in this embodiment.
对每一个时域数据TimeData20ms，重复上述检测模块400，直至译码成功，进程结束。For each time domain data TimeData20ms, the above-mentioned detection module 400 is repeated until the decoding is successful, and the process ends.
在本实施例中，每一个预设时间长度的时域数据TimeData20ms，初始同步预设时间也就是20ms周期，PBCH重复周期80ms，对应一次和二次扰码序列均为四种。假设某时刻接收到的PBCH MIB及一次加扰序列和二次加扰序列不同，对应的合并次数也不同。若对应一次和二次扰码序列均为四种，则最大合并次数为六次。如果超过六次合并译码后CRC校验仍然不成功，则认为这段时间内无线信道环境太差，超过了终端的PBCH检测极限，合并译码流程结束。In this embodiment, the time domain data TimeData of each preset time length is 20ms, the preset initial synchronization time is 20ms period, the PBCH repetition period is 80ms, and there are four corresponding primary and secondary scrambling sequences. Assuming that the PBCH MIB and the primary scrambling sequence and the secondary scrambling sequence received at a certain time are different, the corresponding merging times are also different. If the corresponding primary and secondary scrambling sequences are all four, the maximum number of combinations is six. If the CRC check is still unsuccessful after more than six times of combined decoding, it is considered that the wireless channel environment is too poor during this period, exceeding the PBCH detection limit of the terminal, and the combined decoding process ends.
图8示例了一种电子设备的实体结构示意图，如图8所示，该电子设备可以包括：处理器(processor)810、通信接口(Communications Interface)820、存储器(memory)830和通信总线840，其中，处理器810，通信接口820，存储器830通过通信总线840完成相互间的通信。处理器810可以调用存储器830中的逻辑指令，以执行5G快速下行同步及软比特合并小区搜索方法，该方法包括以下步骤：FIG. 8 illustrates a schematic diagram of the physical structure of an electronic device. As shown in FIG. 8 , the electronic device may include: a processor (processor) 810, a communication interface (Communications Interface) 820, a memory (memory) 830 and a communication bus 840, The processor 810 , the communication interface 820 , and the memory 830 communicate with each other through the communication bus 840 . The processor 810 can invoke the logic instructions in the memory 830 to execute the 5G fast downlink synchronization and soft bit combining cell search method, and the method includes the following steps:
获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；Acquire time-domain data and save it in a buffer with a preset time length, perform frequency-shift processing on the time-domain data, and move the data to near zero frequency;
基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；Based on the validity of the historical frame header, obtain the first position of the time domain data of the preset time length after the frequency shift and the first sequence number corresponding to the first position;
根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理 小区标识；According to the first position, the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。According to the physical cell identifier, the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails The second polar code decoding is performed after combining the same soft bits.
此外，上述的存储器830中的逻辑指令可以通过软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。In addition, the above-mentioned logic instructions in the memory 830 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution. The computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, Read-Only Memory (ROM, Read-Only Memory), Random Access Memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program codes .
另一方面，本发明还提供一种计算机程序产品，所述计算机程序产品包括计算机程序，计算机程序可存储在非暂态计算机可读存储介质上，所述计算机程序被处理器执行时，计算机能够执行上述各方法所提供的5G快速下行同步及软比特合并小区搜索方法，该方法包括以下步骤：In another aspect, the present invention also provides a computer program product, the computer program product includes a computer program, the computer program can be stored on a non-transitory computer-readable storage medium, and when the computer program is executed by a processor, the computer can Execute the 5G fast downlink synchronization and soft bit combining cell search method provided by the above methods, and the method includes the following steps:
获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；Acquire time-domain data and save it in a buffer with a preset time length, perform frequency-shift processing on the time-domain data, and move the data to near zero frequency;
基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；Based on the validity of the historical frame header, obtain the first position of the time domain data of the preset time length after the frequency shift and the first sequence number corresponding to the first position;
根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识；According to the first position, the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。According to the physical cell identifier, the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails The second polar code decoding is performed after combining the same soft bits.
又一方面，本发明还提供一种非暂态计算机可读存储介质，其上存储有计算机程序，该计算机程序被处理器执行时实现以执行上述各方法提供 的5G快速下行同步及软比特合并小区搜索方法，该方法包括以下步骤：In yet another aspect, the present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored, and the computer program is implemented by a processor to execute the 5G fast downlink synchronization and soft bit combining provided by the above methods. Cell search method, the method includes the following steps:
获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；Acquire time-domain data and save it in a buffer with a preset time length, perform frequency-shift processing on the time-domain data, and move the data to near zero frequency;
基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；Based on the validity of the historical frame header, obtain the first position of the time domain data of the preset time length after the frequency shift and the first sequence number corresponding to the first position;
根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识；According to the first position, the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。According to the physical cell identifier, the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails The second polar code decoding is performed after combining the same soft bits.
以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。本领域普通技术人员在不付出创造性的劳动的情况下，即可以理解并实施。The device embodiments described above are only illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in One place, or it can be distributed over multiple network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution in this embodiment. Those of ordinary skill in the art can understand and implement it without creative effort.
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到各实施方式可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件。基于这样的理解，上述技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品可以存储在计算机可读存储介质中，如ROM/RAM、磁碟、光盘等，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行各个实施例或者实施例的某些部分所述的方法。From the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and certainly can also be implemented by hardware. Based on this understanding, the above-mentioned technical solutions can be embodied in the form of software products in essence or the parts that make contributions to the prior art, and the computer software products can be stored in computer-readable storage media, such as ROM/RAM, magnetic A disc, an optical disc, etc., includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the methods described in various embodiments or some parts of the embodiments.
最后应说明的是：以上实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that it can still be Modifications are made to the technical solutions described in the foregoing embodiments, or some technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (10)

  1. 一种5G快速下行同步及软比特合并小区搜索方法，其特征在于，包括以下步骤：A 5G fast downlink synchronization and soft bit combining cell search method, characterized in that it includes the following steps:
    获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；Acquire time-domain data and save it in a buffer with a preset time length, perform frequency-shift processing on the time-domain data, and move the data to near zero frequency;
    基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；Based on the validity of the historical frame header, obtain the first position of the time domain data of the preset time length after the frequency shift and the first sequence number corresponding to the first position;
    根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识；According to the first position, the frequency domain data of the secondary synchronization signal is obtained, and the sliding correlation operation is performed on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and obtaining a physical cell identity based on the first sequence number and the second sequence number;
    根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。According to the physical cell identifier, the physical broadcast channel is detected to obtain the main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and after the first polar code decoding fails The second polar code decoding is performed after combining the same soft bits.
  2. 根据权利要求1所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号，具体包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 1, wherein the acquisition of the time domain data of the preset time length after frequency shifting is based on the validity of the historical frame header. The first position and the first serial number corresponding to the first position specifically include the following steps:
    判断所述历史帧头是否有效；Determine whether the historical frame header is valid;
    若所述历史帧头为有效值，根据所述历史帧头的帧头信息获取所述预设时间长度的所述时域数据中上次同步成功过的主同步信号的最大峰值相对位置；If the historical frame header is a valid value, obtain the relative position of the maximum peak value of the primary synchronization signal that was successfully synchronized last time in the time domain data of the preset time length according to the frame header information of the historical frame header;
    对移频后所述预设时间长度的所述时域数据的以主同步信号的最大峰值相对位置相邻两个符号长度的时域数据的方式进行低通滤波以及滑动相关运算，得到所述第一位置以及对应的所述第一序列号；其中，所述第一位置为主同步信号的最大相关值在所述预设时间长度的所述时域数据中的位置。Low-pass filtering and sliding correlation operation are performed on the time-domain data of the preset time length after frequency shifting in the form of time-domain data of two symbol lengths adjacent to the maximum peak relative position of the primary synchronization signal, to obtain the The first position and the corresponding first sequence number; wherein, the first position is the position of the maximum correlation value of the primary synchronization signal in the time domain data of the preset time length.
  3. 根据权利要求2所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述对移频后所述预设时间长度的所述时域数据的以主同步信号的最大峰值相对位置相邻两个符号长度的时域数据的方式进行 低通滤波以及滑动相关运算，得到所述第一位置以及对应的所述第一序列号，具体包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 2, wherein the time domain data of the preset time length after frequency shifting is relative to the maximum peak value of the primary synchronization signal. Low-pass filtering and sliding correlation operation are performed by means of time-domain data with adjacent two symbol lengths to obtain the first position and the corresponding first sequence number, which specifically includes the following steps:
    对移频后所述预设时间长度的所述时域数据以主同步信号的最大峰值相对位置相邻两个符号的长度数据进行低通滤波，并遍历主同步信号本地序列与相邻两个符长度的时域数据的滤波后时域数据进行滑动相关运算，得到主同步信号的滑动相关值；Low-pass filtering is performed on the time domain data of the preset time length after frequency shifting with the length data of two adjacent symbols at the relative position of the maximum peak value of the main synchronization signal, and traversing the local sequence of the main synchronization signal and the adjacent two symbols. Perform a sliding correlation operation on the filtered time domain data of the time domain data of the symbol length to obtain the sliding correlation value of the main synchronization signal;
    对主同步信号的滑动相关值进行最大值查找，获取主同步信号的滑动相关最大值及其在相邻两个符号长度的时域数据中的第二位置，根据所述第二位置和相邻两个符号长度的时域数据在所述预设时间长度的所述时域数据中的位置，得到所述第一位置及对应的所述第一序列号。The maximum value search is performed on the sliding correlation value of the primary synchronization signal to obtain the sliding correlation maximum value of the primary synchronization signal and its second position in the time domain data of two adjacent symbol lengths. According to the second position and the adjacent The position of the time domain data of two symbol lengths in the time domain data of the preset time length is to obtain the first position and the corresponding first sequence number.
  4. 根据权利要求2所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号，还包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 2, wherein the acquisition of the time domain data of the preset time length after frequency shifting is based on the validity of the historical frame header. The first position and the first serial number corresponding to the first position also include the following steps:
    若所述历史帧头是无效值，对移频后所述预设时间长度的所述时域数据以每次读取一个符号进行低通滤波以及滑动相关运算，得到主同步信号的滑动相关值；If the historical frame header is an invalid value, perform low-pass filtering and sliding correlation operation on the time domain data of the preset time length after frequency shifting by reading one symbol at a time to obtain the sliding correlation value of the main synchronization signal ;
    对主同步信号的滑动相关值进行最大值查找，得到所述第一位置及对应的所述第一序列号。The maximum value search is performed on the sliding correlation value of the primary synchronization signal to obtain the first position and the corresponding first sequence number.
  5. 根据权利要求1所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识，具体包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 1, wherein the frequency domain data of the secondary synchronization signal is acquired according to the first position, and the frequency domain data of the secondary synchronization signal is slid The correlation operation is performed to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding second sequence number, and based on the first sequence number and the second sequence number, the physical cell identifier is obtained, which specifically includes the following steps:
    将所述第一位置向后偏移一个正交频分复用技术符号数据，得到辅同步信号的时域数据，基于辅同步信号的时域数据，得到辅同步信号的频域数据；Offset the first position backward by an OFDM symbol data to obtain time domain data of the secondary synchronization signal, and obtain frequency domain data of the secondary synchronization signal based on the time domain data of the secondary synchronization signal;
    遍历辅同步信号本地序列与辅同步信号的频域数据的滑动相关值，得到辅同步信号的频域数据的滑动相关值，并获取辅同步信号的最大相关值及对应的所述第二序列号；Traverse the sliding correlation value of the local sequence of the secondary synchronization signal and the frequency domain data of the secondary synchronization signal, obtain the sliding correlation value of the frequency domain data of the secondary synchronization signal, and obtain the maximum correlation value of the secondary synchronization signal and the corresponding second sequence number ;
    根据所述第一序列号和所述第二序列号，得到物理小区标识。According to the first sequence number and the second sequence number, a physical cell identity is obtained.
  6. 根据权利要求1所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，具体包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 1, wherein the detection of the physical broadcast channel according to the physical cell identifier to obtain the master information block information specifically includes the following steps:
    根据物理小区标识得到所述预设时间长度的所述时域数据的解调参考信号的频域数据，遍历SSBIdx生成解调参考信号本地序列；Obtain the frequency domain data of the demodulation reference signal of the time domain data of the preset time length according to the physical cell identifier, and traverse the SSBIdx to generate a local sequence of the demodulation reference signal;
    对解调参考信号的频域数据进行信道估计得到均衡因子，基于所述均衡因子对物理广播信道解均衡输出，并在均衡输出后进行正交相移键控解调，得到解调数据。Perform channel estimation on the frequency domain data of the demodulation reference signal to obtain an equalization factor, de-equalize and output the physical broadcast channel based on the equalization factor, and perform quadrature phase shift keying demodulation after equalization output to obtain demodulated data.
    对所述解调数据遍历解扰序列进行二次解扰输出得到二次解扰数据，并对所述二次解扰数据解速率匹配，得到速率匹配数据；performing secondary descrambling output on the demodulated data traversing the descrambling sequence to obtain secondary descrambling data, and performing rate matching on the secondary descrambling data to obtain rate matching data;
    对速率匹配数据进行所述第一次极性码译码，得到所述第一译码数据；performing the first polar code decoding on the rate matching data to obtain the first decoding data;
    若所述第一次极性码译码成功，则根据帧号的低3位和低2位计算一次解扰序列，并对第一译码数据进行一次解扰，得到第一解扰数据，并对所述第一解扰数据进行解交织，提取到主信息块信息；If the decoding of the polar code for the first time is successful, a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the first decoding data is descrambled once to obtain the first descrambling data, and de-interleaving the first descrambled data to extract main information block information;
    检测软合并标志位，若软合并标志位为1，启动软合并流程，遍历解扰序列对LLR进行解扰，将解扰后的LLR累加到对应的LLRbuffer中，并对合并后的对应LLRbuffer进行所述第二次极性码译码，若所述第二次极性码译码成功，则根据帧号的低3位和低2位计算一次解扰序列，并对第二译码数据进行一次解扰，得到第二解扰数据，并对所述第二解扰数据进行解交织，提取到主信息块信息。Detect the soft merging flag bit, if the soft merging flag bit is 1, start the soft merging process, traverse the descrambling sequence to descramble the LLRs, accumulate the descrambled LLRs into the corresponding LLRbuffer, and perform operations on the merged corresponding LLRbuffer. The polar code decoding for the second time, if the polar code decoding for the second time is successful, a descrambling sequence is calculated according to the lower 3 bits and the lower 2 bits of the frame number, and the second decoding data is performed. One descrambling is performed to obtain the second descrambled data, and the second descrambled data is deinterleaved to extract the main information block information.
  7. 根据权利要求6所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，还包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 6, characterized in that, according to the physical cell identifier, the physical broadcast channel is detected to obtain the master information block information, further comprising the following steps:
    若所述第一次极性码译码成功失败，则将软合并标志位置为1，并将速率匹配数据存到LLRData1中。If the first polar code decoding succeeds and fails, the soft combining flag bit is set to 1, and the rate matching data is stored in LLRData1.
  8. 根据权利要求6所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，还包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 6, characterized in that, according to the physical cell identifier, the physical broadcast channel is detected to obtain the master information block information, further comprising the following steps:
    若所述第二次极性码译码成功失败，则继续遍历一次解扰序列直到全部用完全部解扰序列和极性码译码。If the second polar code decoding succeeds and fails, continue to traverse the descrambling sequence once until all the decoding is performed with the complete descrambling sequence and the polar code.
  9. 根据权利要求6所述的5G快速下行同步及软比特合并小区搜索方法，其特征在于，所述根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息，还包括以下步骤：The 5G fast downlink synchronization and soft-bit combining cell search method according to claim 6, characterized in that, according to the physical cell identifier, the physical broadcast channel is detected to obtain the master information block information, further comprising the following steps:
    若软合并标志位为0，退出同步并向媒体介入控制层上报主信息块信息码流并更新同步的历史帧头。If the soft combining flag is 0, the synchronization is exited and the main information block information code stream is reported to the media intervention control layer and the synchronization history frame header is updated.
  10. 一种5G快速下行同步及软比特合并小区搜索装置，其特征在于，包括：A 5G fast downlink synchronization and soft bit combining cell search device, characterized in that it includes:
    移频模块，用于获取时域数据并以预设时间长度保存到缓冲器中，对所述时域数据进行移频处理，将数据移到零频附近；a frequency-shifting module for acquiring time-domain data and storing it in a buffer with a preset time length, performing frequency-shifting processing on the time-domain data, and moving the data to near zero frequency;
    第一获取模块，用于基于历史帧头的有效性，获取移频后所述预设时间长度的所述时域数据的第一位置及所述第一位置对应的第一序列号；a first acquisition module, configured to acquire, based on the validity of the historical frame header, the first position of the time domain data of the preset time length after frequency shifting and the first sequence number corresponding to the first position;
    第二获取模块，根据第一位置，获取辅同步信号的频域数据，并对辅同步信号的频域数据进行滑动相关运算，得到辅同步信号的频域数据的滑动最大相关值及对应的第二序列号，并基于所述第一序列号与所述第二序列号，得到物理小区标识；The second acquisition module acquires the frequency domain data of the secondary synchronization signal according to the first position, and performs a sliding correlation operation on the frequency domain data of the secondary synchronization signal to obtain the sliding maximum correlation value of the frequency domain data of the secondary synchronization signal and the corresponding first two serial numbers, and based on the first serial number and the second serial number, a physical cell identity is obtained;
    检测模块，用于根据所述物理小区标识，对物理广播信道进行检测，得到主信息块信息；其中，对物理广播信道进行检测包括第一次极性码译码以及所述第一次极性码译码失败后将相同软比特进行合并后的第二次极性码译码。a detection module, configured to detect the physical broadcast channel according to the physical cell identifier to obtain main information block information; wherein, the detection of the physical broadcast channel includes the first polar code decoding and the first polar code After the code decoding fails, the same soft bits are combined for the second polar code decoding.
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