WO2022127053A1 - 显示处理方法、显示处理装置及显示面板 - Google Patents

显示处理方法、显示处理装置及显示面板 Download PDF

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WO2022127053A1
WO2022127053A1 PCT/CN2021/099730 CN2021099730W WO2022127053A1 WO 2022127053 A1 WO2022127053 A1 WO 2022127053A1 CN 2021099730 W CN2021099730 W CN 2021099730W WO 2022127053 A1 WO2022127053 A1 WO 2022127053A1
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pixels
data signals
next row
perform
row
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PCT/CN2021/099730
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English (en)
French (fr)
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南帐镇
李大浚
吴佳璋
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北京奕斯伟计算技术有限公司
合肥奕斯伟集成电路有限公司
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Publication of WO2022127053A1 publication Critical patent/WO2022127053A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

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  • the present disclosure relates to the field of display technology, and in particular, to a display processing method, a display processing device, and a display panel.
  • the slew boost technology (slew boost) is usually used.
  • Rate also known as slew rate
  • the slew boost function will still be activated, which leads to an increase in operating power consumption.
  • the present disclosure provides a display processing method, a display processing device, and a display panel.
  • an embodiment of the present disclosure provides a display processing method, including:
  • the step of judging whether to perform slew boost processing on the data signals of the pixels in the next row according to the data signals of the pixels in the current row and the pixels in the next row includes:
  • the step of judging whether to perform slew boost processing on the data signals of the next row of pixels include:
  • the first logic result and the second logic result it is determined whether to perform the slew boosting process on the data signals of the pixels in the next row.
  • the step of judging whether to perform slew boost processing on the data signals of the pixels in the next row according to the first logic result and the second logic result includes:
  • an embodiment of the present disclosure further provides a display processing device, including:
  • an acquisition module used to acquire the data signals of the current line of pixels and the next line of pixels of the current frame image
  • the judgment module is used for judging whether to perform slew boosting processing on the data signals of the pixels of the next row according to the data signals of the pixels of the current row and the pixels of the next row.
  • the judging module includes:
  • an extraction unit for extracting the most significant bits of the data signal corresponding to the two sub-pixels of each data channel in the current row of pixels and the next row of pixels;
  • the judgment unit is used for judging whether to perform slew boosting processing on the data signals of the pixels of the next row according to the most significant bits of the data signals of the two sub-pixels corresponding to the same data channel in the pixels of the current row and the pixels of the next row.
  • the judging unit includes:
  • the first operation subunit is used to perform XOR operation on the most significant bits of the data signals of the two subpixels corresponding to the same data channel in the current row of pixels and the next row of pixels to obtain the XOR operation result of each data channel;
  • the second operation subunit is used to perform AND operation and OR operation on the XOR operation results of every at least two consecutive data channels, respectively, to obtain several AND operation results and OR operation results;
  • the third operation subunit is used to perform AND operation on the several AND operation results to obtain a first logical result, and perform an AND operation on the several OR operation results to obtain a second logical result;
  • a judging subunit configured to judge whether to perform slew boosting processing on the data signals of the pixels in the next row according to the first logic result and the second logic result.
  • the judging subunit includes:
  • a first micro-unit configured to not perform slew boost processing on the data signals of the pixels in the next row when both the first logic result and the second logic result are 0;
  • the second micro-unit is configured to, in the case that the first logic result is 1, the second logic result is 0, or the first logic result and the second logic result are both 1, perform a
  • the data signal of the pixel is subjected to slew boost processing.
  • an embodiment of the present disclosure provides a chip, the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is configured to run a program or an instruction to implement the first aspect The display processing method.
  • an embodiment of the present disclosure provides a display panel, including the display processing apparatus described in the second aspect.
  • FIG. 1 is a schematic diagram of a single-gate type red, green and blue (Red, Green and Blue, RGB) pixel structure provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a single-gate type red, green, blue and white (Red, Green, Blue and White, RGBW) pixel structure provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a dual-gate RGB pixel structure provided by an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of a dual-gate RGBW pixel structure provided by an embodiment of the present disclosure
  • FIG. 5 is one of the output voltage waveforms of the single-gate RGB pixel structure
  • FIG. 6 is the second output voltage waveform of the single-gate RGB pixel structure
  • FIG. 7 is the third output voltage waveform of the single-gate RGB pixel structure
  • FIG. 8 is the fourth output voltage waveform of the single-gate RGB pixel structure
  • FIG. 9 is the fifth output voltage waveform of the single-gate RGB pixel structure
  • Figure 10 is the sixth output voltage waveform of the single-gate RGB pixel structure
  • FIG. 11 is a schematic flowchart of a display processing method provided by an embodiment of the present disclosure.
  • FIG. 12 is a schematic diagram of a detection circuit provided by an embodiment of the present disclosure.
  • FIG. 13 is a schematic diagram of the classification of the first logical result and the second logical result provided by an embodiment of the present disclosure
  • FIG. 14 is a schematic diagram of the temperature of the display driver chip before and after the charge sharing method according to an embodiment of the present disclosure
  • FIG. 15 is a schematic structural diagram of a display processing apparatus according to an embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram of a single-gate RGB pixel structure provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a single-gate type RGBW pixel structure provided by an embodiment of the present disclosure
  • FIG. 3 is the present disclosure
  • FIG. 4 is a schematic diagram of a structure of a dual-gate RGB pixel provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a structure of a dual-gate RGBW pixel provided by an embodiment of the present disclosure.
  • the pixel arrangement structure in the display panel includes a single-gate RGB pixel arrangement, a single-gate RGBW pixel arrangement, a double-gate RGB pixel arrangement, a double-gate RGB pixel arrangement, and a double-gate RGB pixel arrangement.
  • Type RGBW pixel arrangement structure, etc. when display panels with different pixel arrangement structures are displayed, the display image is detected without the aid of an additional timing control chip (TCON).
  • the display panel will still start the slew boost function (the so-called slew boost, that is, slew boost, or slew rate boost, which can reduce the time required for voltage conversion), which is undoubtedly
  • slew boost that is, slew boost, or slew rate boost, which can reduce the time required for voltage conversion
  • the power consumption of operation is increased, and if an additional timing control chip is used for detection, it means that the difficulty of circuit/chip design is increased, and the area of the chip is increased, and the power consumption is correspondingly increased.
  • the display panel with the pixel arrangement structure of the present invention ultimately reduces the difficulty of chip design, reduces operating power consumption, and expands application scenarios, which has become an urgent problem to be solved in related technologies.
  • FIG. 5 is one of the output voltage waveforms of the single-gate RGB pixel structure
  • FIG. 6 is the second output voltage waveform of the single-gate RGB pixel structure
  • FIG. 7 is the single-gate RGB pixel structure.
  • Figure 8 is the fourth output voltage waveform of the single-gate RGB pixel structure
  • Figure 9 is the fifth output voltage waveform of the single-gate RGB pixel structure
  • Figure 10 is the output voltage of the single-gate RGB pixel structure.
  • Waveform six As shown in Figure 5-7, CH1 to CH6 in the figure correspond to the six data channels (that is, six columns of data lines) of the single-gate RGB pixel structure.
  • the polarities of the driving data signals in CH1 and CH4 in Figure 5 are opposite.
  • the polarity of the driving data signals in CH3 and CH6 in FIG. 6 is opposite, corresponding to the blue in the third and sixth columns.
  • FIG. 7 is opposite, corresponding to the polarity change mode of the data signal of the red sub-pixel in the first column and the fourth column, CH3 Contrary to the polarity of the driving data signal in CH6, the polarity of the data signal corresponding to the blue sub-pixels in the third and sixth columns is changed.
  • the data corresponding to the odd-column sub-pixels and the even-column sub-pixels The polarities of the driving data signals in the channels are opposite, corresponding to the polarities of the data signals of the odd-column sub-pixels and the even-column sub-pixels.
  • FIG. 9 shows the driving data signals in the data channels corresponding to the odd-column sub-pixels and the even-column sub-pixels.
  • the polarities are the same, corresponding to the polarity change of the data signals of the odd-column sub-pixels and the even-column sub-pixels.
  • the polarities of the driving data signals in the data channels corresponding to the odd-column sub-pixels and the even-column sub-pixels do not change.
  • the voltage waveform output to the display panel can reflect the polarity change rule of the driving data signal in the corresponding data channels of different sub-pixels, the numerical change of the driving data signal in the same data channel, etc. Therefore, a suitable time point for starting the slew boost processing function can be selected according to the polarity change law and the numerical value change, thereby saving the power consumption of the display panel.
  • FIG. 11 is a schematic flowchart of a display processing method provided by an embodiment of the present disclosure.
  • the display processing method in the embodiment of the present disclosure may specifically include:
  • Step 111 Acquire the data signals of the pixels of the current line and the pixels of the next line of the current frame image.
  • FIG. 12 is a schematic diagram of a detection circuit provided by an embodiment of the present disclosure.
  • the data signal output by the first latch is output to the second latch, and the data signal output by the second latch is converted through a level shifting circuit (L/S) and an amplifier. It is a level signal with polarity and is output to the corresponding data channel. Therefore, it can be considered that the data signal output from the second latch corresponds to the data signal of the current row of pixels, and the data signal output from the first latch corresponds to the data signal of the next row of pixels, so that the second The latch and the first latch acquire the data signals of the pixels of the current line and the pixels of the next line of the current frame image.
  • the combination of the first latch, the second latch, the level conversion circuit and the amplifier constitutes a conversion circuit, more specifically a digital-to-analog conversion circuit.
  • Step 112 According to the data signals of the pixels of the current row and the pixels of the next row, determine whether to perform the slew boosting process on the data signals of the pixels of the next row.
  • the voltage waveform output to the display panel can reflect the polarity change rule of the driving data signals in the corresponding data channels of different sub-pixels and the polarity of the driving data signals in the same data channel.
  • the fluctuation value of the voltage conversion rate of the two rows of pixels can be known, so as to determine whether the data signal of the next row of pixels needs to be slew boosted according to the fluctuation value; thus, between the current row of pixels and the next row of pixels Swing boost processing is performed on the data signal of the next row of pixels only when the variation range of the data signal of the pixel meets the preset threshold, and when the variation range does not meet the preset threshold, the data signal of the next row of pixels is not processed.
  • the slew boosting process avoids the problem of increased power consumption caused by the slew boosting function being activated even when the voltage conversion rates of adjacent rows of pixels have minor fluctuations.
  • the step of determining whether to perform slew boost processing on the data signals of the pixels in the next row according to the data signals of the pixels in the current row and the pixels in the next row includes:
  • the most significant bit in each data signal needs to be extracted, that is, according to the pixel in the current row and the pixel in the next row corresponding to the same
  • the most significant bits of the data signals of the two sub-pixels of the data channel can determine whether to perform slew boost processing on the data signals of the next row of pixels.
  • the steps include:
  • the first logic result and the second logic result it is determined whether to perform the slew boosting process on the data signals of the pixels in the next row.
  • the M XOR operation results can be the XOR operation results of each adjacent at least two consecutive channels as a group, and the XOR operation results in the group are respectively AND operation and OR operation, optional, As shown in FIG. 12 , in the embodiment of the present disclosure, the XOR operation results corresponding to each consecutive three data channels are used as a group to perform the AND operation and the OR operation.
  • the result of the XOR operation is a group, which can be changed according to actual needs. This change should also be considered to be the scope covered by the concept disclosed in this case. From this, N AND operation results and N OR operation results (M) can be obtained.
  • the step of judging whether to perform slew boost processing on the data signals of the pixels in the next row according to the first logic result and the second logic result includes:
  • the data signal of the next row of pixels needs to be slew boosted according to the first logic result and the second logic result obtained by processing.
  • the first logical result and the second logical result are both 0, it is considered that the voltage conversion rates of the pixels in the current row and the pixels in the next row are not much different, and the fluctuations are small, so there is no need for the next row of pixels.
  • the data signal of the pixel is subjected to slew boost processing; in the case that the first logic result is 1, the second logic result is 0, or the first logic result and the second logic result are both 1 It is considered that the voltage slew rate difference between the pixels of the current row and the pixels of the next row has exceeded a certain threshold, and a large fluctuation has occurred. Therefore, it is necessary to perform slew boost processing on the data signals of the pixels of the next row. Therefore, through the above judgment method, the slew boost function can be activated only when the overall voltage of the next row of pixels fluctuates greatly, so that the power consumption can be greatly reduced while ensuring the display image quality.
  • FIG. 13 is a schematic diagram of the classification of the first logical result and the second logical result provided by the embodiment of the present disclosure.
  • the corresponding picture display mode at this time is a non-toggle pattern (Non toggle pattern), that is, corresponding to For stable images such as white and black, in this case, it is not necessary to perform slew boost processing on the data signals of each sub-pixel in the next row of pixels; when the first logic result iCO is 1, the second logic As a result, when iHP is 0, the corresponding screen display mode is Color pattern.
  • the first logical result iCO is 1 and the second logical result iHP is 1, the corresponding screen display mode is the All channel toggle pattern.
  • the data signal of each sub-pixel is subjected to slew boost processing.
  • turning on the slew boosting function can be realized by sending the data signal to the slew boosting circuit in the amplifier, and turning off the slew boosting function can be realized by cutting off the slew boosting circuit.
  • the slew booster circuit is a conventional slew booster circuit, and the embodiment of the present disclosure does not involve any modification of the slew booster circuit, but only determines whether the slew booster function needs to be turned on or off and the slew booster function needs to be turned on or off. Perform the corresponding action when it needs to be turned on.
  • FIG. 14 is a schematic diagram of the temperature of the display driver chip before and after using the display processing method according to an embodiment of the present disclosure.
  • the display processing method is adopted.
  • the temperature of the display driver chip in the red and blue image display can be reduced by 6°C
  • the black screen can be reduced by 2.75°C
  • the white screen can be reduced by 3.5°C. It can be seen that the power consumption of the display driver chip is effectively reduced. .
  • whether to perform the slew boosting process is determined according to the data signals of the pixels in the adjacent rows, so that the slew boosting is only started when the data signals of the pixels in the adjacent rows change greatly.
  • Pressure processing can effectively reduce the power consumption of the display panel, and can be applied to display panels with different pixel structures, reuse most of the existing circuits, and reduce the chip area.
  • FIG. 15 is a schematic structural diagram of a display processing apparatus according to an embodiment of the present disclosure.
  • another embodiment of the present disclosure further provides a display processing apparatus, and the display processing apparatus 150 may include:
  • the acquisition module 151 is used to acquire the data signals of the current row of pixels and the next row of pixels of the current frame image;
  • the judging module 152 is configured to judge, according to the data signals of the pixels of the current row and the pixels of the next row, whether to perform slew boosting processing on the data signals of the pixels of the next row.
  • the display processing apparatus of the embodiment of the present disclosure determines whether to perform the slew boosting process according to the data signals of the pixels in the adjacent rows, so that the slew boosting is started only when the data signals of the pixels in the adjacent rows change greatly.
  • Pressure processing can effectively reduce the power consumption of the display panel, and can be applied to display panels with different pixel structures, reuse most of the existing circuits, and reduce the chip area.
  • the judging module 152 includes:
  • an extraction unit for extracting the most significant bits of the data signal corresponding to the two sub-pixels of each data channel in the current row of pixels and the next row of pixels;
  • the judgment unit is used for judging whether to perform slew boosting processing on the data signals of the pixels of the next row according to the most significant bits of the data signals of the two sub-pixels corresponding to the same data channel in the pixels of the current row and the pixels of the next row.
  • the judging unit includes:
  • the first operation subunit is used to perform XOR operation on the most significant bits of the data signals of the two subpixels corresponding to the same data channel in the current row of pixels and the next row of pixels to obtain the XOR operation result of each data channel;
  • the second operation subunit is used to perform AND operation and OR operation on the XOR operation results of every at least two consecutive data channels, respectively, to obtain several AND operation results and OR operation results;
  • the third operation subunit is used to perform AND operation on the several AND operation results to obtain a first logical result, and perform an AND operation on the several OR operation results to obtain a second logical result;
  • a judging subunit configured to judge whether to perform slew boosting processing on the data signals of the pixels in the next row according to the first logic result and the second logic result.
  • the judging subunit includes:
  • a first micro-unit configured to not perform slew boost processing on the data signals of the next row of pixels when both the first logic result and the second logic result are 0;
  • the second micro-unit is configured to, in the case that the first logic result is 1, the second logic result is 0, or the first logic result and the second logic result are both 1, perform a
  • the data signal of the pixel is subjected to slew boost processing.
  • the display processing device in the embodiment of the present disclosure is a device corresponding to the above-mentioned display processing method embodiment, which can implement each step of the above-mentioned display processing method and achieve the same technical effect. To avoid repetition, details are not repeated here.
  • An embodiment of the present application further provides a chip, where the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is configured to run a program or an instruction to implement the display processing method embodiments described above.
  • the chip includes a processor and a communication interface
  • the communication interface is coupled to the processor
  • the processor is configured to run a program or an instruction to implement the display processing method embodiments described above.
  • Still another embodiment of the present disclosure further provides a display panel, the display panel includes the display processing device described in the previous embodiment, and since the above-mentioned display processing device has the above-mentioned beneficial effects, the display panel in the embodiment of the present disclosure also Correspondence has the above beneficial effects, and in order to avoid repetition, details are not repeated here.

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Abstract

一种显示处理方法、显示处理装置及显示面板，包括：获取当前帧图像的当前行像素和下一行像素的数据信号（111）；根据当前行像素和下一行像素的数据信号，判断是否对下一行像素的数据信号进行压摆升压处理（112）。

Description

显示处理方法、显示处理装置及显示面板
相关申请的交叉引用
本申请主张在2020年12月14日在中国提交的中国专利申请号No.202011472161.2的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，具体涉及一种显示处理方法、显示处理装置及显示面板。
背景技术
相关技术中，为了增加驱动能力，使像素快速达到对应的电压值，通常会采用压摆升压技术(slew boost)，然而相关技术中的压摆升压技术中，即使在电压转换速率(Slew Rate，又称为压摆率)出现较小波动的情况下，依旧会启动压摆升压功能，这导致运行功耗的增加。
发明内容
有鉴于此，本公开提供一种显示处理方法、显示处理装置及显示面板。
本公开采用以下技术方案：
第一方面，本公开实施例提供了一种显示处理方法，包括：
获取当前帧图像的当前行像素和下一行像素的数据信号；
根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理。
可选的，所述根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理步骤包括：
提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位；
根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处 理。
可选的，所述根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理的步骤包括：
将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算，得到每一数据通道的异或运算结果；
将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，得到若干个与运算结果以及或运算结果；
将所述若干个与运算结果进行与运算，得到第一逻辑结果，将所述若干个或运算结果进行与运算，得到第二逻辑结果；
根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理。
可选的，所述根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理的步骤包括：
在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，不对下一行像素的数据信号进行压摆升压处理；
在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，对下一行像素的数据信号进行压摆升压处理。
第二方面，本公开实施例还提供了一种显示处理装置，包括：
获取模块，用于获取当前帧图像的当前行像素和下一行像素的数据信号；
判断模块，用于根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理。
可选的，所述判断模块包括：
提取单元，用于提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位；
判断单元，用于根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理。
可选的，所述判断单元包括：
第一运算子单元，用于将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算，得到每一数据通道的异或运算结果；
第二运算子单元，用于将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，得到若干个与运算结果以及或运算结果；
第三运算子单元，用于将所述若干个与运算结果进行与运算，得到第一逻辑结果，将所述若干个或运算结果进行与运算，得到第二逻辑结果；
判断子单元，用于根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理。
可选的，所述判断子单元包括：
第一微单元，用于在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，不对下一行像素的数据信号进行压摆升压处理；
第二微单元，用于在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，对下一行像素的数据信号进行压摆升压处理。
第三方面，本公开实施例提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如第一方面所述的显示处理方法。
第四方面，本公开实施例提供了一种显示面板，包括第二方面所述的显示处理装置。
附图说明
图1为本公开实施例提供的单栅型红绿蓝(Red,Green and Blue，RGB)像素结构的示意图；
图2为本公开实施例提供的单栅型红绿蓝白(Red,Green,Blue and White，RGBW)像素结构的的示意图；
图3为本公开实施例提供的双栅型RGB像素结构的示意图；
图4为本公开实施例提供的双栅型RGBW像素结构的示意图；
图5为单栅型RGB像素结构的输出电压波形之一；
图6为单栅型RGB像素结构的输出电压波形之二；
图7为单栅型RGB像素结构的输出电压波形之三；
图8为单栅型RGB像素结构的输出电压波形之四；
图9为单栅型RGB像素结构的输出电压波形之五；
图10为单栅型RGB像素结构的输出电压波形之六；
图11为本公开实施例提供的显示处理方法的流程示意图；
图12为本公开实施例提供的检测电路的示意图；
图13为本公开实施例提供的第一逻辑结果和第二逻辑结果的分类示意图；
图14为本公开实施例提供的采用电荷共享方法前后的显示驱动芯片的温度示意图；
图15为本公开实施例提供的一种显示处理装置的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
请参考图1-图4，图1为本公开实施例提供的单栅型RGB像素结构的示意图，图2为本公开实施例提供的单栅型RGBW像素结构的的示意图，图3为本公开实施例提供的双栅型RGB像素结构的示意图，图4为本公开实施例提供的双栅型RGBW像素结构的示意图。如图1-4所示，相关技术中，显示面板中的像素排布结构有单栅型RGB像素排布结构、单栅型RGBW像素排布结构、双栅型RGB像素排布结构、双栅型RGBW像素排布结构等等，相关技术中，不同像素排布结构的显示面板在进行显示时，在不借助额外的时序控制芯片(timing control chip，TCON)对显示图像进行侦测的情况下，即使显示输出信号出现较小的波动，显示面板依旧会启动压摆升压功能(所谓 压摆升压，即slew boost，或slew rate boost，可以减小电压变换所需的时间)，这无疑增加了运行的功耗，并且，若借助额外的时序控制芯片来进行侦测，也就意味着增加了电路/芯片设计的难度，同时增加了芯片的面积，功耗也相应增加。因此，如何在不需要额外的时序控制芯片的协助的情况下，通过对显示的帧画面数据进行判断，选择合适的启动压摆升压功能的时间点，同时使这样的解决方法可以运用于不同的像素排布结构的显示面板，最终降低芯片设计难度、降低运行功耗以及扩大应用场景，成为相关技术中亟待解决的问题。
请参考图5-图10，图5为单栅型RGB像素结构的输出电压波形之一，图6为单栅型RGB像素结构的输出电压波形之二，图7为单栅型RGB像素结构的输出电压波形之三，图8为单栅型RGB像素结构的输出电压波形之四，图9为单栅型RGB像素结构的输出电压波形之五，图10为单栅型RGB像素结构的输出电压波形之六。如图5-7所示，图中CH1～CH6对应于单栅型RGB像素结构的六个数据通道(即六列数据线)，图5中CH1和CH4中的驱动数据信号的极性相反，对应于第一列和第四列的红色子像素的数据信号的极性变化方式，图6中CH3和CH6中的驱动数据信号的极性相反，对应于第三列和第六列的蓝色子像素的数据信号的极性变化方式，图7中CH1和CH4中的驱动数据信号的极性相反，对应于第一列和第四列的红色子像素的数据信号的极性变化方式，CH3和CH6中的驱动数据信号的极性相反，对应于第三列和第六列的蓝色子像素的数据信号的极性变化方式，图8中则是奇数列子像素和偶数列子像素对应的数据通道中的驱动数据信号的极性相反，对应于奇数列子像素和偶数列子像素的数据信号的极性变化方式，图9中为奇数列子像素和偶数列子像素对应的数据通道中的驱动数据信号的极性相同，对应于奇数列子像素和偶数列子像素的数据信号的极性变化方式，图10中为奇数列子像素和偶数列子像素对应的数据通道中的驱动数据信号的极性均不发生变化。由上述各图可以知道，输出至显示面板的电压波形可以反映出不同子像素的各自对应的数据通道中的驱动数据信号的极性变化规律、同一数据通道中的驱动数据信号的数值变化情况等等，由此可以根据极性变化规律和数值变化情况等，选择合适的启动压摆升压处理功能的时间点，从而节省显 示面板的电力损耗。
由此，请参考图11，为本公开实施例提供的显示处理方法的流程示意图。如图11所示，本公开实施例中的显示处理方法具体可以包括：
步骤111：获取当前帧图像的当前行像素和下一行像素的数据信号。
请参考图12，为本公开实施例提供的检测电路的示意图。如图12所示，第一锁存器输出的数据信号输出至第二锁存器，第二锁存器输出的数据信号经由电平转换电路(level shifting circuit，L/S)以及放大器之后转换为具有极性的电平信号，并输出至对应的数据通道。由此，可以认为第二锁存器输出的数据信号即对应于当前行像素的数据信号，而第一锁存器输出的数据信号即对应于下一行像素的数据信号，从而即可从第二锁存器和第一锁存器获取当前帧图像的当前行像素和下一行像素的数据信号。本公开实施例中，第一锁存器、第二锁存器、电平转换电路和放大器组合构成转换电路，更具体的说为数模转换电路。
步骤112：根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理。
本公开实施例中，根据前述内容可知，输出至显示面板的电压波形可以反映出不同子像素的各自对应的数据通道中的驱动数据信号的极性变化规律和同一数据通道中的驱动数据信号的数值变化情况，由此可以根据极性变化规律和数值变化情况，判断出是否对下一行像素的数据信号进行压摆升压处理，例如，通过对当前行像素和下一行像素的数据信号进行分析，可以得知该两行像素的电压转换速率的波动值大小，从而根据波动值的大小来判断是否需要对下一行像素的数据信号进行压摆升压处理；从而，在当前行像素和下一行像素的数据信号的变化幅度满足预设阈值的情况下才对下一行像素的数据信号进行压摆升压处理，而在变化幅度不满足预设阈值的情况下则不对下一行像素的数据信号进行压摆升压处理，由此避免了在相邻行像素的电压转换速率出现较小波动的情况下依旧会启动压摆升压功能而导致的功耗增加的问题。
本公开实施例中，所述根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理步骤包括：
提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位；
根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理。
也就是说，在获取了当前帧图像的当前行像素和下一行像素的数据信号后，进一步的，需要提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位，其中，每一数据通道即对应于每一列子像素的数据线(由于本公开实施例中仅看当前行像素和下一行像素，因此一个数据通道中即仅对应两个子像素)，所谓最高有效位，即Most Significant Bit，简称MSB，其中，从第一锁存器和第二锁存器输出的数据信号为数字信号。由于数据信号的极性变化规律和数值变化情况可以通过最高有效位体现，因此本公开实施例中仅需要提取每一个数据信号中的最高有效位，即根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，便可以判断出是否对下一行像素的数据信号进行压摆升压处理。
本公开实施例中，所述根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理的步骤包括：
将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算，得到每一数据通道的异或运算结果；
将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，得到若干个与运算结果以及或运算结果；
将所述若干个与运算结果进行与运算，得到第一逻辑结果，将所述若干个或运算结果进行与运算，得到第二逻辑结果；
根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理。
请继续参考图12，在提取出当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位之后，先将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算， 得到每一数据通道的异或运算结果，由于每一行像素对应于M个数据通道(图中仅示出6个)，因此，经异或运算之后，将得到M个异或运算结果，其中M为正整数；本公开实施例中，进一步的，再将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，也就是说，M个异或运算结果可以以每相邻的至少两个连续通道的异或运算结果为一组，组内的异或运算结果分别进行与运算以及或运算，可选的，如图12所示，本公开实施例中以每连续的三个数据通道对应的异或运算结果为一组进行与运算以及或运算，当然，实际设计时，还可以采用2个数据通道对应的异或运算结果为一组，具体可以根据实际需求进行改变，这种改变也应当认为是本案中公开构思所涵盖的范围，由此，可以得到N个与运算结果和N个或运算结果(M＝3N)；最后，再将所述若干个与运算结果进行与运算，得到第一逻辑结果iCO，而将所述若干个或运算结果进行与运算，得到第二逻辑结果iHP，最终根据所述第一逻辑结果iCO和所述第二逻辑结果iHP，即可判断出是否对所述下一行像素的数据信号进行压摆升压处理。
从图12中的检测电路可以看到，本公开实施例中，每三个数据通道大致需要7个额外的逻辑闸即可实现上述的逻辑运算，完成相应数据信号的检测，因此对芯片电路的复杂程度几乎没有影响，也基本不增加成本，因此可以省去额外的时序控制芯片，节省电路占用面积，降低功耗。
本申请实施例中，所述根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理的步骤包括：
在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，不对下一行像素的数据信号进行压摆升压处理；
在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，对下一行像素的数据信号进行压摆升压处理。
也就是说，本公开实施例中，可以根据处理得到的第一逻辑结果和第二逻辑结果来判断是否需要对下一行像素的数据信号进行压摆升压处理。具体的，在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，认为当前行像素和下一行像素的电压转换速率相差不大，波动较小，因此不需要对下一 行像素的数据信号进行压摆升压处理；而在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，认为当前行像素和下一行像素的电压转换速率相差已经超过一定阈值，已出现较大的波动，因此需要对下一行像素的数据信号进行压摆升压处理。由此，通过上述判断方法，可以在下一行像素的电压整体出现较大幅度波动的情况下，才启动压摆升压功能，从而可以在保证显示画质的同时，大幅度减少功耗。
请参考图13，为本公开实施例提供的第一逻辑结果和第二逻辑结果的分类示意图。本公开的一些实施例中，在所述第一逻辑结果iCO和所述第二逻辑结果iHP均为0的情况下，此时对应的画面显示模式为非切换模式(Non toggle pattern)，即对应于白色、黑色等稳定画面，在该情况下，即不需要对下一行像素中各子像素的数据信号进行压摆升压处理；在所述第一逻辑结果iCO为1、所述第二逻辑结果iHP为0的情况下，此时对应的画面显示模式为色彩模式(Color pattern)，在该情况下，需要对下一行像素中各子像素的数据信号进行压摆升压处理；在所述第一逻辑结果iCO为1、所述第二逻辑结果iHP为1的情况下，此时对应的画面显示模式为全通道切换模式(All channel toggle pattern)，在该情况下，需要对下一行像素中各子像素的数据信号进行压摆升压处理。
本公开实施例中，开启压摆升压功能，可以通过将数据信号输送至放大器中的压摆升压电路中实现，关闭压摆升压功能，可以通过切断压摆升压电路实现，本公开实施例中，所述压摆升压电路为常规的压摆升压电路，本公开实施例不涉及对该压摆升压电路的改动，只是判断是否需要开启或关闭压摆升压功能并在需要开启时执行对应的动作。
请参考图14，为本公开实施例提供的采用显示处理方法前后的显示驱动芯片的温度示意图。如图14所示，通过测量采用了本公开实施例中的显示处理方法的显示驱动芯片和未采用本公开实施例中的显示处理方法的显示驱动芯片的温度，可以看到，采用了显示处理方法后，显示驱动芯片在红和蓝的图像显示中，温度能够降低6℃，而黑画面能降低2.75℃，白画面则可以降低3.5℃，由此可知，显示驱动芯片的功耗得到有效降低。
本公开实施例的显示处理方法，根据相邻行像素的数据信号来判断是否进行压摆升压处理，从而只在相邻行像素的数据信号出现大幅度的变化的情况下才启动压摆升压处理，可有效降低显示面板的功耗，并且可以应用在不同像素结构的显示面板上，复用大部分已有的电路，减小了芯片面积。
请参考图15，为本公开实施例提供的一种显示处理装置的结构示意图。如图15所示，本公开另一方面实施例还提供了一种显示处理装置，所述显示处理装置150可以包括：
获取模块151，用于获取当前帧图像的当前行像素和下一行像素的数据信号；
判断模块152，用于根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理。
本公开实施例的显示处理装置，根据相邻行像素的数据信号来判断是否进行压摆升压处理，从而只在相邻行像素的数据信号出现大幅度的变化的情况下才启动压摆升压处理，可有效降低显示面板的功耗，并且可以应用在不同像素结构的显示面板上，复用大部分已有的电路，减小了芯片面积。
可选的，所述判断模块152包括：
提取单元，用于提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位；
判断单元，用于根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理。
所述判断单元包括：
第一运算子单元，用于将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算，得到每一数据通道的异或运算结果；
第二运算子单元，用于将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，得到若干个与运算结果以及或运算结果；
第三运算子单元，用于将所述若干个与运算结果进行与运算，得到第一逻辑结果，将所述若干个或运算结果进行与运算，得到第二逻辑结果；
判断子单元，用于根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理。
可选的，所述判断子单元包括：
第一微单元，用于在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，不对下一行像素的数据信号进行压摆升压处理；
第二微单元，用于在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，对下一行像素的数据信号进行压摆升压处理。
本公开实施例中的显示处理装置为与上述显示处理方法实施例对应的装置，能够实现上述显示处理方法的各个步骤，且能达到相同的技术效果，为避免重复，在此不再赘述。
本申请实施例另提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现上述显示处理方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
本公开再一方面实施例还提供了一种显示面板，所述显示面板包括上实施例所述的显示处理装置，由于上述的显示处理装置具有上述有益效果，本公开实施例中的显示面板也对应具有上述有益效果，为避免重复，在此不再赘述。
以上所述是本公开的部分实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (10)

  1. 一种显示处理方法，包括：
    获取当前帧图像的当前行像素和下一行像素的数据信号；
    根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理。
  2. 根据权利要求1所述的显示处理方法，其中，所述根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理步骤包括：
    提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位；
    根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理。
  3. 根据权利要求2所述的显示处理方法，其中，所述根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理的步骤包括：
    将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算，得到每一数据通道的异或运算结果；
    将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，得到若干个与运算结果以及或运算结果；
    将所述若干个与运算结果进行与运算，得到第一逻辑结果，将所述若干个或运算结果进行与运算，得到第二逻辑结果；
    根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理。
  4. 根据权利要求3所述的显示处理方法，其中，所述根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理的步骤包括：
    在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，不对下一行 像素的数据信号进行压摆升压处理；
    在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，对下一行像素的数据信号进行压摆升压处理。
  5. 一种显示处理装置，包括：
    获取模块，用于获取当前帧图像的当前行像素和下一行像素的数据信号；
    判断模块，用于根据当前行像素和下一行像素的数据信号，判断是否对所述下一行像素的数据信号进行压摆升压处理。
  6. 根据权利要求5所述的显示处理装置，其中，所述判断模块包括：
    提取单元，用于提取当前行像素和下一行像素中每一数据通道的两个子像素对应的数据信号的最高有效位；
    判断单元，用于根据当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位，判断是否对所述下一行像素的数据信号进行压摆升压处理。
  7. 根据权利要求6所述的显示处理装置，其中，所述判断单元包括：
    第一运算子单元，用于将当前行像素和下一行像素中对应同一数据通道的两个子像素的数据信号的最高有效位进行异或运算，得到每一数据通道的异或运算结果；
    第二运算子单元，用于将每至少两个连续的数据通道的异或运算结果分别进行与运算以及或运算，得到若干个与运算结果以及或运算结果；
    第三运算子单元，用于将所述若干个与运算结果进行与运算，得到第一逻辑结果，将所述若干个或运算结果进行与运算，得到第二逻辑结果；
    判断子单元，用于根据所述第一逻辑结果和所述第二逻辑结果，判断是否对所述下一行像素的数据信号进行压摆升压处理。
  8. 根据权利要求7所述的显示处理装置，其中，所述判断子单元包括：
    第一微单元，用于在所述第一逻辑结果和所述第二逻辑结果均为0的情况下，不对下一行像素的数据信号进行压摆升压处理；
    第二微单元，用于在所述第一逻辑结果为1、所述第二逻辑结果为0，或者所述第一逻辑结果和所述第二逻辑结果均为1的情况下，对下一行像素的 数据信号进行压摆升压处理。
  9. 一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如权利要求1-4中任一项所述的显示处理方法。
  10. 一种显示面板，包括如权利要求5-8中任一项所述的显示处理装置。
PCT/CN2021/099730 2020-12-14 2021-06-11 显示处理方法、显示处理装置及显示面板 WO2022127053A1 (zh)

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