WO2022127014A1 - 数据传输方法、装置、存储介质及电子装置 - Google Patents

数据传输方法、装置、存储介质及电子装置 Download PDF

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WO2022127014A1
WO2022127014A1 PCT/CN2021/093929 CN2021093929W WO2022127014A1 WO 2022127014 A1 WO2022127014 A1 WO 2022127014A1 CN 2021093929 W CN2021093929 W CN 2021093929W WO 2022127014 A1 WO2022127014 A1 WO 2022127014A1
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bit data
data
target
processing
interleaving
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PCT/CN2021/093929
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English (en)
French (fr)
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田科
梁刚
李媛
边艳春
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浙江三维利普维网络有限公司
三维通信股份有限公司
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Publication of WO2022127014A1 publication Critical patent/WO2022127014A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • Embodiments of the present invention relate to the field of communications, and in particular, to a data transmission method, device, storage medium, and electronic device for a physical downlink control channel.
  • a channel used to transmit control signaling from a base station (eNodeB) to a terminal (UE) is called a Physical Downlink Control Channel (PDCCH).
  • the signaling that the PDCCH is mainly used to carry is downlink control information (Downlink Control Information, DCI), including scheduling information of uplink and downlink data transmission and power control commands of the terminal.
  • DCI Downlink Control Information
  • the UE can know which resource blocks the sender places the data needed by the terminal on and what modulation method is used to send the data. of. All these specific information are the basis for the receiving end to learn other data information. Only by accurately knowing the content of the DCI can the received information be further demodulated. Therefore, PDCCH is very important to the whole system, and directly affects downlink data transmission, including the application and allocation of data transmission resources, and the control of transmission power.
  • the processing process of the PDCCH at the transmitting end can be divided into two parts: bit-level processing and symbol-level processing, wherein the steps of symbol-level processing are described in detail in the 3GPP protocol specification.
  • the symbol-level processing speed of PDCCH determines the real-time performance of the entire system. Because symbol-level processing involves a relatively large amount of computation, and requires a large amount of memory to store the operation results in the middle of the function, this can ensure the clarity of the module call and the processing flow, but it will increase the time-consuming and Increased system complexity. Therefore, it is necessary to analyze and develop improved methods on the basis of traditional symbol-level processing algorithms.
  • the overall performance of the PDCCH link is improved, and the good performance of the entire system is laid.
  • Embodiments of the present invention provide a data transmission method, device, storage medium, and electronic device for a physical downlink control channel, so as to at least solve the problems in the related art that the physical downlink control channel takes a long time to transmit data, the system is complex, and a large amount of memory needs to be occupied. question.
  • a data transmission method for a physical downlink control channel including: scrambling target bit data to obtain first bit data; interleaving and cyclically interleaving the first bit data Shift processing to obtain second bit data; perform target processing on the second bit data to obtain target symbol data; send the target symbol data through the target antenna port of the base station that is set to transmit the target symbol data to the target terminal.
  • a data transmission device for a physical downlink control channel comprising: a scrambling module configured to perform scrambling processing on target bit data to obtain first bit data; interleaving and cyclic shifting A bit module, configured to perform interleaving and cyclic shift processing on the first bit data to obtain second bit data; a processing module, configured to perform target processing on the second bit data to obtain target symbol data; Sending The module is configured to send the target symbol data to the target terminal through the target antenna port of the base station configured to send the target symbol data.
  • a computer-readable storage medium is also provided, where a computer program is stored in the computer-readable storage medium, wherein, when the computer program is executed by a processor, any one of the above methods is implemented steps in the examples.
  • an electronic device comprising a memory and a processor, wherein the memory stores a computer program, the processor is configured to run the computer program to execute any of the above Steps in Method Examples.
  • scramble processing is performed on the target bit data, the scrambled first bit data is subjected to interleaving and cyclic shift processing to obtain the second bit data, and the second bit data is subjected to target processing to obtain target symbol data,
  • the target symbol data is sent to the target terminal through the target antenna port of the base station set to transmit the target symbol data. Since the bit data is interleaved and cyclically shifted, there is no need to interleave and cyclically shift the symbol data, which saves the data processing time, thereby reducing the data transmission time.
  • Target processing is performed on the second bit data to obtain the target symbol. Therefore, it can solve the problems in the related art that the physical downlink control channel takes a long time to transmit data, the system is complex, and a large amount of memory is required, so as to reduce the data transmission time and save the system memory and complexity.
  • FIG. 1 is a schematic diagram of the processing flow of the LTE downlink physical channel
  • FIG. 3 is a block diagram of a hardware structure of a mobile terminal according to a data transmission method for a physical downlink control channel according to an embodiment of the present invention
  • FIG. 4 is a flowchart of a data transmission method for a physical downlink control channel according to an embodiment of the present invention
  • FIG. 5 is a schematic flowchart of a data transmission method for a physical downlink control channel according to an exemplary embodiment of the present invention
  • FIG. 6 is a schematic diagram of a layer mapping process of two antennas according to an exemplary embodiment of the present invention.
  • FIG. 8 is a structural block diagram of a data transmission apparatus for a physical downlink control channel according to an embodiment of the present invention.
  • the PDCCH channel processing flow also includes bit-level processing and symbol-level processing.
  • the difference is that the PDCCH channel only supports one transport block message, which is obtained by DCI grouping.
  • the data information processed at the bit level is carried by the corresponding PDCCH, and then multiple PDCCHs are multiplexed on the available CCE logical resources.
  • Symbol-level processing is mainly to perform scrambling, modulation, precoding, layer mapping, interleaving and cyclic shift processing on the bit data stream, and then map it to the corresponding time-frequency grid, and finally send it out through the antenna.
  • the process includes:
  • a new scrambled signal is obtained by multiplying a pseudorandom scrambling code sequence and a codeword sequence.
  • the scrambling sequence is a PN sequence (Pseudo-Noise Sequence, pseudo-noise sequence).
  • the PN code can randomize the interference between data and can resist the interference.
  • the PDCCH channel supports QPSK, corresponding to 2 bits per modulation symbol.
  • Layer mapping Rearrange the coded and modulated data streams according to certain rules, and map the independent codewords to the spatial concept layer.
  • This spatial conceptual layer is a transit point to the physical antenna ports. Through such conversion, the original serial data stream has a preliminary concept of space.
  • Precoding It is to map layer data to different antenna ports, different subcarriers, and different time slots in order to achieve the purpose of diversity or multiplexing.
  • Resource mapping on each antenna port, the precoded data is mapped to a two-dimensional physical resource (RE) composed of subcarriers and time slots.
  • RE physical resource
  • the input to the symbol-level processing is the bit stream information, and after the scrambling module, it is still the bit stream information.
  • the bit stream will be modulated into IQ (in-phase quadrature) symbol data.
  • PDCCH uses QPSK modulation, that is, 2 bits will be modulated into a set of IQ data. The real part and the imaginary part each occupy 16 bits, and a total of 32 bits are required storage.
  • the data stream will be interleaved and cyclically shifted according to certain requirements through the layer mapping and precoding module processing, and then mapped to the frequency resource table according to the resource mapping format, and then the OFDM symbol will be generated, and the CP will be inserted.
  • the port is sent out.
  • the precoded data needs to be interleaved and cyclically shifted again, which means that the symbol-level IQ data must be interleaved and cyclically shifted, which undoubtedly increases the channel processing time, and
  • the interleaving and cyclic shift processing of IQ data requires additional storage space for buffering, which also increases the requirements for system storage space.
  • the present invention proposes the following embodiments to solve the problems existing in the related art.
  • FIG. 3 is a block diagram of a hardware structure of a mobile terminal according to a data transmission method for a physical downlink control channel according to an embodiment of the present invention.
  • the mobile terminal may include one or more (only one is shown in FIG.
  • processor 302 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 304 configured to store data, wherein the above-mentioned mobile terminal may further include a transmission device 306 and an input/output device 308 configured as a communication function.
  • a processing device such as a microprocessor MCU or a programmable logic device FPGA
  • a memory 304 configured to store data
  • the above-mentioned mobile terminal may further include a transmission device 306 and an input/output device 308 configured as a communication function.
  • the structure shown in FIG. 3 is only for illustration, and it does not limit the structure of the above-mentioned mobile terminal.
  • the mobile terminal may further include more or less components than those shown in FIG. 3 , or have a different configuration than that shown in FIG. 3 .
  • the memory 304 may be configured to store computer programs, for example, software programs and modules of application software, such as computer programs corresponding to the data transmission method of the physical downlink control channel in the embodiment of the present invention.
  • a computer program thereby executing various functional applications and data processing, implements the above-mentioned method.
  • Memory 304 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
  • the memory 304 may further include memory located remotely from the processor 302, and these remote memories may be connected to the mobile terminal through a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
  • Transmission device 306 is arranged to receive or transmit data via a network.
  • the specific example of the above-mentioned network may include a wireless network provided by a communication provider of the mobile terminal.
  • the transmission device 306 includes a network adapter (Network Interface Controller, NIC for short), which can be connected to other network devices through a base station so as to communicate with the Internet.
  • the transmission device 306 may be a radio frequency (Radio Frequency, RF for short) module, which is configured to communicate with the Internet in a wireless manner.
  • RF Radio Frequency
  • FIG. 4 is a flowchart of a data transmission method for a physical downlink control channel according to an embodiment of the present invention. As shown in FIG. 4 , the process includes the following steps :
  • Step S402 scrambling the target bit data to obtain the first bit data
  • Step S404 performing interleaving and cyclic shift processing on the first bit data to obtain second bit data
  • Step S406 performing target processing on the second bit data to obtain target symbol data
  • Step S408 Send the target symbol data to the target terminal through the target antenna port of the base station set to send the target symbol data.
  • the target processing may be one or more of modulation processing, layer mapping processing or precoding processing.
  • modulation processing may be Processing and precoding processing are combined into one processing module, so that data can be cached only once during data processing, saving memory.
  • FIG. 5 a schematic flowchart of the data transmission method of the physical downlink control channel can be seen in FIG. 5.
  • the modulation, layer mapping and And the precoding module function is combined into one function implementation. Since the PDCCH channel only handles single-stream data, and uses QPSK for modulation. QPSK debugging corresponds to a 2-bit message modulated into a set of IQ data, and the modulated IQ data will undergo layer mapping processing and precoding processing. Combining modulation, layer mapping and precoding together, three module functions can be achieved through one function.
  • the execution subject of the above steps may be a base station, a processor, etc., but is not limited thereto.
  • performing interleaving and cyclic shift processing on the first bit data to obtain the second bit data includes: performing interleaving processing on the first bit data according to a first predetermined byte; performing an interleaving process on the first bit data; The interleaved first bit data is subjected to cyclic shift processing according to a second predetermined byte to obtain the second bit data.
  • the interleaving cyclic shift function can be transplanted after scrambling.
  • each group of IQ data is stored as 32 bits, and one REG needs 32*4 bits for the interleaving operation, which not only occupies more
  • the memory also increases the processing time of the interleaving module.
  • a cyclic shift operation needs to be performed, which is also performed for the REG group.
  • the IQ data on each RE is obtained by modulation of 2 bits.
  • a group of REGs is composed of 4 REs. It is equivalent to requiring an 8-bit data stream, so the interleaved REG group is packaged by the 8-bit data stream and then obtained by QPSK modulation.
  • 8bit is exactly one byte. After the scrambling module, it can be directly interleaved according to the byte, and then cyclically shifted according to the byte to obtain the bit data stream after interleaving and shifting, and directly modulate the bit stream. Layer mapping, precoding function, just get the IQ data of resource mapping.
  • bit stream data In the case of bit stream data, the symbol-level interleaving and cyclic shifting functions are completed, and only the bit stream data needs to be operated. Compared with the symbol-level IQ data, it only needs to occupy 1/16 of the space of the symbol-level data. In the same way, the processing time is saved, the real-time performance of the system is improved, and the reduced processing links also reduce the probability of errors in the design process.
  • the method before performing interleaving processing on the first bit data according to a first predetermined byte, the method further includes: determining a first length of the first bit data; based on the first The length determines the first predetermined bytes.
  • the interleaving and cyclic shift processing may be performed according to bytes, that is, before the interleaving processing is performed on the first bit data according to the first predetermined byte, the first length of the first bit data may be determined, and the first length of the first bit data may be determined according to the first The length determines the first predetermined bytes.
  • the first predetermined byte may be 1 byte or 2 bytes, and the present invention does not limit the first predetermined byte.
  • the method before performing cyclic shift processing on the first bit data after the interleaving process according to a second predetermined byte, the method further includes: determining a a first length, the second predetermined byte is determined based on the first length; or a second length of the first bit data after the interleaving process is determined, and the second predetermined byte is determined based on the second length Two predetermined bytes.
  • the second predetermined byte may be determined according to the first length of the first bit data, or the second predetermined byte may be determined according to the second length of the interleaved first bit data.
  • the first predetermined byte may be 1 byte or 2 bytes, and the present invention does not limit the second predetermined byte.
  • performing target processing on the second bit data to obtain target symbol data includes: in the case that the base station is a single-antenna base station, performing target modulation on the second bit data to obtain target symbol data. first symbol data; determining the first symbol data as the target symbol data.
  • the layer mapping process and the precoding process are transparently transmitted, and no operation is required. Therefore, the single-antenna system can directly omit the two modules of layer mapping and precoding.
  • the target modulation can be QPSK modulation
  • performing target processing on the second bit data to obtain target symbol data includes: in the case that the base station is a multi-antenna base station, determining preset parameters of the base station, wherein the The preset parameters include parameters determined based on modulation parameters, precoding parameters and transmit power of the base station; initial symbol data is obtained by multiplying the second bit data by the preset parameters; The symbol data is converted to obtain the target symbol data.
  • the layer mapping process only arranges the single-stream data into two layers in an odd-even manner.
  • the arrangement of the modulated IQ symbol data can be changed, and the debugged data can be directly stored according to the parity rule.
  • the PDCCH channel only supports transmit diversity precoding in the multi-antenna model, and the first data path of the two-antenna transmit diversity precoding is the data after direct transparent transmission layer mapping, and the second path data is the data multiplied by the layer mapping. output with the corresponding factor.
  • These two processes can be combined into the modulation process.
  • the essence of the modulation process is to multiply the bit stream data by the modulation parameters.
  • the modulation parameters, precoding coefficients, and power control factors are all fixed data for the PDCCH channel. Therefore, after modulation, the IQ data can be directly multiplied by the corresponding coefficients and then output according to a certain format, and finally the data for resource mapping is required.
  • the layer mapping principle is as follows: transmit diversity is adopted for the PDCCH channel, and the corresponding layer mapping method is shown in Table 2.
  • the PDCCH channel only supports a single codeword in layer mapping, and the number of layers to be mapped is the same as the number of antenna ports transmitted by the physical channel.
  • the schematic diagram of the layer mapping process of the two antennas can be seen in FIG. 6 .
  • the symbol-level processing is optimized in two places.
  • the first optimization is to combine the three processing modules of modulation, layer mapping, and precoding into one module
  • the second optimization is to combine the symbol data
  • the interleaving and cyclic shifting processes are advanced to the bit-level data completion.
  • the time-consuming of PDCCH channel processing is saved, and at the same time, the interaction of processing modules is reduced and storage space is saved.
  • a data transmission device for a physical downlink control channel is also provided, and the device is configured to implement the above-mentioned embodiments and preferred implementations, and what has been described will not be repeated.
  • the term "module” may be a combination of software and/or hardware that implements a predetermined function.
  • the apparatus described in the following embodiments is preferably implemented in software, implementations in hardware, or a combination of software and hardware, are also possible and contemplated.
  • FIG. 8 is a structural block diagram of a data transmission apparatus for a physical downlink control channel according to an embodiment of the present invention. As shown in FIG. 8 , the apparatus includes:
  • the scrambling module 82 is configured to perform scrambling processing on the target bit data to obtain the first bit data;
  • the interleaving and cyclic shifting module 84 is configured to perform interleaving and cyclic shifting processing on the first bit data to obtain the second bit data;
  • a processing module 86 configured to perform target processing on the second bit data to obtain target symbol data
  • the sending module 88 is configured to send the target symbol data to the target terminal through the target antenna port of the base station configured to send the target symbol data.
  • the interleaving and cyclic shifting module 84 includes: an interleaving unit configured to perform interleaving processing on the first bit data according to a first predetermined byte; a cyclic shifting unit configured to perform interleaving processing on the first bit data The interleaved first bit data is subjected to cyclic shift processing according to a second predetermined byte to obtain the second bit data.
  • the apparatus may be configured to determine a first length of the first bit data before performing interleaving processing on the first bit data according to a first predetermined byte; based on the first The length determines the first predetermined bytes.
  • the apparatus may be further configured to determine the first bit data before performing cyclic shift processing on the first bit data after the interleaving process according to a second predetermined byte
  • the first length of the first bit data, the second predetermined byte is determined based on the first length; or the second length of the first bit data after the interleaving process is determined, and the second length is determined based on the second length.
  • the second predetermined byte is determined based on the first length.
  • the processing module 86 may perform target processing on the second bit data to obtain target symbol data by: in the case that the base station is a single-antenna base station, perform target processing on the second bit data.
  • the second bit data is subjected to target modulation to obtain first symbol data; and the first symbol data is determined as the target symbol data.
  • the processing module 86 may perform target processing on the second bit data to obtain target symbol data by: in the case that the base station is a multi-antenna base station, determining the The preset parameters of the base station, wherein the preset parameters include parameters determined based on the modulation parameters, precoding parameters and transmit power of the base station; the initial symbol is obtained by multiplying the second bit data by the preset parameters data; converting the initial symbol data according to a predetermined format to obtain the target symbol data.
  • the above modules can be implemented by software or hardware, and the latter can be implemented in the following ways, but not limited to this: the above modules are all located in the same processor; or, the above modules can be combined in any combination The forms are located in different processors.
  • Embodiments of the present invention further provide a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.
  • the above-mentioned computer-readable storage medium may include, but is not limited to, a USB flash drive, a read-only memory (Read-Only Memory, referred to as ROM for short), and a random access memory (Random Access Memory, referred to as RAM for short) , mobile hard disk, magnetic disk or CD-ROM and other media that can store computer programs.
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • An embodiment of the present invention also provides an electronic device, comprising a memory and a processor, where a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any of the above method embodiments.
  • the above-mentioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the above-mentioned processor, and the input-output device is connected to the above-mentioned processor.
  • modules or steps of the present invention can be implemented by a general-purpose computing device, which can be centralized on a single computing device, or distributed in a network composed of multiple computing devices
  • they can be implemented in program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, can be performed in a different order than shown here.
  • the described steps, or they are respectively made into individual integrated circuit modules, or a plurality of modules or steps in them are made into a single integrated circuit module to realize.
  • the present invention is not limited to any particular combination of hardware and software.

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Abstract

本发明实施例提供了一种物理下行控制信道的数据传输方法、装置、存储介质及电子装置，其中，该方法包括：对目标比特数据进行加扰处理，以得到第一比特数据；对第一比特数据进行交织及循环移位处理，以得到第二比特数据；对第二比特数据进行目标处理，以得到目标符号数据；通过设置为发送目标符号数据的基站的目标天线端口将目标符号数据发送给目标终端。通过本发明，解决了相关技术中存在的物理下行控制信道传输数据耗时长、系统复杂、需要占用大量内存的问题，达到减少数据传输时间、节约系统内存及复杂度的效果。

Description

数据传输方法、装置、存储介质及电子装置 技术领域
本发明实施例涉及通信领域，具体而言，涉及一种物理下行控制信道的数据传输方法、装置、存储介质及电子装置。
背景技术
在LTE通信系统中，用来传输从基站(eNodeB)到终端(UE)的控制信令的通道称为物理下行控制信道(Physical Downlink Control Channel，PDCCH)。PDCCH主要用来承载的信令是下行控制信息(Downlink Control Information，DCI)，包括上下行数据传输的调度信息和终端的功率控制命令。具体地来说，PDCCH只有将DCI从eNodeB端发送到UE端，并且由UE端准确接收，UE端才能知道发送端将终端需要的数据放在哪些资源块上、使用了什么调制方式来发送数据的。所有这些具体的信息是接收端获知其他数据信息的基础，只有准确获知DCI的内容，才能进一步解调接收到的信息。因此，PDCCH对于整个系统来说非常重要，直接影响下行链路的数据传输，包括数据传输资源的申请和分配，以及发送功率的控制。
将PDCCH在发送端的处理过程可以分成比特级处理和符号级处理两部分，其中，符号级处理的步骤在3GPP协议规范中有详细的描述。在实际开发过程中，PDCCH的符号级处理速度决定了整个系统的实时性。由于符号级处理涉及的运算量比较大，而且需要通过大量的内存来存储函数中间的运算结果，这样做能够确保模块调用的条理清晰性，不遗漏处理流程，但是会造成了耗时的增加和系统复杂度的提高。所以，需要在传统的符号级处理算法基础上，分析和研发改进方法，通过简化处理流程，降低发送端的设计复杂度，从而提高PDCCH链路的整体性能，为整个系统的良好性能打下基础。
由此可知，相关技术中存在物理下行控制信道传输数据耗时长、系统 复杂、需要占用大量内存的问题。
发明内容
本发明实施例提供了一种物理下行控制信道的数据传输方法、装置、存储介质及电子装置，以至少解决相关技术中存在的物理下行控制信道传输数据耗时长、系统复杂、需要占用大量内存的问题。
根据本发明的一个实施例，提供了一种物理下行控制信道的数据传输方法，包括：对目标比特数据进行加扰处理，以得到第一比特数据；对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据；对所述第二比特数据进行目标处理，以得到目标符号数据；通过设置为发送所述目标符号数据的基站的目标天线端口将所述目标符号数据发送给目标终端。
根据本发明的另一个实施例，提供了一种物理下行控制信道的数据传输装置，包括：加扰模块，设置为对目标比特数据进行加扰处理，以得到第一比特数据；交织及循环移位模块，设置为对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据；处理模块，设置为对所述第二比特数据进行目标处理，以得到目标符号数据；发送模块，设置为通过设置为发送所述目标符号数据的基站的目标天线端口将所述目标符号数据发送给目标终端。
根据本发明的又一个实施例，还提供了一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，其中，所述计算机程序被处理器执行时实现上述任一项方法实施例中的步骤。
根据本发明的又一个实施例，还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
通过本发明，对目标比特数据进行加扰处理，将加扰后的第一比特数据进行交织循环移位处理，以得到第二比特数据，对第二比特数据进行目标处理，得到目标符号数据，通过设置为发送目标符号数据的基站的目标 天线端口将目标符号数据发送给目标终端。由于对比特数据进行交织及循环移位处理，无需对符号数据进行交织及循环移位处理，节省了数据处理时间，从而减少了数据传输时间，对第二比特数据进行目标处理，以得到目标符号数据，节约了系统内存，因此，可以解决相关技术中存在的物理下行控制信道传输数据耗时长、系统复杂、需要占用大量内存的问题，达到减少数据传输时间、节约系统内存及复杂度的效果。
附图说明
图1是LTE下行物理信道处理流程示意图；
图2是PDCCH的符号级处理的流程示意图；
图3是本发明实施例的一种物理下行控制信道的数据传输方法的移动终端的硬件结构框图；
图4是根据本发明实施例的物理下行控制信道的数据传输方法的流程图；
图5是根据本发明示例性实施例的物理下行控制信道的数据传输方法的流程示意图；
图6是根据本发明示例性实施例的两天线的层映射过程示意图；
图7是根据本发明示例性实施例的两天线的预编码过程示意图；
图8是根据本发明实施例的物理下行控制信道的数据传输装置的结构框图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明的实施例。
需要说明的是，本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
在3GPP协议中，LTE下行物理信道处理流程示意图可参见附图1， 如图1所示，从架构上整个处理流程可以分为两部分，比特级处理和符号级处理。其中比特级处理主要完成传输块的CRC、信道编码、速率匹配等，符号级处理主要完成加扰、调制、预编码、层映射、资源映射等。
PDCCH信道处理流程也包含比特级处理和符号级处理，区别在于PDCCH信道只支持一个传输块消息，由DCI组包得到。比特级处理的数据信息由相应的PDCCH承载，然后多个PDCCH复用在可用CCE逻辑资源上。符号级处理，主要是将比特数据流进行加扰、调制、预编码、层映射、交织和循环移位处理，继而映射到对应的时频格上，最终通过天线发送出去。
PDCCH的符号级处理的流程示意图可参见附图2，如图2所示，该流程包括：
加扰：是使用伪随机扰码序列与码字序列相乘得到新的加扰后的信号。扰码序列是一种PN序列(Pseudo-Noise Sequence，伪噪声序列)。PN码可以将数据间的干扰随机化，可以对抗干扰。
数据调制：PDCCH信道支持QPSK，分别对应每个调制符号2个比特。
层映射：是将编码调制后的数据流按照一定规则重新排列，将彼此独立的码字映射到空间概念层上。这个空间概念层是到物理天线端口的中转站。通过这样的转换，原来串行的数据流就有了初步的空间概念。
预编码：是将层数据映射到不同的天线端口，不同的子载波上，不同的时隙上，以便实现分集或复用的目的。
资源映射：在每个天线端口上，将预编码后的数据对应在子载波和时隙组成的二维物理资源(RE)上。
输入到符号级处理的是bit流信息，经过加扰模块后，仍然为bit流信息。经过调制模块处理，会将bit流调制成IQ(同相正交)符号数据，PDCCH采用的是QPSK调制，即将2bit会调制成一组IQ数据，实部和虚部各占16bit，总共需要32bit寄存器进行存储。调制结束后会经过层映射和预编 码模块处理将数据流按照一定的要求进行交织和循环移位，然后按照资源映射格式映射到频率资源表中，再生成OFDM符号，插入CP，然后从各个天线端口发送给出去。
传统的处理流程存在两个问题：
一、在进行资源映射之前需要对预编码之后的数据再次进行交织和循环移位处理，这就意味着要对符号级IQ数据进行交织和循环移位操作，无疑增加了信道处理的时间，而且对IQ数据的交织和循环移位处理需要额外增加存储空间进行缓存，也提高了对系统存储空间的要求。
二、传统的符号级处理流程需要经过调制、层映射、预编码等过程，如果按照协议约定模块方式进行处理会导致信道处理时间增加，同时需要更多的存储空间对每一个模块的输出数据进行缓存，增加了系统对内存的要求，繁琐的处理模块也会导致出错概率提升。
针对相关技术中存在的上述问题，本发明提出了以下实施例以解决相关技术中存在的问题。
本申请实施例中所提供的方法实施例可以在移动终端、计算机终端或者类似的运算装置中执行。以运行在移动终端上为例，图3是本发明实施例的一种物理下行控制信道的数据传输方法的移动终端的硬件结构框图。如图3所示，移动终端可以包括一个或多个(图3中仅示出一个)处理器302(处理器302可以包括但不限于微处理器MCU或可编程逻辑器件FPGA等的处理装置)和设置为存储数据的存储器304，其中，上述移动终端还可以包括设置为通信功能的传输设备306以及输入输出设备308。本领域普通技术人员可以理解，图3所示的结构仅为示意，其并不对上述移动终端的结构造成限定。例如，移动终端还可包括比图3中所示更多或者更少的组件，或者具有与图3所示不同的配置。
存储器304可设置为存储计算机程序，例如，应用软件的软件程序以及模块，如本发明实施例中的物理下行控制信道的数据传输方法对应的计算机程序，处理器302通过运行存储在存储器304内的计算机程序，从而 执行各种功能应用以及数据处理，即实现上述的方法。存储器304可包括高速随机存储器，还可包括非易失性存储器，如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实例中，存储器304可进一步包括相对于处理器302远程设置的存储器，这些远程存储器可以通过网络连接至移动终端。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
传输设备306设置为经由一个网络接收或者发送数据。上述的网络具体实例可包括移动终端的通信供应商提供的无线网络。在一个实例中，传输设备306包括一个网络适配器(Network Interface Controller，简称为NIC)，其可通过基站与其他网络设备相连从而可与互联网进行通讯。在一个实例中，传输设备306可以为射频(Radio Frequency，简称为RF)模块，其设置为通过无线方式与互联网进行通讯。
在本实施例中提供了一种物理下行控制信道的数据传输方法，图4是根据本发明实施例的物理下行控制信道的数据传输方法的流程图，如图4所示，该流程包括如下步骤：
步骤S402，对目标比特数据进行加扰处理，以得到第一比特数据；
步骤S404，对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据；
步骤S406，对所述第二比特数据进行目标处理，以得到目标符号数据；
步骤S408，通过设置为发送所述目标符号数据的基站的目标天线端口将所述目标符号数据发送给目标终端。
在上述实施例中，目标处理可以为调制处理、层映射处理或预编码处理中的一个或多个，当目标处理为调制处理、层映射处理和预编码处理时，可以将调制处理、层映射处理和预编码处理合成一个处理模块，这样，在数据处理时，可以仅缓存一次数据，节约了内存。
在上述实施例中，当目标处理为调制处理、层映射处理和预编码处理 时，物理下行控制信道的数据传输方法的流程示意图可参见附图5，如图5所示，将调制、层映射和预编码模块功能合并为一个函数实现。由于PDCCH信道只处理单码流数据，并且采用QPSK进行调制。QPSK调试对应2比特消息调制成一组IQ数据，经过调制之后的IQ数据会进行层映射处理和预编码处理。将调制、层映射和预编码合并到一起，通过一个函数可以实现三个模块功能。
可选地，上述步骤的执行主体可以是基站、处理器等，但不限于此。
通过本发明，对目标比特数据进行加扰处理，将加扰后的第一比特数据进行交织循环移位处理，以得到第二比特数据，对第二比特数据进行目标处理，得到目标符号数据，通过设置为发送目标符号数据的基站的目标天线端口将目标符号数据发送给目标终端。由于对比特数据进行交织及循环移位处理，无需对符号数据进行交织及循环移位处理，节省了数据处理时间，从而减少了数据传输时间，对第二比特数据进行目标处理，以得到目标符号数据，节约了系统内存，因此，可以解决相关技术中存在的物理下行控制信道传输数据耗时长、系统复杂、需要占用大量内存的问题，达到减少数据传输时间、节约系统内存及复杂度的效果。
在一个示例性实施例中，对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据包括：按照第一预定字节对所述第一比特数据进行交织处理；对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理，以得到所述第二比特数据。在本实施例中，可以将交织循环移位功能移植到加扰之后完成。由于交织功能是针对REG单元进行的，在传统的处理方法中交织模块放到预编码功能之后，即IQ数据每组存储为32bit，一个REG就需要32*4bit进行交织操作，不仅占用了更多地内存同时也增加了交织模块的处理时间。交织功能完成后还需要进行循环移位操作，同样是针对REG组进行，这两个功能会使整个PDCCH信道处理耗时增加，影响系统的实时性。由以上分析可知，每组REG由4个RE组成，QPSK调制时每2bit得到一组IQ数据，因此每个RE上的IQ数据是由2bit进行调制得到，那么一组REG由4个RE组成，相当于需 要8bit的数据流，所以交织的REG组是由8bit数据流打包后再经过QPSK调制得到。而8bit正好就是一个字节，在加扰模块后，可以直接按照字节进行交织，然后再按照字节进行循环移位，得到了交织移位后的bit数据流，直接对比特流进行调制，层映射，预编码功能，正好得到资源映射的IQ数据。在比特流数据的情况下就完成了符号级交织和循环移位功能，只需要对比特流数据进行操作即可，相对于符号级IQ数据，只需要占用符号级数据的1/16空间即可，同理也就节省了处理时间，提高了系统的实时性，同时减少的处理环节也降低了设计过程中出错的概率。
在一个示例性实施例中，在按照第一预定字节对所述第一比特数据进行交织处理之前，所述方法还包括：确定所述第一比特数据的第一长度；基于所述第一长度确定所述第一预定字节。在本实施例中，可以按照字节进行交织及循环移位处理，即可以在按照第一预定字节对第一比特数据进行交织处理之前，确定第一比特数据的第一长度，根据第一长度确定第一预定字节。例如，第一预定字节可以为1字节，也可以为2字节，本发明对第一预定字节不作限制。
在一个示例性实施例中，在对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理之前，所述方法还包括：确定所述第一比特数据的第一长度，基于所述第一长度确定所述第二预定字节；或者，确定进行所述交织处理后的所述第一比特数据的第二长度，基于所述第二长度确定所述第二预定字节。在本实施例中，可以根据第一比特数据的第一长度确定第二预定字节，也可以根据交织处理后的第一比特数据的第二长度确定第二预定字节。其中，第一预定字节可以为1字节，也可以为2字节，本发明对第二预定字节不做限制。
在一个示例性实施例中，对所述第二比特数据进行目标处理，以得到目标符号数据包括：在所述基站为单天线基站的情况下，对所述第二比特数据进行目标调制以得到第一符号数据；将所述第一符号数据确定为所述目标符号数据。在本实施例中，对于单天线基站系统而言，层映射处理和 预编码处理都是透传的，不需要任何操作，因此，单天线系统可以直接省略层映射和预编码两个模块。直接对第二比特数据进行目标调制处理，其中，目标调制可以为QPSK调制，QPSK调制原理如下：QPSK调制将2比特数据b(i),b(i+1)映射到复数调制符号x上，其中x＝I+jQ。如表1所示。
表1
Figure PCTCN2021093929-appb-000001
在一个示例性实施例中，对所述第二比特数据进行目标处理，以得到目标符号数据包括：在所述基站为多天线基站的情况下，确定所述基站的预设参数，其中，所述预设参数包括基于所述基站的调制参数、预编码参数及发射功率确定的参数；将所述第二比特数据与所述预设参数相乘得到初始符号数据；按照预定格式对所述初始符号数据进行转换，以得到所述目标符号数据。在本实施例中，对于多天线基站，如两天线基站系统，由于PDCCH信道只支持单码流数据，因此，层映射过程只是将单码流数据按照奇偶方式排列到两层，这个过程是对调制后的IQ符号数据进行排列方式的改变，可以直接对调试后的数据按照奇偶规则进行存储即可。PDCCH信道在多天线模型下只支持发射分集的预编码，而且两天线的发射分集预编码的第一路数据是直接透传层映射之后的数据，第二路数据是对层映射之后的数据乘以相应的因子后输出。这两个过程都可以合并到调制过程中进行，调制的过程实质就是对比特流数据乘以调制参数得到，而调制参数，预编码系数，包括功控因子对于PDCCH信道而言都是固定的数据，因此可以在进行调制后直接对IQ数据乘以相应的系数然后按照一定的格式进行输出，最终需要进行资源映射的数据。
其中，层映射原理如下：为PDCCH信道采用发射分集，对应的层映射方法如表2所示。PDCCH信道在层映射中仅仅支持单码字，映射的层数与物理信道发射的天线端口数目相同。其中，两天线的层映射过程示意 图可参见附图6。
表2
Figure PCTCN2021093929-appb-000002
预编码原理如下：PDCCH信道的预编码只支持发射分集的传输模型，对于层映射之后的数据进行预编码处理过程为
Figure PCTCN2021093929-appb-000003
发射分集的预编码处理分为两天线和四天线两种情况。其中，两天线的预编码过程示意图可参见附图7。
在前述实施例中，将符号级处理进行了两处优化，第一处的优化是将调制、层映射、预编码这三个处理模块合并为一个模块，第二处的优化是将符号数据的交织和循环移位处理过程提前到比特级数据完成。在满足协议要求的基础上，节省了PDCCH信道处理的耗时，同时，减少了处理模块交互节省了存储空间。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如 ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本发明各个实施例所述的方法。
在本实施例中还提供了一种物理下行控制信道的数据传输装置，该装置设置为实现上述实施例及优选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图8是根据本发明实施例的物理下行控制信道的数据传输装置的结构框图，如图8所示，该装置包括：
加扰模块82，设置为对目标比特数据进行加扰处理，以得到第一比特数据；
交织及循环移位模块84，设置为对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据；
处理模块86，设置为对所述第二比特数据进行目标处理，以得到目标符号数据；
发送模块88，设置为通过设置为发送所述目标符号数据的基站的目标天线端口将所述目标符号数据发送给目标终端。
在一个示例性实施例中，所述交织及循环移位模块84包括：交织单元，设置为按照第一预定字节对所述第一比特数据进行交织处理；循环移位单元，设置为对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理，以得到所述第二比特数据。
在一个示例性实施例中，所述装置可以设置为在按照第一预定字节对所述第一比特数据进行交织处理之前，确定所述第一比特数据的第一长度；基于所述第一长度确定所述第一预定字节。
在一个示例性实施例中，所述装置还可以设置为在对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理之前，确定 所述第一比特数据的第一长度，基于所述第一长度确定所述第二预定字节；或者，确定进行所述交织处理后的所述第一比特数据的第二长度，基于所述第二长度确定所述第二预定字节。
在一个示例性实施例中，所述处理模块86可以通过如下方式实现对所述第二比特数据进行目标处理，以得到目标符号数据：在所述基站为单天线基站的情况下，对所述第二比特数据进行目标调制以得到第一符号数据；将所述第一符号数据确定为所述目标符号数据。
在一个示例性实施例中，所述处理模块86可以通过如下方式实现对所述第二比特数据进行目标处理，以得到目标符号数据：在所述基站为多天线基站的情况下，确定所述基站的预设参数，其中，所述预设参数包括基于所述基站的调制参数、预编码参数及发射功率确定的参数；将所述第二比特数据与所述预设参数相乘得到初始符号数据；按照预定格式对所述初始符号数据进行转换，以得到所述目标符号数据。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
本发明的实施例还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序，其中，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
在一个示例性实施例中，上述计算机可读存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，简称为ROM)、随机存取存储器(Random Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等各种可以存储计算机程序的介质。
本发明的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述 任一项方法实施例中的步骤。
在一个示例性实施例中，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例，本实施例在此不再赘述。
显然，本领域的技术人员应该明白，上述的本发明的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种物理下行控制信道的数据传输方法，包括：
    对目标比特数据进行加扰处理，以得到第一比特数据；
    对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据；
    对所述第二比特数据进行目标处理，以得到目标符号数据；
    通过设置为发送所述目标符号数据的基站的目标天线端口将所述目标符号数据发送给目标终端。
  2. 根据权利要求1所述的方法，其中，对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据包括：
    按照第一预定字节对所述第一比特数据进行交织处理；
    对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理，以得到所述第二比特数据。
  3. 根据权利要求2所述的方法，其中，对按照第一预定字节对所述第一比特数据进行交织处理之前，所述方法还包括：
    确定所述第一比特数据的第一长度；
    基于所述第一长度确定所述第一预定字节。
  4. 根据权利要求3所述的方法，其中，对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理之前，所述方法还包括：
    确定所述第一比特数据的第一长度，基于所述第一长度确定所述第二预定字节；或者，
    确定进行所述交织处理后的所述第一比特数据的第二长度，基于所述第二长度确定所述第二预定字节。
  5. 根据权利要求1所述的方法，其中，对所述第二比特数据进 行目标处理，以得到目标符号数据包括：
    在所述基站为单天线基站的情况下，对所述第二比特数据进行目标调制以得到第一符号数据；
    将所述第一符号数据确定为所述目标符号数据。
  6. 根据权利要求1所述的方法，其中，对所述第二比特数据进行目标处理，以得到目标符号数据包括：
    在所述基站为多天线基站的情况下，确定所述基站的预设参数，其中，所述预设参数包括基于所述基站的调制参数、预编码参数及发射功率确定的参数；
    将所述第二比特数据与所述预设参数相乘得到初始符号数据；
    按照预定格式对所述初始符号数据进行转换，以得到所述目标符号数据。
  7. 一种物理下行控制信道的数据传输装置，包括：
    加扰模块，设置为对目标比特数据进行加扰处理，以得到第一比特数据；
    交织及循环移位模块，设置为对所述第一比特数据进行交织及循环移位处理，以得到第二比特数据；
    处理模块，设置为对所述第二比特数据进行目标处理，以得到目标符号数据；
    发送模块，设置为通过设置为发送所述目标符号数据的基站的目标天线端口将所述目标符号数据发送给目标终端。
  8. 根据权利要求7所述的装置，其中，所述交织及循环移位模块包括：
    交织单元，设置为按照第一预定字节对所述第一比特数据进行交织处理；
    循环移位单元，设置为对进行所述交织处理后的所述第一比特数据按照第二预定字节进行循环移位处理，以得到所述第二比特数据。
  9. 一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，其中，所述计算机程序被处理器执行时实现所述权利要求1至6任一项中所述的方法。
  10. 一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行所述权利要求1至6任一项中所述的方法。
PCT/CN2021/093929 2020-12-18 2021-05-14 数据传输方法、装置、存储介质及电子装置 WO2022127014A1 (zh)

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