WO2022124732A1 - Electronic device having upf for processing packets, and operation method thereof - Google Patents

Abstract

Various embodiments of the present invention relate to a method and device for processing packets in a user plane function (UPF) in a wireless communication system. An electronic device having a UPF comprises a communication interface and a processor including a processing module, wherein the processor can: confirm the size of cache memory available to the processing module at the time of the initial driving of the UPF; group a plurality of function modules included in the processing module into a plurality of sub-processing modules on the basis of the size of the cache memory; and set a packet processing size related to packet processing in each of the sub-processing modules on the basis of the size of the cache memory. Various other embodiments may also be possible.

Description

Electronic device of UPF for processing packet and method of operation thereof

Various embodiments of the present invention relate to an apparatus and method for processing a packet in an electronic device of a user plane function (UPF).

Efforts are being made to develop an improved 5th generation (5G) communication system, or a pre-5G communication system, in order to meet the increasing demand for wireless data traffic after commercialization of the 4G (4th generation) communication system. For this reason, the 5G communication system or the pre-5G communication system is called a 4G network after (Beyond 4G Network) communication system or an LTE (Long Term Evolution) system after (Post LTE) system.

In order to achieve high data rates, the 5G communication system uses a band of less than 6 gigabytes (6 GHz) (eg about 1.8 GHz band or about 3.5 GHz band) or a band of 6 gigabytes (6 GHz) or more (eg about 28 GHz band or about 39 GHz). band) is being considered. In the 5G communication system, in order to alleviate the path loss of radio waves and increase the propagation distance of radio waves, beamforming, massive MIMO, Full Dimensional MIMO (FD-MIMO), and array antenna (array antenna), analog beam-forming (analog beam-forming), and large-scale antenna (large scale antenna) technologies are being discussed.

In addition, in the 5G communication system, for network improvement of the system, an evolved small cell, an advanced small cell, a cloud radio access network (cloud radio access network, cloud RAN), an ultra-dense network (ultra-dense network) ), Device to Device communication (D2D), wireless backhaul, moving network, cooperative communication, Coordinated Multi-Points (CoMP), and reception interference cancellation ) and other technologies are being developed.

In addition, in the 5G communication system, FQAM (Hybrid Frequency Shift Keying and Quadrature Amplitude Modulation) and SWSC (Sliding Window Superposition Coding), which are advanced coding modulation (Advanced Coding Modulation, ACM) methods, and Filter Bank Multi (FBMC), an advanced access technology, Carrier), Non Orthogonal Multiple Access (NOMA), and Sparse Code Multiple Access (SCMA) are being developed.

In the 5G communication system, support for various services is being considered compared to the existing 4G communication system. For example, representative services in the 5G communication system include enhanced mobile broad band (eMBB), ultra-reliable and low latency communication (URLLC), and large-scale device-to-device communication services. (mMTC: massive machine type communication) or a next-generation broadcast service (eMBMS: evolved multimedia broadcast/multicast Service) may be included.

The 5G communication system may include a network structure in which a plane (or a control plane) for processing a control signal and a plane (or a user plane) for processing data are divided.

In a network structure in which the control plane function and the user plane function are separated, the user plane function may be responsible for data packet transmission. Accordingly, in the wireless communication system, a method for efficiently processing data packets while reducing transmission delay of data packets in a user plane function (UPF) is required.

Various embodiments of the present invention disclose an apparatus and method for efficiently processing a packet in an electronic device of a user plane function (UPF) of a wireless communication system.

According to various embodiments, an electronic device of a user plane function (UPF) in a wireless communication system includes a processor including a communication interface and a processing module, and the processor is configured to: Check the size of the cache memory usable by the processing module, group a plurality of function modules included in the processing module based on the size of the cache memory into a plurality of sub processing modules, each based on the size of the cache memory You can set the packet processing size related to packet processing in the sub processing module of .

According to various embodiments, the method of operating an electronic device of a user plane function (UPF) in a wireless communication system includes checking the size of a cache memory usable by a processing module included in a processor of the UPF when the UPF is initially driven. Grouping a plurality of functional modules included in the processing module into a plurality of sub-processing modules based on the operation and the size of the cache memory, and packet processing in each sub-processing module based on the size of the cache memory It may include an operation of setting a related packet processing size.

According to various embodiments of the present invention, a processing module is grouped into a plurality of sub processing modules based on the size of the cache memory of the processing module in a user plane function (UPF) of a wireless communication system, and each sub By sequentially processing data (or packets) of a packet processing size (eg, batch size) set based on the size of the cache memory in the processing module, contention of data for occupying the cache memory is reduced, and data pre-fetch -fetch) technology can increase the efficiency.

1 illustrates a structure of a 5G network, according to various embodiments.

2 is a block diagram of a network entity, in accordance with various embodiments;

3 is a block diagram of the processor of FIG. 2 in accordance with various embodiments.

4 is a flowchart for setting a variable related to packet processing in a network entity according to various embodiments of the present disclosure;

5 is a flowchart for grouping a processing module into a plurality of sub processing modules in a network entity according to various embodiments of the present disclosure;

6 is a flowchart for processing a packet in a network entity according to various embodiments.

7 is a flowchart for processing a packet using a sub-processing module in a network entity according to various embodiments of the present disclosure;

8 is a structure for processing a packet in a network entity according to various embodiments of the present disclosure;

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In this case, it should be noted that in the accompanying drawings, the same components are denoted by the same reference numerals as much as possible. In addition, detailed descriptions of well-known functions and configurations that may obscure the gist of the present invention will be omitted.

In describing the embodiments in the present specification, descriptions of technical contents that are well known in the technical field to which the present invention pertains and are not directly related to the present invention will be omitted. This is to more clearly convey the gist of the present invention without obscuring the gist of the present invention by omitting unnecessary description.

For the same reason, some components are exaggerated, omitted, or schematically illustrated in the accompanying drawings. In addition, the size of each component does not fully reflect the actual size. In each figure, the same or corresponding elements are assigned the same reference numerals.

Advantages and features of the present invention, and a method for achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout.

At this time, it will be understood that each block of the flowchart diagrams and combinations of the flowchart diagrams may be performed by computer program instructions. These computer program instructions may be embodied in a processor of a general purpose computer, special purpose computer, or other programmable data processing equipment, such that the instructions performed by the processor of the computer or other programmable data processing equipment are not described in the flowchart block(s). It creates a means to perform functions. These computer program instructions may also be stored in a computer-usable or computer-readable memory that may direct a computer or other programmable data processing equipment to implement a function in a particular manner, and thus the computer-usable or computer-readable memory. It is also possible that the instructions stored in the flow chart block(s) produce an article of manufacture containing instruction means for performing the function described in the flowchart block(s). The computer program instructions may also be mounted on a computer or other programmable data processing equipment, such that a series of operational steps are performed on the computer or other programmable data processing equipment to create a computer-executed process to create a computer or other programmable data processing equipment. It is also possible that instructions for performing the processing equipment provide steps for performing the functions described in the flowchart block(s).

Additionally, each block may represent a module, segment, or portion of code that includes one or more executable instructions for executing specified logical function(s). It should also be noted that in some alternative implementations it is also possible for the functions recited in blocks to occur out of order. For example, two blocks shown one after another may be performed substantially simultaneously, or the blocks may sometimes be performed in the reverse order according to a corresponding function.

In this case, the term '~ unit' used in this embodiment means software or hardware components such as FPGA or ASIC, and '~ unit' performs certain roles. However, '-part' is not limited to software or hardware. '~' may be configured to reside on an addressable storage medium or may be configured to refresh one or more processors. Accordingly, as an example, '~' indicates components such as software components, object-oriented software components, class components, and task components, and processes, functions, properties, and procedures. , subroutines, segments of program code, drivers, firmware, microcode, circuitry, data, databases, data structures, tables, arrays, and variables. The functions provided in the components and '~ units' may be combined into a smaller number of components and '~ units' or further separated into additional components and '~ units'. In addition, components and '~ units' may be implemented to play one or more CPUs in a device or secure multimedia card.

Various embodiments of this document and terms used therein are not intended to limit the technical features described in this document to a specific embodiment, but it should be understood to include various modifications, equivalents, or substitutions of the embodiments. In connection with the description of the drawings, like reference numerals may be used for similar or related components. The singular form of the noun corresponding to the item may include one or more of the item, unless the relevant context clearly dictates otherwise. As used herein, "A or B", "at least one of A and B", "at least one of A or B", "A, B or C", "at least one of A, B and C", and "A , B, or C" each may include any one of the items listed together in the corresponding one of the phrases, or all possible combinations thereof. Terms such as "first", "second", or "first" or "second" may be used simply to distinguish the element from other elements in question, and may refer to elements in other aspects (e.g., importance or order) is not limited. It is said that one (eg, first) component is "coupled" or "connected" to another (eg, second) component, with or without the terms "functionally" or "communicatively". When referenced, it means that one component can be connected to the other component directly (eg by wire), wirelessly, or through a third component.

The term “module” used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is, for example, used interchangeably with terms such as logic, logic block, component, or circuit. can be used A module may be an integrally formed part or a minimum unit or a part of the part that performs one or more functions. For example, according to an embodiment, the module may be implemented in the form of an application-specific integrated circuit (ASIC).

According to various embodiments, each component (eg, a module or a program) of the above-described components may include a singular or a plurality of entities, and some of the plurality of entities may be separately disposed in other components. . According to various embodiments, one or more components or operations among the above-described corresponding components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (eg, a module or a program) may be integrated into one component. In this case, the integrated component may perform one or more functions of each component of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. . According to various embodiments, operations performed by a module, program, or other component are executed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations are executed in a different order, omitted, or , or one or more other operations may be added.

Hereinafter, the base station, as a subject performing resource allocation of the terminal, is at least one of a Node B, a base station (BS), an eNB (eNode B), a gNB (gNode B), a radio access unit, a base station controller, or a node on the network. can The terminal may include a user equipment (UE), a mobile station (MS), a cellular phone, a smart phone, a computer, or a multimedia system capable of performing a communication function. In addition, the embodiment of the present disclosure may be applied to other communication systems having a similar technical background or channel type to the exemplary embodiment of the present disclosure described below. In addition, the embodiments of the present disclosure may be applied to other communication systems through some modifications within a range that does not significantly depart from the scope of the present disclosure as judged by a person having skilled technical knowledge.

A term for identifying an access node used in the following description, a term referring to a network entity or NF (network function), a term referring to messages, a term referring to an interface between network objects, various Terms and the like referring to identification information are exemplified for convenience of description. Accordingly, the present invention is not limited to the terms described below, and other terms referring to objects having equivalent technical meanings may be used.

For convenience of description, some terms and names defined in the 3rd generation partnership project long term evolution (3GPP) standard may be used. However, the present invention is not limited by the terms and names defined in the 3GPP standard, and can be equally applied to systems conforming to other standards.

Embodiments of the present invention provide a configuration for processing a packet provided from another network entity (eg, RAN 115) in a user plane function (UPF) 125 in 5GC (5G Core).

According to various embodiments, a wireless communication system evolves from a 4G communication system to a 5G communication system (or a new radio (NR) system), and a Next Gen (generation) Core (NG Core) or 5GC that is a new core network (5G core network) is defined. The new core network may be configured as a network function (NF) by virtualizing all existing network entities (NE). According to an embodiment of the present disclosure, a network function may mean a network entity, a network component, and a network resource.

1 shows the structure of a 5G network 100 according to various embodiments of the present invention.

Referring to FIG. 1 , according to various embodiments, a description of network entities or network nodes constituting the 5G network 100 is as follows.

According to an embodiment, the 5G network 100 may include the NFs 115 to 175 shown in FIG. 1 . However, the 5G network 100 is not limited to the example of FIG. 1 , and may include a larger number of NFs or a smaller number of NFs than the NFs shown in FIG. 1 .

According to various embodiments, (R) AN ((radio) access network) 115 is a subject that performs radio resource allocation of the terminal 110, eNode B, Node B, BS (base station), NG-RAN (next generation radio access network), 5G-AN (access network), may be at least one of a radio access unit, a base station controller, or a node on the network. For example, the terminal 110 may include a user equipment (UE), a next generation UE (NG UE), a mobile station (MS), a cellular phone, a smart phone, a computer, or a multimedia system capable of performing a communication function. can In the following description, an embodiment of the present invention will be described using a 5G communication system as an example, but the embodiment of the present disclosure may be applied to other communication systems having a similar technical background. In addition, the embodiments of the present invention may be applied to other communication systems through some modifications within a range that does not significantly depart from the scope of the present invention as judged by a person having skilled technical knowledge.

According to various embodiments, the access and mobility management function (AMF) 120 may be a network function for managing the mobility of the terminal 110 .

According to various embodiments, the session management function (SMF) 130 may be a network function for managing a packet data network (PDN) connection provided to the terminal 110 . For example, the PDN connection may be referred to as a protocol data unit (PDU) session.

According to various embodiments, the policy control function (PCF) 150 may be a network function that applies at least one of a service policy of a mobile communication operator to the terminal 110 , a charging policy, and a policy for a PDU session.

According to various embodiments, the unified data management (UDM) 155 may be a network function that stores information about a subscriber.

According to various embodiments, the network exposure function (NEF) 140 may be a function of providing information about the terminal 110 to a server outside the 5G network 100 . In addition, the NEF 140 may provide information necessary for a service to the 5G network 100 and provide a function of storing the information in a user data repository (UDR) (not shown).

According to various embodiments, the user plane function (UPF) 125 may function as a gateway for transferring user data (eg, PDU) to the data network (DN) 175 . According to an embodiment, Nupf, which is a service based interface (SBI), is defined in the UPF 125 and may provide an event exposure service to other NFs through this.

According to various embodiments, the network repository function (NRF) 145 may perform a function of discovering the NF.

According to various embodiments, the authentication server function (AUSF) 165 may perform terminal authentication in the 3GPP access network and the non-3GPP access network.

According to various embodiments, the network slice selection function (NSSF) 135 may perform a function of selecting a network slice instance provided to the terminal 140 .

According to various embodiments, the service communication proxy (SCP) 170 may provide an indirect communication method that substitutes for a service search, call, or response in interworking between NFs.

According to various embodiments, the data network (DN) 175 may be a data network through which the terminal 110 transmits and receives data in order to use a service of a network operator or a 3rd party service.

2 is a block diagram of a network entity, in accordance with various embodiments; According to one embodiment, the network entity of FIG. 2 may be the UPF 125 of FIG. 1 . 3 is an internal block diagram of the processor 200 of FIG. 2 according to various embodiments. For example, the UPF 125 of FIG. 2 may include an electronic device operating as the UPF 125 in a wireless communication system.

Referring to FIG. 2 , according to various embodiments, the UPF 125 may include a processor 200 , a memory 210 , and/or a communication interface 220 .

According to various embodiments, the processor 200 may be configured to control and/or manage the operation of the UPF 125 . According to an embodiment, the processor 200 includes a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field It may be a field programmable gate array (FPGA) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. The processor 200 may implement or execute the various illustrative logical blocks, modules, and circuits described with reference to the disclosure herein. For example, the processor 200 may be implemented as a combination of one or more microprocessors, or a combination of a DSP and a microprocessor.

According to various embodiments, when the UPF 125 is applied to a wireless communication system and initially driven, the processor 200 may check the size of a cache memory usable in the internal configuration of the UPF 125 . According to one embodiment, the processor 200 may check information related to the size of the cache memory usable in the plurality of processing modules (310-1, 310-2, or 310-n), as shown in FIG. 3 . For example, information related to the size of the cache memory may be predefined when the UPF 125 is produced, or may be obtained from the processing modules 310-1, 310-2, or 310-n when the UPF 125 is initially driven. .

According to various embodiments, the processor 200 may group (or divide) a plurality of functional modules included in a processing module for packet processing in the UPF 125 into a plurality of sub-processing modules. According to an embodiment, the processor 200 determines when the UPF 125 is applied to the wireless communication system and initially driven, the internal configuration of the UPF 125 (eg, processing modules 310 - 1 , 310 - 2 and/or or 310-n)) is changed, when the protocol type processed by the processing modules 310-1, 310-2 and/or 310-n is changed, or when a predefined period arrives, the processing module A plurality of functional modules included in (processing module) may be grouped (or divided) into a plurality of sub-processing modules.

According to an embodiment, the processor 200 may include a plurality of processing modules 310-1, 310-2, and/or 310-n, as shown in FIG. 3 . Processor 200 based on the size of the cache memory usable in the processing modules (310-1, 310-2, or 310-n) each processing module (310-1, 310-2, or 310-n) Function modules included in n) may be grouped (or divided) into a plurality of sub-processing modules. For example, in the sub-processing module, the size of the cache memory required to process the packet in the sub-processing module exceeds the size of the cache memory available in the processing module (310-1, 310-2, or 310-n) It may include at least one function module set not to do so. For example, a function module may represent an independent software module with a single responsibility. For example, the processing modules 310-1, 310-2, and/or 310-n may use a cache memory of the same size. For example, each sub-processing module may use a cache memory having the same size as a cache memory usable in the processing module 310-1, 310-2, or 310-n. For example, n may represent the number of processing modules 310 - 1 , 310 - 2 , and/or 310 - n included in the processor 200 .

According to an embodiment, the processor 200 performs hyper-threading to group (or divide) each processing module 310-1, 310-2, or 310-n into a plurality of sub-processing modules. ) function application, packet protocol type, or whether data processed by each function module exists in the same cache line may be additionally considered. For example, when the processor 200 uses the hyper-threading function in the processing modules 310-1, 310-2, or 310-n, each processing module 310-1, 310-2, or , 310-n) to operate as two logical processing modules. When the processor 200 uses the hyper-threading function, when the size of the cache memory available in the processing modules 310-1, 310-2, or 310-n does not use the hyper-threading function, the processing module It can be determined to be half the size of the cache memory available in the ones (310-1, 310-2, or 310-n). Accordingly, the processor 200 determines whether the processing modules 310-1, 310-2, or 310-n use the hyper-threading function of each processing module 310-1, 310-2, or , 310-n) of the cache memory usable in the processing modules (310-1, 310-2, or, 310-n) considered for grouping (or dividing) the functional modules included in a plurality of sub-processing modules Size can be adaptively judged. For example, the processor 200 may be configured to process each of the processing modules 310-1, 310-2, 310-1, 310-2, or Alternatively, in 310-n), the number of groupable sub-processing modules may be checked. The processor 200 is the number of sub-processing modules that can be grouped based on the protocol type of the packet is grouped based on the size of the cache memory available in the processing modules (310-1, 310-2, or 310-n) When the number of sub-processing modules is exceeded, the plurality of processing modules 310-1, 310-2, and/or 310-n may be set as processing modules for processing the protocol type of the packet. In this case, each processing module (310-1, 310-2, and/or 310-n) is the size of the cache memory usable in the processing modules (310-1, 310-2, or, 310-n) may be grouped based on For example, the protocol type of the packet may include at least one of transmission control protocol (TCP), user datagram protocol (UDP), internet protocol version 4 (IPv4), and internet protocol version 6 (IPv6).

According to various embodiments, the processor 200 may set a packet size (eg, a packet processing size or a batch size) that each sub-processing module can process during one cycle. According to an embodiment, the processor 200 determines when the UPF 125 is applied to the wireless communication system and is initially driven, the internal configuration of the UPF 125 (eg, processing modules 310-1, 310-2 and/or 310-n)) is changed, when the protocol type processed by the processing modules 310-1, 310-2 and/or 310-n is changed, or when a predefined period arrives, the sub-processing module You can set (or update) the packet size that can be processed in one cycle.

According to an embodiment, the processor 200 may process the sub-processing module for one cycle based on the size of the cache memory available in the processing modules 310-1, 310-2, or 310-n. You can set the packet size. For example, the size of the packet that can be processed during one cycle in the sub-processing module is determined by pre-fetching data of the next sub-processing module while ensuring the cache hit rate of data accessed by the sub-processing module. It can be set to a size that can ensure the application efficiency of the function. That is, the processor 200 may set the packet size that the sub-processing module can process for one cycle so that cache memory contention between data used in the sub-processing module and the pre-fetched data related to the next sub-processing module does not occur. have.

According to an embodiment, the processor 200 determines whether the hyper-threading function is applied, the size of a vector, a cycle required for each function, or a cache to set the size of a packet that can be processed by the sub-processing module for one cycle. At least one of the sizes of the lines may be additionally considered. For example, when the processor 200 uses a vector-based packet processing method, the vector is a processing unit that can be processed at once by the processing modules 310-1, 310-2, or 310-n, It may include multiple packets of the same or similar protocol. For example, the cycle required for each function may include information required until the data pre-fetched in the sub-processing module is actually used in the next sub-processing module. For example, the size of the cache line may include a size at which the sub-processing module can store data in the cache memory at one time.

According to various embodiments, when receiving a packet from another network entity (eg, the RAN 115 ), the processor 200 may configure packets of the same or similar protocol into one vector. According to an embodiment, when the distribution module 300 of the processor 200 receives a packet from another network entity (eg, the RAN 115), packets of the same or similar protocol may be configured into one vector. . For example, the length of the vector may be fixed or set variably based on at least one of a type of a packet or an amount of a packet received from another network entity.

According to various embodiments, the processor 200 is configured to process at least one of the plurality of processing modules 310-1, 310-2, and 310-n based on the protocol of the vector (or packet) for processing the corresponding vector. Modules 310-1, 310-2 and/or 310-n may be selected. According to an embodiment, the processor 200 (or the distribution module 300 ) is configured to configure a first one of the plurality of processing modules 310 - 1 , 310 - 2 and 310 - n based on a protocol of a vector (or packet). The processing module 310-1 may be selected. The first processing module 310-1 may sequentially process the data of the first region corresponding to the packet processing size (or batch size) of the vectors through each of the plurality of sub-processing modules. When the first processing module 310-1 finishes processing the first region through the plurality of sub-processing modules, the first processing module 310 - 1 corresponds to the packet processing size (or batch size) of the vectors through each of the plurality of sub-processing modules. Data of a second area different from the area may be sequentially processed.

According to various embodiments, the memory 210 may include information used by at least one component of the UPF 125 (eg, the processor 200 and/or the communication interface 220 ) or information received from other network entities. information can be stored. According to an embodiment, the memory 210 may store various instructions that may be executed through the processor 200 .

According to various embodiments, communication interface 220 may be configured to transmit and/or receive signals between UPF 125 and other network entities. For example, the communication interface 220 may transmit and/or receive signals (or data) via the RAN 115 and the N3 interface. For example, the communication interface 220 may transmit and/or receive signals (or data) via the SNF 130 and the N4 interface. For example, communication interface 220 may transmit and/or receive signals (or data) via DN 175 and N6 interfaces.

According to various embodiments of the present disclosure, an electronic device of a user plane function (UPF) (eg, UPF 125 of FIG. 1 or FIG. 2 ) of a wireless communication system may include a communication interface (eg, communication interface 220 of FIG. 2 ). )) and a processor including a processing module (eg, the processing module 310-1, 310-2 or 310-n of FIG. 3) (eg, the processor 200 of FIG. 2)); , when the UPF is initially driven, the processor checks a size of a cache memory usable by the processing module, and assigns a plurality of function modules included in the processing module to a plurality of sub-processing modules based on the size of the cache memory grouped into groups, and a packet processing size related to packet processing in each sub processing module may be set based on the size of the cache memory.

According to various embodiments, the processor additionally considers at least one of whether a hyper-threading function is applied, a protocol type of a packet, or whether data processed by each function module exists in the same cache line. The plurality of function modules included in the processing module may be grouped into the plurality of sub-processing modules.

According to various embodiments, the processor determines the number of groupable sub-processing groups based on the protocol type of the packet, and the number of groupable sub-processing groups based on the protocol type of the packet determines the size of the cache memory. When the number of sub-processing modules divided based on ? is exceeded, a plurality of processing modules including the processing module may be set as processing modules for processing the protocol type.

According to various embodiments, the processor may set the packet processing size by additionally considering at least one of whether hyper-threading is applied, a size of a vector, a cycle required for each function, or a size of a cache line.

According to various embodiments, when receiving a plurality of packets from another network entity, the processor generates a vector including the plurality of packets, and when the processing module is selected based on a protocol type of the packet, the The vector may be processed through the processing module based on the sub-processing modules and the packet processing size.

According to various embodiments, the processing module processes a packet of a first region corresponding to the packet processing size of the vector through a first sub-processing module among the plurality of sub-processing modules, and the plurality of sub-processing modules The packet of the first area may be processed through a second sub-processing module among the modules.

According to various embodiments, when the plurality of sub-processing modules process the packet of the first region, the processing module may be configured to, through the first sub-processing module, have a different packet processing size than the first region of the vector. A packet of the second area corresponding to ' may be processed, and the packet of the second area may be processed through the second sub-processing module.

According to various embodiments, the other network entity may include a radio access network (RAN) or a data network (DN).

According to various embodiments, the processor performs the sub-processing based on at least one of a time when the internal configuration of the UPF is changed, a time when a protocol type processed by the processing module is changed, or a time when a predefined period arrives. You can group modules or set the packet processing size.

According to various embodiments, the wireless communication system may include a 5th generation (5G) communication system.

4 is a flowchart 400 for setting variables related to packet processing in a network entity according to various embodiments of the present disclosure. Operations in the following embodiments may be sequentially performed, but are not necessarily sequentially performed. For example, the order of the operations may be changed, and at least two operations may be performed in parallel. As an example, the network entity of FIG. 4 may be the UPF 125 of FIG. 1 or 2 .

Referring to FIG. 4 , according to various embodiments, the network entity (eg, the UPF 125 of FIG. 1 or the processor 200 of FIG. 2 ) may check whether the network entity is initially driven in operation 401 . According to an embodiment, when power is applied to the UPF 125 , the processor 200 of the UPF 125 may check whether the UPF 125 is initially driven. For example, the initial driving may include a series of operations in which the UPF 125 is installed in a wireless communication network and initially driven.

According to various embodiments, when the network entity (eg, UPF 125 or processor 200) is initially driven (eg, 'Yes' in operation 401), in operation 403, a processing module (eg, FIG. You can check information related to the size of the cache memory usable in the processing module (310-1, 310-2, or 310-n) of 3). For example, information related to the size of the cache memory may be predefined when the UPF 125 is produced or obtained from the processing module 310 - 1 , 310 - 2 or 310 -n when the UPF 125 is initially driven.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) performs a processing module (eg, the processing module 310 - 1 , 310 - 2 , or 310 - n of FIG. 3 ) in operation 405 . )), the functional modules included in the processing module may be grouped (or divided) into a plurality of sub-processing modules based on the size of the available cache memory. According to an embodiment, the processor 200 determines that the size of the cache memory required to process a packet in each sub-processing module is usable in the processing modules 310-1, 310-2, or 310-n. At least one function module may be grouped in sub-processing module units so as not to exceed the size of the cache memory. For example, the processor 200 groups (or divides) the function modules included in the processing module into a plurality of sub-processing modules so that at least one function module included in the sub-processing module minimizes contention in the cache memory of data accessed by the processing module. )can do. For example, a function module may represent an independent software module with a single responsibility.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) performs a processing module (eg, the processing module 310 - 1 , 310 - 2 , or 310 - n of FIG. 3 ) in operation 407 . )), you can set the packet size (eg, packet processing size or batch size) to be processed during one cycle in the sub-processing module based on the size of the cache memory available. According to one embodiment, the processor 200 is a size that can ensure the application efficiency of the data pre-fetch function of the next sub-processing module while the cache hit rate (cache hit rate) of the data accessed by each sub-processing module is guaranteed. You can set the packet processing size.

According to various embodiments, when the network entity (eg, the UPF 125 or the processor 200) is not initially driven (eg, 'No' in operation 401), the network entity (eg, 'No' in operation 401) is configured to set variables related to packet processing. One embodiment may end. In this case, the network entity may acquire information related to the sub-processing module and/or information related to the batch size set at the time of initial operation.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) includes not only the initial starting time of the UPF 125 , but also the internal configuration of the UPF 125 (eg, the processing module 310 - 1 , 310-2 and/or 310-n)) is changed, a time when the protocol type processed by the processing modules 310-1, 310-2 and/or 310-n is changed, or a predefined period arrives. You can set (or update) variables related to packet processing at a point in time. For example, the variable related to packet processing may include at least one of the number of grouped sub-processing modules or the size of a packet to be processed by the sub-processing module for one period.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) applies the hyper-threading function to set the size of a packet that can be processed for one cycle in the sub-processing module, and the size of the vector. , at least one of the cycle required for each function, or the size of the cache line may be additionally considered.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200) groups each processing module 310-1, 310-2, or 310-n into a plurality of sub processing modules ( or partition), at least one of whether the hyper-threading function is applied, the protocol type of the packet, or whether data processed by each function module exists in the same cache line may be additionally considered.

5 is a flowchart 500 for grouping a processing module into a plurality of sub-processing modules in a network entity according to various embodiments of the present disclosure. According to an embodiment, the operations of FIG. 5 may be detailed operations of operation 405 of FIG. 4 . Operations in the following embodiments may be sequentially performed, but are not necessarily sequentially performed. For example, the order of the operations may be changed, and at least two operations may be performed in parallel. As an example, the network entity of FIG. 5 may be the UPF 125 of FIG. 1 or 2 .

Referring to FIG. 5 , according to various embodiments, a network entity (eg, the UPF 125 of FIG. 1 or the processor 200 of FIG. 2 ) may identify a protocol type related to a processing module for grouping in operation 501 . have. For example, the protocol type associated with the processing module may include a protocol type of a packet to be processed by the processing module. For example, the protocol type of the packet may include at least one of TCP, UDP, IPv4, and IPv6.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) performs a processing module (eg, the processing module 310-1 of FIG. 3 , based on the protocol type associated with the processing module in operation 503 ). In 310-2 or 310-n)), the first number of groupable sub-processing modules may be identified. For example, the first number of sub-processing modules is the number of sub-processing modules required to process a packet of a protocol type related to the processing module in the processing module, and may be set based on the number of functions for processing packets.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) performs the processing module (eg, the processing module 310 of FIG. 3 ) based on the size of the cache memory available in the processing module in operation 505 . The second number of sub-processing modules grouped in -1, 310-2, or 310-n)) may be identified. For example, in the second number of sub-processing modules, the size of the cache memory required to process a packet in one sub-processing module is available in the processing modules 310-1, 310-2, or 310-n. The number of sub-processing modules generated by grouping at least one function module so as not to exceed the size of the cache memory may be included.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) determines, in operation 507 , the first number determined based on the protocol type associated with the processing module, the size of the cache memory available in the processing module. It may be checked whether the second number checked based on .

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) determines the first number checked based on the protocol type associated with the processing module based on the size of the cache memory available in the processing module. When it exceeds the second number (eg, 'Yes' in operation 507), in operation 509, an additional processing module for processing a protocol type related to the processing module may be set. According to one embodiment, the processor 200 is the first number checked based on the protocol type associated with the processing module when the number of the second number checked based on the size of the cache memory usable in the processing module exceeds the number, the corresponding protocol It may be determined that a plurality of processing modules are required to process the type of . Accordingly, the processor 200 includes a first processing module 310-1 for grouping among a plurality of processing modules 310-1, 310-2, and 310-n included in the processor 200 and an additional second processing module. The module 310 - 2 may be selected.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) may group the processing module and the additional processing module into a plurality of sub processing modules in operation 511 . According to an embodiment, the processor 200 divides the plurality of function modules included in the first processing module 310-1 into a plurality of subs based on the size of the cache memory usable in the first processing module 310-1. They can be grouped into processing modules. The processor 200 may group a plurality of function modules included in the second processing module 310-2 into a plurality of sub-processing modules based on the size of the cache memory available in the second processing module 310-2. have. For example, the size of the cache memory usable in the first processing module 310 - 1 and the second processing module 310 - 2 may be the same or different. For example, the sub-processing modules grouped in the first processing module 310-1 may use a cache memory having the same size as the cache memory usable in the first processing module 310-1. For example, the sub-processing modules grouped in the second processing module 310 - 2 may use a cache memory having the same size as the cache memory usable in the second processing module 310 - 2 .

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) determines the first number checked based on the protocol type associated with the processing module based on the size of the cache memory available in the processing module. If the number is equal to or less than the second number (eg, 'No' in operation 507), in operation 513, the processing modules may be grouped into a plurality of sub processing modules. According to an embodiment, the processor 200 divides the plurality of function modules included in the first processing module 310-1 into a plurality of subs based on the size of the cache memory usable in the first processing module 310-1. They can be grouped into processing modules. For example, the sub-processing modules grouped in the first processing module 310-1 may use a cache memory having the same size as the cache memory usable in the first processing module 310-1.

6 is a flowchart 600 for processing a packet at a network entity in accordance with various embodiments. Operations in the following embodiments may be sequentially performed, but are not necessarily sequentially performed. For example, the order of the operations may be changed, and at least two operations may be performed in parallel. As an example, the network entity of FIG. 6 may be the UPF 125 of FIG. 1 or 2 .

Referring to FIG. 6 , according to various embodiments, a network entity (eg, the UPF 125 of FIG. 1 or the processor 200 of FIG. 2 ) may in operation 601 another network entity (eg, FIG. 1 ) of the wireless communication system. It can be confirmed whether a packet is received from the RAN 115 of

According to various embodiments, when the network entity (eg, UPF 125 or processor 200) receives a packet from another network entity (eg, 'Yes' in operation 601), in operation 603, from the other network entity A vector related to the received packet can be generated. According to an embodiment, the processor 200 may configure at least one vector to include at least one packet having the same or similar protocol among packets received from other network entities. For example, the length of the vector may be fixed or set variably based on at least one of a type of a packet or an amount of a packet received from another network entity.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) may select a processing module for processing the vector based on the protocol type of the packet included in the vector in operation 605 . According to an embodiment, the processor 200 is at least one processing module predefined as processing a protocol type of a packet included in a vector among the plurality of processing modules 310-1. 310-2 and 310-n. (310-1. 310-2 and/or 310-n) can be selected.

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) may process a vector including at least one packet through a processing module selected based on the protocol type of the packet in operation 607 . have. According to an embodiment, when the first processing module 310-1 is selected based on the protocol type of the packet, at least a portion of the vector corresponding to the packet processing size (or batch size) is sequentially processed through each sub-processing module. can be processed with

7 is a flowchart 700 for processing a packet using a sub-processing module in a network entity according to various embodiments of the present disclosure. According to an embodiment, the operations of FIG. 7 may be detailed operations of operation 607 of FIG. 6 . Operations in the following embodiments may be sequentially performed, but are not necessarily sequentially performed. For example, the order of the operations may be changed, and at least two operations may be performed in parallel. As an example, the network entity of FIG. 7 may be the UPF 125 of FIG. 1 or 2 . As an example, at least some components of FIG. 7 will be described with reference to FIG. 8 . 8 is a structure for processing a packet in a network entity according to various embodiments of the present disclosure;

Referring to FIG. 7 , according to various embodiments, a network entity (eg, the UPF 125 of FIG. 1 or the processor 200 of FIG. 2 ) performs a j-th region of a vector through an i-th sub-processing module in operation 701 . data can be processed. For example, i is an index of a sub-processing module included in the processing module 800 and may include 1 as an initial value. For example, j is at least a part of a vector for processing in the sub-processing module divided based on the packet processing size, and may include 1 as an initial value. According to an embodiment, the processing module 800 sets a plurality of function modules included in the processing module 800 based on the size of the cache memory to the first sub-processing module 810 - 1 and the second sub-processing module 810 . -2) and the nth sub-processing module 810-n. For example, the first sub-processing module 810 - 1 is included in the first region 822 corresponding to the packet processing size (or batch size) among the vectors 820 provided from the distribution module 300 of FIG. 3 . It can process the data (or packets) that become For example, the first sub-processing module 810 - 1 may load data included in the first region 822 into the cache memory and sequentially process the data in the first direction 852 . For example, n may indicate the number of processing modules 310 - 1 , 310 - 2 , and/or 310 - n included in the processor 200 .

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200 ) performs sub-processing in which the index (i) of the sub-processing module that has processed the j-th area data is included in the processing module in operation 703 . You can check whether it is greater than or equal to the maximum value (i _MAX ) of the module. According to an embodiment, the processor 200 (or the processing module 800 ) includes the sub processing modules 810 - 1 , 810 - 2 and 810 - n included in the processing module 800 , the data of the j-th region. You can check whether it has been processed.

According to various embodiments, in the network entity (eg, the UPF 125 or the processor 200 ), the index (i) of the sub-processing module that has processed the data of the j-th region is the maximum value of the sub-processing module included in the processing module. (i _MAX ) or less (eg, 'No' in operation 703 ), in operation 705 , i , which is an index of the sub-processing module, may be updated. According to an embodiment, the processor 200 (or the processing module 800 ) may increase i by one step (eg, i++) so that the data of the j-th region can be processed in the next sub-processing module. According to an embodiment, when the processor 200 (or the processing module 800) updates i, in operation 701, the j-th region (eg, the first region) through the second sub-processing module 810-2 (822)) may be processed. For example, the second sub-processing module 810-2 loads data (or packets) included in the first region 822 corresponding to the packet processing size (or batch size) of the vector 820 into the cache memory. Thus, processing may be sequentially performed in the first direction 852 .

According to various embodiments, in the network entity (eg, the UPF 125 or the processor 200 ), the index (i) of the sub-processing module that has processed the data of the j-th region is the maximum value of the sub-processing module included in the processing module. If it is greater than or equal to (i _MAX ) (eg, 'Yes' in operation 703 ), in operation 707 , it may be checked whether processing of the vector is completed. According to an embodiment, the processor 200 (or the processing module 800 ) may check whether all packets included in the vector have been processed through the sub-processing modules 810-1, 810-2, and 810-n. .

According to various embodiments, when the network entity (eg, the UPF 125 or the processor 200) does not complete the vector processing (eg, 'No' in operation 707), in operation 709, the index of the sub-processing module i, i, may be initialized, and j, which is the index of the processing region of the vector, may be updated. According to an embodiment, the processor 200 (or the processing module 800 ) is configured to process the next unprocessed region in the vector 820 by the sub-processing modules 810-1, 810-2, and 810-n. j can be incremented by one (e.g. j++). According to an embodiment, when the processor 200 (or the processing module 800 ) initializes i and updates j, the data of the second area 824 through the first sub-processing module 810 - 1 can be processed For example, the first sub-processing module 810 - 1 may process data (or packets) included in the second region 824 corresponding to the packet processing size (or batch size) among the vectors 820 . . For example, the first sub-processing module 810 - 1 may load data included in the second region 824 into the cache memory and sequentially process the data in the first direction 852 .

According to various embodiments, the network entity (eg, the UPF 125 or the processor 200) terminates an embodiment for processing the packet when processing of the vector is completed (eg, 'Yes' in operation 707). can

According to various embodiments, the processing module 800 sequentially processes data of the first region 822 or the second region 824 through each sub-processing module 810-1, 810-2, or 810-n. can be processed According to an embodiment, the sub-processing modules 810-1, 810-2, and 810-n may be sequentially driven in two directions 854 to process data. According to an embodiment, the sub-processing modules 810-1, 810-2, and 810-n may perform different functions. For example, the first sub-processing module 810 - 1 may obtain packet forwarding control protocol (PFCP) session information. For example, the second sub-processing module 810 - 2 may obtain a packet detection rule (PDR) from the PFCP session. For example, the third sub-processing module 810-3 may detect a forwarding action rules (FARs) policy based on the PDR obtained from the second sub-processing module 810-2. For example, the fourth sub-processing module 810-4 may perform FARs detected by the third sub-processing module 810-3. For example, the fifth sub-processing module 810-5 may detect a QoS Enforcement Rules (QERs) policy based on the PDR obtained from the second sub-processing module 810-2. For example, the sixth sub-processing module 810 - 6 may perform QERs detected by the fifth sub-processing module 810 - 5 . For example, the seventh sub-processing module 810 - 7 may detect a usage reporting rules (URRs) policy based on the PDR obtained by the second sub-processing module 810 - 2 . For example, the eighth sub-processing module 810-8 may perform the URRs detected by the seventh sub-processing module 810-7. For example, the ninth sub-processing module 810-9 may readdress an Internet protocol (IP) for routing processing. For example, the tenth sub-processing module 810-10 may transmit the data packet based on the IP redirected by the ninth sub-processing module 810-9.

According to various embodiments, a method of operating a user plane function (UPF) (eg, the UPF 125 of FIG. 1 or FIG. 2 ) of a wireless communication system includes processing included in a processor of the UPF when the UPF is initially driven The operation of checking the size of the cache memory usable by the module and the operation of grouping a plurality of function modules included in the processing module into a plurality of sub processing modules based on the size of the cache memory, and the size of the cache memory based on the operation of setting a packet processing size related to packet processing in each sub processing module.

According to various embodiments, the sub-processing module additionally considers at least one of whether a hyper-threading function is applied, a protocol type of a packet, or whether data processed by each function module exists in the same cache line can be grouped.

According to various embodiments, the grouping into the sub-processing modules includes: determining the number of groupable sub-processing groups based on the protocol type of the packet; and grouping sub-processing groups based on the protocol type of the packet. When the number of sub-processing modules exceeds the number of sub-processing modules divided based on the size of the cache memory, setting a plurality of processing modules including the processing module as processing modules for processing the protocol type, and the It may include grouping a plurality of function modules included in each processing module for processing the protocol type into a plurality of sub processing modules based on the size of the cache memory.

According to various embodiments, the packet processing size may be set by additionally considering at least one of whether hyper-threading is applied, the size of a vector, a cycle required for each function, or the size of a cache line.

According to various embodiments, when receiving a plurality of packets from another network entity, generating a vector including the plurality of packets, and when the processing module is selected based on a protocol type of the packet, the sub-processing The method may further include processing the vector through the processing module based on the modules and the packet processing size.

According to various embodiments, the processing of the vector may include processing a packet of a first region corresponding to the packet processing size of the vector through a first sub-processing module among the plurality of sub-processing modules; and processing the packet of the first region through a second sub-processing module among a plurality of sub-processing modules.

According to various embodiments, when the plurality of sub-processing modules process the packet in the first region, the second sub-processing module uses the first sub-processing module to process a second packet corresponding to a different packet processing size than the first region in the vector. The method may further include an operation of processing a packet of the region, and an operation of processing the packet of the second region through the second sub-processing module.

According to various embodiments, the other network entity may include a radio access network (RAN) or a data network (DN).

According to various embodiments, when the internal configuration of the UPF is changed, the protocol type processed by the processing module is changed, or a predefined period arrives, the sub-processing modules are grouped or the packet processing size It may further include an operation of setting

According to various embodiments, the wireless communication system may include a 5th generation (5G) communication system.

It should be noted that the configuration diagrams illustrated in FIGS. 1 to 8 , diagrams of a control/data signal transmission method, operation procedures, and configuration diagrams are not intended to limit the scope of the present disclosure. That is, all components, entities, or steps of operation described in FIGS. 1 to 8 should not be construed as essential components for the implementation of the disclosure, and the inclusion of only some components should not impair the essence of the disclosure. can be implemented in

The operations of the base station or the terminal described above can be realized by providing a memory device storing the corresponding program code in an arbitrary component in the base station or the terminal device. That is, the control unit of the base station or the terminal device may execute the above-described operations by reading and executing the program code stored in the memory device by a processor or a central processing unit (CPU).

The various components and modules of the entity, base station or terminal device described in this specification include a hardware circuit, for example, a complementary metal oxide semiconductor-based logic circuit, firmware and , software and/or hardware and firmware and/or software embedded in a machine-readable medium. As an example, various electrical structures and methods may be implemented using electrical circuits such as transistors, logic gates, and application-specific semiconductors.

In the specific embodiments of the present disclosure described above, components included in the present disclosure are expressed in the singular or plural according to the specific embodiments presented. However, the singular or plural expression is appropriately selected for the context presented for convenience of description, and the present disclosure is not limited to the singular or plural component, and even if the component is expressed in plural, it is composed of the singular or singular. Even an expressed component may be composed of a plurality of components.

On the other hand, the embodiments of the present disclosure disclosed in the present specification and drawings are only presented as specific examples to easily explain the technical content of the present disclosure and help the understanding of the present disclosure, and are not intended to limit the scope of the present disclosure. That is, it is apparent to those of ordinary skill in the art to which other modifications are possible based on the technical spirit of the present disclosure. In addition, each of the above embodiments may be operated in combination with each other as needed. For example, an embodiment of the present disclosure and parts of another embodiment may be combined to operate a base station and a terminal. In addition, the embodiments of the present disclosure are applicable to other communication systems, and other modifications based on the technical spirit of the embodiments may also be implemented.

Claims (15)

1. In an electronic device of a wireless communication system,

   communication interface;

   Includes a processor including a processing module (processing module) of the UPF (user plane function),

   The processor is

   When the UPF is initially driven, the size of the cache memory usable by the processing module is checked,

   Grouping a plurality of function modules included in the processing module into a plurality of sub processing modules based on the size of the cache memory,

   An electronic device for setting a packet processing size related to packet processing in each sub processing module based on the size of the cache memory.
2. The method of claim 1,

   The processor is included in the processing module by additionally considering at least one of whether a hyper-threading function is applied, a protocol type of a packet, or whether data processed by each function module exists in the same cache line An electronic device for grouping a plurality of functional modules into the plurality of sub-processing modules.
3. 3. The method of claim 2,

   The processor checks the number of groupable sub-processing groups based on the protocol type of the packet,

   When the number of sub-processing groups groupable based on the protocol type of the packet exceeds the number of sub-processing modules divided based on the size of the cache memory, a plurality of processing modules including the processing module are divided into the protocol type. An electronic device to set as a processing module for processing.
4. The method of claim 1,

   The processor sets the packet processing size by additionally considering at least one of whether hyper-threading is applied, a size of a vector, a cycle required for each function, or a size of a cache line.
5. The method of claim 1,

   The processor, when receiving a plurality of packets from a network entity other than the UPF, generates a vector including the plurality of packets,

   When the processing module is selected based on the protocol type of the packet, the electronic device processes the vector through the processing module based on the sub-processing modules and the packet processing size.
6. 6. The method of claim 5,

   the processing module processes a packet of a first area corresponding to the packet processing size of the vector through a first sub-processing module among the plurality of sub-processing modules;

   An electronic device that processes the packet of the first region through a second sub-processing module among the plurality of sub-processing modules.
7. 7. The method of claim 6,

   The processing module is configured to, when the plurality of sub-processing modules process the packet of the first region, a second region of the vector corresponding to a different packet processing size than the first region through the first sub-processing module process the packets of

   The electronic device processes the packet of the second area through the second sub-processing module.
8. The method of claim 1,

   The processor groups the sub-processing modules based on at least one of a time when the internal configuration of the UPF is changed, a time when a protocol type processed by the processing module is changed, or a time when a predefined period arrives, or An electronic device that sets the packet processing size.
9. In the operating method of a user plane function (UPF) of a wireless communication system,

   When the UPF is initially driven, the operation of checking the size of the cache memory usable by the processing module included in the processor of the UPF;

   Grouping a plurality of functional modules included in the processing module into a plurality of sub-processing modules based on the size of the cache memory, and

   and setting a packet processing size related to packet processing in each sub processing module based on the size of the cache memory.
10. 10. The method of claim 9,

    The sub-processing module additionally considers at least one of whether a hyper-threading function is applied, a protocol type of a packet, or whether data processed by each function module exists in the same cache line. Grouping method.
11. 11. The method of claim 10,

    The operation of grouping into the sub-processing module is,

    Checking the number of groupable sub-processing groups based on the protocol type of the packet;

    When the number of sub-processing groups groupable based on the protocol type of the packet exceeds the number of sub-processing modules divided based on the size of the cache memory, a plurality of processing modules including the processing module are divided into the protocol type. setting as a processing module for processing, and

    and grouping a plurality of function modules included in each processing module for processing the protocol type into a plurality of sub processing modules based on the size of the cache memory.
12. 10. The method of claim 9,

    The packet processing size is set by additionally considering at least one of whether hyper-threading is applied, the size of a vector, a cycle required for each function, or the size of a cache line.
13. 10. The method of claim 9,

    generating a vector including the plurality of packets when receiving a plurality of packets from a network entity other than the UPF; and

    If the processing module is selected based on the protocol type of the packet, processing the vector through the processing module based on the sub-processing modules and the packet processing size.
14. 14. The method of claim 13,

    The operation of processing the vector is,

    processing a packet of a first area corresponding to the packet processing size of the vector through a first sub-processing module among the plurality of sub-processing modules; and

    and processing the packet of the first region through a second sub-processing module among the plurality of sub-processing modules.
15. 15. The method of claim 14,

    When the plurality of sub-processing modules process the packet in the first region, the first sub-processing module processes a packet in a second region of the vector corresponding to a packet processing size different from that of the first region. action, and

    and processing the packet of the second region through the second sub-processing module.

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