WO2022114864A1 - 커넥터를 포함하는 전자 장치 - Google Patents
커넥터를 포함하는 전자 장치 Download PDFInfo
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- WO2022114864A1 WO2022114864A1 PCT/KR2021/017675 KR2021017675W WO2022114864A1 WO 2022114864 A1 WO2022114864 A1 WO 2022114864A1 KR 2021017675 W KR2021017675 W KR 2021017675W WO 2022114864 A1 WO2022114864 A1 WO 2022114864A1
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- pin
- electronic device
- recognition
- power
- power signal
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Definitions
- Various embodiments disclosed in this document relate to an electronic device including a connector that can be connected to an external device.
- An electronic device such as a smartphone or a tablet PC may perform various functions.
- the electronic device may perform functions such as wireless communication, image capturing, video reproduction, or music reproduction.
- the electronic device may be used by being connected to the accessory device wirelessly or by wire.
- the electronic device may be used by being connected to the earphone device through a connector.
- the electronic device may include a connector (eg, a USB Type-C connector) for charging or connecting an accessory device.
- the accessory device may be connected to a connector (eg, a USB type-C connector) of the electronic device by wire, and may receive a power signal and a data signal (eg, an acoustic signal) from the electronic device.
- a power signal e.g, an acoustic signal
- the earphone device may output a sound through a speaker based on a sound signal received from the electronic device.
- the earphone device may receive a sound signal as digital data of USB Audio Class (UAC) through a data pin (eg, USB Type-C D+/D- pin) and output sound.
- UAC USB Audio Class
- the current consumption of the battery may increase according to the supply of the power signal.
- the electronic device may supply a power signal of about 5V to the earphone device by boosting the power signal (about 3.2V to about 4.5V) supplied from the battery.
- the current consumption according to the voltage increase may increase and the discharge rate of the battery may be increased.
- Various embodiments of the present document may provide an electronic device that reduces current consumption through recognition of an accessory device when an accessory device such as an earphone device is connected to a connector by wire.
- An electronic device may include a housing, a battery disposed inside the housing, a power management module for controlling power supply of the battery, a connector disposed inside the housing, and a connection state of an external device to the connector a device recognition circuit for sensing, a memory, and a processor electrically connected to the memory, the power management module, or the device recognition circuit, wherein the connector is disposed to be symmetrical with a first sub-pin row and the first sub-pin row 2 sub-pin columns, the first sub-pin column includes a first power supply pin, a first data pin, and a first recognition pin, and the second sub-pin column includes a second power supply pin, a second data pin, and a second sub-pin column.
- the power management module is controlled to supply a first power signal to the first power pin and a second power signal to the second recognition pin, and the first recognition Receives the first identification information of the accessory device through a pin or the first data pin, and blocks the first power signal when the first identification information is a specified value or matches the second identification information stored in the memory and control the power management module to maintain the second power signal.
- a device recognition pin eg, CC pin
- D+, D- data pins
- a device recognition pin can be used to supply a power signal with a lower voltage than the power pin (eg VBUS pin) to the accessory device. Through this, unnecessary current consumption (or power consumption) may be reduced.
- the electronic device may reduce the manufacturing cost of the accessory device by preventing the accessory device from including a circuit for power delivery (PD) communication.
- PD power delivery
- FIG. 1 is a block diagram of an electronic device in a network environment according to various embodiments of the present disclosure
- FIG 2 illustrates an electronic device and an accessory device according to various embodiments of the present disclosure.
- FIG. 3 is a block diagram of an electronic device according to various embodiments of the present disclosure.
- FIG. 4 illustrates a pin configuration of a first connector of an electronic device according to various embodiments of the present disclosure
- FIG. 5 is a configuration diagram of an accessory device according to various embodiments.
- 6A is a flowchart of a power supply method using a data pin according to various embodiments of the present disclosure
- FIG. 6B illustrates USB enumeration in an accessory device according to various embodiments.
- FIG. 7 is a flowchart of a power supply method citing PD communication according to various embodiments of the present disclosure
- FIG. 8 is a flowchart of a power supply method using audio headset information according to various embodiments of the present disclosure
- FIG. 9 is a graph showing a change in a first power signal or a second power signal according to various embodiments of the present disclosure.
- FIG. 1 is a block diagram of an electronic device 101 in a network environment 100 according to various embodiments.
- an electronic device 101 communicates with an electronic device 102 through a first network 198 (eg, a short-range wireless communication network) or a second network 199 . It may communicate with the electronic device 104 or the server 108 through (eg, a long-distance wireless communication network). According to an embodiment, the electronic device 101 may communicate with the electronic device 104 through the server 108 .
- a first network 198 eg, a short-range wireless communication network
- a second network 199 e.g., a second network 199
- the electronic device 101 may communicate with the electronic device 104 through the server 108 .
- the electronic device 101 includes a processor 120 , a memory 130 , an input module 150 , a sound output module 155 , a display module 160 , an audio module 170 , and a sensor module ( 176), interface 177, connection terminal 178, haptic module 179, camera module 180, power management module 188, battery 189, communication module 190, subscriber identification module 196 , or an antenna module 197 may be included.
- at least one of these components eg, the connection terminal 178
- may be omitted or one or more other components may be added to the electronic device 101 .
- some of these components are integrated into one component (eg, display module 160 ). can be
- the processor 120 for example, executes software (eg, a program 140) to execute at least one other component (eg, a hardware or software component) of the electronic device 101 connected to the processor 120 . It can control and perform various data processing or operations. According to one embodiment, as at least part of data processing or operation, the processor 120 converts commands or data received from other components (eg, the sensor module 176 or the communication module 190 ) to the volatile memory 132 . may be stored in the volatile memory 132 , and may process commands or data stored in the volatile memory 132 , and store the result data in the non-volatile memory 134 .
- software eg, a program 140
- the processor 120 converts commands or data received from other components (eg, the sensor module 176 or the communication module 190 ) to the volatile memory 132 .
- the volatile memory 132 may be stored in the volatile memory 132 , and may process commands or data stored in the volatile memory 132 , and store the result data in the non-volatile memory 134 .
- the processor 120 is the main processor 121 (eg, a central processing unit or an application processor) or a secondary processor 123 (eg, a graphic processing unit, a neural network processing unit) a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor).
- the main processor 121 e.g, a central processing unit or an application processor
- a secondary processor 123 eg, a graphic processing unit, a neural network processing unit
- NPU neural processing unit
- an image signal processor e.g., a sensor hub processor, or a communication processor.
- the main processor 121 e.g, a central processing unit or an application processor
- a secondary processor 123 eg, a graphic processing unit, a neural network processing unit
- NPU neural processing unit
- an image signal processor e.g., a sensor hub processor, or a communication processor.
- the main processor 121 e.g, a central processing unit or an application processor
- a secondary processor 123
- the auxiliary processor 123 is, for example, on behalf of the main processor 121 while the main processor 121 is in an inactive (eg, sleep) state, or the main processor 121 is active (eg, executing an application). ), together with the main processor 121, at least one of the components of the electronic device 101 (eg, the display module 160, the sensor module 176, or the communication module 190) It is possible to control at least some of the related functions or states.
- the co-processor 123 eg, an image signal processor or a communication processor
- may be implemented as part of another functionally related component eg, the camera module 180 or the communication module 190. have.
- the auxiliary processor 123 may include a hardware structure specialized for processing an artificial intelligence model.
- Artificial intelligence models can be created through machine learning. Such learning may be performed, for example, in the electronic device 101 itself on which artificial intelligence is performed, or may be performed through a separate server (eg, the server 108).
- the learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but in the above example not limited
- the artificial intelligence model may include a plurality of artificial neural network layers.
- Artificial neural networks include deep neural networks (DNNs), convolutional neural networks (CNNs), recurrent neural networks (RNNs), restricted boltzmann machines (RBMs), deep belief networks (DBNs), bidirectional recurrent deep neural networks (BRDNNs), It may be one of deep Q-networks or a combination of two or more of the above, but is not limited to the above example.
- the artificial intelligence model may include, in addition to, or alternatively, a software structure in addition to the hardware structure.
- the memory 130 may store various data used by at least one component of the electronic device 101 (eg, the processor 120 or the sensor module 176 ).
- the data may include, for example, input data or output data for software (eg, the program 140 ) and instructions related thereto.
- the memory 130 may include a volatile memory 132 or a non-volatile memory 134 .
- the program 140 may be stored as software in the memory 130 , and may include, for example, an operating system 142 , middleware 144 , or an application 146 .
- the input module 150 may receive a command or data to be used in a component (eg, the processor 120 ) of the electronic device 101 from the outside (eg, a user) of the electronic device 101 .
- the input module 150 may include, for example, a microphone, a mouse, a keyboard, a key (eg, a button), or a digital pen (eg, a stylus pen).
- the sound output module 155 may output a sound signal to the outside of the electronic device 101 .
- the sound output module 155 may include, for example, a speaker or a receiver.
- the speaker can be used for general purposes such as multimedia playback or recording playback.
- the receiver may be used to receive an incoming call. According to one embodiment, the receiver may be implemented separately from or as part of the speaker.
- the display module 160 may visually provide information to the outside (eg, a user) of the electronic device 101 .
- the display module 160 may include, for example, a control circuit for controlling a display, a hologram device, or a projector and a corresponding device.
- the display module 160 may include a touch sensor configured to sense a touch or a pressure sensor configured to measure the intensity of a force generated by the touch.
- the audio module 170 may convert a sound into an electric signal or, conversely, convert an electric signal into a sound. According to an embodiment, the audio module 170 acquires a sound through the input module 150 , or an external electronic device (eg, a sound output module 155 ) connected directly or wirelessly with the electronic device 101 . A sound may be output through the electronic device 102 (eg, a speaker or headphones).
- an external electronic device eg, a sound output module 155
- a sound may be output through the electronic device 102 (eg, a speaker or headphones).
- the sensor module 176 detects an operating state (eg, power or temperature) of the electronic device 101 or an external environmental state (eg, user state), and generates an electrical signal or data value corresponding to the sensed state. can do.
- the sensor module 176 may include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, It may include a temperature sensor, a humidity sensor, or an illuminance sensor.
- the interface 177 may support one or more designated protocols that may be used by the electronic device 101 to directly or wirelessly connect with an external electronic device (eg, the electronic device 102 ).
- the interface 177 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.
- HDMI high definition multimedia interface
- USB universal serial bus
- SD card interface Secure Digital Card
- the connection terminal 178 may include a connector through which the electronic device 101 can be physically connected to an external electronic device (eg, the electronic device 102 ).
- the connection terminal 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).
- the haptic module 179 may convert an electrical signal into a mechanical stimulus (eg, vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic sense.
- the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.
- the camera module 180 may capture still images and moving images. According to an embodiment, the camera module 180 may include one or more lenses, image sensors, image signal processors, or flashes.
- the power management module 188 may manage power supplied to the electronic device 101 .
- the power management module 188 may be implemented as, for example, at least a part of a power management integrated circuit (PMIC).
- PMIC power management integrated circuit
- the battery 189 may supply power to at least one component of the electronic device 101 .
- battery 189 may include, for example, a non-rechargeable primary cell, a rechargeable secondary cell, or a fuel cell.
- the communication module 190 is a direct (eg, wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (eg, the electronic device 102, the electronic device 104, or the server 108). It can support establishment and communication performance through the established communication channel.
- the communication module 190 may include one or more communication processors that operate independently of the processor 120 (eg, an application processor) and support direct (eg, wired) communication or wireless communication.
- the communication module 190 is a wireless communication module 192 (eg, a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (eg, : It may include a LAN (local area network) communication module, or a power line communication module).
- GNSS global navigation satellite system
- a corresponding communication module among these communication modules is a first network 198 (eg, a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network 199 (eg, legacy It may communicate with the external electronic device 104 through a cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (eg, a telecommunication network such as a LAN or a WAN).
- a first network 198 eg, a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)
- a second network 199 eg, legacy It may communicate with the external electronic device 104 through a cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (eg, a telecommunication network such as a LAN or a WAN).
- a telecommunication network
- the wireless communication module 192 uses the subscriber information (eg, International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module 196 within a communication network such as the first network 198 or the second network 199 .
- the electronic device 101 may be identified or authenticated.
- the wireless communication module 192 may support a 5G network after a 4G network and a next-generation communication technology, for example, a new radio access technology (NR).
- NR access technology includes high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and access to multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency) -latency communications)).
- eMBB enhanced mobile broadband
- mMTC massive machine type communications
- URLLC ultra-reliable and low-latency
- the wireless communication module 192 may support a high frequency band (eg, mmWave band) to achieve a high data rate, for example.
- a high frequency band eg, mmWave band
- the wireless communication module 192 includes various technologies for securing performance in a high-frequency band, for example, beamforming, massive multiple-input and multiple-output (MIMO), all-dimensional multiplexing. It may support technologies such as full dimensional MIMO (FD-MIMO), an array antenna, analog beam-forming, or a large scale antenna.
- the wireless communication module 192 may support various requirements specified in the electronic device 101 , an external electronic device (eg, the electronic device 104 ), or a network system (eg, the second network 199 ).
- the wireless communication module 192 may include a peak data rate (eg, 20 Gbps or more) for realizing eMBB, loss coverage (eg, 164 dB or less) for realizing mMTC, or U-plane latency for realizing URLLC ( Example: downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less).
- a peak data rate eg, 20 Gbps or more
- loss coverage eg, 164 dB or less
- U-plane latency for realizing URLLC
- the antenna module 197 may transmit or receive a signal or power to the outside (eg, an external electronic device).
- the antenna module 197 may include an antenna including a conductor formed on a substrate (eg, a PCB) or a radiator formed of a conductive pattern.
- the antenna module 197 may include a plurality of antennas (eg, an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network such as the first network 198 or the second network 199 is connected from the plurality of antennas by, for example, the communication module 190 . can be selected. A signal or power may be transmitted or received between the communication module 190 and an external electronic device through the selected at least one antenna.
- other components eg, a radio frequency integrated circuit (RFIC)
- RFIC radio frequency integrated circuit
- the antenna module 197 may form a mmWave antenna module.
- the mmWave antenna module comprises a printed circuit board, an RFIC disposed on or adjacent to a first side (eg, bottom side) of the printed circuit board and capable of supporting a designated high frequency band (eg, mmWave band); and a plurality of antennas (eg, an array antenna) disposed on or adjacent to a second side (eg, top or side) of the printed circuit board and capable of transmitting or receiving signals of the designated high frequency band. can do.
- peripheral devices eg, a bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)
- GPIO general purpose input and output
- SPI serial peripheral interface
- MIPI mobile industry processor interface
- the command or data may be transmitted or received between the electronic device 101 and the external electronic device 104 through the server 108 connected to the second network 199 .
- Each of the external electronic devices 102 or 104 may be the same as or different from the electronic device 101 .
- all or a part of operations executed in the electronic device 101 may be executed in one or more external electronic devices 102 , 104 , or 108 .
- the electronic device 101 may perform the function or service itself instead of executing the function or service itself.
- one or more external electronic devices may be requested to perform at least a part of the function or the service.
- One or more external electronic devices that have received the request may execute at least a part of the requested function or service, or an additional function or service related to the request, and transmit a result of the execution to the electronic device 101 .
- the electronic device 101 may process the result as it is or additionally and provide it as at least a part of a response to the request.
- cloud computing distributed computing, mobile edge computing (MEC), or client-server computing technology may be used.
- the electronic device 101 may provide an ultra-low latency service using, for example, distributed computing or mobile edge computing.
- the external electronic device 104 may include an Internet of things (IoT) device.
- Server 108 may be an intelligent server using machine learning and/or neural networks.
- the external electronic device 104 or the server 108 may be included in the second network 199 .
- the electronic device 101 may be applied to an intelligent service (eg, smart home, smart city, smart car, or health care) based on 5G communication technology and IoT-related technology.
- FIG 2 illustrates an electronic device and an accessory device according to various embodiments of the present disclosure.
- an electronic device 201 may include a main body (or housing) 205 and a display 210 .
- the main body 205 may mount the display 210 and peripheral components (cameras, physical buttons, and/or sensor windows).
- the main body 205 may include components necessary for driving the electronic device 201 such as a communication circuit, a processor, a memory, a printed circuit board, or a battery therein.
- the display 210 may output image or text content. For example, when a sound is output through the accessory device 202 , the display 210 may output a user interface (eg, a user interface of a music playback app or a video playback app) related to the output sound.
- a user interface eg, a user interface of a music playback app or a video playback app
- the main body 205 may be connected to the accessory device 202 (eg, earphone) to mount a first connector (or receptacle) 230 for transmitting and receiving a power signal or a data signal.
- the power signal may mean electronic power.
- the main body 205 may include a first connector 230 for transmitting and receiving electronic power and/or data signals used in the accessory device 202 (eg, earphones).
- the first connector 230 may be connected to the second connector (or plug) 250 of the accessory device 202 .
- the first connector 230 may include a plurality of pins for transmitting and receiving a power signal or a data signal.
- a plurality of pins included in the first connector 230 may contact pins included in the second connector 250 of the accessory device 202 to form a contact for transmitting and receiving a power signal or a data signal. have.
- the first connector 230 may be a USB type-C connector specified in the USB standard.
- the first connector 230 may be coupled to the second connector 250 without limitation in the vertical insertion direction of the second connector 250 .
- the first connector 230 may be a Lightning connector or a Thunderbolt connector.
- the first connector 230 may supply power and/or a signal to the second connector 250 .
- the electronic device 201 uses at least one of a power pin (eg, a VBUS pin) or a recognition pin (eg, a CC1 pin or a CC2 pin) included in the first connector 230 to access the accessory.
- a power signal may be supplied to the device 202 .
- the accessory device 202 may operate using a power signal provided through a power pin (eg, a VBUS pin) or a recognition pin (eg, a CC1 pin or a CC2 pin).
- the electronic device 201 may transmit a first power signal through a power pin (eg, VBUS pin) and supply a second power signal through a recognition pin (eg, CC1 pin or CC2 pin).
- a power pin eg, VBUS pin
- a recognition pin eg, CC1 pin or CC2 pin
- the first power signal (eg, about 5V) may have a voltage value different from that of the second power signal (eg, about 3.3V).
- the electronic device 201 when the second connector 250 of the accessory device 202 is connected to the first connector 230 of the electronic device 201 , the electronic device 201 provides a first power signal and a second power signal.
- the specified condition may be a condition related to identification information of the accessory device 202 (refer to FIGS. 3 to 9 ).
- the first connector 230 may include a first recognition pin (eg, CC1) and a second recognition pin (eg, CC2).
- One of the first recognition pin (eg, CC1) and the second recognition pin (eg, CC2) may be used to recognize the accessory device 202, and the other recognition pin is a second power signal (eg, CC2). : about 3.3V) to the accessory device 202 .
- the first recognition pin eg, CC1
- the second recognition pin eg, CC2
- a first identification pin eg, CC1
- FIGS. 3 to 9 Additional information related to transmission or blocking of the first power signal and the second power signal may be provided through FIGS. 3 to 9 .
- the accessory device 202 may include a sound output device 240 , a user interface (or control module) 245 , and a second connector (or plug) 250 .
- the sound output device 240 may include a first speaker 241 and a second speaker 242 .
- the user interface (or control module) 245 may include a button (eg, a volume button, a call button) for user input, and may include a control unit (eg, a codec chip) therein.
- the second connector (or plug) 250 may include a plurality of pins for transmitting and receiving a power signal or a data signal.
- the plurality of pins included in the second connector 250 may contact pins included in the first connector 230 of the electronic device 201 to form a contact for transmitting and receiving a power signal or a data signal. have. Additional information regarding the second connector 250 may be provided through FIG. 4 .
- FIG. 3 is a block diagram of an electronic device according to various embodiments of the present disclosure.
- the accessory device 202 is not limited thereto.
- the first connector 230 may include a first sub-pin row 230a and a second sub-pin row 230b.
- the first sub-pin column 230a includes a first power pin (eg, VBUS) (which may be a plurality of pins) 231a, a first data pin (eg, D+, D-) (which may be a plurality of pins) ( 232a) and a first recognition pin (eg, CC1) 233a.
- a first power pin eg, VBUS
- a first data pin eg, D+, D-
- a first recognition pin eg, CC1
- the second sub-pin column 230b includes a second power pin (eg, VBUS) (which may be a plurality of pins) 231b, a second data pin (eg, D+, D-) (which may include a plurality of pins) ( 232b) and a second recognition pin (eg, CC2) 233b.
- a second power pin eg, VBUS
- D+, D- which may include a plurality of pins
- a second recognition pin eg, CC2
- the electronic device 201 is a configuration for processing a signal transmitted and received through the first connector 230 , and includes a processor 220 (eg, the processor 120 of FIG. 1 ), a device recognition circuit ( Alternatively, a connection establishment module) 222 (eg, a power delivery integrated circuit (PDIC)) and a data processing circuit (data module) 224 may be included.
- the electronic device 201 may further include a power management module 226 (eg, the power management module 188 of FIG. 1 ) for supplying a first power signal or a second power signal through the first connector 230 . have.
- the device recognition circuit 222 may be a device interface circuit.
- the device recognition circuit 222 may be a USB interface circuit, a Lightning interface circuit, or a Thunderbolt interface circuit.
- the processor 220 may execute an operation or data processing related to control and/or communication of at least one other component of the electronic device 201 .
- the processor 220 may process a signal received through the data processing circuit 224 and may control the device recognition circuit 222 or the power management module 226 by a specified communication method (eg, i2c ). .
- the device recognition circuit 222 may recognize a connection of an external device through identification pins (eg, a configuration channel (CC) pin) 233a and 233b.
- identification pins eg, a configuration channel (CC) pin
- CC configuration channel
- the device recognition circuit 222 may be manufactured as a chip separate from the processor 220 , or may be included in the processor 220 .
- the device recognition circuit 222 may transmit a discovery identity message to an external electronic device through recognition pins (eg, configuration channel (CC) pins) 233a and 2333b of the first connector 230 . .
- the device recognition circuit 222 may perform the functions of device connection detection, identification of cable type, interface configuration, and vendor defined messages.
- the device recognition circuit 222 may perform power delivery (PD) communication with the accessory device 202 according to a method specified in the USB Type C standard.
- the accessory device 202 includes a power delivery integrated circuit (PDIC)
- the device recognition circuit 222 may transmit and receive a power delivery (PD) message to and from the accessory device 202 .
- the PD message may be a biphase marked code (BMC) type communication protocol.
- the device recognition circuit 222 identifies information of the accessory device 202 through PD communication using identification pins (eg, configuration channel (CC) pins) 233a and 233b. can receive For example, the device recognition circuit 222 may receive the ID Header VDO through Power Delivery (PD) communication.
- identification pins eg, configuration channel (CC) pins
- CC configuration channel
- PD Power Delivery
- the processor 220 or the device recognition circuit 222 when the identification information of the accessory device 202 received through the PD communication, the processor 220 or the device recognition circuit 222 is a specified value (eg, V CONN -Powered USB Device, VPD), The power management module 226 may be controlled to cut off the first power signal and supply the second power signal to the accessory device 202 (refer to FIG. 7 ).
- V CONN -Powered USB Device VPD
- the data processing circuit 224 may transmit data according to the type of the accessory device 202 connected to the first connector 230 .
- the data processing circuit 224 may include various communication circuits (eg, USB Data received from a communication circuit, UART communication circuit, audio communication circuit, or video communication circuit (eg HDMI, MHL) may be transmitted.
- the data processing circuit 224 may be manufactured as a chip separate from the processor 220 , or may be included in the processor 220 .
- the data processing circuit 224 may receive identification information of the accessory device 202 through USB enumeration.
- the identification information of the accessory device 202 includes at least a part of manufacturer identification information (Vendor ID, VID), product identification information (Product ID, PID), manufacturing information (Manufacture info), or product information (Product info).
- Vendor ID, VID manufacturer identification information
- Product ID, PID product identification information
- Manufacturing info Manufacturing info
- Product info Product info
- the processor 220 controls the power management module 226 to control the power management module 226 when the identification information of the accessory device 202 received through the data pins 232a and 232b matches the stored information. It is possible to block the signal and supply a second power signal to the accessory device 202 (refer to FIG. 6A ).
- the power management module 226 applies a first power signal (eg, about 5V) to at least one of the first power pin 231a or the second power pin 231b according to the processor 220 or the device recognition circuit 222 . can be transmitted In addition, the power management module 226 transmits a second power signal (eg, about 3.3V) according to the processor 220 or the device recognition circuit 222 to one of the first recognition pin 233a or the second recognition pin 233b. At least one can be transmitted.
- the first power signal (eg, about 5V) may be a signal obtained by boosting a power signal output through a terminal of a battery (eg, the battery 189 of FIG. 1 ) through a separate boosting circuit.
- the second power signal (eg, about 3.3V) may be a power signal directly output through a terminal of a battery (eg, the battery 189 of FIG. 1 ) without a separate boosting circuit.
- FIG. 4 illustrates a pin configuration of a first connector of an electronic device according to various embodiments of the present disclosure
- the first connector 230 may include a first sub-pin array 230a and a second sub-pin array 230b implemented in a symmetrical arrangement and position.
- the first sub-pin column 230a may include first to twelfth pins (eg, power pins, ground pins, data pins (TX, RX, D), CC1 pins) according to the USB standard.
- the second sub pin column 230b has a position and arrangement symmetrical to that of the first sub pin column 230a, and the 13th to 24th pins (eg, power pins, ground pins, and data pins TX and RX according to the USB standard) , D), CC2 pin).
- the power pins 231a and 231b transmit the first power signal to the accessory device 202 when the second connector 250 of the accessory device 202 is connected to the first connector 230 of the electronic device 201 .
- a first resistance (Rd, 5.1k) to the first recognition pin (eg, CC1) (233a) is connected, the first power signal (about 5V) is supplied through the first power pin (eg VBUS) 231a, and a separate power signal is supplied through the second power pin (eg VBUS) 231b may not be supplied.
- the first resistance (Rd, 5.1k) to the second recognition pin (eg, CC2) (233b) ) is connected, the first power signal (about 5V) is supplied through the second power pin (eg VBUS) 231b, and a separate power supply is supplied through the first power pin (eg VBUS) 231a.
- the signal may not be supplied.
- the data pins TX, RX, and D of the first sub pin column 230a may include a D pin 232a, an RX pair pin 232a1, and a TX pair pin 232a2.
- the RX pair pin 232a1 may include an RX2- pin (A10 pin) and an RX2+ pin (A11 pin).
- the TX pair pin 232a2 may include a TX1+ pin (A2 pin) and a TX1- pin (A3 pin).
- the D pin 232a may include a D+ pin (A6 pin) and a D- pin (A7 pin).
- the RX pair pin 232a1 and the TX pair pin 232a2 may be data pins according to USB 3.0, and the D pin 254 may be a data pin according to USB 2.0.
- the data pins TX, RX, and D of the second sub pin column 230b may include a D pin 232b, an RX pair pin 232b1, and a TX pair pin 232b2.
- the RX pair pin 232b1 may include an RX1- pin (B10 pin) and an RX1+ pin (B11 pin).
- the TX pair pin 232b2 may include a TX2+ pin (B2 pin) and a TX2- pin (B3 pin).
- the D pin 232b may include a D+ pin (B6 pin) and a D- pin (B7 pin).
- the RX pair pin 232b1 and the TX pair pin 232b2 may be data pins according to USB 3.0, and the D pin 232b may be a data pin according to USB 2.0.
- the data pins 232a and 232b may receive identification information of the accessory device 202 through USB enumeration.
- the identification information may include at least a portion of manufacturer identification information (Vendor ID, VID), product identification information (Product ID, PID), manufacturing information (Manufacture info), or product information (Product info).
- the electronic device 201 when the identification information of the accessory device 202 received through the data pins 232a and 232b matches the stored information, the electronic device 201 performs the accessory device through the power pins 231a and 231b.
- the first power signal supplied to the 202 may be cut off, and the second power signal supplied to the accessory device 202 may be maintained through the recognition pins (eg, CC1 and CC2) 233a and 233b.
- the electronic device 201 when recognizing the accessory device 202 through the first recognition pin (eg, CC1) 233a (connection Rd resistance), the electronic device 201 provides the first power supply to the first power pin 231a.
- a signal eg, about 5V
- a second power signal eg, about 3.3V
- the electronic device 201 is supplied to the accessory device 202 through the first power pin 231a.
- the first power signal may be cut off and the second power signal supplied to the accessory device 202 may be maintained through a second recognition pin (eg, CC2) 233b.
- the electronic device 201 when the accessory device 202 is recognized through the second recognition pin (eg, CC2) 233b (Rd resistor connection), the electronic device 201 is connected to the first power pin 231b.
- a power signal eg, about 5V
- a second power signal eg, about 3.3V
- the electronic device 201 is supplied to the accessory device 202 through the second power pin 231b.
- the first power signal may be cut off, and the second power signal supplied to the accessory device 202 through the first recognition pin (eg, CC1) 233a may be maintained.
- the data pins 232a and 232b may transmit an acoustic signal to the accessory device 202 .
- the data pins 232a and 232b may transmit an audio signal of digital data using USB Audio Class (UAC).
- UAC USB Audio Class
- Recognition pins (eg, CC1 and CC2) 233a and 233b may detect the connection of the accessory device 202 through the first connector 230 .
- the recognition pin 255 may be a configuration channel (CC) pin according to the USB Type-CTM standard.
- the first resistor (Rd, 5.1k) when the first resistor (Rd, 5.1k) is connected to the first recognition pin (eg, CC1) 233a and the second recognition pin (eg, CC2) (233b) is in an open state, the first The power pin (eg, VBUS) 231a may supply a first power signal (eg, about 5V).
- the second recognition pin (eg, CC2) 233b may supply a second power signal (eg, about 3.3V) simultaneously with the supply of the first power signal (or within a specified time). Then, according to the identification of the accessory device 202, one of the first power signal or the second power signal may be cut off.
- the first resistor (Rd, 5.1k) when the first resistor (Rd, 5.1k) is connected to the second recognition pin (eg, CC2) (233b) and the first recognition pin (eg, CC1) (233a) is in an open state, the first The second power pin (eg, VBUS) 231b may supply a first power signal (eg, about 5V). Also, the first recognition pin (eg, CC1) 233a may supply a second power signal (eg, about 3.3V) simultaneously with the supply of the first power signal (or within a specified time). Then, according to the identification of the accessory device 202, one of the first power signal or the second power signal may be cut off.
- a first power signal eg, about 5V
- the first recognition pin (eg, CC1) 233a may supply a second power signal (eg, about 3.3V) simultaneously with the supply of the first power signal (or within a specified time).
- the second power signal (eg, VCONN, about 3.3V) supplied through the recognition pins (eg, CC1, CC2) (233a, 233b) is the number of times specified for the Source Capability message (eg, 30 times) Or, if there is no response more than 50 times), it may be blocked.
- FIG. 5 is a configuration diagram of an accessory device according to various embodiments.
- the accessory device 202 includes a second connector 250 , a first diode 261 , a second diode 262 , a first resistor 263 , a second resistor 265 , and a control unit (eg : codec chip) 280 .
- a control unit eg : codec chip
- the second connector 250 may include a first sub-pin row 250a and a second sub-pin row 250b.
- the first sub-pin column 250a includes a first power pin (eg, VBUS) (which may be a plurality of pins) 251a, a first data pin (eg, D+, D-) (which may be a plurality of pins) ( 252a) and a first recognition pin (eg, CC1) 253a.
- a first power pin eg, VBUS
- first data pin eg, D+, D-
- CC1 first recognition pin
- the second sub-pin column 250b may include a second recognition pin (eg, CC2) 253b.
- the power pin or data pin of the second sub pin column 250b may be provided and may be in an open state so as not to be substantially connected.
- the first recognition pin (eg, CC1) 253a may be connected to the first resistor (Rd, 5.1k) 263 .
- the recognition pins of the first connector 230 eg, the recognition pins 233a and 233b of FIG. 3 ) are connected to the first recognition pins (eg, CC1) 253a of the second connector 250 , and the first resistor
- a first power signal eg, about 5V
- a second recognition pin eg, VBUS
- a second power signal (eg, about 3.3V) may be supplied through the CC2) 253b.
- the first diode 261 may prevent a reverse current of the first power signal, and the second diode 262 may prevent a reverse current of the second power signal.
- the first power signal (eg, about 5V) may be supplied to the controller 280 by a voltage drop (eg, the voltage drops from about 5V to about 3.3V) through the second resistor 265 .
- the controller 280 may transmit identification information of the accessory device 202 to the electronic device 201 through the first data pins (eg, D+, D-) 252a.
- the identification information may include at least a portion of manufacturer identification information (Vendor ID, VID), product identification information (Product ID, PID), manufacturing information (Manufacture info), or product information (Product info).
- the first power signal (eg, about 5V) through the first power pin (eg, VBUS) 251a is cut off and a second power signal (eg, about 3.3V) through the second recognition pin (eg, CC2) 253b may be continuously supplied.
- the first power signal (eg, about 5V) through the first power pin (eg, VBUS) 251a is It is continuously supplied, and the second power signal (eg, about 3.3V) through the second recognition pin (eg, CC2) 253b may be blocked.
- the accessory device 202 may further include a PDIC (not shown) connected to a first recognition pin (eg, CC1) 253a.
- the PDIC may transmit/receive a power delivery (PD) message to and from the device recognition circuit 222 of the electronic device 101 .
- the PD message may be a biphase marked code (BMC) type communication protocol.
- the PDIC may transmit identification information of the accessory device 202 to the electronic device 201 through a first recognition pin (eg, CC1) 253a.
- the PDIC may transmit an ID Header VDO.
- the identification information of the accessory device 202 is a specified value (eg, V CONN -Powered USB Device, VPD)
- the first power signal eg, about 5V
- the first power pin eg, VBUS
- a second power signal eg, about 3.3V
- the second recognition pin eg, CC2
- the control unit (eg, a codec chip) 280 may transmit identification information of the accessory device 202 in enumeration. Also, the controller (eg, a codec chip) 280 may receive the sound signal and output it through the sound output device 240 . The controller (eg, a codec chip) 280 may be mounted inside the user interface 245 .
- 6A is a flowchart of a power supply method using a data pin according to various embodiments of the present disclosure
- the processor 220 or the device recognition circuit (eg, PDIC) 222 configures the accessory device 202 through identification pins (eg, configuration channel (CC) pins) 233a and 233b. ) can be detected.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 may determine whether the first resistor Rd, 5.1k is connected to the first recognition pin 233a or the second recognition pin 233b.
- the first resistor is connected to the first recognition pin 233a will be mainly discussed, but the present invention is not limited thereto.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is the first recognition pin 233a)
- the power management module 226 may be controlled to supply a first power signal (eg, about 5V) through the first power pin 231a included in the same first sub pin column 230a as .
- the first power signal eg, about 5V
- the first power signal may be a signal provided by boosting a signal supplied from a battery through a boosting circuit.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is a voltage lower than the first power signal through the second recognition pin (233b)
- the power management module 226 may be controlled to supply a second power signal (eg, about 3.3V).
- the second power signal (eg, about 3.3V) may be a signal directly provided through the battery of the electronic device 201 without a separate boosting circuit.
- the processor 120 may perform USB enumeration through the first data pins (eg, D+, D-) 232a of the first sub-pin string 230a including the first recognition pin 233a.
- USB enumeration may be a process of detecting, identifying, and loading a driver for a USB device (see FIG. 6B ).
- the processor 120 may receive first identification information of the accessory device 202 through USB enumeration.
- the first identification information of the accessory device 202 is at least one of manufacturer identification information (Vendor ID, VID), product identification information (Product ID, PID), manufacturing information (Manufacture info), or product information (Product info). may include some.
- the processor 120 may receive the first identification information through the first data pins (eg, D+, D-) 232a.
- the accessory device 202 may not include a PDIC for PD communication.
- the processor 120 may not receive the identification information of the accessory device 202 through the recognition pins 233a and 233b, and data pins (eg, D+, D-) (232a, 232b) using the USB.
- the first identification information of the accessory device 202 may be received through enumeration.
- the processor 120 may determine whether the first identification information matches the second identification information stored inside the electronic device 201 . For example, the processor 120 may determine whether the accessory device 202 is manufactured by the same manufacturer as the manufacturer of the electronic device 201 . As another example, it may be checked whether the accessory device 202 is manufactured by a company previously negotiated with the manufacturer of the electronic device 201 .
- the processor 220 or the device recognition circuit (eg, PDIC) 222 receives a first power signal supplied through the first power pin 231a
- the power management module 246 may be controlled to cut off (eg, about 5V) and maintain the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b. Through this, the current consumed according to the connection of the accessory device 202 may be reduced.
- the processor 120 may determine whether the accessory device 202 is connected through the hub device.
- the processor 120 maintains the first power signal (eg, about 5V) supplied through the first power pin 231a, and the second recognition pin 233b)
- the power management module 246 may be controlled to block the second power signal (eg, about 3.3V) supplied through the . Through this, the power supply state to the external device connected through the hub device may be maintained as the first power signal (eg, about 5V).
- the processor 220 or the device recognition circuit (eg, PDIC) 222 receives the first power supplied through the first power pin 231a.
- the power management module 246 may be controlled to maintain a signal (eg, about 5V) and block the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b.
- FIG. 6B illustrates USB enumeration in an accessory device according to various embodiments.
- the second connector 250 of the accessory device 202 may be in a state not connected to the first connector 230 of the electronic device 201 .
- the accessory device 202 (or the controller 280 of the accessory device 202) may determine whether a first power signal (eg, VBUS) is supplied to the first power pin 251a.
- a first power signal eg, VBUS
- the accessory device 202 may enter the connected state 683 .
- the accessory device 202 may determine whether the first power signal (eg, VBUS) is greater than or equal to a specified voltage value (eg, 5V). When the first power signal is greater than or equal to a specified voltage value (eg, 5V), the accessory device 202 may enter the power supply state 685 .
- a specified voltage value eg, 5V
- the accessory device 202 may transmit a signal indicating that the first data pin 252a is available to the electronic device 201 as the host device ( 685a ).
- the accessory device 202 may receive a reset command from the electronic device 201 that is a host device through the first data pin 252a ( 685b ).
- the accessory device 202 may perform a device reset corresponding to the reset command.
- the accessory device 202 may enter a default state 691 .
- the accessory device 202 may transmit the device description to the electronic device 201 that is the host device ( 691a ).
- the device description may include identification information of the accessory device 202 .
- the identification information of the accessory device 202 includes at least a part of manufacturer identification information (Vendor ID, VID), product identification information (Product ID, PID), manufacturing information (Manufacture info), or product information (Product info).
- the accessory device 202 may receive an address command from the electronic device 201 as a host device ( 691b ), and may enter an addressed step ( 693 ).
- the electronic device 201 displays the first power pin 231a of the first connector 230 . ) to cut off the first power signal (eg, about 5V) and maintain the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b of the first connector 230 .
- the first power signal eg, about 5V
- the second power signal eg, about 3.3V
- the accessory device 202 may send the additional device description to the electronic device 201 as the host device ( 693a ).
- the accessory device 202 may receive the configuration command 693b and enter a configuration step 695 .
- the accessory device 202 may output a sound signal transmitted from the electronic device 201 as a host device as a sound through a speaker.
- FIG. 7 is a flowchart of a power supply method citing PD communication according to various embodiments of the present disclosure
- the processor 220 or the device recognition circuit (eg, PDIC) 222 configures the accessory device 202 through identification pins (eg, configuration channel (CC) pins) 233a and 233b. ) can be detected.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 may determine whether the first resistor Rd, 5.1k is connected to the first recognition pin 233a or the second recognition pin 233b.
- the first resistor is connected to the first recognition pin 233a will be mainly discussed, but the present invention is not limited thereto.
- at least a part of the operation of the processor 220 may be performed by the device recognition circuit (eg, PDIC) 222 .
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is the first recognition pin 233a
- the power management module 226 may be controlled to supply a first power signal (eg, about 5V) through the first power pin 231a included in the same first sub pin column 230a as .
- the first power signal eg, about 5V
- the first power signal may be a signal provided by boosting a signal supplied from a battery through a boosting circuit.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is a voltage lower than the first power signal through the second recognition pin (233b)
- the power management module 226 may be controlled to supply a second power signal (eg, about 3.3V).
- the second power signal (eg, about 3.3V) may be a signal directly provided through the battery of the electronic device 201 without a separate boosting circuit.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 may determine whether PD communication using the first recognition pin 233a of the first connector 230 is possible.
- the accessory device 202 includes a PDIC connected to the first recognition pin (eg, CC1) 253a of the second connector 250, PD communication may be possible.
- a power delivery (PD) message may be a biphase marked code (BMC) type communication protocol.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is the first of the accessory device 202 through the first recognition pin (233a) of the first connector (230). 1 You can receive an identification alert.
- the first identification information may be an ID Header Vendor Define Object (VDO).
- the processor 220 or the device recognition circuit (eg, PDIC) 222 may determine whether the first identification information is a specified value. For example, the processor 220 or the device recognition circuit (eg, PDIC) 222 may determine whether a Vendor Define Object (VDO) is V CONN -Powered USB Device (VPD).
- VDO Vendor Define Object
- VPD V CONN -Powered USB Device
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is a first power signal (eg, about 5V) supplied through the first power pin 231a ) and may control the power management module 246 to maintain a second power signal (eg, about 3.3V) supplied through the second recognition pin 233b.
- a first power signal eg, about 5V
- a second power signal eg, about 3.3V
- the processor 220 or the device recognition circuit (eg, PDIC) 222 receives the first power pin 231a supplied through the first power pin 231a.
- the power management module 246 may be controlled to maintain one power signal (eg, about 5V) and block the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is the manufacturer identification information (Vendor) of the accessory device 202 through the first recognition pin (233a) of the first connector (230) ID, VID) or product identification information (Product ID, PID).
- the processor 220 or the device recognition circuit (eg, PDIC) 222 receives a first power signal (eg, about 5V) supplied through the first power pin 231a. cut off, and the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b may be maintained.
- FIG. 8 is a flowchart of a power supply method using audio headset information according to various embodiments of the present disclosure
- the processor 220 or the device recognition circuit (eg, PDIC) 222 configures the accessory device 202 through identification pins (eg, configuration channel (CC) pins) 233a and 233b. ) can be detected.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 may determine whether the first resistor Rd, 5.1k is connected to the first recognition pin 233a or the second recognition pin 233b.
- the first resistor is connected to the first recognition pin 233a will be mainly discussed, but the present invention is not limited thereto.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is the first recognition pin 233a)
- the power management module 226 may be controlled to supply a first power signal (eg, about 5V) through the first power pin 231a included in the same first sub pin column 230a as .
- the first power signal eg, about 5V
- the first power signal may be a signal provided by boosting a signal supplied from a battery through a boosting circuit.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is a voltage lower than the first power signal through the second recognition pin (233b)
- the power management module 226 may be controlled to supply a second power signal (eg, about 3.3V).
- the second power signal (eg, about 3.3V) may be a signal directly provided through the battery of the electronic device 201 without a separate boosting circuit.
- the processor 120 may perform USB enumeration through the first data pins (eg, D+, D-) 232a of the first sub-pin string 230a including the first recognition pin 233a.
- USB enumeration can be the process of detecting, identifying, and loading a driver for a USB device.
- the processor 120 may receive audio headset information of the accessory device 202 through USB enumeration.
- the audio headset information may be configured in the Audio Control Interface It can be a descriptor.
- the processor 120 may determine whether the audio headset information has a specified value. For example, it can be checked whether the Audio Function Category Codes included in the bCategory Field of the Audio Control Interface Descriptor are HEADSET.
- the processor 220 or the device recognition circuit (eg, PDIC) 222 provides a first power signal (eg, about 5V) supplied through the first power pin 231a. to block and control the power management module 246 to maintain the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b.
- a first power signal eg, about 5V
- the second power signal eg, about 3.3V
- the processor 120 may determine whether the accessory device 202 is connected through the hub device. When the accessory device 202 is connected through the hub device, the processor 120 maintains the first power signal (eg, about 5V) supplied through the first power pin 231a, and the second recognition pin 233b) The power management module 246 may be controlled to block the second power signal (eg, about 3.3V) supplied through the . Through this, the power supply state to the external device connected through the hub device may be maintained as the first power signal (eg, about 5V).
- the first power signal eg, about 5V
- the power management module 246 may be controlled to block the second power signal (eg, about 3.3V) supplied through the .
- the power supply state to the external device connected through the hub device may be maintained as the first power signal (eg, about 5V).
- the processor 220 or the device recognition circuit (eg, PDIC) 222 receives a first power signal (eg, about 5V) and may control the power management module 246 to block the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b.
- a first power signal eg, about 5V
- the power management module 246 may control the power management module 246 to block the second power signal (eg, about 3.3V) supplied through the second recognition pin 233b.
- FIG. 9 is a graph showing a change in a first power signal or a second power signal according to various embodiments of the present disclosure.
- both the first power signal VBUS and the second power signal VCNN are in an L state. (eg about 0V) can be (time before t1).
- the processor 220 or the device recognition circuit (eg, PDIC) 222 is the same as the first recognition pin 233a
- the first power signal VBUS supplied through the first power pin 231a included in the first sub pin column 230a changes the H1 state (eg, about 5V), and through the second recognition pin 233b
- the supplied second power signal VCONN may be changed to the H2 state (eg, about 3.3V).
- the processor 220 or the device recognition circuit (eg, PDIC) ) 222 changes the first power signal (VBUS) from the H1 state (eg, about 5V) to the L state (eg, about 0V), and changes the second power signal (VCONN) to the H2 state (eg, about 3.3V) ) can be maintained.
- VUS first power signal
- the processor 220 or the device recognition circuit (eg : PDIC) 222 maintains the first power signal (VBUS) in the H1 state (eg, about 5V), and the second power signal (VCONN) in the H2 state (eg, about 3.3V) in the L state (eg : about 0V) can be changed.
- VBUS first power signal
- VCONN second power signal
- H2 state eg, about 3.3V
- L state eg : about 0V
- the processor 220 or the device recognition circuit (eg, PDIC) 222 transmits the second power signal VCONN. It can change from an H2 state (eg about 3.3V) to an L state (eg about 0V).
- Electronic devices include a housing, a battery disposed inside the housing, and power for controlling power supply of the battery A management module (eg, the power management module 188 of FIG. 1 , the power management module 226 of FIG. 3 ), a connector disposed inside the housing (eg, the first connector 230 of FIG. 2 ), the connector A device recognition circuit (eg, the device recognition circuit 222 of FIG. 3 ) for detecting a connection state of (eg, the first connector 230 of FIG. 2 ), a memory, and the memory, the power management module (eg, FIG. 3 ) 1 , power management module 226 of FIG.
- a management module eg, the power management module 188 of FIG. 1 , the power management module 226 of FIG. 3
- a connector disposed inside the housing eg, the first connector 230 of FIG. 2
- the connector A device recognition circuit eg, the device recognition circuit 222 of FIG. 3
- the power management module eg, FIG. 3
- power management module eg,
- the first connector 230 of FIG. 2 includes a first sub pin row and a second sub pin row symmetrical to the first sub pin row, and the first sub pin row includes a first power pin and first data a pin and a first recognition pin, the second sub-pin column includes a second power supply pin, a second data pin, and a second recognition pin, the first recognition pin and the second recognition pin are the device connected to a recognition circuit (eg, device identification circuit 222 of FIG. 3 ), the processor or the device identification circuit (eg, device identification circuit 222 of FIG.
- an external accessory device to the connector (eg, device identification circuit 222 of FIG. 3 ): When connected to the first connector 230 of FIG. 2 ) and a resistance value specified for the first recognition pin is sensed, a first power signal is supplied to the first power pin, and a second power signal is supplied to the second recognition pin 2 control the power management module to supply a power signal, receive the first identification information of the accessory device through the first recognition pin or the first data pin, the first identification information is a specified value or the memory When matching with the second identification information stored in the power management module to cut off the first power signal and maintain the second power signal can be controlled
- the processor may receive the first identification information by performing USB enumeration using the first data pin.
- the first identification information may include manufacturer information or product information of the accessory device.
- the memory may store a list of the second identification information.
- the processor may receive the first identification information using the first data pin in the default state of the USB enumeration.
- the processor may receive audio headset information using the first data pin.
- the processor may control the power management module to cut off the first power signal and maintain the second power signal.
- the processor maintains the first power signal when it is recognized that the accessory device is connected to the connector (eg, the first connector 230 of FIG. 2 ) through a separate hub device, and , control the power management module to cut off the second power signal.
- the processor may transmit an acoustic signal to the accessory device through the first data pin.
- the device recognition circuit receives the first identification information through a message through power delivery (PD) communication through the first recognition pin can do.
- PD power delivery
- the specified value may be a code set in a device operable by the second power signal.
- the first power signal may have a higher voltage value than the second power signal.
- the connector (eg, the first connector 230 of FIG. 2 ) may be a USB-C type receptacle.
- the accessory device (eg, the accessory device 202 of FIG. 2 ) according to various embodiments is connected to an external device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ) by wire, A connector (eg, second in FIG. 2 ) connected to a control unit (eg, the control unit 280 of FIG. 5 ), and the external device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ) connector 250), wherein the connector (eg, the second connector 250 of FIG.
- the first sub pin column includes a first power pin, a first data pin, and a first recognition pin
- the first recognition pin is connected to a first resistor
- the second sub pin column includes a second recognition pin
- the control unit eg, the control unit 280 of FIG. 5
- the controller may transmit manufacturer information or product information of the accessory device through the first data pin.
- the first power signal may be supplied to the controller (eg, the controller 280 of FIG. 5 ) after the voltage is dropped by the second resistor.
- a method of supplying power to an accessory device includes an electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ) the first sub-pin sequence of a connector (eg, the first connector 230 of FIG. 2 ) of the electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ).
- An operation of detecting a specified resistance value of the accessory device eg, the accessory device 202 of FIG.
- the accessory device Example: an operation of receiving first identification information of the accessory device 202 of FIG. 2 , and the electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ) using the first identification information ) matching the second identification information stored in the memory, and when the first identification information and the second identification information match, the operation of cutting off the first power signal and maintaining the second power signal may include
- the operation of receiving the first identification information may include an operation performed through USB enumeration.
- a method of supplying power to an accessory device includes an electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ) the first sub-pin sequence of a connector (eg, the first connector 230 of FIG. 2 ) of the electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ).
- An operation of detecting a specified resistance value of the accessory device eg, the accessory device 202 of FIG.
- the recognition pin supplying a first power signal to a first power pin to the first sub-pin column, and the An operation of supplying a second power signal to a second recognition pin of a second sub-pin column of a connector (eg, the first connector 230 of FIG. 2 ), and the accessory device (eg, of FIG. 2 ) through the first recognition pin It may include an operation of receiving the first identification information of the accessory device 202), and, when the first identification information is a specified value, cutting off the first power signal and maintaining the second power signal .
- a method of supplying power to an accessory device includes an electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ) the first sub-pin sequence of a connector (eg, the first connector 230 of FIG. 2 ) of the electronic device (eg, the electronic device 101 of FIG. 1 , the electronic device 201 of FIG. 2 ).
- An operation of detecting a specified resistance value of the connected accessory device eg, the accessory device 202 of FIG.
- the accessory device Example: an operation of receiving audio headset information of the accessory device 202 of FIG. 2), and, when the audio headset information is a specified value, cutting off the first power signal and maintaining the second power signal can do.
- the electronic device may have various types of devices.
- the electronic device may include, for example, a portable communication device (eg, a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance device.
- a portable communication device eg, a smart phone
- a computer device e.g., a smart phone
- a portable multimedia device e.g., a portable medical device
- a camera e.g., a portable medical device
- a camera e.g., a portable medical device
- a camera e.g., a portable medical device
- a wearable device e.g., a smart bracelet
- a home appliance device e.g., a home appliance
- first, second, or first or second may be used simply to distinguish an element from other elements in question, and may refer elements to other aspects (e.g., importance or order) is not limited. It is said that one (eg, first) component is “coupled” or “connected” to another (eg, second) component, with or without the terms “functionally” or “communicatively”. When referenced, it means that one component can be connected to the other component directly (eg by wire), wirelessly, or through a third component.
- module used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is interchangeable with terms such as, for example, logic, logic block, component, or circuit.
- a module may be an integrally formed part or a minimum unit or a part of the part that performs one or more functions.
- the module may be implemented in the form of an application-specific integrated circuit (ASIC).
- ASIC application-specific integrated circuit
- one or more instructions stored in a storage medium may be implemented as software (eg, the program 140) including
- the processor eg, the processor 120
- the device eg, the electronic device 201
- the one or more instructions may include code generated by a compiler or code executable by an interpreter.
- the device-readable storage medium may be provided in the form of a non-transitory storage medium.
- 'non-transitory' only means that the storage medium is a tangible device and does not include a signal (eg, electromagnetic wave), and this term is used in cases where data is semi-permanently stored in the storage medium and It does not distinguish between temporary storage cases.
- a signal eg, electromagnetic wave
- the method according to various embodiments disclosed in this document may be provided as included in a computer program product.
- Computer program products may be traded between sellers and buyers as commodities.
- the computer program product is distributed in the form of a machine-readable storage medium (eg compact disc read only memory (CD-ROM)), or via an application store (eg Play StoreTM) or on two user devices ( It can be distributed (eg downloaded or uploaded) directly between smartphones (eg: smartphones) and online.
- a part of the computer program product may be temporarily stored or temporarily created in a machine-readable storage medium such as a memory of a server of a manufacturer, a server of an application store, or a relay server.
- each component (eg, module or program) of the above-described components may include a singular or a plurality of entities, and some of the plurality of entities may be separately disposed in other components. have.
- one or more components or operations among the above-described corresponding components may be omitted, or one or more other components or operations may be added.
- a plurality of components eg, a module or a program
- the integrated component may perform one or more functions of each component of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. .
- operations performed by a module, program, or other component are executed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations are executed in a different order, or omitted. or one or more other operations may be added.
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Abstract
Description
Claims (15)
- 전자 장치에 있어서,하우징;상기 하우징의 내부에 배치되는 배터리;상기 배터리의 전력 공급을 제어하는 전력 관리 모듈;상기 하우징의 내부에 배치되는 커넥터;상기 커넥터에 외부 장치의 연결 상태를 감지하는 장치 인식 회로;메모리; 및상기 메모리, 상기 전력 관리 모듈 또는 상기 장치 인식 회로와 전기적으로 연결되는 프로세서;를 포함하고,상기 커넥터는 제1 서브 핀열 및 상기 제1 서브 핀열과 대칭되도록 배치되는 제2 서브 핀열을 포함하고,상기 제1 서브 핀열은 제1 전원핀, 제1 데이터핀, 및 제1 인식핀을 포함하고,상기 제2 서브 핀열은 제2 전원핀, 제2 데이터핀, 및 제2 인식핀을 포함하고,상기 제1 인식핀 및 상기 제2 인식핀은 상기 장치 인식 회로에 연결되고,상기 프로세서 또는 상기 장치 인식 회로는,외부의 액세서리 장치가 상기 커넥터에 연결되고, 상기 제1 인식핀에 지정된 저항값이 감지되는 경우, 상기 제1 전원핀에 제1 전원 신호를 공급하고, 상기 제2 인식핀에 제2 전원 신호를 공급하도록 상기 전원 관리 모듈을 제어하고,상기 제1 인식핀 또는 상기 제1 데이터핀을 통해 상기 액세서리 장치의 제1 식별 정보를 수신하고,상기 제1 식별 정보가 지정된 값이거나 상기 메모리에 저장된 제2 식별 정보와 매칭되는 경우, 상기 제1 전원 신호를 차단하고, 상기 제2 전원 신호를 유지하도록 상기 전원 관리 모듈을 제어하는 전자 장치.
- 제1항에 있어서, 상기 프로세서는상기 제1 데이터핀을 이용해 USB enumeration을 수행하여, 상기 제1 식별 정보를 수신하는 전자 장치.
- 제2항에 있어서, 상기 제1 식별 정보는상기 액세서리 장치의 제조사 정보 또는 제품 정보를 포함하는 전자 장치.
- 제2항에 있어서, 상기 메모리는상기 제2 식별 정보의 리스트를 저장하는 전자 장치.
- 제2항에 있어서, 상기 프로세서는상기 USB enumeration의 디폴트 상태에서, 상기 제1 데이터핀을 이용해 상기 제1 식별 정보를 수신하는 전자 장치.
- 제2항에 있어서, 상기 프로세서는상기 제1 데이터핀을 이용해 오디오 헤드셋 정보를 수신하는 전자 장치.
- 제6항에 있어서, 상기 프로세서는상기 오디오 헤드셋 정보가 지정된 코드인 경우, 상기 제1 전원 신호를 차단하고, 상기 제2 전원 신호를 유지하도록 상기 전원 관리 모듈을 제어하는 전자 장치.
- 제2항에 있어서, 상기 프로세서는상기 액세서리 장치가 별도의 허브 장치를 통해 상기 커넥터에 연결된 상태로 인식되는 경우, 상기 제1 전원 신호를 유지하고, 상기 제2 전원 신호를 차단하도록 상기 전원 관리 모듈을 제어하는 전자 장치.
- 제2항에 있어서, 상기 프로세서는상기 제1 데이터 핀을 통해 음향 신호를 상기 액세서리 장치에 전송하는 전자 장치.
- 제1항에 있어서, 상기 장치 인식 회로는,상기 제1 인식핀을 통해 PD(power delivery) 통신에 의한 메시지를 통해 상기 제1 식별 정보를 수신하는 전자 장치.
- 제10항에 있어서, 상기 지정된 값은상기 제2 전원 신호에 의해 동작 가능한 장치에 설정된 코드인 전자 장치.
- 제1항에 있어서, 상기 제1 전원 신호는상기 제2 전원 신호보다 높은 전압 값을 가지는 전자 장치.
- 제1항에 있어서, 상기 커넥터는USB C타입에 따른 리셉터클인 전자 장치.
- 전자 장치에서 액세서리 장치에 전력을 공급하는 방법에 있어서,상기 전자 장치의 커넥터의 제1 서브 핀열의 제1 인식핀을 통해 연결된 상기 액세서리 장치의 지정된 저항값을 감지하는 동작;상기 제1 서브 핀열에 제1 전원핀에 제1 전원 신호를 공급하고, 상기 커넥터의 제2 서브 핀열의 제2 인식핀에 제2 전원 신호를 공급하는 동작;상기 제1 서브 핀열의 제1 데이터핀을 통해 상기 액세서리 장치의 제1 식별 정보를 수신하는 동작;상기 제1 식별 정보를 상기 전자 장치의 메모리에 저장된 제2 식별 정보와 매칭하는 동작; 및상기 제1 식별 정보와 상기 제2 식별 정보가 매칭되는 경우, 상기 제1 전원 신호를 차단하고, 상기 제2 전원 신호를 유지하는 동작;을 포함하는 방법.
- 제14항에 있어서, 상기 제1 식별 정보를 수신하는 동작은USB enumeration 을 통해 수행하는 동작;을 포함하는 방법.
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CN202180079721.4A CN116507991A (zh) | 2020-11-26 | 2021-11-26 | 包括连接器的电子装置 |
EP21898689.1A EP4216032A4 (en) | 2020-11-26 | 2021-11-26 | ELECTRONIC DEVICE COMPRISING A CONNECTOR |
US18/135,886 US20230259188A1 (en) | 2020-11-26 | 2023-04-18 | Electronic device comprising connector |
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US (1) | US20230259188A1 (ko) |
EP (1) | EP4216032A4 (ko) |
KR (1) | KR20220073344A (ko) |
CN (1) | CN116507991A (ko) |
WO (1) | WO2022114864A1 (ko) |
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WO2023239040A1 (ko) * | 2022-06-10 | 2023-12-14 | 삼성전자주식회사 | 전자 장치 및 이의 동작 방법 |
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KR102575430B1 (ko) * | 2016-10-25 | 2023-09-06 | 삼성전자 주식회사 | 전자 장치와 전자 장치가 외부 장치의 접속 단자를 인식하는 방법 |
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2021
- 2021-11-26 CN CN202180079721.4A patent/CN116507991A/zh active Pending
- 2021-11-26 WO PCT/KR2021/017675 patent/WO2022114864A1/ko active Application Filing
- 2021-11-26 EP EP21898689.1A patent/EP4216032A4/en active Pending
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2023
- 2023-04-18 US US18/135,886 patent/US20230259188A1/en active Pending
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Also Published As
Publication number | Publication date |
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EP4216032A4 (en) | 2024-02-21 |
KR20220073344A (ko) | 2022-06-03 |
CN116507991A (zh) | 2023-07-28 |
EP4216032A1 (en) | 2023-07-26 |
US20230259188A1 (en) | 2023-08-17 |
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