WO2022105448A1 - Method and system for maintaining pcie signal connection by using in-place signal, device, and medium - Google Patents

Method and system for maintaining pcie signal connection by using in-place signal, device, and medium Download PDF

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Publication number
WO2022105448A1
WO2022105448A1 PCT/CN2021/121429 CN2021121429W WO2022105448A1 WO 2022105448 A1 WO2022105448 A1 WO 2022105448A1 CN 2021121429 W CN2021121429 W CN 2021121429W WO 2022105448 A1 WO2022105448 A1 WO 2022105448A1
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expansion cabinet
signal
response
control chip
main controller
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PCT/CN2021/121429
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French (fr)
Chinese (zh)
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王凌骏
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苏州浪潮智能科技有限公司
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Publication of WO2022105448A1 publication Critical patent/WO2022105448A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

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  • the present application relates to the field of servers, and more particularly, to a method, a system, a computer device and a readable medium for maintaining a PCIE signal connection by using an in-position signal.
  • the storage server processes various problems through CPU computing, and then stores the information on the mounted hard disk.
  • the CPU motherboard and the hard disk are together, and in some storage servers, the CPU motherboard and the hard disk are two controllers, that is, the CPU and the hard disk are not on the same motherboard, and can be connected through a network or a cable.
  • PCIe bus adopts Hot Plug technology to realize the replacement of PCIe card devices without turning off the system power.
  • various problems will occur, including cable damage or the operator inserting the wrong cable.
  • Such problems will cause the main controller and the expansion cabinet to be disconnected at the corresponding nodes, resulting in control
  • the controller changes from dual control to single control, which seriously affects product performance.
  • closing the main control cabinet and the expansion cabinet to replace cables will not only delay time, but also affect normal business interaction.
  • the purpose of the embodiments of the present application is to propose a method, system, computer equipment and computer-readable storage medium for maintaining a PCIE signal connection by utilizing an in-position signal, by sending an in-position signal to the main control chip of the main controller; And release the reset signal and release the reset state of the PCIE link of the upstream port of the main control chip, realize the purpose of maintaining the connection between the main controller and the expansion cabinet, and improve the reliability of the product.
  • an aspect of the embodiments of the present application provides a method for maintaining a PCIE signal connection by using an in-position signal, including the following steps: in response to the interruption of the PCIE link between the main controller and the expansion cabinet, based on each expansion cabinet The presence signal of each port judges whether the cables between the main controller and the expansion cabinet are all in place; in response to all the cables between the main controller and the expansion cabinet are in place, the The main control chip of the main controller sends the in-position signal; in response to the main control chip receiving the in-position signal, the reset signal is released and the reset state of the PCIE link of the upstream port of the main control chip is released; and in response After the PCIE link of the upstream port of the main control chip ends in a reset state, the PCIE link is connected so that the main controller and the expansion cabinet are in a connected state.
  • the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet includes: acquiring the presence signal of each port of the expansion cabinet , and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
  • the method further includes: in response to the cables between the main controller and the expansion cabinet not being all in place, resetting the PCIE signal of the main control chip of the expansion cabinet.
  • the method further includes: in response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether a sequence of devices with all ports exists in the sequence list; and in response to the absence of devices with all ports in the sequence list Sequence, set the connection bandwidth according to the device sequence in the sequence list.
  • Another aspect of the embodiments of the present application further provides a system for maintaining a PCIE signal connection by using an in-position signal, including: a judgment module, configured to respond to the interruption of the PCIE link between the main controller and the expansion cabinet, based on the expansion
  • the presence signal of each port of the cabinet determines whether the cables between the main controller and the expansion cabinet are all in place;
  • the sending module is configured to respond to the connection between the main controller and the expansion cabinet.
  • the cables are all in place, and send an in-position signal to the main control chip of the main controller;
  • the reset module is configured to release the reset signal and release the main control chip in response to the main control chip receiving the in-position signal.
  • the reset state of the PCIE link of the upstream port of the control chip and the connection module, configured to end the reset state in response to the PCIE link of the upstream port of the main control chip, and communicate the PCIE link so that the main controller and the The expansion enclosure is in a connected state.
  • the judging module is configured to: obtain the in-position signal of each port of the expansion cabinet, and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
  • a second reset module is further included, configured to: in response to that the cables between the main controller and the expansion cabinet are not all in place, reset the PCIE of the main control chip of the expansion cabinet Signal.
  • a detection module is further included, configured to: in response to the main control cabinet and the expansion cabinet being in a connected state, to detect whether there are device sequences of all ports in the sequence list; There is a device sequence for all ports, and the connection bandwidth is set according to the device sequence in the sequence list.
  • a computer device including: at least one processor; and a memory, where the memory stores computer instructions that can be executed on the processor, and the instructions are executed by the processor.
  • the processor implements the steps of the above method when executed.
  • a computer-readable storage medium stores a computer program that implements the above method steps when executed by a processor.
  • the present application has the following beneficial technical effects: by sending an in-position signal to the main control chip of the main controller; and releasing the reset signal and releasing the reset state of the PCIE link of the upstream port of the main control chip, the main controller and the expansion cabinet are maintained.
  • the purpose of the connection is to improve the reliability of the product.
  • FIG. 1 is a schematic diagram of an embodiment of a method for maintaining a PCIE signal connection using an in-position signal provided by the present application
  • FIG. 2 is a schematic diagram of a hardware structure of an embodiment of a computer device that maintains a PCIE signal connection by using an in-position signal provided by the present application.
  • FIG. 1 shows a schematic diagram of an embodiment of a method for maintaining a PCIE signal connection by using an in-position signal provided by the present application.
  • the embodiment of the present application includes the following steps:
  • the PCIE link is communicated so that the main controller and the expansion cabinet are in a connected state.
  • the main controller and the expansion cabinet interact through the Mini SAS cable, and they communicate through the PCIE protocol.
  • PCIE protocol because the Mini SAS cable is used, there are only x16 differential signals inside the cable.
  • Other sideband (sideband) signals so the PCIE protocol between the main controller and the expansion cabinet is incomplete.
  • the cabinet loses interaction, and the state machine enters the Polling state. Since there is no other sideband, the main controller cannot send a PERST (reset) signal to the expansion cabinet. Only restart the main control cabinet or the expansion cabinet to solve the problem.
  • the cables can be hot-plugged arbitrarily. For example, only any number of cables on the expansion cabinet can be hot-plugged, or only the main Any number of cables on the controller side can also be hot-swapped between the main controller and the expansion cabinet.
  • the polling state of the PCIE state machine has a judgment of 24ms. If the Polling_Active is not completed within 24ms, it will jump out. The Polling state returns to the Detect state.
  • the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet includes: acquiring the presence signal of each port of the expansion cabinet , and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
  • the CPLD of the main controller "inverts" the in-position signal of the port and registers it in the register, and performs an "AND” operation with the in-position signal of other ports.
  • the CPLD when the cables of all ports of the expansion cabinet are completely hot-inserted, the CPLD "inverts" the in-position signals of all ports one by one and performs an "AND” operation.
  • the in-position signal is at a low level, it is "0" for CPLD, and when "inverting" the in-position signal of other ports and then performing the "AND” operation, if it is “0", it means that at least one cable is not connected. Insert, if it is “1”, it means that all cables have been inserted into the expansion cabinet.
  • a presence signal is sent to the main control chip of the main controller.
  • the method further includes: in response to the cables between the main controller and the expansion cabinet not being all in place, resetting the PCIE signal of the main control chip of the expansion cabinet.
  • the reset signal is released and the reset state of the PCIE link of the upstream port of the master control chip is released.
  • the CPLD outputs the in-position signals of all ports to the main controller or the main control chip of the expansion cabinet, which is used to control the PERST signal of the upstream port of the main control chip.
  • the CPLD will eventually output " 1” (high level) to the main control chip, when the main control chip detects that it is a high level, the PERST signal will be released, and the PCIE link of the upstream port of the main control chip will be de-reset.
  • the main control chip detects that it is a low level, and will always hold the PERST signal, so that the main control chip will always hold the PERST signal.
  • the PCIE of the upstream port of the control chip is always in the reset state and will not be Linked, and the state machine is always in the Detect state.
  • the PCIE link In response to ending the reset state of the PCIE link of the upstream port of the main control chip, the PCIE link is connected so that the main controller and the expansion cabinet are in a connected state.
  • the method further includes: in response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether a sequence of devices with all ports exists in the sequence list; and in response to the absence of devices with all ports in the sequence list Sequence, set the connection bandwidth according to the device sequence in the sequence list.
  • the link initialization and training in the PCIe bus starts to enter the state machine mode and perform the Link process. For example, there are 4 ports, and each port has a bandwidth of x4. It is inserted from port 1.
  • port 3 or port 4 is inserted, the state machine will go from Detect to Polling to Configuration (configuration) and then to L0.
  • PCIE does not have the bandwidth of x12, so only Link can be the bandwidth of the first two ports, that is, the bandwidth of x8.
  • port 3 and port 4 are eventually inserted into the main controller and the expansion cabinet. If both the main controller and the expansion cabinet support the high-speed transmission of x16Gen3, they will automatically enter the Re-training (retraining) state to switch the speed again. , and ultimately the Gen3 rate and x16 bandwidth.
  • port 1 is inserted last, because the PCIE mechanism starts Link from Lane0, when port 1 is not inserted, it will not be linked. Only when port 1 is inserted, it will enter the state machine, which is directly the bandwidth of x16. No Re-training mechanism is required.
  • any hot-plugging of a cable will cause the state machine to jump to the Detect state, and the PCIe device will detect whether there are other PCIe devices at the other end of its Link (connection). In other words, it is to detect whether there are other PCIe devices connected to it.
  • the cable is restored and it detects that there is a PCIE device on the opposite end, it will enter the next state from the Detect state until the L0 state to complete the Link.
  • a second aspect of the embodiments of the present application proposes a system for maintaining a PCIE signal connection by using an in-position signal, including: a judgment module configured to respond to the PCIE chain between the main controller and the expansion cabinet If the circuit is interrupted, based on the presence signal of each port of the expansion cabinet, it is judged whether the cables between the main controller and the expansion cabinet are all in place; the sending module is configured to respond to the main controller and the expansion cabinet.
  • All cables between the expansion cabinets are in place, and send an in-position signal to the main control chip of the main controller; a reset module is configured to release the reset signal in response to the main control chip receiving the in-position signal And release the reset state of the PCIE link of the upstream port of the main control chip; And the connection module is configured to end the reset state in response to the PCIE link of the upstream port of the main control chip, and communicates the PCIE link so that all The main controller is in a connected state with the expansion cabinet.
  • the judging module is configured to: obtain the in-position signal of each port of the expansion cabinet, and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
  • a second reset module is further included, configured to: in response to that the cables between the main controller and the expansion cabinet are not all in place, reset the PCIE of the main control chip of the expansion cabinet Signal.
  • a detection module is further included, configured to: in response to the main control cabinet and the expansion cabinet being in a connected state, to detect whether there are device sequences of all ports in the sequence list; There is a device sequence for all ports, and the connection bandwidth is set according to the device sequence in the sequence list.
  • a computer device including: at least one processor; and a memory, where the memory stores computer instructions that can be executed on the processor, and the instructions are executed by the processor to The following steps are implemented: S1, in response to the interruption of the PCIE link between the main controller and the expansion cabinet, determine whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet; S2 . In response to all cables between the main controller and the expansion cabinet being in place, send an in-position signal to the main control chip of the main controller; S3. In response to the main control chip receiving the in-position signal, release the reset signal and release the main control chip.
  • the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet includes: acquiring the presence signal of each port of the expansion cabinet , and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
  • the step further includes: in response to the cables between the main controller and the expansion cabinet not being all in place, resetting the PCIE signal of the main control chip of the expansion cabinet.
  • the steps further include: in response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether there are device sequences of all ports in the sequence list; and in response to the absence of devices of all ports in the sequence list Sequence, set the connection bandwidth according to the device sequence in the sequence list.
  • FIG. 2 it is a schematic diagram of the hardware structure of an embodiment of the above-mentioned computer device using an in-position signal to maintain a PCIE signal connection provided by the present application.
  • the device includes a processor 301 and a memory 302 , and may further include an input device 303 and an output device 304 .
  • the processor 301 , the memory 302 , the input device 303 and the output device 304 may be connected by a bus or in other ways, and the connection by a bus is taken as an example in FIG. 2 .
  • the memory 302 can be used to store non-volatile software programs, non-volatile computer-executable programs and modules.
  • the PCIE signal is maintained by using the in-position signal.
  • the processor 301 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions and modules stored in the memory 302, that is, the method of maintaining the PCIE signal connection by using the in-position signal in the above method embodiments is realized. method.
  • the memory 302 may include a stored program area and a stored data area, wherein the stored program area may store an operating system, an application program required by at least one function; created data, etc. Additionally, memory 302 may include high speed random access memory, and may also include nonvolatile memory, such as at least one magnetic disk storage device, flash memory device, or other nonvolatile solid state storage device. In some embodiments, memory 302 may optionally include memory located remotely from processor 301, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
  • the input device 303 can receive input information such as user name and password.
  • the output device 304 may include a display device such as a display screen.
  • One or more program instructions/modules corresponding to the method of using the in-position signal to maintain the PCIE signal connection are stored in the memory 302, and when executed by the processor 301, perform any of the above method embodiments using the in-position signal to maintain the PCIE signal connection. Methods.
  • Any embodiment of the computer device that executes the above-mentioned method for maintaining a PCIE signal connection by using an in-position signal can achieve the same or similar effects as any of the foregoing method embodiments corresponding to it.
  • the present application also provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program that executes the above method when executed by a processor.
  • the storage medium can be a read-only memory, a magnetic disk or an optical disk, and the like.

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Abstract

A method and system for maintaining a PCIE signal connection by using an in-place signal, a device, and a medium. The method comprises: in response to interruption of a PCIE link between a master controller and an expansion cabinet, determining, on the basis of the in-place signal of each port of the expansion cabinet, whether cables between the master controller and the expansion cabinet are all in place (S1); in response to the cables between the master controller and the expansion cabinet being all in place, sending the in-place signal to a master control chip of the master controller (S2); in response to the master control chip receiving the in-place signal, releasing a reset signal and releasing a reset state of the PCIE link of an uplink port of the master control chip (S3); and in response to finishing the reset state of the PCIE link of the uplink port of the master control chip, communicating the PCIE link to enable the master controller and the expansion cabinet to be in a connection state (S4). The method sends the in-place signal to the master control chip of the master controller, and releases the reset signal and releases the reset state of the PCIE link of the uplink port of the master control chip, thereby achieving the purpose of maintaining the connection between the master controller and the expansion cabinet, and improving the product reliability.

Description

利用在位信号保持PCIE信号连接的方法、系统、设备及介质Method, system, device and medium for maintaining PCIE signal connection by using in-position signal
本申请要求在2020年11月20日提交中国专利局、申请号为202011311071.5、发明名称为“利用在位信号保持PCIE信号连接的方法、系统、设备及介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed on November 20, 2020 with the Chinese Patent Office, the application number is 202011311071.5, and the invention title is "Method, System, Device and Medium for Maintaining PCIE Signal Connection Using In-Place Signals", which The entire contents of this application are incorporated by reference.
技术领域technical field
本申请涉及服务器领域,更具体地,特别是指一种利用在位信号保持PCIE信号连接的方法、系统、计算机设备及可读介质。The present application relates to the field of servers, and more particularly, to a method, a system, a computer device and a readable medium for maintaining a PCIE signal connection by using an in-position signal.
背景技术Background technique
随着互联网企业的日益增多,所涉及的行业也越来越多。比如电商行业,短视频和微视频行业,在线直播行业以及网络电影网络音乐等等,它们都把实体产品都搬到了网络上,人们现在只要有手机,就能随时随地的享受这些产品。这些虚拟的东西均存在于大型的存储服务器中,存储服务器通过CPU计算处理各类问题,然后将信息存储到挂载的硬盘上。有的存储服务器中CPU主板和硬盘在一起,有的存储服务器中CPU主板和硬盘是两个控制器,即CPU和硬盘不在同一个主板上,可以通过网络连接,也可以通过线缆连接。With the increasing number of Internet companies, more and more industries are involved. For example, the e-commerce industry, short video and micro video industry, online live broadcast industry, online movies and online music, etc., have all moved physical products to the Internet. Now people can enjoy these products anytime and anywhere as long as they have a mobile phone. These virtual things all exist in large storage servers. The storage server processes various problems through CPU computing, and then stores the information on the mounted hard disk. In some storage servers, the CPU motherboard and the hard disk are together, and in some storage servers, the CPU motherboard and the hard disk are two controllers, that is, the CPU and the hard disk are not on the same motherboard, and can be connected through a network or a cable.
某些特殊的应用场合可能要求PCIe设备能够以高可靠性持续不间断运行,为此,PCIe总线采用热插拔(Hot Plug)技术,来实现不关闭系统电源的情况下更换PCIe卡设备。在设备正常运行时,会发生各种各样的问题,其中也包括线缆损坏或者操作人员插错线缆,这类问题都会导致主控制器和扩展柜在相应的节点断开连接,导致控制器由双控变为单控,严重影响产品性能,但要是关闭主控制柜和扩展柜更换线缆,不仅仅是耽误时间,还影 响正常业务的交互。Some special applications may require PCIe devices to run continuously and uninterruptedly with high reliability. For this reason, the PCIe bus adopts Hot Plug technology to realize the replacement of PCIe card devices without turning off the system power. During the normal operation of the equipment, various problems will occur, including cable damage or the operator inserting the wrong cable. Such problems will cause the main controller and the expansion cabinet to be disconnected at the corresponding nodes, resulting in control The controller changes from dual control to single control, which seriously affects product performance. However, closing the main control cabinet and the expansion cabinet to replace cables will not only delay time, but also affect normal business interaction.
发明内容SUMMARY OF THE INVENTION
有鉴于此,本申请实施例的目的在于提出一种利用在位信号保持PCIE信号连接的方法、系统、计算机设备及计算机可读存储介质,通过向主控制器的主控芯片发送在位信号;以及释放复位信号并解除主控芯片上行口的PCIE链路的复位状态,实现了保持主控制器与扩展柜连接的目的,提高了产品的可靠性。In view of this, the purpose of the embodiments of the present application is to propose a method, system, computer equipment and computer-readable storage medium for maintaining a PCIE signal connection by utilizing an in-position signal, by sending an in-position signal to the main control chip of the main controller; And release the reset signal and release the reset state of the PCIE link of the upstream port of the main control chip, realize the purpose of maintaining the connection between the main controller and the expansion cabinet, and improve the reliability of the product.
基于上述目的,本申请实施例的一方面提供了一种利用在位信号保持PCIE信号连接的方法,包括如下步骤:响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位;响应于所述主控制器与所述扩展柜之间的线缆全部在位,向所述主控制器的主控芯片发送在位信号;响应于所述主控芯片接收到所述在位信号,释放复位信号并解除所述主控芯片上行口的PCIE链路的复位状态;以及响应于所述主控芯片上行口的PCIE链路结束复位状态,连通所述PCIE链路以使得所述主控制器与所述扩展柜处于连接状态。Based on the above purpose, an aspect of the embodiments of the present application provides a method for maintaining a PCIE signal connection by using an in-position signal, including the following steps: in response to the interruption of the PCIE link between the main controller and the expansion cabinet, based on each expansion cabinet The presence signal of each port judges whether the cables between the main controller and the expansion cabinet are all in place; in response to all the cables between the main controller and the expansion cabinet are in place, the The main control chip of the main controller sends the in-position signal; in response to the main control chip receiving the in-position signal, the reset signal is released and the reset state of the PCIE link of the upstream port of the main control chip is released; and in response After the PCIE link of the upstream port of the main control chip ends in a reset state, the PCIE link is connected so that the main controller and the expansion cabinet are in a connected state.
在一些实施方式中,所述基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位包括:获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。In some embodiments, the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet includes: acquiring the presence signal of each port of the expansion cabinet , and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
在一些实施方式中,方法还包括:响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。In some embodiments, the method further includes: in response to the cables between the main controller and the expansion cabinet not being all in place, resetting the PCIE signal of the main control chip of the expansion cabinet.
在一些实施方式中,方法还包括:响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。In some embodiments, the method further includes: in response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether a sequence of devices with all ports exists in the sequence list; and in response to the absence of devices with all ports in the sequence list Sequence, set the connection bandwidth according to the device sequence in the sequence list.
本申请实施例的另一方面,还提供了一种利用在位信号保持PCIE信号 连接系统,包括:判断模块,配置用于响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位;发送模块,配置用于响应于所述主控制器与所述扩展柜之间的线缆全部在位,向所述主控制器的主控芯片发送在位信号;复位模块,配置用于响应于所述主控芯片接收到所述在位信号,释放复位信号并解除所述主控芯片上行口的PCIE链路的复位状态;以及连接模块,配置用于响应于所述主控芯片上行口的PCIE链路结束复位状态,连通所述PCIE链路以使得所述主控制器与所述扩展柜处于连接状态。Another aspect of the embodiments of the present application further provides a system for maintaining a PCIE signal connection by using an in-position signal, including: a judgment module, configured to respond to the interruption of the PCIE link between the main controller and the expansion cabinet, based on the expansion The presence signal of each port of the cabinet determines whether the cables between the main controller and the expansion cabinet are all in place; the sending module is configured to respond to the connection between the main controller and the expansion cabinet. The cables are all in place, and send an in-position signal to the main control chip of the main controller; the reset module is configured to release the reset signal and release the main control chip in response to the main control chip receiving the in-position signal. The reset state of the PCIE link of the upstream port of the control chip; and the connection module, configured to end the reset state in response to the PCIE link of the upstream port of the main control chip, and communicate the PCIE link so that the main controller and the The expansion enclosure is in a connected state.
在一些实施方式中,所述判断模块配置用于:获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。In some embodiments, the judging module is configured to: obtain the in-position signal of each port of the expansion cabinet, and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
在一些实施方式中,还包括第二复位模块,配置用于:响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。In some embodiments, a second reset module is further included, configured to: in response to that the cables between the main controller and the expansion cabinet are not all in place, reset the PCIE of the main control chip of the expansion cabinet Signal.
在一些实施方式中,还包括检测模块,配置用于:响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。In some embodiments, a detection module is further included, configured to: in response to the main control cabinet and the expansion cabinet being in a connected state, to detect whether there are device sequences of all ports in the sequence list; There is a device sequence for all ports, and the connection bandwidth is set according to the device sequence in the sequence list.
本申请实施例的又一方面,还提供了一种计算机设备,包括:至少一个处理器;以及存储器,所述存储器存储有可在所述处理器上运行的计算机指令,所述指令由所述处理器执行时实现如上方法的步骤。In yet another aspect of the embodiments of the present application, a computer device is also provided, including: at least one processor; and a memory, where the memory stores computer instructions that can be executed on the processor, and the instructions are executed by the processor. The processor implements the steps of the above method when executed.
本申请实施例的再一方面,还提供了一种计算机可读存储介质,计算机可读存储介质存储有被处理器执行时实现如上方法步骤的计算机程序。In another aspect of the embodiments of the present application, a computer-readable storage medium is also provided, where the computer-readable storage medium stores a computer program that implements the above method steps when executed by a processor.
本申请具有以下有益技术效果:通过向主控制器的主控芯片发送在位信号;以及释放复位信号并解除主控芯片上行口的PCIE链路的复位状态,实现了保持主控制器与扩展柜连接的目的,提高了产品的可靠性。The present application has the following beneficial technical effects: by sending an in-position signal to the main control chip of the main controller; and releasing the reset signal and releasing the reset state of the PCIE link of the upstream port of the main control chip, the main controller and the expansion cabinet are maintained. The purpose of the connection is to improve the reliability of the product.
附图说明Description of drawings
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的实施例。In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other embodiments can also be obtained according to these drawings without creative efforts.
图1为本申请提供的利用在位信号保持PCIE信号连接的方法的实施例的示意图;1 is a schematic diagram of an embodiment of a method for maintaining a PCIE signal connection using an in-position signal provided by the present application;
图2为本申请提供的利用在位信号保持PCIE信号连接的计算机设备的实施例的硬件结构示意图。FIG. 2 is a schematic diagram of a hardware structure of an embodiment of a computer device that maintains a PCIE signal connection by using an in-position signal provided by the present application.
具体实施方式Detailed ways
为使本申请的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本申请实施例进一步详细说明。In order to make the objectives, technical solutions and advantages of the present application clearer, the following describes the embodiments of the present application in detail with reference to the accompanying drawings and specific embodiments.
需要说明的是,本申请实施例中所有使用“第一”和“第二”的表述均是为了区分两个相同名称非相同的实体或者非相同的参量,可见“第一”“第二”仅为了表述的方便,不应理解为对本申请实施例的限定,后续实施例对此不再一一说明。It should be noted that all expressions using "first" and "second" in the embodiments of the present application are for the purpose of distinguishing two entities with the same name but not the same or non-identical parameters. It can be seen that "first" and "second" It is only for the convenience of expression and should not be construed as a limitation on the embodiments of the present application, and subsequent embodiments will not describe them one by one.
基于上述目的,本申请实施例的第一个方面,提出了一种利用在位信号保持PCIE信号连接的方法的实施例。图1示出的是本申请提供的利用在位信号保持PCIE信号连接的方法的实施例的示意图。如图1所示,本申请实施例包括如下步骤:Based on the above purpose, in a first aspect of the embodiments of the present application, an embodiment of a method for maintaining a PCIE signal connection by using an in-position signal is proposed. FIG. 1 shows a schematic diagram of an embodiment of a method for maintaining a PCIE signal connection by using an in-position signal provided by the present application. As shown in Figure 1, the embodiment of the present application includes the following steps:
S1、响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断主控制器与扩展柜之间的线缆是否全部在位;S1. In response to the interruption of the PCIE link between the main controller and the expansion cabinet, determine whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet;
S2、响应于主控制器与扩展柜之间的线缆全部在位,向主控制器的主控芯片发送在位信号;S2. In response to all cables between the main controller and the expansion cabinet being in place, send an in-position signal to the main control chip of the main controller;
S3、响应于主控芯片接收到在位信号,释放复位信号并解除主控芯片上行口的PCIE链路的复位状态;以及S3, in response to the main control chip receiving the in-position signal, release the reset signal and release the reset state of the PCIE link of the upstream port of the main control chip; and
S4、响应于主控芯片上行口的PCIE链路结束复位状态,连通PCIE链 路以使得主控制器与扩展柜处于连接状态。S4. In response to the completion of the reset state of the PCIE link of the upstream port of the main control chip, the PCIE link is communicated so that the main controller and the expansion cabinet are in a connected state.
主控制器和扩展柜之间是通过Mini SAS线缆交互,它们之间是通过PCIE协议进行通信的,虽然是PCIE协议,由于是用Mini SAS线缆,线缆内部只有x16的差分信号,没有其他的sideband(边带)信号,因此主控制器和扩展柜之间是不完整的PCIE协议,在一定程度或者场景下,热拔插线缆就会中断PCIE链路,使主控制器和扩展柜失去交互,使状态机进入Polling(轮询)状态,由于没有其他的sideband,主控制器不能下发PERST(复位)信号给扩展柜,只有重启主控制柜或者扩展柜来解决问题。本实施例在模拟主控制器和扩展柜之间PCIE链路中断时,可以任意热拔插线缆,例如,可以只热拔插扩展柜侧任意线缆数根,也可以只热拔插主控制器端任意线缆数根,也可以在主控制器和扩展柜之间任意热拔插。The main controller and the expansion cabinet interact through the Mini SAS cable, and they communicate through the PCIE protocol. Although it is the PCIE protocol, because the Mini SAS cable is used, there are only x16 differential signals inside the cable. Other sideband (sideband) signals, so the PCIE protocol between the main controller and the expansion cabinet is incomplete. The cabinet loses interaction, and the state machine enters the Polling state. Since there is no other sideband, the main controller cannot send a PERST (reset) signal to the expansion cabinet. Only restart the main control cabinet or the expansion cabinet to solve the problem. In this embodiment, when the PCIE link between the main controller and the expansion cabinet is simulated, the cables can be hot-plugged arbitrarily. For example, only any number of cables on the expansion cabinet can be hot-plugged, or only the main Any number of cables on the controller side can also be hot-swapped between the main controller and the expansion cabinet.
响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断主控制器与扩展柜之间的线缆是否全部在位。在标准的Mini SAS线缆中,都会有线缆在位信号,当一根线缆插入扩展柜时,此端口的在位信号会被拉低,该拉低延时3秒后输入到主控制器或扩展柜的CPLD中,延时的目的是防止由于操作人员抖动无操作而误认为是线缆插入,另外,PCIE状态机的Polling状态有24ms的判断,如果24ms内没有完成Polling_Active,会跳出Polling状态回到Detect(检测)状态。In response to the interruption of the PCIE link between the main controller and the expansion cabinet, it is determined whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet. In the standard Mini SAS cable, there will be a cable presence signal. When a cable is inserted into the expansion cabinet, the in-position signal of this port will be pulled down, and the pull-down signal will be input to the main control after a delay of 3 seconds. In the CPLD of the switch or expansion cabinet, the purpose of the delay is to prevent the operator from jittering and inactive and mistaking it for cable insertion. In addition, the Polling state of the PCIE state machine has a judgment of 24ms. If the Polling_Active is not completed within 24ms, it will jump out. The Polling state returns to the Detect state.
在一些实施方式中,所述基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位包括:获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。主控制器的CPLD把端口的在位信号“取反”寄存到寄存器中,与其他端口的在位信号进行“与”操作。同样的原理,当扩展柜所有端口的线缆都完全热插入时,CPLD把所有端口的在位信号逐一“取反”进行“与”操作。因为在位信号是低电平,对于CPLD而言就是“0”,与其他端口的在位信号“取反”再进行“与”操作时,如果为“0”,说明至少有一根线缆未插入,如果为“1”,则说明所有的线缆都已经全部插入扩展柜端。In some embodiments, the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet includes: acquiring the presence signal of each port of the expansion cabinet , and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value. The CPLD of the main controller "inverts" the in-position signal of the port and registers it in the register, and performs an "AND" operation with the in-position signal of other ports. In the same principle, when the cables of all ports of the expansion cabinet are completely hot-inserted, the CPLD "inverts" the in-position signals of all ports one by one and performs an "AND" operation. Because the in-position signal is at a low level, it is "0" for CPLD, and when "inverting" the in-position signal of other ports and then performing the "AND" operation, if it is "0", it means that at least one cable is not connected. Insert, if it is "1", it means that all cables have been inserted into the expansion cabinet.
响应于主控制器与扩展柜之间的线缆全部在位,向主控制器的主控芯片发送在位信号。在一些实施方式中,方法还包括:响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。定义一个4位的wire类型的变量prsnt_mini_sas[3:0],每一位代表每个端口的在位状态,当线缆在位时,对应的变量为“0”,线缆不在位时,对应的变量为“1”,不管线缆是否在位,prsnt_mini_sas[3:0]都要取反输出,此时再定义一个变量perst,把4个端口的在位信息输入到该变量:perst=(prsnt_mini_sas_dly[3:0]==4'b1111)?1'b1:1'b0。如果perst=0,说明有线缆不在位,一直复位扩展柜的主控芯片的PCIE信号;如果perst=1,说明4根线缆已全部在位,释放扩展柜的主控芯片的PCIE信号。In response to the presence of all cables between the main controller and the expansion cabinet, a presence signal is sent to the main control chip of the main controller. In some embodiments, the method further includes: in response to the cables between the main controller and the expansion cabinet not being all in place, resetting the PCIE signal of the main control chip of the expansion cabinet. Define a 4-bit wire type variable prsnt_mini_sas[3:0], each bit represents the in-position status of each port, when the cable is in position, the corresponding variable is "0", when the cable is not in position, the corresponding The variable is "1", regardless of whether the cable is in place, prsnt_mini_sas[3:0] must be inverted and output, at this time, define a variable perst, and input the in-position information of the 4 ports into the variable: perst=( prsnt_mini_sas_dly[3:0]==4'b1111)? 1'b1:1'b0. If perst=0, it means that the cable is not in place, and the PCIE signal of the main control chip of the expansion cabinet is always reset; if perst=1, it means that all four cables are in place, and the PCIE signal of the main control chip of the expansion cabinet is released.
响应于主控芯片接收到在位信号,释放复位信号并解除主控芯片上行口的PCIE链路的复位状态。CPLD把所有端口的在位信号输出到主控制器或扩展柜的主控芯片内,用来控制主控芯片上行口的PERST信号,当所有端口的线缆都在位时,CPLD最终会输出“1”(高电平)给主控芯片,主控芯片检测为高电平,就会释放掉PERST信号,使主控芯片上行口的PCIE链路解复位。当所有端口的至少有一根线缆不在位时,及CPLD最终会输出“0”(低电平)给主控芯片,主控芯片检测为低电平,就会一直拉住PERST信号,使主控芯片上行口的PCIE一直处于复位状态,不会Link,状态机一直处于Detect状态。In response to the master control chip receiving the in-position signal, the reset signal is released and the reset state of the PCIE link of the upstream port of the master control chip is released. The CPLD outputs the in-position signals of all ports to the main controller or the main control chip of the expansion cabinet, which is used to control the PERST signal of the upstream port of the main control chip. When the cables of all ports are in place, the CPLD will eventually output " 1” (high level) to the main control chip, when the main control chip detects that it is a high level, the PERST signal will be released, and the PCIE link of the upstream port of the main control chip will be de-reset. When at least one cable of all ports is not in place, and the CPLD will eventually output "0" (low level) to the main control chip, the main control chip detects that it is a low level, and will always hold the PERST signal, so that the main control chip will always hold the PERST signal. The PCIE of the upstream port of the control chip is always in the reset state and will not be Linked, and the state machine is always in the Detect state.
响应于主控芯片上行口的PCIE链路结束复位状态,连通PCIE链路以使得主控制器与扩展柜处于连接状态。In response to ending the reset state of the PCIE link of the upstream port of the main control chip, the PCIE link is connected so that the main controller and the expansion cabinet are in a connected state.
在一些实施方式中,方法还包括:响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。当所有线缆都插入后,PCIe总线中的链路初始化与训练,就是开始进入状态机模式,进行Link过程。比如有4个端口,每个端口为x4的带宽,从端口1开始插入,当端口3或者端口4插入后,状态机会从Detect到Polling到Configuration(配置)再到L0,如果在Detect序列中没有端口 3和端口4的设备序列,PCIE也没有x12的带宽,那只能Link为前两个端口的带宽,即x8的带宽。但是端口3和端口4最终还是插入到主控制器和扩展柜中,如果主控制器和扩展柜都支持x16Gen3的高速率传输,则会自动进入Re-training(再训练)状态,以重新切换速率,最终为Gen3速率和x16的带宽。如果最后插入的是端口1,因为PCIE的机制是从Lane0开始Link的,当端口1还没有插入时,是不会Link的,只有端口1插入时,会进入状态机,直接就是x16的带宽,不需要Re-training机制。In some embodiments, the method further includes: in response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether a sequence of devices with all ports exists in the sequence list; and in response to the absence of devices with all ports in the sequence list Sequence, set the connection bandwidth according to the device sequence in the sequence list. When all cables are inserted, the link initialization and training in the PCIe bus starts to enter the state machine mode and perform the Link process. For example, there are 4 ports, and each port has a bandwidth of x4. It is inserted from port 1. When port 3 or port 4 is inserted, the state machine will go from Detect to Polling to Configuration (configuration) and then to L0. If there is no Detect sequence For the device sequence of port 3 and port 4, PCIE does not have the bandwidth of x12, so only Link can be the bandwidth of the first two ports, that is, the bandwidth of x8. However, port 3 and port 4 are eventually inserted into the main controller and the expansion cabinet. If both the main controller and the expansion cabinet support the high-speed transmission of x16Gen3, they will automatically enter the Re-training (retraining) state to switch the speed again. , and ultimately the Gen3 rate and x16 bandwidth. If port 1 is inserted last, because the PCIE mechanism starts Link from Lane0, when port 1 is not inserted, it will not be linked. Only when port 1 is inserted, it will enter the state machine, which is directly the bandwidth of x16. No Re-training mechanism is required.
当主控制器和扩展柜处于正常Link状态时,任意热拔插一根线缆,状态机也是会跳转到Detect状态,PCIe设备会去检测自己Link(连接)的另一端是否存在其他PCIe设备。换句话说,就是检测是否存在其他的PCIe设备与其相连接。当线缆恢复后,检测到对端有PCIE设备,就会从Detect状态进入下一个状态,直到L0状态,完成Link。When the main controller and the expansion cabinet are in the normal Link state, any hot-plugging of a cable will cause the state machine to jump to the Detect state, and the PCIe device will detect whether there are other PCIe devices at the other end of its Link (connection). In other words, it is to detect whether there are other PCIe devices connected to it. When the cable is restored and it detects that there is a PCIE device on the opposite end, it will enter the next state from the Detect state until the L0 state to complete the Link.
如果没有使用该判断机制,会增加设备连接不正常的概率,因为在热拔插的过程中,会出现陷入状态机的某个状态中,始终无法跳出,必须把主控芯片复位或者断电操作才能恢复,这样大大降低了工作效率,也会大大增加数据丢失的概率。如果使用该机制,从而避免了上述问题的复现,节省了劳动力,方便操作人员更换线缆,提高了产品的可靠性。If this judgment mechanism is not used, the probability of abnormal device connection will increase, because in the process of hot plugging, it will fall into a certain state of the state machine, and it will never be able to jump out. The main control chip must be reset or powered off. This greatly reduces work efficiency and greatly increases the probability of data loss. If this mechanism is used, recurrence of the above-mentioned problems is avoided, labor is saved, it is convenient for operators to replace cables, and the reliability of products is improved.
需要特别指出的是,上述利用在位信号保持PCIE信号连接的方法的各个实施例中的各个步骤均可以相互交叉、替换、增加、删减,因此,这些合理的排列组合变换之于利用在位信号保持PCIE信号连接的方法也应当属于本申请的保护范围,并且不应将本申请的保护范围局限在实施例之上。It should be particularly pointed out that the steps in each of the above-mentioned embodiments of the method for maintaining the PCIE signal connection by using the in-position signal can be crossed, replaced, added, and deleted. The method for maintaining the signal connection of the PCIE signal should also belong to the protection scope of the present application, and the protection scope of the present application should not be limited to the embodiments.
基于上述目的,本申请实施例的第二个方面,提出了一种利用在位信号保持PCIE信号连接的系统,包括:判断模块,配置用于响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位;发送模块,配置用于响应于所述主控制器与所述扩展柜之间的线缆全部在位,向所述主控制器的主控芯片发送在位信号;复位模块,配置用于响应于所述主控芯片接收到所述在位信号,释放复位信号并解除所述主控芯片上行口的PCIE链路的复位状态; 以及连接模块,配置用于响应于所述主控芯片上行口的PCIE链路结束复位状态,连通所述PCIE链路以使得所述主控制器与所述扩展柜处于连接状态。Based on the above purpose, a second aspect of the embodiments of the present application proposes a system for maintaining a PCIE signal connection by using an in-position signal, including: a judgment module configured to respond to the PCIE chain between the main controller and the expansion cabinet If the circuit is interrupted, based on the presence signal of each port of the expansion cabinet, it is judged whether the cables between the main controller and the expansion cabinet are all in place; the sending module is configured to respond to the main controller and the expansion cabinet. All cables between the expansion cabinets are in place, and send an in-position signal to the main control chip of the main controller; a reset module is configured to release the reset signal in response to the main control chip receiving the in-position signal And release the reset state of the PCIE link of the upstream port of the main control chip; And the connection module is configured to end the reset state in response to the PCIE link of the upstream port of the main control chip, and communicates the PCIE link so that all The main controller is in a connected state with the expansion cabinet.
在一些实施方式中,所述判断模块配置用于:获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。In some embodiments, the judging module is configured to: obtain the in-position signal of each port of the expansion cabinet, and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
在一些实施方式中,还包括第二复位模块,配置用于:响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。In some embodiments, a second reset module is further included, configured to: in response to that the cables between the main controller and the expansion cabinet are not all in place, reset the PCIE of the main control chip of the expansion cabinet Signal.
在一些实施方式中,还包括检测模块,配置用于:响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。In some embodiments, a detection module is further included, configured to: in response to the main control cabinet and the expansion cabinet being in a connected state, to detect whether there are device sequences of all ports in the sequence list; There is a device sequence for all ports, and the connection bandwidth is set according to the device sequence in the sequence list.
基于上述目的,本申请实施例的第三个方面,提出了一种计算机设备,包括:至少一个处理器;以及存储器,存储器存储有可在处理器上运行的计算机指令,指令由处理器执行以实现如下步骤:S1、响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断主控制器与扩展柜之间的线缆是否全部在位;S2、响应于主控制器与扩展柜之间的线缆全部在位,向主控制器的主控芯片发送在位信号;S3、响应于主控芯片接收到在位信号,释放复位信号并解除主控芯片上行口的PCIE链路的复位状态;以及S4、响应于主控芯片上行口的PCIE链路结束复位状态,连通PCIE链路以使得主控制器与扩展柜处于连接状态。Based on the above purpose, in a third aspect of the embodiments of the present application, a computer device is proposed, including: at least one processor; and a memory, where the memory stores computer instructions that can be executed on the processor, and the instructions are executed by the processor to The following steps are implemented: S1, in response to the interruption of the PCIE link between the main controller and the expansion cabinet, determine whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet; S2 . In response to all cables between the main controller and the expansion cabinet being in place, send an in-position signal to the main control chip of the main controller; S3. In response to the main control chip receiving the in-position signal, release the reset signal and release the main control chip. The reset state of the PCIE link of the upstream port of the control chip; and S4, in response to the end of the reset state of the PCIE link of the upstream port of the control chip, connect the PCIE link to make the main controller and the expansion cabinet in a connected state.
在一些实施方式中,所述基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位包括:获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。In some embodiments, the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet includes: acquiring the presence signal of each port of the expansion cabinet , and perform AND operation with other in-position signals after inversion of each in-position signal to determine whether the result is a preset value.
在一些实施方式中,步骤还包括:响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。In some embodiments, the step further includes: in response to the cables between the main controller and the expansion cabinet not being all in place, resetting the PCIE signal of the main control chip of the expansion cabinet.
在一些实施方式中,步骤还包括:响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。In some embodiments, the steps further include: in response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether there are device sequences of all ports in the sequence list; and in response to the absence of devices of all ports in the sequence list Sequence, set the connection bandwidth according to the device sequence in the sequence list.
如图2所示,为本申请提供的上述利用在位信号保持PCIE信号连接的计算机设备的一个实施例的硬件结构示意图。As shown in FIG. 2 , it is a schematic diagram of the hardware structure of an embodiment of the above-mentioned computer device using an in-position signal to maintain a PCIE signal connection provided by the present application.
以如图2所示的装置为例,在该装置中包括一个处理器301以及一个存储器302,并还可以包括:输入装置303和输出装置304。Taking the device shown in FIG. 2 as an example, the device includes a processor 301 and a memory 302 , and may further include an input device 303 and an output device 304 .
处理器301、存储器302、输入装置303和输出装置304可以通过总线或者其他方式连接,图2中以通过总线连接为例。The processor 301 , the memory 302 , the input device 303 and the output device 304 may be connected by a bus or in other ways, and the connection by a bus is taken as an example in FIG. 2 .
存储器302作为一种非易失性计算机可读存储介质,可用于存储非易失性软件程序、非易失性计算机可执行程序以及模块,如本申请实施例中的利用在位信号保持PCIE信号连接的方法对应的程序指令/模块。处理器301通过运行存储在存储器302中的非易失性软件程序、指令以及模块,从而执行服务器的各种功能应用以及数据处理,即实现上述方法实施例的利用在位信号保持PCIE信号连接的方法。As a non-volatile computer-readable storage medium, the memory 302 can be used to store non-volatile software programs, non-volatile computer-executable programs and modules. For example, in the embodiments of the present application, the PCIE signal is maintained by using the in-position signal. The program instruction/module corresponding to the connected method. The processor 301 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions and modules stored in the memory 302, that is, the method of maintaining the PCIE signal connection by using the in-position signal in the above method embodiments is realized. method.
存储器302可以包括存储程序区和存储数据区,其中,存储程序区可存储操作系统、至少一个功能所需要的应用程序;存储数据区可存储根据利用在位信号保持PCIE信号连接的方法的使用所创建的数据等。此外,存储器302可以包括高速随机存取存储器,还可以包括非易失性存储器,例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实施例中,存储器302可选包括相对于处理器301远程设置的存储器,这些远程存储器可以通过网络连接至本地模块。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。The memory 302 may include a stored program area and a stored data area, wherein the stored program area may store an operating system, an application program required by at least one function; created data, etc. Additionally, memory 302 may include high speed random access memory, and may also include nonvolatile memory, such as at least one magnetic disk storage device, flash memory device, or other nonvolatile solid state storage device. In some embodiments, memory 302 may optionally include memory located remotely from processor 301, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
输入装置303可接收输入的用户名和密码等信息。输出装置304可包括显示屏等显示设备。The input device 303 can receive input information such as user name and password. The output device 304 may include a display device such as a display screen.
一个或者多个利用在位信号保持PCIE信号连接的方法对应的程序指 令/模块存储在存储器302中,当被处理器301执行时,执行上述任意方法实施例中的利用在位信号保持PCIE信号连接的方法。One or more program instructions/modules corresponding to the method of using the in-position signal to maintain the PCIE signal connection are stored in the memory 302, and when executed by the processor 301, perform any of the above method embodiments using the in-position signal to maintain the PCIE signal connection. Methods.
执行上述利用在位信号保持PCIE信号连接的方法的计算机设备的任何一个实施例,可以达到与之对应的前述任意方法实施例相同或者相类似的效果。Any embodiment of the computer device that executes the above-mentioned method for maintaining a PCIE signal connection by using an in-position signal can achieve the same or similar effects as any of the foregoing method embodiments corresponding to it.
本申请还提供了一种计算机可读存储介质,计算机可读存储介质存储有被处理器执行时执行如上方法的计算机程序。The present application also provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program that executes the above method when executed by a processor.
最后需要说明的是,本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程,可以通过计算机程序来指令相关硬件来完成,利用在位信号保持PCIE信号连接的方法的程序可存储于一计算机可读取存储介质中,该程序在执行时,可包括如上述各方法的实施例的流程。其中,程序的存储介质可为磁碟、光盘、只读存储记忆体(ROM)或随机存储记忆体(RAM)等。上述计算机程序的实施例,可以达到与之对应的前述任意方法实施例相同或者相类似的效果。Finally, it should be noted that those of ordinary skill in the art can understand that all or part of the process in the method of the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. In a computer-readable storage medium, when the program is executed, it may include the processes of the above-mentioned method embodiments. Wherein, the storage medium of the program may be a magnetic disk, an optical disk, a read only memory (ROM) or a random access memory (RAM) or the like. The above computer program embodiments can achieve the same or similar effects as any of the foregoing method embodiments corresponding thereto.
以上是本申请公开的示例性实施例,但是应当注意,在不背离权利要求限定的本申请实施例公开的范围的前提下,可以进行多种改变和修改。根据这里描述的公开实施例的方法权利要求的功能、步骤和/或动作不需以任何特定顺序执行。此外,尽管本申请实施例公开的元素可以以个体形式描述或要求,但除非明确限制为单数,也可以理解为多个。The above are exemplary embodiments disclosed in the present application, but it should be noted that various changes and modifications may be made without departing from the scope of the disclosure of the embodiments of the present application defined by the claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements disclosed in the embodiments of the present application may be described or claimed in an individual form, unless explicitly limited to the singular, they may also be construed as a plurality.
应当理解的是,在本文中使用的,除非上下文清楚地支持例外情况,单数形式“一个”旨在也包括复数形式。还应当理解的是,在本文中使用的“和/或”是指包括一个或者一个以上相关联地列出的项目的任意和所有可能组合。It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It will also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
上述本申请实施例公开实施例序号仅仅为了描述,不代表实施例的优劣。The above-mentioned embodiments of the present application disclose the serial numbers of the embodiments only for description, and do not represent the advantages and disadvantages of the embodiments.
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通过硬件来完成,也可以通过程序来指令相关的硬件完成,程序可以存储于 一种计算机可读存储介质中,上述提到的存储介质可以是只读存储器,磁盘或光盘等。Those of ordinary skill in the art can understand that all or part of the steps of implementing the above embodiments can be completed by hardware, or can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. The storage medium can be a read-only memory, a magnetic disk or an optical disk, and the like.
所属领域的普通技术人员应当理解:以上任何实施例的讨论仅为示例性的,并非旨在暗示本申请实施例公开的范围(包括权利要求)被限于这些例子;在本申请实施例的思路下,以上实施例或者不同实施例中的技术特征之间也可以进行组合,并存在如上的本申请实施例的不同方面的许多其它变化,为了简明它们没有在细节中提供。因此,凡在本申请实施例的精神和原则之内,所做的任何省略、修改、等同替换、改进等,均应包含在本申请实施例的保护范围之内。Those of ordinary skill in the art should understand that the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the scope (including the claims) disclosed by the embodiments of the present application is limited to these examples; under the idea of the embodiments of the present application , the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the above embodiments of the present application, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present application should be included within the protection scope of the embodiments of the present application.

Claims (10)

  1. 一种利用在位信号保持PCIE信号连接的方法,其特征在于,包括以下步骤:A method for maintaining PCIE signal connection by utilizing in-position signal, is characterized in that, comprises the following steps:
    响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位;In response to the interruption of the PCIE link between the main controller and the expansion cabinet, determine whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet;
    响应于所述主控制器与所述扩展柜之间的线缆全部在位,向所述主控制器的主控芯片发送在位信号;In response to all cables between the main controller and the expansion cabinet being in place, sending an in-position signal to the main control chip of the main controller;
    响应于所述主控芯片接收到所述在位信号,释放复位信号并解除所述主控芯片上行口的PCIE链路的复位状态;以及In response to the main control chip receiving the in-position signal, releasing the reset signal and releasing the reset state of the PCIE link of the uplink port of the main control chip; and
    响应于所述主控芯片上行口的PCIE链路结束复位状态,连通所述PCIE链路以使得所述主控制器与所述扩展柜处于连接状态。In response to ending the reset state of the PCIE link of the upstream port of the main control chip, the PCIE link is connected so that the main controller and the expansion cabinet are in a connected state.
  2. 根据权利要求1所述的方法,其特征在于,所述基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是否全部在位包括:The method according to claim 1, wherein the determining whether all cables between the main controller and the expansion cabinet are in place based on the presence signal of each port of the expansion cabinet comprises:
    获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。Acquire the in-position signal of each port of the expansion cabinet, invert each in-position signal and perform an AND operation with other in-position signals to determine whether the result is a preset value.
  3. 根据权利要求1所述的方法,其特征在于,还包括:The method of claim 1, further comprising:
    响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。In response to the cables between the main controller and the expansion cabinet not being all in place, the PCIE signal of the main control chip of the expansion cabinet is reset.
  4. 根据权利要求1所述的方法,其特征在于,还包括:The method of claim 1, further comprising:
    响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及In response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether there is a device sequence for all ports in the sequence list; and
    响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。In response to a device sequence in which all ports are not present in the sequence list, the connection bandwidth is set in accordance with the device sequence in the sequence list.
  5. 一种利用在位信号保持PCIE信号连接的系统,其特征在于,包括:A system for maintaining a PCIE signal connection by utilizing an in-position signal, comprising:
    判断模块,配置用于响应于主控制器与扩展柜之间的PCIE链路中断,基于扩展柜每个端口的在位信号判断所述主控制器与所述扩展柜之间的线缆是 否全部在位;The judgment module is configured to, in response to the interruption of the PCIE link between the main controller and the expansion cabinet, judge whether all the cables between the main controller and the expansion cabinet are all based on the in-position signal of each port of the expansion cabinet. reign;
    发送模块,配置用于响应于所述主控制器与所述扩展柜之间的线缆全部在位,向所述主控制器的主控芯片发送在位信号;a sending module, configured to send an in-position signal to the main control chip of the main controller in response to the presence of all cables between the main controller and the expansion cabinet;
    复位模块,配置用于响应于所述主控芯片接收到所述在位信号,释放复位信号并解除所述主控芯片上行口的PCIE链路的复位状态;以及A reset module, configured to release the reset signal and release the reset state of the PCIE link of the upstream port of the main control chip in response to the main control chip receiving the in-position signal; and
    连接模块,配置用于响应于所述主控芯片上行口的PCIE链路结束复位状态,连通所述PCIE链路以使得所述主控制器与所述扩展柜处于连接状态。The connection module is configured to connect the PCIE link so that the main controller and the expansion cabinet are in a connected state in response to the PCIE link of the main control chip's uplink port ending the reset state.
  6. 根据权利要求5所述的系统,其特征在于,所述判断模块配置用于:The system according to claim 5, wherein the judging module is configured to:
    获取扩展柜每个端口的在位信号,并将每个在位信号取反后与其他在位信号进行与操作,判断结果是否为预设值。Acquire the in-position signal of each port of the expansion cabinet, invert each in-position signal and perform an AND operation with other in-position signals to determine whether the result is a preset value.
  7. 根据权利要求5所述的系统,其特征在于,还包括第二复位模块,配置用于:The system of claim 5, further comprising a second reset module configured to:
    响应于所述主控制器与所述扩展柜之间的线缆没有全部在位,复位所述扩展柜的主控芯片的PCIE信号。In response to the cables between the main controller and the expansion cabinet not being all in place, the PCIE signal of the main control chip of the expansion cabinet is reset.
  8. 根据权利要求5所述的系统,其特征在于,还包括检测模块,配置用于:The system of claim 5, further comprising a detection module configured to:
    响应于所述主控制柜与所述扩展柜处于连接状态,检测序列表中是否存在所有端口的设备序列;以及In response to the main control cabinet and the expansion cabinet being in a connected state, detecting whether there is a device sequence for all ports in the sequence list; and
    响应于序列表中不存在所有端口的设备序列,按照所述序列表中的设备序列设置连接带宽。In response to a device sequence in which all ports are not present in the sequence list, the connection bandwidth is set in accordance with the device sequence in the sequence list.
  9. 一种计算机设备,其特征在于,包括:A computer device, comprising:
    至少一个处理器;以及at least one processor; and
    存储器,所述存储器存储有可在所述处理器上运行的计算机指令,所述指令由所述处理器执行时实现权利要求1-4任意一项所述方法的步骤。a memory storing computer instructions executable on the processor, the instructions implementing the steps of the method of any one of claims 1-4 when executed by the processor.
  10. 一种计算机可读存储介质,所述计算机可读存储介质存储有计算机程序,其特征在于,所述计算机程序被处理器执行时实现权利要求1-4任意一项 所述方法的步骤。A computer-readable storage medium storing a computer program, characterized in that, when the computer program is executed by a processor, the steps of the method of any one of claims 1-4 are implemented.
PCT/CN2021/121429 2020-11-20 2021-09-28 Method and system for maintaining pcie signal connection by using in-place signal, device, and medium WO2022105448A1 (en)

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