WO2022099477A1

WO2022099477A1 - Power consumption control method and device

Info

Publication number: WO2022099477A1
Application number: PCT/CN2020/127874
Authority: WO
Inventors: 胡荻; 郭东之; 库特拉德米特罗; 刘臻
Original assignee: 华为技术有限公司
Priority date: 2020-11-10
Filing date: 2020-11-10
Publication date: 2022-05-19
Also published as: CN116391162A

Abstract

A power consumption control method and device, for use in improving flexibility and accuracy of overclocking adjustment. The method comprises: a power consumption controller first obtains the temperature of a first voltage domain in a processor, determines a power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, and then adjusts power consumption of the first voltage domain on the basis of the power consumption threshold of the first voltage domain. The method allows for matching of the power consumption threshold of the first voltage domain and the current temperature; adjusting power consumption on the basis of the power consumption threshold actually considers the dual effects of the power consumption and the temperature; and therefore, the method can not only improve the accuracy of overclocking adjustment, but also enable the power consumption threshold of the first voltage domain to flexibly change along with the change of the temperature, thereby further allowing for improvement of the flexibility of overclocking adjustment.

Description

Method and device for controlling power consumption

technical field

The present application relates to the technical field of processors, and in particular, to a power consumption control method and apparatus.

Background technique

When an electronic device leaves the factory, the components in the electronic device (for example, a processor core) are usually defined with some standard operating ranges, such as a rated operating frequency, a rated operating voltage, and the like. Under normal circumstances, the processor core performs processing operations at the rated operating frequency. However, when the processor core has an overclocking function, if the rated operating frequency does not meet the requirements of the current working scenario of the processor core, the frequency of the processor core can be increased above the rated operating frequency to improve the processing efficiency of the processor core. performance.

However, when the processor core is in an overclocked state, the processor core may run at a high frequency and high voltage for a long time, resulting in overheating or overcurrent of the processor core. In order to solve this problem, the prior art sets a power consumption adjustment strategy in the overclocking state, in this strategy: if the power consumption of the processor core exceeds a preset power consumption threshold, reduce the power consumption of the processor core power consumption to ease the high frequency and high voltage state of the processor core, or end the overclocking state of the processor core. Although this method can prevent the processor core from overheating or overcurrent, it adjusts power consumption based on a fixed power consumption threshold, which not only reduces the flexibility of overclocking adjustment, but also makes the accuracy of overclocking adjustment dependent on The power consumption threshold set may cause deviations in overclocking adjustment.

SUMMARY OF THE INVENTION

The present application provides a power consumption control method and device to improve the flexibility and accuracy of overclocking adjustment.

In a first aspect, the present application provides a power consumption control method, which is applicable to a power consumption controller. The method includes: the power consumption controller first obtains the temperature of a first voltage domain in the processor, and then according to the first voltage domain The temperature of the first voltage domain determines the power consumption threshold of the first voltage domain, and then adjusts the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain. Wherein, when the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain, the power consumption controller may reduce the power consumption of the first voltage domain. In the above design, by adjusting the power consumption threshold of the first voltage domain in combination with the temperature of the first voltage domain, the power consumption threshold of the first voltage domain can be matched with the current temperature, and the actual power consumption can be adjusted based on the power consumption threshold. Considering the dual effects of power consumption and temperature, this can not only improve the accuracy of overclocking adjustment, but also make the power consumption threshold of the first voltage domain change flexibly with the change of temperature, which also helps to improve the overclocking adjustment. flexibility. Further, compared with a single temperature adjustment strategy or power consumption adjustment strategy, based on this method, the power consumption adjustment strategy can be used as much as possible to maintain the overclocking state of each processor core in the voltage domain by slowly adjusting the power consumption, while Do not directly trigger the temperature adjustment strategy to avoid directly exiting the overclocking state, thereby improving the overclocking performance of the processor.

In an optional design, the power consumption controller adjusts the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain, including: if the power consumption controller detects that the power consumption of the first voltage domain exceeds the first voltage domain The power consumption threshold of the voltage domain can reduce the power consumption of the first voltage domain. In this way, the power consumption of the first voltage domain can be reduced in time when the power consumption of the first voltage domain is relatively high, thereby helping to avoid the occurrence of overcurrent or overheating caused by the excessively high power consumption of the first voltage domain.

In an optional design, the power consumption controller acquires the temperature of the first voltage domain in the processor, including: the power consumption controller first determines the temperature in the first voltage domain from each processor core of the processor. Each target processor core then acquires the temperature corresponding to each target processor core, and then uses the highest temperature among the temperatures corresponding to each target processor core as the temperature of the first voltage domain. This design actually adjusts the overall power consumption of the first voltage domain based on the power consumption of the processor core at the highest temperature in the first voltage domain. As long as the processor core at the highest temperature does not experience overheating, then the first There is a high probability that other processor cores in the voltage domain will not experience overcurrent and overheating. Therefore, this method can not only adjust the power consumption of the first power domain in time, but also has a better adjustment effect.

In an optional design, the power consumption controller determines the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, including: the power consumption controller first determines a target temperature range in which the temperature of the first voltage domain is located , and then determine the power consumption threshold corresponding to the target temperature interval as the power consumption threshold of the first voltage domain. The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to a power consumption threshold. For any one of the at least two temperature intervals: when the temperature in the temperature interval is higher, the power consumption threshold corresponding to the temperature interval is also smaller. This design reduces the power consumption threshold when the temperature is high, which actually reduces the conditions for triggering the power consumption adjustment strategy, which not only enables the first voltage domain to continue to maintain the overclocking state by slowly reducing power consumption, but also reduces the trigger temperature adjustment. The strategy leads to the possibility of exiting the overclocking state, so this method can try to keep each processor core in the first voltage domain in the overclocking state for a long time, which helps to improve the overclocking performance of the processor.

In an optional design, the power consumption controller determines the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, including: the power consumption controller first determines a target temperature range in which the temperature of the first voltage domain is located , and then calculate the power consumption threshold of the first voltage domain according to the distribution power consumption of the first voltage domain and the adjustment coefficient corresponding to the target temperature interval. The allocated power consumption of the first voltage domain is the power consumption pre-allocated by the power consumption controller for the first voltage domain according to the load of the first voltage domain and the total load of the processor. The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to an adjustment coefficient. The design uses the temperature range and the power distribution to determine the power consumption threshold, which can not only match the power consumption threshold to the current temperature, but also make it match the current load. Therefore, adjusting the power consumption based on the power consumption threshold can better meet the needs of the current working environment .

In an optional design, the adjustment coefficients corresponding to the at least two temperature intervals decrease as the temperature in the temperature intervals increases. Under the condition of constant load, the design will reduce the power consumption threshold as the temperature increases, which helps to maintain the overclocking state of the processor core as much as possible by slowly reducing the power consumption, so as to improve the overclocking performance of the processor.

In a second aspect, the present application provides a power consumption controller, including a monitoring circuit and a processing circuit, where the monitoring circuit is used to obtain the temperature of the first voltage domain in the processor, and the processing circuit is used to determine the first voltage domain according to the temperature of the first voltage domain. A power consumption threshold of the voltage domain, and the power consumption of the first voltage domain is adjusted based on the power consumption threshold of the first voltage domain.

In an optional design, the processing circuit is specifically configured to: reduce the power consumption of the first voltage domain when the power consumption of the first voltage domain exceeds a power consumption threshold of the first voltage domain.

In an optional design, the monitoring circuit is specifically used to: first determine each target processor core in the first voltage domain from each processor core of the processor, and then obtain the corresponding corresponding temperature, and then the highest temperature among the temperatures corresponding to the respective target processor cores is taken as the temperature of the first voltage domain.

In an optional design, the processing circuit is specifically configured to: first determine the target temperature range in which the temperature of the first voltage domain is located, and then determine the power consumption threshold corresponding to the target temperature range as the power consumption threshold of the first voltage domain . The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to a power consumption threshold. For any one of the at least two temperature intervals: when the temperature in the temperature interval is higher, the power consumption threshold corresponding to the temperature interval is smaller.

In an optional design, the processing circuit is specifically configured to: first determine the target temperature range in which the temperature of the first voltage domain is located, and then calculate the corresponding adjustment coefficient according to the allocated power consumption of the first voltage domain and the target temperature range. The power consumption threshold of the first voltage domain is obtained. The allocated power consumption of the first voltage domain is the power consumption pre-allocated for the first voltage domain according to the load of the first voltage domain and the total load of the processor. The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to an adjustment coefficient.

In an optional design, the adjustment coefficients corresponding to the at least two temperature intervals may decrease as the temperature in the temperature intervals increases.

In a third aspect, the present application provides a power consumption controller, comprising: an acquisition unit, configured to acquire a temperature of a first voltage domain in a processor; a determination unit, configured to determine the first voltage domain according to the temperature of the first voltage domain The power consumption threshold of the first voltage domain; the adjusting unit, configured to adjust the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain.

In an optional design, the adjusting unit is specifically configured to: reduce the power consumption of the first voltage domain when the power consumption of the first voltage domain exceeds a power consumption threshold of the first voltage domain.

In an optional design, the obtaining unit is specifically configured to: first determine each target processor core in the first voltage domain from each processor core of the processor, and then obtain the corresponding corresponding target processor cores temperature, and then the highest temperature among the temperatures corresponding to the respective target processor cores is taken as the temperature of the first voltage domain.

In an optional design, the determining unit is specifically configured to: first determine the target temperature range in which the temperature of the first voltage domain is located, and then determine the power consumption threshold corresponding to the target temperature range as the power consumption threshold of the first voltage domain . The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to a power consumption threshold. For any one of the at least two temperature intervals: when the temperature in the temperature interval is higher, the power consumption threshold corresponding to the temperature interval is smaller.

In an optional design, the determining unit is specifically configured to: first determine the target temperature interval in which the temperature of the first voltage domain is located, and then calculate the corresponding adjustment coefficient according to the allocated power consumption of the first voltage domain and the target temperature interval. The power consumption threshold of the first voltage domain is obtained. The allocated power consumption of the first voltage domain is the power consumption pre-allocated for the first voltage domain according to the load of the first voltage domain and the total load of the processor. The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to an adjustment coefficient.

In an optional design, the adjustment coefficients corresponding to the at least two temperature intervals decrease as the temperature in the temperature intervals increases.

In a fourth aspect, the present application provides a processor. The processor may include a temperature sensor and a power consumption controller. The temperature sensor is disposed in a first voltage domain of the processor. The power consumption controller may acquire the temperature of the first voltage domain from the temperature sensor, then determine the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, and then adjust the power consumption threshold of the first voltage domain based on the power consumption threshold of the first voltage domain. Power consumption in the voltage domain.

In an optional design, the processor may further include at least one processor core and at least one temperature sensor, and the at least one temperature sensor is respectively connected to the at least one processor core. In this case, a temperature sensor connected to any processor core can acquire the temperature of the processor core and send it to the power consumption controller, and the power consumption controller can determine that the temperature of the at least one processor core is at the first voltage each target processor core in the domain, and then use the highest temperature among the temperatures corresponding to each target processor core as the temperature of the first voltage domain.

In an optional design, the processor may further include at least one processor core and at least one power consumption regulator, and the at least one power consumption regulator is respectively connected to the at least one processor core. In this case, the power consumption controller may generate a power consumption control instruction and send it to each target processor core in the first voltage domain when the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain The connected power consumption regulator, the power consumption regulator connected with any target processor core can reduce the power consumption of the target processor core according to the power consumption control instruction.

In an optional design, the power consumption regulator is specifically configured to: reduce the frequency of the target processor core according to the power consumption control instruction.

In an optional design, the power consumption controller is specifically configured to: first determine the target temperature range in which the temperature of the first voltage domain is located, and then determine the power consumption threshold corresponding to the target temperature range as the power consumption of the first voltage domain consumption threshold. The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to a power consumption threshold. For any one of the at least two temperature intervals: when the temperature in the temperature interval is higher, the power consumption threshold corresponding to the temperature interval is smaller.

In an optional design, the power consumption controller is specifically configured to: first determine the target temperature range in which the temperature of the first voltage domain is located, and then use the distribution power consumption of the first voltage domain and the adjustment coefficient corresponding to the target temperature range , and calculate the power consumption threshold of the first voltage domain. The allocated power consumption of the first voltage domain is the power consumption pre-allocated for the first voltage domain according to the load of the first voltage domain and the total load of the processor. The target temperature interval may be any one of the at least two temperature intervals, and each of the at least two temperature intervals may correspond to an adjustment coefficient.

In an optional design, the processor may further include at least one processor core and at least one power consumption sensor, and the at least one power consumption sensor is respectively connected to the at least one processor core. In this case, the power consumption sensor connected to each processor core can obtain the power consumption of the processor core and send it to the power consumption controller, and the power consumption controller can also and the temperature of each processor core, determine the load of each processor core, and calculate the load of the first voltage domain according to the load of each processor core in the first voltage domain, and then calculate the load of the first voltage domain according to the load of each processor core included in the processor. The load of the processor core is calculated to obtain the total load of the processor, and then the power consumption of the processor is distributed using the load of the first voltage domain and the total load of the processor to determine the distributed power consumption of the first voltage domain.

In a fifth aspect, the present application provides an electronic device, including a processor, which can be coupled to a memory, and the processor can execute a computer program stored in the memory to cause the electronic device to perform any one of the above-mentioned first aspects. the method described.

For the beneficial effects corresponding to any one of the above-mentioned second aspect to the fifth aspect of the present application, reference may be made to the beneficial effect described in any one of the above-mentioned first aspect, which will not be repeated here.

Description of drawings

FIG. 1 exemplarily shows a schematic structural diagram of a processor provided by an embodiment of the present application;

FIG. 2 exemplarily shows a schematic flowchart corresponding to a power consumption control method provided by an embodiment of the present application;

FIG. 3 exemplarily shows a specific flowchart of a power consumption control method provided by an embodiment of the present application;

FIG. 4 exemplarily shows a corresponding relationship diagram of each temperature interval and each adjustment coefficient provided by an embodiment of the present application;

FIG. 5 exemplarily shows a schematic diagram of a power consumption adjustment strategy provided by an embodiment of the present application;

FIG. 6 exemplarily shows a schematic structural diagram of a power consumption controller provided by an embodiment of the present application;

FIG. 7 exemplarily shows a schematic structural diagram of another power consumption controller provided by an embodiment of the present application.

Detailed ways

Various embodiments disclosed in this application may be applied to electronic devices with overclocking functions. In some embodiments of the present application, the electronic device may be a computer device having a processor (such as a central processing unit (CPU)), such as a desktop computer. It should also be understood that, in some other embodiments of the present application, the electronic device may also be a portable electronic device with a processor, such as a mobile phone, a tablet computer, a wearable device (such as a smart watch) with a wireless communication function, a vehicle-mounted device Wait. Exemplary embodiments of portable electronic devices include, but are not limited to, carry-on

Or portable electronic devices with other operating systems.

When the processor in the electronic device has the overclocking function, if the power consumption margin of the processor meets the overclocking startup condition, the processor can increase its frequency to operate at a frequency higher than the frequency specified by the manufacturer to increase the processing power of the processor. performance. However, as the frequency of the processor increases, the power consumption of the processor will also increase accordingly, and the increased power consumption is manifested in the form of thermal energy, which increases the temperature of the processor. When the processor cannot be cooled in time, the excessively high temperature will affect the life and reliability of the processor.

In order to reduce the impact of the overclocking state on the lifespan and reliability of the processor, it is usually necessary to set a corresponding overclocking adjustment policy. At present, there are two overclocking adjustment strategies as follows: one is a temperature adjustment strategy, which corresponds to at least one temperature waterline. These temperature waterlines can be preset according to the rated temperature of the processor or the withstand temperature of each component in the processor. When the temperature of the processor exceeds a certain temperature water line, the processor will be underclocked or directly exit the overclocking state to avoid damage to the components in the processor due to excessive temperature. The other is a power consumption adjustment strategy, which corresponds to at least one power consumption watermark (ie, a power consumption threshold), and these power consumption watermarks can be adjusted according to the rated power consumption of the processor or the acceptable power consumption of various components in the processor. Pre-set, when the power consumption of the processor exceeds a certain power consumption threshold, the processor will reduce the power consumption or directly exit the overclocking state. However, these two overclocking adjustment strategies have the following problems: First, the various waterlines (such as various temperature waterlines or various power consumption waterlines) involved in these two overclocking adjustment strategies are preset Fixed value, the overclocking adjustment based on a fixed waterline is neither flexible nor accurate, and cannot be used as a general adjustment method in different scenarios. Secondly, these two overclocking adjustment strategies are executed independently of each other during overclocking adjustment. However, the work done by the processor will actually be converted into heat dissipation, and the temperature change of the processor will also directly affect the dynamic power consumption or static power consumption of the processor. This separate adjustment method does not take into account the linkage between temperature and power consumption, and it is difficult to improve the overclocking performance of the processor when overclocking the processor.

In view of this, the present application provides a power consumption control method for comprehensively implementing overclocking adjustment in combination with temperature and power consumption, so as to improve the overclocking performance of the processor while improving the flexibility and accuracy of the overclocking adjustment.

The technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments.

The terms "system" and "network" in the embodiments of the present application may be used interchangeably. "At least one" means one or more, and "plurality" means two or more. "And/or", which describes the association relationship of the associated objects, indicates that there can be three kinds of relationships, for example, A and/or B, which can indicate: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A, B can be singular or plural. The character "/" generally indicates that the associated objects are an "or" relationship. "At least one item(s) below" or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one item (a) of a, b, or c can represent: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c may be single or multiple .

And, unless otherwise specified, ordinal numbers such as "first" and "second" mentioned in the embodiments of the present application are used to distinguish multiple objects, and are not used to limit the priority or importance of multiple objects. For example, the first power consumption threshold and the second power consumption threshold are only for differentiating different power consumption thresholds, and do not indicate the difference in priority or importance of the two power consumption thresholds.

FIG. 1 exemplarily shows a schematic structural diagram of a processor provided by an embodiment of the present application. As shown in FIG. 1 , the processor 100 may include at least one processor core, such as a processor core 10 , a processor core 11 , a processor core 12 and a processor core 13 . The processor 100 may also include non-core components, such as general-purpose units (including counters, decoders, signal generators, etc.), accelerator units, input/output control units, interface units, internal memory, and external buffers. Wherein, each processor core and non-core components may be connected through a communication bus (not shown in FIG. 1 ), so as to realize the data transmission operation.

It should be understood that the above-mentioned processor 100 may be a chip. For example, the processor 100 may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), or a system on chip (SoC). It can be a central processing unit (CPU), a network processor (NP), a digital signal processing circuit (DSP), or a microcontroller (microcontroller). unit, MCU), it can also be a programmable logic device (PLD) or other integrated chips. It should be noted that the processor 100 in this embodiment of the present application may also be an integrated circuit chip, which has a signal processing capability. For example, the processor 100 described above may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, Discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It can be understood that the memory (for example, the internal memory and the external buffer) in the embodiments of the present application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically programmable Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory. Volatile memory may be random access memory (RAM), which acts as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (synchlink DRAM, SLDRAM) ) and direct memory bus random access memory (direct rambus RAM, DR RAM). It should be noted that the memory of the methods described herein is intended to include, but not be limited to, these and any other suitable types of memory.

Continuing to refer to FIG. 1 , in this embodiment of the present application, each processor core in the processor 100 (for example, the processor core 10 to the processor core 13 ) may all be located in the same voltage domain, or may be located in different voltage domains, respectively. Some processor cores may also be located in the same voltage domain, which is not specifically limited. One or more processor cores located in the same voltage domain may have the same operating voltage. For example, assuming that there are voltage domain 1, voltage domain 2 and voltage domain 3 in processor 100, processor core 10 is located in voltage domain 1, processor core 11 and processor core 12 are located in voltage domain 2, and processor core 13 is located in voltage domain 2. In voltage domain 3, the processor core 10 has the first voltage, the processor core 11 and the processor core 12 have the second voltage, and the processor core 13 has the third voltage. The first voltage, the second voltage and the third voltage may be the same or different, which are not specifically limited.

Continuing to refer to FIG. 1 , in this embodiment of the present application, the processor may further include a power consumption controller 14, and each processor core may also be provided with a frequency regulator, and the power consumption controller 14 may be associated with each processor. The frequency regulator communication connection in the core. In this way, when overclocking a certain processor core, the power consumption controller 14 can send a frequency control instruction to the frequency regulator of the processor core, so that the frequency regulator of the processor core adjusts the frequency control instruction according to the frequency control instruction. The frequency of the processor core, for example, is adjusted to be higher than the maximum frequency set by the manufacturer to make the processor core enter the overclocking state, or adjusted to be lower than the frequency corresponding to the overclocking state to exit the overclocking state. It should be understood that FIG. 1 is only an exemplary illustration. In other possible examples, the frequency regulator may be set only in one or several processor cores. In this case, the power consumption controller 14 may only A processor core provided with a frequency regulator performs frequency control. Alternatively, frequency regulators may also be set in one or more voltage domains. In this case, the power consumption controller 14 may separately perform frequency control on the processor cores in each voltage domain where the frequency regulators are set. Alternatively, a frequency regulator may also be set in the non-core components. In this case, the power consumption controller 14 can not only control the frequency of the processor core, but also control the frequency of the non-core components. Of course, the non-core components mentioned here refer to the components that work according to the set frequency.

It should be noted that, in addition to controlling the frequency of the processor core in the overclocking state, the power consumption control in this application may also include controlling the voltage of the processor core in the overclocking state, or other parameters that can affect the overclocking state. , such as current, etc., which are not specifically limited in this application. Exemplarily, when the power consumption control further includes controlling the voltage of the processor core, the power consumption controller 14 may also be connected to a voltage conversion circuit corresponding to each voltage domain, and the voltage conversion circuit may be a Buck circuit or a switched capacitor (Switched capacitor). Capacitor, SC) circuit, and of course other circuits that can realize the step-down function. The power consumption controller 14 can reduce the operating voltage of each processor core located in the voltage domain by increasing the step-down ratio of the voltage conversion circuit corresponding to a certain voltage domain, so as to reduce the operating voltage of each processor located in the voltage domain The power consumption of the core can also be increased by reducing the step-down ratio of the voltage conversion circuit corresponding to a certain voltage domain to increase the operating voltage of each processor core located in the voltage domain, so as to improve the overclocking performance. It should be understood that the frequency regulator shown in FIG. 1 can also be replaced with other components that can realize the power consumption adjustment function, such as a voltage regulator or a current regulator, and of course, they can also be collectively referred to as power consumption regulators, which is also referred to in this application. There is no specific limitation.

The power consumption control method in this application is described below by taking controlling the power consumption of each processor core in one voltage domain (assuming the first voltage domain) as an example, aiming at controlling the power consumption of each processor core in other voltage domains or The power consumption of non-processor cores will not be described in detail.

FIG. 2 exemplarily shows a schematic flowchart corresponding to a power consumption control method provided by an embodiment of the present application, and the method is applicable to a power consumption controller, such as the power consumption controller 14 shown in FIG. 1 . In this embodiment of the present application, the power consumption controller may execute the following power consumption control methods in a periodic manner. FIG. 2 exemplarily describes the primary power consumption control process of the power consumption controller. As shown in FIG. 2 , the method includes:

Step 201, the power consumption controller acquires the temperature of the first voltage domain.

In the above step 201, the temperature of the first voltage domain may refer to the temperature of any processor core located in the first voltage domain, or may refer to the average temperature of each processor core located in the first voltage domain, or It may refer to the highest temperature of each processor core located in the first voltage domain, which is not specifically limited.

In an optional implementation manner, when the temperature of the first voltage domain is the highest temperature of each processor core in the first voltage domain, the power consumption controller may first determine from each processor core of the processor For each target processor core belonging to the first voltage domain, the temperature corresponding to each target processor core is obtained, and the highest temperature among the temperatures corresponding to each target processor core is used as the temperature of the first voltage domain. In this way, a targeted temperature acquisition operation can be performed only on the processor core in the voltage domain whose power consumption needs to be adjusted, and it is not necessary to acquire the temperature of all the processor cores, which is more helpful for saving resources.

Step 202, the power consumption controller determines the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain.

In this embodiment of the present application, when overclocking is adjusted in combination with temperature and power consumption, if the temperature waterline corresponding to the temperature adjustment strategy remains unchanged, the higher the power consumption threshold (ie the power consumption waterline corresponding to the power consumption adjustment strategy) is set. When it is high, the power consumption of the processor core is less likely to reach the power consumption threshold, so the power consumption of the processor core in the overclocking state is higher, and the higher the power consumption, the higher the temperature, so the processor core The easier it is to trigger the temperature waterline corresponding to the temperature adjustment strategy, causing the processor core to downclock or directly exit the overclocking state. Based on this, in order to avoid triggering the temperature adjustment strategy as much as possible, in an optional implementation manner, when the temperature of the first voltage domain is higher, the power consumption controller may set the power consumption threshold of the first voltage domain to be lower, so that , the power consumption of the first voltage domain is more likely to trigger the power consumption threshold, so it is easier for the processor core in the first voltage domain to execute the power consumption adjustment strategy to reduce power consumption, and the temperature corresponding to the reduced power consumption will also be Therefore, the temperature of the first voltage domain is less likely to trigger the temperature water line corresponding to the temperature adjustment strategy, and the processor core in the first voltage domain is less likely to trigger the temperature adjustment strategy. Further, the power consumption adjustment strategy is generally to adjust the power consumption in a step-by-step way of reducing the power consumption (for example, reduce a small power consumption first, and determine whether the reduced power consumption still exceeds the power consumption threshold, if not, then No longer reduce power consumption, if it still exceeds, continue to reduce power consumption), and will not directly exit the overclocking state, so this method reduces the power consumption threshold when the temperature is high, which actually reduces the conditions for triggering the power consumption adjustment strategy. , so that the first voltage domain can continue to maintain the overclocking state by slowly reducing power consumption, and it can also reduce the possibility of triggering the temperature adjustment strategy to exit the overclocking state. The processor core is maintained in an overclocked state for a long time, which helps to improve the overclocking performance of the processor.

In the above-mentioned embodiments, there are many possible implementation manners of how to reduce the power consumption threshold of the first voltage domain as the temperature of the first voltage domain increases. For example, in a possible implementation manner, a certain linear relationship may be set between the temperature rise value of the first voltage domain and the power consumption threshold reduction value of the first voltage domain. In this case, the first voltage The power consumption threshold of the first voltage domain can be reduced by several watts corresponding to the linear relationship for every few degrees of increase in the temperature of the domain. For another example, in another possible implementation manner, several temperature rise value intervals and power consumption thresholds corresponding to the several temperature rise value intervals may also be preset. When the temperature of the first voltage domain is compared to When the temperature rise value of the previous cycle is within a temperature rise value interval, the power consumption threshold of the first voltage domain may be set to the power consumption threshold corresponding to the temperature rise value interval. In another possible implementation manner, several temperature ranges and power consumption thresholds corresponding to these several temperature ranges may also be preset, and when the temperature of the first voltage domain is in a certain temperature range, the first voltage The power consumption threshold of the domain is set to the power consumption threshold corresponding to the temperature range. There are many possible implementations, which will not be repeated here.

Step 203, the power consumption controller adjusts the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain.

In this embodiment of the present application, the power consumption threshold of the first voltage domain is used to limit the power consumption of the first voltage domain. When the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain, it means that the current power consumption of the first voltage domain is too high. If the power consumption of the first voltage domain is not reduced, the first voltage domain may Overheating or overcurrent occurs. Therefore, in order to avoid this phenomenon, the power consumption controller needs to reduce the power consumption of the first voltage domain when the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain. There are many ways to reduce the power consumption of the first voltage domain. For example, in one case, continuing to refer to FIG. 1 , the power consumption controller may generate a frequency reduction control command and send it to a device located in the first voltage domain. Each frequency controller connected to each processor core enables each frequency controller to reduce the frequency of each processor core in the first voltage domain according to the frequency reduction control instruction. In this way, power consumption can be reduced by frequency reduction. For another example, in another case, considering that the processor core may be in a high-voltage and low-frequency state after reducing the frequency, resulting in a low power utilization rate of the processor core, the power consumption controller can also simultaneously reduce the frequency and be in the first place. The frequency of each processor core in the voltage domain and the working voltage of the first voltage domain are used to keep the processor core in a low-voltage and low-frequency state and improve the power utilization rate of the processor core. As for the specific operating voltage and frequency to be adjusted for the processor core, the power consumption controller can determine the corresponding relationship between the preset frequency and operating voltage. The preset corresponding relationship can be determined by those skilled in the art in advance. Packaged inside the power consumption controller, the preset corresponding relationship corresponding to each processor core may be the same or different.

Exemplarily, when the power consumption of the first voltage domain is much smaller than the power consumption threshold of the first voltage domain, more power consumption margins in the first voltage domain are not utilized. In this case, the power consumption controller can also increase the power consumption of the first voltage domain, so as to improve the working performance of the first voltage domain. For example, the power consumption controller can send up-frequency control instructions to each frequency controller connected to each processor core in the first voltage domain to increase the frequency of each processor core in the first voltage domain, and considering that the processor The high frequency state of the core may be driven by a high voltage, so the power consumption controller can also simultaneously send a boost control command to the voltage conversion circuit corresponding to the first voltage domain to increase the working voltage of the first voltage domain.

In this embodiment of the present application, if multiple processor cores are located in the same voltage domain, the working voltage of the voltage domain is actually the working voltage corresponding to the processor core with the highest frequency. In this case, the operating voltage of other processor cores in this voltage domain is the same as the operating voltage of the processor core with the highest frequency, but the frequency of other processor cores may be lower than the frequency of the processor core with the highest frequency, which It will cause other processor cores to be in a high voltage and low frequency state, and the power utilization of other processor cores is low. In order to avoid this phenomenon, the present application can set each processor core to be located in a voltage domain, so that the working voltage of each processor core can correspond to its own frequency, so that the power utilization rate of each processor core can be higher.

In the above-mentioned embodiments of the present application, by adjusting the power consumption threshold of the voltage domain in combination with the temperature of the voltage domain, the power consumption threshold of the voltage domain can be matched with the current temperature, and adjusting the power consumption based on the power consumption threshold actually considers When it comes to the dual effects of power consumption and temperature, this can not only improve the accuracy of overclocking adjustment, but also make the power consumption threshold of the voltage domain change flexibly with temperature changes, which also helps to improve the flexibility of overclocking adjustment. Further, compared with a single temperature adjustment strategy or power consumption adjustment strategy, based on this method, the power consumption adjustment strategy can be used as much as possible to maintain the overclocking state of each processor core in the voltage domain by slowly adjusting the power consumption, while Do not directly trigger the temperature adjustment strategy to avoid directly exiting the overclocking state, thereby improving the overclocking performance of the processor.

The power consumption control method in the embodiment of the present application is described below with a specific embodiment. In this example, it is assumed that the power consumption controller implements power consumption control by controlling the frequency.

FIG. 3 exemplarily shows a specific flowchart of a power consumption control method provided by an embodiment of the present application. As shown in FIG. 3 , the method is applicable to a power consumption controller, such as the power consumption controller 14 shown in FIG. 1 . Fig. 3 exemplifies the primary power consumption control process of the power consumption controller. As shown in Fig. 3, the method includes:

Step 301, the power consumption controller acquires the temperature of each processor core.

In this embodiment of the present application, the power consumption controller may acquire the temperature of each processor core in various ways, and several optional implementation manners are exemplarily introduced below.

In an optional implementation manner, continuing to refer to FIG. 1 , each processor core may also be provided with a temperature sensor, such as a temperature sensor, and the temperature sensor and the power consumption controller are connected through a communication line. Each temperature sensor set in each processor core can sample the temperature of each processor core according to the first set period, and send the sampled temperature to the power consumption through the communication line between the temperature sensor and the power consumption controller. controller. The first set period can be set by those skilled in the art based on experience. For example, in order to improve the accuracy of the sampling temperature, the first set period can be set to 100um. In this way, each temperature sensor can sample the location every 100um. The temperature of the processor core is sent to the power controller. With this implementation, the power consumption controller can directly obtain the temperature of each processor core through a measurement method. Although a temperature sensor needs to be set in the processor core in this method, the measured temperature is more accurate, which is helpful for improving the Accuracy of power regulation.

In another optional implementation manner, as shown in FIG. 1 , each processor core may further be provided with a power consumption sensor, and the power consumption sensor and the power consumption controller are also connected through a communication line. The power consumption sensor set in each processor core can sample the number of inversions of each signal in the processor core according to the second set period, and then according to the number of inversions of each signal and the power consumption corresponding to one inversion of the signal , determine the power consumption of each signal in a second set period, calculate the total power consumption of the processor core in a second set period according to the power consumption of each signal in a second set period, and then The total power consumption is sent to the power consumption controller through the communication line preceding the power consumption sensor and the power consumption controller. In this case, the power consumption controller may also determine the temperature corresponding to the total power consumption of the processor core according to the preset corresponding relationship between power consumption and temperature, and use the temperature as the temperature of the processor core. With this implementation, the power consumption controller can obtain the temperature of each processor core through indirect calculation. Although the indirect calculation method is not as accurate as the measurement method, this method does not need to be installed in the processor core. Temperature sensor to help save processor core footprint and design cost. It can be understood that "obtaining the temperature of the processor core indirectly through the power consumption sensor" is only an optional implementation manner, and in other optional implementation manners, the power consumption controller may also acquire the processor core through other indirect methods. The temperature of the processor core, for example, predicting the temperature of the processor core through the temperature of the processor core at various historical moments, etc., will not be introduced too much here.

In another optional implementation manner, a temperature sensor may also be set in a part of the processor cores, and a power consumption sensor may be set in another part of the processor cores, so that the The temperature can be measured in real time through a temperature sensor, and the temperature of another part of the processor core can be indirectly calculated through the power consumption measured in real time by the power consumption sensor. In this embodiment, the number of processor cores for setting the temperature sensor and the number of processor cores for setting the power consumption sensor can be determined by those skilled in the art based on experience, which is not specifically limited in this application.

In this embodiment of the present application, "setting a temperature sensor or a power consumption sensor in each processor core to determine the temperature of each processor core" is only an optional implementation manner, and in other optional implementation manners , it is also possible to set a shared temperature sensor or a shared power consumption sensor in two or more processor cores. In this case, since the temperature value sampled by the temperature sensor may be the temperature value at a certain point in two or more processor cores, the power consumption controller can subsequently compensate the temperature sensor sampling according to a certain strategy temperature to get the temperature of each processor core. Alternatively, since the power consumption value sampled by the power consumption sensor is the total power consumption of two or more processor cores, the power consumption controller can subsequently distribute the power consumption sampled by the power consumption sensor according to a certain proportion. to get the power consumption of each processor core. The specific strategy or ratio to be used can be set by those skilled in the art based on experience, which will not be described here.

Step 302, the power consumption controller selects each processor core in the first voltage domain from the processor cores, and takes the highest temperature among the temperatures corresponding to the processor cores in the first voltage domain as the first temperature. temperature in a voltage domain.

In the foregoing step 302, the first voltage domain may be a voltage domain where any processor core included in the processor is located. The solution in this application can only adjust the power consumption of the voltage domain where a certain processor core is located, or can adjust the power consumption of the voltage domain where some processor cores are located, and can also adjust the voltage domain where all the processor cores are located at the same time. Power consumption adjustment is performed separately, which is not specifically limited.

Exemplarily, after determining the processor cores in the first voltage domain, the power consumption controller may sort the temperatures of these processor cores in descending order of temperature, and then sort the temperatures of the processor cores in the obtained order. The temperature of the team head is taken as the temperature of the first voltage domain. Alternatively, the power consumption controller may sort the temperatures of these processor cores in ascending order of temperature, and then use the temperature at the end of the queue in the obtained sorting as the temperature of the first voltage domain.

Step 303 , the power consumption controller allocates the power consumption of the processors according to the load of each processor core and the load of each processor core in the first voltage domain, and obtains the allocated power consumption of the first voltage domain.

In an optional implementation manner, the load of any processor core may be determined according to the power consumption, frequency and voltage of the processor core. In this embodiment, each processor core may further be provided with a voltage sampler, and the voltage sampler may also sample the voltage of the processor core where it is located according to the second set period and report it to the power consumption controller. In this case, in each second set period, the power consumption controller can obtain the voltage of the processor core through the voltage collector, obtain the power consumption of the processor core through the power consumption sensor, and obtain the power consumption of the processor core through the frequency regulator. After obtaining the frequency of the processor core, the power consumption controller can calculate the load of the processor core according to the following formula (1.1):

A=P/(f*V ² )......(1.1)

Among them, A is the load of the processor core, P is the power consumption of the processor core, f is the frequency of the processor core, and V is the voltage of the processor core.

Further, after calculating the load of each processor core, the power consumption controller can first add up the loads of all the processor cores included in the processor to calculate the total load of the processor, and then calculate the total load of the processor. The loads of the processor cores in the same voltage domain are summed to obtain the load of the first voltage domain, and then the ratio of the load of the first voltage domain to the total load of the processor can be calculated, and this ratio marks the first The current load in the voltage domain accounts for the load proportion of the total load in the processor. Generally, the current load in the first voltage domain can be used to indicate the power consumption to be consumed by the first voltage domain in the future. When the current load in the first voltage domain is larger, it means that the first voltage domain may consume power in the future. Consume greater power consumption. When the current load in the first voltage domain is smaller, it means that the first voltage domain may consume less power consumption in the future. Therefore, the power consumption controller may allocate power consumption to the first voltage domain by utilizing the load ratio of the first voltage domain. For example, the power consumption controller may directly calculate the product of the load proportion occupied by the first voltage domain and the power consumption of the processor (for example, rated power consumption or maximum power consumption, etc.), and use the product as the allocated power of the first voltage domain. consumption. For another example, the power consumption controller may first calculate the correction coefficient corresponding to the first voltage domain according to the deviation between the historical allocated power consumption of the first voltage domain and the historical real power consumption, and then calculate the load proportion occupied by the first voltage domain and The product of the power consumption of the processor obtains the allocated power consumption of the first voltage domain before correction, and then uses the correction coefficient to correct the allocated power consumption, and uses the corrected allocated power consumption as the allocated power consumption of the first voltage domain. In this implementation manner, since the allocated power consumption of the first voltage domain is calculated according to the current load of the first voltage domain and the total load of the processor, the allocated power consumption can match the likely future consumption of the first voltage domain with a high probability. Real power consumption, this method can allocate enough power consumption to the first voltage domain to meet the power consumption requirement of the first voltage domain, and will not allocate too much power consumption to the first voltage domain to cause performance waste.

It should be noted that the above content is merely an example to introduce an optional implementation manner of allocating power consumption. The present application may also allocate power consumption in other ways: for example, in another optional implementation manner, the power consumption controller may first obtain a power consumption prediction model according to historical power consumption simulation in the first voltage domain, and then use the power consumption prediction model. The power consumption prediction model predicts the future power consumption of the first voltage domain, and uses the future power consumption as the allocated power consumption of the first voltage domain. For example, in another optional implementation manner, the power consumption controller may also predict the future load according to the current load and historical load of the first voltage domain, and then execute the above-mentioned power consumption distribution scheme using the future load. It should be understood that as long as the solutions that can allocate power consumption for each voltage domain can be included in the protection scope of the present application, the present application will not describe them one by one.

Step 304 , the power consumption controller determines the temperature range in which the temperature of the first voltage domain is located, and uses the adjustment coefficient corresponding to the temperature range and the allocated power consumption of the first voltage domain to calculate the power consumption threshold of the first voltage domain.

In an optional implementation manner, a preset temperature range [T _min , T _max ] may also be set in the power consumption controller, and the preset temperature range [T _min , T _max ] may be divided into at least Two temperature intervals, each of the at least two temperature intervals may correspond to an adjustment coefficient. FIG. 4 exemplarily shows a corresponding relationship diagram of each temperature interval and each adjustment coefficient provided by an embodiment of the present application. In this example, it is assumed that the values in the first column corresponding to the second row to the n+1th row are The temperature intervals are referred to as the first temperature interval (T ₁ , T _max ], the second temperature interval (T ₂ , T ₁ ], the third temperature interval (T ₃ , T ₂ ], ..., the nth temperature interval, respectively. temperature interval (T _min , T _n ], then Ni shown in Figure 4 refers to the temperature coefficient corresponding to the _i -th temperature interval. Among them, i is a positive integer less than or equal to n, and n is greater than or equal to 2 A positive integer, T _max >T ₁ >T ₂ >T ₃ >...>T _min . Continue to refer to Fig. 4 , assuming that TDP is the allocated power consumption of the voltage domain, and PL ₂ is the power consumption threshold of the voltage domain, then Fig. 4 Exemplarily, the product of the distribution power consumption of the voltage domain and the adjustment coefficient corresponding to the temperature interval in which the temperature of the voltage domain is located is used as the power consumption threshold of the voltage domain. In this case, the power consumption controller is determining the temperature of the first voltage domain. And after calculating the distributed power consumption of the first voltage domain, the corresponding relationship can be queried to determine the adjustment coefficient corresponding to the temperature range in which the first voltage domain is located, and then the product of the adjustment coefficient and the distributed power consumption can be directly calculated, and the The product is used as the power consumption threshold of the first voltage domain. According to this embodiment, since the allocated power consumption TDP corresponds to the minimum power consumption that the processor will allocate to the first voltage domain, the adjustment coefficient N ₁ and the adjustment coefficient N can also be set. _2. The adjustment coefficient N ₃ , ..., the adjustment coefficient N _n is a real number not less than 1, so that the adjustment coefficient and the power consumption allocated to the first voltage domain are used as the power consumption threshold of the first voltage domain, so that the first voltage can be guaranteed The power consumption threshold of the domain is not less than the allocated power consumption of the first voltage domain.

In the above embodiment, the at least two adjustment coefficients corresponding to the at least two temperature intervals may decrease as the temperature in the at least two temperature intervals increases. Corresponding to Fig. 4, that is: since the temperature in the first temperature interval (T ₁ , T _max ]>the temperature in the second temperature interval (T ₂ , T ₁ ]> the third temperature interval (T ₃ , Temperature in T ₂ ] >... > temperature in the nth temperature interval (T _min , T _n ], therefore, adjustment coefficient N ₁ , adjustment coefficient N ₂ , adjustment coefficient N ₃ , ..., adjustment coefficient N _n Decrease in sequence, namely: N ₁ >N ₂ >N ₃ >... >N _n ≥1.

In the embodiment of the present application, the preset temperature range [T _min , T _max ] can be set according to various rules, for example:

In a possible case, the minimum temperature in the preset temperature range [T _min , T _max ] can be a small temperature value that is basically impossible to reach, such as -120 degrees (generally, the processor core The processor core will crash when the temperature has not yet dropped to -120 degrees), correspondingly, the maximum temperature in the preset temperature range [T _min , T _max ] can be a larger temperature that is basically impossible to reach value, such as 120 degrees (generally, the processor core fails when the temperature of the processor core has not reached 120 degrees). In this case, as long as each processor core in the first voltage domain is in the working state, the temperature of each processor core is bound to be within the preset temperature range, so that the highest temperature in each processor core (that is, the first The temperature of the voltage domain) is bound to be within a certain temperature range in the preset temperature range.

In another possible situation, the preset temperature range [T _min , T _max ] can be set according to each temperature water line used in the temperature adjustment strategy. Each temperature waterline in the temperature adjustment strategy may correspond to different time dimensions, and as the time dimension increases, the temperature waterline corresponding to each time dimension may gradually decrease. Assuming that the temperature waterline 1 corresponds to the time dimension of 5 seconds, and the temperature waterline 2 corresponds to the time dimension of 0.5 seconds, then when the average temperature of the processor core in the past 5 seconds exceeds the temperature waterline 1, or the temperature of the processor core in the past 0.5 seconds When the average temperature (because the period of 0.5 seconds is very short, it can also be regarded as an instantaneous temperature) exceeds the temperature waterline 2, it means that the temperature of the processor core is high, and the processor core needs to be cooled down (for example, frequency reduction and voltage reduction). ). In this embodiment, the minimum temperature T _min in the preset temperature range may refer to the lowest temperature in each temperature water line, and the maximum temperature T _max in the preset temperature range may refer to the highest temperature in each temperature water line temperature, and the temperature of the first voltage domain may not be within the preset temperature range. In this case, if the temperature of the first voltage domain is lower than the minimum temperature in the preset temperature range, the power consumption controller can directly consider that the temperature belongs to the temperature range where the minimum temperature is located. If the temperature is higher than the maximum temperature in the preset temperature range, the power consumption controller may directly consider that the temperature belongs to the temperature range where the maximum temperature is located.

It should be understood that the above are just two possible situations for the preset temperature range to be exemplified. In the embodiments of the present application, the preset temperature range may also be set by those skilled in the art based on experience, which is not specifically limited in the present application.

Step 305, the power consumption controller adjusts the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain.

In this embodiment of the present application, when the power consumption of the first voltage domain is greater than the power consumption threshold of the first voltage domain, the power consumption controller may send a frequency reduction signal to the frequency regulator in each processor core in the first voltage domain The control instruction is used to cause the frequency regulator of each processor core in the first voltage domain to adjust the frequency of the processor core where it is located to a frequency lower than the current frequency. Among them, the frequency reduction control command can correspond to the following situations:

In a possible case, the frequency reduction control instruction carries a target frequency reduction frequency, and the target frequency reduction frequency can be the rated operating frequency of the processor core, or another frequency lower than the current frequency. After receiving the frequency reduction control command, any frequency regulator can first analyze the target frequency reduction frequency from the frequency reduction control command, and then compare the current frequency of the processor core where it is located and the target frequency reduction frequency, if the current frequency If the frequency is higher than the target frequency reduction frequency, the frequency regulator can reduce the frequency of the processor core where it is located to the target frequency reduction frequency. If the current frequency is lower than the target frequency reduction frequency, the frequency regulator can not adjust the frequency of the processor core. frequency, or increase the frequency of the processor core where it is located to the target downclock frequency to maximize the processing performance of the processor core.

In another possible situation, the frequency reduction control instruction may also be just a frequency reduction instruction, and after receiving the frequency reduction control instruction, any frequency regulator may lower the frequency of the processor core where it is located. Wherein, the different frequency regulators can down-clock their respective processor cores to the same frequency, or down-convert their respective processor cores to different frequencies according to their own needs, which is not specifically limited.

In an optional implementation manner, when the power consumption of the first voltage domain is much smaller than the power consumption threshold of the first voltage domain, it indicates that the current power consumption of the first voltage domain is relatively low, which may be due to the fact that the first voltage domain is in the first voltage domain. This is caused by the fact that the processor cores in the first voltage domain do not enter the overclocking state, or it may be caused by the fact that the processor cores in the first voltage domain are running at a lower frequency. There is also some thermal headroom available. In this case, in order to make full use of the thermal headroom of these processor cores to maximize the processing performance of the processor cores under temperature controllable conditions, the power consumption controller may The frequency regulator in the processor core sends an up-frequency control instruction, so that the frequency regulator of each processor core in the first voltage domain adjusts the frequency of the processor core where it is located to a frequency higher than the current frequency. Among them, the up-frequency control command can correspond to the following situations:

In a possible case, the up-conversion control instruction carries a target up-conversion frequency, and the target up-conversion frequency is set by the power consumption controller according to the power consumption of the first voltage domain. For example, the power consumption controller also stores A correspondence between at least one power consumption and at least one target up-conversion frequency. When determining that an up-conversion operation is to be performed on the processor core in the first voltage domain, the power consumption controller may first query the correspondence to determine the first voltage The target upscaling frequency corresponding to the power consumption of the domain is generated, and then an upscaling control instruction is generated based on the target upscaling frequency, and sent to each frequency regulator in each processor core in the first voltage domain. Correspondingly, after receiving the upscaling control instruction, any frequency regulator can first obtain the target upscaling frequency from the upscaling control instruction, and then compare the current frequency of the processor core where it is located and the target upscaling frequency, If the current frequency is lower than the target upscaling frequency, the frequency regulator can increase the frequency of the processor core where it is located to the target upscaling frequency; if the current frequency is higher than the target upscaling frequency, the frequency regulator can not adjust the processing frequency of the processor core. In this way, even if the frequency of a certain processor core is very high in the first voltage domain, this method will not continue to increase the frequency of the processor core, thereby helping to maintain the lifespan and stability of the processor core.

In another possible situation, the up-frequency control instruction can also be just an up-frequency instruction. After receiving the up-frequency control instruction, any frequency regulator can up-frequency the processor core where it is located. Wherein, the different frequency regulators can up-convert their respective processor cores to the same frequency, or can up-convert their respective processor cores to different frequencies according to their own needs, which is not specifically limited.

In this embodiment of the present application, the power consumption threshold of the first voltage domain may refer to any one or any multiple power consumption thresholds in the power consumption adjustment strategy. In a possible power consumption adjustment strategy, the processor may correspond to at least two power consumption thresholds, and the at least two power consumption thresholds respectively correspond to different time dimensions. The power consumption threshold can be gradually reduced. Assuming that there are a first power consumption threshold and a second power consumption threshold, the first power consumption threshold corresponds to the time dimension of 0.3 seconds (actually it is the average power consumption within 0.3 seconds, but the period of 0.3 seconds is short, so it can also be considered as Instantaneous power consumption), the second power consumption threshold corresponds to the time dimension of 3 seconds, then when the average power consumption of each processor core in the first voltage domain in the past 3 seconds exceeds the second power consumption threshold, or in the first voltage domain When the average power consumption of each of the processor cores in the past 0.3 seconds exceeds the first power consumption threshold, the power consumption of each processor core in the first voltage domain needs to be reduced (eg, frequency reduction and step-down). This power consumption adjustment strategy integrates power consumption thresholds of multiple time dimensions to realize power consumption adjustment, which can not only accurately and flexibly limit the power consumption of the first voltage domain, but also maintain the overclocking state of the first voltage domain as much as possible.

The following describes the process of adjusting power consumption according to the above power consumption adjustment strategy with a specific example:

FIG. 5 exemplarily shows a schematic diagram of a power consumption change in which power consumption is adjusted according to the above-mentioned power consumption adjustment strategy. As shown in FIG. 5 , in the power consumption adjustment strategy, there are a first power consumption threshold TDP (also referred to as PL1 ) and The second power consumption threshold PL2 (also called Turbo), the time dimension corresponding to the first power consumption threshold TDP is greater than the time dimension corresponding to the second power consumption threshold PL2, and the first power consumption threshold TDP is smaller than the second power consumption threshold PL2. According to the solution in this application, the power consumption controller can adjust the ratio of the second power consumption threshold PL2 to the first power consumption threshold TDP in real time according to the temperature of the first voltage domain:

When the temperature of the first voltage domain is higher, the ratio of the second power consumption threshold PL2 to the first power consumption threshold TDP is smaller, so that the second power consumption threshold PL2 is closer to the first power consumption threshold TDP (for example, as shown in FIG. 5 ). The power consumption waterline L1). In this case, even if the first power consumption threshold TDP in the long time dimension is not triggered, because the value of the second power consumption threshold PL2 in the short time dimension becomes smaller, the instantaneous power consumption in the first voltage domain is easier to trigger The second power consumption threshold PL2, thereby causing the first voltage domain to be down-converted. However, this frequency reduction operation does not directly reduce the power consumption of the first voltage domain to below the first power consumption threshold TDP, but slowly reduces until it reaches the second power consumption threshold PL2, so the first voltage domain only performs Downclocking without exiting overclocking state.

When the temperature of the first voltage domain is lower, the ratio of the second power consumption threshold PL2 to the first power consumption threshold TDP is larger, so that the second power consumption threshold PL2 is farther away from the first power consumption threshold TDP (for example, as shown in FIG. 5 ). The power consumption waterline L4). In this case, when the first power consumption threshold TDP in the long time dimension is not triggered, since the value of the second power consumption threshold PL2 in the short time dimension becomes larger, the instantaneous power consumption in the first voltage domain is higher. It is not easy to trigger the second power consumption threshold PL2, so that the first voltage domain can continue to be up-converted until it reaches the second power consumption threshold PL2. This way helps to further increase the power consumption of the first voltage domain when the temperature is controllable, so as to improve the processing performance of the processor.

According to the foregoing method, FIG. 6 is a schematic structural diagram of a power consumption controller 600 provided by an embodiment of the present application. The power consumption controller 600 may be a chip or a circuit, such as a chip or a circuit that may be provided in a processor. The power consumption controller 600 may correspond to the power consumption controller 14 in the above method. The power consumption controller 600 may implement the steps of any one or more of the corresponding methods shown in FIG. 2 and FIG. 3 above. As shown in FIG. 6 , the power consumption controller 600 may include a monitoring circuit 601 and a processing circuit 602 . Further, the power consumption controller 600 may further include a bus system, and the monitoring circuit 601 and the processing circuit 602 may be connected through the bus system. Moreover, the monitoring circuit 601 can also be connected to the temperature sensor and/or the power consumption sensor of each processor core through the bus system, and the processing circuit 602 can also be connected to the frequency regulator of each processor core through the bus system.

In this embodiment of the present application, the monitoring circuit 601 may acquire the temperature of the first voltage domain in the processor through a temperature sensor and/or a power consumption sensor of each processor core. Correspondingly, the processing circuit 602 may determine the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, and then adjust the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain. Wherein, when the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain, the processing circuit 602 can reduce the power consumption of the first voltage domain.

For the concepts related to the technical solutions provided by the embodiments of the present application involved in the power consumption controller 600, please refer to the descriptions of the foregoing methods or other embodiments for explanations, detailed descriptions, and other steps, which will not be repeated here.

According to the foregoing method, FIG. 7 is a schematic structural diagram of another power consumption controller 700 provided by an embodiment of the present application. The power consumption controller 700 may be a chip or a circuit, such as a chip or a circuit that may be provided in a processor. The power consumption controller 700 may correspond to the power consumption controller 14 in the above method. The power consumption controller 700 may implement the steps of any one or more of the corresponding methods shown in FIG. 2 and FIG. 3 above. As shown in FIG. 7 , the power consumption controller 700 may include an acquisition unit 701 , a determination unit 702 and an adjustment unit 703 .

In this embodiment of the present application, the acquiring unit 701 may be a receiving unit or a receiver when receiving information, and the receiving unit or the receiver may be a radio frequency circuit. In a specific implementation, the obtaining unit 701 may obtain the temperature of the first voltage domain in the processor, the determining unit 702 may determine the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, and the adjusting unit 703 may be based on the first voltage domain The power consumption threshold of the first voltage domain adjusts the power consumption of the first voltage domain, for example, when the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain, the power consumption of the first voltage domain is reduced.

For the concepts related to the technical solutions provided by the embodiments of the present application involved in the power consumption controller 700, please refer to the descriptions of the foregoing methods or other embodiments for explanations and detailed descriptions and other steps, which will not be repeated here.

It can be understood that, the functions of each unit in the above-mentioned power consumption controller 700 may refer to the implementation of the corresponding method embodiments, which will not be repeated here.

It should be understood that the above division of the units of the power consumption controller 700 is only a division of logical functions, and may be fully or partially integrated into one physical entity in actual implementation, or may be physically separated. In this embodiment of the present application, the acquiring unit 701 may be implemented by the monitoring circuit 601 in FIG. 6 above, and the determining unit 702 and the adjusting unit 703 may be implemented by the processing circuit 602 in FIG. 6 above.

According to the method provided by the embodiment of the present application, the present application also provides a computer program product, the computer program product includes: computer program code, when the computer program code is run on a computer, the computer is made to execute the steps shown in FIG. 1 to FIG. 5 . The method of any one of the illustrated embodiments.

According to the method provided by the embodiment of the present application, the present application further provides a computer-readable storage medium, where the computer-readable storage medium stores program codes, and when the program codes are run on a computer, the computer is made to execute FIG. 1 to FIG. 5 . The method of any one of the illustrated embodiments.

According to the method provided by the embodiment of the present application, the present application also provides an electronic device, the electronic device includes a processor, the processor is coupled to a memory, and the processor is configured to execute a computer program stored in the memory, so that the electronic device executes FIG. 1 To the method of any one of the embodiments shown in FIG. 5 .

The terms "component", "module", "system" and the like are used in this specification to refer to a computer-related entity, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a computing device and the computing device may be components. One or more components may reside within a process and/or thread of execution, and a component may be localized on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures stored thereon. A component may, for example, be based on a signal having one or more data packets (eg, data from two components interacting with another component between a local system, a distributed system, and/or a network, such as the Internet interacting with other systems via signals) Communicate through local and/or remote processes.

Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps described in connection with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware accomplish. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described systems, devices and units may refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution. The computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program codes .

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this. should be covered within the scope of protection of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

A power consumption control method, characterized in that the method comprises:

obtaining the temperature of the first voltage domain in the processor;

determining the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain;

The power consumption of the first voltage domain is adjusted based on the power consumption threshold of the first voltage domain.
The method of claim 1, wherein the adjusting the power consumption of the first voltage domain based on the power consumption threshold of the first voltage domain comprises:

When the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain, the power consumption of the first voltage domain is reduced.
The method according to claim 1 or 2, wherein the acquiring the temperature of the first voltage domain in the processor comprises:

Determine each target processor core in the first voltage domain from each processor core of the processor;

obtaining the temperatures corresponding to the respective target processor cores;

The highest temperature among the temperatures corresponding to the respective target processor cores is used as the temperature of the first voltage domain.
The method according to any one of claims 1 to 3, wherein the determining the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain comprises:

determining a target temperature range in which the temperature of the first voltage domain is located;

determining the power consumption threshold corresponding to the target temperature interval as the power consumption threshold of the first voltage domain;

The target temperature interval is any one of at least two temperature intervals, and each temperature interval in the at least two temperature intervals corresponds to a power consumption threshold. Any temperature interval: when the temperature in the temperature interval is higher, the power consumption threshold corresponding to the temperature interval is smaller.
The method according to any one of claims 1 to 4, wherein the determining the power consumption threshold of the first voltage domain according to the temperature of the first voltage domain comprises:

determining a target temperature range in which the temperature of the first voltage domain is located;

According to the allocated power consumption of the first voltage domain and the adjustment coefficient corresponding to the target temperature interval, the power consumption threshold of the first voltage domain is calculated; wherein, the allocated power consumption of the first voltage domain is based on the the power consumption pre-allocated for the first voltage domain by the load of the first voltage domain and the total load of the processor;

The target temperature interval is any one of at least two temperature intervals, and each of the at least two temperature intervals corresponds to an adjustment coefficient.
The method of claim 5, wherein the adjustment coefficients corresponding to the at least two temperature intervals decrease as the temperature in the temperature interval increases.
A processor, characterized in that it includes a temperature sensor and a power consumption controller; the temperature sensor is arranged in a first voltage domain of the processor;

The power consumption controller is configured to obtain the temperature of the first voltage domain from the temperature sensor, determine a power consumption threshold of the first voltage domain according to the temperature of the first voltage domain, and based on the temperature of the first voltage domain The power consumption threshold of the first voltage domain adjusts the power consumption of the first voltage domain.
The processor of claim 7, wherein the processor further comprises at least one processor core and at least one temperature sensor, and the at least one temperature sensor is respectively connected to the at least one processor core;

The temperature sensor connected to any processor core is used to acquire the temperature of the processor core and send it to the power consumption controller;

The power consumption controller is configured to determine each target processor core in the first voltage domain from the at least one processor core, and determine the highest temperature among the temperatures corresponding to the target processor cores respectively. temperature as the temperature of the first voltage domain.
The processor of claim 7 or 8, wherein the processor further comprises at least one processor core and at least one power consumption regulator, the at least one power consumption regulator being respectively associated with the at least one processor server core connection;

The power consumption controller is specifically configured to, when the power consumption of the first voltage domain exceeds the power consumption threshold of the first voltage domain, generate a power consumption control instruction and send it to the power consumption control command in the first voltage domain. the power consumption regulator connected to each target processor core;

The power consumption regulator connected to any target processor core is configured to reduce the power consumption of the target processor core according to the power consumption control instruction.
The processor of claim 9, wherein the power consumption regulator is specifically used for:

According to the power consumption control instruction, the frequency of the target processor core is reduced.
The processor according to any one of claims 7 to 10, wherein the power consumption controller is specifically configured to:

determining a target temperature range in which the temperature of the first voltage domain is located;

determining the power consumption threshold corresponding to the target temperature interval as the power consumption threshold of the first voltage domain;

The target temperature interval is any one of at least two temperature intervals, and each temperature interval in the at least two temperature intervals corresponds to a power consumption threshold. Any temperature interval: when the temperature in the temperature interval is higher, the power consumption threshold corresponding to the temperature interval is smaller.
The processor according to any one of claims 7 to 10, wherein the power consumption controller is specifically configured to:

determining a target temperature range in which the temperature of the first voltage domain is located;

Using the allocated power consumption of the first voltage domain and the adjustment coefficient corresponding to the target temperature interval, the power consumption threshold of the first voltage domain is calculated; wherein, the allocated power consumption of the first voltage domain is based on the the power consumption pre-allocated for the first voltage domain by the load of the first voltage domain and the total load of the processor;

The target temperature interval is any one of at least two temperature intervals, and each of the at least two temperature intervals corresponds to an adjustment coefficient.
The processor of claim 12, wherein the processor further comprises at least one processor core and at least one power consumption sensor, the at least one power consumption sensor being respectively associated with the at least one processor core connect;

The power consumption sensor connected to each processor core is used to obtain the power consumption of the processor core and send it to the power consumption controller;

The power consumption controller is further configured to: determine the load of each processor core according to the power consumption of each processor core and the temperature of each processor core; The load of each processor core in a voltage domain is calculated to obtain the load of the first voltage domain, and the total load of the processor is calculated according to the load of each processor core included in the processor; The load of a voltage domain and the total load of the processor distribute the power consumption of the processor to determine the distributed power consumption of the first voltage domain.
The processor of claim 12 or 13, wherein the adjustment coefficients corresponding to the at least two temperature intervals decrease as the temperature in the temperature interval increases.
An electronic device, characterized in that it comprises a processor, which is coupled to a memory, and the processor is configured to execute a computer program stored in the memory, so that the electronic device executes the execution as claimed in claims 1 to 6 The method of any one.