WO2022088299A1

WO2022088299A1 - Radio frequency chip with rc circuit integrated on chip

Info

Publication number: WO2022088299A1
Application number: PCT/CN2020/129810
Authority: WO
Inventors: 马强; 肖智敏
Original assignee: 苏州远创达科技有限公司
Priority date: 2020-10-30
Filing date: 2020-11-18
Publication date: 2022-05-05
Also published as: CN114446926A

Abstract

A radio frequency chip with an RC circuit integrated on chip. The radio frequency chip comprises a substrate (100), an epitaxial layer (101), and an active area disposed on the epitaxial layer, wherein on the epitaxial layer, a plurality of sets of resistor-capacitor combined structures (60) are arranged between a gate electrode (40) of the active area and an input metal pad (50); resistors and capacitors of the resistor-capacitor combined structures (60) are connected in parallel; and the gate electrode (40) of the active area is connected to the input metal pad (50) by means of the resistor-capacitor combined structures (60). According to the radio frequency chip with an RC circuit integrated on chip, an RC circuit is integrated inside the chip, thereby improving the gains and robustness of a radio-frequency power device at a low frequency and a high frequency.

Description

A radio frequency chip with on-chip integrated RC circuit

technical field

The invention relates to the technical field of radio frequency device chips, in particular to a radio frequency chip with an on-chip integrated RC circuit.

Background technique

An existing radio frequency chip with an on-chip integrated RC circuit, such as an LDMOS chip, has the structure of the input part of the chip as shown in Figure 1. The gate 3 of the chip is directly connected to the input metal pad 1 through a low-resistance metal 21 (eg, gold). superior. When this kind of chip is used at low frequency, problems such as oscillation of the power amplifier tube are often caused due to the high gain of the device. Usually, the circuit is stabilized by adding damping structures such as resistors and capacitors outside the power amplifier device. This circuit is generally realized through the PCB board. Although the external damping structure of the device can play a certain role in stability, because the external damping structure is far from the active area of the RF chip with the integrated RC circuit on the chip in the circuit matching structure, the external damping occurs when the loop oscillation occurs inside the chip. The role of structure is not obvious.

The existing improvement method is to connect a resistor in series on the chip input as shown in FIG. 2 , the input metal pad 1 is connected in series with a resistor 22 and then connected to the gate 3 of the chip. Its resistance is achieved through thin-film metal. Connecting a resistor in series to the gate can really suppress the problem of excessive gain, and there is no problem in low-frequency applications, but when the frequency exceeds 200MHz, the gain of the device is reduced too much due to the resistor connected in series to the gate of the chip, and the thin-film resistor It is easy to burn out due to power overload, resulting in device failure.

SUMMARY OF THE INVENTION

In view of the above existing technical problems, the present invention aims to provide a radio frequency chip with an on-chip integrated RC circuit, which integrates an RC circuit inside the chip to improve the gain and robustness of the radio frequency power device at low and high frequencies.

In order to solve these problems in the prior art, the technical scheme provided by the present invention is:

A radio frequency chip with an integrated RC circuit on a chip, including a substrate and an epitaxial layer, is arranged in an active region extending the epitaxial layer, and on the epitaxial layer, a plurality of groups are arranged between the gate of the active region and the input metal pad Resistor-capacitor combination structure, the resistance and capacitance of the resistance-capacitance combination structure are connected in parallel, and the gate of the active region is connected to the input metal pad after passing through the resistance-capacitor combination structure.

In a preferred technical solution, the resistance of the resistor-capacitor combination structure includes at least one double field plate structure, and the double field plate structure includes a first metal field plate and a second metal field plate arranged on the epitaxial layer, and the first metal field plate is arranged on the epitaxial layer. Two metal field plates are disposed above the first metal field plate, a dielectric layer is disposed between the first metal field plate and the second metal field plate, and both ends of the first metal field plate and the second metal field plate are respectively The upper metal layer disposed above is connected through a via hole, one end of the upper metal layer is connected to the gate, the other end is connected to the input metal pad, and the thickness of the metal layer is greater than that of the metal field plate.

In a preferred technical solution, a plurality of double field plate structures are connected in series through the upper metal layer.

In a preferred technical solution, the capacitor of the resistor-capacitor combination structure includes a lower metal layer and an upper metal layer arranged on the epitaxial layer, the upper metal layer is arranged above the lower metal layer, and the lower metal layer and the upper metal layer A dielectric layer is arranged between the layers, the lower metal layer is connected to the gate, and the upper metal layer is connected to the input metal pad.

In a preferred technical solution, the upper metal layer is divided into a first upper metal layer and a second upper metal layer through a fracture, a dielectric layer is arranged in the fracture, and the first upper metal layer is connected to the lower metal through a through hole layer, the first upper metal layer is connected to the gate electrode, and the second upper metal layer is connected to the input metal pad.

Compared with the solutions in the prior art, the advantages of the present invention are:

The radio frequency chip with an on-chip integrated RC circuit of the present invention integrates an RC circuit inside the chip, so that loop oscillation will not occur inside the chip, avoiding the problem of resistance power overload due to too low gain when inputting high-frequency applications, and improving the Gain and robustness of RF power devices at low and high frequencies.

Description of drawings

Below in conjunction with accompanying drawing and embodiment, the present invention is further described:

Fig. 1 is the input part structure schematic diagram of the existing radio frequency chip;

FIG. 2 is a schematic structural diagram of an input part of an existing radio frequency chip with resistors connected in series;

Fig. 3 is the structural schematic diagram of the input part of the radio frequency chip of the on-chip integrated RC circuit of the present invention;

Fig. 4 is the input layout schematic diagram of the input part of the radio frequency chip of the on-chip integrated RC circuit of the present invention;

5 is a schematic diagram of a resistor structure according to an embodiment of the present invention;

Fig. 6 is AA' sectional view of Fig. 5;

7 is a schematic diagram of a capacitor structure according to an embodiment of the present invention;

Fig. 8 is a cross-sectional view taken along line AA' of Fig. 7 .

Detailed ways

The above scheme will be further described below in conjunction with specific embodiments. It should be understood that these examples are intended to illustrate the invention and not to limit the scope of the invention. The implementation conditions used in the examples can be further adjusted according to the conditions of specific manufacturers, and the implementation conditions not specified are usually the conditions in routine experiments.

Example:

As shown in FIGS. 3 and 4 , a radio frequency chip with an on-chip integrated RC circuit of the present invention is suitable for GaAs, Si-based LDMOS, and GaN technology. Specifically, it includes a substrate 100 and an epitaxial layer 101, an active region disposed on the epitaxial layer 101, and a plurality of groups of resistor-capacitor combination structures 60 are arranged on the epitaxial layer 101 between the gate 40 of the active region and the input metal pad 50. , the resistor and capacitor of the resistor-capacitor combination structure 60 are connected in parallel, and the gate 40 of the active region is connected to the input metal pad 50 through the resistor-capacitor combination structure.

By designing an RC structure with a combination of resistance and capacitance of a certain size, when the chip is applied to a low frequency, the RF signal will pass through the series resistor, which effectively suppresses the chip gain and prevents the device from oscillating. When the chip is applied to a high frequency, the RF signal Through the series capacitor, the radio frequency power that the resistance structure bears is reduced, and the purpose of high gain and high efficiency is achieved.

The structure of the resistor 61 of the resistor-capacitor combination structure 60 is shown in FIGS. 5 and 6 , which is realized by stacking and paralleling double-layer thin-film metals, and includes at least one double-field plate structure 63 . The double-field plate structure includes a first The metal field plate 611 and the second metal field plate 612, the second metal field plate 612 is disposed above the first metal field plate 611, the dielectric layer 613 is disposed between the first metal field plate 611 and the second metal field plate 612, Two ends of a metal field plate 611 and a second metal field plate 612 are respectively connected to the upper metal layer 615 disposed above through through holes 614 .

In a preferred embodiment, the thicknesses of the first metal field plate 611 and the second metal field plate 612 are very thin, ranging from tens of nanometers to hundreds of nanometers, and are composed of metals or a combination of metals and metal nitrides. The resistance value is relatively large. The upper metal layer 615 is made of metal with a relatively thick thickness and has a relatively small resistance value. Preferably, the thicknesses of the first metal field plate 611 , the second metal field plate 612 and the upper metal layer 615 are different by more than 10 times.

By designing the aspect ratio of the metal field plate to achieve the resistance value required for the application, considering the current capacity of the metal, the use of double-layer field plate metal stacking can significantly improve the heat dissipation of the resistor and increase the overall power capacity of the resistor.

A dielectric layer 616 may also be disposed above the second metal field plate 612 .

In a preferred embodiment, multiple groups of the above-mentioned double field plate structures 63 can be connected in series through the upper metal layer 615, which can improve the resistance power capacity, reduce the length of the field plate metal of each group of resistance units, further optimize the resistance reliability, and effectively. Prevents resistor burnout issues.

The structure of the capacitor 62 of the resistor-capacitor combination structure 60 is shown in FIGS. 7 and 8 , including a lower metal layer 621 and an upper metal layer 622 disposed on the epitaxial layer 101 . The upper metal layer 622 is disposed above the lower metal layer 621 , and the lower The dielectric layer 624 between the metal layer 621 and the upper metal layer 622 is used as the epitaxial layer of the capacitor to form a parallel plate capacitor. The lower metal layer 621 is connected to the gate 40 , and the upper metal layer 622 is connected to the input metal pad 50 .

In a preferred embodiment, the upper metal layer 622 can be used as a connecting metal to connect the gate 40 or the input metal pad 50 . Specifically: the upper metal layer 622 is divided into a first upper metal layer 6222 and a second upper metal layer 6223 by a fracture 6221, and a dielectric layer is provided in the fracture 6221. In an example shown in FIG. A fracture 6221 is provided at the periphery of 622 , so that the divided first upper metal layer 6222 surrounds the second upper metal layer 6223 . The first upper metal layer 6222 is connected to the lower metal layer 621 through the through hole 623 , and a dielectric layer 624 is disposed between the lower metal layer 621 and the upper metal layer 622 . Among them, the lower metal layer 621 serves as the lower plate of the capacitor, the second upper metal layer 6223 serves as the upper plate of the capacitor, and the dielectric layer 624 between the lower metal layer 621 and the upper metal layer 622 serves as the dielectric layer (oxide) of the capacitor, form a parallel plate capacitor. All the above-mentioned dielectric layers are generally oxides or nitrides, and the capacitance value required by the application can be achieved by adjusting the thickness of the dielectric layers and the metal area of the upper and lower plates.

Of course, in order to achieve special requirements, the lower metal layer 621 of the capacitor can be implemented by a metal field plate.

In a preferred embodiment, the first upper metal layer 6222 and the second upper metal layer 6223 are made of metal with a relatively thick thickness, and the thickness is about 1-5um, and the resistance value thereof is relatively small.

In a preferred embodiment, for convenience of operation, as shown in FIG. 4 , the upper metal layer 622 of the capacitor and the upper metal layer 615 of the resistor are the same metal layer, and both ends are connected to the gate 40 and the input metal pad 50 respectively. The above-mentioned RC circuit and active area are packaged as a whole into a radio frequency chip.

It should be understood that the above-mentioned specific embodiments of the present invention are only used to illustrate or explain the principle of the present invention, but not to limit the present invention. Therefore, any modification, equivalent replacement, improvement, etc. made without departing from the spirit and scope of the present invention should be included within the protection scope of the present invention. Furthermore, the appended claims of this invention are intended to cover all changes and modifications that fall within the scope and boundaries of the appended claims, or the equivalents of such scope and boundaries.

Claims

A radio frequency chip with an on-chip integrated RC circuit, comprising a substrate and an epitaxial layer, which is arranged in an active region of the epitaxial layer, characterized in that, the epitaxial layer is arranged between a gate of the active region and an input metal pad There are multiple groups of resistor-capacitor combination structures, the resistors and capacitors of the resistor-capacitor combination structures are connected in parallel, and the gate of the active region is connected to the input metal pad after passing through the resistor-capacitor combination structure.
The radio frequency chip with an on-chip integrated RC circuit according to claim 1, wherein the resistor of the resistor-capacitor combination structure includes at least one double field plate structure, and the double field plate structure includes a first a metal field plate and a second metal field plate, the second metal field plate is arranged above the first metal field plate, a dielectric layer is arranged between the first metal field plate and the second metal field plate, the first metal field plate The two ends of the metal field plate and the second metal field plate are respectively connected to the upper metal layer arranged above through through holes. One end of the upper metal layer is connected to the gate, and the other end is connected to the input metal pad. The thickness of the metal layer is greater than the thickness of the metal field plate.
The radio frequency chip with an on-chip integrated RC circuit according to claim 2, wherein a plurality of double field plate structures are connected in series through an upper metal layer.
The radio frequency chip with an on-chip integrated RC circuit according to claim 2, wherein the capacitor of the resistor-capacitor combination structure comprises a lower metal layer and an upper metal layer arranged on the epitaxial layer, and the upper metal layer is arranged on the lower Above the metal layer, a dielectric layer is disposed between the lower metal layer and the upper metal layer, the lower metal layer is connected to the gate, and the upper metal layer is connected to the input metal pad.
The radio frequency chip with an on-chip integrated RC circuit according to claim 4, wherein the upper metal layer is divided into a first upper metal layer and a second upper metal layer through a fracture, and a dielectric layer is provided in the fracture, The first upper metal layer is connected to the lower metal layer through the through hole, the first upper metal layer is connected to the gate electrode, and the second upper metal layer is connected to the input metal pad.