WO2022081145A1 - Power state transitions - Google Patents

Power state transitions Download PDF

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Publication number
WO2022081145A1
WO2022081145A1 PCT/US2020/055464 US2020055464W WO2022081145A1 WO 2022081145 A1 WO2022081145 A1 WO 2022081145A1 US 2020055464 W US2020055464 W US 2020055464W WO 2022081145 A1 WO2022081145 A1 WO 2022081145A1
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WO
WIPO (PCT)
Prior art keywords
power state
low
peripheral device
state
indicator
Prior art date
Application number
PCT/US2020/055464
Other languages
French (fr)
Inventor
Wei Ju Chen
Chun Chang
Li Pin Lu
Original Assignee
Hewlett-Packard Development Company, L.P.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett-Packard Development Company, L.P. filed Critical Hewlett-Packard Development Company, L.P.
Priority to PCT/US2020/055464 priority Critical patent/WO2022081145A1/en
Publication of WO2022081145A1 publication Critical patent/WO2022081145A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/266Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device

Definitions

  • Computing systems such as a tablet computer, a notebook computer, a smartphone, etc.
  • peripheral devices such as an electronic payment terminal and a barcode reader, to electronically capture data and process data.
  • the computing system and the peripheral devices may switch to different power states, such as a low-power state, to save battery consumption.
  • FIG. 1 illustrates a system for transitioning power states of a peripheral device based on a queue, according to an example
  • FIG. 2 illustrates a system for transitioning power states of a peripheral device based on a queue, according to an example
  • FIG. 3 illustrates a method for transitioning power states of a peripheral device based on a queue, according to an example
  • FIGS. 4A and 4B illustrate a call flow diagram for transitioning power states of a peripheral device based on a queue, according to an example
  • FIG. 5 illustrates a non-transitory computer-readable medium for transitioning power states of a peripheral device based on a queue, according to an example.
  • computing systems may be coupled to peripheral devices, such as a printer, a payment terminal and a barcode reader. Based on such peripheral devices, a user may perform multiple operations. For example, a peripheral device may capture data pertaining to an operation from the user and transmit the captured data to a coupled computing system. As the computing system is coupled to the peripheral device, any transition in a power state of the computing system may also cause the peripheral device to transition into a power state corresponding to that of the computing system. For example, the computing system may switch between an active state (SO/working state) and one of the sleep states (S1 to S4). Accordingly, the peripheral device may transition into corresponding power states. In the active state, all components of the computing system are enabled to operate.
  • SO/working state active state
  • S1 to S4 sleep states
  • a display and a hard disk are turned OFF, but the memory chips are continuously refreshed to retain their content. Also, a central processing unit (CPU) of the computing system attains a lowest power state. The computing system is immediately restored for use when a user touches a key or uses the mouse.
  • CPU central processing unit
  • Examples of the low-power states include a modern standby state and a selective suspend state.
  • certain background activities such as network connectivity, and wake scenarios are kept active in the computing system while specific hardware and software features of the computing system may be switched OFF.
  • the modern standby state may allow certain value-added software activities to run periodically.
  • An example of the wake scenario includes an active state of a peripheral device. If the peripheral device is in the active state, the computing system coupled to the peripheral device will remain awake. [0010] In case the peripheral device does not support modern power saving technologies, i.e., is a legacy peripheral device, the peripheral device may be unable to detect the low-power state of the computing system.
  • the legacy peripheral device may not transition to a low-power state corresponding to the low-power state of the computing system.
  • the legacy peripheral device may be operational and may not transition to the low-power state.
  • activity of the legacy peripheral device may prevent the computing system from entering the low-power state.
  • the legacy peripheral device may increase power consumption of the computing system, even when there is a low level of activity at the computing system.
  • the legacy peripheral device may be notified about the transition of the computing system through advanced configuration and power interface (ACPI) messages.
  • the ACPI messages generated by a basic input/output system (BIOS) of the computing system, may communicate a current power state of the computing system to the legacy peripheral device, based on which the legacy peripheral device may make corresponding transitions.
  • the ACPI messages are transmitted to the legacy peripheral device every time the computing system may transition a power state, even in cases where the transition is unintentional.
  • the BIOS may transmit ACPI messages to the legacy peripheral device.
  • the user may quickly activate the computing system, which may result in another ACPI message being transmitted to the legacy peripheral device.
  • frequent power state transitioning of the computing system may be caused by a malicious activity or due to an interference signal at an end of the computing system. Such frequent transitioning of the computing system between the active state and the low-power state may cause the legacy peripheral device to transition between the active state and a corresponding low-power state in an undesirable manner. Such undesired power state transitions may pose a threat on integrity of data captured by the legacy peripheral device and may cause inconvenience to the user.
  • the present subject matter discloses example approaches for transitioning power states of a peripheral device based on a queue.
  • the queue may include a plurality of indicators that may be indicative of different instances of transitioning of a power state of the computing system. This may facilitate in reducing the power consumption of the computing system in the low-power state.
  • the computing system may populate the queue with an indicator.
  • the indicator may represent a current power state of the computing system, after the transition.
  • the computing system may thereafter parse through the queue of indicators to determine a time period between two consecutive indicators.
  • each indicator may be associated with a set of signals.
  • the set of signals are transmitted to a peripheral device, such as a payment terminal, as soon as the indicator is populated in the queue.
  • the time period between two consecutive indicators may depict whether or not the set of signals were transmitted successfully to the peripheral device.
  • the computing device may, based on the determined time period, instruct the peripheral device to switch to a power state corresponding to that of the computing system or to remain in a current power state.
  • the successful transmission of the set of signals may indicate that the transition in the power state of the computing system is not undesired.
  • the peripheral device is therefore instructed to transition to a low-power state.
  • the present subject mater facilitates aligning the transition in power states of the computing system with that of the peripheral device. As a result, the present subject matter reduces power consumption of the computing system and the peripheral device.
  • the present subject matter prevents undesired triggering of transition of the power states of the peripheral device due to a potential malicious activity or due to an interference signal at the computing system.
  • FIGS. 1-5 Examples of systems and methods are explained in detail with respect to FIGS. 1-5. While aspects of described systems and methods can be implemented in any number of different electronic devices, environments, and/or implementations, the examples are described in the context of the following system(s). It is to be noted that drawings of the present subject matter shown here are for illustrative purposes and are not drawn to scale.
  • FIG.1 illustrates a system 100 for transitioning power states of a peripheral device 102 based on a queue, according to an example.
  • the system 100 may be communicatively coupled to the peripheral device 102.
  • Examples of the system 100 may include, but are not limited to, a laptop, a notebook computer, a tablet computer, and a smartphone.
  • the peripheral device 102 may be an auxiliary data processing device that connects to and works with the system 100. Examples of the auxiliary data processing device may include, but are not limited to, a payment terminal and a barcode reader.
  • the system 100 may include a controller 104 that may be communicatively coupled to the peripheral device 102.
  • the controller 104 may be a microcontroller that may handle various tasks, including critical computations and control decisions of the system 100. Such information may be directly handled by the microcontroller and without utilizing by a main processor of the system 100.
  • the controller 104 may detect an instance of a transition of the system 100 between two different power states, such as an active state and a low-power state.
  • the active state includes a working state (SO) and the low-power state includes a modern standby state (SOix) and a selective suspend state.
  • the power state may indicate power consumption of the system 100.
  • the power consumption of the system 100 may be more as compared to the power consumption of the system 100 in the low-power state.
  • the controller 104 may receive an indication of the instance of transition of the power state of the system 100.
  • the controller may receive the indication from a BIOS (not shown) of the system 100. Any reference to BIOS may also include the Unified Extensible Firmware Interface (UEFI) specification or another specification or standard for initializing, controlling, or operating a computing system, such as the system 100.
  • UEFI Unified Extensible Firmware Interface
  • the controller 104 may populate a queue with an indicator.
  • the queue may include a list of indicators for each instance of transition of the system 100 between the active state and the low-power state.
  • the indicator may be indicative of a current power state of the system 100 after transition. In an example, the current power state may either be the active state or the low-power state.
  • the controller 104 may thereafter determine a time period between two consecutive indicators from the queue. For example, the controller 104 may determine a time period between transition of the power state of the system 100 from the active state and low-power state and vice-versa. Based on the determined time period, the controller 104 may instruct the peripheral device 102 to attain an active state or a low-power state.
  • the system 100 provides a technique for transitioning power states of a peripheral device corresponding to indicators enlisted in the queue.
  • the peripheral device is instructed to transition its own power state in accordance with a power state transition of system 100, as determined by the controller 104.
  • the queue may prevent any unintentional power state transitions at the system 100 to cause power state change at the peripheral device 102, thereby extending battery life of the system 100 and the peripheral device 102.
  • FIG. 2 illustrates a system 200 for transitioning power states of a peripheral device 202 based on a queue, according to an example.
  • the system 200 may be similar to the system 100.
  • the system 200 may include a processor 204 and a controller 206.
  • the processor 204 may include microprocessors, microcomputers, microcontrollers, digital signal processors, central processing units, state machines, logic circuitries, and/or any other devices that manipulate signals and data based on computer-readable instructions.
  • functions of the various elements shown in the figures, including any functional blocks labelled as “processor(s)”, may be provided through the use of dedicated hardware as well as hardware capable of executing computer-readable instructions.
  • the controller 206 may be a microcontroller that may handle various tasks of the system 200 which are not handled by an operating system of the system 200.
  • the controller 206 may be separate from the processor 204.
  • the controller 206 may be an embedded controller.
  • the system 200 may include a memory 208.
  • the memory 208 may include any non-transitory computer-readable medium including, for example, volatile memory, such as static random-access memory (SRAM) and dynamic random-access memory (DRAM), and/or non-volatile memory, such as read-only memory (ROM), erasable programmable ROM, flash memories, hard disks, optical disks, and magnetic tapes.
  • the system 200 may also include interface(s) 210.
  • the interface(s) 210 may include a variety of interfaces, for example, interface(s) 210 for coupling the system 200 with the peripheral device 202.
  • the interface(s) 210 may include data input devices or data output devices or both.
  • the interface(s) 210 may facilitate the communication of the system 200 with various communication and electronic devices, such as the peripheral device 202.
  • the interface(s) 210 may include spring-loaded pins, such as pogo pins (not shown) for directly coupling with the peripheral device 202.
  • the interface(s) 210 may be a universal serial bus (USB) port for facilitating the peripheral device 202 for being connected with the system 200.
  • USB universal serial bus
  • a USB cable having a USB port at one end and pogo pins at another end may connect the system 200 with the peripheral device 202.
  • the peripheral device 202 may be a payment terminal for being used in a retail industry.
  • the payment terminal may capture data, such as data pertaining to a non-cash payment instrument and send the captured data to the system 200.
  • the peripheral device 202 is a barcode scanner that may scan data pertaining to an item and transmit the scanned data to the system 200 for completion of the transaction.
  • the system 200 may be compatible with modern power saving technologies, such as a selective suspend state or a modem standby state, and the peripheral device 202 may be incompatible with the modem power saving technologies.
  • a peripheral device 202 may be referred to as a legacy peripheral device.
  • the peripheral device 202 may be unable to detect when the system 200 may transition from the active state to the low-power state.
  • the active state of the system 200 may be a working state (SO) of the system 200.
  • SO working state
  • the low- power state of the system 200 may be a modem standby state of the system 200.
  • certain components of the system 200 may get disabled.
  • the low-power state is triggered when specific conditions of the system 200 are achieved. For example, when certain components of the system 200 are in low-power state, the system 200 may attain the low- power state.
  • BIOS basic input/output system
  • the BIOS 212 may detectthat the system 200 is about to enter the low-power state. Based on the detection, the BIOS 212 may send a message to the controller 206 indicating that the system 200 has transitioned to the low-power state. Any reference to BIOS may also include the Unified Extensible Firmware Interface (UEFI) specification or another specification or standard for initializing, controlling, or operating a computing system, such as the system 200.
  • UEFI Unified Extensible Firmware Interface
  • the controller 206 may generate an indicator depicting a current power state of the system 200. For example, when the system 200 transitions from the active state to the low-power state, the indicator may represent the low-power state.
  • the controller 206 may append the indicator in a queue.
  • the queue includes a sequence of indicators indicating each instance of transition of a power state of the system 200.
  • the queue may be used by the controller 206 to record an order of entry and exit of the system 200 in the low-power state.
  • data of queue may be stored in the memory 208 and is appended dynamically, by the controller 206, when the power state of the system 200 transitions.
  • Each indicator from the plurality of indicators may be associated with a set of signals for being transmitted to the peripheral device 202. The set of signals may pertain to the change in the power state of the system 200.
  • each signal from the set of signals may be associated with a time duration.
  • the indicator depicting the transition of the system 200 into the low-power state may include a first signal and a second signal.
  • the first signal may be transmitted by the controller 206 for a fixed duration, such as 500 milliseconds (ms).
  • the first signal may be an initial signal to indicate to the peripheral device 202 that the system 200 has transitioned to low-power state. Thereafter, the controller 206 may wait for another 500 ms. During the waiting period, the controller 206 may check whether the system 200 is in the low-power state or has the system 200 transitioned back to the active state.
  • the controller 206 may transmit the second signal.
  • the second signal may be a confirmatory signal that may be transmitted to the peripheral device 202 for 1000 ms, to confirm the peripheral device 202 that the system 200 has transitioned to the low-power state.
  • number of signals in the set of signals and the time duration associated with each signal may vary based on the transition in the power state of the system 200. For instance, when the system 200 transitions back to the active state, the controller 206 may transmit a single signal for 500 ms, to the peripheral device 202 to indicate the transition. Further, the number of signals and the time duration associated with each signal may vary based on a type of the peripheral device 202, that may be coupled to the system 200.
  • the controller 206 may send the set of signals to an interface controller 214.
  • the interface controller 214 may transmit the set of signals to the peripheral device 202.
  • the interface controller 214 may be outside the system 200.
  • the interface controller 214 may send an instruction to a processing unit 216 of the peripheral device 202 to transition into a low-power state corresponding to the low-power state of the system 200.
  • the set of signals may not be completely transmitted by the controller 206. For example, if the system 200 transitions back into the active state after the first signal is transmitted to the peripheral device 202, transmission of the set of signals may get interrupted. As a result, the controller 206 may not transmit the second signal (confirmatory signal) to the interface controller 214. As the entire set of signals indicating the transition into the low-power state is not transmitted, the peripheral device 202 may remain in the current power state.
  • the controller 206 may determine a time period between the indicator for transition into active state and a consecutive indicator for transition into the low-power state of the queue. The controller 206 may thereafter compare the determined time period with a pre-defined time period, such as two seconds. For example, if the determined time period is one second, the controller 206 may recognize that the transition of the system 200 in the low-power state may be unintentional. In such scenario, the controller 206 may instruct the peripheral device 202 to retain the active state. On the other hand, if the determined time period is equal to the pre-defined time period, the controller 206 may instruct the peripheral device 202 to atain a low-power state corresponding to the low-power state of the system 200.
  • a pre-defined time period such as two seconds.
  • the pre-defined time period for the system 200 to transition from the active state to the low-power state is different from the pre-defined time period for the system 200 to transition from the low-power state to the active state.
  • the time period defined for the system 200 to transition from the active state to the low-power state may be two seconds and the time period defined for the system 200 to transition from the low-power state to the active state may be 500 ms.
  • the processing unit 216 of the peripheral device 202 may send an acknowledgment message to the controller 206.
  • the controller 206 may clear the queue until the indicator corresponding to which the power state has been transitioned is at the beginning of the queue.
  • FIG. 3 illustrates method 300 for transitioning power states of a peripheral device based on a queue, according to an example.
  • the peripheral device is similar to the peripheral device 102 which may be coupled to a computing system.
  • the method 300 can be implemented by processor(s) or device(s) through any suitable hardware, a non-transitory machine-readable medium, or a combination thereof.
  • the method 300 is described in context of the computing system and the peripheral device that are similar to the aforementioned system 100 and the peripheral device 102, other suitable devices or systems may be used for execution of the method 300.
  • processes involved in the method 300 can be executed based on instructions stored in a non-transitory computer- readable medium.
  • the non-transitory computer-readable medium may include, for example, digital memories, magnetic storage media, such as a magnetic disks and magnetic tapes, hard drives, or optically readable digital data storage media.
  • a message indicative of transition of the computing system from an active state to a low-power state is received by a controller of the computing system.
  • a basic input/output system (BIOS) (not shown) of the computing system may identify that the computing system is about to transition to the low-power state. Based on the identification, the BIOS may send a message to the controller.
  • BIOS basic input/output system
  • the method 300 may include, subsequent to receiving, populating a queue with an indicator indicative of the transition into the low- power state.
  • the indicator may include a set of signals for being transmitted to a peripheral device, include a first signal and a second signal.
  • the first signal may be an initial signal to indicate to the peripheral device that the system has transitioned to the low-power state.
  • the controller may wait for a specific time period to check whether the system is in the low-power state or has transitioned back to the active state. If during the wait period, the system remains in the low-power state, the controller may transmit the second signal.
  • the second signal may be a confirmatory signal to confirm the peripheral device that the system has transitioned to the low-power state.
  • the peripheral device may be a payment terminal that may be coupled to the computing system. Further, the set of signals may vary for different peripheral devices. In an example, the queue may include a plurality of indicators whenever the computing system transitions between the active state and the low-power state. [0044] In addition, at block 306, the method 300 may include upon disruption in transmission of a signal from the set of signals, instructing the peripheral device to retain a current power state. In an example, the controller may check if the set of signals has been completely transmitted to the peripheral device. In case any signal from the set of signals is not transmitted to the peripheral device, the peripheral device may retain its current power state.
  • the present subject matter therefore facilitates in transitioning power states of a peripheral device based on a queue, thereby extending battery life of the computing system and the peripheral device.
  • the queue may also prevent any unintentional power state transitions at the computing system thereby preventing any disruptions at the peripheral device.
  • FIGS. 4A and 4B illustrate a call flow diagram 400 for transitioning power states of a peripheral device based on a queue, according to an example of the present subject matter.
  • FIG. 4A describes the call flow diagram 400 which is continued in FIG. 4B and therefore FIGS. 4A and 4B are to be considered as the same process.
  • the various arrow indicators used in the call flow diagram 400 depict the transfer of data between the various entities in the system environment 200, and between a basic input/output system (BIOS) 212, a controller 206, and a peripheral device 202.
  • BIOS. 4A and 4B are to be considered as the same process.
  • the various arrow indicators used in the call flow diagram 400 depict the transfer of data between the various entities in the system environment 200, and between a basic input/output system (BIOS) 212, a controller 206, and a peripheral device 202.
  • BIOS. 4A and 4B illustrate a call flow diagram 400 for transitioning power states of a peripheral device based on a queue,
  • the BIOS 212 may receive an indication of the system power state transition. For example, the BIOS 212 may receive an indication when the system may transition from an active state to a low-power state and vice-versa. In an example, the active state is an SO state and the low-power state is a modern standby state when certain components of the system are in low-power.
  • the BIOS 212 may transmit the indication to the controller 206, as indicated by message 404. For example, the BIOS 212 may transmit a message indicative of the transition of the computing system from the active state to the low-power state.
  • the controller 206 may populate a queue with an indicator indicative of the low-power state.
  • the indicator may be in the form of a flag to indicate a current power state of the system.
  • the queue is populated in response to detection of change in the power state of the system.
  • the queue may include multiple indicators when the system transitions between the active state and the low-power state.
  • the controller 206 may analyse each indicator in the queue and perform a function associated with the indicator. For example, the function may include discarding the indicator or performing an action corresponding to the indicator. [0049] Further, the controller 206 may transmit a first low-power state transition signal to the peripheral device 202, as depicted by message 408.
  • the controller 206 may parse through each indicator listed in the queue and when the controller 206 reaches the indicator indicative of the transition of the system to the low-power state, the first low- power state transition signal may be transmitted.
  • the first low-power state transition signal may be transmitted for a fixed time duration, such as 500 milliseconds (ms).
  • the controller 206 may wait for a pre-defined time period, such as 500 ms, as shown by message 410. During the wait period, the controller 206 may check whether the system is still in the low-power state or the system has transitioned to the active state.
  • a pre-defined time period such as 500 ms
  • the controller 206 may transmit a second low-power state transition signal to the peripheral device 202, as indicated by message 412.
  • the second low-power state transition signal may be transmitted for a fixed time duration.
  • the time duration of the second low- power state transition signal may be same as that of the first low-power state transition signal or may vary from the first low-power state transition signal.
  • the second low-power state transition signal may be transmitted for a time period of 1000 ms.
  • the time duration for transmission of the first and second low-power state transition signals and the wait period may vary based on the peripheral device.
  • the time duration may be two seconds.
  • the controller 206 may transmit a low-power state transition instruction to the peripheral device, as shown by message 414.
  • the controller 206 may instruct the peripheral device to transition to the low-power state corresponding to the low-power state of the system.
  • the controller 206 may transmit the first and second low- power state transition signals to an interface controller (not shown), which may in turn transmit the signals to a processing unit (not shown) of the peripheral device 202.
  • the controller 206 may not instruct the peripheral device to transition to the low-power state.
  • the disruption may be caused if the system transitions to the active state.
  • the second low-power state transition signal may not be sent by the controller 206.
  • the peripheral device 202 may send an acknowledgement message to the controller 206 to indicate that the peripheral device 202 has switched to the low-power state, as indicated by message 416.
  • the controller 206 may clear the queue until the indicator corresponding to the low-power state is at a beginning of the queue. This may facilitate in reducing the time in transitioning the power states of the peripheral device 202.
  • the BIOS 212 may receive an indication that the system has transitioned to the active state.
  • the BIOS 212 may transmit the indication to the controller 206, as depicted by message 422.
  • the BIOS 212 may transmit a message indicative of the transition of the system from the low-power state to the active state.
  • the controller 206 may populate the queue with an indicator indicative of the active state of the system. Thereafter, the controller 206 may transmit an active state transition signal to the peripheral device 202, as shown by message 426.
  • the active state transition signal is transmitted for a fixed duration, for example, 500 ms. The duration of transmitting the active state transition signal may vary for different peripheral devices.
  • the controller 206 may send an active state transition instruction to the peripheral device 202, as depicted by message 428.
  • the peripheral device 202 may send an acknowledgement message, as shown by message 430, to the controller 206 to indicate that the peripheral data processing device 202 has switched to the active state.
  • FIG. 5 illustrates an example system environment 500 using a non- transitory computer-readable medium 502 for transitioning power states of a peripheral device based on a queue, according to an example.
  • the system environment 500 includes a processing resource 504 communicatively coupled to the non-transitory computer-readable medium 502 through a communication link 506.
  • the processing resource 504 may be a processor of a system, such as the system communicating with the peripheral device, for fetching and executing computer-readable instructions from the non-transitory computer-readable medium 502.
  • the non-transitory computer-readable medium 502 may be, for example, an internal memory device or an external memory device.
  • the communication link 506 may be a direct communication link, such as one formed through a memory read/write interface.
  • the communication link 506 may be an indirect communication link, such as one formed through a network interface.
  • the processing resource 504 may access the non-transitory computer-readable medium 502 through a network (not shown).
  • the non-transitory computer-readable medium 502 includes a set of computer-readable and executable instructions for transition! ng power states of a peripheral device based on a queue.
  • the set of computer-readable instructions may include instructions as explained in conjunction with FIGS. 1 to 4B.
  • the set of computer-readable instructions referred to as instructions hereinafter, may be accessed by the processing resource 504 through the communication link 506 and subsequently executed to perform acts for transitioning power states of a peripheral device based on a queue.
  • the non-transitory computer- readable medium may include instructions 508 to in response to detection of an instance of the system being transitioned from an active state to a low- power state, generate an indicator, in an example, the indicator may be indicative of the transition of a power state of the system.
  • the system may include a computing system, such as a tablet computer.
  • the peripheral device includes a payment terminal, such as a credit card terminal, that may be coupled to the computing system.
  • the non-transitory computer-readable medium 502 may also include instructions 510 to receive, dynamically append a queue with the indicator indicative of the low-power state.
  • the queue may include a plurality of indicators listed in a sequential order based on the change in the power state of the system.
  • the non-transitory computer-readable medium 502 may include instructions 512 to determine a time period between the indicator and a subsequent indicator from the queue.
  • the subsequent indicator is indicative of the transition of the system to the active state.
  • the time period is determined between transition in the power state of the system from active state to low-power state and vice-versa.
  • the non-transitory computer-readable medium 502 may include instructions 514 to upon determination that the time period between the indicator and the subsequent indicator is above a threshold, instruct the peripheral device to attain a low-power state. For example, upon determining that the tablet computer has retained the low-power state for a specific period of time, say two seconds, the controller may send an instruction to the payment terminal to transition to a low-power state. This may prevent any unintentional transitions in the power state of the payment terminal.
  • the threshold value associated with the active state is different from the threshold value associated with the low-power state.
  • the threshold value for the peripheral system to transition into low-power state is two seconds and the threshold value for the peripheral system to transition into active state is 500 milliseconds.
  • the non-transitory computer-readable medium 502 may include instructions 516 to upon detection that the peripheral device has attained the low-power state, clear the queue for indicators previous to the indicator corresponding to the low-power state. For example, the controller may delete all previous indicators from the queue that have been analysed and executed. This may reduce the time spent in analysing the plurality of indicators from the queue, every time a new indicator is appended in the queue.

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  • Power Sources (AREA)

Abstract

Examples of systems and methods for transitioning power states of a peripheral device based on a queue are described herein. In an example, upon detection that the system has transitioned between an active state and a low-power state, a queue is populated with an indicator. The indicator may represent a current power state of the system. The current power state being one of the active state and the low-power state. Further, a time period between two consecutive indicators of the queue. Based on the determined time period, a peripheral device is instructed to either attain an active state or a low-power state.

Description

POWER STATE TRANSITIONS
BACKGROUND
[0001] Computing systems, such as a tablet computer, a notebook computer, a smartphone, etc., may be coupled to peripheral devices, such as an electronic payment terminal and a barcode reader, to electronically capture data and process data. The computing system and the peripheral devices may switch to different power states, such as a low-power state, to save battery consumption.
BRIEF DESCRIPTION OF FIGURES
[0002] The detailed description is provided with reference to the accompanying figures, wherein:
[0003] FIG. 1 illustrates a system for transitioning power states of a peripheral device based on a queue, according to an example;
[0004] FIG. 2 illustrates a system for transitioning power states of a peripheral device based on a queue, according to an example;
[0005] FIG. 3 illustrates a method for transitioning power states of a peripheral device based on a queue, according to an example; [0006] FIGS. 4A and 4B illustrate a call flow diagram for transitioning power states of a peripheral device based on a queue, according to an example; and
[0007] FIG. 5 illustrates a non-transitory computer-readable medium for transitioning power states of a peripheral device based on a queue, according to an example. DETAILED DESCRIPTION
[0008] In the retail industry, computing systems may be coupled to peripheral devices, such as a printer, a payment terminal and a barcode reader. Based on such peripheral devices, a user may perform multiple operations. For example, a peripheral device may capture data pertaining to an operation from the user and transmit the captured data to a coupled computing system. As the computing system is coupled to the peripheral device, any transition in a power state of the computing system may also cause the peripheral device to transition into a power state corresponding to that of the computing system. For example, the computing system may switch between an active state (SO/working state) and one of the sleep states (S1 to S4). Accordingly, the peripheral device may transition into corresponding power states. In the active state, all components of the computing system are enabled to operate. In the sleep states, a display and a hard disk are turned OFF, but the memory chips are continuously refreshed to retain their content. Also, a central processing unit (CPU) of the computing system attains a lowest power state. The computing system is immediately restored for use when a user touches a key or uses the mouse.
[0009] With the advent of technology, computing systems are provided with adaptive power saving technologies, such as low-power state capabilities.
Examples of the low-power states include a modern standby state and a selective suspend state. In the modern standby state, certain background activities, such as network connectivity, and wake scenarios are kept active in the computing system while specific hardware and software features of the computing system may be switched OFF. For example, the modern standby state may allow certain value-added software activities to run periodically. An example of the wake scenario includes an active state of a peripheral device. If the peripheral device is in the active state, the computing system coupled to the peripheral device will remain awake. [0010] In case the peripheral device does not support modern power saving technologies, i.e., is a legacy peripheral device, the peripheral device may be unable to detect the low-power state of the computing system. As a result, the legacy peripheral device may not transition to a low-power state corresponding to the low-power state of the computing system. In some examples, the legacy peripheral device may be operational and may not transition to the low-power state. As a result, activity of the legacy peripheral device may prevent the computing system from entering the low-power state. Thus, the legacy peripheral device may increase power consumption of the computing system, even when there is a low level of activity at the computing system.
[0011] To facilitate transition of power states between the computing system and the legacy peripheral device in an efficient manner, the legacy peripheral device may be notified about the transition of the computing system through advanced configuration and power interface (ACPI) messages. The ACPI messages, generated by a basic input/output system (BIOS) of the computing system, may communicate a current power state of the computing system to the legacy peripheral device, based on which the legacy peripheral device may make corresponding transitions. The ACPI messages are transmitted to the legacy peripheral device every time the computing system may transition a power state, even in cases where the transition is unintentional.
[0012] For example, if a user of the computing system mistakenly puts the computing system in the low-power state, the BIOS may transmit ACPI messages to the legacy peripheral device. Upon realizing the mistake, the user may quickly activate the computing system, which may result in another ACPI message being transmitted to the legacy peripheral device. In another example, frequent power state transitioning of the computing system may be caused by a malicious activity or due to an interference signal at an end of the computing system. Such frequent transitioning of the computing system between the active state and the low-power state may cause the legacy peripheral device to transition between the active state and a corresponding low-power state in an undesirable manner. Such undesired power state transitions may pose a threat on integrity of data captured by the legacy peripheral device and may cause inconvenience to the user.
[0013] The present subject matter discloses example approaches for transitioning power states of a peripheral device based on a queue. The queue may include a plurality of indicators that may be indicative of different instances of transitioning of a power state of the computing system. This may facilitate in reducing the power consumption of the computing system in the low-power state.
[0014] In an example, upon transitioning into an active state or a low-power state, the computing system may populate the queue with an indicator. The indicator may represent a current power state of the computing system, after the transition. The computing system may thereafter parse through the queue of indicators to determine a time period between two consecutive indicators. For example, each indicator may be associated with a set of signals. The set of signals are transmitted to a peripheral device, such as a payment terminal, as soon as the indicator is populated in the queue. The time period between two consecutive indicators may depict whether or not the set of signals were transmitted successfully to the peripheral device.
[0015] Thus, the computing device may, based on the determined time period, instruct the peripheral device to switch to a power state corresponding to that of the computing system or to remain in a current power state. The successful transmission of the set of signals may indicate that the transition in the power state of the computing system is not undesired. The peripheral device is therefore instructed to transition to a low-power state. [0016] Accordingly, the present subject mater facilitates aligning the transition in power states of the computing system with that of the peripheral device. As a result, the present subject matter reduces power consumption of the computing system and the peripheral device. Further, as the peripheral device is instructed to transition the power state upon confirming the current power state of the computing system, the present subject matter prevents undesired triggering of transition of the power states of the peripheral device due to a potential malicious activity or due to an interference signal at the computing system.
[0017] The present subject matter is further described with reference to the accompanying figures. Wherever possible, the same reference numerals are used in the figures and the following description to refer to the same or similar parts. It should be noted that the description and figures merely illustrate principles of the present subject matter. It is thus understood that various arrangements may be devised that, although not explicitly described or shown herein, encompass the principles of the present subject matter. Moreover, ail statements herein reciting principles, aspects, and examples of the present subject matter, as well as specific examples thereof, are intended to encompass equivalents thereof.
[0018] Examples of systems and methods are explained in detail with respect to FIGS. 1-5. While aspects of described systems and methods can be implemented in any number of different electronic devices, environments, and/or implementations, the examples are described in the context of the following system(s). It is to be noted that drawings of the present subject matter shown here are for illustrative purposes and are not drawn to scale.
[0019] FIG.1 illustrates a system 100 for transitioning power states of a peripheral device 102 based on a queue, according to an example. The system 100 may be communicatively coupled to the peripheral device 102. Examples of the system 100 may include, but are not limited to, a laptop, a notebook computer, a tablet computer, and a smartphone. The peripheral device 102 may be an auxiliary data processing device that connects to and works with the system 100. Examples of the auxiliary data processing device may include, but are not limited to, a payment terminal and a barcode reader.
[0020] The system 100 may include a controller 104 that may be communicatively coupled to the peripheral device 102. The controller 104 may be a microcontroller that may handle various tasks, including critical computations and control decisions of the system 100. Such information may be directly handled by the microcontroller and without utilizing by a main processor of the system 100. The controller 104 may detect an instance of a transition of the system 100 between two different power states, such as an active state and a low-power state. For example, the active state includes a working state (SO) and the low-power state includes a modern standby state (SOix) and a selective suspend state. The power state may indicate power consumption of the system 100. For example, in the active state the power consumption of the system 100 may be more as compared to the power consumption of the system 100 in the low-power state.
[0021] In an example implementation, the controller 104 may receive an indication of the instance of transition of the power state of the system 100. For example, the controller may receive the indication from a BIOS (not shown) of the system 100. Any reference to BIOS may also include the Unified Extensible Firmware Interface (UEFI) specification or another specification or standard for initializing, controlling, or operating a computing system, such as the system 100. In response to detection of the transition in the power state of the system 100, the controller 104 may populate a queue with an indicator. The queue may include a list of indicators for each instance of transition of the system 100 between the active state and the low-power state. Further, the indicator may be indicative of a current power state of the system 100 after transition. In an example, the current power state may either be the active state or the low-power state.
[0022] The controller 104 may thereafter determine a time period between two consecutive indicators from the queue. For example, the controller 104 may determine a time period between transition of the power state of the system 100 from the active state and low-power state and vice-versa. Based on the determined time period, the controller 104 may instruct the peripheral device 102 to attain an active state or a low-power state.
[0023] Accordingly, the system 100 provides a technique for transitioning power states of a peripheral device corresponding to indicators enlisted in the queue. As a result, the peripheral device is instructed to transition its own power state in accordance with a power state transition of system 100, as determined by the controller 104. Further, the queue may prevent any unintentional power state transitions at the system 100 to cause power state change at the peripheral device 102, thereby extending battery life of the system 100 and the peripheral device 102.
[0024] FIG. 2 illustrates a system 200 for transitioning power states of a peripheral device 202 based on a queue, according to an example. The system 200 may be similar to the system 100. The system 200 may include a processor 204 and a controller 206. The processor 204 may include microprocessors, microcomputers, microcontrollers, digital signal processors, central processing units, state machines, logic circuitries, and/or any other devices that manipulate signals and data based on computer-readable instructions. Further, functions of the various elements shown in the figures, including any functional blocks labelled as “processor(s)”, may be provided through the use of dedicated hardware as well as hardware capable of executing computer-readable instructions.
[0025] The controller 206 may be a microcontroller that may handle various tasks of the system 200 which are not handled by an operating system of the system 200. The controller 206 may be separate from the processor 204. For example, the controller 206 may be an embedded controller. Further, the system 200 may include a memory 208. The memory 208 may include any non-transitory computer-readable medium including, for example, volatile memory, such as static random-access memory (SRAM) and dynamic random-access memory (DRAM), and/or non-volatile memory, such as read-only memory (ROM), erasable programmable ROM, flash memories, hard disks, optical disks, and magnetic tapes.
[0026] In an example, the system 200 may also include interface(s) 210. The interface(s) 210 may include a variety of interfaces, for example, interface(s) 210 for coupling the system 200 with the peripheral device 202. The interface(s) 210 may include data input devices or data output devices or both. The interface(s) 210 may facilitate the communication of the system 200 with various communication and electronic devices, such as the peripheral device 202.
[0027] In an example, the interface(s) 210 may include spring-loaded pins, such as pogo pins (not shown) for directly coupling with the peripheral device 202. In another example, the interface(s) 210 may be a universal serial bus (USB) port for facilitating the peripheral device 202 for being connected with the system 200. For example, a USB cable having a USB port at one end and pogo pins at another end may connect the system 200 with the peripheral device 202.
[0028] In an example, the peripheral device 202 may be a payment terminal for being used in a retail industry. The payment terminal may capture data, such as data pertaining to a non-cash payment instrument and send the captured data to the system 200. In another example, the peripheral device 202 is a barcode scanner that may scan data pertaining to an item and transmit the scanned data to the system 200 for completion of the transaction.
[0029] In an example implementation, the system 200 may be compatible with modern power saving technologies, such as a selective suspend state or a modem standby state, and the peripheral device 202 may be incompatible with the modem power saving technologies. Such a peripheral device 202 may be referred to as a legacy peripheral device. The peripheral device 202 may be unable to detect when the system 200 may transition from the active state to the low-power state.
[0030] The active state of the system 200 may be a working state (SO) of the system 200. In the SO state, the system 200 is fully useable. The low- power state of the system 200 may be a modem standby state of the system 200. In the low-power state, certain components of the system 200 may get disabled. The low-power state is triggered when specific conditions of the system 200 are achieved. For example, when certain components of the system 200 are in low-power state, the system 200 may attain the low- power state.
[0031] In an example, when certain components of the system 200 are in the low-power state, a basic input/output system (BIOS) 212 may detectthat the system 200 is about to enter the low-power state. Based on the detection, the BIOS 212 may send a message to the controller 206 indicating that the system 200 has transitioned to the low-power state. Any reference to BIOS may also include the Unified Extensible Firmware Interface (UEFI) specification or another specification or standard for initializing, controlling, or operating a computing system, such as the system 200. In response to the message, the controller 206 may generate an indicator depicting a current power state of the system 200. For example, when the system 200 transitions from the active state to the low-power state, the indicator may represent the low-power state.
[0032] The controller 206 may append the indicator in a queue. The queue includes a sequence of indicators indicating each instance of transition of a power state of the system 200. Thus, the queue may be used by the controller 206 to record an order of entry and exit of the system 200 in the low-power state. In an example, data of queue may be stored in the memory 208 and is appended dynamically, by the controller 206, when the power state of the system 200 transitions. Each indicator from the plurality of indicators may be associated with a set of signals for being transmitted to the peripheral device 202. The set of signals may pertain to the change in the power state of the system 200.
[0033] In an example, each signal from the set of signals may be associated with a time duration. For example, the indicator depicting the transition of the system 200 into the low-power state may include a first signal and a second signal. The first signal may be transmitted by the controller 206 for a fixed duration, such as 500 milliseconds (ms). The first signal may be an initial signal to indicate to the peripheral device 202 that the system 200 has transitioned to low-power state. Thereafter, the controller 206 may wait for another 500 ms. During the waiting period, the controller 206 may check whether the system 200 is in the low-power state or has the system 200 transitioned back to the active state. If during the wait period, the system 200 remains in the low-power state, the controller 206 may transmit the second signal. The second signal may be a confirmatory signal that may be transmitted to the peripheral device 202 for 1000 ms, to confirm the peripheral device 202 that the system 200 has transitioned to the low-power state.
[0034] In an example, number of signals in the set of signals and the time duration associated with each signal may vary based on the transition in the power state of the system 200. For instance, when the system 200 transitions back to the active state, the controller 206 may transmit a single signal for 500 ms, to the peripheral device 202 to indicate the transition. Further, the number of signals and the time duration associated with each signal may vary based on a type of the peripheral device 202, that may be coupled to the system 200.
[0035] In an example implementation, when the peripheral device 202 is directly coupled to the system 200 through spring-loaded pogo pins, the controller 206 may send the set of signals to an interface controller 214. The interface controller 214 may transmit the set of signals to the peripheral device 202. In case the peripheral device 202 is coupled to the system 200 through a USB cable (not shown), the interface controller 214 may be outside the system 200. In both the scenarios, when the set of signals have been successfully transmitted by the interface controller 214, the interface controller 214 may send an instruction to a processing unit 216 of the peripheral device 202 to transition into a low-power state corresponding to the low-power state of the system 200.
[0036] In an example implementation, if the system 200 immediately exits the low-power state, the set of signals may not be completely transmitted by the controller 206. For example, if the system 200 transitions back into the active state after the first signal is transmitted to the peripheral device 202, transmission of the set of signals may get interrupted. As a result, the controller 206 may not transmit the second signal (confirmatory signal) to the interface controller 214. As the entire set of signals indicating the transition into the low-power state is not transmitted, the peripheral device 202 may remain in the current power state.
[0037] Based on the above, successful transmission of the set of signals may be detected based on the time between two consecutive indicators in the queue. In an example, the controller 206 may determine a time period between the indicator for transition into active state and a consecutive indicator for transition into the low-power state of the queue. The controller 206 may thereafter compare the determined time period with a pre-defined time period, such as two seconds. For example, if the determined time period is one second, the controller 206 may recognize that the transition of the system 200 in the low-power state may be unintentional. In such scenario, the controller 206 may instruct the peripheral device 202 to retain the active state. On the other hand, if the determined time period is equal to the pre-defined time period, the controller 206 may instruct the peripheral device 202 to atain a low-power state corresponding to the low-power state of the system 200.
[0038] In an example, the pre-defined time period for the system 200 to transition from the active state to the low-power state is different from the pre-defined time period for the system 200 to transition from the low-power state to the active state. For example, the time period defined for the system 200 to transition from the active state to the low-power state may be two seconds and the time period defined for the system 200 to transition from the low-power state to the active state may be 500 ms. [0039] Upon transition of the power state by the peripheral device 202, the processing unit 216 of the peripheral device 202 may send an acknowledgment message to the controller 206. In response to the acknowledgement message, the controller 206 may clear the queue until the indicator corresponding to which the power state has been transitioned is at the beginning of the queue. For example, when the system 200 has transitioned into the low-power state, the controller 206 may edit the queue to delete all indicators previous to the indicator corresponding to the transition in the low-power state. This may facilitate in identification of the indicators that have not yet been parsed by the controller 206. [0040] FIG. 3 illustrates method 300 for transitioning power states of a peripheral device based on a queue, according to an example. The peripheral device is similar to the peripheral device 102 which may be coupled to a computing system. The method 300 can be implemented by processor(s) or device(s) through any suitable hardware, a non-transitory machine-readable medium, or a combination thereof. Further, although the method 300 is described in context of the computing system and the peripheral device that are similar to the aforementioned system 100 and the peripheral device 102, other suitable devices or systems may be used for execution of the method 300. [0041] In some examples, processes involved in the method 300 can be executed based on instructions stored in a non-transitory computer- readable medium. The non-transitory computer-readable medium may include, for example, digital memories, magnetic storage media, such as a magnetic disks and magnetic tapes, hard drives, or optically readable digital data storage media.
[0042] Referring to FIG. 3, at block 302, a message indicative of transition of the computing system from an active state to a low-power state is received by a controller of the computing system. In an example, a basic input/output system (BIOS) (not shown) of the computing system may identify that the computing system is about to transition to the low-power state. Based on the identification, the BIOS may send a message to the controller.
[0043] At block 304, the method 300 may include, subsequent to receiving, populating a queue with an indicator indicative of the transition into the low- power state. In an example, the indicator may include a set of signals for being transmitted to a peripheral device, include a first signal and a second signal. The first signal may be an initial signal to indicate to the peripheral device that the system has transitioned to the low-power state. Thereafter, the controller may wait for a specific time period to check whether the system is in the low-power state or has transitioned back to the active state. If during the wait period, the system remains in the low-power state, the controller may transmit the second signal. The second signal may be a confirmatory signal to confirm the peripheral device that the system has transitioned to the low-power state. The peripheral device may be a payment terminal that may be coupled to the computing system. Further, the set of signals may vary for different peripheral devices. In an example, the queue may include a plurality of indicators whenever the computing system transitions between the active state and the low-power state. [0044] In addition, at block 306, the method 300 may include upon disruption in transmission of a signal from the set of signals, instructing the peripheral device to retain a current power state. In an example, the controller may check if the set of signals has been completely transmitted to the peripheral device. In case any signal from the set of signals is not transmitted to the peripheral device, the peripheral device may retain its current power state.
[0045] The present subject matter therefore facilitates in transitioning power states of a peripheral device based on a queue, thereby extending battery life of the computing system and the peripheral device. The queue may also prevent any unintentional power state transitions at the computing system thereby preventing any disruptions at the peripheral device.
[0046] FIGS. 4A and 4B illustrate a call flow diagram 400 for transitioning power states of a peripheral device based on a queue, according to an example of the present subject matter. FIG. 4A describes the call flow diagram 400 which is continued in FIG. 4B and therefore FIGS. 4A and 4B are to be considered as the same process. The various arrow indicators used in the call flow diagram 400 depict the transfer of data between the various entities in the system environment 200, and between a basic input/output system (BIOS) 212, a controller 206, and a peripheral device 202. The order in which the call flow diagram 400 is described is not intended to be construed as a limitation, and any number of the described elements may be combined in any order to implement the call flow diagram 400, or an alternative method. Further, certain trivial elements have been omitted in the sequence diagrams, for the sake of brevity and clarity.
[0047] Referring to FIG. 4A, in an example implementation, at block 402, the BIOS 212 may receive an indication of the system power state transition. For example, the BIOS 212 may receive an indication when the system may transition from an active state to a low-power state and vice-versa. In an example, the active state is an SO state and the low-power state is a modern standby state when certain components of the system are in low-power. The BIOS 212 may transmit the indication to the controller 206, as indicated by message 404. For example, the BIOS 212 may transmit a message indicative of the transition of the computing system from the active state to the low-power state. [0048] At block 406, the controller 206 may populate a queue with an indicator indicative of the low-power state. The indicator may be in the form of a flag to indicate a current power state of the system. The queue is populated in response to detection of change in the power state of the system. In an example, the queue may include multiple indicators when the system transitions between the active state and the low-power state. The controller 206 may analyse each indicator in the queue and perform a function associated with the indicator. For example, the function may include discarding the indicator or performing an action corresponding to the indicator. [0049] Further, the controller 206 may transmit a first low-power state transition signal to the peripheral device 202, as depicted by message 408. As mentioned earlier, the controller 206 may parse through each indicator listed in the queue and when the controller 206 reaches the indicator indicative of the transition of the system to the low-power state, the first low- power state transition signal may be transmitted. In an example, the first low-power state transition signal may be transmitted for a fixed time duration, such as 500 milliseconds (ms).
[0050] After transmitting the first low-power state transition signal, the controller 206 may wait for a pre-defined time period, such as 500 ms, as shown by message 410. During the wait period, the controller 206 may check whether the system is still in the low-power state or the system has transitioned to the active state.
[0051] Thereafter, the controller 206 may transmit a second low-power state transition signal to the peripheral device 202, as indicated by message 412. In an example, the second low-power state transition signal may be transmitted for a fixed time duration. The time duration of the second low- power state transition signal may be same as that of the first low-power state transition signal or may vary from the first low-power state transition signal. In an example, the second low-power state transition signal may be transmitted for a time period of 1000 ms.
[0052] In an example implementation, the time duration for transmission of the first and second low-power state transition signals and the wait period may vary based on the peripheral device. For example, in case of the peripheral device being a payment terminal, the time duration may be two seconds.
[0053] Upon successful transmission of the second low-power state transition signal, the controller 206 may transmit a low-power state transition instruction to the peripheral device, as shown by message 414. For example, the controller 206 may instruct the peripheral device to transition to the low-power state corresponding to the low-power state of the system. In an example, the controller 206 may transmit the first and second low- power state transition signals to an interface controller (not shown), which may in turn transmit the signals to a processing unit (not shown) of the peripheral device 202.
[0054] In an example, if transmission of the second low-power state transition signal is disrupted, the controller 206 may not instruct the peripheral device to transition to the low-power state. For example, the disruption may be caused if the system transitions to the active state. In such scenario, the second low-power state transition signal may not be sent by the controller 206.
[0055] The peripheral device 202 may send an acknowledgement message to the controller 206 to indicate that the peripheral device 202 has switched to the low-power state, as indicated by message 416. [0056] In addition, at block 418, in response to the acknowledgement, the controller 206 may clear the queue until the indicator corresponding to the low-power state is at a beginning of the queue. This may facilitate in reducing the time in transitioning the power states of the peripheral device 202.
[0057] Referring now to FIG. 4B, at block 420, the BIOS 212 may receive an indication that the system has transitioned to the active state. The BIOS 212 may transmit the indication to the controller 206, as depicted by message 422. For example, the BIOS 212 may transmit a message indicative of the transition of the system from the low-power state to the active state.
[0058] At block 424, the controller 206 may populate the queue with an indicator indicative of the active state of the system. Thereafter, the controller 206 may transmit an active state transition signal to the peripheral device 202, as shown by message 426. In an example, the active state transition signal is transmitted for a fixed duration, for example, 500 ms. The duration of transmitting the active state transition signal may vary for different peripheral devices.
[0059] Upon transmission of the active state transition signal, the controller 206 may send an active state transition instruction to the peripheral device 202, as depicted by message 428. Upon transitioning to the active state, the peripheral device 202 may send an acknowledgement message, as shown by message 430, to the controller 206 to indicate that the peripheral data processing device 202 has switched to the active state.
[0060] As mentioned earlier, with respect to the transition to the low-power state, at block 432, in response to the acknowledgement, the controller 206 may clear the queue until the indicator corresponding to the active state is at a beginning of the queue. [0061] FIG. 5 illustrates an example system environment 500 using a non- transitory computer-readable medium 502 for transitioning power states of a peripheral device based on a queue, according to an example. The system environment 500 includes a processing resource 504 communicatively coupled to the non-transitory computer-readable medium 502 through a communication link 506. For example, the processing resource 504 may be a processor of a system, such as the system communicating with the peripheral device, for fetching and executing computer-readable instructions from the non-transitory computer-readable medium 502.
[0062] The non-transitory computer-readable medium 502 may be, for example, an internal memory device or an external memory device. In one example, the communication link 506 may be a direct communication link, such as one formed through a memory read/write interface. In another example, the communication link 506 may be an indirect communication link, such as one formed through a network interface. In such a case, the processing resource 504 may access the non-transitory computer-readable medium 502 through a network (not shown).
[0063] In an example, the non-transitory computer-readable medium 502 includes a set of computer-readable and executable instructions for transition! ng power states of a peripheral device based on a queue. The set of computer-readable instructions may include instructions as explained in conjunction with FIGS. 1 to 4B. The set of computer-readable instructions, referred to as instructions hereinafter, may be accessed by the processing resource 504 through the communication link 506 and subsequently executed to perform acts for transitioning power states of a peripheral device based on a queue.
[0064] Referring to FIG. 5, in an example, the non-transitory computer- readable medium may include instructions 508 to in response to detection of an instance of the system being transitioned from an active state to a low- power state, generate an indicator, in an example, the indicator may be indicative of the transition of a power state of the system. In an example, the system may include a computing system, such as a tablet computer. In an example, the peripheral device includes a payment terminal, such as a credit card terminal, that may be coupled to the computing system.
[0065] The non-transitory computer-readable medium 502 may also include instructions 510 to receive, dynamically append a queue with the indicator indicative of the low-power state. In an example, the queue may include a plurality of indicators listed in a sequential order based on the change in the power state of the system.
[0066] The non-transitory computer-readable medium 502 may include instructions 512 to determine a time period between the indicator and a subsequent indicator from the queue. In an example, the subsequent indicator is indicative of the transition of the system to the active state. For example, the time period is determined between transition in the power state of the system from active state to low-power state and vice-versa.
[0067] Further, the non-transitory computer-readable medium 502 may include instructions 514 to upon determination that the time period between the indicator and the subsequent indicator is above a threshold, instruct the peripheral device to attain a low-power state. For example, upon determining that the tablet computer has retained the low-power state for a specific period of time, say two seconds, the controller may send an instruction to the payment terminal to transition to a low-power state. This may prevent any unintentional transitions in the power state of the payment terminal. In an example, the threshold value associated with the active state is different from the threshold value associated with the low-power state. In an example, the threshold value for the peripheral system to transition into low-power state is two seconds and the threshold value for the peripheral system to transition into active state is 500 milliseconds. [0068] In addition, the non-transitory computer-readable medium 502 may include instructions 516 to upon detection that the peripheral device has attained the low-power state, clear the queue for indicators previous to the indicator corresponding to the low-power state. For example, the controller may delete all previous indicators from the queue that have been analysed and executed. This may reduce the time spent in analysing the plurality of indicators from the queue, every time a new indicator is appended in the queue.
[0069] Although aspects for the present disclosure have been described in a language specific to structural features and/or methods, it is to be understood that the appended claims are not limited to the specific features or methods described herein. Rather, the specific features and methods are disclosed as examples of the present disclosure.

Claims

We claim:
1 . A system comprising: a controller to: in response to detection of an instance of the system being transitioned between an active state and a low-power state, populate a queue with an indicator indicative of a current power state of the system, the current power state being one of the active state and the low-power state; determine a time period between two consecutive indicators of the queue; and based on the determined time period, instruct a peripheral device to attain one of an active state and a low-power state.
2. The system as claimed in claim 1 , wherein to instruct the peripheral device, the controller is to compare the determined time period with a predefined time period.
3. The system as claimed in claim 2, wherein in response to the comparison, if the determined time period is less than the pre-defined time period, the controller is to instruct the peripheral device to retain the active state.
4. The system as claimed in claim 2, wherein if the determined time period is equal to the pre-defined time period, the controller is to instruct the peripheral device to attain the low-power state.
5. The system as claimed in claim 2, wherein the pre-defined time period associated with the low-power state is different from the pre-defined time period associated with the active state.
6. The system as claimed in claim 1 , wherein the peripheral device is a payment terminal.
7. A method comprising: receiving, by a controller of a computing system, a message indicative of transition of the computing system from an active state to a low-power state; subsequent to receiving, populating a queue with an indicator indicative of the transition into the low-power state, wherein the indicator comprises a set of signals for being transmitted to a peripheral device: and upon disruption in transmission of a signal of the set of signals, instructing the peripheral device to retain a current power state.
8. The method as claimed in claim 7, wherein the method comprises upon successful transmission of the set of signals, instructing the peripheral device to attain a corresponding low-power state.
9. The method as claimed in claim 8, wherein the set of signals includes a first signal and a second signal.
10. The method as claimed in claim 8, wherein the method comprises receiving an acknowledgement from the peripheral device when the peripheral device has attained the corresponding low-power state.
11. The method as claimed in claim 10, wherein the method comprises, upon receiving the acknowledgement, clearing the queue until the indicator corresponding to the low-power state is at a beginning of the queue.
12. The method as claimed in claim 7, wherein the active state of the computing system is a working state (SO).
13. A non-transitory computer-readable medium comprising computer- readable instructions, which, when executed by a controller of a system, cause the controller to: in response to detection of an instance of the system being transitioned from an active state to a low-power state, generate an indicator; dynamically append a queue with the indicator indicative of the low- power state; determine a time period between the indicator and a subsequent indicator from the queue, wherein the subsequent indicator is indicative of the transition of the system to the active state; upon determination that the time period between the indicator and the subsequent indicator is above a threshold, instruct a peripheral device to attain a low-power state; and upon detection that the peripheral device has attained the low-power state, clear the queue for indicators previous to the indicator corresponding to the low-power state.
14. The non-transitory computer-readable medium as claimed in claim 13, wherein the threshold value associated with the active state is different from the threshold value associated with the low-power state.
15. The non-transitory computer-readable medium as claimed in claim 13, wherein the peripheral device is a payment terminal and the system is a computing system coupled to the payment terminal.
PCT/US2020/055464 2020-10-14 2020-10-14 Power state transitions WO2022081145A1 (en)

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Citations (4)

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