WO2022080124A1 - Imaging device and manufacturing method for imaging device - Google Patents

Imaging device and manufacturing method for imaging device Download PDF

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Publication number
WO2022080124A1
WO2022080124A1 PCT/JP2021/035313 JP2021035313W WO2022080124A1 WO 2022080124 A1 WO2022080124 A1 WO 2022080124A1 JP 2021035313 W JP2021035313 W JP 2021035313W WO 2022080124 A1 WO2022080124 A1 WO 2022080124A1
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WIPO (PCT)
Prior art keywords
charge
image pickup
unit
substrate
pickup apparatus
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PCT/JP2021/035313
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French (fr)
Japanese (ja)
Inventor
克規 平松
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ソニーセミコンダクタソリューションズ株式会社
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Publication of WO2022080124A1 publication Critical patent/WO2022080124A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors

Definitions

  • the present disclosure relates to an image pickup apparatus that performs imaging by performing photoelectric conversion and a manufacturing method thereof.
  • An image pickup apparatus as an embodiment of the present disclosure includes a first surface and a second surface located opposite to the first surface in the thickness direction, and the first surface and the second surface.
  • a semiconductor substrate having a first region portion and a second region portion adjacent to each other along the same direction extends along a thickness direction from a first surface so as to separate the first region portion and the second region portion.
  • a separation light-shielding wall and a first photoelectric conversion unit provided in the first region portion and capable of generating a first charge by detecting first light incident from the first surface and performing photoelectric conversion.
  • a second photoelectric conversion unit provided in the second region portion and capable of generating a second charge by detecting the second light incident from the first surface and performing photoelectric conversion, and a separation light-shielding wall. It has a charge path portion provided between the surface and the second surface and provided so that the first charge and the second charge can pass through.
  • FIG. 1 It is a block diagram which shows the structural example of the image pickup apparatus which concerns on one Embodiment of this disclosure. It is sectional drawing which shows typically the sectional structure of one unit pixel in the image pickup apparatus shown in FIG. 1. It is a top view which schematically shows the plane composition in the semiconductor substrate among the unit pixels shown in FIG. It is a top view which schematically shows the plane composition in the wiring layer among the unit pixels shown in FIG. It is a circuit diagram which shows the circuit structure in the unit pixel shown in FIG. It is a characteristic diagram which shows the relationship between the output in the unit pixel shown in FIG. 2 and the incident angle of incident light. It is sectional drawing which shows typically one step of the manufacturing method of the image pickup apparatus shown in FIG. FIG.
  • FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7A in the manufacturing method of the image pickup apparatus shown in FIG. 1.
  • FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7B in the manufacturing method of the image pickup apparatus shown in FIG. 1.
  • FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7C in the manufacturing method of the image pickup apparatus shown in FIG. 1.
  • FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7D in the manufacturing method of the image pickup apparatus shown in FIG. 1.
  • FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7E in the manufacturing method of the image pickup apparatus shown in FIG. 1.
  • FIG. 1 is a block diagram showing a configuration example of a function of the solid-state image sensor 101 according to an embodiment of the present technology.
  • the solid-state image sensor 101 is, for example, a back-illuminated image sensor using CMOS (Complementary Metal Oxide Semiconductor).
  • CMOS Complementary Metal Oxide Semiconductor
  • the solid-state image sensor 101 receives light from a subject, performs photoelectric conversion, and generates an image signal to capture an image.
  • the back-illuminated image sensor is a wiring such as a light receiving surface on which light from a subject is incident and a transistor or the like that drives each pixel by a photoelectric conversion unit such as a photodiode that receives light from the subject and converts it into an electric signal.
  • a photoelectric conversion unit such as a photodiode that receives light from the subject and converts it into an electric signal.
  • the solid-state imaging device 101 includes, for example, a pixel array unit 111, a vertical drive unit 112, a column signal processing unit 113, a data storage unit 119, a horizontal drive unit 114, a system control unit 115, and a signal processing unit 118.
  • the pixel array unit 111 has a semiconductor substrate 1 (described later). Peripheral circuits such as the vertical drive unit 112, the column signal processing unit 113, the data storage unit 119, the horizontal drive unit 114, the system control unit 115, and the signal processing unit 118 are, for example, on the same semiconductor substrate 1 as the pixel array unit 111. It is formed.
  • the pixel array unit 111 has a plurality of unit pixels 110 including a photoelectric conversion unit (described later) that generates and stores light charges according to the amount of light incident from the subject. As shown in FIG. 1, the unit pixels 110 are arranged in the horizontal direction (row direction) and the vertical direction (column direction), respectively.
  • the pixel drive line 116 is wired along the row direction for each pixel row consisting of the unit pixels 110 arranged in a row in the row direction, and is composed of the unit pixels 110 arranged in a row in the column direction.
  • a vertical signal line (VSL) 117 is wired along the column direction for each pixel array.
  • the vertical drive unit 112 includes a shift register, an address decoder, and the like.
  • the vertical drive unit 112 simultaneously drives all of the plurality of unit pixels 110 in the pixel array unit 111 by supplying signals or the like to the plurality of unit pixels 110 via the plurality of pixel drive lines 116, or pixels. Drive in line units.
  • the vertical drive unit 112 has, for example, two scanning systems, a read scanning system and a sweep scanning system.
  • the read-out scanning system selectively scans the unit pixel 110 of the pixel array unit 111 row by row.
  • the sweep scan is performed in advance of the read scan for which the read scan is performed by the read scan system by the time of the shutter speed.
  • batch sweeping is performed prior to batch transfer by the time of the shutter speed.
  • the so-called electronic shutter operation is performed by sweeping out unnecessary charges by this sweep-out scanning system, that is, resetting.
  • the electronic shutter operation refers to an operation in which the optical charges of the photoelectric conversion units PD1 and PD2 are discarded and exposure is newly started, that is, the accumulation of optical charges is newly started.
  • the signal read by the read operation by the read scan system corresponds to the amount of light incidented after the read operation immediately before or the electronic shutter operation.
  • the period from the read timing by the immediately preceding read operation or the sweep timing by the electronic shutter operation to the read timing by the current read operation is the light charge accumulation period in each unit pixel 110, that is, the exposure period. ..
  • the period from batch sweeping to batch transfer is the light charge accumulation period, that is, the exposure period.
  • the pixel signal output from each unit pixel 110 of the pixel row selectively scanned by the vertical drive unit 112 is supplied to the column signal processing unit 113 through each of the vertical signal lines 117.
  • the column signal processing unit 113 performs predetermined signal processing on the pixel signal output from each unit pixel 110 of the selected row through the vertical signal line 117 for each pixel column of the pixel array unit 111, and after the signal processing, the column signal processing unit 113 performs predetermined signal processing.
  • the pixel signal is temporarily held.
  • the column signal processing unit 113 includes, for example, a shift register and an address decoder, and includes noise removal processing, correlated double sampling processing, and A / D (Analog / Digital) conversion A / D conversion processing of analog pixel signals. Etc. to generate a digital pixel signal.
  • the column signal processing unit 113 supplies the generated pixel signal to the signal processing unit 118.
  • the horizontal drive unit 114 is composed of a shift register, an address decoder, and the like, and the unit circuit corresponding to the pixel sequence of the column signal processing unit 113 is sequentially selected. By the selective scanning by the horizontal drive unit 114, the pixel signals signal-processed for each unit circuit in the column signal processing unit 113 are sequentially output to the signal processing unit 118.
  • the system control unit 115 includes a timing generator or the like that generates various timing signals.
  • the system control unit 115 controls the drive of the vertical drive unit 112, the column signal processing unit 113, and the horizontal drive unit 114 based on the timing signal generated by the timing generator.
  • the signal processing unit 118 temporarily stores data in the data storage unit 119 as necessary, and performs signal processing such as arithmetic processing on the pixel signal supplied from the column signal processing unit 113, and each pixel signal. It outputs an image signal consisting of.
  • the data storage unit 119 temporarily stores the data necessary for the signal processing when the signal processing unit 118 performs signal processing.
  • FIG. 2 shows a cross-sectional configuration example of one unit pixel 110 among a plurality of unit pixels 110 constituting the pixel array unit 111.
  • FIG. 3 shows an example of cross-sectional configuration of one unit pixel 110. Note that FIG. 2 corresponds to a cross section in the arrow-viewing direction along the II-II cutting line shown in FIG.
  • the semiconductor substrate 1 in each unit pixel 110 has a first region portion R1 and a second region portion R2. Both the first region portion R1 and the second region portion R2 have a rectangular outer edge in the XY plane, and it is preferable that the shapes and sizes of the outer edges are equal to each other.
  • the semiconductor substrate 1 is made of a semiconductor material such as Si (silicon).
  • the semiconductor substrate 1 includes a back surface 1BS as a first surface and a front surface 1FS as a second surface. Both the front surface 1FS and the back surface 1BS extend along the XY plane and are located on opposite sides of each other in the thickness direction (Z-axis direction) orthogonal to the XY plane.
  • the first region portion R1 and the second region portion R2 are provided so as to be adjacent to each other in the XY plane, for example, in the Y-axis direction.
  • the back surface 1BS is an incident surface on which light L from the outside is incident.
  • the color filter CF and the on-chip lens OCL are provided so as to be laminated in order on the back surface 1BS of the semiconductor substrate 1. Therefore, the light L from the outside passes through the color filter CF and is incident on the back surface 1BS while being focused by the on-chip lens OCL.
  • the inter-pixel shading portion 7 may be provided in the same layer as the color filter CF.
  • a photoelectric conversion unit PD1 is provided in the first region portion R1 of the unit pixel 110.
  • the photoelectric conversion unit PD1 generates a light charge by detecting the light L1 incident on the back surface 1BS and performing photoelectric conversion.
  • the photoelectric conversion unit PD2 is provided in the second region portion R2 of the unit pixel 110.
  • the photoelectric conversion unit PD2 detects the light L2 incident from the back surface 1BS and performs photoelectric conversion to generate a light charge.
  • the light incident on the first region portion R1 of the light L is described as L1
  • the light incident on the second region portion R2 of the light L is described as L2.
  • the unit pixel 110 is provided with a wall-shaped region separating portion 4 extending from the back surface 1BS along the thickness direction (Z-axis direction) so as to physically separate the first region portion R1 and the second region portion R2. Has been done.
  • the region separation unit 4 physically separates the first region portion R1 and the second region portion R2.
  • the first region portion R1 and the second region portion R2 in the unit pixel 110 are electrically separated from each other, optically separated from each other, or optically and electrically separated from each other by the region separation unit 4.
  • the region separation portion 4 is a single-layer film or a multilayer film of an insulator such as silicon oxide (SiO 2 ), tantalum pentoxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ), and aluminum oxide (Al 2 O 3 ). It may be formed. Further, the region separation portion 4 may be formed of a laminated body of a single-layer film or a multilayer film of an insulator such as tantalum oxide, hafnium oxide, or aluminum oxide, and a silicon oxide film. The region separation unit 4 formed of the insulator can optically and electrically separate the unit pixels 110. The region separation portion 4 may include a void inside thereof.
  • the region separation unit 4 can optically and electrically separate the first region portion R1 and the second region portion R2.
  • the region separating portion 4 may be formed of a metal having a high light-shielding property such as tantalum (Ta), aluminum (Al), silver (Ag), gold (Au) and copper (Cu).
  • Ta tantalum
  • Al aluminum
  • Ag silver
  • Au gold
  • Cu copper
  • the first region portion R1 and the second region portion R2 can be optically separated.
  • polysilicon can be used as a constituent material of the region separation unit 4.
  • the unit pixel 110 has a charge path portion 5 provided between the region separation portion 4 and the surface 1FS at a position overlapping with the region separation portion 4 in the thickness direction. Also called a blooming path, the electric charge generated in the photoelectric conversion unit PD1 and the photoelectric conversion unit PD2 passes through the charge path unit 5.
  • the region separation portion 4 and the charge path portion 5 are in contact with each other.
  • the unit pixel 110 further includes, for example, a pixel separation unit 3 that integrally surrounds the first region portion R1 and the second region portion R2 in the XY plane. Similar to the region separation unit 4, the pixel separation unit 3 has a wall shape extending from the back surface 1BS along the thickness direction (Z-axis direction). That is, the unit pixels 110 are formed one by one in one pixel region partitioned by the pixel separation unit 3. The adjacent unit pixels 110 are electrically separated from each other, optically separated from each other, or optically and electrically separated from each other by the pixel separation unit 3.
  • the pixel separation unit 3 can be formed of, for example, the same material as the region separation unit 4.
  • An insulating portion 6 may be provided between the pixel separating portion 3 and the surface 1FS at a position where the pixel separating portion 3 overlaps with the pixel separating portion 3 in the thickness direction.
  • the transfer transistor TG1 and the floating diffusion FD1 as the first charge-voltage conversion unit are further provided in the first region portion R1.
  • the second region portion R2 is provided with a transfer transistor TG2 and a floating diffusion FD2 as a second charge-voltage conversion unit.
  • the floating diffusion FD1 is provided between the surface 1FS and the photoelectric conversion unit PD1 in the thickness direction (Z-axis direction).
  • the floating diffusion FD2 is provided between the surface 1FS and the photoelectric conversion unit PD2 in the thickness direction (Z-axis direction).
  • the floating diffusion FD1 and FD2 are regions that temporarily hold the optical charges generated in the photoelectric conversion units PD1 and PD2 and then transferred via the transfer transistors TG1 and TG2, respectively. Further, the floating diffusion FD1 and FD2 are also floating diffusion regions that convert the optical charges from the photoelectric conversion units PD1 and PD2 into electric signals (for example, voltage signals) and output them.
  • the charge path portion 5 contains, for example, crystalline silicon or amorphous silicon as the main material.
  • the charge path portion 5 mainly contains crystalline silicon for example, the semiconductor substrate 1 which is a Si substrate is annealed in a reducing atmosphere, and the silicon (Si) atom contained in the Si substrate is migrated to migrate the charge path portion. 5 can be formed.
  • the charge path portion 5 mainly containing crystalline silicon may be formed by an epitaxial growth method.
  • the charge path portion 5 can be generated by a vapor deposition method such as a sputtering method or a CVD method.
  • the pixel array unit 111 is further provided with a wiring layer 2 that covers the surface 1FS.
  • FIG. 4 is a schematic plan view showing the layout of the wiring layer 2 in the unit pixel 110.
  • the pixel separation unit 3, the region separation unit 4, the photoelectric conversion units PD1, PD2, and the like are shown together by a broken line.
  • FIG. 5 shows an example of a circuit configuration of the unit pixel 110.
  • the wiring layer 2 is provided with transfer transistors TG1 and TG2, a connection portion 11, amplification transistors AMP1 and AMP2, wiring 12, a reset transistor RST, a selection transistor SEL, and the like.
  • the connection portion 11 connects the floating diffusion FD1 and the floating diffusion FD2.
  • the wiring 12 connects the connection portion 11 with the amplification transistor AMP1 and the amplification transistor AMP2. Therefore, the amplification transistor AMP1 and the amplification transistor AMP2 form one amplification transistor AMP via the wiring 12.
  • the transfer transistor TG1, the reset transistor RST, and the amplification transistor AMP1 are provided at positions corresponding to the first region portion R1 in the thickness direction.
  • the transfer transistor TG2, the selection transistor SEL, and the amplification transistor AMP2 are provided at positions corresponding to the second region portion R2 in the thickness direction.
  • the floating diffusion FD, the reset transistor RST, the selection transistor SEL, and the amplification transistor AMP are shared by the first region portion R1 and the second region portion R2.
  • the amplification transistor AMP in which the amplification transistor AMP1 and the amplification transistor AMP2 are integrated is described.
  • the anode terminal is grounded and the cathode terminal is connected to the floating diffusion FD1 via the transfer transistor TG1.
  • the anode terminal is grounded and the cathode terminal is connected to the floating diffusion FD2 via the transfer transistor TG2.
  • the floating diffusion FD1 and FD2 hold the optical charge read from the photoelectric conversion units PD1 and PD2 by the transfer transistors TG1 and TG2. Further, the floating diffusion FD1 and FD2 are adapted to convert their optical charges into electric signals (for example, voltage signals) and output them.
  • the reset transistor RST When the reset transistor RST is turned on by the reset signal, the optical charge accumulated in the floating diffusion FD1 and FD2 is discharged to the drain, that is, the constant voltage source Vdd. By doing so, the reset transistor RST resets the potentials of the floating diffusion FD1 and FD2.
  • the amplification transistor AMP is designed to output a pixel signal corresponding to the potential of the floating diffusion FD1 and FD2. That is, the amplification transistor AMP constitutes a source follower circuit with a constant current source connected via the vertical signal line 117. A pixel signal indicating a level corresponding to the optical charge stored in the floating diffusion FD1 and FD2 is output from the amplification transistor AMP to the column signal processing unit 113 (FIG. 1) via the selection transistor SEL and the vertical signal line 117. It has become so.
  • the selection transistor SEL is turned on when a certain unit pixel 110 is selected by the selection signal, and the pixel signal of the selected unit pixel 110 is output to the column signal processing unit 113 via the vertical signal line 117. ing.
  • Each signal line through which the transfer signal, the selection signal, and the reset signal are transmitted corresponds to the pixel drive line 116 shown in FIG.
  • two photoelectric conversion units PD1 and PD2 are directly below one on-chip lens OCL, that is, at a position where one on-chip lens OCL overlaps in the Z-axis direction. It is provided. In the following description, such a structure may be referred to as a 2PD structure.
  • the light L incident on the on-chip lens OCL passes through the color filter CF while being focused by the on-chip lens OCL, and then from the back surface 1BS to the photoelectric conversion unit PD1 or the second region of the first region portion R1.
  • the photoelectric conversion unit PD2 of the portion R2 is irradiated.
  • the light that irradiates the photoelectric conversion unit PD1 is referred to as light L1
  • the light that irradiates the photoelectric conversion unit PD2 is referred to as light L2.
  • FIG. 6 is a characteristic diagram showing the dependence of the output on the change in the incident angle ⁇ of the light L in each of the photoelectric conversion unit PD1 and the photoelectric conversion unit PD2.
  • the incident angle ⁇ dependence of the output of the photoelectric conversion unit PD1 is represented by the solid line curve PD1
  • the incident angle ⁇ dependence of the output of the photoelectric conversion unit PD2 is represented by the broken line curve PD2.
  • the output of the photoelectric conversion unit PD1 and the output of the photoelectric conversion unit PD2 are equal to each other.
  • the output of the photoelectric conversion unit PD1 and the output of the photoelectric conversion unit PD2 can be used, for example, for performing phase difference detection.
  • the photoelectric conversion unit PD2 is charged.
  • the output from the conversion unit PD2 may increase, and the accuracy of phase difference detection may decrease.
  • the region separation portion 4 extending in the thickness direction from the back surface 1BS to the front surface 1FS is provided. Therefore, it is possible to avoid mixing the output from the photoelectric conversion unit PD1 and the output from the photoelectric conversion unit PD2, and improve the phase difference detection accuracy.
  • FIGS. 7A to 7F are cross-sectional views schematically showing one step of the manufacturing method of the solid-state image sensor 101, respectively.
  • a semiconductor substrate 1 made of a Si substrate is prepared, and then the pixel separation portion 3 and the region separation portion are selectively dug from the surface 1FS in the thickness direction (Z-axis direction).
  • the trench 1TR is formed at a desired position where each of the 4's should be formed.
  • the pixel separation portion 3 and the region separation portion 4 and the insulating portion filling the space between the pixel separation portion 3 and the region separation portion 4 and the surface 1FS are provided so as to fill the trench 1TR. Form each.
  • a hard mask HM made of an insulating film such as SiNx is formed by, for example, a CVD method so as to cover the entire surface 1FS. Further, a resist mask RM that selectively covers the hard mask HM is formed by a photolithography method.
  • the resist mask RM has an opening RM-K at a position where the charge path portion 5 should be formed, that is, immediately above, for example, the region separation portion 4.
  • the exposed portion of the hard mask HM that is not covered by the resist mask RM is removed by dry etching, for example, and an opening HM-K is formed in the hard mask HM.
  • the insulating portion 6 directly above the region separating portion 4 is removed by wet etching using the hard mask HM having the opening HM-K formed, and the concave portion U is formed.
  • the upper end portion of the region separating portion 4 may be removed.
  • the hard mask HM is removed, and as shown in FIG. 7E, the charge path portion 5 is formed so as to fill the recess U.
  • the charge path portion 5 can be formed by subjecting the entire semiconductor substrate 1 to an annealing treatment in a reducing atmosphere such as a hydrogen atmosphere and migrating the silicon contained in the semiconductor substrate 1 to the recess U. can.
  • crystalline silicon may be formed in the recess U by the epitaxial growth method without removing the hard mask HM.
  • the charge path portion 5 may be formed by forming amorphous silicon in the recess U by a vapor deposition method without removing the hard mask HM.
  • the upper end portion of the charge path portion 5 formed so as to fill the recess U does not have to coincide with the surface 1FS.
  • the upper end portion of the charge path portion 5 may protrude from the surface 1FS.
  • the surface of the semiconductor substrate 1 opposite to the front surface 1FS is polished until the pixel separation portion 3 and the region separation portion 4 are exposed to form the back surface 1BS.
  • the wiring layer 2 including the thin film transistors such as the transfer transistors TG1 and TG2 is formed so as to cover the surface 1FS.
  • the photoelectric conversion units PD1 and PD2 and the floating diffusion FD1 and FD2 are formed in the first region portion R1 and the second region portion R2 of the semiconductor substrate 1.
  • the solid-state image sensor 101 is completed by forming the color filter CF, the inter-pixel light-shielding portion 7, the on-chip lens OCL, and the like.
  • each unit pixel 110 can be used as a phase difference detection pixel for obtaining phase difference information.
  • the region separation portion 4 is formed so as to extend from the back surface 1BS of the semiconductor substrate 1 to the front surface 1FS, so-called color separation is possible, but phase difference detection cannot be performed.
  • a physical separation wall may be formed by ion implantation between the first region portion R1 and the second region portion R2 without providing the region separation portion 4, but in that case, the region to be ion-implanted may be formed. Since the occupied area of the photoelectric conversion units PD1 and PD2 is reduced by the amount, the output is reduced. According to the present disclosure, it is possible to detect the phase difference while completely separating the first region portion R1 and the second region portion R2 on the light incident side, and it is possible to obtain a higher output.
  • the trench 1TR is formed on the semiconductor substrate 1 before forming the wiring layer 2 including the thin film transistors such as the transfer transistors TG1 and TG2. Therefore, it is not necessary to damage the thin film transistor included in the wiring layer 2 due to the formation of the trench 1TR. Further, after forming the trench 1TR, thermal annealing can be performed, and crystal defects such as strain generated in the semiconductor substrate 1 can be recovered. That is, it is possible to reduce the damage in the semiconductor substrate 1 due to processing. As a result, the solid-state image sensor 101 of the present disclosure has high reliability.
  • the trench is formed with the wiring layer 2 formed on the front surface 1FS, so that thermal annealing can be performed in order to avoid damage to the wiring layer 2. It is practically difficult to expose to a high temperature environment.
  • FIG. 8 is a schematic view showing a cross-sectional configuration example of the unit pixel 110A, and corresponds to FIG. 2 showing the unit pixel 110 described in the above embodiment.
  • the unit pixel 110A has substantially the same configuration as the unit pixel 110 of FIG. 2 except that it further has an insulating layer 8 provided between the charge path portion 5 and the wiring layer 2.
  • the unit pixel 110A is provided with an insulating layer 8 so as to be in contact with both the charge path portion 5 and the wiring layer 2 so as to overlap the charge path portion 5 in the thickness direction.
  • the insulating layer 8 is provided in the unit pixel 110A in this way, it is possible to sufficiently perform electrical insulation between the charge path portion 5 and the wiring layer 2. Therefore, it is possible to prevent the optical charges from the photoelectric conversion units PD1 and PD2 from flowing out to the wiring layer 2 by an unintended path. Therefore, it is possible to secure higher operation reliability than the unit pixel 110 of the above embodiment.
  • FIG. 9 is a block diagram showing a configuration example of the camera 2000 as an electronic device to which the present technology is applied.
  • the camera 2000 is an optical unit 2001 composed of a lens group or the like, an image pickup device (imaging device) 2002 to which the above-mentioned solid-state image pickup device 101 or the like (hereinafter referred to as a solid-state image pickup device 101 or the like) is applied, and a camera signal processing circuit.
  • a DSP (Digital Signal Processor) circuit 2003 is provided.
  • the camera 2000 also includes a frame memory 2004, a display unit 2005, a recording unit 2006, an operation unit 2007, and a power supply unit 2008.
  • the DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, the operation unit 2007, and the power supply unit 2008 are connected to each other via the bus line 2009.
  • the optical unit 2001 captures incident light (image light) from the subject and forms an image on the image pickup surface of the image pickup apparatus 2002.
  • the image pickup apparatus 2002 converts the amount of incident light imaged on the image pickup surface by the optical unit 2001 into an electric signal in pixel units and outputs it as a pixel signal.
  • the display unit 2005 comprises a panel-type display device such as a liquid crystal panel or an organic EL panel, and displays a moving image or a still image captured by the image pickup device 2002.
  • the recording unit 2006 records a moving image or a still image captured by the image pickup apparatus 2002 on a recording medium such as a hard disk or a semiconductor memory.
  • the operation unit 2007 issues operation commands for various functions of the camera 2000 under the operation of the user.
  • the power supply unit 2008 appropriately supplies various power sources that serve as operating power sources for the DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, and the operation unit 2007 to these supply targets.
  • the technique according to the present disclosure can be applied to various products.
  • the technology according to the present disclosure is realized as a device mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. You may.
  • FIG. 10 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.
  • the vehicle control system 12000 includes a plurality of electronic control units connected via the communication network 12001.
  • the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050.
  • a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (Interface) 12053 are shown as a functional configuration of the integrated control unit 12050.
  • the drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs.
  • the drive system control unit 12010 has a driving force generator for generating the driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism for adjusting and a braking device for generating braking force of the vehicle.
  • the body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs.
  • the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, turn signals or fog lamps.
  • the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches.
  • the body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.
  • the vehicle outside information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000.
  • the image pickup unit 12031 is connected to the vehicle outside information detection unit 12030.
  • the vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image.
  • the vehicle outside information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or a character on the road surface based on the received image.
  • the image pickup unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received.
  • the image pickup unit 12031 can output an electric signal as an image or can output it as distance measurement information. Further, the light received by the image pickup unit 12031 may be visible light or invisible light such as infrared light.
  • the in-vehicle information detection unit 12040 detects the in-vehicle information.
  • a driver state detection unit 12041 that detects a driver's state is connected to the vehicle interior information detection unit 12040.
  • the driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 determines the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether or not the driver has fallen asleep.
  • the microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and the drive system control unit.
  • a control command can be output to 12010.
  • the microcomputer 12051 realizes ADAS (Advanced Driver Assistance System) functions including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. It is possible to perform cooperative control for the purpose of.
  • ADAS Advanced Driver Assistance System
  • the microcomputer 12051 controls the driving force generating device, the steering mechanism, the braking device, and the like based on the information around the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040. It is possible to perform coordinated control for the purpose of automatic driving that runs autonomously without depending on the operation.
  • the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the vehicle outside information detection unit 12030.
  • the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the outside information detection unit 12030, and performs cooperative control for the purpose of anti-glare such as switching the high beam to the low beam. It can be carried out.
  • the audio image output unit 12052 transmits an output signal of at least one of audio and image to an output device capable of visually or audibly notifying information to the passenger or the outside of the vehicle.
  • an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices.
  • the display unit 12062 may include, for example, at least one of an onboard display and a head-up display.
  • FIG. 11 is a diagram showing an example of the installation position of the image pickup unit 12031.
  • the image pickup units 12101, 12102, 12103, 12104, and 12105 are included.
  • the image pickup units 12101, 12102, 12103, 12104, 12105 are provided at positions such as, for example, the front nose, side mirrors, rear bumpers, back doors, and the upper part of the windshield in the vehicle interior of the vehicle 12100.
  • the image pickup unit 12101 provided on the front nose and the image pickup section 12105 provided on the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100.
  • the image pickup units 12102 and 12103 provided in the side mirror mainly acquire images of the side of the vehicle 12100.
  • the image pickup unit 12104 provided in the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100.
  • the image pickup unit 12105 provided on the upper part of the windshield in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.
  • FIG. 11 shows an example of the shooting range of the imaging units 12101 to 12104.
  • the imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose
  • the imaging ranges 12112 and 12113 indicate the imaging range of the imaging units 12102 and 12103 provided on the side mirrors, respectively
  • the imaging range 12114 indicates the imaging range.
  • the imaging range of the imaging unit 12104 provided on the rear bumper or the back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 can be obtained.
  • At least one of the image pickup units 12101 to 12104 may have a function of acquiring distance information.
  • at least one of the image pickup units 12101 to 12104 may be a stereo camera including a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.
  • the microcomputer 12051 has a distance to each three-dimensional object within the image pickup range 12111 to 12114 based on the distance information obtained from the image pickup unit 12101 to 12104, and a temporal change of this distance (relative speed with respect to the vehicle 12100).
  • a predetermined speed for example, 0 km / h or more
  • the microcomputer 12051 can set an inter-vehicle distance to be secured in advance in front of the preceding vehicle, and can perform automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. In this way, it is possible to perform coordinated control for the purpose of automatic driving or the like that autonomously travels without relying on the driver's operation.
  • the microcomputer 12051 converts three-dimensional object data related to a three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, electric poles, and other three-dimensional objects based on the distance information obtained from the image pickup units 12101 to 12104. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 via the audio speaker 12061 or the display unit 12062. By outputting an alarm to the driver and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be provided.
  • At least one of the image pickup units 12101 to 12104 may be an infrared camera that detects infrared rays.
  • the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging unit 12101 to 12104.
  • pedestrian recognition is, for example, a procedure for extracting feature points in an image captured by an image pickup unit 12101 to 12104 as an infrared camera, and pattern matching processing is performed on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. It is done by the procedure to determine.
  • the audio image output unit 12052 determines the square contour line for emphasizing the recognized pedestrian.
  • the display unit 12062 is controlled so as to superimpose and display. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.
  • the above is an example of a vehicle control system to which the technique according to the present disclosure can be applied.
  • the technique according to the present disclosure can be applied to the image pickup unit 12031 among the configurations described above.
  • the solid-state image sensor 101 or the like shown in FIG. 1 or the like can be applied to the image pickup unit 12031.
  • the present disclosure has been described above with reference to some embodiments and modifications, the present disclosure is not limited to the above embodiments and the like, and various modifications are possible.
  • the charge path portion 5 is formed only in a part of the region overlapping with the region separation portion 4 in the thickness direction, but the image pickup apparatus of the present disclosure is limited to this. It's not a thing.
  • the charge path portion 5 may be formed so as to occupy the entire region overlapping with the region separation portion 4 in the thickness direction.
  • the present disclosure is not limited to the arrangement position of the transfer transistor and the floating diffusion as shown in the above embodiment.
  • the floating diffusion FD1 and FD2 may be provided at positions away from the region separation unit 4, respectively.
  • one unit pixel has two region portions separated by one region separation unit
  • the present disclosure is not limited to this.
  • two wall-shaped portions in which one unit pixel intersects with each other for example. It may have four first-fourth region portions R1 to R4 separated by the region separation part 9 made of.
  • the unit pixel 110D is an example in which the charge path portion 5 is provided only in a part of the region overlapping the region separation portion 9 in the thickness direction.
  • the unit pixel 110E is an example in which the charge path portion 5 is provided so as to occupy the entire region overlapping with the region separation portion 9 in the thickness direction.
  • the wiring layer 2 including the transfer transistors TG1 and TG2, the connection portion 11, the amplification transistors AMP1 and AMP2, the wiring 12, and the like is provided on the surface 1FS of the semiconductor substrate 1 of the unit pixel 110.
  • the present disclosure is not limited to this.
  • the image pickup apparatus of the present disclosure may include a laminated structure such as the unit pixel 110F as the sixth modification of the present disclosure shown in FIG. 16, for example.
  • FIG. 16 shows an example of the cross-sectional configuration of the unit pixel 110F as the sixth modification of the present disclosure.
  • the image pickup apparatus provided with a plurality of unit pixels 110F has a structure in which the first substrate 10, the second substrate 20, and the third substrate 30 are laminated in order.
  • the image pickup apparatus provided with a plurality of unit pixels 110F further includes a color filter CF and an on-chip lens OCL on the back surface side of the first substrate 10, that is, the light incident surface side.
  • the first substrate 10 is configured by laminating an insulating layer 46 on a semiconductor substrate 1.
  • the first substrate 10 has an insulating layer 46 as a part of the interlayer insulating film 51.
  • the insulating layer 46 is provided in the gap between the semiconductor substrate 1 and the semiconductor substrate 21 of the second substrate 20.
  • the insulating layer 46 is provided with transfer transistors TG1 and TG2, floating diffusion FD1 and FD2, and the like.
  • the second substrate 20 is configured by laminating an insulating layer 52 on a semiconductor substrate 21.
  • the second substrate 20 has an insulating layer 52 as a part of the interlayer insulating film 51.
  • the insulating layer 52 is provided in the gap between the semiconductor substrate 21 and the semiconductor substrate 31 of the third substrate 30.
  • the semiconductor substrate 21 is made of, for example, a silicon substrate.
  • the readout circuit 22 is provided on the surface side of the semiconductor substrate 21 of the second substrate 20, that is, the portion on the third substrate 30 side.
  • the second substrate 20 is attached to the first substrate 10 with the back surface of the semiconductor substrate 21 facing the front surface side of the semiconductor substrate 1. That is, the second substrate 20 is face-to-back bonded to the first substrate 10.
  • the second substrate 20 further has an insulating layer 53 penetrating the semiconductor substrate 21 in the same layer as the semiconductor substrate 21.
  • the second substrate 20 has an insulating layer 53 as a part of the interlayer insulating film 51.
  • the insulating layer 53 is provided so as to cover the side surface of the through wiring 54 described later.
  • the laminate composed of the first substrate 10 and the second substrate 20 has an interlayer insulating film 51 and a through wiring 54 provided in the interlayer insulating film 51.
  • One through wiring 54 is provided for each of the first region portion R1 and the second region portion R2.
  • the through wiring 54 extends in the thickness direction (Z-axis direction) of the semiconductor substrate 21 so as to penetrate the insulating layer 53 of the interlayer insulating film 51.
  • the first substrate 10 and the second substrate 20 are electrically connected to each other by a through wiring 54.
  • the through wiring 54 is provided so as to electrically connect the floating diffusion FD and the connection wiring 55 described later.
  • the second substrate 20 has, for example, a plurality of connecting portions 59 electrically connected to the readout circuit 22 and the semiconductor substrate 21 in the insulating layer 52.
  • the second substrate 20 further has, for example, a wiring layer 56 on the insulating layer 52.
  • the wiring layer 56 has, for example, an insulating layer 57, a plurality of pixel drive lines 23 provided in the insulating layer 57, and a plurality of vertical signal lines 24.
  • the wiring layer 56 further has, for example, a plurality of connection wirings 55 in the insulating layer 57.
  • the connection wiring 55 electrically connects two through wirings 54 electrically connected to the floating diffusion FD1 and FD2, respectively.
  • the wiring layer 56 further has, for example, a plurality of pad electrodes 58 in the insulating layer 57.
  • Each pad electrode 58 is made of a metal such as Cu (copper) or Al (aluminum). Each pad electrode 58 is exposed on the surface of the wiring layer 56.
  • the plurality of pad electrodes 58 are joined to a plurality of pad electrodes 64, which will be described later, respectively, for electrical connection between the second substrate 20 and the third substrate 30, and bonding of the second substrate 20 and the third substrate 30. Used for.
  • the plurality of pad electrodes 58 are provided, for example, one for each of the pixel drive line 23 and the vertical signal line 24.
  • the third substrate 30 is configured by, for example, laminating an interlayer insulating film 61 on a semiconductor substrate 31.
  • the semiconductor substrate 31 is made of a silicon substrate.
  • the third substrate 30 has a configuration in which a logic circuit 32 is provided on a portion on the surface side of the semiconductor substrate 31.
  • the third substrate 30 further has, for example, a wiring layer 62 on the interlayer insulating film 61.
  • the wiring layer 62 has, for example, an insulating layer 63 and a plurality of pad electrodes 64 provided in the insulating layer 63.
  • the plurality of pad electrodes 64 are electrically connected to the logic circuit 32.
  • Each pad electrode 64 is made of, for example, Cu (copper).
  • Each pad electrode 64 is exposed on the surface of the wiring layer 62.
  • Each pad electrode 64 is used for electrical connection between the second substrate 20 and the third substrate 30 and for bonding the second substrate 20 and the third substrate 30. Further, the number of pad electrodes 64 does not necessarily have to be plurality, and even one pad electrode 64 can be electrically connected to the logic circuit 32.
  • the second substrate 20 and the third substrate 30 are electrically connected to each other by joining the pad electrode 58 and the pad electrode 64. That is, the transfer transistors TG1 and TG2 are electrically connected to the logic circuit 32 via the through wiring 54 and the pad electrodes 58 and 64.
  • the third substrate 30 is attached to the second substrate 20 with the surface of the semiconductor substrate 31 facing the surface side of the semiconductor substrate 21. That is, the third substrate 30 is attached to the second substrate 20 face-to-face.
  • the image pickup apparatus of the present disclosure may include a laminated structure such as a unit pixel 110G as a seventh modification of the present disclosure shown in FIG. 17, for example.
  • FIG. 17 shows an example of the cross-sectional configuration of the unit pixel 110G as the seventh modification of the present disclosure.
  • the image pickup apparatus provided with a plurality of unit pixels 110G has a structure in which the first substrate 10, the second substrate 20, and the third substrate 30 are laminated in order.
  • the image pickup apparatus provided with a plurality of unit pixels 110G further includes a color filter CF and an on-chip lens OCL on the back surface side of the first substrate 10, that is, the light incident surface side.
  • the first substrate 10 is configured by laminating the wiring layer 2 on the surface side of the semiconductor substrate 1.
  • the wiring layer 2 is provided in the gap between the semiconductor substrate 1 and the wiring layer 56 of the second substrate 20.
  • the wiring layer 2 is provided with transfer transistors TG1 and TG2, floating diffusion FD1 and FD2, a plurality of pad electrodes 71, a plurality of connection portions 59, and the like. Each pad electrode 71 is exposed on the surface of the wiring layer 2.
  • Each pad electrode 71 is used for electrical connection between the first substrate 10 and the second substrate 20 and for bonding the first substrate 10 and the second substrate 20.
  • the wiring layer 56 and the interlayer insulating film 51 are laminated in order from the side to be bonded to the first substrate 10.
  • the second substrate 20 is attached to the first substrate 10 with the surface of the semiconductor substrate 21 facing the surface side of the semiconductor substrate 1. That is, the second substrate 20 is face-to-face bonded to the first substrate 10.
  • the wiring layer 56 has, for example, an insulating layer 57, a plurality of pixel drive lines 23 provided in the insulating layer 57, and a plurality of vertical signal lines 24.
  • the wiring layer 56 has, for example, a connection wiring 55 in the insulating layer 57.
  • the connection wiring 55 electrically connects two through wirings electrically connected to the read circuit 22 to each other.
  • the wiring layer 56 further has a plurality of pad electrodes 58 provided so as to be exposed on the surface of the second substrate 20.
  • the plurality of pad electrodes 58 are bonded to the plurality of pad electrodes 71, respectively, and are used for electrical connection between the first substrate 10 and the second substrate 20 and bonding of the first substrate 10 and the second substrate 20. Be done.
  • the interlayer insulating film 51 is configured by laminating the insulating layer 52, the semiconductor substrate 21, and the insulating layer 46 in order from the wiring layer 56 side.
  • the readout circuit 22 is provided on the semiconductor substrate 21.
  • the insulating layer 46 is provided with a plurality of pad electrodes 47 so as to be exposed on the back surface of the second substrate 20.
  • the plurality of pad electrodes 47 are bonded to the plurality of pad electrodes 64 of the third substrate 30, respectively, to electrically connect the second substrate 20 and the third substrate 30, and to connect the second substrate 20 and the third substrate 30. Used for bonding. Further, the second substrate 20 is provided with a connecting portion 59 so as to extend in the Z-axis direction from a part of the pad electrodes 58 to a part of the pad electrodes 47. The connection portion 59 is electrically connected to, for example, the readout circuit 22 or the semiconductor substrate 21. The second substrate 20 further has an insulating layer 53 penetrating the semiconductor substrate 21 in the same layer as the semiconductor substrate 21. The second substrate 20 has an insulating layer 53 as a part of the interlayer insulating film 51.
  • the third substrate 30 is configured by, for example, laminating an interlayer insulating film 61 on a semiconductor substrate 31.
  • the semiconductor substrate 31 is made of a silicon substrate.
  • the third substrate 30 has a configuration in which a logic circuit 32 is provided on a portion on the surface side of the semiconductor substrate 31.
  • the third substrate 30 further has, for example, a wiring layer 62 on the interlayer insulating film 61.
  • the wiring layer 62 has, for example, an insulating layer 63 and a plurality of pad electrodes 64 provided in the insulating layer 63.
  • the plurality of pad electrodes 64 are electrically connected to the logic circuit 32.
  • the transfer transistors TG1 and TG2 of the first substrate 10 are electrically connected to the logic circuit 32 of the third substrate 30 via the second substrate 20.
  • the third substrate 30 is attached to the second substrate 20 with the front surface of the semiconductor substrate 31 facing the back surface side of the semiconductor substrate 21. That is, the third substrate 30 is attached to the second substrate 20 by face-to
  • the image pickup apparatus of the present disclosure may include a laminated structure such as a unit pixel 110H as an eighth modification of the present disclosure shown in FIG. 18, for example.
  • FIG. 18 shows an example of the cross-sectional configuration of the unit pixel 110H as the eighth modification of the present disclosure.
  • the image pickup apparatus provided with a plurality of unit pixels 110H has a structure in which the first substrate 10, the second substrate 20, and the third substrate 30 are laminated in order.
  • the image pickup apparatus provided with a plurality of unit pixels 110H further includes a color filter CF and an on-chip lens OCL on the back surface side of the first substrate 10, that is, the light incident surface side.
  • the configuration of the unit pixel 110H in FIG. 18 is the unit pixel shown in FIG. 17 except that the second substrate 20 is inserted between the first substrate 10 and the third substrate 30 in an inverted state. It is substantially the same as the configuration of 110G. That is, the second substrate 20 is attached to the first substrate 10 face-to-back, and the third substrate 30 is attached to the second substrate 20 face-to-face. Therefore, the pad electrode 71 and the pad electrode 47 are joined at the interface between the front surface of the first substrate 10 and the back surface of the second substrate 20. Further, the pad electrode 58 and the pad electrode 64 are joined at the interface between the surface of the second substrate 20 and the surface of the third substrate 30.
  • the image pickup device of the present disclosure is not limited to the image pickup device that detects the light amount distribution of visible light and acquires it as an image, and acquires the distribution of the incident amount of infrared rays, X-rays, particles, or the like as an image. It may be an image pickup device.
  • the image pickup apparatus of the present disclosure may be in the form of a module in which an image pickup unit and a signal processing unit or an optical system are packaged together.
  • a separation portion extending in the thickness direction from the first surface to the second surface of the semiconductor substrate is provided, and the first region portion is provided. And the second region part were physically separated. Therefore, it is possible to avoid unintended and unnecessary irradiation of each of the first region portion and the second region portion. Further, since the charge path portion is provided between the separation portion and the second surface, the output of the first photoelectric conversion unit and the output of the second photoelectric conversion unit can be shared. As a result, phase difference information can be obtained. It should be noted that the effects described in the present specification are merely examples and are not limited to the description thereof, and other effects may be obtained. In addition, the present technology can have the following configurations.
  • a second surface that includes a first surface and a second surface that is located on the opposite side of the first surface in the thickness direction, and is adjacent to the first surface and the second surface along the second surface in an in-plane direction.
  • a semiconductor substrate having one region portion and a second region portion, A separation portion extending along the thickness direction from the first surface so as to separate the first region portion and the second region portion.
  • a first photoelectric conversion unit provided in the first region portion and capable of generating a first charge by detecting a first light incident from the first surface and performing photoelectric conversion.
  • a second photoelectric conversion unit provided in the second region portion and capable of generating a second charge by detecting a second light incident from the first surface and performing photoelectric conversion.
  • An image pickup device having an electric charge.
  • a first charge-voltage conversion unit provided in the first region portion, which accumulates the first charge and converts the accumulated first charge into an electric signal and outputs the electric signal.
  • the above (1) which is provided in the second region portion and further has a second charge-voltage conversion unit that accumulates the second charge and converts the accumulated second charge into an electric signal and outputs the electric signal.
  • the image pickup apparatus according to any one of (4) to (4).
  • the semiconductor substrate is a silicon substrate and is a silicon substrate.
  • the semiconductor substrate is a silicon substrate and is a silicon substrate.
  • a first region portion comprising a first surface and a second surface located opposite the first surface in the thickness direction, the first surface and adjacent first regions along the second surface. And to prepare a semiconductor substrate having a second region portion, By selectively digging from the second surface of the semiconductor substrate, a first trench separating the first region portion and the second region portion is formed in the semiconductor substrate. Forming a separation so as to fill the first trench, Of the separated portions, the upper end portion exposed on the second surface is removed to form a recess.
  • a first photoelectric that can generate a first charge passing through the charge path portion by detecting a first light incident on the first region portion and performing a photoelectric conversion on the first region portion.
  • a method for manufacturing an image pickup apparatus which comprises forming a second photoelectric conversion unit capable of generating a second charge passing through the charge path unit by forming the conversion unit.
  • a silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
  • the reducing atmosphere is a hydrogen atmosphere.
  • a silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
  • a silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.

Abstract

Provided is an imaging device capable of exhibiting better imaging performance. This imaging device comprises: a semiconductor substrate which includes a first surface and a second surface positioned on the opposite side from the first surface in the thickness direction, and which has a first region part and a second region part that are adjacent in the in-plane direction along the first surface and the second surface; a separation part which extends from the first surface and along thickness direction so as to divide the first region part and the second region part from each other; a first photoelectric conversion part which is provided in the first region part and which is capable of producing a first charge by detecting first light that enters from the first surface and performing photoelectric conversion thereof; a second photoelectric conversion part which is provided in the second region part and which is capable of producing a second charge by detecting second light that enters from the first surface and performing photoelectric conversion thereof; and a charge path part which is provided to a position that is between the separation part and the second surface and that overlaps with the separation part in the thickness direction, and which is provided such that the first charge and the second charge can pass therethrough.

Description

撮像装置および撮像装置の製造方法Image pickup device and manufacturing method of image pickup device
 本開示は、光電変換を行うことで撮像を行う撮像装置およびその製造方法に関する。 The present disclosure relates to an image pickup apparatus that performs imaging by performing photoelectric conversion and a manufacturing method thereof.
 これまでに、半導体基板の厚さ方向に沿って延びる分離部により、隣り合う画素の分離を行うようにした固体撮像装置が提案されている(例えば、特許文献1参照)。 So far, a solid-state image sensor has been proposed in which adjacent pixels are separated by a separation portion extending along the thickness direction of the semiconductor substrate (see, for example, Patent Document 1).
特開2017-168566号公報Japanese Unexamined Patent Publication No. 2017-168566
 ところで、このような撮像装置では、画像の劣化を抑制することが要求される。 By the way, in such an image pickup device, it is required to suppress deterioration of an image.
 したがって、より優れた撮像性能を発揮することのできる撮像装置およびその製造方法を提供することが望まれる。 Therefore, it is desired to provide an image pickup device capable of exhibiting more excellent image pickup performance and a manufacturing method thereof.
 本開示の一実施形態としての撮像装置は、第1の面と、厚さ方向において第1の面と反対側に位置する第2の面とを含み、第1の面および第2の面に沿って隣り合う第1の領域部分および第2の領域部分を有する半導体基板と、第1の領域部分と第2の領域部分とを隔てるように、第1の面から厚さ方向に沿って延びる分離遮光壁と、第1の領域部分に設けられ、第1の面から入射する第1の光を検出して光電変換を行うことにより第1の電荷を生成可能な第1の光電変換部と、第2の領域部分に設けられ、第1の面から入射する第2の光を検出して光電変換を行うことにより第2の電荷を生成可能な第2の光電変換部と、分離遮光壁と第2の面との間に設けられ、第1の電荷および第2の電荷が通過可能に設けられた電荷経路部とを有する。 An image pickup apparatus as an embodiment of the present disclosure includes a first surface and a second surface located opposite to the first surface in the thickness direction, and the first surface and the second surface. A semiconductor substrate having a first region portion and a second region portion adjacent to each other along the same direction extends along a thickness direction from a first surface so as to separate the first region portion and the second region portion. A separation light-shielding wall and a first photoelectric conversion unit provided in the first region portion and capable of generating a first charge by detecting first light incident from the first surface and performing photoelectric conversion. , A second photoelectric conversion unit provided in the second region portion and capable of generating a second charge by detecting the second light incident from the first surface and performing photoelectric conversion, and a separation light-shielding wall. It has a charge path portion provided between the surface and the second surface and provided so that the first charge and the second charge can pass through.
本開示の一実施の形態に係る撮像装置の構成例を示すブロック図である。It is a block diagram which shows the structural example of the image pickup apparatus which concerns on one Embodiment of this disclosure. 図1に示した撮像装置における一の単位画素の断面構成を模式的に表す断面図である。It is sectional drawing which shows typically the sectional structure of one unit pixel in the image pickup apparatus shown in FIG. 1. 図2に示した単位画素のうち半導体基板における平面構成を模式的に表す平面図である。It is a top view which schematically shows the plane composition in the semiconductor substrate among the unit pixels shown in FIG. 図2に示した単位画素のうち配線層における平面構成を模式的に表す平面図である。It is a top view which schematically shows the plane composition in the wiring layer among the unit pixels shown in FIG. 図2に示した単位画素における回路構成を表す回路図である。It is a circuit diagram which shows the circuit structure in the unit pixel shown in FIG. 図2に示した単位画素における出力と入射光の入射角度との関係を表す特性図である。It is a characteristic diagram which shows the relationship between the output in the unit pixel shown in FIG. 2 and the incident angle of incident light. 図1に示した撮像装置の製造方法の一工程を模式的に表す断面図である。It is sectional drawing which shows typically one step of the manufacturing method of the image pickup apparatus shown in FIG. 図1に示した撮像装置の製造方法における、図7Aに続く一工程を模式的に表す断面図である。FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7A in the manufacturing method of the image pickup apparatus shown in FIG. 1. 図1に示した撮像装置の製造方法における、図7Bに続く一工程を模式的に表す断面図である。FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7B in the manufacturing method of the image pickup apparatus shown in FIG. 1. 図1に示した撮像装置の製造方法における、図7Cに続く一工程を模式的に表す断面図である。FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7C in the manufacturing method of the image pickup apparatus shown in FIG. 1. 図1に示した撮像装置の製造方法における、図7Dに続く一工程を模式的に表す断面図である。FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7D in the manufacturing method of the image pickup apparatus shown in FIG. 1. 図1に示した撮像装置の製造方法における、図7Eに続く一工程を模式的に表す断面図である。FIG. 3 is a cross-sectional view schematically showing one step following FIG. 7E in the manufacturing method of the image pickup apparatus shown in FIG. 1. 一実施の形態の第1の変形例としての単位画素の断面構成を模式的に表す断面図である。It is sectional drawing which shows typically the sectional structure of the unit pixel as the 1st modification of one Embodiment. 電子機器の全体構成例を表す概略図である。It is a schematic diagram which shows the whole structure example of the electronic device. 車両制御システムの概略的な構成の一例を示すブロック図である。It is a block diagram which shows an example of the schematic structure of a vehicle control system. 車外情報検出部及び撮像部の設置位置の一例を示す説明図である。It is explanatory drawing which shows an example of the installation position of the vehicle exterior information detection unit and the image pickup unit. 本開示の第2の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view which shows the plane composition of the unit pixel as the 2nd modification of this disclosure schematically. 本開示の第3の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view schematically showing the plane composition of the unit pixel as the 3rd modification of this disclosure. 本開示の第4の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view which schematically shows the plane composition of the unit pixel as the 4th modification of this disclosure. 本開示の第5の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view schematically showing the plane composition of the unit pixel as the 5th modification of this disclosure. 本開示の第6の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view which shows the plane composition of the unit pixel as the sixth modification of this disclosure schematically. 本開示の第7の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view schematically showing the plane composition of the unit pixel as the 7th modification of this disclosure. 本開示の第8の変形例としての単位画素の平面構成を模式的に表す平面図である。It is a top view which schematically shows the plane composition of the unit pixel as the 8th modification of this disclosure.
 以下、本開示の実施の形態について図面を参照して詳細に説明する。なお、説明は以下の順序で行う。
1.一実施の形態
 2つの領域部分を分離する領域分離部の表面側にブルーミングパスを設けるようにした固体撮像装置の例。
2.第1の変形例
 ブルーミングパスと配線層との間に絶縁層をさらに設けるようにした固体撮像装置の例。
3.電子機器への適用例
4.移動体への適用例
5.その他の変形例
Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The explanation will be given in the following order.
1. 1. One Embodiment An example of a solid-state image pickup device in which a blooming path is provided on the surface side of a region separation portion that separates two region portions.
2. 2. First Modification Example An example of a solid-state image sensor in which an insulating layer is further provided between the blooming path and the wiring layer.
3. 3. Application example to electronic devices 4. Application example to mobile body 5. Other variants
<1.一実施の形態>
[固体撮像装置101の構成]
 図1は、本技術の一実施の形態に係る固体撮像装置101の機能の構成例を示すブロック図である。
<1. Embodiment>
[Structure of solid-state image sensor 101]
FIG. 1 is a block diagram showing a configuration example of a function of the solid-state image sensor 101 according to an embodiment of the present technology.
 固体撮像装置101は、例えばCMOS(Complementary Metal Oxide Semiconductor)を用いた裏面照射型イメージセンサである。固体撮像装置101は、被写体からの光を受光して光電変換し、画像信号を生成することで画像を撮像するものである。 The solid-state image sensor 101 is, for example, a back-illuminated image sensor using CMOS (Complementary Metal Oxide Semiconductor). The solid-state image sensor 101 receives light from a subject, performs photoelectric conversion, and generates an image signal to capture an image.
 裏面照射型イメージセンサとは、被写体からの光を受光して電気信号に変換するフォトダイオード等の光電変換部が、被写体からの光が入射する受光面と、各画素を駆動させるトランジスタ等の配線が設けられた配線層との間に設けられている構成のイメージセンサをいう。 The back-illuminated image sensor is a wiring such as a light receiving surface on which light from a subject is incident and a transistor or the like that drives each pixel by a photoelectric conversion unit such as a photodiode that receives light from the subject and converts it into an electric signal. Refers to an image sensor having a configuration provided between the wiring layer and the wiring layer provided with the above.
 固体撮像装置101は、例えば、画素アレイ部111、垂直駆動部112、カラム信号処理部113、データ格納部119、水平駆動部114、システム制御部115、および信号処理部118を備えている。 The solid-state imaging device 101 includes, for example, a pixel array unit 111, a vertical drive unit 112, a column signal processing unit 113, a data storage unit 119, a horizontal drive unit 114, a system control unit 115, and a signal processing unit 118.
 固体撮像装置101では、画素アレイ部111が半導体基板1(後出)を有している。垂直駆動部112、カラム信号処理部113、データ格納部119、水平駆動部114、システム制御部115、および信号処理部118などの周辺回路は、例えば、画素アレイ部111と同じ半導体基板1上に形成される。 In the solid-state image sensor 101, the pixel array unit 111 has a semiconductor substrate 1 (described later). Peripheral circuits such as the vertical drive unit 112, the column signal processing unit 113, the data storage unit 119, the horizontal drive unit 114, the system control unit 115, and the signal processing unit 118 are, for example, on the same semiconductor substrate 1 as the pixel array unit 111. It is formed.
 画素アレイ部111は、被写体から入射する光の量に応じた光電荷を生成して蓄積する光電変換部(後出)を含む単位画素110を複数有する。単位画素110は、図1に示したように、横方向(行方向)および縦方向(列方向)のそれぞれに配列される。画素アレイ部111では、行方向に一列に配列された単位画素110からなる画素行ごとに、画素駆動線116が行方向に沿って配線され、列方向に一列に配列された単位画素110からなる画素列ごとに、垂直信号線(VSL)117が列方向に沿って配線されている。 The pixel array unit 111 has a plurality of unit pixels 110 including a photoelectric conversion unit (described later) that generates and stores light charges according to the amount of light incident from the subject. As shown in FIG. 1, the unit pixels 110 are arranged in the horizontal direction (row direction) and the vertical direction (column direction), respectively. In the pixel array unit 111, the pixel drive line 116 is wired along the row direction for each pixel row consisting of the unit pixels 110 arranged in a row in the row direction, and is composed of the unit pixels 110 arranged in a row in the column direction. A vertical signal line (VSL) 117 is wired along the column direction for each pixel array.
 垂直駆動部112は、シフトレジスタやアドレスデコーダなどからなる。垂直駆動部112は、複数の画素駆動線116を介して複数の単位画素110に対し信号等をそれぞれ供給することにより、画素アレイ部111における複数の単位画素110の全てを同時に駆動させ、または画素行単位で駆動させる。 The vertical drive unit 112 includes a shift register, an address decoder, and the like. The vertical drive unit 112 simultaneously drives all of the plurality of unit pixels 110 in the pixel array unit 111 by supplying signals or the like to the plurality of unit pixels 110 via the plurality of pixel drive lines 116, or pixels. Drive in line units.
 垂直駆動部112は、例えば読み出し走査系と掃き出し走査系との2つの走査系を有する。読み出し走査系は、単位画素110から信号を読み出すために、画素アレイ部111の単位画素110を行単位で順に選択走査する。行駆動(ローリングシャッタ動作)の場合、掃き出しについては、読み出し走査系によって読み出し走査が行われる読み出し行に対して、その読み出し走査よりもシャッタスピードの時間分だけ先行して掃き出し走査が行なわれる。また、グローバル露光(グローバルシャッタ動作)の場合は、一括転送よりもシャッタスピードの時間分先行して一括掃き出しが行なわれる。 The vertical drive unit 112 has, for example, two scanning systems, a read scanning system and a sweep scanning system. In order to read a signal from the unit pixel 110, the read-out scanning system selectively scans the unit pixel 110 of the pixel array unit 111 row by row. In the case of row drive (rolling shutter operation), the sweep scan is performed in advance of the read scan for which the read scan is performed by the read scan system by the time of the shutter speed. Further, in the case of global exposure (global shutter operation), batch sweeping is performed prior to batch transfer by the time of the shutter speed.
 この掃き出し走査系による掃き出し走査により、読み出し行の単位画素110の光電変換部PD1,PD2(後出)から不要な光電荷が掃き出される。これをリセットという。そして、この掃き出し走査系による不要電荷の掃き出し、すなわちリセットにより、いわゆる電子シャッタ動作が行われる。ここで、電子シャッタ動作とは、光電変換部PD1,PD2の光電荷を捨てて、新たに露光を開始する、すなわち光電荷の蓄積を新たに開始する動作のことをいう。 By the sweep scan by this sweep scan system, unnecessary optical charges are swept out from the photoelectric conversion units PD1 and PD2 (described later) of the unit pixel 110 of the read row. This is called reset. Then, the so-called electronic shutter operation is performed by sweeping out unnecessary charges by this sweep-out scanning system, that is, resetting. Here, the electronic shutter operation refers to an operation in which the optical charges of the photoelectric conversion units PD1 and PD2 are discarded and exposure is newly started, that is, the accumulation of optical charges is newly started.
 読み出し走査系による読み出し動作によって読み出される信号は、その直前の読み出し動作または電子シャッタ動作以降に入射した光量に対応する。行駆動の場合は、直前の読み出し動作による読み出しタイミングまたは電子シャッタ動作による掃出しタイミングから、今回の読み出し動作による読み出しタイミングまでの期間が、各単位画素110における光電荷の蓄積期間、すなわち露光期間となる。グローバル露光の場合は、一括掃き出しから一括転送までの期間が光電荷の蓄積期間、すなわち露光期間となる。 The signal read by the read operation by the read scan system corresponds to the amount of light incidented after the read operation immediately before or the electronic shutter operation. In the case of row drive, the period from the read timing by the immediately preceding read operation or the sweep timing by the electronic shutter operation to the read timing by the current read operation is the light charge accumulation period in each unit pixel 110, that is, the exposure period. .. In the case of global exposure, the period from batch sweeping to batch transfer is the light charge accumulation period, that is, the exposure period.
 垂直駆動部112によって選択走査された画素行の各単位画素110から出力される画素信号は、垂直信号線117の各々を通してカラム信号処理部113に供給されるようになっている。カラム信号処理部113は、画素アレイ部111の画素列ごとに、選択行の各単位画素110から垂直信号線117を通して出力される画素信号に対して所定の信号処理を行うとともに、信号処理後の画素信号を一時的に保持するようになっている。 The pixel signal output from each unit pixel 110 of the pixel row selectively scanned by the vertical drive unit 112 is supplied to the column signal processing unit 113 through each of the vertical signal lines 117. The column signal processing unit 113 performs predetermined signal processing on the pixel signal output from each unit pixel 110 of the selected row through the vertical signal line 117 for each pixel column of the pixel array unit 111, and after the signal processing, the column signal processing unit 113 performs predetermined signal processing. The pixel signal is temporarily held.
 具体的には、カラム信号処理部113は、例えばシフトレジスタやアドレスデコーダなどからなり、ノイズ除去処理、相関二重サンプリング処理、アナログ画素信号のA/D(Analog/Digital)変換A/D変換処理等を行い、ディジタル画素信号を生成する。カラム信号処理部113は、生成した画素信号を信号処理部118に供給する。 Specifically, the column signal processing unit 113 includes, for example, a shift register and an address decoder, and includes noise removal processing, correlated double sampling processing, and A / D (Analog / Digital) conversion A / D conversion processing of analog pixel signals. Etc. to generate a digital pixel signal. The column signal processing unit 113 supplies the generated pixel signal to the signal processing unit 118.
 水平駆動部114は、シフトレジスタやアドレスデコーダなどによって構成され、カラム信号処理部113の画素列に対応する単位回路を順番に選択するようになっている。この水平駆動部114による選択走査により、カラム信号処理部113において単位回路ごとに信号処理された画素信号が順番に信号処理部118に出力されるようになっている。 The horizontal drive unit 114 is composed of a shift register, an address decoder, and the like, and the unit circuit corresponding to the pixel sequence of the column signal processing unit 113 is sequentially selected. By the selective scanning by the horizontal drive unit 114, the pixel signals signal-processed for each unit circuit in the column signal processing unit 113 are sequentially output to the signal processing unit 118.
 システム制御部115は、各種のタイミング信号を生成するタイミングジェネレータ等からなる。システム制御部115は、タイミングジェネレータで生成されたタイミング信号に基づいて、垂直駆動部112、カラム信号処理部113、および水平駆動部114の駆動制御を行なうものである。 The system control unit 115 includes a timing generator or the like that generates various timing signals. The system control unit 115 controls the drive of the vertical drive unit 112, the column signal processing unit 113, and the horizontal drive unit 114 based on the timing signal generated by the timing generator.
 信号処理部118は、必要に応じてデータ格納部119にデータを一時的に格納しながら、カラム信号処理部113から供給された画素信号に対して演算処理等の信号処理を行ない、各画素信号からなる画像信号を出力するものである。 The signal processing unit 118 temporarily stores data in the data storage unit 119 as necessary, and performs signal processing such as arithmetic processing on the pixel signal supplied from the column signal processing unit 113, and each pixel signal. It outputs an image signal consisting of.
 データ格納部119は、信号処理部118での信号処理にあたり、その信号処理に必要なデータを一時的に格納するようになっている。 The data storage unit 119 temporarily stores the data necessary for the signal processing when the signal processing unit 118 performs signal processing.
[単位画素110の構成]
(平面構成例および断面構成例)
 次に、図2および図3を参照して、図1の画素アレイ部111に設けられた単位画素110の平面構成例および断面構成例について説明する。図2は、画素アレイ部111を構成する複数の単位画素110のうちの1つの単位画素110の断面構成例を示している。図3は、1つの単位画素110の断面構成例を示している。なお、図2は、図3に示したII-II切断線に沿った矢視方向の断面に相当する。
[Structure of unit pixel 110]
(Example of plane configuration and example of cross-section configuration)
Next, a plan configuration example and a cross-sectional configuration example of the unit pixel 110 provided in the pixel array unit 111 of FIG. 1 will be described with reference to FIGS. 2 and 3. FIG. 2 shows a cross-sectional configuration example of one unit pixel 110 among a plurality of unit pixels 110 constituting the pixel array unit 111. FIG. 3 shows an example of cross-sectional configuration of one unit pixel 110. Note that FIG. 2 corresponds to a cross section in the arrow-viewing direction along the II-II cutting line shown in FIG.
 図2および図3に示したように、各単位画素110における半導体基板1は、第1領域部分R1および第2領域部分R2を有する。第1領域部分R1および第2領域部分R2は、いずれもXY面内において矩形状の外縁を有しており、各々の外縁の形状および大きさは互いに等しくなっているとよい。半導体基板1は、Si(シリコン)などの半導体材料により形成されている。半導体基板1は、第1の面としての裏面1BSと、第2の面としての表面1FSとを含んでいる。表面1FSおよび裏面1BSは、いずれもXY面内に沿って広がっており、XY面と直交する厚さ方向(Z軸方向)において互いに反対側に位置する。第1領域部分R1と第2領域部分R2とは、XY面内において、例えばY軸方向に隣り合うように設けられている。なお、本実施の形態では、裏面1BSが、外部からの光Lが入射する入射面である。各単位画素110では、半導体基板1の裏面1BSに、カラーフィルタCFとオンチップレンズOCLとが順に積層されるように設けられている。したがって、裏面1BSには、外部からの光LがオンチップレンズOCLにより集光されつつカラーフィルタCFを透過して入射するようになっている。なお、XY面内において隣り合う単位画素110同士の画素間領域には、例えばカラーフィルタCFと同じ階層に画素間遮光部7が設けられていてもよい。 As shown in FIGS. 2 and 3, the semiconductor substrate 1 in each unit pixel 110 has a first region portion R1 and a second region portion R2. Both the first region portion R1 and the second region portion R2 have a rectangular outer edge in the XY plane, and it is preferable that the shapes and sizes of the outer edges are equal to each other. The semiconductor substrate 1 is made of a semiconductor material such as Si (silicon). The semiconductor substrate 1 includes a back surface 1BS as a first surface and a front surface 1FS as a second surface. Both the front surface 1FS and the back surface 1BS extend along the XY plane and are located on opposite sides of each other in the thickness direction (Z-axis direction) orthogonal to the XY plane. The first region portion R1 and the second region portion R2 are provided so as to be adjacent to each other in the XY plane, for example, in the Y-axis direction. In this embodiment, the back surface 1BS is an incident surface on which light L from the outside is incident. In each unit pixel 110, the color filter CF and the on-chip lens OCL are provided so as to be laminated in order on the back surface 1BS of the semiconductor substrate 1. Therefore, the light L from the outside passes through the color filter CF and is incident on the back surface 1BS while being focused by the on-chip lens OCL. In the inter-pixel region between adjacent unit pixels 110 in the XY plane, for example, the inter-pixel shading portion 7 may be provided in the same layer as the color filter CF.
 単位画素110のうちの第1領域部分R1には、光電変換部PD1が設けられている。光電変換部PD1は、裏面1BSから入射する光L1を検出して光電変換を行うことにより、光電荷を生成するようになっている。同様に、単位画素110のうちの第2領域部分R2には、光電変換部PD2が設けられている。光電変換部PD2は、裏面1BSから入射する光L2を検出して光電変換を行うことにより、光電荷を生成するようになっている。なお、図2では、光Lのうち第1領域部分R1に入射する光をL1と記載し、光Lのうち第2領域部分R2に入射する光をL2と記載している。 A photoelectric conversion unit PD1 is provided in the first region portion R1 of the unit pixel 110. The photoelectric conversion unit PD1 generates a light charge by detecting the light L1 incident on the back surface 1BS and performing photoelectric conversion. Similarly, the photoelectric conversion unit PD2 is provided in the second region portion R2 of the unit pixel 110. The photoelectric conversion unit PD2 detects the light L2 incident from the back surface 1BS and performs photoelectric conversion to generate a light charge. In FIG. 2, the light incident on the first region portion R1 of the light L is described as L1, and the light incident on the second region portion R2 of the light L is described as L2.
 単位画素110には、第1領域部分R1と第2領域部分R2とを物理的に隔てるように、裏面1BSから厚さ方向(Z軸方向)に沿って延びる壁状の領域分離部4が設けられている。領域分離部4は、第1領域部分R1と第2領域部分R2とを物理的に分離するようになっている。単位画素110における第1領域部分R1および第2領域部分R2は、領域分離部4により、互いに電気的に分離され、もしくは光学的に分離され、または、光学的かつ電気的に分離される。領域分離部4は、例えば酸化シリコン(SiO2)、酸化タンタル(Ta25)、酸化ハフニウム(HfO2)、酸化アルミニウム(Al23)などの絶縁体の単層膜もしくは多層膜で形成されていてもよい。また、領域分離部4は、酸化タンタル、酸化ハフニウム、酸化アルミニウム等の絶縁体の単層膜あるいは多層膜と、酸化シリコン膜との積層体で形成されていてもよい。上記の絶縁体で形成された領域分離部4は、光学的かつ電気的に単位画素110を分離することができる。領域分離部4は、その内部に空隙を含むものであってもよい。その場合であっても、領域分離部4は、第1領域部分R1と第2領域部分R2とを、光学的かつ電気的に分離できる。また、領域分離部4は、例えばタンタル(Ta),アルミニウム(Al),銀(Ag),金(Au)および銅(Cu)などの遮光性の高い金属により形成されていてもよい。この場合には、光学的に第1領域部分R1と第2領域部分R2とを分離することができる。さらに、領域分離部4の構成材料として、ポリシリコン(Polycrystalline Silicon)を用いることもできる。 The unit pixel 110 is provided with a wall-shaped region separating portion 4 extending from the back surface 1BS along the thickness direction (Z-axis direction) so as to physically separate the first region portion R1 and the second region portion R2. Has been done. The region separation unit 4 physically separates the first region portion R1 and the second region portion R2. The first region portion R1 and the second region portion R2 in the unit pixel 110 are electrically separated from each other, optically separated from each other, or optically and electrically separated from each other by the region separation unit 4. The region separation portion 4 is a single-layer film or a multilayer film of an insulator such as silicon oxide (SiO 2 ), tantalum pentoxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ), and aluminum oxide (Al 2 O 3 ). It may be formed. Further, the region separation portion 4 may be formed of a laminated body of a single-layer film or a multilayer film of an insulator such as tantalum oxide, hafnium oxide, or aluminum oxide, and a silicon oxide film. The region separation unit 4 formed of the insulator can optically and electrically separate the unit pixels 110. The region separation portion 4 may include a void inside thereof. Even in that case, the region separation unit 4 can optically and electrically separate the first region portion R1 and the second region portion R2. Further, the region separating portion 4 may be formed of a metal having a high light-shielding property such as tantalum (Ta), aluminum (Al), silver (Ag), gold (Au) and copper (Cu). In this case, the first region portion R1 and the second region portion R2 can be optically separated. Further, polysilicon can be used as a constituent material of the region separation unit 4.
 さらに、単位画素110は、領域分離部4と表面1FSとの間であって厚さ方向において領域分離部4と重なり合う位置に設けられた電荷経路部5を有している。電荷経路部5には、ブルーミングパスとも呼ばれ、光電変換部PD1および光電変換部PD2において生成される光電荷が通過するようになっている。ここで、領域分離部4と電荷経路部5とは互いに接していることが望ましい。 Further, the unit pixel 110 has a charge path portion 5 provided between the region separation portion 4 and the surface 1FS at a position overlapping with the region separation portion 4 in the thickness direction. Also called a blooming path, the electric charge generated in the photoelectric conversion unit PD1 and the photoelectric conversion unit PD2 passes through the charge path unit 5. Here, it is desirable that the region separation portion 4 and the charge path portion 5 are in contact with each other.
 単位画素110には、例えばXY面内において第1領域部分R1および第2領域部分R2を一体に取り囲む画素分離部3をさらに有する。画素分離部3は、領域分離部4と同様に、裏面1BSから厚さ方向(Z軸方向)に沿って延びる壁状をなしている。すなわち、単位画素110は、画素分離部3によって仕切られた1つの画素領域に1つずつ形成されている。隣接する単位画素110同士は、画素分離部3により、互いに電気的に分離され、もしくは光学的に分離され、または、光学的かつ電気的に分離される。画素分離部3は、例えば領域分離部4と同様の材料により形成することができる。なお、画素分離部3と表面1FSとの間であって厚さ方向において画素分離部3と重なり合う位置には、絶縁部6が設けられていてもよい。 The unit pixel 110 further includes, for example, a pixel separation unit 3 that integrally surrounds the first region portion R1 and the second region portion R2 in the XY plane. Similar to the region separation unit 4, the pixel separation unit 3 has a wall shape extending from the back surface 1BS along the thickness direction (Z-axis direction). That is, the unit pixels 110 are formed one by one in one pixel region partitioned by the pixel separation unit 3. The adjacent unit pixels 110 are electrically separated from each other, optically separated from each other, or optically and electrically separated from each other by the pixel separation unit 3. The pixel separation unit 3 can be formed of, for example, the same material as the region separation unit 4. An insulating portion 6 may be provided between the pixel separating portion 3 and the surface 1FS at a position where the pixel separating portion 3 overlaps with the pixel separating portion 3 in the thickness direction.
 第1領域部分R1には、転送トランジスタTG1と、第1の電荷電圧変換部としてのフローティングディフュージョンFD1とがさらに設けられている。同様に、第2領域部分R2には、転送トランジスタTG2と、第2の電荷電圧変換部としてのフローティングディフュージョンFD2とが設けられている。図2に示したように、単位画素110では、例えばフローティングディフュージョンFD1は厚さ方向(Z軸方向)において表面1FSと光電変換部PD1との間に設けられている。同様に、フローティングディフュージョンFD2は厚さ方向(Z軸方向)において表面1FSと光電変換部PD2との間に設けられている。フローティングディフュージョンFD1,FD2は、それぞれ、光電変換部PD1,PD2において生成されたのち転送トランジスタTG1,TG2を介して転送される光電荷を一時的に保持する領域である。また、フローティングディフュージョンFD1,FD2は、それぞれ、光電変換部PD1,PD2からの光電荷を電気信号(例えば、電圧信号)に変換して出力する浮遊拡散領域でもある。 The transfer transistor TG1 and the floating diffusion FD1 as the first charge-voltage conversion unit are further provided in the first region portion R1. Similarly, the second region portion R2 is provided with a transfer transistor TG2 and a floating diffusion FD2 as a second charge-voltage conversion unit. As shown in FIG. 2, in the unit pixel 110, for example, the floating diffusion FD1 is provided between the surface 1FS and the photoelectric conversion unit PD1 in the thickness direction (Z-axis direction). Similarly, the floating diffusion FD2 is provided between the surface 1FS and the photoelectric conversion unit PD2 in the thickness direction (Z-axis direction). The floating diffusion FD1 and FD2 are regions that temporarily hold the optical charges generated in the photoelectric conversion units PD1 and PD2 and then transferred via the transfer transistors TG1 and TG2, respectively. Further, the floating diffusion FD1 and FD2 are also floating diffusion regions that convert the optical charges from the photoelectric conversion units PD1 and PD2 into electric signals (for example, voltage signals) and output them.
 電荷経路部5は、主たる材料として、例えば結晶シリコンまたは非晶質シリコンを含む。電荷経路部5が主として結晶シリコンを含む場合、例えばSi基板である半導体基板1に対し還元性雰囲気中においてアニール処理を行い、Si基板に含まれるケイ素(Si)原子をマイグレーションさせることで電荷経路部5を形成することができる。あるいは、エピタキシャル成長法により主として結晶シリコンを含む電荷経路部5を形成するようにしてもよい。また、電荷経路部5が主として非晶質シリコンを含む場合、例えばスパッタリング法やCVD法などの気相蒸着法により電荷経路部5を生成することができる。 The charge path portion 5 contains, for example, crystalline silicon or amorphous silicon as the main material. When the charge path portion 5 mainly contains crystalline silicon, for example, the semiconductor substrate 1 which is a Si substrate is annealed in a reducing atmosphere, and the silicon (Si) atom contained in the Si substrate is migrated to migrate the charge path portion. 5 can be formed. Alternatively, the charge path portion 5 mainly containing crystalline silicon may be formed by an epitaxial growth method. Further, when the charge path portion 5 mainly contains amorphous silicon, the charge path portion 5 can be generated by a vapor deposition method such as a sputtering method or a CVD method.
 画素アレイ部111には、表面1FSを覆う配線層2がさらに設けられている。図4は、単位画素110における配線層2のレイアウトを表す平面模式図である。図4では、画素分離部3、領域分離部4、および光電変換部PD1,PD2などを併せて破線で示している。また、図5は、単位画素110の回路構成例を表している。 The pixel array unit 111 is further provided with a wiring layer 2 that covers the surface 1FS. FIG. 4 is a schematic plan view showing the layout of the wiring layer 2 in the unit pixel 110. In FIG. 4, the pixel separation unit 3, the region separation unit 4, the photoelectric conversion units PD1, PD2, and the like are shown together by a broken line. Further, FIG. 5 shows an example of a circuit configuration of the unit pixel 110.
 図4に示したように、配線層2には、転送トランジスタTG1,TG2、接続部11、増幅トランジスタAMP1,AMP2、配線12、リセットトランジスタRST、および選択トランジスタSELなどが設けられている。接続部11は、フローティングディフュージョンFD1とフローティングディフュージョンFD2とをつないでいる。配線12は、接続部11と、増幅トランジスタAMP1および増幅トランジスタAMP2とをつないでいる。したがって、増幅トランジスタAMP1および増幅トランジスタAMP2は配線12を介して1つの増幅トランジスタAMPを形成している。ここで、転送トランジスタTG1、リセットトランジスタRST、および増幅トランジスタAMP1は、第1領域部分R1と厚さ方向に対応する位置に設けられている。一方、転送トランジスタTG2、選択トランジスタSEL、および増幅トランジスタAMP2は、第2領域部分R2と厚さ方向に対応する位置に設けられている。単位画素110では、フローティングディフュージョンFD、リセットトランジスタRST、選択トランジスタSEL、および増幅トランジスタAMPは、第1領域部分R1と第2領域部分R2とで共有されるようになっている。なお、図5では、増幅トランジスタAMP1と増幅トランジスタAMP2とが一体となった増幅トランジスタAMPとして記載している。 As shown in FIG. 4, the wiring layer 2 is provided with transfer transistors TG1 and TG2, a connection portion 11, amplification transistors AMP1 and AMP2, wiring 12, a reset transistor RST, a selection transistor SEL, and the like. The connection portion 11 connects the floating diffusion FD1 and the floating diffusion FD2. The wiring 12 connects the connection portion 11 with the amplification transistor AMP1 and the amplification transistor AMP2. Therefore, the amplification transistor AMP1 and the amplification transistor AMP2 form one amplification transistor AMP via the wiring 12. Here, the transfer transistor TG1, the reset transistor RST, and the amplification transistor AMP1 are provided at positions corresponding to the first region portion R1 in the thickness direction. On the other hand, the transfer transistor TG2, the selection transistor SEL, and the amplification transistor AMP2 are provided at positions corresponding to the second region portion R2 in the thickness direction. In the unit pixel 110, the floating diffusion FD, the reset transistor RST, the selection transistor SEL, and the amplification transistor AMP are shared by the first region portion R1 and the second region portion R2. In FIG. 5, the amplification transistor AMP in which the amplification transistor AMP1 and the amplification transistor AMP2 are integrated is described.
 図5に示したように、光電変換部PD1は、例えばアノード端子が接地されると共に、カソード端子が転送トランジスタTG1を介してフローティングディフュージョンFD1に接続されている。同様に、光電変換部PD2は、例えばアノード端子が接地されると共に、カソード端子が転送トランジスタTG2を介してフローティングディフュージョンFD2に接続されている。 As shown in FIG. 5, in the photoelectric conversion unit PD1, for example, the anode terminal is grounded and the cathode terminal is connected to the floating diffusion FD1 via the transfer transistor TG1. Similarly, in the photoelectric conversion unit PD2, for example, the anode terminal is grounded and the cathode terminal is connected to the floating diffusion FD2 via the transfer transistor TG2.
 転送トランジスタTG1,TG2は、それぞれ転送信号によりオンされたとき、光電変換部PD1,PD2において生成された光電荷を読み出し、フローティングディフュージョンFD1,FD2に転送するようになっている。 When the transfer transistors TG1 and TG2 are turned on by the transfer signal, the optical charges generated by the photoelectric conversion units PD1 and PD2 are read out and transferred to the floating diffusion FD1 and FD2, respectively.
 フローティングディフュージョンFD1,FD2は、転送トランジスタTG1,TG2により光電変換部PD1,PD2から読み出された光電荷を保持する。また、フローティングディフュージョンFD1,FD2は、それらの光電荷を電気信号(例えば、電圧信号)に変換して出力するようになっている。 The floating diffusion FD1 and FD2 hold the optical charge read from the photoelectric conversion units PD1 and PD2 by the transfer transistors TG1 and TG2. Further, the floating diffusion FD1 and FD2 are adapted to convert their optical charges into electric signals (for example, voltage signals) and output them.
 リセットトランジスタRSTは、リセット信号によりオンされたとき、フローティングディフュージョンFD1,FD2に蓄積されている光電荷をドレイン、すなわち定電圧源Vddに排出するようになっている。そうすることにより、リセットトランジスタRSTは、フローティングディフュージョンFD1,FD2の電位をリセットする。 When the reset transistor RST is turned on by the reset signal, the optical charge accumulated in the floating diffusion FD1 and FD2 is discharged to the drain, that is, the constant voltage source Vdd. By doing so, the reset transistor RST resets the potentials of the floating diffusion FD1 and FD2.
 増幅トランジスタAMPは、フローティングディフュージョンFD1,FD2の電位に応じた画素信号を出力するようになっている。すなわち、増幅トランジスタAMPは、垂直信号線117を介して接続されている定電流源とソースフォロワ回路を構成している。フローティングディフュージョンFD1,FD2に蓄積されている光電荷に応じたレベルを示す画素信号が、増幅トランジスタAMPから選択トランジスタSELと垂直信号線117とを介してカラム信号処理部113(図1)に出力されるようになっている。 The amplification transistor AMP is designed to output a pixel signal corresponding to the potential of the floating diffusion FD1 and FD2. That is, the amplification transistor AMP constitutes a source follower circuit with a constant current source connected via the vertical signal line 117. A pixel signal indicating a level corresponding to the optical charge stored in the floating diffusion FD1 and FD2 is output from the amplification transistor AMP to the column signal processing unit 113 (FIG. 1) via the selection transistor SEL and the vertical signal line 117. It has become so.
 選択トランジスタSELは、選択信号によりある単位画素110が選択されたときにオンされ、選択された単位画素110の画素信号を、垂直信号線117を介してカラム信号処理部113に出力するようになっている。なお、転送信号、選択信号、およびリセット信号がそれぞれ伝送される各信号線は、図1に示した画素駆動線116に相当する。 The selection transistor SEL is turned on when a certain unit pixel 110 is selected by the selection signal, and the pixel signal of the selected unit pixel 110 is output to the column signal processing unit 113 via the vertical signal line 117. ing. Each signal line through which the transfer signal, the selection signal, and the reset signal are transmitted corresponds to the pixel drive line 116 shown in FIG.
 図2に示したように、単位画素110においては、1つのオンチップレンズOCLの直下に、すなわち、Z軸方向において1つのオンチップレンズOCLの重なり合う位置に、2つの光電変換部PD1,PD2が設けられている。なお、以下の説明では、このような構造を、2PD構造と表記する場合がある。 As shown in FIG. 2, in the unit pixel 110, two photoelectric conversion units PD1 and PD2 are directly below one on-chip lens OCL, that is, at a position where one on-chip lens OCL overlaps in the Z-axis direction. It is provided. In the following description, such a structure may be referred to as a 2PD structure.
 単位画素110において、オンチップレンズOCLに入射した光Lは、オンチップレンズOCLにより集光されつつカラーフィルタCFを通過したのち、裏面1BSから第1領域部分R1の光電変換部PD1または第2領域部分R2の光電変換部PD2を照射する。ここで、光電変換部PD1を照射する光を光L1とし、光電変換部PD2を照射する光を光L2とする。 In the unit pixel 110, the light L incident on the on-chip lens OCL passes through the color filter CF while being focused by the on-chip lens OCL, and then from the back surface 1BS to the photoelectric conversion unit PD1 or the second region of the first region portion R1. The photoelectric conversion unit PD2 of the portion R2 is irradiated. Here, the light that irradiates the photoelectric conversion unit PD1 is referred to as light L1, and the light that irradiates the photoelectric conversion unit PD2 is referred to as light L2.
 光電変換部PD1を照射する光L1の光量と、光電変換部PD2を照射する光L2の光量との割合は、例えば裏面1BSに対する光Lの入射角θに依存する。図6は、光電変換部PD1および光電変換部PD2のそれぞれにおける、光Lの入射角θの変化に対する出力の依存性を表す特性図である。図6では、光電変換部PD1の出力の入射角θ依存性を実線の曲線PD1で表し、光電変換部PD2の出力の入射角θ依存性を破線の曲線PD2で表している。例えば裏面1BSに対し光Lが垂直に入射する場合、すなわち入射角θ=0°の場合、光L1の光量と光L2の光量とが互いに等しくなる。このため、図6に示したように、光電変換部PD1の出力と光電変換部PD2の出力とが等しくなる。 The ratio of the amount of light L1 irradiating the photoelectric conversion unit PD1 to the amount of light L2 irradiating the photoelectric conversion unit PD2 depends on, for example, the incident angle θ of the light L with respect to the back surface 1BS. FIG. 6 is a characteristic diagram showing the dependence of the output on the change in the incident angle θ of the light L in each of the photoelectric conversion unit PD1 and the photoelectric conversion unit PD2. In FIG. 6, the incident angle θ dependence of the output of the photoelectric conversion unit PD1 is represented by the solid line curve PD1, and the incident angle θ dependence of the output of the photoelectric conversion unit PD2 is represented by the broken line curve PD2. For example, when the light L is vertically incident on the back surface 1BS, that is, when the incident angle θ = 0 °, the light amount of the light L1 and the light amount of the light L2 are equal to each other. Therefore, as shown in FIG. 6, the output of the photoelectric conversion unit PD1 and the output of the photoelectric conversion unit PD2 are equal to each other.
 図6に示したように、光電変換部PD1の出力と光電変換部PD2の出力とは、入射角θ=0を中心として、入射角θの変化に対し対称の関係にある。光電変換部PD1の出力と光電変換部PD2の出力とは、例えば位相差検出を行うために用いることができる。ところが、例えば光電変換部PD1を集中的に光Lが照射している場合に、光電変換部PD1に入射すべき光L1の一部が光電変換部PD2に意図せず入射してしまうと、光電変換部PD2からの出力が増加し、位相差検出の精度が低下してしまうおそれがある。 As shown in FIG. 6, the output of the photoelectric conversion unit PD1 and the output of the photoelectric conversion unit PD2 have a symmetrical relationship with respect to the change of the incident angle θ with the incident angle θ = 0 as the center. The output of the photoelectric conversion unit PD1 and the output of the photoelectric conversion unit PD2 can be used, for example, for performing phase difference detection. However, for example, when the light L is intensively irradiating the photoelectric conversion unit PD1, if a part of the light L1 that should be incident on the photoelectric conversion unit PD1 is unintentionally incident on the photoelectric conversion unit PD2, the photoelectric conversion unit PD2 is charged. The output from the conversion unit PD2 may increase, and the accuracy of phase difference detection may decrease.
 そこで、本実施の形態の単位画素110では、裏面1BSから表面1FSへ向けて厚さ方向に延在する領域分離部4を設けるようにしている。このため、光電変換部PD1からの出力と光電変換部PD2からの出力との混在を回避し、位相差検出精度の向上を図ることができる。 Therefore, in the unit pixel 110 of the present embodiment, the region separation portion 4 extending in the thickness direction from the back surface 1BS to the front surface 1FS is provided. Therefore, it is possible to avoid mixing the output from the photoelectric conversion unit PD1 and the output from the photoelectric conversion unit PD2, and improve the phase difference detection accuracy.
[固体撮像装置101の製造方法]
 次に、図7A~7Fを参照して、固体撮像装置101の製造方法について説明する。図7A~7Fは、それぞれ、固体撮像装置101の製造方法の一工程を模式的に表す断面図である。
[Manufacturing method of solid-state image sensor 101]
Next, a method of manufacturing the solid-state image sensor 101 will be described with reference to FIGS. 7A to 7F. 7A to 7F are cross-sectional views schematically showing one step of the manufacturing method of the solid-state image sensor 101, respectively.
 まず、図7Aに示したように、Si基板からなる半導体基板1を用意したのち、その表面1FSから厚さ方向(Z軸方向)に選択的に掘り下げることにより、画素分離部3および領域分離部4をそれぞれ形成すべき所望の位置にトレンチ1TRを形成する。 First, as shown in FIG. 7A, a semiconductor substrate 1 made of a Si substrate is prepared, and then the pixel separation portion 3 and the region separation portion are selectively dug from the surface 1FS in the thickness direction (Z-axis direction). The trench 1TR is formed at a desired position where each of the 4's should be formed.
 次に、図7Bに示したように、トレンチ1TRを埋めるように、画素分離部3および領域分離部4と、画素分離部3および領域分離部4と表面1FSとの間を埋める絶縁部とをそれぞれ形成する。 Next, as shown in FIG. 7B, the pixel separation portion 3 and the region separation portion 4 and the insulating portion filling the space between the pixel separation portion 3 and the region separation portion 4 and the surface 1FS are provided so as to fill the trench 1TR. Form each.
 次に、図7Cに示したように、表面1FSの全体を覆うように、例えばSiNxなどの絶縁膜からなるハードマスクHMを、例えばCVD法により形成する。さらに、フォトリソグラフィ法により、ハードマスクHMを選択的に覆うレジストマスクRMを形成する。レジストマスクRMは、電荷経路部5を形成すべき位置、すなわち、例えば領域分離部4の直上に開口RM-Kを有している。 Next, as shown in FIG. 7C, a hard mask HM made of an insulating film such as SiNx is formed by, for example, a CVD method so as to cover the entire surface 1FS. Further, a resist mask RM that selectively covers the hard mask HM is formed by a photolithography method. The resist mask RM has an opening RM-K at a position where the charge path portion 5 should be formed, that is, immediately above, for example, the region separation portion 4.
 続いて、図7Dに示したように、例えばドライエッチングにより、ハードマスクHMのうち、レジストマスクRMにより覆われずに露出した部分を除去し、ハードマスクHMに開口HM-Kを形成する。さらに、開口HM-Kが形成されたハードマスクHMを用いたウェットエッチングにより、領域分離部4の直上にある絶縁部6を除去し、凹部Uを形成する。なお、凹部Uを形成する際、領域分離部4の上端部分を除去するようにしてもよい。 Subsequently, as shown in FIG. 7D, the exposed portion of the hard mask HM that is not covered by the resist mask RM is removed by dry etching, for example, and an opening HM-K is formed in the hard mask HM. Further, the insulating portion 6 directly above the region separating portion 4 is removed by wet etching using the hard mask HM having the opening HM-K formed, and the concave portion U is formed. When forming the recess U, the upper end portion of the region separating portion 4 may be removed.
 凹部Uを形成したのちハードマスクHMを除去し、図7Eに示したように、凹部Uを埋めるように電荷経路部5を形成する。具体的には、例えば水素雰囲気などの還元性雰囲気中において半導体基板1の全体についてアニール処理を行い、半導体基板1に含まれるケイ素を凹部Uにマイグレーションさせることで電荷経路部5を形成することができる。あるいは、ハードマスクHMを除去せずにエピタキシャル成長法により凹部Uに結晶シリコンを形成するようにしてもよい。または、ハードマスクHMを除去せずに気相蒸着法により凹部Uに非晶質シリコンを形成することで電荷経路部5を形成するようにしてもよい。エピタキシャル成長法や気相蒸着法を用いて電荷経路部5を形成した場合は、電荷経路部5を形成したのちにハードマスクHMを除去する。 After forming the recess U, the hard mask HM is removed, and as shown in FIG. 7E, the charge path portion 5 is formed so as to fill the recess U. Specifically, the charge path portion 5 can be formed by subjecting the entire semiconductor substrate 1 to an annealing treatment in a reducing atmosphere such as a hydrogen atmosphere and migrating the silicon contained in the semiconductor substrate 1 to the recess U. can. Alternatively, crystalline silicon may be formed in the recess U by the epitaxial growth method without removing the hard mask HM. Alternatively, the charge path portion 5 may be formed by forming amorphous silicon in the recess U by a vapor deposition method without removing the hard mask HM. When the charge path portion 5 is formed by the epitaxial growth method or the vapor deposition method, the hard mask HM is removed after the charge path portion 5 is formed.
 なお、凹部Uを埋めるように形成される電荷経路部5の上端部分は、表面1FSと一致していなくともよい。例えば図7Eに示したように、電荷経路部5の上端部分は表面1FSよりも突出していてもよい。 The upper end portion of the charge path portion 5 formed so as to fill the recess U does not have to coincide with the surface 1FS. For example, as shown in FIG. 7E, the upper end portion of the charge path portion 5 may protrude from the surface 1FS.
 続いて、図7Fに示したように、半導体基板1における表面1FSと反対側の面を、画素分離部3および領域分離部4が露出するまで研磨し、裏面1BSを形成する。また、表面1FSを覆うように、転送トランジスタTG1,TG2などの薄膜トランジスタを含む配線層2を形成する。さらに、光電変換部PD1,PD2およびフローティングディフュージョンFD1,FD2を半導体基板1の第1領域部分R1および第2領域部分R2に形成する。 Subsequently, as shown in FIG. 7F, the surface of the semiconductor substrate 1 opposite to the front surface 1FS is polished until the pixel separation portion 3 and the region separation portion 4 are exposed to form the back surface 1BS. Further, the wiring layer 2 including the thin film transistors such as the transfer transistors TG1 and TG2 is formed so as to cover the surface 1FS. Further, the photoelectric conversion units PD1 and PD2 and the floating diffusion FD1 and FD2 are formed in the first region portion R1 and the second region portion R2 of the semiconductor substrate 1.
 そののち、カラーフィルタCF、画素間遮光部7、およびオンチップレンズOCLなどを形成することで、固体撮像装置101が完成する。 After that, the solid-state image sensor 101 is completed by forming the color filter CF, the inter-pixel light-shielding portion 7, the on-chip lens OCL, and the like.
[固体撮像装置101の作用効果]
 このように本実施の形態の固体撮像装置101では、各単位画素110において、半導体基板1の裏面1BSから表面1FSに向けて厚さ方向に延在する領域分離部4を設け、第1領域部分R1と第2領域部分R2とを物理的に分離するようにした。このため、第1領域部分R1に設けられた光電変換部PD1および第2領域部分R2に設けられた光電変換部PD2の各々に対し、意図しない不要な光が照射されるのを回避することができる。さらに、領域分離部4の表面1FS側に電荷経路部5を設けるようにしたので、光電変換部PD1の出力と、第2領域部分R2に設けられた光電変換部PD2の出力とを共有することができる。その結果、各単位画素110を、位相差情報を得るための位相差検出画素として用いることができる。
[Action and effect of solid-state image sensor 101]
As described above, in the solid-state image sensor 101 of the present embodiment, in each unit pixel 110, a region separation portion 4 extending in the thickness direction from the back surface 1BS of the semiconductor substrate 1 toward the front surface 1FS is provided, and the first region portion is provided. R1 and the second region portion R2 are physically separated. Therefore, it is possible to avoid unintended and unnecessary irradiation of each of the photoelectric conversion unit PD1 provided in the first region portion R1 and the photoelectric conversion unit PD2 provided in the second region portion R2. can. Further, since the charge path portion 5 is provided on the surface 1FS side of the region separation portion 4, the output of the photoelectric conversion unit PD1 and the output of the photoelectric conversion unit PD2 provided in the second region portion R2 are shared. Can be done. As a result, each unit pixel 110 can be used as a phase difference detection pixel for obtaining phase difference information.
 なお、領域分離部4を、半導体基板1の裏面1BSから表面1FSに至るまで延在するように形成すれば、いわゆる色分離は可能であるが、位相差検出を行うことができなくなる。また、領域分離部4を設けずに、第1領域部分R1と第2領域部分R2との間にイオン注入により物理的分離壁を形成してもよいが、その場合はイオン注入される領域の分だけ光電変換部PD1,PD2の占有面積が減少するので、出力が低下してしまう。本開示によれば、光入射側において第1領域部分R1と第2領域部分R2とを完全分離しつつ位相差検出も可能とし、かつ、より高い出力を得ることができる。 If the region separation portion 4 is formed so as to extend from the back surface 1BS of the semiconductor substrate 1 to the front surface 1FS, so-called color separation is possible, but phase difference detection cannot be performed. Further, a physical separation wall may be formed by ion implantation between the first region portion R1 and the second region portion R2 without providing the region separation portion 4, but in that case, the region to be ion-implanted may be formed. Since the occupied area of the photoelectric conversion units PD1 and PD2 is reduced by the amount, the output is reduced. According to the present disclosure, it is possible to detect the phase difference while completely separating the first region portion R1 and the second region portion R2 on the light incident side, and it is possible to obtain a higher output.
 また、本開示では、半導体基板1に対し、転送トランジスタTG1,TG2などの薄膜トランジスタを含む配線層2を形成する前にトレンチ1TRを形成するようにしている。このため、配線層2に含まれる薄膜トランジスタに対する、トレンチ1TRの形成に伴うダメージを与えずにすむ。また、トレンチ1TRを形成したのち、熱アニールを行うことができ、半導体基板1に生じた歪みなどの結晶欠陥の回復が可能である。すなわち、加工に伴う半導体基板1におけるダメージの低減が可能である。その結果、本開示の固体撮像装置101は高い信頼性を有する。一方、例えば裏面1BSからトレンチを形成するような場合には、表面1FSに配線層2を形成した状態でトレンチを形成することとなるので、配線層2へのダメージを避けるため、熱アニールできるような高温環境下に晒すことは事実上困難である。 Further, in the present disclosure, the trench 1TR is formed on the semiconductor substrate 1 before forming the wiring layer 2 including the thin film transistors such as the transfer transistors TG1 and TG2. Therefore, it is not necessary to damage the thin film transistor included in the wiring layer 2 due to the formation of the trench 1TR. Further, after forming the trench 1TR, thermal annealing can be performed, and crystal defects such as strain generated in the semiconductor substrate 1 can be recovered. That is, it is possible to reduce the damage in the semiconductor substrate 1 due to processing. As a result, the solid-state image sensor 101 of the present disclosure has high reliability. On the other hand, for example, when a trench is formed from the back surface 1BS, the trench is formed with the wiring layer 2 formed on the front surface 1FS, so that thermal annealing can be performed in order to avoid damage to the wiring layer 2. It is practically difficult to expose to a high temperature environment.
<2.第1の変形例>
 次に、図8を参照して、上記一実施の形態の第1の変形例としての単位画素110Aについて説明する。図8は、単位画素110Aの断面構成例を表す模式図であり、上記実施の形態で説明した単位画素110を表す図2に対応する。単位画素110Aは、電荷経路部5と配線層2との間に設けられた絶縁層8をさらに有する点を除き、図2の単位画素110と実質的に同じ構成を有する。
<2. First variant>
Next, with reference to FIG. 8, the unit pixel 110A as a first modification of the above embodiment will be described. FIG. 8 is a schematic view showing a cross-sectional configuration example of the unit pixel 110A, and corresponds to FIG. 2 showing the unit pixel 110 described in the above embodiment. The unit pixel 110A has substantially the same configuration as the unit pixel 110 of FIG. 2 except that it further has an insulating layer 8 provided between the charge path portion 5 and the wiring layer 2.
 具体的には、単位画素110Aは、厚さ方向において電荷経路部5と重なり合うように電荷経路部5および配線層2の双方と接するように絶縁層8を設けるようにしたものである。 Specifically, the unit pixel 110A is provided with an insulating layer 8 so as to be in contact with both the charge path portion 5 and the wiring layer 2 so as to overlap the charge path portion 5 in the thickness direction.
 このように単位画素110Aでは、絶縁層8を設けるようにしたので、電荷経路部5と配線層2との電気的絶縁を十分に行うことができる。したがって、光電変換部PD1,PD2からの光電荷が意図しない経路によって配線層2に流出してしまうのを防ぐことができる。よって、上記実施の形態の単位画素110よりも、より高い動作信頼性を確保することができる。 Since the insulating layer 8 is provided in the unit pixel 110A in this way, it is possible to sufficiently perform electrical insulation between the charge path portion 5 and the wiring layer 2. Therefore, it is possible to prevent the optical charges from the photoelectric conversion units PD1 and PD2 from flowing out to the wiring layer 2 by an unintended path. Therefore, it is possible to secure higher operation reliability than the unit pixel 110 of the above embodiment.
<3.電子機器への適用例>
 図9は、本技術を適用した電子機器としてのカメラ2000の構成例を示すブロック図である。
<3. Application example to electronic devices>
FIG. 9 is a block diagram showing a configuration example of the camera 2000 as an electronic device to which the present technology is applied.
 カメラ2000は、レンズ群などからなる光学部2001、上述の固体撮像装置101など(以下、固体撮像装置101等という。)が適用される撮像装置(撮像デバイス)2002、およびカメラ信号処理回路であるDSP(Digital Signal Processor)回路2003を備える。また、カメラ2000は、フレームメモリ2004、表示部2005、記録部2006、操作部2007、および電源部2008も備える。DSP回路2003、フレームメモリ2004、表示部2005、記録部2006、操作部2007および電源部2008は、バスライン2009を介して相互に接続されている。 The camera 2000 is an optical unit 2001 composed of a lens group or the like, an image pickup device (imaging device) 2002 to which the above-mentioned solid-state image pickup device 101 or the like (hereinafter referred to as a solid-state image pickup device 101 or the like) is applied, and a camera signal processing circuit. A DSP (Digital Signal Processor) circuit 2003 is provided. The camera 2000 also includes a frame memory 2004, a display unit 2005, a recording unit 2006, an operation unit 2007, and a power supply unit 2008. The DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, the operation unit 2007, and the power supply unit 2008 are connected to each other via the bus line 2009.
 光学部2001は、被写体からの入射光(像光)を取り込んで撮像装置2002の撮像面上に結像する。撮像装置2002は、光学部2001によって撮像面上に結像された入射光の光量を画素単位で電気信号に変換して画素信号として出力する。 The optical unit 2001 captures incident light (image light) from the subject and forms an image on the image pickup surface of the image pickup apparatus 2002. The image pickup apparatus 2002 converts the amount of incident light imaged on the image pickup surface by the optical unit 2001 into an electric signal in pixel units and outputs it as a pixel signal.
 表示部2005は、例えば、液晶パネルや有機ELパネル等のパネル型表示装置からなり、撮像装置2002で撮像された動画または静止画を表示する。記録部2006は、撮像装置2002で撮像された動画または静止画を、ハードディスクや半導体メモリ等の記録媒体に記録する。 The display unit 2005 comprises a panel-type display device such as a liquid crystal panel or an organic EL panel, and displays a moving image or a still image captured by the image pickup device 2002. The recording unit 2006 records a moving image or a still image captured by the image pickup apparatus 2002 on a recording medium such as a hard disk or a semiconductor memory.
 操作部2007は、ユーザによる操作の下に、カメラ2000が持つ様々な機能について操作指令を発する。電源部2008は、DSP回路2003、フレームメモリ2004、表示部2005、記録部2006および操作部2007の動作電源となる各種の電源を、これら供給対象に対して適宜供給する。 The operation unit 2007 issues operation commands for various functions of the camera 2000 under the operation of the user. The power supply unit 2008 appropriately supplies various power sources that serve as operating power sources for the DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, and the operation unit 2007 to these supply targets.
 上述したように、撮像装置2002として、上述した固体撮像装置101等を用いることで、良好な画像の取得が期待できる。 As described above, good image acquisition can be expected by using the above-mentioned solid-state image pickup device 101 or the like as the image pickup device 2002.
<4.移動体への応用例>
 本開示に係る技術(本技術)は、様々な製品へ応用することができる。例えば、本開示に係る技術は、自動車、電気自動車、ハイブリッド電気自動車、自動二輪車、自転車、パーソナルモビリティ、飛行機、ドローン、船舶、ロボット等のいずれかの種類の移動体に搭載される装置として実現されてもよい。
<4. Application example to mobile>
The technique according to the present disclosure (the present technique) can be applied to various products. For example, the technology according to the present disclosure is realized as a device mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. You may.
 図10は、本開示に係る技術が適用され得る移動体制御システムの一例である車両制御システムの概略的な構成例を示すブロック図である。 FIG. 10 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.
 車両制御システム12000は、通信ネットワーク12001を介して接続された複数の電子制御ユニットを備える。図10に示した例では、車両制御システム12000は、駆動系制御ユニット12010、ボディ系制御ユニット12020、車外情報検出ユニット12030、車内情報検出ユニット12040、及び統合制御ユニット12050を備える。また、統合制御ユニット12050の機能構成として、マイクロコンピュータ12051、音声画像出力部12052、及び車載ネットワークI/F(Interface)12053が図示されている。 The vehicle control system 12000 includes a plurality of electronic control units connected via the communication network 12001. In the example shown in FIG. 10, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. Further, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (Interface) 12053 are shown.
 駆動系制御ユニット12010は、各種プログラムにしたがって車両の駆動系に関連する装置の動作を制御する。例えば、駆動系制御ユニット12010は、内燃機関又は駆動用モータ等の車両の駆動力を発生させるための駆動力発生装置、駆動力を車輪に伝達するための駆動力伝達機構、車両の舵角を調節するステアリング機構、及び、車両の制動力を発生させる制動装置等の制御装置として機能する。 The drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 has a driving force generator for generating the driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism for adjusting and a braking device for generating braking force of the vehicle.
 ボディ系制御ユニット12020は、各種プログラムにしたがって車体に装備された各種装置の動作を制御する。例えば、ボディ系制御ユニット12020は、キーレスエントリシステム、スマートキーシステム、パワーウィンドウ装置、あるいは、ヘッドランプ、バックランプ、ブレーキランプ、ウィンカー又はフォグランプ等の各種ランプの制御装置として機能する。この場合、ボディ系制御ユニット12020には、鍵を代替する携帯機から発信される電波又は各種スイッチの信号が入力され得る。ボディ系制御ユニット12020は、これらの電波又は信号の入力を受け付け、車両のドアロック装置、パワーウィンドウ装置、ランプ等を制御する。 The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, turn signals or fog lamps. In this case, the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches. The body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.
 車外情報検出ユニット12030は、車両制御システム12000を搭載した車両の外部の情報を検出する。例えば、車外情報検出ユニット12030には、撮像部12031が接続される。車外情報検出ユニット12030は、撮像部12031に車外の画像を撮像させるとともに、撮像された画像を受信する。車外情報検出ユニット12030は、受信した画像に基づいて、人、車、障害物、標識又は路面上の文字等の物体検出処理又は距離検出処理を行ってもよい。 The vehicle outside information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the image pickup unit 12031 is connected to the vehicle outside information detection unit 12030. The vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image. The vehicle outside information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or a character on the road surface based on the received image.
 撮像部12031は、光を受光し、その光の受光量に応じた電気信号を出力する光センサである。撮像部12031は、電気信号を画像として出力することもできるし、測距の情報として出力することもできる。また、撮像部12031が受光する光は、可視光であっても良いし、赤外線等の非可視光であっても良い。 The image pickup unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received. The image pickup unit 12031 can output an electric signal as an image or can output it as distance measurement information. Further, the light received by the image pickup unit 12031 may be visible light or invisible light such as infrared light.
 車内情報検出ユニット12040は、車内の情報を検出する。車内情報検出ユニット12040には、例えば、運転者の状態を検出する運転者状態検出部12041が接続される。運転者状態検出部12041は、例えば運転者を撮像するカメラを含み、車内情報検出ユニット12040は、運転者状態検出部12041から入力される検出情報に基づいて、運転者の疲労度合い又は集中度合いを算出してもよいし、運転者が居眠りをしていないかを判別してもよい。 The in-vehicle information detection unit 12040 detects the in-vehicle information. For example, a driver state detection unit 12041 that detects a driver's state is connected to the vehicle interior information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 determines the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether or not the driver has fallen asleep.
 マイクロコンピュータ12051は、車外情報検出ユニット12030又は車内情報検出ユニット12040で取得される車内外の情報に基づいて、駆動力発生装置、ステアリング機構又は制動装置の制御目標値を演算し、駆動系制御ユニット12010に対して制御指令を出力することができる。例えば、マイクロコンピュータ12051は、車両の衝突回避あるいは衝撃緩和、車間距離に基づく追従走行、車速維持走行、車両の衝突警告、又は車両のレーン逸脱警告等を含むADAS(Advanced Driver Assistance System)の機能実現を目的とした協調制御を行うことができる。 The microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and the drive system control unit. A control command can be output to 12010. For example, the microcomputer 12051 realizes ADAS (Advanced Driver Assistance System) functions including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. It is possible to perform cooperative control for the purpose of.
 また、マイクロコンピュータ12051は、車外情報検出ユニット12030又は車内情報検出ユニット12040で取得される車両の周囲の情報に基づいて駆動力発生装置、ステアリング機構又は制動装置等を制御することにより、運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行うことができる。 Further, the microcomputer 12051 controls the driving force generating device, the steering mechanism, the braking device, and the like based on the information around the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040. It is possible to perform coordinated control for the purpose of automatic driving that runs autonomously without depending on the operation.
 また、マイクロコンピュータ12051は、車外情報検出ユニット12030で取得される車外の情報に基づいて、ボディ系制御ユニット12020に対して制御指令を出力することができる。例えば、マイクロコンピュータ12051は、車外情報検出ユニット12030で検知した先行車又は対向車の位置に応じてヘッドランプを制御し、ハイビームをロービームに切り替える等の防眩を図ることを目的とした協調制御を行うことができる。 Further, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the vehicle outside information detection unit 12030. For example, the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the outside information detection unit 12030, and performs cooperative control for the purpose of anti-glare such as switching the high beam to the low beam. It can be carried out.
 音声画像出力部12052は、車両の搭乗者又は車外に対して、視覚的又は聴覚的に情報を通知することが可能な出力装置へ音声及び画像のうちの少なくとも一方の出力信号を送信する。図10の例では、出力装置として、オーディオスピーカ12061、表示部12062及びインストルメントパネル12063が例示されている。表示部12062は、例えば、オンボードディスプレイ及びヘッドアップディスプレイの少なくとも一つを含んでいてもよい。 The audio image output unit 12052 transmits an output signal of at least one of audio and image to an output device capable of visually or audibly notifying information to the passenger or the outside of the vehicle. In the example of FIG. 10, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.
 図11は、撮像部12031の設置位置の例を示す図である。 FIG. 11 is a diagram showing an example of the installation position of the image pickup unit 12031.
 図11では、撮像部12031として、撮像部12101、12102、12103、12104、12105を有する。 In FIG. 11, as the image pickup unit 12031, the image pickup units 12101, 12102, 12103, 12104, and 12105 are included.
 撮像部12101、12102、12103、12104、12105は、例えば、車両12100のフロントノーズ、サイドミラー、リアバンパ、バックドア及び車室内のフロントガラスの上部等の位置に設けられる。フロントノーズに備えられる撮像部12101及び車室内のフロントガラスの上部に備えられる撮像部12105は、主として車両12100の前方の画像を取得する。サイドミラーに備えられる撮像部12102、12103は、主として車両12100の側方の画像を取得する。リアバンパ又はバックドアに備えられる撮像部12104は、主として車両12100の後方の画像を取得する。車室内のフロントガラスの上部に備えられる撮像部12105は、主として先行車両又は、歩行者、障害物、信号機、交通標識又は車線等の検出に用いられる。 The image pickup units 12101, 12102, 12103, 12104, 12105 are provided at positions such as, for example, the front nose, side mirrors, rear bumpers, back doors, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The image pickup unit 12101 provided on the front nose and the image pickup section 12105 provided on the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100. The image pickup units 12102 and 12103 provided in the side mirror mainly acquire images of the side of the vehicle 12100. The image pickup unit 12104 provided in the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100. The image pickup unit 12105 provided on the upper part of the windshield in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.
 なお、図11には、撮像部12101ないし12104の撮影範囲の一例が示されている。撮像範囲12111は、フロントノーズに設けられた撮像部12101の撮像範囲を示し、撮像範囲12112,12113は、それぞれサイドミラーに設けられた撮像部12102,12103の撮像範囲を示し、撮像範囲12114は、リアバンパ又はバックドアに設けられた撮像部12104の撮像範囲を示す。例えば、撮像部12101ないし12104で撮像された画像データが重ね合わせられることにより、車両12100を上方から見た俯瞰画像が得られる。 Note that FIG. 11 shows an example of the shooting range of the imaging units 12101 to 12104. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, the imaging ranges 12112 and 12113 indicate the imaging range of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and the imaging range 12114 indicates the imaging range. The imaging range of the imaging unit 12104 provided on the rear bumper or the back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 can be obtained.
 撮像部12101ないし12104の少なくとも1つは、距離情報を取得する機能を有していてもよい。例えば、撮像部12101ないし12104の少なくとも1つは、複数の撮像素子からなるステレオカメラであってもよいし、位相差検出用の画素を有する撮像素子であってもよい。 At least one of the image pickup units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image pickup units 12101 to 12104 may be a stereo camera including a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.
 例えば、マイクロコンピュータ12051は、撮像部12101ないし12104から得られた距離情報を基に、撮像範囲12111ないし12114内における各立体物までの距離と、この距離の時間的変化(車両12100に対する相対速度)を求めることにより、特に車両12100の進行路上にある最も近い立体物で、車両12100と略同じ方向に所定の速度(例えば、0km/h以上)で走行する立体物を先行車として抽出することができる。さらに、マイクロコンピュータ12051は、先行車の手前に予め確保すべき車間距離を設定し、自動ブレーキ制御(追従停止制御も含む)や自動加速制御(追従発進制御も含む)等を行うことができる。このように運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行うことができる。 For example, the microcomputer 12051 has a distance to each three-dimensional object within the image pickup range 12111 to 12114 based on the distance information obtained from the image pickup unit 12101 to 12104, and a temporal change of this distance (relative speed with respect to the vehicle 12100). By obtaining, it is possible to extract a three-dimensional object that is the closest three-dimensional object on the traveling path of the vehicle 12100 and travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or more) as a preceding vehicle. can. Further, the microcomputer 12051 can set an inter-vehicle distance to be secured in advance in front of the preceding vehicle, and can perform automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. In this way, it is possible to perform coordinated control for the purpose of automatic driving or the like that autonomously travels without relying on the driver's operation.
 例えば、マイクロコンピュータ12051は、撮像部12101ないし12104から得られた距離情報を元に、立体物に関する立体物データを、2輪車、普通車両、大型車両、歩行者、電柱等その他の立体物に分類して抽出し、障害物の自動回避に用いることができる。例えば、マイクロコンピュータ12051は、車両12100の周辺の障害物を、車両12100のドライバが視認可能な障害物と視認困難な障害物とに識別する。そして、マイクロコンピュータ12051は、各障害物との衝突の危険度を示す衝突リスクを判断し、衝突リスクが設定値以上で衝突可能性がある状況であるときには、オーディオスピーカ12061や表示部12062を介してドライバに警報を出力することや、駆動系制御ユニット12010を介して強制減速や回避操舵を行うことで、衝突回避のための運転支援を行うことができる。 For example, the microcomputer 12051 converts three-dimensional object data related to a three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, electric poles, and other three-dimensional objects based on the distance information obtained from the image pickup units 12101 to 12104. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 via the audio speaker 12061 or the display unit 12062. By outputting an alarm to the driver and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be provided.
 撮像部12101ないし12104の少なくとも1つは、赤外線を検出する赤外線カメラであってもよい。例えば、マイクロコンピュータ12051は、撮像部12101ないし12104の撮像画像中に歩行者が存在するか否かを判定することで歩行者を認識することができる。かかる歩行者の認識は、例えば赤外線カメラとしての撮像部12101ないし12104の撮像画像における特徴点を抽出する手順と、物体の輪郭を示す一連の特徴点にパターンマッチング処理を行って歩行者か否かを判別する手順によって行われる。マイクロコンピュータ12051が、撮像部12101ないし12104の撮像画像中に歩行者が存在すると判定し、歩行者を認識すると、音声画像出力部12052は、当該認識された歩行者に強調のための方形輪郭線を重畳表示するように、表示部12062を制御する。また、音声画像出力部12052は、歩行者を示すアイコン等を所望の位置に表示するように表示部12062を制御してもよい。 At least one of the image pickup units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging unit 12101 to 12104. Such pedestrian recognition is, for example, a procedure for extracting feature points in an image captured by an image pickup unit 12101 to 12104 as an infrared camera, and pattern matching processing is performed on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. It is done by the procedure to determine. When the microcomputer 12051 determines that a pedestrian is present in the captured image of the image pickup unit 12101 to 12104 and recognizes the pedestrian, the audio image output unit 12052 determines the square contour line for emphasizing the recognized pedestrian. The display unit 12062 is controlled so as to superimpose and display. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.
 以上、本開示に係る技術が適用され得る車両制御システムの一例について説明した。本開示に係る技術は、以上説明した構成のうち、撮像部12031に適用され得る。具体的には、図1などに示した固体撮像装置101等を撮像部12031に適用することができる。撮像部12031に本開示に係る技術を適用することにより、車両制御システムの優れた動作が期待できる。 The above is an example of a vehicle control system to which the technique according to the present disclosure can be applied. The technique according to the present disclosure can be applied to the image pickup unit 12031 among the configurations described above. Specifically, the solid-state image sensor 101 or the like shown in FIG. 1 or the like can be applied to the image pickup unit 12031. By applying the technique according to the present disclosure to the image pickup unit 12031, excellent operation of the vehicle control system can be expected.
<5.その他の変形例>
 以上、いくつかの実施の形態および変形例を挙げて本開示を説明したが、本開示は上記実施の形態等に限定されるものではなく、種々の変形が可能である。例えば上記実施の形態の単位画素110では、厚さ方向において領域分離部4と重なり合う領域の一部にのみ電荷経路部5を形成するようにしたが、本開示の撮像装置はこれに限定されるものではない。例えば図12に示した第2の変形例としての単位画素110Bのように、厚さ方向において領域分離部4と重なり合う領域の全てを占めるように電荷経路部5を形成するようにしてもよい。
<5. Other variants>
Although the present disclosure has been described above with reference to some embodiments and modifications, the present disclosure is not limited to the above embodiments and the like, and various modifications are possible. For example, in the unit pixel 110 of the above embodiment, the charge path portion 5 is formed only in a part of the region overlapping with the region separation portion 4 in the thickness direction, but the image pickup apparatus of the present disclosure is limited to this. It's not a thing. For example, as in the unit pixel 110B as the second modification shown in FIG. 12, the charge path portion 5 may be formed so as to occupy the entire region overlapping with the region separation portion 4 in the thickness direction.
 また、本開示は、転送トランジスタやフローティングディフュージョンの配置位置についても上記実施の形態において示したものに限定されない。例えば図13に示した第3の変形例としての単位画素110Cのように、領域分離部4から離れた位置にフローティングディフュージョンFD1,FD2をそれぞれ設けるようにしてもよい。 Further, the present disclosure is not limited to the arrangement position of the transfer transistor and the floating diffusion as shown in the above embodiment. For example, as in the unit pixel 110C as the third modification shown in FIG. 13, the floating diffusion FD1 and FD2 may be provided at positions away from the region separation unit 4, respectively.
 また、上記実施の形態では、1つの単位画素が、1つの領域分離部により分離された2つの領域部分を有する場合について説明したが、本開示はこれに限定されるものではない。例えば図14および図15にそれぞれ示した第4の変形例としての単位画素110Dおよび第5の変形例としての単位画素110Eのように、1つの単位画素が、例えば互いに交差した2つの壁状部分からなる領域分離部9により分離された4つの第1~第4領域部分R1~R4を有するものであってもよい。なお、単位画素110Dは、厚さ方向において領域分離部9と重なり合う領域のうちの一部のみに電荷経路部5が設けられている例である。また、単位画素110Eは、厚さ方向において領域分離部9と重なり合う領域の全てを占めるように電荷経路部5が設けられている例である。 Further, in the above embodiment, the case where one unit pixel has two region portions separated by one region separation unit has been described, but the present disclosure is not limited to this. For example, like the unit pixel 110D as the fourth modification and the unit pixel 110E as the fifth modification shown in FIGS. 14 and 15, respectively, two wall-shaped portions in which one unit pixel intersects with each other, for example. It may have four first-fourth region portions R1 to R4 separated by the region separation part 9 made of. The unit pixel 110D is an example in which the charge path portion 5 is provided only in a part of the region overlapping the region separation portion 9 in the thickness direction. Further, the unit pixel 110E is an example in which the charge path portion 5 is provided so as to occupy the entire region overlapping with the region separation portion 9 in the thickness direction.
 また、上記実施の形態では、単位画素110の半導体基板1の表面1FSに、転送トランジスタTG1,TG2、接続部11、増幅トランジスタAMP1,AMP2および配線12などを含む配線層2が設けられた構成を例示したが、本開示はこれに限定されるものではない。本開示の撮像装置は、例えば図16に示した本開示の第6の変形例としての単位画素110Fのような積層構造を含むものであってもよい。 Further, in the above embodiment, the wiring layer 2 including the transfer transistors TG1 and TG2, the connection portion 11, the amplification transistors AMP1 and AMP2, the wiring 12, and the like is provided on the surface 1FS of the semiconductor substrate 1 of the unit pixel 110. By way of example, the present disclosure is not limited to this. The image pickup apparatus of the present disclosure may include a laminated structure such as the unit pixel 110F as the sixth modification of the present disclosure shown in FIG. 16, for example.
 図16は、本開示の第6の変形例としての単位画素110Fの断面構成の一例を表している。単位画素110Fを複数備えた撮像装置は、第1基板10と第2基板20と第3基板30とが順に積層された構造を有する。単位画素110Fを複数備えた撮像装置は、さらに、第1基板10の裏面側、すなわち光入射面側に、カラーフィルタCFおよびオンチップレンズOCLを備えている。 FIG. 16 shows an example of the cross-sectional configuration of the unit pixel 110F as the sixth modification of the present disclosure. The image pickup apparatus provided with a plurality of unit pixels 110F has a structure in which the first substrate 10, the second substrate 20, and the third substrate 30 are laminated in order. The image pickup apparatus provided with a plurality of unit pixels 110F further includes a color filter CF and an on-chip lens OCL on the back surface side of the first substrate 10, that is, the light incident surface side.
 第1基板10は、半導体基板1上に絶縁層46を積層して構成されている。第1基板10は、層間絶縁膜51の一部として、絶縁層46を有している。絶縁層46は、半導体基板1と、第2基板20の半導体基板21との間隙に設けられている。絶縁層46には、転送トランジスタTG1,TG2やフローティングディフュージョンFD1,FD2などが設けられている。 The first substrate 10 is configured by laminating an insulating layer 46 on a semiconductor substrate 1. The first substrate 10 has an insulating layer 46 as a part of the interlayer insulating film 51. The insulating layer 46 is provided in the gap between the semiconductor substrate 1 and the semiconductor substrate 21 of the second substrate 20. The insulating layer 46 is provided with transfer transistors TG1 and TG2, floating diffusion FD1 and FD2, and the like.
 第2基板20は、半導体基板21上に絶縁層52を積層して構成されている。第2基板20は、層間絶縁膜51の一部として、絶縁層52を有している。絶縁層52は、半導体基板21と、第3基板30の半導体基板31との間隙に設けられている。半導体基板21は、例えばシリコン基板で構成されている。第2基板20のうちの半導体基板21の表面側、すなわち第3基板30側の部分に読み出し回路22が設けられた構成となっている。第2基板20は、半導体基板1の表面側に半導体基板21の裏面を向けて第1基板10に貼り合わされている。つまり、第2基板20は、第1基板10に対し、フェイストゥーバックで貼り合わされている。第2基板20は、さらに、半導体基板21と同一の層内に、半導体基板21を貫通する絶縁層53を有している。第2基板20は、層間絶縁膜51の一部として、絶縁層53を有している。絶縁層53は、後述の貫通配線54の側面を覆うように設けられている。 The second substrate 20 is configured by laminating an insulating layer 52 on a semiconductor substrate 21. The second substrate 20 has an insulating layer 52 as a part of the interlayer insulating film 51. The insulating layer 52 is provided in the gap between the semiconductor substrate 21 and the semiconductor substrate 31 of the third substrate 30. The semiconductor substrate 21 is made of, for example, a silicon substrate. The readout circuit 22 is provided on the surface side of the semiconductor substrate 21 of the second substrate 20, that is, the portion on the third substrate 30 side. The second substrate 20 is attached to the first substrate 10 with the back surface of the semiconductor substrate 21 facing the front surface side of the semiconductor substrate 1. That is, the second substrate 20 is face-to-back bonded to the first substrate 10. The second substrate 20 further has an insulating layer 53 penetrating the semiconductor substrate 21 in the same layer as the semiconductor substrate 21. The second substrate 20 has an insulating layer 53 as a part of the interlayer insulating film 51. The insulating layer 53 is provided so as to cover the side surface of the through wiring 54 described later.
 第1基板10および第2基板20からなる積層体は、層間絶縁膜51と、層間絶縁膜51内に設けられた貫通配線54を有している。貫通配線54は、第1領域部分R1および第2領域部分R2の各々につき1つずつ設けられている。貫通配線54は、層間絶縁膜51のうちの絶縁層53を貫通するように、半導体基板21の厚さ方向(Z軸方向)に延びている。第1基板10および第2基板20は、貫通配線54によって互いに電気的に接続されている。具体的には、貫通配線54は、フローティングディフュージョンFDと、後述の接続配線55とを電気的に接続するように設けられている。 The laminate composed of the first substrate 10 and the second substrate 20 has an interlayer insulating film 51 and a through wiring 54 provided in the interlayer insulating film 51. One through wiring 54 is provided for each of the first region portion R1 and the second region portion R2. The through wiring 54 extends in the thickness direction (Z-axis direction) of the semiconductor substrate 21 so as to penetrate the insulating layer 53 of the interlayer insulating film 51. The first substrate 10 and the second substrate 20 are electrically connected to each other by a through wiring 54. Specifically, the through wiring 54 is provided so as to electrically connect the floating diffusion FD and the connection wiring 55 described later.
 第2基板20は、例えば、絶縁層52内に、読み出し回路22や半導体基板21と電気的に接続された複数の接続部59を有している。第2基板20は、さらに、例えば、絶縁層52上に配線層56を有している。配線層56は、例えば、絶縁層57と、絶縁層57内に設けられた複数の画素駆動線23および複数の垂直信号線24を有している。配線層56は、さらに、例えば、絶縁層57内に複数の接続配線55を有している。接続配線55は、フローティングディフュージョンFD1,FD2に電気的にそれぞれ接続された2つの貫通配線54を互いに電気的に接続している。 The second substrate 20 has, for example, a plurality of connecting portions 59 electrically connected to the readout circuit 22 and the semiconductor substrate 21 in the insulating layer 52. The second substrate 20 further has, for example, a wiring layer 56 on the insulating layer 52. The wiring layer 56 has, for example, an insulating layer 57, a plurality of pixel drive lines 23 provided in the insulating layer 57, and a plurality of vertical signal lines 24. The wiring layer 56 further has, for example, a plurality of connection wirings 55 in the insulating layer 57. The connection wiring 55 electrically connects two through wirings 54 electrically connected to the floating diffusion FD1 and FD2, respectively.
 配線層56は、さらに、例えば、絶縁層57内に複数のパッド電極58を有している。各パッド電極58は、例えば、Cu(銅)、Al(アルミニウム)などの金属で形成されている。各パッド電極58は、配線層56の表面に露出している。複数のパッド電極58は、後述の複数のパッド電極64とそれぞれ接合され、第2基板20と第3基板30との電気的な接続と、第2基板20と第3基板30との貼り合わせとに用いられる。複数のパッド電極58は、例えば、画素駆動線23および垂直信号線24ごとに1つずつ設けられている。 The wiring layer 56 further has, for example, a plurality of pad electrodes 58 in the insulating layer 57. Each pad electrode 58 is made of a metal such as Cu (copper) or Al (aluminum). Each pad electrode 58 is exposed on the surface of the wiring layer 56. The plurality of pad electrodes 58 are joined to a plurality of pad electrodes 64, which will be described later, respectively, for electrical connection between the second substrate 20 and the third substrate 30, and bonding of the second substrate 20 and the third substrate 30. Used for. The plurality of pad electrodes 58 are provided, for example, one for each of the pixel drive line 23 and the vertical signal line 24.
 第3基板30は、例えば、半導体基板31上に層間絶縁膜61を積層して構成されている。半導体基板31は、シリコン基板で構成されている。第3基板30は、半導体基板31の表面側の部分にロジック回路32が設けられた構成となっている。第3基板30は、さらに、例えば、層間絶縁膜61上に配線層62を有している。配線層62は、例えば、絶縁層63と、絶縁層63内に設けられた複数のパッド電極64を有している。複数のパッド電極64は、ロジック回路32と電気的に接続されている。各パッド電極64は、例えば、Cu(銅)で形成されている。各パッド電極64は、配線層62の表面に露出している。各パッド電極64は、第2基板20と第3基板30との電気的な接続と、第2基板20と第3基板30との貼り合わせに用いられる。また、パッド電極64は、必ずしも複数でなくてもよく、1つでもロジック回路32と電気的に接続が可能である。第2基板20と第3基板30とは、パッド電極58とパッド電極64との接合によって互いに電気的に接続されている。つまり、転送トランジスタTG1,TG2は、貫通配線54と、パッド電極58,64とを介して、ロジック回路32に電気的に接続されている。第3基板30は、半導体基板21の表面側に半導体基板31の表面を向けて第2基板20に貼り合わされている。つまり、第3基板30は、第2基板20に対し、フェイストゥーフェイスで貼り合わされている。 The third substrate 30 is configured by, for example, laminating an interlayer insulating film 61 on a semiconductor substrate 31. The semiconductor substrate 31 is made of a silicon substrate. The third substrate 30 has a configuration in which a logic circuit 32 is provided on a portion on the surface side of the semiconductor substrate 31. The third substrate 30 further has, for example, a wiring layer 62 on the interlayer insulating film 61. The wiring layer 62 has, for example, an insulating layer 63 and a plurality of pad electrodes 64 provided in the insulating layer 63. The plurality of pad electrodes 64 are electrically connected to the logic circuit 32. Each pad electrode 64 is made of, for example, Cu (copper). Each pad electrode 64 is exposed on the surface of the wiring layer 62. Each pad electrode 64 is used for electrical connection between the second substrate 20 and the third substrate 30 and for bonding the second substrate 20 and the third substrate 30. Further, the number of pad electrodes 64 does not necessarily have to be plurality, and even one pad electrode 64 can be electrically connected to the logic circuit 32. The second substrate 20 and the third substrate 30 are electrically connected to each other by joining the pad electrode 58 and the pad electrode 64. That is, the transfer transistors TG1 and TG2 are electrically connected to the logic circuit 32 via the through wiring 54 and the pad electrodes 58 and 64. The third substrate 30 is attached to the second substrate 20 with the surface of the semiconductor substrate 31 facing the surface side of the semiconductor substrate 21. That is, the third substrate 30 is attached to the second substrate 20 face-to-face.
 本開示の撮像装置は、例えば図17に示した本開示の第7の変形例としての単位画素110Gのような積層構造を含むものであってもよい。 The image pickup apparatus of the present disclosure may include a laminated structure such as a unit pixel 110G as a seventh modification of the present disclosure shown in FIG. 17, for example.
 図17は、本開示の第7の変形例としての単位画素110Gの断面構成の一例を表している。単位画素110Gを複数備えた撮像装置は、第1基板10と第2基板20と第3基板30とが順に積層された構造を有する。単位画素110Gを複数備えた撮像装置は、さらに、第1基板10の裏面側、すなわち光入射面側に、カラーフィルタCFおよびオンチップレンズOCLを備えている。 FIG. 17 shows an example of the cross-sectional configuration of the unit pixel 110G as the seventh modification of the present disclosure. The image pickup apparatus provided with a plurality of unit pixels 110G has a structure in which the first substrate 10, the second substrate 20, and the third substrate 30 are laminated in order. The image pickup apparatus provided with a plurality of unit pixels 110G further includes a color filter CF and an on-chip lens OCL on the back surface side of the first substrate 10, that is, the light incident surface side.
 第1基板10は、半導体基板1の表面側に配線層2を積層して構成されている。配線層2は、半導体基板1と、第2基板20の配線層56との間隙に設けられている。配線層2には、転送トランジスタTG1,TG2やフローティングディフュージョンFD1,FD2のほか、複数のパッド電極71や複数の接続部59などが設けられている。各パッド電極71は、配線層2の表面に露出している。各パッド電極71は、第1基板10と第2基板20との電気的な接続と、第1基板10と第2基板20との貼り合わせとに用いられる。 The first substrate 10 is configured by laminating the wiring layer 2 on the surface side of the semiconductor substrate 1. The wiring layer 2 is provided in the gap between the semiconductor substrate 1 and the wiring layer 56 of the second substrate 20. The wiring layer 2 is provided with transfer transistors TG1 and TG2, floating diffusion FD1 and FD2, a plurality of pad electrodes 71, a plurality of connection portions 59, and the like. Each pad electrode 71 is exposed on the surface of the wiring layer 2. Each pad electrode 71 is used for electrical connection between the first substrate 10 and the second substrate 20 and for bonding the first substrate 10 and the second substrate 20.
 第2基板20は、第1基板10と貼り合わされる側から順に、配線層56と、層間絶縁膜51とが順に積層されたものである。第2基板20は、半導体基板1の表面側に半導体基板21の表面を向けて第1基板10に貼り合わされている。つまり、第2基板20は、第1基板10に対し、フェイストゥーフェイスで貼り合わされている。配線層56は、例えば、絶縁層57と、絶縁層57内に設けられた複数の画素駆動線23および複数の垂直信号線24を有している。配線層56は、例えば、絶縁層57内に接続配線55を有している。接続配線55は、読み出し回路22に電気的にそれぞれ接続された2つの貫通配線を互いに電気的に接続している。配線層56は、さらに、第2基板20の表面に露出するように設けられた複数のパッド電極58を有している。複数のパッド電極58は、複数のパッド電極71とそれぞれ接合され、第1基板10と第2基板20との電気的な接続と、第1基板10と第2基板20との貼り合わせとに用いられる。層間絶縁膜51は、配線層56側から順に絶縁層52と半導体基板21と絶縁層46とを積層して構成されている。読み出し回路22は半導体基板21に設けられている。絶縁層46には、第2基板20の裏面に露出するように複数のパッド電極47が設けられている。複数のパッド電極47は、第3基板30の複数のパッド電極64とそれぞれ接合され、第2基板20と第3基板30との電気的な接続と、第2基板20と第3基板30との貼り合わせとに用いられる。さらに第2基板20には、一部のパッド電極58から一部のパッド電極47に至るまでZ軸方向に延在するように接続部59が設けられている。接続部59は、例えば読み出し回路22や半導体基板21と電気的に接続されている。第2基板20は、さらに、半導体基板21と同一の層内に、半導体基板21を貫通する絶縁層53を有している。第2基板20は、層間絶縁膜51の一部として、絶縁層53を有している。 In the second substrate 20, the wiring layer 56 and the interlayer insulating film 51 are laminated in order from the side to be bonded to the first substrate 10. The second substrate 20 is attached to the first substrate 10 with the surface of the semiconductor substrate 21 facing the surface side of the semiconductor substrate 1. That is, the second substrate 20 is face-to-face bonded to the first substrate 10. The wiring layer 56 has, for example, an insulating layer 57, a plurality of pixel drive lines 23 provided in the insulating layer 57, and a plurality of vertical signal lines 24. The wiring layer 56 has, for example, a connection wiring 55 in the insulating layer 57. The connection wiring 55 electrically connects two through wirings electrically connected to the read circuit 22 to each other. The wiring layer 56 further has a plurality of pad electrodes 58 provided so as to be exposed on the surface of the second substrate 20. The plurality of pad electrodes 58 are bonded to the plurality of pad electrodes 71, respectively, and are used for electrical connection between the first substrate 10 and the second substrate 20 and bonding of the first substrate 10 and the second substrate 20. Be done. The interlayer insulating film 51 is configured by laminating the insulating layer 52, the semiconductor substrate 21, and the insulating layer 46 in order from the wiring layer 56 side. The readout circuit 22 is provided on the semiconductor substrate 21. The insulating layer 46 is provided with a plurality of pad electrodes 47 so as to be exposed on the back surface of the second substrate 20. The plurality of pad electrodes 47 are bonded to the plurality of pad electrodes 64 of the third substrate 30, respectively, to electrically connect the second substrate 20 and the third substrate 30, and to connect the second substrate 20 and the third substrate 30. Used for bonding. Further, the second substrate 20 is provided with a connecting portion 59 so as to extend in the Z-axis direction from a part of the pad electrodes 58 to a part of the pad electrodes 47. The connection portion 59 is electrically connected to, for example, the readout circuit 22 or the semiconductor substrate 21. The second substrate 20 further has an insulating layer 53 penetrating the semiconductor substrate 21 in the same layer as the semiconductor substrate 21. The second substrate 20 has an insulating layer 53 as a part of the interlayer insulating film 51.
 第3基板30は、例えば、半導体基板31上に層間絶縁膜61を積層して構成されている。半導体基板31は、シリコン基板で構成されている。第3基板30は、半導体基板31の表面側の部分にロジック回路32が設けられた構成となっている。第3基板30は、さらに、例えば、層間絶縁膜61上に配線層62を有している。配線層62は、例えば、絶縁層63と、絶縁層63内に設けられた複数のパッド電極64を有している。複数のパッド電極64は、ロジック回路32と電気的に接続されている。第1基板10の転送トランジスタTG1,TG2は、第2基板20を介して第3基板30のロジック回路32に電気的に接続されている。第3基板30は、半導体基板21の裏面側に半導体基板31の表面を向けて第2基板20に貼り合わされている。つまり、第3基板30は、第2基板20に対し、フェイストゥーバックで貼り合わされている。 The third substrate 30 is configured by, for example, laminating an interlayer insulating film 61 on a semiconductor substrate 31. The semiconductor substrate 31 is made of a silicon substrate. The third substrate 30 has a configuration in which a logic circuit 32 is provided on a portion on the surface side of the semiconductor substrate 31. The third substrate 30 further has, for example, a wiring layer 62 on the interlayer insulating film 61. The wiring layer 62 has, for example, an insulating layer 63 and a plurality of pad electrodes 64 provided in the insulating layer 63. The plurality of pad electrodes 64 are electrically connected to the logic circuit 32. The transfer transistors TG1 and TG2 of the first substrate 10 are electrically connected to the logic circuit 32 of the third substrate 30 via the second substrate 20. The third substrate 30 is attached to the second substrate 20 with the front surface of the semiconductor substrate 31 facing the back surface side of the semiconductor substrate 21. That is, the third substrate 30 is attached to the second substrate 20 by face-to-back.
 本開示の撮像装置は、例えば図18に示した本開示の第8の変形例としての単位画素110Hのような積層構造を含むものであってもよい。 The image pickup apparatus of the present disclosure may include a laminated structure such as a unit pixel 110H as an eighth modification of the present disclosure shown in FIG. 18, for example.
 図18は、本開示の第8の変形例としての単位画素110Hの断面構成の一例を表している。単位画素110Hを複数備えた撮像装置は、第1基板10と第2基板20と第3基板30とが順に積層された構造を有する。単位画素110Hを複数備えた撮像装置は、さらに、第1基板10の裏面側、すなわち光入射面側に、カラーフィルタCFおよびオンチップレンズOCLを備えている。 FIG. 18 shows an example of the cross-sectional configuration of the unit pixel 110H as the eighth modification of the present disclosure. The image pickup apparatus provided with a plurality of unit pixels 110H has a structure in which the first substrate 10, the second substrate 20, and the third substrate 30 are laminated in order. The image pickup apparatus provided with a plurality of unit pixels 110H further includes a color filter CF and an on-chip lens OCL on the back surface side of the first substrate 10, that is, the light incident surface side.
 図18の単位画素110Hの構成は、第2基板20が上下反転した状態で第1基板10と第3基板30との間に挿入されていることを除き、他は図17に示した単位画素110Gの構成と実質的に同じである。すなわち、第2基板20は、第1基板10に対し、フェイストゥーバックで貼り合わされており、第3基板30は、第2基板20に対し、フェイストゥーフェイスで貼り合わされている。したがって、第1基板10の表面と第2基板20の裏面との界面において、パッド電極71とパッド電極47とが接合されている。また、第2基板20の表面と第3基板30の表面との界面において、パッド電極58とパッド電極64とが接合されている。 The configuration of the unit pixel 110H in FIG. 18 is the unit pixel shown in FIG. 17 except that the second substrate 20 is inserted between the first substrate 10 and the third substrate 30 in an inverted state. It is substantially the same as the configuration of 110G. That is, the second substrate 20 is attached to the first substrate 10 face-to-back, and the third substrate 30 is attached to the second substrate 20 face-to-face. Therefore, the pad electrode 71 and the pad electrode 47 are joined at the interface between the front surface of the first substrate 10 and the back surface of the second substrate 20. Further, the pad electrode 58 and the pad electrode 64 are joined at the interface between the surface of the second substrate 20 and the surface of the third substrate 30.
 また、本開示の撮像装置は、可視光の光量分布を検出して画像として取得する撮像装置に限定されるものではなく、赤外線やX線、あるいは粒子等の入射量の分布を画像として取得する撮像装置であってもよい。 Further, the image pickup device of the present disclosure is not limited to the image pickup device that detects the light amount distribution of visible light and acquires it as an image, and acquires the distribution of the incident amount of infrared rays, X-rays, particles, or the like as an image. It may be an image pickup device.
 また、本開示の撮像装置は、撮像部と信号処理部または光学系とがまとめてパッケージングされたモジュールの形態をなしていてもよい。 Further, the image pickup apparatus of the present disclosure may be in the form of a module in which an image pickup unit and a signal processing unit or an optical system are packaged together.
 本開示の一実施形態としての撮像装置およびその製造方法によれば、半導体基板の第1の面から第2の面に向けて厚さ方向に延在する分離部を設け、第1の領域部分と第2の領域部分とを物理的に分離するようにした。このため、第1の領域部分および第2の領域部分の各々に対し、意図しない不要な光が照射されるのを回避することができる。さらに、分離部と第2の面との間に電荷経路部を設けるようにしたので、第1の光電変換部の出力と、第2の光電変換部の出力とを共有することができる。その結果、位相差情報を得ることができる。
 なお、本明細書中に記載された効果はあくまで例示であってその記載に限定されるものではなく、他の効果があってもよい。また、本技術は以下のような構成を取り得るものである。
(1)
 第1の面と、厚さ方向において前記第1の面と反対側に位置する第2の面とを含み、前記第1の面および前記第2の面に沿った面内方向において隣り合う第1の領域部分および第2の領域部分を有する半導体基板と、
 前記第1の領域部分と前記第2の領域部分とを隔てるように、前記第1の面から前記厚さ方向に沿って延びる分離部と、
 前記第1の領域部分に設けられ、前記第1の面から入射する第1の光を検出して光電変換を行うことにより、第1の電荷を生成可能な第1の光電変換部と、
 前記第2の領域部分に設けられ、前記第1の面から入射する第2の光を検出して光電変換を行うことにより、第2の電荷を生成可能な第2の光電変換部と、
 前記分離部と前記第2の面との間であって前記厚さ方向において前記分離部と重なり合う位置に設けられ、前記第1の電荷および前記第2の電荷が通過可能に設けられた電荷経路部と
 を有する撮像装置。
(2)
 前記分離部と前記電荷経路部とは互いに接している
 上記(1)記載の撮像装置。
(3)
 前記電荷経路部と前記配線層との間に設けられた絶縁層をさらに有する
 上記(1)または(2)に記載の撮像装置。
(4)
 前記第1の領域部分および前記第2の領域部分を一体に取り囲む周辺分離部をさらに有する
 上記(1)から(3)のいずれか1つに記載の撮像装置。
(5)
 前記第1の領域部分に設けられ、前記第1の電荷を蓄積すると共に蓄積された前記第1の電荷を電気信号に変換して出力する第1の電荷電圧変換部と、
 前記第2の領域部分に設けられ、前記第2の電荷を蓄積すると共に蓄積された前記第2の電荷を電気信号に変換して出力する第2の電荷電圧変換部と
 をさらに有する
 上記(1)から(4)のいずれか1つに記載の撮像装置。
(6)
 前記半導体基板は、シリコン基板であり、
 前記電荷経路部は、結晶シリコンを含む
 上記(1)から(5)のいずれか1つに記載の撮像装置。
(7)
 前記半導体基板は、シリコン基板であり、
 前記電荷経路部は、非晶質シリコンを含む
 上記(1)から(5)のいずれか1つに記載の撮像装置。
(8)
 前記第2の面を覆う配線層をさらに有する
 上記(1)から(7)のいずれか1つに記載の撮像装置。
(9)
 前記配線層は、薄膜トランジスタを含む
 上記(8)記載の撮像装置。
(10)
 第1の面と、厚さ方向において前記第1の面と反対側に位置する第2の面とを含み、前記第1の面および前記第2の面に沿って隣り合う第1の領域部分および第2の領域部分を有する半導体基板を用意することと、
 前記半導体基板の前記第2の面から選択的に掘り下げることにより、前記第1の領域部分と前記第2の領域部分とを隔てる第1のトレンチを前記半導体基板に形成することと、
 前記第1のトレンチを埋めるように分離部を形成することと、
 前記分離部のうち、前記第2の面に露出した上端部を除去し、凹部を形成することと、
 前記凹部を埋めるように、電荷経路部を形成することと、
 前記第1の領域部分に、前記第1の面から入射する第1の光を検出して光電変換を行うことにより、前記電荷経路部を通過する第1の電荷を生成可能な第1の光電変換部を形成することにより、前記電荷経路部を通過する第2の電荷を生成可能な第2の光電変換部を形成することと
 を含む
 撮像装置の製造方法。
(11)
 前記半導体基板として、シリコン基板を用意し、
 前記シリコン基板に対し還元性雰囲気中においてアニール処理を行い、前記シリコン基板に含まれるケイ素を前記凹部にマイグレーションさせることで前記電荷経路部を形成する
 上記(10)に記載の撮像装置の製造方法。
(12)
 前記還元性雰囲気は水素雰囲気である
 上記(11)に記載の撮像装置の製造方法。
(13)
 前記半導体基板として、シリコン基板を用意し、
 エピタキシャル成長法により前記凹部に結晶シリコンを形成することで前記電荷経路部を形成する
 上記(10)または(11)に記載の撮像装置の製造方法。
(14)
 前記半導体基板として、シリコン基板を用意し、
 気相蒸着法により前記凹部に非晶質シリコンを形成することで前記電荷経路部を形成する
 上記(10)から(13)のいずれか1つに記載の撮像装置の製造方法。
(15)
 前記第2の面を覆うように配線層を形成すること、をさらに含む
 上記(10)から(14)のいずれか1つに記載の撮像装置の製造方法。
(16)
 薄膜トランジスタを含むように前記配線層を形成する
 上記(15)記載の撮像装置の製造方法。
(17)
 前記電荷経路部と前記配線層との間に絶縁層を形成すること、をさらに含む
 上記(15)または(16)記載の撮像装置の製造方法。
According to the image pickup apparatus and the manufacturing method thereof as one embodiment of the present disclosure, a separation portion extending in the thickness direction from the first surface to the second surface of the semiconductor substrate is provided, and the first region portion is provided. And the second region part were physically separated. Therefore, it is possible to avoid unintended and unnecessary irradiation of each of the first region portion and the second region portion. Further, since the charge path portion is provided between the separation portion and the second surface, the output of the first photoelectric conversion unit and the output of the second photoelectric conversion unit can be shared. As a result, phase difference information can be obtained.
It should be noted that the effects described in the present specification are merely examples and are not limited to the description thereof, and other effects may be obtained. In addition, the present technology can have the following configurations.
(1)
A second surface that includes a first surface and a second surface that is located on the opposite side of the first surface in the thickness direction, and is adjacent to the first surface and the second surface along the second surface in an in-plane direction. A semiconductor substrate having one region portion and a second region portion,
A separation portion extending along the thickness direction from the first surface so as to separate the first region portion and the second region portion.
A first photoelectric conversion unit provided in the first region portion and capable of generating a first charge by detecting a first light incident from the first surface and performing photoelectric conversion.
A second photoelectric conversion unit provided in the second region portion and capable of generating a second charge by detecting a second light incident from the first surface and performing photoelectric conversion.
A charge path provided between the separation portion and the second surface at a position overlapping the separation portion in the thickness direction so that the first charge and the second charge can pass through. An image pickup device having an electric charge.
(2)
The image pickup apparatus according to (1) above, wherein the separation portion and the charge path portion are in contact with each other.
(3)
The image pickup apparatus according to (1) or (2) above, further comprising an insulating layer provided between the charge path portion and the wiring layer.
(4)
The image pickup apparatus according to any one of (1) to (3) above, further comprising a peripheral separation portion that integrally surrounds the first region portion and the second region portion.
(5)
A first charge-voltage conversion unit provided in the first region portion, which accumulates the first charge and converts the accumulated first charge into an electric signal and outputs the electric signal.
The above (1), which is provided in the second region portion and further has a second charge-voltage conversion unit that accumulates the second charge and converts the accumulated second charge into an electric signal and outputs the electric signal. The image pickup apparatus according to any one of (4) to (4).
(6)
The semiconductor substrate is a silicon substrate and is a silicon substrate.
The image pickup apparatus according to any one of (1) to (5) above, wherein the charge path portion contains crystalline silicon.
(7)
The semiconductor substrate is a silicon substrate and is a silicon substrate.
The image pickup apparatus according to any one of (1) to (5) above, wherein the charge path portion contains amorphous silicon.
(8)
The image pickup apparatus according to any one of (1) to (7) above, further comprising a wiring layer covering the second surface.
(9)
The image pickup apparatus according to (8) above, wherein the wiring layer includes a thin film transistor.
(10)
A first region portion comprising a first surface and a second surface located opposite the first surface in the thickness direction, the first surface and adjacent first regions along the second surface. And to prepare a semiconductor substrate having a second region portion,
By selectively digging from the second surface of the semiconductor substrate, a first trench separating the first region portion and the second region portion is formed in the semiconductor substrate.
Forming a separation so as to fill the first trench,
Of the separated portions, the upper end portion exposed on the second surface is removed to form a recess.
To form a charge path portion so as to fill the recess,
A first photoelectric that can generate a first charge passing through the charge path portion by detecting a first light incident on the first region portion and performing a photoelectric conversion on the first region portion. A method for manufacturing an image pickup apparatus, which comprises forming a second photoelectric conversion unit capable of generating a second charge passing through the charge path unit by forming the conversion unit.
(11)
A silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
The method for manufacturing an image pickup apparatus according to (10) above, wherein the silicon substrate is annealed in a reducing atmosphere and the silicon contained in the silicon substrate is migrated to the recess to form the charge path portion.
(12)
The reducing atmosphere is a hydrogen atmosphere. The method for manufacturing an image pickup apparatus according to (11) above.
(13)
A silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
The method for manufacturing an image pickup apparatus according to (10) or (11) above, wherein the charge path portion is formed by forming crystalline silicon in the concave portion by an epitaxial growth method.
(14)
A silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
The method for manufacturing an image pickup apparatus according to any one of (10) to (13) above, wherein the charge path portion is formed by forming amorphous silicon in the concave portion by a vapor deposition method.
(15)
The method for manufacturing an image pickup apparatus according to any one of (10) to (14) above, further comprising forming a wiring layer so as to cover the second surface.
(16)
The method for manufacturing an image pickup apparatus according to (15) above, wherein the wiring layer is formed so as to include a thin film transistor.
(17)
The method for manufacturing an image pickup apparatus according to (15) or (16) above, further comprising forming an insulating layer between the charge path portion and the wiring layer.
 本出願は、日本国特許庁において2020年10月12日に出願された日本特許出願番号2020-172218号を基礎として優先権を主張するものであり、この出願のすべての内容を参照によって本出願に援用する。 This application claims priority on the basis of Japanese Patent Application No. 2020-172218 filed on October 12, 2020 at the Japan Patent Office, and this application is made by reference to all the contents of this application. Invite to.
 当業者であれば、設計上の要件や他の要因に応じて、種々の修正、コンビネーション、サブコンビネーション、および変更を想到し得るが、それらは添付の請求の範囲やその均等物の範囲に含まれるものであることが理解される。 Those skilled in the art may conceive various modifications, combinations, sub-combinations, and changes, depending on design requirements and other factors, which are included in the claims and their equivalents. It is understood that it is a person skilled in the art.

Claims (17)

  1.  第1の面と、厚さ方向において前記第1の面と反対側に位置する第2の面とを含み、前記第1の面および前記第2の面に沿った面内方向において隣り合う第1の領域部分および第2の領域部分を有する半導体基板と、
     前記第1の領域部分と前記第2の領域部分とを隔てるように、前記第1の面から前記厚さ方向に沿って延びる分離部と、
     前記第1の領域部分に設けられ、前記第1の面から入射する第1の光を検出して光電変換を行うことにより、第1の電荷を生成可能な第1の光電変換部と、
     前記第2の領域部分に設けられ、前記第1の面から入射する第2の光を検出して光電変換を行うことにより、第2の電荷を生成可能な第2の光電変換部と、
     前記分離部と前記第2の面との間であって前記厚さ方向において前記分離部と重なり合う位置に設けられ、前記第1の電荷および前記第2の電荷が通過可能に設けられた電荷経路部と
     を有する撮像装置。
    A second surface that includes a first surface and a second surface that is located on the opposite side of the first surface in the thickness direction, and is adjacent to the first surface and the second surface along the second surface in an in-plane direction. A semiconductor substrate having one region portion and a second region portion,
    A separation portion extending along the thickness direction from the first surface so as to separate the first region portion and the second region portion.
    A first photoelectric conversion unit provided in the first region portion and capable of generating a first charge by detecting a first light incident from the first surface and performing photoelectric conversion.
    A second photoelectric conversion unit provided in the second region portion and capable of generating a second charge by detecting a second light incident from the first surface and performing photoelectric conversion.
    A charge path provided between the separation portion and the second surface at a position overlapping the separation portion in the thickness direction so that the first charge and the second charge can pass through. An image pickup device having an electric charge.
  2.  前記分離部と前記電荷経路部とは互いに接している
     請求項1記載の撮像装置。
    The image pickup apparatus according to claim 1, wherein the separation unit and the charge path unit are in contact with each other.
  3.  前記第2の面を覆う配線層と、
     前記電荷経路部と前記配線層との間に設けられた絶縁層をさらに有する
     請求項1記載の撮像装置。
    The wiring layer covering the second surface and
    The image pickup apparatus according to claim 1, further comprising an insulating layer provided between the charge path portion and the wiring layer.
  4.  前記第1の領域部分および前記第2の領域部分を一体に取り囲む周辺分離部をさらに有する
     請求項1記載の撮像装置。
    The imaging apparatus according to claim 1, further comprising a peripheral separation portion that integrally surrounds the first region portion and the second region portion.
  5.  前記第1の領域部分に設けられ、前記第1の電荷を蓄積すると共に蓄積された前記第1の電荷を電気信号に変換して出力する第1の電荷電圧変換部と、
     前記第2の領域部分に設けられ、前記第2の電荷を蓄積すると共に蓄積された前記第2の電荷を電気信号に変換して出力する第2の電荷電圧変換部と
     をさらに有する
     請求項1記載の撮像装置。
    A first charge-voltage conversion unit provided in the first region portion, which accumulates the first charge and converts the accumulated first charge into an electric signal and outputs the electric signal.
    Claim 1 further includes a second charge-voltage conversion unit provided in the second region portion, which accumulates the second charge and converts the accumulated second charge into an electric signal and outputs the electric signal. The imaging device described.
  6.  前記半導体基板は、シリコン基板であり、
     前記電荷経路部は、結晶シリコンを含む
     請求項1記載の撮像装置。
    The semiconductor substrate is a silicon substrate and is a silicon substrate.
    The image pickup apparatus according to claim 1, wherein the charge path portion includes crystalline silicon.
  7.  前記半導体基板は、シリコン基板であり、
     前記電荷経路部は、非晶質シリコンを含む
     請求項1記載の撮像装置。
    The semiconductor substrate is a silicon substrate and is a silicon substrate.
    The image pickup apparatus according to claim 1, wherein the charge path portion contains amorphous silicon.
  8.  前記第2の面を覆う配線層をさらに有する
     請求項1記載の撮像装置。
    The image pickup apparatus according to claim 1, further comprising a wiring layer covering the second surface.
  9.  前記配線層は、薄膜トランジスタを含む
     請求項8記載の撮像装置。
    The image pickup apparatus according to claim 8, wherein the wiring layer includes a thin film transistor.
  10.  第1の面と、厚さ方向において前記第1の面と反対側に位置する第2の面とを含み、前記第1の面および前記第2の面に沿って隣り合う第1の領域部分および第2の領域部分を有する半導体基板を用意することと、
     前記半導体基板の前記第2の面から選択的に掘り下げることにより、前記第1の領域部分と前記第2の領域部分とを隔てる第1のトレンチを前記半導体基板に形成することと、
     前記第1のトレンチを埋めるように分離部を形成することと、
     前記分離部のうち、前記第2の面に露出した上端部を除去し、凹部を形成することと、
     前記凹部を埋めるように、電荷経路部を形成することと、
     前記第1の領域部分に、前記第1の面から入射する第1の光を検出して光電変換を行うことにより、前記電荷経路部を通過する第1の電荷を生成可能な第1の光電変換部を形成することにより、前記電荷経路部を通過する第2の電荷を生成可能な第2の光電変換部を形成することと
     を含む
     撮像装置の製造方法。
    A first region portion comprising a first surface and a second surface located opposite the first surface in the thickness direction, the first surface and adjacent first regions along the second surface. And to prepare a semiconductor substrate having a second region portion,
    By selectively digging from the second surface of the semiconductor substrate, a first trench separating the first region portion and the second region portion is formed in the semiconductor substrate.
    Forming a separation so as to fill the first trench,
    Of the separated portions, the upper end portion exposed on the second surface is removed to form a recess.
    To form a charge path portion so as to fill the recess,
    A first photoelectric that can generate a first charge passing through the charge path portion by detecting a first light incident on the first region portion and performing a photoelectric conversion on the first region portion. A method for manufacturing an image pickup apparatus, which comprises forming a second photoelectric conversion unit capable of generating a second charge passing through the charge path unit by forming the conversion unit.
  11.  前記半導体基板として、シリコン基板を用意し、
     前記シリコン基板に対し還元性雰囲気中においてアニール処理を行い、前記シリコン基板に含まれるケイ素を前記凹部にマイグレーションさせることで前記電荷経路部を形成する
     請求項10記載の撮像装置の製造方法。
    A silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
    The method for manufacturing an image pickup apparatus according to claim 10, wherein the silicon substrate is annealed in a reducing atmosphere and the silicon contained in the silicon substrate is migrated to the recess to form the charge path portion.
  12.  前記還元性雰囲気は水素雰囲気である
     請求項11記載の撮像装置の製造方法。
    The method for manufacturing an image pickup apparatus according to claim 11, wherein the reducing atmosphere is a hydrogen atmosphere.
  13.  前記半導体基板として、シリコン基板を用意し、
     エピタキシャル成長法により前記凹部に結晶シリコンを形成することで前記電荷経路部を形成する
     請求項10記載の撮像装置の製造方法。
    A silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
    The method for manufacturing an image pickup apparatus according to claim 10, wherein the charge path portion is formed by forming crystalline silicon in the concave portion by an epitaxial growth method.
  14.  前記半導体基板として、シリコン基板を用意し、
     気相蒸着法により前記凹部に非晶質シリコンを形成することで前記電荷経路部を形成する
     請求項10記載の撮像装置の製造方法。
    A silicon substrate is prepared as the semiconductor substrate, and the silicon substrate is prepared.
    The method for manufacturing an image pickup apparatus according to claim 10, wherein the charge path portion is formed by forming amorphous silicon in the concave portion by a vapor deposition method.
  15.  前記第2の面を覆うように配線層を形成すること、をさらに含む
     請求項10記載の撮像装置の製造方法。
    The method for manufacturing an image pickup apparatus according to claim 10, further comprising forming a wiring layer so as to cover the second surface.
  16.  薄膜トランジスタを含むように前記配線層を形成する
     請求項15記載の撮像装置の製造方法。
    The method for manufacturing an image pickup apparatus according to claim 15, wherein the wiring layer is formed so as to include a thin film transistor.
  17.  前記電荷経路部と前記配線層との間に絶縁層を形成すること、をさらに含む
     請求項15記載の撮像装置の製造方法。
    The method for manufacturing an image pickup apparatus according to claim 15, further comprising forming an insulating layer between the charge path portion and the wiring layer.
PCT/JP2021/035313 2020-10-12 2021-09-27 Imaging device and manufacturing method for imaging device WO2022080124A1 (en)

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JP2017212351A (en) * 2016-05-26 2017-11-30 キヤノン株式会社 Imaging device
JP2018201015A (en) * 2017-05-29 2018-12-20 ソニーセミコンダクタソリューションズ株式会社 Solid state image pickup device and electronic apparatus

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158800A (en) * 2007-12-27 2009-07-16 Nikon Corp Solid-state imaging element, and imaging device using it
JP2013084742A (en) * 2011-10-07 2013-05-09 Canon Inc Photoelectric conversion device and imaging system
JP2013149743A (en) * 2012-01-18 2013-08-01 Canon Inc Imaging device and imaging system
JP2017212351A (en) * 2016-05-26 2017-11-30 キヤノン株式会社 Imaging device
JP2018201015A (en) * 2017-05-29 2018-12-20 ソニーセミコンダクタソリューションズ株式会社 Solid state image pickup device and electronic apparatus

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