WO2022068300A1 - 功耗测量组件及方法、芯片功耗测量装置 - Google Patents

功耗测量组件及方法、芯片功耗测量装置 Download PDF

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WO2022068300A1
WO2022068300A1 PCT/CN2021/103724 CN2021103724W WO2022068300A1 WO 2022068300 A1 WO2022068300 A1 WO 2022068300A1 CN 2021103724 W CN2021103724 W CN 2021103724W WO 2022068300 A1 WO2022068300 A1 WO 2022068300A1
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power consumption
module
sampling
chip
consumption measurement
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PCT/CN2021/103724
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English (en)
French (fr)
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陈鑫旺
马茂松
周张琴
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长鑫存储技术有限公司
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Priority to US17/447,428 priority Critical patent/US12032022B2/en
Publication of WO2022068300A1 publication Critical patent/WO2022068300A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00—Arrangements for measuring electric power or power factor
    • G01R21/06—Arrangements for measuring electric power or power factor by measuring current and voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing

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  • the embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular, to a power consumption measurement component and method, and a chip power consumption measurement device.
  • Synchronous Dynamic Random Access Memory is a semiconductor memory device commonly used in computers. Since the power supply voltage of the SDRAM chip is fixed, usually when measuring the power consumption of each group of power supplies on it, it is only necessary to measure the current size.
  • the traditional method of measuring current is to connect a current sampling resistor in series with the power signal, and use a multimeter or an oscilloscope to measure the voltage drop across the current sampling resistor, and divide the voltage drop value by the resistance of the current sampling resistor to calculate the current.
  • a power consumption measurement component for a circuit to be tested, and the power consumption measurement component includes:
  • At least two sampling modules are respectively connected in series in the circuit to be tested
  • a gating module for gating one of the at least two sampling modules
  • an amplifying module for collecting and amplifying the voltage signal at both ends of the gated sampling module
  • a processing module connected with the gating module and the amplifying module, used to control and adjust the sampling module of the gating and the magnification of the amplifying module, and calculate the power consumption value according to the amplified voltage signal, and send the the power consumption value.
  • a power consumption measurement method for the above-mentioned power consumption measurement component comprising:
  • a power consumption value is calculated according to the amplified voltage signal, and the power consumption value is sent.
  • a device for measuring power consumption of a chip including:
  • sampling resistor of the power consumption measurement component is connected in series with the power supply pin of the chip.
  • FIG. 1 schematically shows a schematic structural diagram of a power consumption measurement component according to an exemplary implementation of an embodiment of the present disclosure
  • FIG. 2 schematically shows a schematic flowchart of a method for measuring power consumption according to an exemplary implementation of an embodiment of the present disclosure
  • FIG. 3 schematically shows a flow chart of a state transition program on a processing module according to an exemplary implementation of an embodiment of the present disclosure
  • FIG. 4 schematically shows a schematic flow chart of a program on a host computer according to an exemplary implementation of an embodiment of the present disclosure
  • FIG. 5 schematically shows a schematic structural diagram of a device for measuring power consumption of a chip according to an exemplary implementation of an embodiment of the present disclosure
  • FIG. 6 schematically shows a schematic structural diagram of another chip power consumption measuring apparatus according to an exemplary implementation of an embodiment of the present disclosure.
  • Example embodiments will now be described more fully with reference to the accompanying drawings.
  • Example embodiments can be embodied in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that embodiments of the present disclosure will be thorough and complete, and will fully convey the concept of example embodiments conveyed to those skilled in the art.
  • the same reference numerals in the drawings denote the same or similar structures, and thus their detailed descriptions will be omitted.
  • SDRAM Secure Digital RAM
  • DDR SDRAM Double Data Rate SDRAM, double
  • DDR2SDRAM Double Data Rate 2SDRAM, second-generation double-rate synchronous dynamic random access memory
  • An important prerequisite for reducing the power consumption of the chip is to detect the power consumption of the chip.
  • An exemplary implementation of the embodiments of the present disclosure provides a power consumption measurement component, which is mainly used for power consumption measurement. It can not only be used for the power consumption measurement of the above-mentioned SDRAM chips (including SDR, DDR ⁇ DDR5, LPDDR ⁇ LPDDR5, etc.), but also for the measurement of various chips such as CPU chips and heat meters. It is especially suitable for devices with a relatively large range of power consumption.
  • the dynamic power consumption comes from the switching power consumption and short-circuit power consumption when the load capacitor is charged and discharged;
  • the static power consumption comes from the sub-threshold leakage current flowing through the cut-off transistor, the leakage current flowing through the gate dielectric, and the leakage current of the source-drain diffusion region. Leakage currents, and competing currents in proportional circuits, etc.
  • the power consumption measurement component provided in the exemplary implementation of the embodiments of the present disclosure can not only be used to measure dynamic power consumption, but also can be used to measure static power consumption.
  • FIG. 1 a schematic structural diagram of a power consumption measurement component according to an exemplary implementation of an embodiment of the present disclosure is shown.
  • the power consumption measurement component 100 provided in this exemplary embodiment is used for a circuit under test 110 , where the circuit under test 110 may be a power circuit in an SDRAM chip and other circuits that need to measure power consumption.
  • the power consumption measurement component 100 may specifically include: a processing module 120, an amplification module 130, a gating module 140, and at least two sampling modules 150, wherein the at least two sampling modules 150 are respectively connected in series in the circuit to be tested 110; the gating module 140 is used for gating one of the at least two sampling modules; the amplifying module 130 is used for collecting and amplifying the gated voltage signal at both ends of the sampling module 150; The processing module 120 is connected to the gating module 140 and the amplifying module 130, and is used to control and adjust the sampling module 150 of the gating and the amplification factor of the amplifying module 130, and calculate the power according to the amplified voltage signal. power consumption value, and send the power consumption value.
  • a suitable sampling module 150 can be selected according to the actual variation range of the current on the circuit under test 110, which not only increases the The accuracy of the measurement can be increased, and the measurement range of the current on the circuit to be tested 110 can be increased to meet the measurement of the large current dynamic range of devices such as SDRAM chips under different working states.
  • the sampling module 150 may be a sampling resistor, and the resistance values of at least two sampling resistors are different, and different resistance values will obtain different voltage drops.
  • the sampling module 150 with a larger resistance value can be selected to increase the voltage drop across the sampling module 150 and obtain more accurate results; when the current on the circuit under test 110 is large, The sampling module 150 with a smaller resistance value can be selected, and on the premise of obtaining more accurate results, the voltage drop across the sampling module 150 can be reduced to meet the requirements of the working voltage on the chip 300 .
  • the resistance range of the sampling resistor can be set according to actual needs.
  • the resistance value of the sampling resistor may range from 50m ⁇ to 10 ⁇ . It should be noted that any resistance value range of the sampling resistor that meets the measurement requirements falls within the protection scope of the embodiments of the present disclosure.
  • the number of sampling modules 150 may be two, or three or more, and the specific number of sampling modules 150 may be determined according to the actual range of the current to be measured in the actual circuit 110 to be measured. If the actual current range is too large, multiple sampling modules 150 with different resistance values can be set.
  • the above-mentioned sampling module 150 may be a current sampling resistor, which is mainly used to measure the current on the circuit 110 under test.
  • the power dissipation is obtained by multiplying the current and the supply voltage.
  • the resistance value of the current sampling resistor is smaller and the power consumption is smaller, which can reduce the power consumption in the detection process.
  • the gating module 140 by disposing the gating module 140 in the power consumption measuring component 100, wherein the gating module 140 is disposed on the circuit under test 110, the gating module 140 can be used for gating the at least two One of the sampling modules 150.
  • the gating module 140 may be disposed between the power supply on the circuit under test 110 and the sampling module 150 to complete the signal switching of the two sampling modules 150 .
  • the gating module 140 may be an analog switch, a relay, a photoelectric switch, or the like.
  • the analog switch can use a MOS transistor (Metal Oxide Semiconductor, metal-oxide-semiconductor field effect transistor) switching method to turn off or turn on the signal link, so as to achieve higher turn-off impedance and lower turn-on impedance.
  • MOS transistor Metal Oxide Semiconductor, metal-oxide-semiconductor field effect transistor
  • the resistance of the gate module 140 when it is turned on may be 5m ⁇ , and the resistance when it is turned off may be greater than 10K ⁇ . This exemplary embodiment does not specifically limit this.
  • the amplifying module 130 in the power consumption measuring component 100, the voltage signal across the gated sampling module 150 can be amplified. This facilitates the processing module 120 to collect and identify the voltage signal, thereby providing support for the sampling module 150 to collect smaller currents, so as to further increase the current range on the circuit under test 110 that can be measured by the power consumption measuring component 100 .
  • the amplification module 130 includes at least two optional amplification factors, and the current measurement range of the power consumption measurement component 100 can be expanded through different sampling modules 150 and different amplification factors , to meet the needs of more current measurement ranges.
  • the amplifying module 130 may be a variable gain amplifier.
  • the magnification of the amplifying module 130 can be set according to actual needs.
  • the magnification of the magnification module 130 may be 10 times to 200 times. It should be noted that any magnification of the amplifying module 130 that meets the measurement requirements falls within the protection scope of the embodiments of the present disclosure.
  • the magnification of the amplifying module 130 may also be adjustable, and the number and size of the magnification may be determined according to the range of the current in the circuit under test 110.
  • the magnification module 130 of the power consumption measuring assembly 100 can select at least two magnifications, for example, 10 times and 100 times. If the input voltage to the amplifying module 130 is 1mV, when the amplification factor is 10 times, the output voltage of the amplifying module 130 is 10mV; when the amplification factor is 100 times, the output voltage of the amplifying module 130 is 0.1V. This exemplary embodiment does not specifically limit the specific magnification of the amplifying module 130 .
  • the number of channels 131 in the amplifying module 130 is at least two, which are respectively used to collect voltage drops across different sampling modules 150 .
  • the input end of the channel 131 is connected to two ends of one of the sampling modules 150 , and the output end of the channel 131 is connected to the analog-to-digital converter 121 .
  • the input end of one of the channels 131 is connected to both ends of one of the sampling modules 150 , the output end of the channel 131 is connected to one of the analog-to-digital converters 121 ; the input end of the other channel 131 Connected to two ends of the other sampling module 150 , the output end of the channel 131 is connected to another analog-to-digital converter 121 .
  • a processing module 120 is further provided in the power consumption measuring component 100, wherein the processing module 120 (Microcontrollers) is an integrated circuit chip, which adopts the ultra-large-scale integrated circuit technology to Data processing capability of central processing unit, random access memory, read-only memory, various I/O ports and interrupt systems, timer/counter and other functions (may also include display driver circuit, pulse width modulation circuit, analog multiplexer, A small and complete microcomputer system composed of analog-to-digital converters and other circuits) integrated into a silicon chip.
  • the processing module 120 can collect and identify the voltage signal amplified by the amplifying module 130, convert the voltage signal into a digital signal, calculate the power consumption value according to the digital signal, and finally send the power consumption value to the host computer 200 and the like.
  • the processing module 120 needs to be connected to the gating module 140 to control the gating module 140 to gate the sampling modules 150 required, so that at least two sampling modules 150
  • the processing module 120 also needs to be connected to the amplifying module 130 to control the magnification of the amplifying module 130, so that the appropriate sampling module 150 can be selected according to the actual current in the circuit 110 to be tested.
  • the sampling module 150 and the amplification factor can meet the current measurement requirements of the circuit under test under the condition of satisfying the voltage drop range of the sampling module 150, and can also reduce power consumption and save energy.
  • the power consumption measurement component 100 Compared with external devices with weaker data processing and analysis capabilities such as multimeters/oscilloscopes, the power consumption measurement component 100 provided by the exemplary implementation of the embodiments of the present disclosure can set the processing module 120 without requiring external devices to reduce power consumption.
  • the gating of the sampling module 150, the selection of magnification, and other controls, as well as data processing and analysis are completed inside the measurement component 100, and the data processing and analysis capabilities are stronger, faster, and more accurate.
  • the above-mentioned processing module 120 includes: an analog-to-digital converter 121, an arithmetic module, a serial port 122, and a control logic module; wherein, the analog-to-digital converter 121 is connected to the amplifying module 130, using It is used to convert the voltage signal into a digital signal, so as to facilitate the operation of the operation module; the operation module is used to calculate the power consumption value according to the digital signal; the serial port 122 is used to connect the host computer 200, and the power consumption value sent to the host computer 200; the control logic module is used to control the sampling module 150 for adjusting the gating and the amplification factor of the amplification module 130.
  • control logic module is used to control the current range of the circuit under test 110 , the convertible voltage range of the analog-to-digital converter 121 , and the voltage drop range of the gating module 140 and the sampling module 150 . , and determine the magnification of the sampling module 150 and the amplification module 130 to be gated.
  • analog-to-digital converters 121 there may be two analog-to-digital converters 121, and one analog-to-digital converter 121 corresponds to one amplifying module 130, so as to convert the time-continuous and continuous-amplitude analog voltage signal amplified by the amplifying module 130 into time-discrete, Amplitudes are also discrete digital signals.
  • the analog-to-digital converter 121 has a convertible voltage range, and the voltage signal amplified by the amplifying module 130 needs to satisfy the convertible voltage range.
  • the convertible voltage range of the analog-to-digital converter 121 may be 10mV-2V, etc., which is not particularly limited in this exemplary embodiment.
  • the arithmetic module can calculate the current I of the circuit under test 110 according to the above digital signal, combined with the resistance value R of the sampling module 150 that is gated, and then combined with the resistance value R of the power supply.
  • the serial port 122 may be a UART (Universal Asynchronous Receiver/Transmitter, Universal Asynchronous Receiver/Transmitter), which is suitable for a short distance and a low rate.
  • the serial port 122 may also be other synchronous serial port, which is not particularly limited in this exemplary embodiment.
  • USB Universal Serial Bus, Universal Serial Bus
  • the processing module 120 may be a single chip microcomputer.
  • the single-chip microcomputer may be a single-chip microcomputer with an analog-to-digital converter inside, or a single-chip computer without an analog-to-digital converter inside.
  • the processing module 120 selects a single-chip microcomputer with a built-in crystal oscillator and an analog-to-digital converter.
  • the power consumption measurement component 100 further includes a substrate; the sampling module 150, the gating module 140, the amplifying module 130, and the processing module 120 are all disposed in On the substrate, the size and shape of the substrate are determined according to the overall area occupied by the components to be disposed on the substrate.
  • the number of power consumption measuring components 100 may be determined according to the number of power supply signals to be measured in the chip 300 , that is, each power supply signal corresponds to one power consumption measuring component 100 .
  • the current measurement range of the power consumption measurement component 100 can be increased to meet more kinds of requirements. Variation of the current in the circuit 110 under test.
  • the voltage signal at both ends of the sampling module 150 is amplified by the amplification module 130, so that the processing module 120 collects and identifies the voltage signal. This provides support for the sampling module 150 to collect smaller currents, further increases the current measurement range of the power consumption measurement component 100, and meets more demands.
  • an appropriate sampling module 150 and magnification can be selected according to the actual current in the circuit to be measured 110, so as to satisfy the sampling In the case of the voltage drop range of the module 150, the current measurement requirements are met.
  • the devices used in the entire power consumption measurement component 100 are commonly used devices, and high-end current testing devices with high accuracy are not used. Therefore, the entire measurement The measurement cost of the component is also relatively low, and the purpose of reducing power consumption and saving energy can be achieved.
  • An exemplary implementation of the embodiments of the present disclosure also provides a method for measuring power consumption.
  • FIG. 2 a schematic flowchart of a method for measuring power consumption according to an exemplary implementation of an embodiment of the present disclosure is shown.
  • the power consumption measurement method is used in the above-mentioned power consumption measurement component 100, and specifically, it is controlled and executed by the control logic module in the power consumption measurement component 100.
  • the power consumption measurement method may specifically include the following steps:
  • Step S210 controlling and adjusting the magnification of the sampling module and the amplification module of the gated power consumption measurement component
  • Step S220 collecting and amplifying the voltage signals at both ends of the sampling module
  • Step S230 Calculate a power consumption value according to the amplified voltage signal, and send the power consumption value.
  • the current measurement range can be increased to meet the current variation in more types of circuits under test.
  • an appropriate sampling module and magnification can be selected according to the actual current in the circuit to be measured, so as to meet the current measurement requirements and reduce power consumption while satisfying the voltage drop range of the sampling resistor. Energy saving.
  • the gating of the sampling module 150 is realized by selecting different channels by the gating module 140 .
  • the above-mentioned power consumption measurement method may specifically include:
  • the step of controlling and adjusting the magnification of the gated sampling module 150 and the amplification module 130 may specifically include:
  • the current acquisition step includes controlling the gating module 140 of the power consumption measurement component 100 to select the amplification factor of the sampling module 150 and the amplifying module 130;
  • the number of sampling modules 150 used and the amplification factor of the amplifying module 130 can be specifically determined according to the current range in the circuit to be tested, and different measurable current ranges can be obtained through the combination of the above two; The combination of the measurable current ranges finally obtains the current range of the circuit under test, so that the power consumption measurement component 100 can meet the full range requirements of the circuit under test.
  • the above method is decomposed, taking the sampling module 150 including the first resistance value and the second resistance value, and the amplifying module 130 including the first amplification factor and the second amplification factor as an example, the above method is described in detail. described as follows:
  • the current range of the circuit under test 110 of the SDRAM chip is 10 ⁇ A-500mA
  • the convertible voltage range of the analog-to-digital converter 121 is 10mV-2V
  • the voltage on the gating module 140 and the sampling module 150 The sum of the drop is less than or equal to 50mV; in the exemplary implementation of the embodiment of the present disclosure, it is determined that the resistance of the gating module 140 is 5m ⁇ when it is turned on, and the resistance is greater than 10K ⁇ when it is turned off; it is determined that the resistance of one of the sampling modules 150 is the first One resistance value is 50m ⁇ , the resistance value of another sampling module 150 is determined to be 10 ⁇ , the second resistance value is determined;
  • state 1, state 2, state 3, and state 4 four combined state modes can be obtained: state 1, state 2, state 3, and state 4; wherein, the gating module 140 and the voltage on the sampling module 150 of each state
  • the range of the sum of the drops V 1 , the range of the voltage V 2 after the voltage drop of the sampling module 150 is amplified by the amplifying module 130 , and the range of the measurable current I are shown in Table 1:
  • the above state combination can be simplified, and the three state combinations of state 1, state 2 and state 3 can be selected to meet the requirements of 10 ⁇ A-500mA measurement range.
  • control logic module which may include:
  • step 1 control the gating module to select the sampling module with the first resistance value (for example, 50m ⁇ ), and control the amplification factor of the amplification module to adjust to the first amplification factor (for example, 10 times) ; that is, select state 1 for measurement;
  • step 2 it means that state 1 cannot measure this current range, and select the combination of state 2 to measure current I;
  • Step 2 control the gating module to select the sampling module whose resistance value is the first resistance value (for example, 50m ⁇ ), and control the amplification factor of the amplifying module to be adjusted to a second amplification factor (for example, 100 times); That is, select state 2 for measurement;
  • step 3 If it is less than the second lower limit value, then jump to step 3; it means that state 2 cannot measure this current range, and the combination mode of state 3 is selected to measure current I;
  • step 1 If it is greater than the first upper limit value, then jump to step 1; it means that state 2 cannot measure this current range, and the combination mode of state 1 is selected to measure current I;
  • Step 3 control the gating module to select the sampling module with the second resistance value (for example, 10 ⁇ ), and control the amplification factor of the amplification module to adjust to the second amplification factor (for example, 100 times); that is, select State 3 to measure;
  • step 2 If yes, skip to step 2; it means that state 3 cannot measure this current range, and select the combination of state 2 to measure current I;
  • the host computer 200 may be a computer that directly issues control commands, generally a PC, a host computer, a master computer, and an upper computer, and various signal values (for example, maximum power consumption, minimum power consumption, average power consumption, etc.).
  • the command sent by the host computer 200 is first given to the processing module 120, and the processing module 120 interprets the command into a corresponding timing signal to directly control the operation of the corresponding device according to the command.
  • the processing module 120 feeds back the calculated current value and power consumption value to the upper computer 200 through the serial port 122 .
  • the upper computer 200 can be programmed in the Python language, and a powerful third-party extension library can be used to perform graphical display of measurement results, data analysis and mining, etc.
  • the specific operation process can be referred to FIG.
  • FIG. is a schematic flowchart of a program on a host computer according to an exemplary implementation of the embodiment of the present disclosure:
  • An exemplary implementation of the embodiments of the present disclosure further provides a chip power consumption measuring apparatus. Next, an apparatus for measuring the power consumption of a chip obtained by applying the power consumption measuring component 100 in this exemplary embodiment to the chip 300 will be described.
  • the device for measuring power consumption of a chip may specifically include a chip 300 and the above-mentioned power consumption measuring component 100 .
  • the sampling module 150 of the power consumption measurement component 100 is connected in series with the power supply pins of the chip 300 for calculating the power consumption on the power supply.
  • the specific details of the above-mentioned power consumption measurement component 100 have been described in detail in the above-mentioned embodiments, and thus are not repeated here.
  • the chip 300 may be one of a variety of chips such as an SDRAM chip, a CPU chip, and the like.
  • the exemplary implementation of the embodiment of the present disclosure uses an SDRAM chip as an example to describe the chip power consumption measuring device.
  • the chip can be executed by reference.
  • the power consumption measurement component 100 can be arranged between the SDRAM chip and the main board 500, and all the power signals of the SDRAM chip are drawn out from the bottom layer, and are connected in series through the power consumption measurement component 100
  • the sampling module 150 is connected to the power supply pin of the SDRAM chip.
  • the chip power consumption measurement device includes, in addition to the above-mentioned power consumption measurement component 100, a raised board 400, and the raised board 400 may be arranged between the power consumption measurement component 100 and the main board 500, Component 100 is measured with pad power consumption. Because the size of the power consumption measurement component 100 is generally larger than the size of the SDRAM chip, by arranging the pad 400 on the main board 500 to raise the power consumption measurement component 100, the components next to the power consumption measurement component 100 and the SDRAM chip can be avoided. device interferes.
  • the size of the riser board 400 can be designed with reference to the size of the SDRAM chip.
  • the cross-sectional dimensions are the same, and the height of the booster plate 400 is greater than or equal to the thickness of the SDRAM chip.
  • the elevated board 400 can also be configured to include a plurality of sub-elevated boards 410 , and the multiple sub-elevated boards 410 are arranged between the power consumption measurement component 100 and the main board 500 at intervals, which is beneficial to the power consumption measurement component 100 of heat dissipation.
  • the raised board 400 may be epoxy board, epoxy resin board, brominated epoxy resin board, glass fiber board, glass fiber board, flexible circuit board reinforcement board, flame retardant board Insulation board, epoxy glass cloth board, epoxy glass cloth laminate, circuit board drilling pad, etc.
  • the control logic module in the processing module can The switchable voltage range of , and the voltage drop range on the gating module and the sampling module determine the combination of the amplification factors of the sampling module and the amplifying module to be gated.
  • Different current measurement ranges can be obtained through a variety of different combinations, so as to meet the actual measurement needs; in addition, the equipment used in the entire measurement process are commonly used equipment, and high-end current measurement equipment with high accuracy is not used. Therefore, the measurement cost of the entire measurement device is relatively low, which can better meet the needs of users.

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Abstract

一种功耗测量组件及方法、芯片功耗测量装置，涉及集成电路技术领域。该功耗测量组件(100)包括：至少两个采样模块(150)，分别串联在待测电路(110)中；选通模块(140)，用于选通至少两个采样模块(150)中的一个；放大模块(130)，用于采集选通的采样模块(150)两端的电压信号并放大；处理模块(120)，与选通模块(140)、放大模块(130)连接，用于控制调整选通的采样模块(150)以及放大模块(130)的放大倍数，并根据放大的电压信号计算功耗值，发送功耗值。可以增大功耗测量组件的电流测量范围，满足更多种类的待测电路中电流的变化情况。 (图1)

Description

功耗测量组件及方法、芯片功耗测量装置
相关申请的交叉引用
本公开实施例要求于2020年09月30日提交的申请号为202011058673.4名称为“功耗测量组件及方法、芯片功耗测量装置”的中国专利申请的优先权，该中国专利申请的全部内容通过引用全部并入本文。
技术领域
本公开实施例涉及集成电路技术领域，尤其涉及一种功耗测量组件及方法、芯片功耗测量装置。
背景技术
通常对芯片而言，其功耗是芯片设计及运行阶段必不可少的性能参数。芯片的功耗过大，对散热及运行环境等各方面都有很大影响。因此对于功耗的测量显得尤为重要。
同步动态随机存储器(Synchronous Dynamic Random Access Memory，SDRAM)是计算机中常用的半导体存储器件。由于SDRAM芯片的供电电压是固定的，通常在测量其上的各组电源的功耗时，只要测量出电流大小即可。传统的测量电流方法是在电源信号上串联电流采样电阻，并用万用表或者示波器来测量电流采样电阻两端的压降，用压降值除以电流采样电阻的阻值，即可算出电流。
然而，由于SDRAM芯片中各组电源上的电流动态范围过大，导致传统的电流测量方法难以满足需求
发明内容
根据本公开实施例的一方面，提供一种功耗测量组件，用于待测电路，所述功耗测量组件包括：
至少两个采样模块，分别串联在所述待测电路中；
选通模块，用于选通所述至少两个采样模块中的一个；
放大模块，用于采集选通的所述采样模块两端的电压信号并放大；
处理模块，与所述选通模块、所述放大模块连接，用于控制调整选通的所述采样模块以及所述放大模块的放大倍数，并根据放大的所述电压信号计算功耗值，发送所述功耗值。
根据本公开实施例的一方面，提供一种功耗测量方法，用于如上所述的功耗测量组件，所述方法包括：
控制调整选通的所述功耗测量组件的采样模块和放大模块的放大倍数；
采集所述采样模块两端的电压信号并放大；
根据放大的所述电压信号计算功耗值，发送所述功耗值。
根据本公开实施例的一方面，提供一种芯片功耗测量装置，包括：
芯片；
如上任一项所述的功耗测量组件；
其中，所述功耗测量组件的采样电阻串联在所述芯片的电源管脚上。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开实施例。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开实施例的实施例，并与说明书一起用于解释本公开实施例的原理。显而易见地，下面描述中的附图仅仅是本公开实施例的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1示意性示出了根据本公开实施例的示例性实施方式的一个功耗测量组件的结构示意图；
图2示意性示出了根据本公开实施例的示例性实施方式的一种功耗测量方法的流程示意图；
图3示意性示出了根据本公开实施例的示例性实施方式的一种处理模块上的状态转换程序流程图；
图4示意性示出了根据本公开实施例的示例性实施方式的一种上位机上的程序流程示意图；
图5示意性示出了根据本公开实施例的示例性实施方式的一种芯片功耗测量装置的结构示意图；
图6示意性示出了根据本公开实施例的示例性实施方式的另一种芯片功耗测量装置的结构示意图。
具体实施方式
现在将参考附图更全面地描述示例实施例。然而，示例实施例能够以多种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些实施例使得本公开实施例将更加全面和完整，并将示例实施例的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。
虽然本说明书中使用相对性的用语，例如“上”“下”来描述图标的一个组件对于另一组件的相对关系，但是这些术语用于本说明书中仅出于方便，例如根据附图中所述的示例的方向。能理解的是，如果将图标的装置翻转使其上下颠倒，则所叙述在“上”的组件将会成为在“下”的组件。其他相对性的用语，例如“高”“低”“顶”“底”“左”“右”等也作具有类似含 义。当某结构在其它结构“上”时，有可能是指某结构一体形成于其它结构上，或指某结构“直接”设置在其它结构上，或指某结构通过另一结构“间接”设置在其它结构上。
用语“一个”、“一”、“所述”用以表示存在一个或多个要素/组成区分/等；用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成区分/等之外还可存在另外的要素/组成区分/等。
在集成电路技术领域中，特别在进行嵌入式系统设计过程中功耗的计算是一个无法绕开的问题，在功耗的计算过程中尤其以SDRAM、DDR SDRAM(Double Data Rate SDRAM，双倍速率同步动态随机存储器)、DDR2SDRAM(Double Data Rate 2SDRAM，二代双倍速率同步动态随机存储器)等动态随机存储器件的功耗难以把握和计算。
对于芯片而言，减小芯片功耗的一个重要前提是对芯片的功耗进行检测。本公开实施例的示例性实施方式中提供了一种功耗测量组件，主要用于功耗的测量。不仅可以用于上述的SDRAM芯片(包含SDR、DDR～DDR5、LPDDR～LPDDR5等)的功耗测量，还可以用于CPU芯片、热量表等多种芯片的测量。尤其适用于功耗的变化范围比较大的设备。
对于芯片而言，静态功耗以及动态功耗是两个主要的功耗源。其中，动态功耗来源于负载电容充放电时的翻转功耗和短路功耗；静态功耗则来源于流过截止晶体管的亚阈值泄漏电流、流过栅介质的泄漏电流、源漏扩散区的泄漏电流、以及在有比电路中的竞争电流等。本公开实施例的示例性实施方式中提供的功耗测量组件不仅可以用于测量动态功耗，也可以用于测量静态功耗。
下面以具体的实施例对本公开实施例的示例性实施方式中的功耗测量组件进行说明：
参照图1，示出了根据本公开实施例的示例性实施方式的一种功耗测量组件的结构示意图。如图1所示，本示例性实施方式提供的功耗测量组件100用于待测电路110，其中，待测电路110可以是SDRAM芯片中的电源电路等需要测量功耗的电路。
在本公开实施例的示例性实施方式中，功耗测量组件100具体可以包括：处理模块120、放大模块130、选通模块140和至少两个采样模块150，其中，至少两个采样模块150分别串联在所述待测电路110中；选通模块140用于选通所述至少两个采样模块中的一个；放大模块130用于采集选通的所述采样模块150两端的电压信号并放大；处理模块120与所述选通模块140、所述放大模块130连接，用于控制调整选通的所述采样模块150以及所述放大模块130的放大倍数，并根据放大的所述电压信号计算功耗值，发送所述功耗值。
在本公开实施例的示例性实施方式中，通过在待测电路110上分别串联至少两个采样模块150，可以根据待测电路110上电流的实际变化范围选择合适的采样模块150，不仅可以增大测量的准确性，还可以增大待测电路110上电流的测量范围，以满足例如SDRAM芯片等设备在不同工作状态下较大的电流动态范围的测量。
在实际应用中，采样模块150可以是采样电阻，且至少两个采样电阻的阻值是不同的，不同的阻值会获得不同的压降。对于待测电路110上的电流较小时，可以选择阻值较大的 采样模块150，以提高采样模块150两端的压降，获得较精确的结果；对于待测电路110上的电流较大时，可以选择阻值较小的采样模块150，在获得较为精确的结果的前提下，减小采样模块150两端的压降，以满足芯片300上的工作电压的要求。
在实际应用中，采样电阻的阻值范围可以根据实际需要进行设置。例如，本公开实施例的示例性实施方式中，采样电阻的阻值范围可以为50mΩ-10Ω。需要说明的是，任何满足测量需求的采样电阻的阻值范围均落入本公开实施例的保护范围内。
在实际应用中，采样模块150的数量可以是两个，也可以是三个等多个，具体的采样模块150的数量可以根据实际的待测电路110中的待测电流的实际范围来确定，如果实际的电流范围过大，可以设置多个阻值不同的采样模块150。
在本公开实施例的示例性实施方式中，由于SDRAM等芯片上的供电电压是固定的，所以，上述采样模块150可以为电流采样电阻，主要用于测量待测电路110上的电流，通过上述电流和供电电压的乘积即可获得功耗。与电压采样电阻相比，电流采样电阻的阻值较小，功耗也较小，可以减小检测过程中的功耗。
在本公开实施例的示例性实施方式中，通过在功耗测量组件100中设置选通模块140，其中，选通模块140设置在待测电路110上，可以用于选通所述至少两个采样模块150中的一个。例如，选通模块140可以设置在待测电路110上的电源和采样模块150之间，以完成两个采样模块150的信号切换。
在实际应用中，选通模块140可以为模拟开关、继电器或光电开关等。其中，模拟开关可以采用MOS管(Metal Oxide Semiconductor，金属-氧化物-半导体场效应晶体管)的开关方式实现对信号链路关断或者打开，以实现较高的关断阻抗和较低的导通阻抗。例如，选通模块140导通时的电阻可以为5mΩ，断开时的电阻可以大于10KΩ。本示例性实施方式对此不作特殊限定。
在本公开实施例的示例性实施方式中，通过在功耗测量组件100中设置放大模块130，可以对选通的采样模块150两端的电压信号进行放大。以便于处理模块120采集并识别所述电压信号，从而为采样模块150采集较小的电流提供支持，以进一步增大功耗测量组件100可测量的待测电路110上的电流范围。
在本公开实施例的示例性实施方式中，所述放大模块130包括至少两个可选的放大倍数，通过不同的采样模块150以及不同的放大倍数，可以扩大功耗测量组件100的电流测量范围，以满足更多的电流测量范围需求。其中，放大模块130可以是可变增益放大器。
在实际应用中，放大模块130的放大倍数可以根据实际需要进行设置。例如，本公开实施例的示例性实施方式中，放大模块130的放大倍数可以为10倍-200倍。需要说明的是，任何满足测量需求的放大模块130的放大倍数均落入本公开实施例的保护范围内。
在实际应用中，放大模块130的放大倍数也可以是可调的，可以根据待测电路110中电流的范围确定放大倍数的数量及大小，例如，在本公开实施例的示例性实施方式中，功耗测量组件100的放大模块130可选的放大倍数至少有两个，例如为10倍和100倍。如 果给放大模块130输入的电压为1mV，在放大倍数为10倍的情况下，放大模块130输出的电压为10mV；在放大倍数为100倍的情况下，放大模块130输出的电压为0.1V。本示例性实施方式对于放大模块130的具体放大倍数不作特殊限定。
在本公开实施例的示例性实施方式中，放大模块130中通道131的数量至少为两个，分别用于采集不同的采样模块150两端的压降。其中，所述通道131的输入端连接其中一个所述采样模块150的两端，所述通道131的输出端与所述模数转换器121连接。也就是说，其中一个所述通道131的输入端连接在其中一个所述采样模块150的两端，该通道131的输出端连接其中一个模数转换器121；另一个所述通道131的输入端连接在另一个所述采样模块150的两端，该通道131的输出端连接另一个模数转换器121。
在本公开实施例的示例性实施方式中，在功耗测量组件100中还设置有处理模块120，其中，处理模块120(Microcontrollers)是一种集成电路芯片，是采用超大规模集成电路技术把具有数据处理能力的中央处理器、随机存储器、只读存储器、多种I/O口和中断系统、定时器/计数器等功能(可能还包括显示驱动电路、脉宽调制电路、模拟多路转换器、模数转换器等电路)集成到一块硅片上构成的一个小而完善的微型计算机系统。通过处理模块120可以采集并识别放大模块130放大的电压信号，并将电压信号转换为数字信号，根据数字信号计算出功耗值，最后将所述功耗值发送至上位机200等。
在本公开实施例的示例性实施方式中，处理模块120需要与所述选通模块140连接，用于控制所述选通模块140选通需要的采样模块150，从而在至少两个采样模块150中选择合适的采样模块150；另外，处理模块120还需要与所述放大模块130连接，用于控制所述放大模块130的放大倍数，从而可以根据待测电路110中实际的电流大小，选择合适的采样模块150和放大倍数，以在满足采样模块150的压降范围的情况下，满足待测电路电流测量的需求，并且还可以减少功耗，节约能源。
比起万用表/示波器等数据处理和分析能力较弱的外接设备而言，本公开实施例的示例性实施方式提供的功耗测量组件100通过设置处理模块120，可以无需外接其他设备，在功耗测量组件100的内部就完成了采样模块150的选通、放大倍数的选择等控制，以及数据的处理和分析，且数据处理和分析能力更强，速度更快，精确度也更高。
在本公开实施例的示例性实施方式中，上述处理模块120包括：模数转换器121、运算模块、串口122和控制逻辑模块；其中，模数转换器121与所述放大模块130连接，用于将所述电压信号转换为数字信号，以便于运算模块的运算；运算模块用于根据所述数字信号计算所述功耗值；串口122用于连接上位机200，并将所述功耗值发送至所述上位机200；控制逻辑模块用于控制调整选通的所述采样模块150以及所述放大模块130的放大倍数。
具体的，控制逻辑模块用于根据所述待测电路110的电流范围、所述模数转换器121的可转换电压范围、以及所述选通模块140和所述采样模块150上的压降范围，确定选通的所述采样模块150和所述放大模块130的放大倍数。
在实际应用中，模数转换器121可以有两个，一个模数转换器121对应一个放大模块130，以将放大模块130放大的时间连续、幅值也连续的模拟电压信号转换为时间离散、幅值也离散的数字信号。
通常，模数转换器121有一个可转换电压范围，经过放大模块130放大的电压信号需要满足此可转换电压范围。在实际应用中，模数转换器121的可转换电压范围可以是10mV-2V等，本示例性实施方式对此不作特殊限定。
在本公开实施例的示例性实施方式中，运算模块可以根据上述数字信号，再结合选通的所述采样模块150的阻值R，计算出待测电路110的电流I，再结合电源上的供电电压U就可以算出电源的功耗值P＝I×U。
在本公开实施例的示例性实施方式中，串口122可以是UART(Universal Asynchronous Receiver/Transmitter，通用异步收发传输器)，以适用于短距离、速率不高的情况。另外，串口122还可以是其他的同步串口，本示例性实施方式对此不作特殊限定。
在实际应用中，为了便于UART与上位机200通信，还需要一个USB(Universal Serial Bus，通用串行总线)转串口模块来连接UART与上位机200上的USB接口。
可选的，处理模块120可以是单片机。其中，单片机可以是内部含有模数转换器的单片机，也可以是内部不含模数转换器的单片机。在本公开实施例的示例性实施方式中，为了减小功耗测量组件100的体积，处理模块120选用内部自带晶振和模数转换器的单片机。
在本公开实施例的示例性实施方式中，所述功耗测量组件100还包括基板；所述采样模块150、所述选通模块140、所述放大模块130、所述处理模块120均设置在所述基板上，其中，基板的大小和形状根据其上需要设置的部件总体所占有的面积来确定，基板可以是覆铜箔层压板等，本示例性实施方式对此不作特殊限定。
在本公开实施例的示例性实施方式中，可以根据芯片300中待测的电源信号的数量来确定功耗测量组件100的数量，也就是说，每个电源信号对应一个功耗测量组件100。
根据本示例实施例中的功耗测量组件100，一方面，通过在待测电路110上分别串联至少两个采样模块150，可以增大功耗测量组件100的电流测量范围，满足更多种类的待测电路110中电流的变化情况。另一方面，通过放大模块130对采样模块150两端的电压信号进行放大，以便处理模块120采集并识别所述电压信号。从而为采样模块150采集较小的电流提供支持，进一步增大功耗测量组件100的电流测量范围，满足更多的需求。又一方面，本示例性实施方式中，通过在功耗测量组件100中设置处理模块120，可以根据待测电路110中实际的电流大小，选择合适的采样模块150和放大倍数，以在满足采样模块150的压降范围的情况下，满足电流测量的需求，于此同时整个功耗测量组件100所使用的设备都是常用设备，并没有使用精度很高的高端电流测试设备，因此，整个测量组件的测量成本也相对较低，并且可以达到减少功耗，节约能源的目的。
本公开实施例的示例性实施方式中还提供了一种功耗测量方法。参照图2，示出了根据本公开实施例的示例性实施方式的一种功耗测量方法的流程示意图。如图2所示，该功 耗测量方法用于上述的功耗测量组件100，具体地，由功耗测量组件100中的控制逻辑模块控制执行。所述功耗测量方法具体可以包括以下步骤：
步骤S210，控制调整选通的所述功耗测量组件的采样模块和放大模块的放大倍数；
步骤S220，采集所述采样模块两端的电压信号并放大；
步骤S230，根据放大的所述电压信号计算功耗值，发送所述功耗值。
根据本示例性实施方式中的功耗测量方法，一方面，通过调整选通不同的采样模块和放大模块的放大倍数，可以增大电流测量范围，满足更多种类的待测电路中电流的变化情况。另一方面，可以根据待测电路中实际的电流大小，选择合适的采样模块和放大倍数，以在满足采样电阻的压降范围的情况下，满足电流测量的需求，并且还可以减少功耗，节约能源。
在本示例性实施方式中，对采样模块150的选通是通过选通模块140选择不同的通道来实现的。其中，上述功耗测量方法具体可以包括：
所述控制调整选通的采样模块150和放大模块130的放大倍数的步骤，具体可以包括：
执行电流获取步骤，所述电流获取步骤包括控制所述功耗测量组件100的选通模块140选通所述采样模块150和所述放大模块130的放大倍数；
控制所述放大模块130采集选通的所述采样模块150两端的电压信号并放大；
根据放大的所述电压信号换算出相应的电流值和功耗值；
比较所述电流值和所述功耗测量组件的可测量电流范围；
若所述电流值在所述可测量电流范围内，则发送所述功耗值，并继续执行所述电流获取步骤；
若所述电流值不在所述可测量电流范围内，则调整选通的所述采样模块和/或所述放大模块的放大倍数，并转至所述电流获取步骤。
在实际操作过程中，可以根据待测电路中的电流范围具体确定所用的采样模块150的数量以及放大模块130的放大倍数，并通过上述两者的组合可以获得不同的可测量电流范围；通过不同的可测量电流范围的组合最终获得待测电路的电流范围，以使得功耗测量组件100可以满足待测电路的全范围需求。
对上述方法进行分解，以包括第一阻值和第二阻值两种采样模块150，以及包括第一放大倍数和第二放大倍数两种放大倍数的放大模块130为例，对上述方法进行具体说明如下：
假设上述功耗测量方法用于测量SDRAM芯片的动态功耗，对于一种SDRAM芯片而言：
所述SDRAM芯片的待测电路110的电流范围是10μA-500mA，所述模数转换器121的可转换电压范围为10mV-2V，以及所述选通模块140和所述采样模块150上的压降之和小于等于50mV；本公开实施例的示例性实施方式中，确定选通模块140导通时的电阻为5mΩ，断开时的电阻大于10KΩ；确定其中一个采样模块150的阻值为第一阻值50m Ω，确定另一个采样模块150的阻值为第二阻值10Ω；确定放大模块130的放大倍数为第一放大倍数10倍和第二放大倍数100倍可选。
根据上述两种采样模块150和两种放大倍数，可以获得四种组合状态方式：状态1、状态2、状态3、状态4；其中，每个状态的选通模块140和采样模块150上的压降之和V 1的范围、采样模块150的压降经放大模块130放大后的电压V 2的范围，以及可测量的电流I的范围如表1所示：
表1
Figure PCTCN2021103724-appb-000001
由上述表1的计算结果可以看出，上述四个状态中经放大模块130放大后的电压V 2均满足模数转换器121的可转换电压范围10mV-2V，以及每个状态的选通模块110和采样模块150上的压降之和V 1均满足小于等于50mV的要求。
在实际应用中，由于SDRAM芯片的待测电路110的电流范围是10μA-500mA，因此，可以对上述状态组合进行精简，选择状态1、状态2和状态3三种状态组合即可满足10μA-500mA的测量范围。
本公开实施例的示例性实施方式对三种状态的具体测量范围进行了调整，调整结果如表2所示：
表2
Figure PCTCN2021103724-appb-000002
参考图3，示意性示出了根据本公开实施例的示例性实施方式的一种处理模块上的状态转换程序流程图。具体的转换过程由控制逻辑模块来完成，具体可以包括：
先对对各个设备进行上电，并初始化；
初始化完成后，执行步骤一，控制所述选通模块选通阻值为第一阻值(例如50mΩ)的采样模块，控制所述放大模块的放大倍数调整为第一放大倍数(例如10倍)；即选择状态1进行测量；
控制所述放大模块采集选通的所述采样模块两端的电压信号并放大；
根据放大的所述电压信号换算出相应的第一电流值I1和第一功耗值；
比较所述第一电流值I 1是否小于所述第一阻值和所述第一放大倍数对应的可测量电流范围(400mA-909mA)的第一下限值A 1(400mA)；
如果是，则跳转到步骤二；说明状态1无法测量此电流范围，选择状态2的组合方式来测量电流I；
如果否，则通过所述处理模块的串口将所述第一功耗值发送给上位机，并继续执行步骤一；
步骤二，控制所述选通模块选通阻值为所述第一阻值(例如50mΩ)的所述采样模块，控制所述放大模块的放大倍数调整为第二放大倍数(例如100倍)；即选择状态2进行测量；
控制所述放大模块采集选通的所述采样模块两端的电压信号并放大；
根据放大的所述电压信号换算出相应的第二电流值I2和第二功耗值；
比较所述第二电流值I 2是否小于所述第一阻值和所述第二放大倍数对应的可测量电流范围(2mA-400mA)的第二下限值A 2(2mA)或大于或等于所述第一阻值和所述第二放大倍数对应的可测量电流范围(2mA-400mA)的第一上限值B 1(400mA)；
如果小于所述第二下限值，则跳转到步骤三；说明状态2无法测量此电流范围，选择状态3的组合方式来测量电流I；
如果大于所述第一上限值，则跳转到步骤一；说明状态2无法测量此电流范围，选择状态1的组合方式来测量电流I；
如果否，则通过所述串口将所述第二功耗值发送给所述上位机，并继续执行步骤二；
步骤三，控制所述选通模块选通阻值为第二阻值(例如10Ω)的采样模块，控制所述放大模块的放大倍数调整为所述第二放大倍数(例如100倍)；即选择状态3进行测量；
控制所述放大模块采集选通的所述采样模块两端的电压信号并放大；
根据放大的所述电压信号换算出相应的第三电流值I 3和第三功耗值；
比较所述第三电流值I 3是否大于或等于所述第二阻值和所述第二放大倍数对应的可测量电流范围(10μA-2mA)的第二上限值B 2(2mA)；
如果是，则跳转到步骤二；说明状态3无法测量此电流范围，选择状态2的组合方式来测量电流I；
如果否，则通过所述串口将所述第三功耗值发送给所述上位机，并继续执行步骤三。
在实际应用中，上位机200可以是直接发出操控命令的计算机，一般是PC、host  computer、master computer、upper computer，其屏幕上可以显示各种信号值(例如，最大功耗、最小功耗、平均功耗等)。上位机200发出的命令首先给处理模块120，处理模块120再根据此命令解释成相应时序信号直接控制相应设备工作。处理模块120将计算好的电流值和功耗值通过串口122反馈给上位机200。
在本示例性实施方式中，上位机200可以使用Python语言编程，利用强大的第三方扩展库来进行测量结果的图形显示和数据分析挖掘等，具体的操作流程可参考图4，示意性示出了根据本公开实施例的示例性实施方式的一种上位机上的程序流程示意图：
首先，打开串口，从串口接收处理模块计算好的电流值和功耗值，实时显示到相应的图像框中；接着，将电流值和功耗值存储到上位机中，例如，存储到不同的CSV(Comma-Separated Values，逗号分隔值或者字符分割值)文件中，以纯文本的形式存储表格数据；然后，在功耗测量组件测试完毕后，上位机的系统断电，关闭串口；通过点击屏幕上的“数据分析”按钮，可以使用Python等第三方扩展库处理数据，得到最大功耗、最小功耗、平均功耗等结果，最后可以退出程序。
本公开实施例的示例性实施方式中还提供了一种芯片功耗测量装置。下面，将对本示例实施例中的功耗测量组件100应用在芯片300中，而得到的芯片功耗测量装置进行说明。
参照图5，示出了根据本公开实施例的示例性实施方式的一种芯片功耗测量装置的结构示意图。如图5所示，所述的芯片功耗测量装置具体可以包括芯片300和上述的功耗测量组件100。其中，所述功耗测量组件100的采样模块150串联在所述芯片300的电源管脚上，用于计算电源上的功耗。上述功耗测量组件100的具体细节已经在上述实施方式中进行了详细的描述，因此此处不再赘述。
在实际应用中，芯片300可以是SDRAM芯片、CPU芯片等多种芯片中的一种，本公开实施例的示例性实施方式是以SDRAM芯片为例对芯片功耗测量装置进行说明，其他种类的芯片参照执行即可。
对于SDRAM芯片而言，通常安装在主板500上，因此可以将功耗测量组件100设置在SDRAM芯片和主板500之间，将SDRAM芯片的所有电源信号从其底层引出，串联经过功耗测量组件100的采样模块150，再接入到SDRAM芯片的电源管脚上。
参照图5所示，所述芯片功耗测量装置除过包括上述的功耗测量组件100外，还包括垫高板400，垫高板400可以设置在功耗测量组件100和主板500之间，以垫高功耗测量组件100。因为功耗测量组件100的尺寸一般会比SDRAM芯片的尺寸大，通过在主板500上设置垫高板400，将功耗测量组件100垫高，可以避免功耗测量组件100与SDRAM芯片旁边的元器件发生干涉。
由于垫高板400所在的位置是原先SDRAM芯片所在的主板500上的位置，因此，可以参照SDRAM芯片的尺寸来设计垫高板400的尺寸，例如，垫高板400横截面尺寸与SDRAM芯片的横截面尺寸相同，所述垫高板400的高度大于或等于SDRAM芯片的厚度，例如，垫高板400的高度可以是1.5-2.5mm，本示例性实施方式对此不做具体限定。
参照图6，示出了根据本公开实施例的示例性实施方式的另一种芯片功耗测量装置的结构示意图。如图6所示，还可以将垫高板400设置为包括多个子垫高板410，多个子垫高板410间隔设置在功耗测量组件100和主板500之间，有利于功耗测量组件100的散热。
在本公开实施例的示例性实施方式中，垫高板400可以是环氧板、环氧树脂板、溴化环氧树脂板、玻璃纤维板、玻纤板、柔性线路板补强板、阻燃绝缘板、环氧玻璃布板、环氧玻璃布层压板、线路板钻孔垫板等中的一种。
综上所述，本示例实施例中的芯片功耗测量装置，通过设置上述的功耗测量组件，处理模块中的控制逻辑模块可以根据所述待测电路的电流范围、所述模数转换器的可转换电压范围、以及所述选通模块和所述采样模块上的压降范围，确定选通的所述采样模块和所述放大模块的放大倍数的组合方式。通过多种不同的组合方式可以获得不同的电流测量范围，从而可以满足实际的测量需求；并且，整个的测量过程所使用的设备都是常用设备，并没有使用精度很高的高端电流测试设备，因此，整个测量装置的测量成本也相对较低，更能满足用户需求。
本领域技术人员在考虑说明书及实践这里公开实施例的发明后，将容易想到本公开实施例的其他实施例。本申请旨在涵盖本公开实施例的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开实施例的一般性原理并包括本公开实施例未公开实施例的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开实施例的真正范围和精神由权利要求指出。
应当理解的是，本公开实施例并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本公开实施例的范围仅由所附的权利要求来限定。

Claims (15)

  1. 一种功耗测量组件，用于待测电路，其中，所述功耗测量组件包括：
    至少两个采样模块，分别串联在所述待测电路中；
    选通模块，用于选通所述至少两个采样模块中的一个；
    放大模块，用于采集选通的所述采样模块两端的电压信号并放大；
    处理模块，与所述选通模块、所述放大模块连接，用于控制调整选通的所述采样模块以及所述放大模块的放大倍数，并根据放大的所述电压信号计算功耗值，发送所述功耗值。
  2. 根据权利要求1所述的功耗测量组件，其中，所述处理模块包括：
    模数转换器，与所述放大模块连接，用于将所述电压信号转换为数字信号；
    运算模块，用于根据所述数字信号计算所述功耗值；
    控制逻辑模块，用于控制调整选通的所述采样模块以及所述放大模块的放大倍数；
    串口，用于连接上位机，并将所述功耗值发送至所述上位机。
  3. 根据权利要求2所述的功耗测量组件，其中，所述控制逻辑模块，用于控制调整选通的所述采样模块以及所述放大模块的放大倍数的步骤，包括：
    所述控制逻辑模块，用于根据所述待测电路的电流范围、所述模数转换器的可转换电压范围、以及所述选通模块和所述采样模块上的压降范围，确定选通的所述采样模块以及所述放大模块的放大倍数。
  4. 根据权利要求2所述的功耗测量组件，其中，所述放大模块包括至少两个通道，所述通道的输入端连接其中一个所述采样模块的两端，所述通道的输出端与所述模数转换器连接。
  5. 根据权利要求1所述的功耗测量组件，其中，所述采样模块为采样电阻，所述至少两个采样电阻的阻值不同；所述放大模块包括至少两个可选的放大倍数。
  6. 根据权利要求5所述的功耗测量组件，其中，所述采样电阻的阻值范围为50mΩ-10Ω，所述放大模块的放大倍数范围为10倍-200倍。
  7. 根据权利要求1所述的功耗测量组件，其中，所述功耗测量组件还包括基板；
    所述采样模块、所述选通模块、所述放大模块、所述处理模块均设置在所述基板上。
  8. 一种功耗测量方法，用于如权利要求1所述的功耗测量组件，其中，所述方法包括：
    控制调整选通的所述功耗测量组件的采样模块和放大模块的放大倍数；
    采集所述采样模块两端的电压信号并放大；
    根据放大的所述电压信号计算功耗值，发送所述功耗值。
  9. 根据权利要求8所述的方法，其中，所述方法包括：
    执行电流获取步骤，所述电流获取步骤包括控制所述功耗测量组件的选通模块选通所述采样模块和所述放大模块的放大倍数；
    控制所述放大模块采集选通的所述采样模块两端的电压信号并放大；
    根据放大的所述电压信号换算出相应的电流值和功耗值；
    比较所述电流值和所述功耗测量组件的可测量电流范围；
    若所述电流值在所述可测量电流范围内，则发送所述功耗值，并继续执行所述电流获取步骤；
    若所述电流值不在所述可测量电流范围内，则调整选通的所述采样模块和/或所述放大模块的放大倍数，并转至所述电流获取步骤。
  10. 一种芯片功耗测量装置，其中，包括：
    芯片；
    如权利要求1所述的功耗测量组件；
    其中，所述功耗测量组件的采样模块串联在所述芯片的电源管脚上。
  11. 根据权利要求10所述的装置，其中，还包括垫高板，所述垫高板位于所述功耗测量组件和所述芯片所在的主板之间，用于垫高所述功耗测量组件。
  12. 根据权利要求11所述的装置，其中，所述垫高板横截面尺寸与所述芯片的横截面尺寸相同，所述垫高板的高度大于或等于所述芯片的厚度。
  13. 根据权利要求11所述的装置，其中，所述垫高板是环氧板、环氧树脂板、溴化环氧树脂板、玻璃纤维板、玻纤板、柔性线路板补强板、阻燃绝缘板、环氧玻璃布板、环氧玻璃布层压板、线路板钻孔垫板中的一种。
  14. 根据权利要求11所述的装置，其中，所述垫高板包括多个子垫高板，多个所述子垫高板间隔设置在所述功耗测量组件和所述主板之间。
  15. 根据权利要求10所述的装置，其中，所述芯片为SDRAM芯片、CPU芯片中的一种。
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