WO2022063304A1 - 直流变换系统 - Google Patents

直流变换系统 Download PDF

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Publication number
WO2022063304A1
WO2022063304A1 PCT/CN2021/121026 CN2021121026W WO2022063304A1 WO 2022063304 A1 WO2022063304 A1 WO 2022063304A1 CN 2021121026 W CN2021121026 W CN 2021121026W WO 2022063304 A1 WO2022063304 A1 WO 2022063304A1
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WIPO (PCT)
Prior art keywords
processing core
unit
conversion system
control
bidirectional
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PCT/CN2021/121026
Other languages
English (en)
French (fr)
Inventor
张伟
叶馨
周建平
程俊
石思潮
李磊
沈星
樊珊珊
Original Assignee
中兴通讯股份有限公司
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Priority to EP21871673.6A priority Critical patent/EP4220924A1/en
Publication of WO2022063304A1 publication Critical patent/WO2022063304A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33515—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0012—Control circuits using digital or numerical techniques
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/01—Resonant DC/DC converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/285—Single converters with a plurality of output stages connected in parallel
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33573—Full-bridge at primary side of an isolation transformer

Definitions

  • the present application relates to the field of DC conversion digital control, in particular to a DC conversion system.
  • the digital control part of the complex DC-DC conversion system is limited by the input and output port resources and the speed of the processor when running multiple tasks, and the control function is realized in the form of two chips.
  • the DC conversion system using two chips decouples the converter monitoring function, process control function, memory and interrupt task, etc., and is controlled by the corresponding chip respectively.
  • the embodiments of the present application provide a DC conversion system, including: a main power module for realizing power conversion, and a digital control module; wherein, the digital control module is implemented by a dual-core single chip, and the first power module of the dual-core single chip is implemented A processing core is used to control the main power module, and the second processing core of the dual-core single-chip is used to perform system-level monitoring and management on the DC conversion system.
  • FIG. 1 is a system block diagram of a DC conversion system in the first embodiment
  • FIG. 2 is a system architecture diagram of a DC-DC direct current conversion system in the first embodiment
  • FIG. 3 is a system block diagram of a unidirectional DC-DC conversion system in the first embodiment
  • Fig. 4 is the unidirectional DC-DC unit full bridge LLC topology diagram in the first embodiment
  • Fig. 6 is the function and resource allocation diagram of the unidirectional DCDC system chip in the first embodiment
  • FIG. 7 is a schematic diagram of the relationship between the peripheral hardware circuit unit and the dual-core MCU of the unidirectional DCDC system in the first embodiment
  • FIG. 8 is a system block diagram of a bidirectional DC conversion system based on multiple interleaved bidirectional DC-DC units in the second embodiment
  • FIG. 9 is a topology diagram of multiple interleaved parallel H-bridges in the second embodiment.
  • FIG. 11 is a bidirectional unit control task diagram of a bidirectional DC conversion system based on multiple interleaved bidirectional DC-DC units in the second embodiment
  • FIG. 12 is a system monitoring task diagram of a bidirectional DC conversion system based on multiple interleaved bidirectional DC-DC units in the second embodiment
  • FIG. 13 is a block diagram of task allocation and resource allocation of a bidirectional DC conversion system based on multiple interleaved bidirectional DC-DC units in the second embodiment
  • FIG. 14 is a schematic diagram of the connection between a dual-core MCU and an external hardware circuit unit of a bidirectional DC conversion system based on multiple interleaved bidirectional DC-DC units in the second embodiment;
  • FIG. 15 is a system block diagram of a bidirectional DC conversion system based on a bidirectional DC-DC unit in the second embodiment
  • 16 is a system function analysis diagram of a bidirectional DC conversion system based on a bidirectional DC-DC unit in the second embodiment
  • FIG. 17 is a system chip function and resource allocation diagram of a bidirectional DC-DC conversion system based on a bidirectional DC-DC unit in the second embodiment
  • FIG. 18 is a schematic diagram of the relationship between a peripheral hardware circuit unit and a dual-core MCU of a bidirectional DC-DC conversion system based on a bidirectional DC-DC unit in the second embodiment;
  • Fig. 19 is a block diagram of pulse sequence control in the third embodiment
  • FIG. 20 is a block diagram of the pulse sequence control of the bidirectional DC converter in the third embodiment.
  • Fig. 21 is the buck-boost mode selection unit of the pulse sequence of the bidirectional DC converter in the third embodiment
  • Fig. 22 is the mode pulse selection unit of the pulse sequence of the bidirectional DC converter in the third embodiment
  • Figure 23 is a basic pulse generator unit of the pulse train of the bidirectional DC converter in the third embodiment.
  • the main purpose of the embodiments of the present application is to provide a DC conversion system, which adopts a dual-core single-chip micro-control unit, which can reduce the complexity of the hardware circuit of the system, thereby shortening the research and development cycle, simplifying the way of coordination among multiple tasks, and reducing the power consumption. consumption, and enhance the real-time performance of each task communication.
  • the first embodiment of the present application relates to a DC conversion system.
  • the DC conversion system of this embodiment includes: a main power module for realizing power conversion, and a digital control module; wherein, the digital control The module is implemented by a dual-core single-chip, the first processing core of the dual-core single-chip is used to control the main power module, and the second processing core of the dual-core single-chip is used to perform system-level processing on the DC conversion system. Monitoring management.
  • the embodiment of the present application uses a dual-core single chip to realize the digital control module of the DC conversion system, and realizes multiple functions with only one chip, which reduces the complexity of the circuit design of the system, improves the energy density, and shortens the hardware design cycle.
  • the cooperative cooperation mode between multiple tasks is simplified.
  • the number of chips is reduced, and the dual cores in one chip work alternately to achieve controllable sleep, which reduces the energy consumption of the main control chip.
  • the degree of system integration is increased, and only the communication between the dual cores needs to be considered during communication, and the dual cores are in the same chip, thereby improving the real-time performance of communication.
  • the first processing core is specifically configured to control the main power module according to the resources pre-allocated to the first processing core; the second processing core is specifically configured to control the main power module according to the resources pre-allocated to the first processing core
  • the resources of the second processing core are used to perform system-level monitoring and management on the DC conversion system.
  • the resources pre-allocated to the first processing core are determined according to the functions divided for the first processing core; the resources pre-allocated to the second processing core are determined according to the functions of the first processing core The function of the second processing core division is determined.
  • FIG. 2 shows the system architecture of the DC-DC direct current conversion system, including a unidirectional DCDC direct current system and the like.
  • the core of the control system is a dual-core Microcontroller Unit (MCU). Dual-core MCUs include, but are not limited to, Digital Signal Process (DSP), Advanced RISC Machines (ARM), and so on.
  • the dual-core MCU includes a first processing core and a second processing core.
  • the main functions of the DCDC DC conversion system are divided into function A and function B.
  • the first processing core uses the chip resource A to complete the function A in the DC conversion system.
  • the second processing core uses the chip resource B to complete the function B in the DC conversion system.
  • the DC conversion system is shown in FIG. 3 , the main power part is the main power module, and the digital The control part is a digital control module.
  • the unidirectional DC-DC unit of the main power part includes but is not limited to a single-phase LLC topology.
  • the basic topology of a single-phase full-bridge LLC is shown in Figure 4.
  • the DC bus in the main power module supplies power to the one-way DC-DC unit, and the DC-DC unit supplies power to the load.
  • the one-way DCDC conversion system also has a digital control module.
  • the digital control module is implemented by a dual-core single chip.
  • the first processing of the dual-core single chip The core is used to control the main power module, such as the one-way DC-DC unit, mainly including performance control and system protection functions.
  • performance control includes but is not limited to steady state performance, transient performance and efficiency performance.
  • the system protection functions include but are not limited to overvoltage protection and overcurrent protection, as shown in Figure 5;
  • the second processing core is used for system-level monitoring and management of the DC conversion system, that is, system monitoring.
  • system monitoring mainly includes communication functions, human-computer interaction functions and other system-level functions.
  • Communication functions include but are not limited to RS485/CAN, Global Positioning System (GPS)/Global System for Mobile Communication (GSM), WIFI, Narrow Band Internet of Things (NB-IOT) ), Enhanced Machine-Type Communication (eMTC), General Packet Radio Service (General Packet Radio Service, GPRS) and other communication-related functions.
  • Human-computer interaction functions include but are not limited to system status display, control variable transmission and reception, keystroke transmission, and acceleration sensor-related functions. Other functions include anti-theft detection, system hibernation, etc.
  • the chip resource allocation of the unidirectional DCDC system is determined according to the performance characteristics of the unidirectional DCDC system and the first processing core and the second processing core. As shown in FIG.
  • the first processing core the first processing core a processor, which is specifically used to control the main power module according to the resources pre-allocated to the first processing core;
  • the second processing core namely the second processor, is specifically used to control the main power module according to the resources pre-allocated to the second processing core resources, and perform system-level monitoring and management on the DC conversion system.
  • internal chip resources are allocated to it.
  • the communication functions are basically handled by the second processor, a large number of chip communication resources are allocated to the second processor. Including but not limited to I2C, serial communication interface (Serial Communication Interface, SCI), serial peripheral interface (Serial Peripheral Interface, SPI), CAN and other communications.
  • the chip resources allocated to the first processing core are A/D sampling, pulse width modulation (Pulse Width Modulation, PWM) waves, storage area 1, interrupt 1, and the chip resources allocated to the second processing core are A/D sampling, General-purpose input/output (GPIO), storage area 2, and communication resources.
  • PWM pulse width modulation
  • GPIO General-purpose input/output
  • the peripheral circuits of the second processor include: RS485/CAN, GPS/GSM, WIFI, NB-IOT , eMTC, GPRS, sleep circuit, running/warning lights, acceleration sensor, DIP switch, various interfaces; the peripheral circuit of the first processor is sleep control, signal drive, power failure warning, wave-by-wave protection, interlock, current Detection, voltage detection, lightning protection circuit.
  • the above functions and divisions are all examples, and do not limit the detailed division of the functions of the DC change system.
  • the embodiments of the present application only use one chip to realize multiple functions of the one-way DCDC conversion system, and do not need to consider the circuit design between multiple chips, thereby reducing the complexity of the circuit design of the system, improving the energy density, and shortening the hardware
  • the design cycle simplifies the coordination and cooperation between multiple tasks.
  • the number of chips is reduced, which reduces the energy consumption of the main control chip, improves the degree of system integration, and improves the real-time communication performance.
  • the second embodiment of the present application relates to a DC conversion system.
  • the second embodiment is substantially the same as the first embodiment, except that the second embodiment of the present application is a bidirectional DC-DC conversion system.
  • the main power module of the bidirectional DC-DC conversion system includes: a bidirectional direct current DC-DC unit or multiple interleaved bidirectional direct current DC-DC units.
  • the resources include one or any combination of the following: storage resources, interrupt resources, peripheral resources, communication resources, and CPU resources.
  • control performed on the main power module includes one or any combination of the following: switching between charging and discharging modes, switching between high and low voltage modes, voltage regulation and transient control in each mode, and system protection function ;
  • the system-level monitoring and management of the DC conversion system includes one of the following or any combination thereof: system sleep control, system anti-theft, human-computer interaction, and control signal sending and receiving; wherein, the battery management function is included in the The control performed by the main power module, or, is included in the system-level monitoring and management of the DC conversion system.
  • the functions divided for the first processing core and the functions divided for the second processing core are based on the application scenario of the DC conversion system and the first processing core and the second processing core The performance characteristics are determined.
  • the direct current DC-DC units in the main power module of the direct current conversion system are multiple interleaved bidirectional DC-DC units.
  • the DC DC-DC unit in the main power module of the DC conversion system is a multiple interleaved bidirectional DC-DC unit.
  • the main power part is the main power module
  • the digital control part is a digital control module.
  • the topology can be a non-isolated topology, such as multiple interleaved parallel H bridges, whose topology is shown in Figure 9, or an isolated topology, such as multiple dual active bridges, whose topology is shown in Figure 10
  • a non-isolated topology such as multiple interleaved parallel H bridges, whose topology is shown in Figure 9
  • an isolated topology such as multiple dual active bridges, whose topology is shown in Figure 10
  • the forms of the isolated topology and the non-isolated topology include but are not limited to the two topologies mentioned above, depending on the specific power level.
  • the digital control part uses a dual-core MCU as the core processor, replacing the original two single-core MCUs.
  • a dual-core MCU there will be a situation of heterogeneous processors, that is, the functions and performance of the two processors are asymmetrical, and are suitable for different applications.
  • one of the processors is suitable for communication and human-computer interaction, and the other processor is suitable for the implementation of the control algorithm.
  • the function of dividing the processing core can better fit the characteristics of the system characteristic core processing core.
  • the digital control part that is, the digital control module
  • the first processing core corresponds to the control of the main power module function
  • the control of the main power module function includes bidirectional unit control
  • the second processing core corresponds to the system monitoring and management.
  • Each control function includes different tasks.
  • the task diagram of the bidirectional unit control function is shown in Figure 11, including tasks: charging and discharging mode selection and switching, buck-boost mode selection and switching, voltage regulation and transient characteristics in each mode Control, system protection functions, such as charge and discharge current limiting, overvoltage protection, overcurrent protection, and the task diagram of system monitoring functions are shown in Figure 12, including: battery management, human-computer interaction, communication, protection, etc.
  • the battery management functions include tasks: battery voltage monitoring, temperature monitoring, battery balance management, battery status calculation, etc.
  • there is data interaction between the system monitoring function and the two-way DCDC control function including but not limited to the interaction of battery data, the interaction of system protection signals, and the interaction of system control quantities. The coupling of the above functions is relatively strong.
  • the MCU dual-core and other resources are allocated, and the allocation of resources can improve the real-time performance of the system. resource of.
  • Figure 13 visually shows the block diagram of the dual-core MCU task allocation and resource allocation in the bidirectional DC converter system.
  • the first processor is responsible for the two-way DCDC control function, including charging and discharging mode switching, high and low voltage mode switching, voltage regulation and transient control in each mode, system protection and other tasks.
  • the chip resources that need to be used include but are not limited to A/D sampling, PWM wave generation, storage area 1, interrupt 1, etc.
  • the second processor is responsible for system monitoring functions, tasks including but not limited to battery management, human-computer interaction, and other system functions.
  • the chip resources that need to be used include but are not limited to A/D sampling, GPIO, storage area 2, interrupt 2, CAN/SCI/I2C and other communications. There is communication and coordination between the first processor and the second processor to complete data interaction between systems.
  • the DC-DC unit in the main power module of the DC conversion system is a bidirectional DC-DC unit.
  • the main power part is the main power module
  • the digital control part is a digital control module.
  • the bidirectional direct current DC-DC unit of this example is a single-layer isolated or non-isolated topology.
  • the main power module of this example in the figure is basically the same as the main power module. When the bus is normally charged, the DC bus is used to supply power to the load, and at the same time, the energy storage unit is charged through the bidirectional DC-DC unit.
  • the first processing core is used to control the main power module, and the main power module includes: a bidirectional DCDC unit, and a battery management unit.
  • the processing core mainly implements bidirectional unit control and battery management.
  • the second processing checks the DC conversion system to perform system-level monitoring and management, that is, system monitoring, which is mainly related to human-computer interaction and communication. As shown in FIG.
  • the first processing core completes the functions of controlling the bidirectional DCDC unit and managing the battery.
  • the tasks of bidirectional unit control include: charge and discharge mode selection and switching, buck-boost mode selection, steady-state and transient characteristics, system protection, such as charge and discharge current limiting, overvoltage protection, overcurrent protection, and battery management tasks include But it is not limited to monitoring of battery voltage, temperature, etc., battery balance control, and battery state calculation; wherein, the calculated battery state may include state of charge (State of charge, SOC)/battery state of health (State Of Health, SOH).
  • SOC state of charge
  • SOH Battery Health
  • Human-computer interaction includes but is not limited to system status display, two-way unit control volume sending and receiving, system sleep, button volume detection, and other functions, such as anti-theft Detection, system sleep, WIFI control, etc.
  • the chip functions and resource allocation based on the above functions are shown in Figure 17.
  • the first processor that is, the first processing core, is responsible for increased functions, and is mainly responsible for the functions of object control, including bidirectional unit control, battery management control and system protection control.
  • the second processor that is, the second processing core, is mainly responsible for the function of process control, that is, system monitoring, including but not limited to human-computer interaction and other system functions, mainly system monitoring and communication. Since the first processor is responsible for two object control, it is assigned at least two interrupts.
  • the peripheral hardware unit of the first processor includes: bidirectional unit circuit, discharge switching circuit, charging switching circuit, cell voltage, anti-reverse connection, short-circuit protection, external Voltage, charging and discharging power supply, telecom temperature, battery voltage, power supply circuit, lightning protection circuit, peripheral hardware circuit units of the second processor include: anti-theft detection, RS485/CAN, output dry node, sleep circuit, GPS/GSM, acceleration sensor, Various interfaces, running/warning lights, DIP switches, SOC display lights, WIFI, equalizing circuits.
  • the above-mentioned resource allocation and function division of the DC conversion platform based on bidirectional DC DC-DC units and multiple interleaved bidirectional DC DC-DC units is only a solution, and does not limit the specific allocation and function division of resources.
  • the DC exchange platform based on other application scenarios can be designed according to specific requirements. Analyze the characteristics and applicable occasions of the first processing core and the second processing core in the dual-core micro-control unit; determine the control target of the system. For example, in a bidirectional DC digital system, the control objective at the system level: the system works stably, reliably and efficiently.
  • the bidirectional DCDC unit controls the target, smoothly realizes the bidirectional multi-mode flow of energy, and achieves superior stability and transient performance.
  • the bidirectional DCDC control function includes tasks: Charging and discharging mode switching, high and low voltage mode switching, voltage regulation and transient control in each mode, system protection function, system monitoring functions include: cell management function, human-computer interaction function, communication function, protection function, other functions, electrical Cell management functions include tasks: battery voltage monitoring, temperature monitoring, battery balance management, etc. And there is data interaction between the system monitoring function and the two-way DCDC control function, including but not limited to the interaction of battery data, the interaction of system protection signals, and the interaction of system control quantities.
  • MCU processors and domains can be allocated according to control tasks to allocate storage resources to the first processor and the second processor, that is, the first processor is responsible for the bidirectional energy conversion control function, and the second processor is responsible for System monitoring function, the subtask under the corresponding function is also responsible for the corresponding processor, and the storage resource is allocated according to its function. If the storage resource is not allocated, the first processor is using Direct Memory Access 1 (Direct Memory Access, DMA1).
  • DMA1 Direct Memory Access 1
  • the second processor When the second processor needs to use DMA1, the second processor will automatically identify the use state of DMA1 and enter the waiting state, which will greatly reduce the real-time performance of the system. Therefore, it is necessary to optimize the allocation of storage resources according to the task occupancy; then , allocate interrupts and peripherals to the dual-core processor according to the peripherals required by the task and the terminal, and finally, allocate resources according to the communication and coordination between the dual-core processors, that is, observe whether there is communication between different processors between each task. And the coordination situation, choose and configure the appropriate inter-processor communication within the chip.
  • the second embodiment of the present application determines the function of dividing the processing cores according to the performance of the processing cores, so that the first processing core and the second processing core can make full use of their own performance and allocate resources to the processing cores in advance, so that the DC conversion system can run in time Obtaining resources for scheduling improves the real-time performance of the system operation and comprehensively improves the efficiency of the DC conversion system.
  • the third embodiment of the present application relates to a DC conversion system.
  • the third embodiment is substantially the same as the second embodiment, except that the control performed by the third embodiment of the present application on the main power module includes: Control of the bidirectional direct current DC-DC unit in the main power module; the digital control module includes: a sampling unit 191 for sampling the battery voltage and bus voltage in the main power module; mode and pulse selection
  • the unit 192 is configured to detect the working mode of the bidirectional direct current DC-DC unit according to the signal sampled by the sampling unit, and determine the pulse corresponding to the detected working mode according to the detected working mode a pulse generator 193 for generating a pulse sequence for controlling the bidirectional direct current DC-DC unit according to the pulses determined by the mode and pulse selection unit.
  • the pulse sequence control block diagram of the bidirectional DC converter of the third embodiment is shown in FIG. 19 .
  • the pulse generator includes: a basic pulse generator for generating basic pulses; and a pulse combining unit for combining the basic pulses to obtain the pulse sequence.
  • the pulse combination unit is optional, and the mode and pulse selection unit can precede or follow the basic pulse generator unit.
  • the operating modes include a boost mode, a buck mode, and a buck-boost mode.
  • the direct current DC-DC unit in the main power module of the direct current conversion system as a multiple interleaved bidirectional DC-DC unit as an example.
  • the digital control module and the main power module are the same as the multi-interleaved bidirectional DC-DC unit in the second embodiment, and the control functions and resource allocation corresponding to the digital control module and the first processing core and the second processing core are also the same.
  • This embodiment describes the pulse sequence control of the digital control module in the DC conversion system based on multiple interleaved bidirectional DC-DC units.
  • the realization block diagram of the pulse sequence control of the bidirectional DC converter in this system is shown in Figure 20. After the judgment of the charging and discharging mode is completed, the output side voltage Vo and the input side voltage Vin are determined.
  • Vo is the battery side voltage
  • Vin is the bus side voltage.
  • the current working mode of the converter is determined, wherein the working modes include: boost mode, buck mode or buck-boost mode. Different modes require different pulse sequences.
  • the buck-boost mode selection unit is shown in Figure 21.
  • V1 is the voltage on the DC bus side
  • V2 is the voltage on the energy storage side
  • Vin_L is the voltage threshold for judging whether the DC bus is powered down.
  • the mode pulse selection unit is shown in Figure 22, where Vs_L and Vs_H are the allowable ranges of the difference between Vin and Vo.
  • the boost mode pulse sequence is PT_Boost
  • the buck mode pulse sequence is PT_Buck. Comparing the output voltage with the reference voltage, it is judged that the basic pulses PLx and PHx are generated. According to the current mode situation and the basic pulse, the required pulse sequence is generated in combination. At this time, the pulse sequence in the buck-boost mode is generated by combining the pulses in the boost mode and the pulses in the buck mode.
  • the buck-boost mode pulse train can also be set to PT_BuckBoost, and the pulse combination unit can be eliminated.
  • the basic pulse generator unit is shown in Figure 23.
  • the generated driving signal acts on the controlled switch tubes of the current mode, and the remaining switches are in normally open or normally closed state according to the current mode, and are directly controlled by the mode, which will not be described in detail here.
  • the basic pulse sequence in this embodiment may be a voltage-type pulse sequence or a current-type pulse sequence.
  • Figures 21 to 23 are logic analysis of specific units in the control block diagram. During implementation, digital controllers such as DSP, Field-Programmable Gate Array (FPGA), etc. can be used to realize the above-mentioned logic control. Logic circuits can be used to implement the above functions.
  • the control of the bidirectional converter mostly adopts voltage-type control, and combines three modes of switching to realize output voltage regulation.
  • the crossover frequency is reduced when the compensator is adjusted, resulting in the transient response of the bidirectional converter.
  • the speed is slow, and at the same time, the switching of the three modes means that the converter works in three working modes.
  • the compensator needs to be adjusted for each working mode, and the adjustment workload of the compensator is at least three times that of the original.
  • the nonlinear pulse sequence control is applied to the bidirectional converter, using the sampling unit, the mode and the pulse selection unit, and the pulse generator.
  • the transient response of the bidirectional converter solves the difficult and complex problem of debugging the compensator in multi-mode.
  • the pulse sequence control is used to optimize the design of the combination of pulses to realize the three working modes of the converter. It works stably, has good stability performance and transient performance, and shortens the research and development cycle of the bidirectional converter control strategy.
  • the third embodiment of the present application applies nonlinear pulse sequence control to the bidirectional converter, which not only improves the transient response of the bidirectional converter in multiple modes, but also solves the difficult and complex debugging of the compensator in multiple modes.
  • the problem is that the converter can work stably in three working modes, with good stability and transient performance, which shortens the research and development cycle of the bidirectional converter control strategy.
  • using a dual-core single chip only one chip is used to achieve multiple functions. , reduces the complexity of the circuit design of the system, improves the energy density, shortens the hardware design cycle, does not need to consider the coordination mode of multiple tasks among multiple chips, and simplifies the coordination mode between multiple tasks.
  • the dual cores in one chip work alternately to achieve controllable sleep, which reduces the energy loss of the main control chip and increases the degree of system integration.
  • only the communication between the dual cores needs to be considered during communication, and the dual cores are in the same chip. real-time communication.

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Abstract

本申请涉及直流变换数字控制领域。本申请的实施例提供了一种直流变换系统，包括：用于实现功率变换的主功率模块，以及数字控制模块；其中，所述数字控制模块通过双核单芯片实现，所述双核单芯片的第一处理核用于对所述主功率模块进行控制，所述双核单芯片的第二处理核用于对所述直流变换系统进行系统级的监控管理。

Description

直流变换系统
相关申请的交叉引用
本申请基于申请号为“202011035533.5”、申请日为2020年09月27日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此以引入方式并入本申请。
技术领域
本申请涉及直流变换数字控制领域，尤其涉及一种直流变换系统。
背景技术
随着直流电压供电负载的广泛使用，直流变换系统受到了越来越广泛的应用。复杂的DC-DC直流变换系统中数字控制部分受到输入输出口资源以及处理器运行多任务时速度的限制，均采用双芯片的形式实现控制功能。采用双芯片的直流变换系统通过将变换器监控功能、过程控制功能、存储器和中断任务等解耦，分别由对应芯片进行控制。
然而，采用双芯片的系统架构硬件电路设计复杂，导致研发周期长，在进行软件设计时，多重任务间协同配合方式复杂，另外，双芯片功耗较大，而且，双芯片间的通信实时性较差。
发明内容
本申请的实施例提供了一种直流变换系统，包括：用于实现功率变换的主功率模块，以及数字控制模块；其中，所述数字控制模块通过双核单芯片实现，所述双核单芯片的第一处理核用于对所述主功率模块进行控制，所述双核单芯片的第二处理核用于对所述直流变换系统进行系统级的监控管理。
附图说明
图1是第一实施例中直流变换系统的系统框图；
图2是第一实施例中DC-DC直流变换系统的系统架构图；
图3是第一实施例中单向DC-DC变换系统的系统框图；
图4是第一实施例中单向DC-DC单元全桥LLC拓扑图；
图5是第一实施例中单向DCDC系统功能分析图；
图6是第一实施例中单向DCDC系统芯片功能和资源分配图；
图7是第一实施例中单向DCDC系统的外围硬件电路单元和双核MCU间关系的示意图；
图8是第二实施例中基于多重交错双向DC-DC单元的双向直流变换系统的系统框图；
图9是第二实施例中多重交错并联H桥的拓扑图；
图10是第二实施例中多重双有源桥的拓扑图；
图11是第二实施例中基于多重交错双向DC-DC单元的双向直流变换系统的双向单元控制任务图；
图12是第二实施例中基于多重交错双向DC-DC单元的双向直流变换系统的系统监控任务图；
图13是第二实施例中基于多重交错双向DC-DC单元的双向直流变换系统的任务分配和资源分配的框图；
图14是第二实施例中基于多重交错双向DC-DC单元的双向直流变换系统的双核MCU与外部硬件电路单元间的联系示意图；
图15是第二实施例中基于双向DC-DC单元的双向直流变换系统的系统框图；
图16是第二实施例中基于双向DC-DC单元的双向直流变换系统的系统功能分析图；
图17是第二实施例中基于双向DC-DC单元的双向直流变换系统的系统芯片功能和资源分配图；
图18是第二实施例中基于双向DC-DC单元的双向直流变换系统的的外围硬件电路单元和双核MCU间关系的示意图；
图19是第三实施例中脉冲序列控制框图
图20是第三实施例中双向直流变换器脉冲序列控制框图；
图21是第三实施例中双向直流变换器脉冲序列的升降压模式选择单元；
图22是第三实施例中双向直流变换器脉冲序列的模式脉冲选择单元；
图23是第三实施例中双向直流变换器脉冲序列的基本脉冲发生器单元。
具体实施方式
本申请实施例的主要目的在于提供一种直流变换系统，该系统采用双核单芯片微控制单元，能够降低系统硬件电路的复杂度，从而缩短研发周期，简化多重任务间协同配合方式，减小功耗，增强各任务通信的实时性。
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请的各实施例进行详细的阐述。然而，本领域的普通技术人员可以理解，在本申请各实施例中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施例的种种变化和修改，也可以实现本申请所要求保护的技术方案。以下各个实施例的划分是为了描述方便，不应对本申请的具体实现方式构成任何限定，各个实施例在不矛盾的前提下可以相互结合相互引用。
本申请的第一实施例涉及一种直流变换系统，如图1所示，本实施例的直流变换系统包括：用于实现功率变换的主功率模块，以及数字控制模块；其中，所述数字控制模块通过双核单芯片实现，所述双核单芯片的第一处理核用于对所述主功率模块进行控制，所述双核单芯片的第二处理核用于对所述直流变换系统进行系统级的监控管理。本申请的实施例使用双核单芯片实现直流变换系统的数字控制模块，仅用一块芯片实现了多种功能，降低了系统的电路设计的复杂度，提高了能量密度，缩短了硬件设计周期，无需考虑多个芯片之间多重任务的协同配合方式，简化了多重任务间的协同配合方式，另外，芯片数量减少，一块芯片中 双核交替工作实现可控休眠，使得减轻了主控芯片的能量损耗，增加了系统一体化程度，而且，通信时只需要考虑双核之间的通信，双核在同一芯片中，从而，提高了通信实时性。
在一个例子中，所述第一处理核具体用于根据预先分配给所述第一处理核的资源，对所述主功率模块进行控制；所述第二处理核具体用于根据预先分配给所述第二处理核的资源，对所述直流变换系统进行系统级的监控管理。
在一个例子中，所述预先分配给所述第一处理核的资源，根据为所述第一处理核划分的功能确定；所述预先分配给所述第二处理核的资源，根据为所述第二处理核划分的功能确定。如图2所示，图2为DC-DC直流变换系统的系统架构，包括单向DCDC直流系统等。控制系统核心是双核微控制单元(Microcontroller Unit，MCU)，双核MCU包括但不限于数字信号处理器(Digital Signal Process，DSP)，高级精简指令集机器(Advanced RISC Machines，ARM)等。双核MCU包括第一处理核和第二处理核。DCDC直流变换系统的主要功能分为功能A和功能B。第一处理核使用芯片资源A完成直流变换系统中的功能A。第二处理核使用芯片资源B完成直流变换系统中的功能B。
本实施例以直流变换系统的主功率模块中的直流DC-DC单元为单向直流DC-DC单元为例进行说明，该直流变换系统如图3所示，主功率部分为主功率模块，数字控制部分为数字控制模块。主功率部分的单向DC-DC单元包括但不限于单相LLC拓扑，单相全桥LLC的基本拓扑如图4所示。主功率模块中直流母线为单向DC-DC单元供电，DC-DC单元为负载供电，单向DCDC变换系统还有数字控制模块，数字控制模块通过双核单芯片实现，双核单芯片的第一处理核用于对主功率模块进行控制，如对单向DC-DC单元进行控制，主要包括性能控制和系统保护功能。其中，性能控制包括但不限于稳态性能，瞬态性能和效率性能。系统保护功能包括但不限于过压保护和过流保护等，如图5所示；第二处理核用于对直流变换系统进行系统级的监控管理，即系统监控。其中，系统监控主要包括通信功能、人机交互功能和其他系统级功能等。通信功能包括但不限于RS485/CAN，全球定位系统(Global Positioning System，GPS)/全球移动通信系统(Global System for Mobile Communication，GSM)，WIFI，窄带物联网(Narrow Band Internet of Things,NB-IOT)，增强型机器类型通信(enhanced Machine-Type Communication,eMTC)，通用分组无线服务技术(GeneralPacketRadio Service，GPRS)等通信相关功能。人机交互功能包括但不限于系统状态显示，控制变量收发，按键量传递，与加速度传感器相关功能。其他功能有防盗检测，系统休眠等。确定功能之后，根据单向DCDC系统和所述第一处理核和所述第二处理核的性能特性确定单向DCDC系统芯片资源分配，如图6所示，第一处理核，即第一处理器，具体用于根据预先分配给所述第一处理核的资源，对所述主功率模块进行控制；第二处理核即第二处理器，具体用于根据预先分配给所述第二处理核的资源，对所述直流变换系统进行系统级的监控管理。按照每个处理器核功能的不同，为其分配内部的芯片资源，需要注意的是，由于通信功能基本都由第二处理器处理，因此，为第二处理器分配了芯片大量的通信资源，包括但不限于I2C,串行通信接口(Serial Communication Interface，SCI),串行外设接口(Serial Peripheral Interface，SPI),CAN等通讯。为第一处理核分配的芯片资源为A/D采样，脉冲宽度调制(Pulse Width Modulation，PWM)发波，存储区1，中断1，为第二处理核分配的芯片资源为A/D采样，通用输入/输出口(General-purpose input/output，GPIO)，存储区2以及通信资源。基于上述的功能分以及资源分配情况下，外围硬件电路单元和双核MCU间关系的示意图如图7所示，第二处理器的 外围电路包括：RS485/CAN，GPS/GSM，WIFI，NB-IOT，eMTC，GPRS，休眠电路，运行/警告等灯，加速度传感器，拨码开关，各类接口；第一处理器的外围电路为休眠控制，信号驱动，停电警告，逐波保护，互锁，电流检测，电压检测，防雷电路。上述的功能与划分均为举例，不造成对直流变化系统各功能详细划分的限制。
本申请的实施例仅用一块芯片实现了单向DCDC变换系统的多种功能，无需考虑多块芯片间的电路设计，降低了该系统的电路设计的复杂度，提高了能量密度，缩短了硬件设计周期，简化了多重任务间的协同配合方式，另外，芯片数量减少，减轻了主控芯片的能量损耗，提高了系统一体化程度，提高了通信实时性。
本申请的第二实施例涉及一种直流变换系统，第二实施例与第一实施例大致相同，区别之处在于，本申请的第二实施例为双向DC-DC变换系统，本实施例的双向DC-DC变换系统的主功率模块包括：双向直流DC-DC单元或多重交错双向直流DC-DC单元。
在一个例子中，所述资源包括以下之一或其任意组合：存储资源、中断资源、外设资源、通信资源、CPU资源。
在一个例子中，所述对所述主功率模块进行的控制，包括以下之一或其任意组合：充放电模式切换，高低压模式切换，各个模式下的稳压与瞬态控制，系统保护功能；所述对所述直流变换系统进行系统级的监控管理，包括以下之一或其任意组合：系统休眠控制、系统防盗、人机交互、控制信号收发；其中，电池管理功能包括在对所述主功率模块进行的控制中，或者，包括在对所述直流变换系统进行系统级的监控管理中。
在一个例子中，为所述第一处理核划分的功能和为所述第二处理核划分的功能，根据所述直流变换系统的应用场景和所述第一处理核和所述第二处理核的性能特性确定。
在一个例子中，直流变换系统的主功率模块中的直流DC-DC单元为多重交错双向DC-DC单元。直流变换系统的主功率模块中的直流DC-DC单元为多重交错双向直流DC-DC单元，如图8所示，主功率部分为主功率模块，数字控制部分为数字控制模块。在主功率模块中，拓扑结构可以为非隔离性拓扑，例如多重交错并联H桥，其拓扑如图9所示，也可以为隔离性拓扑，例如多重双有源桥，其拓扑如图10所示，在多重交错中，具体使用几重拓扑，根据具体的功率等级决定，隔离型拓扑和非隔离型拓扑的形式包括但不限于上面提到的两种拓扑。当母线带电时，由直流母线为负载供电，同时通过多重交错双向DC-DC单元为储能单元充电。当母线掉电时，直流母线供电不足，由储能单元通过多重交错双向DC-DC单元放电，为负载供电，或者由多重交错双向DC-DC单元和母线一起为负载供电，保证负载供电正常。数字控制部分使用双核MCU作为核心处理器，替代了原始的两个单核MCU。在双核MCU中，会出现异构处理器的情况，即两个处理器的功能和性能不对称，适用于不同的应用场合的情况。通常情况下，其中一个处理器适合用于通信和人机交互，另外一个处理器适合控制算法的实现，因此，需要根据基于多重交错双向DC-DC单元的双向直流变换系统以及处理核的性能特性划分处理核的功能，才能更加贴合系统特性核处理核的特性。在数字控制部分，即数字控制模块，将第一处理核对应主功率模块功能的控制，主功率模块功能的控制包括双向单元控制，第二处理核对应系统监控管理。每个控制功能包括不同的任务，双向单元控制功能的任务图如图11所示，包括任务：充放电模式选择与切换，升降压模式选择与切换，各个模式下的稳压与瞬态特性控制，系统保护功能，例如充放电限流、过压保护、过流保护，系统监控功能的任务图如图12所示，包括：电池管理，人机交互，通讯，保护等。电池管理功能包括 任务：电池电压监测，温度监测，电池均衡管理、电池状态计算等。并且系统监控功能与双向DCDC控制功能之间存在数据的交互，包括但不限于电池数据的交互，系统保护信号的交互，系统控制量的交互等。上述功能的耦合性相对较强。根据各个功能需要的外设和存储资源，进行MCU双核及其他资源的分配，对资源进行分配，可以提高系统运行的实时性，根据任务需要用到的中断和外设，来为处理器分配相应的资源。最后，观察各个任务间是否存在不同处理器之间的通信和协同情况，在芯片内部选择配置合适的处理器间的通信。图13可视化的展示出双向直流变换器系统中，双核MCU任务分配和资源分配的框图。第一处理器负责双向DCDC控制功能，包括充放电模式切换，高低压模式切换，各个模式下的稳压与瞬态控制，系统保护等任务。需要用到的芯片资源包括但不限于A/D采样，PWM发波，存储区1，中断1等。图14为与上述任务分配和资源分配对应的双核MCU与外部硬件电路单元间的联系示意图，图14所示的功能为可选功能，实际功能可以少于上述功能单元。第二处理器负责系统监控功能，任务包括但不限于电池管理、人机交互、其他系统功能等。需要用到的芯片资源包括但不限于A/D采样，GPIO，存储区2，中断2，CAN/SCI/I2C等通讯。第一处理器和第二处理器间存在通信和协同，完成系统间的数据交互。
在另一个例子中，直流变换系统的主功率模块中的直流DC-DC单元为双向直流DC-DC单元，如图15所示，主功率部分为主功率模块，数字控制部分为数字控制模块。与上述多重交错双向直流DC-DC单元不同，本例的双向直流DC-DC单元为一重的隔离型或者非隔离型拓扑。除此之外，图示中本例的主功率模块与主功率模块基本一致，母线带电正常时，由直流母线为负载供电，同时通过双向DC-DC单元为储能单元充电，母线掉电时，直流母线供电不足，由储能单元通过双向DC-DC单元放电，为负载供电，或者由双DCDC单元和母线一起为负载供电，保证负载供电正常。本例与上述的区别主要在于数字控制模块中的双核处理器每个核所负责的功能发生较大变化。第一处理核用于对主功率模块进行控制，主功率模块包括：双向DCDC单元，电池管理，在基于一重隔离性或非隔离性拓扑的双向直流DC-DC单元的直流变换系统中，第一处理核主要实现双向单元控制以及电池管理。第二处理核对直流变换系统进行系统级的监控管理，即系统监控，主要是人机交互和通信相关的功能。如图16所示，此时第一处理核完成对双向DCDC单元的控制和电池管理的功能。双向单元控制的任务包括：充放电模式选择和切换，升降压模式选择，稳态和瞬态特性，系统保护，例如，充放电限流，过压保护，过流保护，电池管理的任务包括但不限于电池电压，温度等监测，电池均衡控制，电池状态计算；其中，计算的电池状态可以包括荷电状态(State ofcharge，SOC)/电池健康状态(State Of Health，SOH)。第二处理核完成系统监控功能，主要是人机交互和通信相关的功能，人机交互包括但不限于系统状态显示，双向单元控制量收发，系统休眠，按键量检测，以及其他功能，如防盗检测，系统休眠，WIFI控制等。基于上述功能的芯片功能以及资源分配如图17所示。第一处理器，即第一处理核，负责的功能增加，主要负责了对象控制的功能，包括双向单元控制、电池管理控制和系统保护控制。第二处理器，即第二处理核，主要负责了过程控制即系统监控的功能，包括但不限于人机交互功能和其他系统功能，主要是系统的监控和通信。由于第一处理器负责了两个对象控制，因此为其分配至少两个中断。因为电池管理功能由第一控制核负责，相关硬件单元如电池电压、电池温度等与第二控制核解绑，和第一控制核绑定。其余硬件单元的分配情况与基于多重双向DC-DC单元的双向直流数字控制相同。硬件电路单元与双核处理器的匹配关系示意图如图18所示，第 一处理器外围硬件单元包括：双向单元电路，放电切换电路，充电切换电路，电芯电压，防反接，短路保护，外部电压，充放电电源，电信温度，电池电压，电源电路，防雷电路，第二处理器外围硬件电路单元包括：防盗检测，RS485/CAN，输出干节点，休眠电路，GPS/GSM，加速度传感器，各类接口，运行/警告灯，拨码开关,SOC显示灯，WIFI,均衡电路。
上述对基于双向直流DC-DC单元、多重交错双向直流DC-DC单元的直流变换平台的资源的分配和功能划分只是给出一种方案，并不造成对资源具体分配和功能划分的限定。对于基于其他应用场景的应用双核微控制单元的直流交换平台可根据具体需求进行设计。分析双核微控制单元中第一处理核第二处理特点及适用场合；确定系统的控制目标。比如，在双向直流数字系统中，系统级别的控制目标：系统稳定可靠高效工作。双向DCDC单元控制目标，平滑实现能量双向多模式流动，达到优越的稳定性和瞬态性能。对于电池单元控制目标，电池正常工作且电压均衡；获取整个控制系统的功能，例如，双向直流变换系统中，重要的功能为双向DCDC控制功能和系统监控功能，其中，双向DCDC控制功能包括任务：充放电模式切换，高低压模式切换，各个模式下的稳压与瞬态控制，系统保护功能，系统监控功能包括：电芯管理功能，人机交互功能，通讯功能，保护功能，其他功能，电芯管理功能包括任务：电池电压监测，温度监测，电池均衡管理等。并且系统监控功能与双向DCDC控制功能之间存在数据的交互，包括但不限于电池数据的交互，系统保护信号的交互，系统控制量的交互等。上述功能的耦合性相对较强；获取各个功能需要的外设和存储资源。最后，根据上述分析，进行MCU双核及其他资源的分配。针对直流控制平台的资源分配，可以根据控制任务分配MCU处理器和域为第一处理器和第二处理器分配存储资源，即，第一处理器负责双向能量变换控制功能，第二处理器负责系统监控功能，相应功能下的子任务也由对应的处理器负责，根据其功能分配存储资源，若不分配存储资源，在第一处理器正在使用直接存储器访问1(Direct Memory Access，DMA1)的时候，而第二处理器需要使用DMA1，则第二处理器将自动识别DMA1的使用状态，进入等待，这将大幅降低系统运行实时性，因此，需要根据任务占用情况，优化分配存储资源；然后，根据任务需要的外设以及终端为双核处理器分配中断和外设，最后，根据双核处理器之间的通信和协同进行资源分配，即，观察各个任务间是否存在不同处理器之间的通信和协同情况，在芯片内部选择配置合适的处理器间的通信。
本申请的第二实施例根据处理核的性能确定划分处理核的功能，使得第一处理核以及第二处理核能充分利用自身性能，为处理核预先分配资源，使得直流变换系统在运行时能够及时获得资源进行调度，提高了系统运行的实时性，综合提升了直流变换系统的效率。
本申请的第三实施例涉及一种直流变换系统，第三实施例与第二实施例大致相同，区别之处在于，本申请的第三实施例对所述主功率模块进行的控制，包括：对所述主功率模块中的双向直流DC-DC单元的控制；所述数字控制模块包括：采样单元191，用于对所述主功率模块中的电池电压和母线电压进行采样；模式和脉冲选择单元192，用于根据所述采样单元采样到的信号，对所述双向直流DC-DC单元的工作模式进行检测，并根据检测到的工作模式确定与所述检测到的工作模式相对应的脉冲；脉冲生成器193，用于根据所述模式和脉冲选择单元确定的脉冲，生成用于控制所述双向直流DC-DC单元的脉冲序列。第三实施例的双向直流变换器脉冲序列控制框图如图19所示。
在一个例子中，所述脉冲生成器包括：基本脉冲发生器，用于产生基本脉冲；脉冲组合 单元，用于将所述基本脉冲进行组合，得到所述脉冲序列。脉冲组合单元是可选项，模式和脉冲选择单元可以在基本脉冲发生器单元之前，也可以在其后。
在一个例子中，所述工作模式包括：升压模式、降压模式以及升降压模式。
以直流变换系统的主功率模块中的直流DC-DC单元为多重交错双向DC-DC单元为例。本例中数字控制模块与主功率模块与实施例二中基于多重交错双向DC-DC单元相同，数字控制模块及第一处理核与第二处理核对应的控制功能以及资源分配也相同，此处不再赘述。本实施例针对基于多重交错双向DC-DC单元的直流变换系统中数字控制模块的脉冲序列控制进行阐述。该系统中的双向直流变换器脉冲序列控制的实现框图如图20所示，充放电模式判断结束后，确定输出侧电压Vo和输入侧电压Vin。在充电模式时，Vo为电池侧电压，Vin为母线侧电压。反之，则Vo和Vin相反。比较Vin和Vo的数值大小，判断出当前变换器的工作模式，其中，工作模式包括:升压模式、降压模式或者升降压模式。不同模式所需要的脉冲序列不同。升降压模式选择单元如图21所示，图21中，V1为直流母线侧电压，V2为储能侧电压，Vin_L为直流母线是否掉电的判断电压域值。模式脉冲选择单元如图22所示，其中，Vs_L和Vs_H为Vin和Vo的差值允许范围。此实施例中，升压模式脉冲序列为PT_Boost，降压模式脉冲序列为PT_Buck。将输出电压与参考电压比较，判断产生基本脉冲PLx和PHx。根据当前模式情况和基本脉冲，组合生成需要的脉冲序列。此时，升降压模式的脉冲序列由升压模式的脉冲和降压模式的脉冲组合生成。但是，也可以将升降压模式脉冲序列设置为PT_BuckBoost，则可取消掉脉冲组合单元。基本脉冲发生器单元如图23所示。该实施例下，所生成的驱动信号作用于当前模式的受控开关管，其余开关管根据当前模式，将处于常开或者常闭状态，由模式进行直接控制，此处不再详细说明。并且，此实施例下基本脉冲序列可以为电压型脉冲序列，也可以是电流型脉冲序列。图21至图23均为控制框图中具体单元的逻辑分析，在实现时，可使用数字控制器例如DSP，现场可编程门阵列(Field-Programmable Gate Array，FPGA)等，实现上述逻辑控制，也可采用逻辑电路实现上述功能。
相对于传统的双向直流系统，在一些实施例中，双向变换器的控制多采用电压型控制，并结合三种模式切换，实现输出电压调节。基于电压型固有的问题，加上工作于Boost模式，Buck-Boost模式中右半平面零点的影响，为了使得变换器稳定工作，调节补偿器时减小了穿越频率，导致双向变换器瞬态响应速度慢，同时，三种模式的切换，意味着变换器工作于三种工作模式。采用传统的电压型控制时，每种工作模式都需要对补偿器进行调节，补偿器调节工作量至少是原来的三倍，为了解决上述问题，本实施例针对双向直流变换器的控制方面，将非线性的脉冲序列控制应用到双向变换器中，使用采样单元，模式和脉冲选择单元，脉冲生成器，与传统的线性控制相比，本申请实施例提出的脉冲序列控制提升了多种模式下双向变换器的瞬态响应，解决多模式下补偿器调试困难并且复杂的问题，另外，在双向变换器中，使用脉冲序列控制，通过脉冲的组合优化方案设计，实现变换器三个工作模式下稳定工作，具有良好的稳定性能和瞬态性能，缩短了双向变换器控制策略的研发周期。
由此可见，本申请的第三实施例将非线性的脉冲序列控制应用到双向变换器中，不仅提升多种模式下双向变换器的瞬态响应，解决多模式下补偿器调试困难并且复杂的问题，实现变换器三个工作模式下稳定工作，具有良好的稳定性能和瞬态性能，缩短了双向变换器控制策略的研发周期，而且，运用双核单芯片，仅用一块芯片实现了多种功能，降低了系统的电路设计的复杂度，提高了能量密度，缩短了硬件设计周期，无需考虑多个芯片之间多重任务 的协同配合方式，简化了多重任务间的协同配合方式，另外，芯片数量减少，一块芯片中双核交替工作实现可控休眠，使得减轻了主控芯片的能量损耗，增加了系统一体化程度，而且，通信时只需要考虑双核之间的通信，双核在同一芯片中，提高了通信实时性。
本领域的普通技术人员可以理解，上述各实施方式是实现本申请的具体实施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本申请的精神和范围。

Claims (10)

  1. 一种直流变换系统，包括：实现功率变换的主功率模块，以及数字控制模块；
    其中，所述数字控制模块通过双核单芯片实现，所述双核单芯片的第一处理核用于对所述主功率模块进行控制，所述双核单芯片的第二处理核用于对所述直流变换系统进行系统级的监控管理。
  2. 根据权利要求1所述的直流变换系统，其中，所述对所述主功率模块进行的控制，包括：对所述主功率模块中的双向直流DC-DC单元的控制；
    所述数字控制模块包括：
    采样单元，用于对所述主功率模块中电信号进行采样；
    模式和脉冲选择单元，用于根据所述采样单元采样到的信号，对所述双向直流DC-DC单元的工作模式进行判断，并根据判断的工作模式确定与所述检测到的工作模式相对应的脉冲；
    脉冲生成器，用于根据所述模式和脉冲选择单元确定的脉冲，生成用于控制所述双向直流DC-DC单元的脉冲序列。
  3. 根据权利要求2所述的直流变换系统，其中，所述脉冲生成器包括：
    基本脉冲发生器，用于产生基本脉冲；
    脉冲组合单元，用于将所述基本脉冲进行组合，得到所述脉冲序列。
  4. 根据权利要求2或3所述的直流变换系统，其中，所述工作模式包括：
    升压模式、降压模式以及升降压模式。
  5. 根据权利要求1至4中任一项所述的直流变换系统，其中，
    所述第一处理核用于根据预先分配给所述第一处理核的资源，对所述主功率模块进行控制；
    所述第二处理核用于根据预先分配给所述第二处理核的资源，对所述直流变换系统进行系统级的监控管理。
  6. 根据权利要求5所述的直流变换系统，其中，所述资源包括以下之一或其任意组合：
    存储资源、中断资源、外设资源、通信资源、CPU资源。
  7. 根据权利要求5或6所述的直流变换系统，其中，所述对所述主功率模块进行的控制，包括以下之一或其任意组合：
    充放电模式切换，高低压模式切换，稳压与瞬态控制，系统保护功能；
    所述对所述直流变换系统进行系统级的监控管理，包括以下之一或其任意组合：
    系统休眠控制、系统防盗、人机交互、控制信号收发；
    其中，电池管理功能包括在对所述主功率模块进行的控制中，或者，包括在对所述直流变换系统进行系统级的监控管理中。
  8. 根据权利要求5至7任一项所述的直流变换系统，其中，所述预先分配给所述第一处理核的资源，根据为所述第一处理核划分的功能确定；所述预先分配给所述第二处理核的资源，根据为所述第二处理核划分的功能确定。
  9. 根据权利要求8所述的直流变换系统，其中，所述为所述第一处理核划分的功能和为所述第二处理核划分的功能，根据所述直流变换系统的应用场景和所述第一处理核和所述第二处理核的性能特性确定。
  10. 根据权利要求1至9任一项所述的直流变换系统，其中，所述主功率模块中的直流DC-DC单元包括以下任意一种：
    单向直流DC-DC单元、双向直流DC-DC单元、多重交错双向直流DC-DC单元、多重交错单相DC-DC单元。
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