WO2022036712A1 - 一种频率控制方法及装置 - Google Patents

一种频率控制方法及装置 Download PDF

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Publication number
WO2022036712A1
WO2022036712A1 PCT/CN2020/110602 CN2020110602W WO2022036712A1 WO 2022036712 A1 WO2022036712 A1 WO 2022036712A1 CN 2020110602 W CN2020110602 W CN 2020110602W WO 2022036712 A1 WO2022036712 A1 WO 2022036712A1
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WIPO (PCT)
Prior art keywords
processor core
load
moment
temperature
frequency
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PCT/CN2020/110602
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English (en)
French (fr)
Inventor
胡荻
郭东之
库特拉德米特罗
刘臻
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华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2020/110602 priority Critical patent/WO2022036712A1/zh
Priority to EP20949920.1A priority patent/EP4191414A4/en
Priority to CN202080104123.3A priority patent/CN116113932A/zh
Publication of WO2022036712A1 publication Critical patent/WO2022036712A1/zh
Priority to US18/171,825 priority patent/US20230205286A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/20—Cooling means
    • G06F1/206—Cooling means comprising thermal management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7871—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present application relates to the technical field of processors, and in particular, to a frequency control method and device.
  • the components in the electronic device are usually defined with some standard operating ranges, such as rated operating frequency, rated operating voltage, etc.
  • the processor core is executed according to the rated operating frequency. Handling operations.
  • the processor core has an overclocking function, if the processor core determines that the rated operating frequency does not meet the needs of the current work scenario, the processor core frequency can be increased above the rated operating frequency to increase the processor core's frequency. processing performance.
  • the electronic device when the user enables the overclocking function of the electronic device, the electronic device has the opportunity to run at a preset overclocking frequency.
  • the processor core may be in a state of high voltage and high frequency for a long time, resulting in an excessively high temperature of the processor core.
  • the present application provides a frequency control method and device to solve the technical problem that the processor core will be in a high voltage and high frequency state for a long time during overclocking.
  • the present application provides a frequency control method, which is applied to a frequency controller, and the method includes: the frequency controller acquires at least two temperatures of a processor core, and determines a load change mode of the processor core, according to the load The variation mode determines a target temperature from at least two temperatures, and adjusts the frequency of the processor core according to the target temperature. Wherein, each of the at least two temperatures corresponds to a frequency, and the load variation mode is used to indicate the variation of the access load of the processor core.
  • the frequency controller controls the frequency of the processor core in real time according to at least two temperatures of the processor core, so that the temperature of the processor core after frequency modulation is always within a suitable temperature range, thereby helping Avoid the processor core being in a high voltage and high frequency state for a long time. Further, this method also selects a target temperature suitable for the current load change mode from at least two temperatures of the processor core to adjust the frequency, so that the frequency of the adjusted processor core can be more in line with the current load of the processor core. The change characteristics help to improve the timeliness of adjusting the frequency of the processor core.
  • the frequency controller obtains at least two temperatures of the processor core, including: the frequency controller first obtains the temperature of the processor core at the first moment, and then according to the temperature of the processor core at the first moment, Predict the temperature of the processor core at the second moment. Wherein, the second moment is located after the first moment.
  • the frequency controller can select the target temperature from the current temperature and the future temperature. Since the current temperature is affected by the historical load, and the future temperature is affected by the current load, so The frequency of the processor core determined in this way can better match the characteristics of the historical load and the load that has a greater impact on the processor core in the current load.
  • the target temperature can satisfy either of the following conditions:
  • the frequency controller can use the temperature corresponding to the frequency with the highest value among the frequency corresponding to the temperature at the first moment and the frequency corresponding to the temperature at the second moment as the temperature. target temperature. In this way, when the load changes are small, the processor core is actually in a steady state, in this case, whether the frequency of the processor core is adjusted according to the current temperature of the processor core, or the future temperature of the processor core is adjusted. The frequency of the core will not cause the temperature of the processor core after adjusting the frequency to exceed the range of the temperature control water line.
  • the temperature of the processor core can be adjusted under the condition that the temperature of the processor core does not exceed the temperature control water line. , so that the processor core runs at a higher frequency, so as to improve the processing capability of the processor core as much as possible, and achieve the purpose of making full use of the thermal margin.
  • the load change mode of the processor core is the load increase mode
  • the frequency controller may use the temperature at the first moment as the target temperature.
  • the current load is in a rising state, although the future load corresponds to a higher temperature, the current temperature has not actually reached the future temperature, so it is not actually necessary to perform a frequency reduction operation.
  • the thermal margin of the processor core can be fully utilized, which helps to improve the processor core's temperature as much as possible when the temperature of the processor core is controllable. processing performance.
  • the load change mode of the processor core is the load drop mode
  • the frequency controller may use the temperature at the second moment as the target temperature. In this way, when the current load is in a falling state, although the current load corresponds to a higher temperature, the future load corresponds to a lower temperature. In this case, using the future temperature to advance the frequency boosting operation of the processor core helps to improve the processing performance of the processor core as soon as possible.
  • the frequency controller may determine the load variation pattern of the processor core in any of the following ways:
  • the frequency controller first determines the first load variation range according to the load of the processor core at the historical moment before the first moment and the preset load variation. If the load of the processor core at the first moment is at the first load Within the variation range, the load variation mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load variation range, the load variation mode of the processor core is determined to be In the load increasing mode, if the load of the processor core at the first moment is less than the minimum load in the first load variation range, the load variation mode of the processor core is determined to be the load decreasing mode.
  • the load variation mode of the processor core is determined to be the load decreasing mode.
  • Method 2 The frequency controller first determines the second load variation range according to the load of the processor core at the first moment and the preset load variation, and then determines the second load variation range according to the load of the processor core at the first moment and the load of the processor core at the first moment.
  • the load at the historical moment before the moment predict the load of the processor core at the second moment, and if the load of the processor core at the second moment is within the second load variation range, determine that the load variation mode of the processor core is the load unchanged mode, if the load of the processor core at the second moment is greater than the maximum load in the second load variation range, determine that the load variation mode of the processor core is the load rising mode, if the load of the processor core at the second moment is less than the second
  • the minimum load in the load variation range determines that the load variation mode of the processor core is the load drop mode.
  • the frequency controller predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment, including: the frequency controller predicts the temperature of the processor core at the first moment and the processing The power consumption of the processor core at the first moment, and the temperature of the processor core at the second moment is predicted.
  • the frequency controller can comprehensively consider the current temperature and the current power consumption to predict the future temperature. Since the current power consumption can reflect the load of the processor core, the future temperature determined in this way can be more accurate. In line with the current load characteristics of the processor core.
  • the frequency controller predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment, including: the frequency controller predicts the temperature of the processor core at the first moment and The temperature of the processor core at the historical moment before the first moment is used to predict the temperature of the processor core at the second moment.
  • the frequency controller can predict the future temperature according to the current temperature and the historical temperature. Since the temperature changes are continuous, the future temperature determined in this way can be more in line with the real temperature change characteristics.
  • a frequency controller which may include:
  • a monitoring circuit for acquiring at least two temperatures of the processor core and sending them to the processing circuit, where each of the at least two temperatures corresponds to a frequency
  • the processing circuit is used to determine the load variation mode of the processor core, determine the target temperature from at least two temperatures according to the load variation mode, and adjust the frequency of the processor core according to the target temperature; wherein the load variation mode is used to indicate the processor core changes in the access load.
  • the monitoring circuit may first obtain the temperature of the processor core at the first moment, and then predict the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment. Wherein, the second moment is located after the first moment.
  • the processing circuit determines the load change mode of the processor core
  • the load change mode of the processor core is the load constant mode
  • the frequency corresponding to the temperature at the first moment and the frequency at the second moment can be calculated.
  • the temperature corresponding to the frequency with the highest value among the frequencies corresponding to the temperature of is used as the target temperature.
  • the load change mode of the processor core is the load rising mode
  • the temperature at the first moment can be used as the target temperature.
  • the change mode is the load drop mode
  • the temperature at the second time is taken as the target temperature.
  • the processing circuit may determine the load variation pattern of the processor core in any of the following ways:
  • Method 1 The processing circuit first determines the first load variation range according to the load of the processor core at the historical moment before the first moment and the preset load variation amount. If the load of the processor core at the first moment is in the first load variation range Within the range, the load change mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load change range, the load change mode of the processor core is determined to be the load. In the rising mode, if the load of the processor core at the first moment is less than the minimum load in the first load variation range, the load variation mode of the processor core is determined to be the load falling mode.
  • Method 2 The processing circuit first determines the second load variation range according to the load of the processor core at the first moment and the preset load change amount, and determines the second load variation range according to the load of the processor core at the first moment and the processor core at the first moment. The load at the previous historical moment, and the load of the processor core at the second moment is predicted.
  • the load variation mode of the processor core is determined to be the load constant mode, and if the load of the processor core at the second moment is greater than the second load variation range
  • the maximum load of the processor core is determined as the load rising mode, and if the load of the processor core at the second moment is less than the minimum load in the second load variation range, the load change mode of the processor core is determined as the load drop mode.
  • the monitoring circuit may predict the temperature of the processor core at the second time in any of the following ways:
  • the monitoring circuit predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment and the power consumption of the processor core at the first moment.
  • the monitoring circuit predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment and the temperature of the processor core at the historical moment before the first moment.
  • an embodiment of the present application provides a frequency controller, and the frequency controller may include:
  • an acquisition unit configured to acquire at least two temperatures of the processor core, each of the at least two temperatures corresponds to a frequency
  • a determining unit configured to determine a load change mode of the processor core, and determine a target temperature from at least two temperatures according to the load change mode; wherein the load change mode is used to indicate a change in the access load of the processor core;
  • the adjustment unit is used to adjust the frequency of the processor core according to the target temperature.
  • the obtaining unit is specifically configured to: first obtain the temperature of the processor core at the first moment, and then predict the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment. Wherein, the second moment is located after the first moment.
  • the determining unit is specifically configured to: when the load change mode of the processor core is the load constant mode, take a value between the frequency corresponding to the temperature at the first moment and the frequency corresponding to the temperature at the second moment The temperature corresponding to the highest frequency is used as the target temperature.
  • the load change mode of the processor core is the load rise mode
  • the temperature at the first moment is used as the target temperature.
  • the load change mode of the processor core is the load drop mode
  • the The temperature at the second time is the target temperature.
  • the determination unit may determine the load variation pattern of the processor core in any of the following ways:
  • the determining unit determines the first load variation range according to the load of the processor core at the historical moment before the first moment and the preset load variation amount, if the load of the processor core at the first moment is within the first load variation range If the load change mode of the processor core is greater than the maximum load in the first load change range, the load change mode of the processor core is determined to be the load increase mode. If the load of the processor core at the first moment is less than the minimum load in the first load variation range, it is determined that the load variation mode of the processor core is the load reduction mode.
  • Method 2 The determining unit first determines the second load variation range according to the load of the processor core at the first moment and the preset load change amount, and then determines the second load variation range according to the load of the processor core at the first moment and the processor core at the first moment. The load at the previous historical moment, and the load of the processor core at the second moment is predicted.
  • the load variation mode of the processor core is the load constant mode, and if the load of the processor core at the second moment is greater than the second load variation range
  • the maximum load of the processor core is determined as the load rising mode, and if the load of the processor core at the second moment is less than the minimum load in the second load variation range, the load change mode of the processor core is determined as the load drop mode.
  • the acquisition unit can predict the temperature of the processor core at the second time in any of the following ways:
  • the obtaining unit predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment and the power consumption of the processor core at the first moment.
  • the obtaining unit predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment and the temperature of the processor core at the historical moment before the first moment.
  • the present application provides a processor, which may include a processor core, a temperature sensor, a frequency regulator, and a frequency controller, where the temperature sensor and the frequency regulator are respectively connected to the frequency controller.
  • a temperature sensor connected to the processor core for acquiring at least one first temperature of the processor core and sending it to the frequency controller;
  • a frequency controller configured to determine at least one second temperature of the processor core according to the at least one first temperature of the processor core, where each of the at least one first temperature and the at least one second temperature corresponds to a frequency; and, determining The load change mode of the processor core, according to the load change mode of the processor core, determine the target temperature from at least one first temperature and at least one second temperature, and send the frequency corresponding to the target temperature to the frequency regulator; wherein, the load The variation mode is used to indicate the variation of the access load of the processor core;
  • the frequency regulator connected with the processor core is used to adjust the frequency of the processor core to the frequency corresponding to the target temperature.
  • the temperature sensor can acquire the first temperature of the processor core at the first moment and send it to the frequency controller, and then the frequency controller can predict the first temperature of the processor core at the first moment by the frequency controller.
  • the frequency controller may determine the target temperature in the following manner: if the load change mode of the processor core is the load constant mode, then the frequency corresponding to the first temperature at the first moment and the frequency corresponding to the second moment at the second moment The temperature corresponding to the frequency with the highest value among the frequencies corresponding to the second temperature is used as the target temperature. If the load change mode of the processor core is the load increase mode, the first temperature at the first moment is used as the target temperature. If the load change mode of the processor core is the load drop mode, the second temperature at the second moment is used as the target temperature.
  • the frequency controller may determine the load variation pattern of the processor core in any of the following ways:
  • Method 1 The frequency controller determines the first load variation range according to the load of the processor core at the historical moment before the first moment and the preset load variation amount. If the load of the processor core at the first moment is in the first load variation range Within the range, the load change mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load change range, the load change mode of the processor core is determined to be the load. In the rising mode, if the load of the processor core at the first moment is less than the minimum load in the first load variation range, the load variation mode of the processor core is determined to be the load falling mode.
  • the frequency controller determines the second load variation range according to the load of the processor core at the first moment and the preset load variation amount, according to the load of the processor core at the first moment and the processor core before the first moment. If the load of the processor core at the second moment is within the second load variation range, the load variation mode of the processor core is determined as the load constant mode, If the load of the processor core at the second moment is greater than the maximum load in the second load variation range, the load variation mode of the processor core is determined to be the load rising mode, and if the load of the processor core at the second moment is less than the second load variation The minimum load in the range is determined, the load change mode of the processor core is determined as the load drop mode.
  • the processor may further include a power consumption sensor connected to the processor core.
  • the power consumption sensor can obtain the power consumption of the processor core at the historical moment before the first moment and the power consumption of the processor core at the first moment, and combine the power consumption of the historical moment with the power consumption of the first moment.
  • the power consumption is sent to the frequency controller, and the temperature sensor can also obtain the temperature of the processor core at the historical moment before the first moment and send it to the frequency controller.
  • the frequency controller can The temperature at the historical moment determines the load of the processor core at the historical moment, and determines the load of the processor core at the first moment according to the power consumption of the processor core at the first moment and the first temperature at the first moment.
  • the frequency controller may predict the second temperature of the processor core at the second time in any of the following ways:
  • the frequency controller predicts the second temperature of the processor core at the second moment according to the first temperature of the processor core at the first moment and the power consumption of the processor core at the first moment.
  • the frequency controller predicts the second temperature of the processor core at the second moment according to the first temperature of the processor core at the first moment and the temperature of the processor core at the historical moment before the first moment.
  • the present application provides an electronic device, the electronic device including the processor described in any of the fourth aspect above.
  • FIG. 1 exemplarily shows a schematic structural diagram of a processor provided by an embodiment of the present application
  • FIG. 2 exemplarily shows a schematic flowchart corresponding to a frequency control method provided by an embodiment of the present application
  • FIG. 3 exemplarily shows a specific flowchart of a frequency control method provided by an embodiment of the present application
  • FIG. 4A exemplarily shows a load variation curve diagram of a processor core
  • FIG. 4B exemplarily shows a temperature change curve diagram of a processor core
  • FIG. 4C exemplarily shows a frequency variation curve diagram of a processor core
  • FIG. 5A exemplarily shows a load variation curve diagram of another processor core
  • FIG. 5B exemplarily shows a temperature change curve diagram of another processor core
  • FIG. 5C exemplarily shows a frequency change curve diagram of another processor core
  • FIG. 6 exemplarily shows a schematic structural diagram of a frequency controller provided by an embodiment of the present application
  • FIG. 7 exemplarily shows a schematic structural diagram of another frequency controller provided by an embodiment of the present application.
  • the electronic device may be a computer device having a processor (such as a central processing unit (CPU)), such as a desktop computer. It should also be understood that, in some other embodiments of the present application, the electronic device may also be a portable electronic device with a processor, such as a mobile phone, a tablet computer, a wearable device (such as a smart watch) with a wireless communication function, a vehicle-mounted device Wait. Exemplary embodiments of portable electronic devices include, but are not limited to, carry-on Or portable electronic devices with other operating systems.
  • the electronic device When the electronic device has the overclocking function, if the power consumption margin of the processor core in the electronic device satisfies the overclocking startup condition, the electronic device can increase the frequency of the processor core to a higher frequency than the one specified by the manufacturer to increase the processing power. processor core processing performance. However, with the increase of the frequency of the processor core, the power consumption of the processor core will also increase accordingly, and the increased power consumption is manifested in the form of thermal energy, which makes the temperature of the processor core increase. When the heat dissipation capacity cannot cool down the processor core in time, the excessively high temperature will affect the life and reliability of the processor core.
  • a temperature control water line is preset in the electronic device.
  • the electronic device does not adjust the frequency of the processor core.
  • the electronic device increases the frequency of the processor core to increase the processing performance of the processor.
  • the electronic device reduces the frequency of the processor core to reduce the temperature of the processor core.
  • the temperature control water line can be set according to the rated temperature of the processor core. For example, when the rated temperature is 99°C (degree Celsius), the temperature control water line can be set to 98°C to 100°C.
  • the above embodiments can adjust the frequency of the processor core according to the current temperature of the processor core, the current temperature of the processor core actually depends on the load of the processor core. The more work of the core, the higher the temperature of the processor core. When the load of the processor core is smaller, the less work of the processor core is, resulting in a lower temperature of the processor core. In this case, due to the causal relationship between the load of the processor core and the temperature of the processor core, the temperature of the processor core is actually a manifestation of the load that lags behind the processor core, such as the current The temperature may be caused by the load of the processor core at the last moment, and the current load of the processor core actually causes the temperature of the processor core to continue to rise or fall. Due to this lag, only adjusting the frequency of the processor core according to the current temperature of the processor core may result in poor timing of frequency adjustment.
  • the present application provides a frequency control method to control the frequency of the processor core in real time according to at least two temperatures and loads of the processor core.
  • the temperature is within a suitable temperature range to avoid the processor core being in a high-voltage and high-frequency state for a long time.
  • this method can also select a target temperature suitable for the current load change mode from at least two temperatures of the processor core for frequency adjustment, so that the frequency of the processor core adjusted by using the target temperature can be more in line with the processing frequency.
  • the current load variation characteristics of the processor core are also used, so this method also helps to improve the timeliness of adjusting the frequency of the processor core.
  • At least one means one or more, and “plurality” means two or more.
  • And/or which describes the association relationship of the associated objects, indicates that there can be three kinds of relationships, for example, A and/or B, which can indicate: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A, B can be singular or plural.
  • the character “/” generally indicates that the associated objects are an “or” relationship.
  • “At least one item(s) below” or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one item (a) of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple .
  • ordinal numbers such as “first” and “second” mentioned in the embodiments of the present application are used to distinguish multiple objects, and are not used to limit the priority or importance of multiple objects.
  • first moment and the second moment are only for distinguishing different moments, and do not indicate the difference in priority or importance of the two moments.
  • FIG. 1 exemplarily shows a schematic structural diagram of a processor 100 provided by an embodiment of the present application.
  • the processor 100 may include at least one processor core, such as a processor core 10 , a processor core 11 , a processor core 12 , and a processor core 13 .
  • the processor 100 may also include non-core components, such as general-purpose units (including counters, decoders, signal generators, etc.), accelerator units, input/output control units, interface units, internal memory, and external buffers.
  • each processor core and non-core components may be connected through a communication bus (not shown in FIG. 1 ), so as to realize the data transmission operation.
  • the above-mentioned processor 100 may be a chip.
  • the processor 100 may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), or a system on chip (SoC). It can be a central processing unit (CPU), a network processor (NP), a digital signal processing circuit (DSP), or a microcontroller (microcontroller). unit, MCU), it can also be a programmable logic device (PLD) or other integrated chips.
  • the processor 100 in this embodiment of the present application may also be an integrated circuit chip, which has a signal processing capability.
  • the processor 100 described above may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, Discrete hardware components.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the memory in the embodiments of the present application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically programmable Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • Volatile memory may be random access memory (RAM), which acts as an external cache.
  • RAM random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous DRAM
  • SDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • direct rambus RAM direct rambus RAM
  • the processor may further include a frequency controller 14, and each processor core may also be provided with a frequency regulator, and the frequency controller 14 may be associated with each processor core. the frequency regulator communication connection.
  • the frequency controller 14 may send a frequency control instruction to the frequency adjuster of the processor core, so that the frequency adjuster of the processor core adjusts the processing according to the frequency control instruction
  • the frequency of the processor core is adjusted to be greater than the maximum frequency set by the manufacturer.
  • FIG. 1 is only an exemplary illustration.
  • the frequency regulator may be set only in one or several processor cores.
  • the frequency controller 14 may The frequency regulator controls the frequency of the processor core.
  • a frequency regulator may also be set in the non-core components, so that the frequency controller 14 can not only control the frequency of the processor core, but also control the frequency of the non-core components.
  • the non-core components mentioned here refer to the components that work according to the set frequency.
  • the frequency control method in this application is described below by taking controlling the frequency of one processor core as an example, and the details of controlling the frequency of other processor cores or non-processor cores will not be repeated.
  • FIG. 2 exemplarily shows a schematic flowchart corresponding to a frequency control method provided by an embodiment of the present application.
  • the method is applicable to a frequency controller, such as the frequency controller 14 shown in FIG. 1 .
  • the frequency controller may execute the frequency control method in a periodic manner.
  • FIG. 2 exemplarily introduces the primary frequency control process of the frequency controller. As shown in FIG. 2 , the method includes:
  • Step 201 the frequency controller acquires at least two temperatures of the processor core.
  • the at least two temperatures of the processor core may include the current temperature of the processor core, and may also include at least one of the temperature of the processor core at each future moment and the temperature at each historical moment.
  • each temperature may correspond to a frequency, and the frequencies corresponding to different temperatures may be different. How to calculate the frequency corresponding to the temperature will be specifically described in step 204, which will not be introduced here.
  • Step 202 the frequency controller determines the load variation mode of the processor core.
  • the load variation mode of the processor core is used to indicate the variation of the access load of the processor core. For example, if the current access load of the processor core is significantly higher than the historical access load, the load change mode of the processor core is the load rising mode. If the current access load of the processor core is higher than the historical access load If the input load drops significantly, the load change mode of the processor core is the load drop mode. If the current access load of the processor core is not much different from the historical access load, the load change mode of the processor core is the load constant mode.
  • the data values used for judging "significant increase”, “significant decrease” and “not much difference” those skilled in the art can set according to experience or set according to actual needs, which is not specifically limited.
  • Step 203 the frequency controller determines the target temperature from at least two temperatures according to the load change mode.
  • the target temperature may refer to a temperature that best matches the load change pattern among multiple temperatures. For example, in the case of multiple temperatures including the current temperature and the future temperature, if the load change mode is in the load rising mode, since the current temperature does not reach the future temperature, it is actually unnecessary to perform the frequency reduction operation in advance. In this case, the current temperature can be used as the target temperature. In the case of multiple temperatures including the current temperature and the historical temperature, if the load change mode is in the load reduction mode, since the current temperature is lower than the historical temperature, in order to improve the processing performance of the processor core, the current temperature can also be used as the target temperature. . There are various specific strategies for determining the target temperature from at least two temperatures, and which strategy to use can be set by those skilled in the art based on experience, which will not be introduced here.
  • Step 204 the frequency controller adjusts the frequency of the processor core to the frequency corresponding to the target temperature.
  • the frequency controller may determine the frequency corresponding to each temperature in various ways, such as a proportional integral derivative (proportion integral derivative, PID) control method, an experimental measurement method, and the like.
  • PID proportional integral derivative
  • the PID control method logically corresponds to a mathematical expression
  • the dependent variable of the mathematical expression is frequency
  • the independent variables are temperature and temperature change
  • each parameter in the mathematical expression can include proportional parameters, integral parameters and differential parameters parameters, which are pre-sumed from multiple experiments on the basis of the expected temperature.
  • the frequency controller directly substitutes the temperature and the change of the temperature compared with the historical temperature into the above mathematical expression, and then the frequency corresponding to the temperature can be calculated.
  • the frequency controller can reduce the frequency of the processor core when the temperature is greater than the desired temperature, so as to Reduce the heat generation of the processor core, and try to make the temperature of the processor core close to the expected temperature.
  • the temperature will correspond to a higher frequency. In this way, the frequency controller can increase the frequency of the processor core when the temperature is lower than the expected temperature. When the temperature is not greater than the expected temperature, try to improve the processing performance of the processor core.
  • the frequency controller can summarize the corresponding relationship between temperature and frequency (such as a corresponding relationship table or a corresponding relationship diagram) according to multiple experiments in advance. In this way, the frequency controller can directly query the corresponding relationship to obtain the corresponding temperature frequency.
  • the frequency controller may first generate a frequency control command according to the frequency corresponding to the target temperature, and then send the frequency control command to the frequency regulator of the processor core, so that the frequency regulator can adjust the frequency of the processor core is the frequency corresponding to the target temperature.
  • the frequency regulator needs to increase the working voltage of the processor core synchronously, so that the working voltage of the processor core can support high-frequency work, in this case, the processor core can be at high voltage high frequency state.
  • the frequency regulator can simultaneously reduce the operating voltage of the processor core.
  • the processor core changes from a high-voltage low-frequency state to a low-voltage low-frequency state, so that the power utilization rate of the processor core is also reduced. can be improved.
  • the specific working voltage of the processor core it can be determined by the frequency regulator with reference to the preset corresponding relationship between the frequency and the working voltage.
  • the preset corresponding relationship can be pre-packaged in the frequency regulator by those skilled in the art. Inside, the preset correspondences corresponding to each processor core may be the same or different.
  • each processor core can be located at an independent power supply threshold, so that the operating voltage of each processor core can correspond to its own frequency, which is helpful to improve Power utilization per processor core.
  • the frequency of the processor core is controlled in real time by using at least two temperatures and loads of the processor core by the frequency controller, so that the temperature of the processor core after frequency modulation can always be in a suitable temperature range inside, to avoid the processor core being in a high-voltage and high-frequency state for a long time.
  • the frequency controller selects a target temperature suitable for the current load change mode from at least two temperatures of the processor core to adjust the frequency, so that the frequency of the adjusted processor core can be more in line with the current load change of the processor core. In this way, not only the temperature of the processor core, but also the access load of the processor core is considered, thereby helping to improve the timeliness of adjusting the frequency of the processor core.
  • FIG. 3 exemplarily shows a specific flowchart of a frequency control method provided by an embodiment of the present application. As shown in FIG. 3 , the method is applicable to a frequency controller, such as the frequency controller 14 shown in FIG. 1 .
  • Fig. 3 exemplarily introduces the primary frequency control process of the frequency controller, as shown in Fig. 3, the method includes:
  • Step 301 the frequency controller obtains the temperature of the processor core at the first moment.
  • the frequency controller may acquire the temperature of the processor core at the first moment in various ways, and two optional implementation manners are exemplarily introduced below.
  • each processor core may also be provided with a temperature sensor, such as a temperature sensor, and the temperature sensor and the frequency controller are connected through a communication line.
  • the temperature sensor may sample the temperature of the processor core according to the first set period, and send the sampled temperature to the frequency controller through the communication line between the temperature sensor and the frequency controller.
  • the first set period can be set by those skilled in the art based on experience. For example, in order to improve the accuracy of the temperature sampled, the first set period can be set to 100um. In this way, the temperature sensor can be sampled every 100um for processing.
  • the temperature of the controller core is sent to the frequency controller. In this case, the temperature of the processor core at the first moment can be:
  • the temperature sampled by the temperature sensor at the first moment or,
  • the temperature sampled by the temperature sensor at the latest sampling time before the first time is the latest sampling time before the first time.
  • the frequency controller executes the frequency control method in the embodiment of the present application according to the second set period, if the second set period is 1ms, The first set period is 100um, then the frequency controller can receive 10 sampling temperatures sent by the temperature sensor in each second set period. In this case, the frequency controller can The weight of the sampling temperature calculates the weighted average of the 10 sampling temperatures, and uses the weighted average as the temperature at the first moment. Wherein, the sum of the weights of the 10 sampling temperatures is 1, and the weights of the 10 sampling temperatures increase sequentially according to the order of sampling time.
  • the frequency controller can directly obtain the temperature at the first moment through the measurement method.
  • a temperature sensor needs to be set in the processor core, the measured temperature is more accurate, which helps to improve the frequency adjustment. accuracy.
  • each processor core may further be provided with a power consumption sensor, and the power consumption sensor and the frequency controller are also connected through a communication line.
  • the power consumption sensor can sample the number of inversions of each signal in the processor core according to the third set period, and then determine that each signal is in a third state according to the number of inversions of each signal and the power consumption corresponding to one inversion of the signal.
  • the power consumption in the set period is calculated according to the power consumption of each signal in a third set period to obtain the total power consumption of the processor core in a third set period, and then through the power consumption sensor and the frequency controller.
  • the previous communication line sends this total power consumption to the frequency controller.
  • the frequency controller may determine the temperature corresponding to the total power consumption according to the preset correspondence between the power consumption and the temperature, and use the temperature as the temperature of the processor core at the first moment.
  • the frequency controller can obtain the temperature at the first moment through an indirect calculation method.
  • the indirect calculation method is not as accurate as the measurement method in terms of accuracy, this method can eliminate the need to install a temperature sensor in the processor core. , which helps to save space and design cost of the processor core.
  • “obtaining the temperature at the first moment indirectly through the power consumption sensor” is only an optional implementation manner, and in other optional implementation manners, the frequency controller may also acquire the temperature at the first moment in other indirect ways. The temperature, for example, predicting the temperature at the first moment by using the temperature at each historical moment before the first moment, etc., will not be introduced too much here.
  • Step 302 the frequency regulator predicts the temperature of the processor core at the second moment according to the temperature of the processor core at the first moment.
  • the second moment may be any moment after the first moment, for example, a moment after 1 ms.
  • the frequency controller may predict the temperature of the processor core at the second moment in various manners, and two alternative implementation manners are exemplarily introduced below.
  • the frequency controller may firstly base on the temperature of the processor core at the first moment and at least one history of the processor core before the first moment The temperature at the time is fitted to obtain a temperature prediction model, and then the temperature prediction model is used to predict the temperature of the processor core at the second time.
  • the initial model can choose any one of linear model, quadratic polynomial model, cubic polynomial model or B-spline model. The temperature of each historical moment before the first moment and the temperature of each historical moment is substituted into the initial model, and the unknown model parameters can be calculated, and the temperature prediction model can be obtained by substituting the unknown model parameters into the initial model.
  • the frequency controller may first determine the processing according to the flip frequency and flip times of each component in the processor core sent by the power consumption sensor The power consumption of the processor core at the first moment, and then according to the power consumption of the processor core at the first moment and the temperature of the processor core at the first moment, the temperature of the processor core at the second moment is calculated according to the following formula (1.1). :
  • T 2 is the temperature of the processor core at the second moment
  • T 1 is the temperature of the processor core at the first moment
  • P 1 is the power consumption of the processor core at the first moment.
  • Coefficient A and coefficient B in formula (1.1) are constant values, and the values of coefficient A and coefficient B can be calculated according to experiments. When the number of experiments is more, the values of coefficient A and coefficient B are more accurate.
  • the processor core comprehensively considers two factors, the current temperature and the current power consumption, when predicting the future temperature. For the scheme of predicting the future temperature, the future temperature determined in this way can be more in line with the current load characteristics of the processor core.
  • "setting a temperature sensor or a power consumption sensor in each processor core” is only an optional implementation.
  • the frequency controller can subsequently compensate the temperature value sampled by the temperature sensor according to a certain strategy. temperature to get the temperature of each processor core.
  • the power consumption value sampled by the power consumption sensor is the total power consumption of two or more processor cores
  • the frequency controller can subsequently distribute the power consumption sampled by the power consumption sensor in a certain proportion to Get the power consumption per processor core.
  • the specific strategy or ratio to be used can be set by those skilled in the art based on experience, which will not be described here.
  • Step 303 the frequency controller determines the load variation pattern corresponding to the processor core at the first moment according to the load of the processor core at the first moment:
  • step 304 is executed;
  • step 305 is executed;
  • step 306 is executed.
  • the load of the processor core at any moment may be determined according to the power consumption, frequency and voltage of the processor core at the moment.
  • a voltage sampler can also be set in the processor core. The voltage sampler can sample the voltage of the processor core at any time.
  • the frequency controller can obtain the voltage through the voltage collector. The voltage of the processor core at the ith time, the power consumption of the processor core at the ith time is obtained through the power consumption sensor, and the frequency of the processor core at the ith time is obtained through the frequency regulator, and then calculated according to the following formula (1.2) Get the load of the processor core at the ith moment:
  • a i is the load of the processor core at the ith moment
  • Pi is the power consumption of the processor core at the ith moment
  • f i is the frequency of the processor core at the ith moment
  • Vi is the processor core at the ith moment voltage at time i.
  • the frequency controller may determine the load variation mode corresponding to the processor core at the first moment in various ways, and two optional implementation manners are exemplarily introduced below.
  • the load of the processor core at the first moment is within the first load variation range (ie (1-x)*A 0 ⁇ A 1 ⁇ (1+x)*A 0 ), then the load of the processor core at the first moment
  • the difference between the load and the load of the processor core at the historical moment is not large, so it can be determined that the load change mode corresponding to the processor core at the first moment is the load constant mode; or,
  • the load of the processor core at the first moment is less than the minimum load in the first load variation range (ie A 1 ⁇ (1-x)*A 0 ), then the load of the processor core at the first moment is significantly smaller than that of the processor core
  • the load at the historical moment so it can be determined that the load change mode corresponding to the processor core at the first moment is the load drop mode;
  • the load of the processor core at the first moment is greater than the maximum load in the first load variation range (ie A 1 ⁇ (1+x)*A 0 ), then the load of the processor core at the first moment is significantly larger than that of the processor core The load at the historical moment, therefore, it can be determined that the load change mode corresponding to the processor core at the first moment is the load rising mode.
  • the load variation rate may be set to a real number slightly greater than 0, such as 0.1.
  • the frequency controller may also determine, according to the load of the processor at the first moment and the predicted load of the processor at a future moment (for example, the second moment) after the first moment, that the processor is at the first moment.
  • the load A 0 at the historical moment before the first moment and then use the load A 1 of the first moment and the load A 0 of the historical moment to fit a load prediction model, and predict the processor core at a future moment according to the load prediction model obtained by fitting load (assuming A 3 ), and then according to the preset load change rate x and the load A 1 of the processor core at the first moment, determine the second load change range [(1-x)*A 1 , (1 +x)*A 1 ]. under these circumstances:
  • the load of the processor core at the future time is within the second load variation range (ie (1-x)*A 1 ⁇ A 3 ⁇ (1+x)*A 1 ), then the load of the processor core at the future time is the same as The load difference of the processor core at the first moment is not large, so it can be determined that the load change mode corresponding to the processor core at the first moment is the load constant mode; or,
  • the load of the processor core at the future moment is less than the minimum load in the second load variation range (ie A 3 ⁇ (1-x)*A 1 ), then the load of the processor core at the future moment is obviously smaller than that of the processor core at the first The load at a moment, so it can be determined that the load change mode corresponding to the processor core at the first moment is the load drop mode;
  • the load of the processor core at the future moment is greater than the maximum load in the second load variation range (ie A 3 ⁇ (1+x)*A 1 ), then the load of the processor core at the future moment is obviously greater than that of the processor core at the first The load at a moment, therefore, it can be determined that the load change mode corresponding to the processor core at the first moment is the load increase mode.
  • Step 304 the frequency controller sends a first frequency control instruction to the frequency regulator of the processor core, and the first frequency control instruction is used by the frequency regulator of the processor core to adjust the frequency of the processor core to the temperature corresponding to the first moment. frequency.
  • first moment the current moment
  • second moment the future moment
  • step 304 when the load at the current moment is in a rising state, although the load at the future moment corresponds to a higher temperature (for example, reaching the limit temperature that needs to be reduced in frequency), the temperature at the current moment has not actually reached the future temperature. temperature at the moment, so there is actually no need to perform a frequency reduction operation.
  • the frequency of the processor core by using the frequency corresponding to the temperature at the current moment, the thermal margin of the processor core can be fully utilized, which helps to improve the processor core as much as possible while the temperature of the processor core is controllable. Core processing performance.
  • Step 305 the frequency controller sends a second frequency control instruction to the frequency regulator of the processor core, and the second frequency control instruction is used by the frequency regulator of the processor core to adjust the frequency of the processor core to the temperature corresponding to the second moment. frequency.
  • step 305 when the load at the current moment is in a falling state, although the load at the current moment corresponds to a higher temperature, the load at the future moment corresponds to a lower temperature (for example, reaching the limit temperature that needs to be increased in frequency).
  • a lower temperature for example, reaching the limit temperature that needs to be increased in frequency.
  • using the temperature in the future to perform a frequency boosting operation on the processor core in advance helps to improve the processing performance of the processor core as soon as possible.
  • step 304 and step 305 are described below with a specific example.
  • FIG. 4A exemplarily shows a load variation graph of the processor core in the period [0.35s, 0.38s]
  • FIG. 4B exemplarily shows a temperature variation graph of the processor core in the period [0.35s, 0.38s]
  • FIG. 4C exemplarily shows a frequency change graph of the processor core in the period of [0.35s, 0.38s].
  • the solid line in FIG. 4B is the temperature change line for frequency adjustment based on the temperature after 2ms
  • the dotted line in FIG. 4B is the temperature change line for frequency adjustment based on the current temperature
  • the solid line in FIG. 4C is based on the temperature change after 2ms.
  • 4C is the frequency change line for frequency adjustment based on the current temperature.
  • the temperature water line is [98.8°C, 100°C], in which there is a corresponding relationship between the temperature of the processor core and the frequency.
  • the temperature of the processor core is lower than 98.8°C, the current temperature of the processor core is indicated. Lower, there is still some thermal margin in the processor core. In this case, the processor core can be boosted to make full use of the thermal margin and improve the processing performance of the processor core. Therefore, 98.8°C can be called The extreme temperature at which the processor core needs to be clocked up.
  • the load of the processor core increases from about 0.35s to 0.355s.
  • the frequency controller will predict that the temperature of the processor core will increase with the increase of the load.
  • the frequency controller controls the processor core to perform frequency reduction first (refer to the solid line at point A in FIG. 4C ).
  • the temperature of the processor core does not actually reach the limit temperature of 100°C that requires frequency reduction, and frequency adjustment based on the predicted temperature after 2 ms is a kind of over-adjustment.
  • step 304 when the load increases, by using the current temperature to adjust the frequency, the frequency reduction operation of the processor core can be delayed as much as possible when the processor core has not reached the limit temperature that needs frequency reduction (refer to A in FIG. 4C ).
  • the dotted line at the point indicates) to maximize the processing performance of the processor core while making full use of the thermal margin.
  • the load of the processor core begins to drop around 0.37s to 0.375s.
  • the frequency controller will predict that the temperature of the processor core decreases with the load.
  • the frequency controller controls the processor core to perform the frequency boost first (refer to the solid line at point B in FIG. 4C ). Therefore, in step 305, when the load drops, by using the predicted temperature to adjust the frequency, the frequency boost operation can be performed in time when the temperature of the processor core is about to drop to the limit temperature that needs to be boosted.
  • the processing performance of the processor core also helps to make the frequency of the processor core change in a more timely manner with the change of the load.
  • Step 306 the frequency controller determines the frequency corresponding to the temperature of the processor core at the first moment and the frequency corresponding to the temperature of the processor core at the second moment.
  • the frequency controller can determine the frequency corresponding to the current moment and the frequency corresponding to the future moment according to the PID control method.
  • the PID control method can first determine the frequency corresponding to the current moment The temperature and the temperature at the recent historical time determine the temperature change at the current time, and then substitute the temperature at the current time and the temperature change at the current time into the relationship corresponding to the PID control method to calculate the frequency corresponding to the current time.
  • the temperature change in the future time can be determined according to the predicted future temperature and the temperature at the current time predicted before, and then the future temperature and the temperature change in the future time can be substituted into the PID
  • the frequency corresponding to the future time is obtained by calculation.
  • step 204 For the specific implementation process of the PID control method, reference may be made to step 204, which will not be repeated here.
  • Step 307 the frequency controller determines whether the frequency corresponding to the temperature at the first moment is greater than the frequency corresponding to the temperature of the processor core at the second moment, if yes, execute step 304 , if not, execute step 305 .
  • the processor core when the load of the processor core changes little, the processor core is actually in a stable state. In this case, whether the frequency of the processor core is adjusted according to the current temperature of the processor core, or the If the future temperature of the processor core adjusts the frequency of the processor core, the temperature of the processor core after the frequency adjustment will not exceed the temperature control waterline range. Based on this, in this embodiment, by adjusting the frequency of the processor core to the higher frequency among the frequency corresponding to the future temperature and the frequency corresponding to the current temperature, it is possible to prevent the temperature of the processor core from exceeding the temperature control water line. In order to make the processor core run at a higher frequency, the processing capability of the processor core can be improved as much as possible, so as to achieve the purpose of making full use of the thermal margin.
  • the frequency control method in step 307 is described below with a specific example.
  • FIG. 5A exemplarily shows a load variation graph of the processor core within the period [0.4s, 0.58s]
  • FIG. 5B exemplarily shows a temperature variation graph of the processor core within the period [0.4s, 0.58s]
  • FIG. 5C exemplarily shows a frequency change graph of the processor core in a period of [0.4s, 0.58s].
  • the solid line in FIG. 5B is the temperature change line for frequency adjustment based on the temperature after 2ms
  • the dotted line in FIG. 5B is the temperature change line for frequency adjustment based on the current temperature
  • the solid line in FIG. 5C is based on the temperature change after 2ms.
  • the dotted line in FIG. 5C is the frequency change line for frequency adjustment based on the current temperature.
  • the load of the processor core does not change.
  • the temperature of the processor core can be kept within the temperature waterline of [98.8°C, 100°C], but when frequency adjustment is performed based on different temperatures, the frequency of the processor core is different:
  • the frequency adjustment based on the predicted temperature after 2ms can make the processor core run at a higher frequency than the frequency adjustment based on the temperature at the current moment. After the predicted temperature, the frequency of the processor core is adjusted;
  • the frequency adjustment based on the temperature at the current moment can make the processor core run at a higher frequency than the frequency adjustment based on the predicted temperature after 2ms.
  • the temperature at the moment adjusts the frequency of the processor core.
  • FIG. 6 is a schematic structural diagram of a frequency controller 600 provided by an embodiment of the present application.
  • the frequency controller 600 may be a chip or a circuit, such as a chip or a circuit that may be provided in a processor.
  • the frequency controller 600 may correspond to the frequency controller 104 in the above method.
  • the frequency controller 600 may implement the steps of any one or more of the corresponding methods shown in FIG. 2 and FIG. 3 above.
  • the frequency controller 600 may include a monitoring circuit 601 and a processing circuit 602 .
  • the frequency controller 600 may also include a bus system, and the monitoring circuit 601 and the processing circuit 602 may be connected through the bus system.
  • the monitoring circuit 601 can also be connected to the temperature sensor and/or the power consumption sensor of each processor core through the bus system
  • the processing circuit 602 can also be connected to the frequency regulator of each processor core through the bus system.
  • the monitoring circuit 601 may acquire at least two temperatures of each processor core through a temperature sensor and/or a power consumption sensor of each processor core and send them to the processing circuit 602 .
  • the processing circuit 602 may first determine the load change mode of the processor core through the power consumption sensor of each processor core, and then determine the target temperature from at least two temperatures of the processor core according to the load change mode, and then determine the target temperature according to the load change mode.
  • the target temperature regulates the frequency of this processor core.
  • each of the at least two temperatures may correspond to a frequency
  • the load variation mode of each processor core may be used to indicate the variation of the access load of the processor core.
  • FIG. 7 is a schematic structural diagram of another frequency controller 700 provided by an embodiment of the present application.
  • the frequency controller 700 may be a chip or a circuit, for example, a chip or a circuit that may be provided in a processor.
  • the frequency controller 700 may correspond to the frequency controller 104 in the above method.
  • the frequency controller 700 may implement the steps of any one or more of the corresponding methods shown in FIG. 2 and FIG. 3 above.
  • the frequency controller 700 may include an acquisition unit 701 , a determination unit 702 and an adjustment unit 703 .
  • the acquiring unit 701 may be a receiving unit or a receiver when receiving information, and the receiving unit or the receiver may be a radio frequency circuit.
  • the acquiring unit 701 may acquire at least two temperatures of each processor core, and the determining unit 702 may first determine the load variation pattern of the processor core, and then select the temperature from the at least two temperatures of the processor core according to the load variation pattern.
  • the adjustment unit 703 may adjust the frequency of the processor core according to the target temperature.
  • each of the at least two temperatures may correspond to a frequency
  • the load variation mode of each processor core may be used to indicate the variation of the access load of the processor core.
  • each unit in the above-mentioned frequency controller 700 may refer to the implementation of the corresponding method embodiments, which will not be repeated here.
  • the division of the units of the frequency controller 700 above is only a division of logical functions, and may be fully or partially integrated into a physical entity in actual implementation, or may be physically separated.
  • the obtaining unit 701 may be implemented by the monitoring circuit 601 in FIG. 6 above
  • the determining unit 702 and the adjusting unit 703 may be implemented by the control circuit 602 in FIG. 6 above.
  • the present application also provides a computer program product, the computer program product includes: computer program code, when the computer program code is run on a computer, the computer is made to execute the steps shown in FIG. 1 to FIG. 5 .
  • the present application further provides a computer-readable storage medium, where the computer-readable storage medium stores program codes, and when the program codes are run on a computer, the computer is made to execute FIG. 1 to FIG. 5 .
  • a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer.
  • an application running on a computing device and the computing device may be components.
  • One or more components may reside within a process and/or thread of execution, and a component may be localized on one computer and/or distributed between two or more computers.
  • these components can execute from various computer readable media having various data structures stored thereon.
  • a component may, for example, be based on a signal having one or more data packets (eg, data from two components interacting with another component between a local system, a distributed system, and/or a network, such as the Internet interacting with other systems via signals) Communicate through local and/or remote processes.
  • data packets eg, data from two components interacting with another component between a local system, a distributed system, and/or a network, such as the Internet interacting with other systems via signals
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, which may be electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium.
  • the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program codes .

Abstract

本申请公开了一种频率控制方法及装置，用以提高调节处理器核心的频率的灵活性。其中方法包括：先确定处理器核心的负载变化模式，再根据负载变化模式从处理器核心的至少两个温度中确定出目标温度，最后根据目标温度调节处理器核心的频率。通过使用处理器核心的至少两个温度对处理器核心的频率进行实时控制，能使得调频后的处理器核心的温度始终处于合适的温度范围内，避免处理器核心长时间处于高压高频的状态。且，该种方式还从处理器核心的至少两个温度中选择适合当前负载变化模式的目标温度进行频率调节，如此，调节后的处理器核心的频率能更符合处理器核心的当前负载变化特性，有助于提高对处理器核心的频率进行调节的及时性。

Description

一种频率控制方法及装置 技术领域
本申请涉及处理器技术领域，尤其涉及一种频率控制方法及装置。
背景技术
当电子设备在出厂时，电子设备中的元件(例如处理器核心)通常定义有一些标准的工作范围，例如额定工作频率、额定工作电压等，正常情况下处理器核心都是按照额定工作频率执行处理操作。然而，当处理器核心具有超频功能时，处理器核心若确定额定工作频率不满足当前的工作场景的需求，则可以将处理器核心的频率提高至额定工作频率之上，以提高处理器核心的处理性能。
现有方案中，当用户使能电子设备的超频功能时，电子设备有机会运行在预设的超频频率。然而，这种情况下，处理器核心可能会长时间处于高压高频的状态，导致处理器核心的温度过高。
发明内容
本申请提供一种频率控制方法及装置，用以解决在超频时处理器核心会长时间处于高压高频状态的技术问题。
第一方面，本申请提供一种频率控制方法，该方法应用于频率控制器，该方法包括：频率控制器获取处理器核心的至少两个温度，并确定处理器核心的负载变化模式，根据负载变化模式从至少两个温度中确定出目标温度，并根据目标温度调节处理器核心的频率。其中，至少两个温度中的每个温度对应一个频率，负载变化模式用于指示处理器核心的接入负载的变化情况。
在上述设计中，频率控制器通过根据处理器核心的至少两个温度对处理器核心的频率进行实时控制，能使调频后的处理器核心的温度始终处于合适的温度范围内，从而有助于避免处理器核心长时间处于高压高频的状态。更进一步的，该种方式还从处理器核心的至少两个温度中选择适合当前负载变化模式的目标温度进行频率调节，如此，调节后的处理器核心的频率能够更符合处理器核心的当前负载变化特性，有助于提高对处理器核心的频率进行调节的及时性。
在一种可能的设计中，频率控制器获取处理器核心的至少两个温度，包括：频率控制器先获取处理器核心在第一时刻的温度，再根据处理器核心在第一时刻的温度，预测处理器核心在第二时刻的温度。其中，第二时刻位于第一时刻之后。通过该设计，如果第一时刻的温度为当前温度，则频率控制器能够从当前温度和未来温度中选择出目标温度，由于当前温度受到历史负载的影响，而未来温度受到当前负载的影响，因此这种方式确定出的处理器核心的频率能够更加匹配历史负载和当前负载中对处理器核心影响更大的负载的特性。
在一种可能的设计中，目标温度可以满足如下任一种情况：
情况一，处理器核心的负载变化模式为负载不变模式，则频率控制器可以将第一时刻的温度对应的频率和第二时刻的温度对应的频率中取值最高的频率所对应的温度作为目 标温度。如此，当负载变化较小时，处理器核心实际上处于稳定状态，在这种情况下，不论是按照处理器核心的当前温度调节处理器核心的频率，还是按照处理器核心的未来温度调节处理器核心的频率，都不会使调节频率后的处理器核心的温度超出温控水线的范围。基于此，在该设计中，通过将处理器核心的频率调节为未来温度对应的频率和当前温度对应的频率中的较高频率，能够在处理器核心的温度不超过温控水线的情况下，使处理器核心运行在更高的频率，以尽可能提高处理器核心的处理能力，达到充分利用热裕量的目的。
情况二，处理器核心的负载变化模式为负载上升模式，则频率控制器可以将第一时刻的温度作为目标温度。如此，在当前负载处于上升状态时，虽然未来负载对应为更高的温度，但是当前温度实际上还并未达到未来温度，因此实际上还没有必要执行降频操作。这种情况下，通过使用当前温度对应的频率调节处理器核心的频率，能够充分利用处理器核心的热裕量，有助于在处理器核心的温度可控的情况下尽量提高处理器核心的处理性能。
情况三，处理器核心的负载变化模式为负载下降模式，则频率控制器可以将第二时刻的温度作为目标温度。如此，在当前负载处于下降状态时，虽然当前负载对应为较高的温度，但是未来负载对应为较低的温度。这种情况下，通过使用未来温度提前对处理器核心进行提频操作，有助于尽快提高处理器核心的处理性能。
在一种可能的设计中，频率控制器可以通过如下任一方式确定处理器核心的负载变化模式：
方式一，频率控制器先根据处理器核心在第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围，如果处理器核心在第一时刻的负载处于第一负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，如果处理器核心在第一时刻的负载大于第一负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，如果处理器核心在第一时刻的负载小于第一负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。通过使用历史负载和当前负载确定历史时段内的负载变化模式，有助于使确定出的负载变化模式体现当前时刻之后的负载变化情况，负载变化模式的实时性较好。
方式二，频率控制器先根据处理器核心在第一时刻的负载和预设的负载变化量，确定第二负载变化范围，再根据处理器核心在第一时刻的负载和处理器核心在第一时刻之前的历史时刻的负载，预测处理器核心在第二时刻的负载，如果处理器核心在第二时刻的负载处于第二负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，如果处理器核心在第二时刻的负载大于第二负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，如果处理器核心在第二时刻的负载小于第二负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。通过使用当前负载和未来负载确定未来时段内的负载变化模式，有助于使确定出的负载变化模式体现未来时刻的负载变化情况，负载变化模式具有超前性，更能体现未来时刻的温度。
在一种可能的设计中，频率控制器根据处理器核心在第一时刻的温度，预测处理器核心在第二时刻的温度，包括：频率控制器根据处理器核心在第一时刻的温度和处理器核心在第一时刻的功耗，预测处理器核心在第二时刻的温度。通过该设计，频率控制器能够综合考虑当前温度和当前功耗这两个因素来预测未来温度，由于当前功耗能够体现出处理器核心的负载情况，因此这种方式确定出的未来温度能够更符合处理器核心在当前的负载特性。
在另一种可能的设计中，频率控制器根据处理器核心在第一时刻的温度，预测处理器核心在第二时刻的温度，包括：频率控制器根据处理器核心在第一时刻的温度和处理器核心在第一时刻之前的历史时刻的温度，预测处理器核心在第二时刻的温度。通过该设计，频率控制器能够根据当前温度和历史温度来预测未来温度，由于温度的变化都是连续的，因此这种方式确定出的未来温度能够更符合真实的温度变化特性。
第二方面，本申请提供一种频率控制器，该频率控制器可以包括：
监测电路，用于获取处理器核心的至少两个温度并发送给处理电路，至少两个温度中的每个温度对应一个频率；
处理电路，用于确定处理器核心的负载变化模式，根据负载变化模式从至少两个温度中确定出目标温度，根据目标温度调节处理器核心的频率；其中，负载变化模式用于指示处理器核心的接入负载的变化情况。
在一种可能的设计中，监测电路可以先获取处理器核心在第一时刻的温度，再根据处理器核心在第一时刻的温度，预测处理器核心在第二时刻的温度。其中，第二时刻位于第一时刻之后。
在一种可能的设计中，处理电路在确定处理器核心的负载变化模式后，若处理器核心的负载变化模式为负载不变模式，则可以将第一时刻的温度对应的频率和第二时刻的温度对应的频率中取值最高的频率所对应的温度作为目标温度，若处理器核心的负载变化模式为负载上升模式，则可以将第一时刻的温度作为目标温度，若处理器核心的负载变化模式为负载下降模式，则将第二时刻的温度作为目标温度。
在一种可能的设计中，处理电路可以通过如下任一方式确定处理器核心的负载变化模式：
方式一，处理电路先根据处理器核心在第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围，若处理器核心在第一时刻的负载处于第一负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，若处理器核心在第一时刻的负载大于第一负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，若处理器核心在第一时刻的负载小于第一负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。
方式二，处理电路先根据处理器核心在第一时刻的负载和预设的负载变化量，确定第二负载变化范围，并根据处理器核心在第一时刻的负载和处理器核心在第一时刻之前的历史时刻的负载，预测处理器核心在第二时刻的负载。若处理器核心在第二时刻的负载处于第二负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，若处理器核心在第二时刻的负载大于第二负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，若处理器核心在第二时刻的负载小于第二负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。
在一种可能的设计中，监测电路可以通过如下任一方式预测处理器核心在第二时刻的温度：
方式一，监测电路根据处理器核心在第一时刻的温度和处理器核心在第一时刻的功耗，预测处理器核心在第二时刻的温度。
方式二，监测电路根据处理器核心在第一时刻的温度和处理器核心在第一时刻之前的历史时刻的温度，预测处理器核心在第二时刻的温度。
第三方面，本申请实施例提供一种频率控制器，该频率控制器可以包括：
获取单元，用于获取处理器核心的至少两个温度，至少两个温度中的每个温度对应一个频率；
确定单元，用于确定处理器核心的负载变化模式，根据负载变化模式从至少两个温度中确定出目标温度；其中，负载变化模式用于指示处理器核心的接入负载的变化情况；
调节单元，用于根据目标温度调节处理器核心的频率。
在一种可能的设计中，获取单元具体用于：先获取处理器核心在第一时刻的温度，再根据处理器核心在第一时刻的温度，预测处理器核心在第二时刻的温度。其中，第二时刻位于第一时刻之后。
在一种可能的设计中，确定单元具体用于：当处理器核心的负载变化模式为负载不变模式，则将第一时刻的温度对应的频率和第二时刻的温度对应的频率中取值最高的频率所对应的温度作为目标温度，当处理器核心的负载变化模式为负载上升模式，则将第一时刻的温度作为目标温度，当处理器核心的负载变化模式为负载下降模式，则将第二时刻的温度作为目标温度。
在一种可能的设计中，确定单元可以通过如下任一方式确定处理器核心的负载变化模式：
方式一：确定单元根据处理器核心在第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围，如果处理器核心在第一时刻的负载处于第一负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，若处理器核心在第一时刻的负载大于第一负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，若处理器核心在第一时刻的负载小于第一负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。
方式二，确定单元先根据处理器核心在第一时刻的负载和预设的负载变化量，确定第二负载变化范围，再根据处理器核心在第一时刻的负载和处理器核心在第一时刻之前的历史时刻的负载，预测处理器核心在第二时刻的负载。如果处理器核心在第二时刻的负载处于第二负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，如果处理器核心在第二时刻的负载大于第二负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，如果处理器核心在第二时刻的负载小于第二负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。
在一种可能的设计中，获取单元可以通过如下任一方式预测处理器核心在第二时刻的温度：
方式一，获取单元根据处理器核心在第一时刻的温度和处理器核心在第一时刻的功耗，预测处理器核心在第二时刻的温度。
方式二，获取单元根据处理器核心在第一时刻的温度和处理器核心在第一时刻之前的历史时刻的温度，预测处理器核心在第二时刻的温度。
第四方面，本申请提供一种处理器，该处理器可以包括处理器核心、温度感应器、频率调节器和频率控制器，温度感应器和频率调节器分别与频率控制器连接。其中：
与处理器核心连接的温度感应器，用于获取处理器核心的至少一个第一温度并发送给频率控制器；
频率控制器，用于根据处理器核心的至少一个第一温度确定处理器核心的至少一个第 二温度，至少一个第一温度和至少一个第二温度中的每个温度对应一个频率；以及，确定处理器核心的负载变化模式，根据处理器核心的负载变化模式，从至少一个第一温度和至少一个第二温度中确定目标温度，并将目标温度对应的频率发送给频率调节器；其中，负载变化模式用于指示处理器核心的接入负载的变化情况；
与处理器核心连接的频率调节器，用于将处理器核心的频率调节为目标温度对应的频率。
在一种可能的设计中，温度感应器可以获取处理器核心在第一时刻的第一温度并发送给频率控制器，进而由频率控制器根据处理器核心在第一时刻的第一温度，预测处理器核心在第二时刻的第二温度。其中，第二时刻位于第一时刻之后。
在一种可能的设计中，频率控制器可以通过如下方式确定目标温度：若处理器核心的负载变化模式为负载不变模式，则将第一时刻的第一温度对应的频率和第二时刻的第二温度对应的频率中取值最高的频率所对应的温度作为目标温度。若处理器核心的负载变化模式为负载上升模式，则将第一时刻的第一温度作为目标温度。若处理器核心的负载变化模式为负载下降模式，则将第二时刻的第二温度作为目标温度。
在一种可能的设计中，频率控制器可以通过如下任一方式确定处理器核心的负载变化模式：
方式一，频率控制器根据处理器核心在第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围，若处理器核心在第一时刻的负载处于第一负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，若处理器核心在第一时刻的负载大于第一负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，若处理器核心在第一时刻的负载小于第一负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。
方式一，频率控制器根据处理器核心在第一时刻的负载和预设的负载变化量，确定第二负载变化范围，根据处理器核心在第一时刻的负载和处理器核心在第一时刻之前的历史时刻的负载，预测处理器核心在第二时刻的负载，若处理器核心在第二时刻的负载处于第二负载变化范围内，则确定处理器核心的负载变化模式为负载不变模式，若处理器核心在第二时刻的负载大于第二负载变化范围中的最大负载，则确定处理器核心的负载变化模式为负载上升模式，若处理器核心在第二时刻的负载小于第二负载变化范围中的最小负载，则确定处理器核心的负载变化模式为负载下降模式。
在一种可能的设计中，处理器还可以包括功耗感应器，功耗感应器与处理器核心连接。这种情况下，功耗感应器可以获取处理器核心在第一时刻之前的历史时刻的功耗和处理器核心在第一时刻的功耗，并将历史时刻的功耗和第一时刻的功耗发送给频率控制器，温度感应器还可以获取处理器核心在第一时刻之前的历史时刻的温度并发送给频率控制器，如此，频率控制器可以根据处理器核心在历史时刻的功耗和历史时刻的温度，确定处理器核心在历史时刻的负载，并根据处理器核心在第一时刻的功耗和第一时刻的第一温度，确定处理器核心在第一时刻的负载。
在一种可能的设计中，频率控制器可以通过如下任一方式预测处理器核心在第二时刻的第二温度：
方式一，频率控制器根据处理器核心在第一时刻的第一温度和处理器核心在第一时刻的功耗，预测处理器核心在第二时刻的第二温度。
方式二，频率控制器根据处理器核心在第一时刻的第一温度和处理器核心在第一时刻之前的历史时刻的温度，预测处理器核心在第二时刻的第二温度。
第五方面，本申请提供一种电子设备，该电子设备包括如上述第四方面任意所述的处理器。
本申请的上述方面或其它方面将在以下的实施例中进行具体介绍。
附图说明
图1示例性示出本申请实施例提供的一种处理器的结构示意图；
图2示例性示出本申请实施例提供的一种频率控制方法对应的流程示意图；
图3示例性示出本申请实施例提供的一种频率控制方法的具体流程示意图；
图4A示例性示出一种处理器核心的负载变化曲线图；
图4B示例性示出一种处理器核心的温度变化曲线图；
图4C示例性示出一种处理器核心的频率变化曲线图；
图5A示例性示出另一种处理器核心的负载变化曲线图；
图5B示例性示出另一种处理器核心的温度变化曲线图；
图5C示例性示出另一种处理器核心的频率变化曲线图；
图6示例性示出本申请实施例提供的一种频率控制器的结构示意图；
图7示例性示出本申请实施例提供的另一种频率控制器的结构示意图。
具体实施方式
本申请所公开的各个实施例可以应用于具有超频功能的电子设备中。在本申请一些实施例中，电子设备可以是具有处理器(诸如中央处理器(central processing unit，CPU))的计算机设备，例如台式计算机。还应当理解的是，在本申请其他一些实施例中，电子设备也可以是具有处理器的便携式电子设备，诸如手机、平板电脑、具备无线通讯功能的可穿戴设备(如智能手表)、车载设备等。便携式电子设备的示例性实施例包括但不限于搭载
Figure PCTCN2020110602-appb-000001
或者其它操作系统的便携式电子设备。
当电子设备具备超频功能时，如果电子设备中处理器核心的功耗裕量满足超频启动条件，则电子设备可以将处理器核心的频率提升至高于厂方所规定的频率运作，以调高处理器核心的处理性能。然而，随着处理器核心的频率的提升，处理器核心的功耗也会相应增大，而增大的功耗又以热能的形式表现出来，使得处理器核心的温度升高，当电子设备的散热能力无法及时对处理器核心进行降温时，过高的温度则会影响处理器核心的寿命和可靠性。
为了降低超频调节对处理器核心的寿命和可靠性的影响，在一种可能地实施方式中，电子设备中预先设置有温控水线，当处理器核心的当前温度位于温控水线内，则电子设备不调节处理器核心的频率，当处理器核心的当前温度低于温控水线时，则电子设备调高处理器核心的频率来增大处理器的处理性能，当处理器核心的当前温度高于温控水线时，则电子设备降低处理器核心的频率来降低处理器核心的温度。其中，温控水线可以根据处理器核心的额定温度进行设置，例如当额定温度为99℃(摄氏度)时，温控水线可以设置为98℃～100℃。
虽然上述实施方式能够根据处理器核心的当前温度对处理器核心的频率进行调节，但是处理器核心的当前温度实际上取决于处理器核心的负载，当处理器核心的负载越大，则处理器核心的做工越多，导致处理器核心的温度越高，当处理器核心的负载越小，则处理器核心的做工越少，导致处理器核心的温度越低。这种情况下，由于处理器核心的负载和处理器核心的温度之间具有因果关联，处理器核心的温度实际上是滞后于处理器核心的负载的一种表现形式，例如处理器核心的当前温度可能是由于处理器核心在上一时刻的负载而导致，而处理器核心的当前负载实际上还会使处理器核心的温度继续上升或下降。由于这种滞后性，仅根据处理器核心的当前温度调节处理器核心的频率，可能会使得频率调节的及时性不好。
有鉴于此，本申请提供一种频率控制方法，用以根据处理器核心的至少两个温度和负载对处理器核心的频率进行实时控制，一方面，这种方式能使调频后处理器核心的温度处于合适的温度范围内，避免处理器核心长时间处于高压高频的状态。另一方面，这种方式还能从处理器核心的至少两个温度中选择适合当前负载变化模式的目标温度进行频率调节，如此，使用目标温度进行调节后的处理器核心的频率能够更符合处理器核心的当前负载变化特性，因此该种方式还有助于提高对处理器核心的频率进行调节的及时性。
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。
本申请实施例中的术语“系统”和“网络”可被互换使用。“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指的这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a,b,或c中的至少一项(个)，可以表示：a,b,c,a-b,a-c,b-c,或a-b-c，其中a,b,c可以是单个，也可以是多个。
以及，除非有特别说明，本申请实施例提及“第一”、“第二”等序数词是用于对多个对象进行区分，不用于限定多个对象的优先级或者重要程度。例如，第一时刻、第二时刻，只是为了区分不同的时刻，而并不是表示这两个时刻的优先级或者重要程度等的不同。
图1示例性示出本申请实施例提供的一种处理器100的结构示意图。如图1所示，处理器100可以包括至少一个处理器核心，例如处理器核心10、处理器核心11、处理器核心12和处理器核心13。处理器100中还可以包括非核心部件，例如通用单元(包括计数器、译码器和信号发生器等)、加速器单元、输入/输出控制单元、接口单元、内部存储器和外部缓存器等。其中，各个处理器核心和非核心部件之间可以通过通信总线(图1中未进行示意)进行连接，以实现数据的传输操作。
应理解，上述处理器100可以是一个芯片。例如，该处理器100可以是现场可编程门阵列(field programmable gate array，FPGA)，可以是专用集成芯片(application specific integrated circuit，ASIC)，还可以是系统芯片(system on chip，SoC)，还可以是中央处理器(central processor unit，CPU)，还可以是网络处理器(network processor，NP)，还可以是数字信号处理电路(digital signal processor，DSP)，还可以是微控制器(micro controller unit，MCU)，还可以是可编程控制器(programmable logic device，PLD)或其他集成芯片。应注意，本申请实施例中的处理器100还可以是一种集成电路芯片，具有信号的处理能力。 例如，上述的处理器100可以是通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
可以理解，本申请实施例中的存储器(例如内部存储器和外部缓存器)可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(dynamic RAM，DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DR RAM)。应注意，本文描述的方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
本申请实施例中，继续参照图1所示，处理器中还可以包括频率控制器14，每个处理器核心中还可以设置有频率调节器，频率控制器14可以与每个处理器核心中的频率调节器通信连接。如此，在控制每个处理器核心的超频调节时，频率控制器14可以向该处理器核心的频率调节器发送频率控制指令，以使该处理器核心的频率调节器根据频率控制指令调节该处理器核心的频率，例如调节为大于厂商设置的最大频率。
需要说明的是，图1只是一种示例性地说明，在其它可能的示例中，也可以只在一个或几个处理器核心中设置频率调节器，如此，频率控制器14可以仅对设置有频率调节器的处理器核心的频率进行控制。或者，还可以在非核心部件中设置频率调节器，如此，频率控制器14不仅可以对处理器核心的频率进行控制，也可以对非核心部件的频率进行控制。当然，此处所述的非核心部件是指按照设定的频率工作的部件。
下面以控制一个处理器核心的频率为例介绍本申请中的频率控制方法，针对于控制其它处理器核心或非处理器核心的频率则不再进行赘述。
基于图1所示意的处理器，图2示例性示出本申请实施例提供的一种频率控制方法对应的流程示意图，该方法适用于频率控制器，例如图1所示意的频率控制器14。本申请实施例中，频率控制器可以按照周期方式执行频率控制方法，图2示例性介绍频率控制器的一次频率控制过程，如图2所示，该方法包括：
步骤201，频率控制器获取处理器核心的至少两个温度。
本申请实施例中，处理器核心的至少两个温度可以包括处理器核心的当前温度，还可以包括处理器核心的各个未来时刻的温度和各个历史时刻的温度中的至少一项。其中，每个温度可以对应一个频率，不同温度对应的频率可以不同。关于如何计算温度对应的频率，具体将在步骤204中进行说明，此处先不作介绍。
步骤202，频率控制器确定处理器核心的负载变化模式。
本申请实施例中，处理器核心的负载变化模式用于指示处理器核心的接入负载的变化情况。示例来说，若处理器核心的当前接入负载相比于历史接入负载明显上升，则处理器 核心的负载变化模式为负载上升模式，若处理器核心的当前接入负载相比于历史接入负载明显下降，则处理器核心的负载变化模式为负载下降模式，若处理器核心的当前接入负载和历史接入负载相差不大，则处理器核心的负载变化模式为负载不变模式。至于判断“明显上升”、“明显下降”和“相差不大”所使用的数据值，可以由本领域技术人员根据经验进行设置，也可以根据实际需要进行设置，具体不作限定。
步骤203，频率控制器根据负载变化模式从至少两个温度中确定出目标温度。
本申请实施例中，目标温度可以是指多个温度中与负载变化模式最匹配的温度。示例来说，在多个温度包括当前温度和未来温度的情况下，若负载变化模式处于负载上升模式，则由于当前温度并没有达到未来温度，因此实际上没有必要提前进行降频操作，这种情况下可以将当前温度作为目标温度。而在多个温度包括当前温度和历史温度的情况下，若负载变化模式处于负载下降模式，则由于当前温度小于历史温度，因此为了提高处理器核心的处理性能，也可以将当前温度作为目标温度。从至少两个温度中确定目标温度的具体策略有多种，具体使用哪种策略则可以由本领域技术人员根据经验进行设置，此处不作过多介绍。
步骤204，频率控制器将处理器核心的频率调节为目标温度对应的频率。
本申请实施例中，频率控制器可以通过多种方式确定每个温度对应的频率，例如比例积分微分(proportion integral derivative，PID)控制法、实验测量法等。其中，PID控制法在逻辑上对应为一个数学表达式，该数学表达式的因变量为频率，自变量为温度和温度变化量，数学表达式中的各个参数可以包括比例参数、积分参数和微分参数，这些参数是在期望温度的基础上预先根据多次实验归纳得到的。在确定某一温度对应的频率时，频率控制器直接将该温度和该温度相比于历史温度的变化量代入上述数学表达式，即可计算得到该温度对应的频率。在PID控制法中，当温度与期望温度的偏差值为正值时，该温度会对应更低的频率，如此，频率控制器能够在温度大于期望温度的情况下降低处理器核心的频率，以减少处理器核心的产热，尽量使处理器核心的温度向期望温度靠拢。当温度与期望温度的偏差值为负值时，该温度会对应更高的频率，如此，频率控制器能够在温度小于期望温度的情况下增大处理器核心的频率，以在处理器核心的温度不大于期望温度的情况下，尽量提高处理器核心的处理性能。在实验测量法中，频率控制器可以预先根据多次实验归纳出温度和频率的对应关系(例如对应关系表或对应关系图)，如此，频率控制器直接查询该对应关系即可得到温度对应的频率。
本申请实施例中，频率控制器可以先根据目标温度对应的频率生成频率控制指令，再将频率控制指令发送给处理器核心的频率调节器，以使该频率调节器将处理器核心的频率调节为目标温度对应的频率。其中，当调高处理器核心的频率时，频率调节器需要同步调高处理器核心的工作电压，以使处理器核心的工作电压能够支持高频工作，这种情况下处理器核心可以处于高压高频状态。在调低处理器核心的频率时，频率调节器可以同步调低处理器核心的工作电压，这种情况下处理器核心从高压低频状态变为低压低频状态，从而处理器核心的电能利用率也能得到提高。至于具体将处理器核心调整为多大的工作电压，则可以由频率调节器参照预设的频率和工作电压的对应关系进行确定，这个预设的对应关系可以由本领域技术人员预先封装在频率调节器的内部，每个处理器核心对应的该预设的对应关系可以相同，也可以不同。
本申请实施例中，当多个处理器核心位于同一个独立电源域，则该独立电源域的工作 电压为频率最高的处理器核心所对应的工作电压，这种情况下，其它处理器核心可能处于高压低频状态，导致其它处理器核心的电能利用率不高。为了解决这个问题，在一种可选地实施方式中，每个处理器核心可以位于一个独立电源阈，如此，每个处理器核心的工作电压都能与各自的频率相对应，有助于提高每个处理器核心的电能利用率。
在本申请的上述实施例中，通过频率控制器使用处理器核心的至少两个温度和负载对处理器核心的频率进行实时控制，能使调频后的处理器核心的温度始终处于合适的温度范围内，避免处理器核心长时间处于高压高频的状态。更进一步的，通过频率控制器从处理器核心的至少两个温度中选择适合当前负载变化模式的目标温度进行频率调节，使得调节后的处理器核心的频率能够更符合处理器核心的当前负载变化特性，这种方式不仅考虑到处理器核心的各个温度，还考虑到处理器核心的接入负载，从而有助于提高对处理器核心的频率进行调节的及时性。
下面以一个具体的实施例介绍本申请实施例中的频率控制方法。
图3示例性示出本申请实施例提供的一种频率控制方法的具体流程示意图，如图3所示，该方法适用于频率控制器，例如图1所示意的频率控制器14。图3示例性介绍频率控制器的一次频率控制过程，如图3所示，该方法包括：
步骤301，频率控制器获取处理器核心在第一时刻的温度。
本申请实施例中，频率控制器可以通过多种方式获取处理器核心在第一时刻的温度，下面示例性介绍两种可选地实施方式。
在一种可选地实施方式中，如图1所示，每个处理器核心中还可以设置有温度感应器，例如温度传感器，温度感应器与频率控制器之间通过通信线路连接。温度感应器可以按照第一设定周期采样处理器核心的温度，并通过温度感应器和频率控制器之间的通信线路将采样的温度发送给频率控制器。其中，第一设定周期可以由本领域技术人员根据经验进行设置，例如为了提高采样的温度的准确性，可以设置第一设定周期为100um，如此，温度感应器每隔100um就可以采样一次处理器核心的温度并发送给频率控制器。在这种情况下，处理器核心在第一时刻的温度可以为：
温度感应器在第一时刻采样的温度；或者，
温度感应器在距离第一时刻之前的最近一次采样时刻采样的温度；或者，
温度感应器在第一时刻和/或第一时刻之前的多个采样时刻采样的温度的平均值；或者，
温度感应器在第一时刻和/或第一时刻之前的多个采样时刻采样的温度的加权平均值。
针对于“多个采样时刻采样的温度的加权平均值”进行示例说明：当频率控制器按照第二设定周期执行本申请实施例中的频率控制方法时，若第二设定周期为1ms，第一设定周期为100um，则频率控制器在每个第二设定周期内都可以接收到温度感应器发送的10个采样温度，这种情况下，频率控制器可以根据预先设置的10个采样温度的权重计算这10个采样温度的加权平均值，并将该加权平均值作为第一时刻的温度。其中，这10个采样温度的权重之和为1，且这10个采样温度的权重按照采样时间的先后顺序依次递增。
采用该种实施方式，频率控制器可以通过测量方式直接获取第一时刻的温度，这种方式虽然要在处理器核心中设置温度感应器，但是测量得到的温度较为准确，有助于提高频率调节的准确性。
在另一种可选地实施方式中，如图1所示，每个处理器核心中还可以设置有功耗感应器，功耗感应器与频率控制器之间也通过通信线路连接。功耗感应器可以按照第三设定周 期采样处理器核心中每个信号的翻转次数，然后根据每个信号的翻转次数和该信号翻转一次所对应的功耗，确定每个信号在一个第三设定周期内的功耗，根据各个信号在一个第三设定周期内的功耗计算得到处理器核心在一个第三设定周期内的总功耗，进而通过功耗感应器和频率控制器之前的通信线路将该总功耗发送给频率控制器。这种情况下，频率控制器可以根据预设的功耗与温度的对应关系，确定出该总功耗对应的温度，将该温度作为处理器核心在第一时刻的温度。采用该种实施方式，频率控制器可以通过间接计算方式获取第一时刻的温度，虽然间接计算方式在准确性上没有测量方式来的准确，但是这种方式可以不用在处理器核心中安装温度感应器，有助于节省处理器核心的占用空间和设计成本。可以理解的，“通过功耗感应器间接获取第一时刻的温度”只是一种可选地实施方式，在其它可选地实施方式中，频率控制器也可以通过其它间接方式获取第一时刻的温度，例如通过第一时刻之前的各个历史时刻的温度预测第一时刻的温度等，此处不作过多介绍。
步骤302，频率调节器根据处理器核心在第一时刻的温度，预测处理器核心在第二时刻的温度。其中，第二时刻可以是位于第一时刻之后的任意一个时刻，例如1ms后的时刻。
本申请实施例中，频率控制器可以通过多种方式预测处理器核心在第二时刻的温度，下面示例性介绍两种可选地实施方式。
在一种可选地实施方式中，当处理器核心中设置有温度感应器，则频率控制器可以先根据处理器核心在第一时刻的温度和处理器核心在第一时刻之前的至少一个历史时刻的温度，拟合得到温度预测模型，再使用温度预测模型预测得到处理器核心在第二时刻的温度。其中，在拟合温度预测模型时，初始模型可以选择线性模型、二次多项式模型、三次多项式模型或B样条模型中的任意一项模型，通过将第一时刻、第一时刻的温度、位于第一时刻之前的每个历史时刻和每个历史时刻的温度代入初始模型，能够计算得到未知的模型参数，将未知的模型参数代入初始模型，即可得到温度预测模型。
在另一种可选地实施方式中，当处理器核心中设置有功耗感应器，则频率控制器可以先根据功耗感应器发送的处理器核心中各个部件的翻转频率和翻转次数确定处理器核心在第一时刻的功耗，再根据处理器核心在第一时刻的功耗和处理器核心在第一时刻的温度，按照如下公式(1.1)计算得到处理器核心在第二时刻的温度：
T 2＝AT 1+BP 1………….(1.1)
其中，T 2为处理器核心在第二时刻的温度，T 1为处理器核心在第一时刻的温度，P 1为处理器核心在第一时刻的功耗。公式(1.1)中的系数A和系数B为常数值，系数A和系数B的取值可以根据实验进行测算，当实验次数越多，则系数A和系数B的取值越准确。
在该种实施方式中，处理器核心在预测未来温度时综合考虑到了当前温度和当前功耗这两个因素，由于当前功耗能够体现出处理器核心的负载情况，因此相比于只使用温度预测未来温度的方案来说，这种方式确定出的未来温度能够更符合处理器核心在当前的负载特性。
本申请实施例中，“在每个处理器核心中设置温度感应器或功耗感应器”仅是一种可选地实施方式，在其它可选地实施方式中，也可以在两个或两个以上的处理器核心中设置共享的温度感应器或共享的功耗感应器。这种情况下，由于温度感应器采样的温度值可能是两个或两个以上的处理器核心中的某一点的温度值，因此频率控制器后续还可以按照某种策略补偿温度感应器采样的温度，以得到每个处理器核心的温度。或者，由于功耗感应 器采样的功耗值是两个或两个以上的处理器核心的总功耗，因此频率控制器后续还可以按照某种比例分配功耗感应器采样的功耗，以得到每个处理器核心的功耗。关于具体使用何种策略或比例，可以由本领域技术人员根据经验进行设置，此处不再介绍。
步骤303，频率控制器根据处理器核心在第一时刻的负载，确定处理器核心在第一时刻对应的负载变化模式：
若第一时刻对应的负载变化模式为负载上升模式，则执行步骤304；
若第一时刻对应的负载变化模式为负载下降模式，则执行步骤305；
若第一时刻对应的负载变化模式为负载不变模式，则执行步骤306。
在一种可选地实施方式中，处理器核心在任一时刻的负载可以根据处理器核心在该时刻的功耗、频率和电压来确定。以确定第i时刻的负载为例，处理器核心中还可以设置有电压采样器，电压采样器可以采样处理器核心在任一时刻的电压，这种情况下，频率控制器可以通过电压采集器获取处理器核心在第i时刻的电压，通过功耗感应器获取处理器核心在第i时刻的功耗，通过频率调节器获取处理器核心在第i时刻的频率，然后按照如下公式(1.2)计算得到处理器核心在第i时刻的负载：
A i＝P i/(f i*V i 2)………(1.2)
其中，A i为处理器核心在第i时刻的负载，P i为处理器核心在第i时刻的功耗，f i为处理器核心在第i时刻的频率，V i为处理器核心在第i时刻的电压。
本申请实施例中，频率控制器可以通过多种方式确定处理器核心在第一时刻对应的负载变化模式，下面示例性介绍两种可选地实施方式。
在一种可选地实施方式中，频率控制器可以根据处理器在第一时刻的负载和处理器在第一时刻之前的历史时刻的负载确定处理器在第一时刻对应的负载变化模式。具体来说，频率控制器可以先根据如上公式(1.2)分别计算得到处理器核心在第一时刻的负载A 1(A 1＝P 1/(f 1*V 1 2))和处理器核心在位于第一时刻之前的历史时刻的负载A 0(A 0＝P 0/(f 0*V 0 2))，再根据预设的负载变化率(假设为x，x为大于0且不大于1的实数)和处理器核心在历史时刻的负载A 0，确定出第一负载变化范围[(1-x)*A 0，(1+x)*A 0]。在这种情况下：
若处理器核心在第一时刻的负载处于第一负载变化范围内(即(1-x)*A 0≤A 1≤(1+x)*A 0)，则处理器核心在第一时刻的负载与处理器核心在历史时刻的负载的差距并不大，因此可以确定处理器核心在第一时刻对应的负载变化模式为负载不变模式；或者，
若处理器核心在第一时刻的负载小于第一负载变化范围中的最小负载(即A 1≥(1-x)*A 0)，则处理器核心在第一时刻的负载明显小于处理器核心在历史时刻的负载，因此可以确定处理器核心在第一时刻对应的负载变化模式为负载下降模式；
若处理器核心在第一时刻的负载大于第一负载变化范围中的最大负载(即A 1≤(1+x)*A 0)，则处理器核心在第一时刻的负载明显大于处理器核心在历史时刻的负载，因此可以确定处理器核心在第一时刻对应的负载变化模式为负载上升模式。
示例性地，为了使第一负载变化范围能够准确体现出处理器核心在第一时刻的负载和历史时刻的负载的差异情况，负载变化率可以设置为稍大于0的实数，例如0.1。
在另一种可选地实施方式中，频率控制器也可以根据处理器在第一时刻的负载和处理器在第一时刻之后的未来时刻(例如第二时刻)的预测负载确定处理器在第一时刻对应的负载变化模式。具体来说，频率控制器可以先根据如上公式(1.2)分别计算得到处理器核心在第一时刻的负载A 1(A 1＝P 1/(f 1*V 1 2))和处理器核心在位于第一时刻之前的历史时刻的 负载A 0，再使用第一时刻的负载A 1和历史时刻的负载A 0拟合负载预测模型，根据拟合得到的负载预测模型预测处理器核心在未来时刻的负载(假设为A 3)，进而根据预设的负载变化率x和处理器核心在第一时刻的负载A 1，确定出第二负载变化范围[(1-x)*A 1，(1+x)*A 1]。在这种情况下：
若处理器核心在未来时刻的负载处于第二负载变化范围内(即(1-x)*A 1≤A 3≤(1+x)*A 1)，则处理器核心在未来时刻的负载与处理器核心在第一时刻的负载的差距并不大，因此可以确定处理器核心在第一时刻对应的负载变化模式为负载不变模式；或者，
若处理器核心在未来时刻的负载小于第二负载变化范围中的最小负载(即A 3≥(1-x)*A 1)，则处理器核心在未来时刻的负载明显小于处理器核心在第一时刻的负载，因此可以确定处理器核心在第一时刻对应的负载变化模式为负载下降模式；
若处理器核心在未来时刻的负载大于第二负载变化范围中的最大负载(即A 3≤(1+x)*A 1)，则处理器核心在未来时刻的负载明显大于处理器核心在第一时刻的负载，因此可以确定处理器核心在第一时刻对应的负载变化模式为负载上升模式。
步骤304，频率控制器向处理器核心的频率调节器发送第一频率控制指令，第一频率控制指令用于处理器核心的频率调节器将处理器核心的频率调节为第一时刻的温度对应的频率。
为了便于理解，在下文的描述中，我们将第一时刻称为当前时刻，将第二时刻称为未来时刻。即：下文中出现的“当前时刻”均可以替换为“第一时刻”，下文中出现的“未来时刻”均可以替换为“第二时刻”。
在上述步骤304中，在当前时刻的负载处于上升状态时，虽然未来时刻的负载对应为更高的温度(例如到达需要降频的极限温度)，但是当前时刻的温度实际上还并未达到未来时刻的温度，因此实际上还没有必要执行降频操作。这种情况下，通过使用当前时刻的温度对应的频率调节处理器核心的频率，能够充分利用处理器核心的热裕量，有助于在处理器核心的温度可控的情况下尽量提高处理器核心的处理性能。
步骤305，频率控制器向处理器核心的频率调节器发送第二频率控制指令，第二频率控制指令用于处理器核心的频率调节器将处理器核心的频率调节为第二时刻的温度对应的频率。
在上述步骤305中，在当前时刻的负载处于下降状态时，虽然当前时刻的负载对应为较高的温度，但是未来时刻的负载对应为较低的温度(例如到达需要提频的极限温度)。这种情况下，通过使用未来时刻的温度提前对处理器核心进行提频操作，有助于尽快提高处理器核心的处理性能。
下面以一个具体的示例介绍步骤304和步骤305中的频率控制方法。
图4A示例性示出处理器核心在时段[0.35s，0.38s]内的负载变化曲线图，图4B示例性示出处理器核心在时段[0.35s，0.38s]内的温度变化曲线图，图4C示例性示出处理器核心在时段[0.35s，0.38s]内的频率变化曲线图。其中，图4B中的实线为基于2ms后的温度进行频率调节的温度变化线，图4B中的虚线为基于当前温度进行频率调节的温度变化线，图4C中的实线为基于2ms后的温度进行频率调节的频率变化线，图4C中的虚线为基于当前温度进行频率调节的频率变化线。在该示例中，假设温度水线为[98.8℃，100℃]，其中，处理器核心的温度和频率存在对应关系，当处理器核心的温度低于98.8℃时，说明处理器核心的当前温度较低，处理器核心中还存在部分热裕量，这种情况下，可以对处理器 核心进行提频，以充分利用热裕量，提高处理器核心的处理性能，因此，98.8℃可以称为处理器核心需要提频的极限温度。当处理器核心的温度高于100℃时，说明处理器核心的频率过高，导致处理器核心长期处于高压高频状态，这种情况下需要对处理器核心进行降频，以提高处理器核心的寿命和可用性，因此，100℃可以称为处理器核心需要降频的极限温度。参照图4A至图4C可知：
在0.35s～0.355s左右时处理器核心的负载上升，这种情况下，如果基于2ms后的预测温度进行频率调节，则频率控制器会由于预测到处理器核心的温度随着负载上升而上升至需要降频的极限温度100℃，导致频率控制器控制处理器核心率先进行降频(参照图4C中A点处的实线示意)。然而，此时处理器核心的温度实际上并未真正达到需要降频的极限温度100℃，基于2ms后的预测温度进行频率调节属于一种过调节。因此，在步骤304中，在负载上升时，通过使用当前温度进行频率调节，能够在处理器核心还没有达到需要降频的极限温度时尽量延缓处理器核心的降频操作(参照图4C中A点处的虚线示意)，在充分利用热裕量的情况下尽量提高处理器核心的处理性能。
在0.37s～0.375s左右时处理器核心的负载开始下降，这种情况下，如果基于2ms后的预测温度进行频率调节，则频率控制器会由于预测到处理器核心的温度随着负载下降而下降至需要提频的极限温度98.8℃，导致频率控制器控制处理器核心率先进行提频(参照图4C中B点处的实线示意)。因此，在步骤305中，在负载下降时，通过使用预测温度进行频率调节，能够在处理器核心的温度快要降至需要提频的极限温度时及时进行提频操作，这种方式不仅能够提高处理器核心的处理性能，还有助于使处理器核心的频率能够更加及时地跟随负载的变化而变化。
步骤306，频率控制器确定处理器核心在第一时刻的温度对应的频率和处理器核心在第二时刻的温度对应的频率。
在一种可选地实施方式中，频率控制器可以根据PID控制法确定当前时刻对应的频率和未来时刻对应的频率，在使用PID控制法确定当前时刻对应的频率时，可以先根据当前时刻的温度和最近的历史时刻的温度确定当前时刻的温度变化量，再将当前时刻的温度、当前时刻的温度变化量代入PID控制法对应的关系式中，计算得到当前时刻对应的频率。在使用PID控制法确定未来时刻对应的频率时，可以先根据预测的未来温度和之前预测得到的当前时刻的温度确定未来时刻的温度变化量，再将未来温度、未来时刻的温度变化量代入PID控制法对应的关系式中，计算得到未来时刻对应的频率。
PID控制法的具体实现过程可以参照步骤204，此处不再赘述。
步骤307，频率控制器判断第一时刻的温度对应的频率是否大于处理器核心在第二时刻的温度对应的频率，若是，则执行步骤304，若否，则执行步骤305。
本申请实施例中，当处理器核心的负载变化较小时，处理器核心实际上处于稳定状态，在这种情况下，不论是按照处理器核心的当前温度调节处理器核心的频率，还是按照处理器核心的未来温度调节处理器核心的频率，都不会使调节频率后的处理器核心的温度超出温控水线的范围。基于此，在该实施方式中，通过将处理器核心的频率调节为未来温度对应的频率和当前温度对应的频率中的较高频率，能够在处理器核心的温度不超过温控水线的情况下，使处理器核心运行在更高的频率，以尽可能提高处理器核心的处理能力，达到充分利用热裕量的目的。
下面以一个具体的示例介绍步骤307中的频率控制方法。
图5A示例性示出处理器核心在时段[0.4s，0.58s]内的负载变化曲线图，图5B示例性示出处理器核心在时段[0.4s，0.58s]内的温度变化曲线图，图5C示例性示出处理器核心在时段[0.4s，0.58s]内的频率变化曲线图。其中，图5B中的实线为基于2ms后的温度进行频率调节的温度变化线，图5B中的虚线为基于当前温度进行频率调节的温度变化线，图5C中的实线为基于2ms后的温度进行频率调节的频率变化线，图5C中的虚线为基于当前温度进行频率调节的频率变化线。在该示例中，假设温度水线为[98.8℃，100℃]，其中98.8℃为处理器核心需要提频的极限温度，100℃为处理器核心需要降频的极限温度，则参照图5A至图5C可知：
在0.4s～0.5s时段和0.5s～0.58s时段内，处理器核心的负载不变，这种情况下，虽然基于2ms后的预测温度进行频率调节和基于当前时刻的温度进行频率调节，都可以使处理器核心的温度处于[98.8℃，100℃]的温度水线内，但是基于不同的温度进行频率调节时，处理器核心的频率不同：
在0.4s～0.5s时段内，基于2ms后的预测温度进行频率调节比基于当前时刻的温度进行频率调节可以使处理器核心运行在更高的频率，因此0.4s～0.5s时段内可以按照2ms后的预测温度对处理器核心进行频率调节；
在0.5s～0.58s时段内，基于当前时刻的温度进行频率调节比基于2ms后的预测温度进行频率调节可以使处理器核心运行在更高的频率，因此0.5s～0.58s时段内可以按照当前时刻的温度对处理器核心进行频率调节。
根据前述方法，图6为本申请实施例提供的频率控制器600的结构示意图，该频率控制器600可以为芯片或电路，比如可设置于处理器中的芯片或电路。该频率控制器600可以对应上述方法中的频率控制器104。该频率控制器600可以实现如上图2和图3中所示的任一项或任多项对应的方法的步骤。如图6所示，该频率控制器600可以包括监测电路601和处理电路602。进一步的，该频率控制器600还可以包括总线系统，监测电路601和处理电路602可以通过总线系统连接。且，监测电路601还可以通过总线系统与每个处理器核心的温度感应器和/或功耗感应器连接，处理电路602还可以通过总线系统与每个处理器核心的频率调节器连接。
本申请实施例中，监测电路601可以通过每个处理器核心的温度感应器和/或功耗感应器，获取每个处理器核心的至少两个温度并发送给处理电路602。对应的，处理电路602可以先通过每个处理器核心的功耗感应器确定处理器核心的负载变化模式，再根据负载变化模式从该处理器核心的至少两个温度中确定出目标温度，根据目标温度调节该处理器核心的频率。其中，至少两个温度中的每个温度可以对应一个频率，每个处理器核心的负载变化模式可以用于指示该处理器核心的接入负载的变化情况。
该频率控制器600所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不做赘述。
根据前述方法，图7为本申请实施例提供的又一种频率控制器700的结构示意图，该频率控制器700可以为芯片或电路，比如可设置于处理器中的芯片或电路。该频率控制器700可以对应上述方法中的频率控制器104。该频率控制器700可以实现如上图2和图3中所示的任一项或任多项对应的方法的步骤。如图7所示，该频率控制器700可以包括获取单元701、确定单元702和调节单元703。
本申请实施例中，获取单元701在接收信息时可以为接收单元或接收器，此接收单元 或接收器可以为射频电路。具体实施中，获取单元701可以获取每个处理器核心的至少两个温度，确定单元702可以先确定处理器核心的负载变化模式，再根据负载变化模式从该处理器核心的至少两个温度中确定出目标温度，调节单元703可以根据目标温度调节该处理器核心的频率。其中，至少两个温度中的每个温度可以对应一个频率，每个处理器核心的负载变化模式可以用于指示该处理器核心的接入负载的变化情况。
该频率控制器700所涉及的与本申请实施例提供的技术方案相关的概念，解释和详细说明及其他步骤请参见前述方法或其他实施例中关于这些内容的描述，此处不做赘述。
可以理解的是，上述频率控制器700中各个单元的功能可以参考相应方法实施例的实现，此处不再赘述。
应理解，以上频率控制器700的单元的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。本申请实施例中，获取单元701可以由上述图6的监测电路601实现，确定单元702和调节单元703可以由上述图6的控制电路602实现。
根据本申请实施例提供的方法，本申请还提供一种计算机程序产品，该计算机程序产品包括：计算机程序代码，当该计算机程序代码在计算机上运行时，使得该计算机执行图1至图5所示实施例中任意一个实施例的方法。
根据本申请实施例提供的方法，本申请还提供一种计算机可读存储介质，该计算机可读介质存储有程序代码，当该程序代码在计算机上运行时，使得该计算机执行图1至图5所示实施例中任意一个实施例的方法。
在本说明书中使用的术语“部件”、“模块”、“系统”等用于表示计算机相关的实体、硬件、固件、硬件和软件的组合、软件、或执行中的软件。例如，部件可以是但不限于，在处理器上运行的进程、处理器、对象、可执行文件、执行线程、程序和/或计算机。通过图示，在计算设备上运行的应用和计算设备都可以是部件。一个或多个部件可驻留在进程和/或执行线程中，部件可位于一个计算机上和/或分布在两个或更多个计算机之间。此外，这些部件可从在上面存储有各种数据结构的各种计算机可读介质执行。部件可例如根据具有一个或多个数据分组(例如来自与本地系统、分布式系统和/或网络间的另一部件交互的二个部件的数据，例如通过信号与其它系统交互的互联网)的信号通过本地和/或远程进程来通信。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各种说明性逻辑块(illustrative logical block)和步骤(step)，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间 接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机存取存储器(random access memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (26)

  1. 一种频率控制方法，其特征在于，所述方法包括：
    获取处理器核心的至少两个温度，所述至少两个温度中的每个温度对应一个频率；
    确定所述处理器核心的负载变化模式；所述负载变化模式用于指示所述处理器核心的接入负载的变化情况；
    根据所述负载变化模式从所述至少两个温度中确定出目标温度；
    根据所述目标温度调节所述处理器核心的频率。
  2. 如权利要求1所述的方法，其特征在于，所述获取处理器核心的至少两个温度，包括：
    获取所述处理器核心在第一时刻的温度；
    根据所述处理器核心在所述第一时刻的温度，预测所述处理器核心在第二时刻的温度；所述第二时刻位于所述第一时刻之后。
  3. 如权利要求2所述的方法，其特征在于，所述根据所述负载变化模式从所述至少两个温度中确定出目标温度，包括：
    当所述处理器核心的负载变化模式为负载不变模式，则将所述第一时刻的温度对应的频率和所述第二时刻的温度对应的频率中取值最高的频率所对应的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载上升模式，则将所述第一时刻的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载下降模式，则将所述第二时刻的温度作为所述目标温度。
  4. 如权利要求3所述的方法，其特征在于，所述处理器核心的负载变化模式通过如下方式得到：
    根据所述处理器核心在所述第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围；
    当所述处理器核心在所述第一时刻的负载处于所述第一负载变化范围内，则所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第一时刻的负载大于所述第一负载变化范围中的最大负载，则所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第一时刻的负载小于所述第一负载变化范围中的最小负载，则所述处理器核心的负载变化模式为所述负载下降模式。
  5. 如权利要求3所述的方法，其特征在于，所述处理器核心的负载变化模式通过如下方式得到：
    根据所述处理器核心在所述第一时刻的负载和预设的负载变化量，确定第二负载变化范围；
    根据所述处理器核心在所述第一时刻的负载和所述处理器核心在所述第一时刻之前的历史时刻的负载，预测所述处理器核心在第二时刻的负载；
    当所述处理器核心在所述第二时刻的负载处于所述第二负载变化范围内，则所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第二时刻的负载大于所述第二负载变化范围中的最大负载，则所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第二时刻的负载小于所述第二负载变化范围中的最小负载，则所述处理器核心的负载变化模式为所述负载下降模式。
  6. 如权利要求2至5中任一项所述的方法，其特征在于，所述根据所述处理器核心在所述第一时刻的温度，预测所述处理器核心在第二时刻的温度，包括：
    根据所述处理器核心在所述第一时刻的温度和所述处理器核心在所述第一时刻的功耗，预测所述处理器核心在所述第二时刻的温度；或者，
    根据所述处理器核心在所述第一时刻的温度和所述处理器核心在所述第一时刻之前的历史时刻的温度，预测所述处理器核心在所述第二时刻的温度。
  7. 一种频率控制器，其特征在于，包括监测电路和处理电路；
    所述监测电路，用于获取处理器核心的至少两个温度并发送给所述处理电路，所述至少两个温度中的每个温度对应一个频率；
    所述处理电路，用于确定所述处理器核心的负载变化模式，根据所述负载变化模式从所述至少两个温度中确定出目标温度，根据所述目标温度调节所述处理器核心的频率；其中，所述负载变化模式用于指示所述处理器核心的接入负载的变化情况。
  8. 如权利要求7所述的频率控制器，其特征在于，所述监测电路具体用于：
    获取所述处理器核心在第一时刻的温度；
    根据所述处理器核心在所述第一时刻的温度，预测所述处理器核心在第二时刻的温度；所述第二时刻位于所述第一时刻之后。
  9. 如权利要求8所述的频率控制器，其特征在于，所述处理电路具体用于：
    当所述处理器核心的负载变化模式为负载不变模式，则将所述第一时刻的温度对应的频率和所述第二时刻的温度对应的频率中取值最高的频率所对应的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载上升模式，则将所述第一时刻的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载下降模式，则将所述第二时刻的温度作为所述目标温度。
  10. 如权利要求9所述的频率控制器，其特征在于，所述处理电路具体用于：
    根据所述处理器核心在所述第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围；
    当所述处理器核心在所述第一时刻的负载处于所述第一负载变化范围内，则所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第一时刻的负载大于所述第一负载变化范围中的最大负载，则所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第一时刻的负载小于所述第一负载变化范围中的最小负载，则所述处理器核心的负载变化模式为所述负载下降模式。
  11. 如权利要求9所述的频率控制器，其特征在于，所述处理电路具体用于：
    根据所述处理器核心在所述第一时刻的负载和预设的负载变化量，确定第二负载变化范围；
    根据所述处理器核心在所述第一时刻的负载和所述处理器核心在所述第一时刻之前的历史时刻的负载，预测所述处理器核心在第二时刻的负载；
    当所述处理器核心在所述第二时刻的负载处于所述第二负载变化范围内，则所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第二时刻的负载大于所述第二负载变化范围中的最大负载，则所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第二时刻的负载小于所述第二负载变化范围中的最小负载，则所述处理器核心的负载变化模式为所述负载下降模式。
  12. 如权利要求8至11中任一项所述的频率控制器，其特征在于，所述监测电路具体用于：
    根据所述处理器核心在所述第一时刻的温度和所述处理器核心在所述第一时刻的功耗，预测所述处理器核心在所述第二时刻的温度；或者，
    根据所述处理器核心在所述第一时刻的温度和所述处理器核心在所述第一时刻之前的历史时刻的温度，预测所述处理器核心在所述第二时刻的温度。
  13. 一种频率控制器，其特征在于，包括：
    获取单元，用于获取处理器核心的至少两个温度，所述至少两个温度中的每个温度对应一个频率；
    确定单元，用于确定所述处理器核心的负载变化模式，根据所述负载变化模式从所述至少两个温度中确定出目标温度；其中，所述负载变化模式用于指示所述处理器核心的接入负载的变化情况；
    调节单元，用于根据所述目标温度调节所述处理器核心的频率。
  14. 如权利要求13所述的频率控制器，其特征在于，所述获取单元具体用于：
    获取所述处理器核心在第一时刻的温度；
    根据所述处理器核心在所述第一时刻的温度，预测所述处理器核心在第二时刻的温度；所述第二时刻位于所述第一时刻之后。
  15. 如权利要求14所述的频率控制器，其特征在于，所述确定单元具体用于：
    当所述处理器核心的负载变化模式为负载不变模式，则将所述第一时刻的温度对应的频率和所述第二时刻的温度对应的频率中取值最高的频率所对应的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载上升模式，则将所述第一时刻的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载下降模式，则将所述第二时刻的温度作为所述目标温度。
  16. 如权利要求15所述的频率控制器，其特征在于，所述确定单元具体用于：
    根据所述处理器核心在所述第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围；
    当所述处理器核心在所述第一时刻的负载处于所述第一负载变化范围内，则所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第一时刻的负载大于所述第一负载变化范围中的最大负载，则所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第一时刻的负载小于所述第一负载变化范围中的最小负载，则所述处理器核心的负载变化模式为所述负载下降模式。
  17. 如权利要求15所述的频率控制器，其特征在于，所述确定单元具体用于：
    根据所述处理器核心在所述第一时刻的负载和预设的负载变化量，确定第二负载变化范围；
    根据所述处理器核心在所述第一时刻的负载和所述处理器核心在所述第一时刻之前的历史时刻的负载，预测所述处理器核心在第二时刻的负载；
    当所述处理器核心在所述第二时刻的负载处于所述第二负载变化范围内，则所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第二时刻的负载大于所述第二负载变化范围中的最大负载，则所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第二时刻的负载小于所述第二负载变化范围中的最小负载，则所述处理器核心的负载变化模式为所述负载下降模式。
  18. 如权利要求14至17中任一项所述的频率控制器，其特征在于，所述获取单元具体用于：
    根据所述处理器核心在所述第一时刻的温度和所述处理器核心在所述第一时刻的功耗，预测所述处理器核心在所述第二时刻的温度；或者，
    根据所述处理器核心在所述第一时刻的温度和所述处理器核心在所述第一时刻之前的历史时刻的温度，预测所述处理器核心在所述第二时刻的温度。
  19. 一种处理器，其特征在于，包括处理器核心、温度感应器、频率调节器和频率控制器；所述温度感应器和所述频率调节器分别与所述频率控制器连接；
    与所述处理器核心连接的所述温度感应器，用于获取所述处理器核心的至少一个第一温度并发送给所述频率控制器；
    所述频率控制器，用于根据所述处理器核心的所述至少一个第一温度确定所述处理器核心的至少一个第二温度，所述至少一个第一温度和所述至少一个第二温度中的每个温度对应一个频率；以及，确定所述处理器核心的负载变化模式，根据所述处理器核心的负载变化模式，从所述至少一个第一温度和所述至少一个第二温度中确定目标温度，并将所述目标温度对应的频率发送给所述频率调节器；其中，所述负载变化模式用于指示所述处理器核心的接入负载的变化情况；
    与所述处理器核心连接的所述频率调节器，用于将所述处理器核心的频率调节为所述目标温度对应的频率。
  20. 如权利要求19所述的处理器，其特征在于，所述温度感应器具体用于：
    获取所述处理器核心在第一时刻的第一温度并发送给所述频率控制器；
    所述频率控制器具体用于：根据所述处理器核心在所述第一时刻的第一温度，预测所述处理器核心在第二时刻的第二温度；所述第二时刻位于所述第一时刻之后。
  21. 如权利要求20所述的处理器，其特征在于，所述频率控制器具体用于：
    当所述处理器核心的负载变化模式为负载不变模式，则将所述第一时刻的第一温度对应的频率和所述第二时刻的第二温度对应的频率中取值最高的频率所对应的温度作为所述目标温度；
    当所述处理器核心的负载变化模式为负载上升模式，则将所述第一时刻的第一温度作 为所述目标温度；
    当所述处理器核心的负载变化模式为负载下降模式，则将所述第二时刻的第二温度作为所述目标温度。
  22. 如权利要求21所述的处理器，其特征在于，所述频率控制器还用于：
    根据所述处理器核心在所述第一时刻之前的历史时刻的负载和预设的负载变化量，确定第一负载变化范围；
    当所述处理器核心在所述第一时刻的负载处于所述第一负载变化范围内，则确定所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第一时刻的负载大于所述第一负载变化范围中的最大负载，则确定所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第一时刻的负载小于所述第一负载变化范围中的最小负载，则确定所述处理器核心的负载变化模式为所述负载下降模式。
  23. 如权利要求21所述的处理器，其特征在于，所述频率控制器还用于：
    根据所述处理器核心在所述第一时刻的负载和预设的负载变化量，确定第二负载变化范围；
    根据所述处理器核心在所述第一时刻的负载和所述处理器核心在所述第一时刻之前的历史时刻的负载，预测所述处理器核心在第二时刻的负载；
    当所述处理器核心在所述第二时刻的负载处于所述第二负载变化范围内，则确定所述处理器核心的负载变化模式为所述负载不变模式；
    当所述处理器核心在所述第二时刻的负载大于所述第二负载变化范围中的最大负载，则确定所述处理器核心的负载变化模式为所述负载上升模式；
    当所述处理器核心在所述第二时刻的负载小于所述第二负载变化范围中的最小负载，则确定所述处理器核心的负载变化模式为所述负载下降模式。
  24. 如权利要求22或23所述的处理器，其特征在于，所述处理器还包括功耗感应器，所述功耗感应器与所述处理器核心连接；
    所述功耗感应器，用于获取所述处理器核心在所述第一时刻之前的历史时刻的功耗和所述处理器核心在所述第一时刻的功耗，并将所述历史时刻的功耗和所述第一时刻的功耗发送给所述频率控制器；
    所述温度感应器，还用于获取所述处理器核心在所述第一时刻之前的历史时刻的温度并发送给所述频率控制器；
    所述频率控制器还用于：根据所述处理器核心在所述历史时刻的功耗和所述历史时刻的温度，确定所述处理器核心在所述历史时刻的负载，根据所述处理器核心在所述第一时刻的功耗和所述第一时刻的第一温度，确定所述处理器核心在所述第一时刻的负载。
  25. 如权利要求20至24中任一项所述的处理器，其特征在于，所述频率控制器具体用于：
    根据所述处理器核心在所述第一时刻的第一温度和所述处理器核心在所述第一时刻的功耗，预测所述处理器核心在所述第二时刻的第二温度；或者，
    根据所述处理器核心在所述第一时刻的第一温度和所述处理器核心在所述第一时刻之前的历史时刻的温度，预测所述处理器核心在所述第二时刻的第二温度。
  26. 一种电子设备，其特征在于，包括如权利要求19至25中任一项所述的处理器。
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