WO2022022724A1 - Procédé et dispositif d'envoi de blocs de bits - Google Patents

Procédé et dispositif d'envoi de blocs de bits Download PDF

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Publication number
WO2022022724A1
WO2022022724A1 PCT/CN2021/109907 CN2021109907W WO2022022724A1 WO 2022022724 A1 WO2022022724 A1 WO 2022022724A1 CN 2021109907 W CN2021109907 W CN 2021109907W WO 2022022724 A1 WO2022022724 A1 WO 2022022724A1
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WO
WIPO (PCT)
Prior art keywords
bit block
message
packet
block
present application
Prior art date
Application number
PCT/CN2021/109907
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English (en)
Chinese (zh)
Inventor
孙德胜
杨春生
丁力
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华为技术有限公司
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Publication of WO2022022724A1 publication Critical patent/WO2022022724A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/39—Credit based
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/625—Queue scheduling characterised by scheduling criteria for service slots or service orders
    • H04L47/6275—Queue scheduling characterised by scheduling criteria for service slots or service orders based on priority
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a method and apparatus for sending a bit block.
  • communication devices In order to ensure that data packets can be received accurately and without errors, communication devices generally adopt a flow control mechanism. If the flow control mechanism is adopted, it can be ensured that the sender will not send packets that the receiver cannot receive.
  • Fig. 1a shows a schematic flowchart of credit-based flow control.
  • the receiver can send a credit update message to the sender, and the credit update message includes the number of credits.
  • the sender After the sender receives the credit update message, it can send the message to the receiver according to the number of credits included in the credit update message.
  • Figure 1b shows a schematic flow chart of priority-based flow control.
  • the receiver can send priority-based flow control to the sender according to the buffer conditions of the eight queues. PFC) message. After receiving the PFC message, the sender can stop or delay sending messages to the corresponding queue according to the PFC message.
  • PFC Packet Control
  • the typical length of the message may be 256 bytes, and even the length of the message may be longer, wherein the message includes a credit update message or a PFC message.
  • problems such as packet blocking may occur, so that the sender cannot receive the credit update packet or PFC packet from the receiver in time.
  • the present application provides a method and device for sending a bit block, which can ensure that a communication device feeds back flow control information in a timely manner and avoids problems such as packet blocking.
  • an embodiment of the present application provides a method for sending a bit block.
  • the method can be applied to a communication device.
  • the method includes: generating at least one first bit block, where the at least one first bit block includes an indication field, the The indication field is used to carry flow control information, and the flow control information is obtained according to the buffer situation of the communication device; the at least one first bit block is sent.
  • the communication device feeds back the flow control information to the opposite end in the form of the first bit block, so that the at least one first bit block is more likely to be sent in time, and the feedback manner is more flexible. Since the possibility of at least one first bit block being sent out in time is increased, the delay for the peer to obtain the first bit block is reduced, the delay of the service flow completion time (FCT) is reduced, and the network utilization.
  • the length of the at least one first bit block is less than or equal to the length of the message as much as possible.
  • the length of the at least one first bit block may be 64 bits, 128 bits, 256 bits, etc. It is possible to reduce the transmission delay of the first bit block, so as to avoid that the transmission time of the at least one first bit block is too long and other packets are blocked.
  • the first bit block is a non-message bit block.
  • the first bit block is a non-message bit block
  • the non-message bit block includes a non-message start bit block.
  • the value carried by the preset field in the non-message start bit block is different from the value carried by the preset field in the message start bit block.
  • the non-message start bit block and the message start bit block can be distinguished; or, when at least one first bit block includes at least one 0-bit block, the value carried by the preset field of the 0-bit block is used, the O-bit blocks can also be distinguished from other O-bit blocks.
  • the at least one first bit block can also be inserted into the bit stream of the first message currently being sent by the communication device. It is avoided that the at least one first bit block waits for the first packet to be sent before it can be sent, thereby reducing the waiting delay of the at least one first bit block, reducing the delay of the FCT, and improving the network utilization rate.
  • the first bit block is a packet bit block.
  • the first bit block is a message bit block.
  • the communication apparatus may feed back flow control information in the first packet.
  • the message bit block is the message start bit block, the data bit block corresponding to the message start bit block, the end bit block corresponding to the message start bit block, the message end bit block, At least one of the start bit block corresponding to the message end bit block or the data bit block corresponding to the message end bit block.
  • the message start bit block and the non-message start bit block be distinguished by the preset field
  • the message end bit block corresponding to the message start bit block can be distinguished from the non-message start bit block by the preset field.
  • the non-message end bit block corresponding to the message start bit block can also be distinguished by a preset field.
  • the method further includes: sending a first packet, where the first packet is composed of packet bit blocks.
  • the first packet may include a packet start bit block and a data bit block corresponding to the packet start bit block; or, the first packet may include a packet start bit block, the packet The data bit block corresponding to the message start bit block and the end bit block corresponding to the message start bit block.
  • sending the at least one first bit block includes: sending the at least one first bit block after sending the message start bit block of the first message and the first message has not been sent. piece.
  • the opposite end can obtain the information fed back by the communication apparatus according to the at least one first bit block.
  • the first bit block is inserted into the first message and sent out, which further reduces the waiting delay of the at least one first bit block, reduces the delay of the FCT, and improves the network utilization rate.
  • At least one first bit block includes a non-packet start bit block, and a preset field in the non-packet start bit block carries the first value.
  • a preset field in the packet start bit block carries the third value.
  • At least one first bit block includes at least one sequence ordered set (O) bit block, and a preset field in each O-bit block in the at least one O-bit block carries the second numerical value.
  • O sequence ordered set
  • the communication apparatus may feed back the flow control information through at least one 0-bit block.
  • the at least one 0-bit block may also be inserted into the bit stream of the second packet being sent by the communication apparatus.
  • the at least one 0-bit block may include one 0-bit block, two 0-bit blocks, or three 0-bit blocks, etc., which is not limited in this embodiment of the present application.
  • the at least one first bit block further includes: at least one data bit block corresponding to a non-packet start bit block; or an end bit block corresponding to a non-packet start bit block; or a non-packet start bit block At least one data bit block corresponding to the start bit block and an end bit block corresponding to the non-message start bit block.
  • the data bit block corresponding to the non-message start bit block may also be referred to as a non-message data bit block
  • the end bit block corresponding to the non-message start bit block may also be referred to as a non-message end bit block.
  • sending the at least one first bit block includes: sequentially sending the non-packet start bits block and non-message end bit block; or send non-message end bit block and non-message start bit block in sequence.
  • the non-packet bit block may further include at least one of a non-packet end bit block, a data bit block corresponding to the non-packet end bit block, or a start bit block corresponding to the non-packet end bit block One.
  • the data bit block corresponding to the non-message end bit block may also be called a non-message data bit block
  • the start bit block corresponding to the non-message end bit block may also be called a non-message start bit block
  • the flow control information includes information on the number of credits or the duration information for which at least one queue is stopped from sending packets.
  • At least one of the first bit blocks further includes a cyclic redundancy check (cyclic redundancy check, CRC) field.
  • CRC cyclic redundancy check
  • the CRC field may be used to carry CRC information, and the CRC information may be used to protect flow control information and the like in the at least one first bit block.
  • the first bit block is a P1B/P2B bit block
  • P1 represents the number of payload bits of the first bit block
  • P2 represents the total number of bits of the first bit block
  • P2-P1 represents the number of bits of the first bit block. The number of sync header bits for the first bit block.
  • the value of P1 is any one of the following: 64, 128, 256, or 512; the value of P2-P1 is any one of the following: 1, 2, or 3.
  • the method provided in the first aspect of the present application may be applied to a communication device, and the communication device may include a receiving end.
  • an embodiment of the present application provides a method for receiving a bit block.
  • the method includes: receiving at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information , the flow control information is obtained according to the buffering situation of the receiving end; and the sending situation of the second packet is adjusted according to the flow control information.
  • the communication device may also obtain a block type field of at least one first bit block, and adjust the sending situation of the second message according to the type field, the value carried by the preset field, and the indication field .
  • the block type field of at least one first bit block is 0x4B, and the preset field carries 0x06, it means that the obtained at least one first bit block is an 0-bit block, and the function of the 0-bit block is to be used for If the flow control information is fed back, the communication device can adjust the sending situation of the second packet according to the indication field in the 0-bit block.
  • the block type field of at least one first bit block is 0x78, and the preset field carries 0xF5
  • the communication device can adjust the sending situation of the second message according to the indication field in the non-message start bit block.
  • At least one first bit block further includes a CRC field, where the CRC field is used to carry CRC information.
  • adjusting the sending situation of the second packet according to the flow control information includes: adjusting the data volume of the second packet according to the number of credits; or, according to the duration information of at least one queue being stopped from sending the packets Adjust the corresponding queue to stop sending the second packet.
  • adjusting the sending situation of the second packet according to the flow control information includes: adjusting the second packet according to the flow control information when the CRC information in the at least one first bit block is successfully checked. the sending of the text.
  • the method provided in the second aspect of the present application can be applied to a communication device, and the communication device may include a transmitter.
  • the present application provides a communication apparatus for performing the method in the first aspect or any possible implementation manner of the first aspect.
  • the communication apparatus includes corresponding means for performing the method of the first aspect or any possible implementation of the first aspect.
  • the communication device may include a transceiving unit and a processing unit. It can be understood that, for the specific implementation of the transceiver unit and the processing unit, reference may be made to the following specific embodiments, which will not be described in detail here.
  • the present application provides a communication apparatus for performing the method in the second aspect or any possible implementation manner of the second aspect.
  • the communication device includes corresponding means for performing the method of the second aspect or any possible implementation of the second aspect.
  • the communication device may include a transceiving unit and a processing unit. It can be understood that, for the specific implementation of the transceiver unit and the processing unit, reference may be made to the following specific embodiments, which will not be described in detail here.
  • the present application provides a communication device, where the communication device includes a processor, and the processor can be configured to execute the method shown in the first aspect or any possible implementation manner of the first aspect.
  • the process of sending a message, receiving a message, or sending at least one first bit block (hereinafter collectively referred to as information) in the above method can be understood as the information output by the processor process, and the process by which the processor receives input information.
  • the processor In outputting information, the processor outputs the information to the transceiver for transmission by the transceiver. After the information is output by the processor, additional processing may be required before reaching the transceiver.
  • the processor receives incoming information
  • the transceiver receives that information and feeds it into the processor. Further, after the transceiver receives the information, the information may require additional processing before being input to the processor.
  • sending at least one first bit block may be understood as the processor outputting the at least one first bit block.
  • sending the first packet may be understood as the processor outputting the first packet and so on.
  • the above-mentioned processor may be a processor specially used to execute these methods, or may be a processor that executes computer instructions in a memory to execute these methods, such as a general-purpose processor.
  • the processor may also be configured to execute a program stored in the memory, which, when executed, causes the communication apparatus to perform the method shown in the first aspect or any possible implementation of the first aspect.
  • the memory is located outside the above-mentioned communication device.
  • the memory is located within the above-mentioned communication device.
  • the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together.
  • the communication device further includes a transceiver, where the transceiver is configured to receive a message or send a message, and the like.
  • the processor may be configured to generate at least one first bit block; the transceiver may be configured to send at least one first bit block; or, to send a first packet; or, to receive a second messages, etc.
  • the present application provides a communication device, where the communication device includes a processor, and the processor can be configured to execute the method shown in the second aspect or any possible implementation manner of the second aspect.
  • receiving the at least one first bit block may be understood as the processor receiving the input at least one first bit block.
  • sending the second packet may be understood as the processor outputting the second packet and so on.
  • the above-mentioned processor may be a processor specially used to execute these methods, or may be a processor that executes computer instructions in a memory to execute these methods, such as a general-purpose processor.
  • the processor may also be configured to execute a program stored in the memory which, when executed, causes the communication apparatus to perform the method as shown in the second aspect or any possible implementation of the second aspect above.
  • the memory is located outside the above-mentioned communication device.
  • the memory is located within the above-mentioned communication device.
  • the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together.
  • the communication device further includes a transceiver, where the transceiver is configured to receive a message or send a message.
  • the processor may be configured to adjust the sending situation of the second packet according to the flow control information included in the at least one first bit block; or, the processor may also be configured to The CRC information in the one-bit block is checked, etc.
  • the transceiver may be configured to receive at least one first bit block; or, receive a first message; or, send a second message, and so on.
  • the present application provides a communication device, the communication device includes a logic circuit and an interface, the logic circuit is configured to generate at least one first bit block, and the interface is configured to output the at least one first bit block.
  • the interface may also be used to output the first packet and/or input the second packet.
  • the present application provides a communication device, the communication device includes a logic circuit and an interface, the interface is used to input at least one first bit block, and the logic circuit can be used to adjust the sending of the first packet according to the flow control information condition.
  • the logic circuit may also be used to check the CRC information in the at least one first bit block.
  • the interface may also be used to input the first packet and/or output the second packet.
  • the present application provides a computer-readable storage medium, the computer-readable storage medium is used to store a computer program, which, when it runs on a computer, enables the first aspect or any possible implementation of the first aspect The method shown is executed.
  • the present application provides a computer-readable storage medium, the computer-readable storage medium is used to store a computer program, which enables the second aspect or any possible implementation manner of the second aspect when it runs on a computer. The method shown is executed.
  • the present application provides a computer program product, the computer program product comprising a computer program or computer code, which, when run on a computer, makes the above-mentioned first aspect or any possible implementation of the first aspect as shown method is executed.
  • the present application provides a computer program product, the computer program product comprising a computer program or computer code, which, when run on a computer, makes the second aspect or any possible implementation of the second aspect described above method is executed.
  • the present application provides a computer program, when the computer program runs on a computer, the method shown in the first aspect or any possible implementation manner of the first aspect is executed.
  • the present application provides a computer program, when the computer program runs on a computer, the method shown in the second aspect or any possible implementation manner of the second aspect is executed.
  • the present application provides a communication system, the communication system includes a sending end and a receiving end, the receiving end can be used to execute the method shown in the first aspect or any possible implementation manner of the first aspect, the The sending end may be configured to execute the method shown in the second aspect or any possible implementation manner of the second aspect.
  • Figure 1a shows a schematic flowchart of a credit-based flow control provided by an embodiment of the present application
  • FIG. 1b shows a schematic flowchart of a priority-based flow control provided by an embodiment of the present application
  • 2a is a schematic diagram of a format of a bit block provided by an embodiment of the present application.
  • FIG. 2b is a schematic diagram of a format of another bit block provided by an embodiment of the present application.
  • 3a is a schematic diagram of the format of a 0-bit block provided by an embodiment of the present application.
  • 3b to 3d are schematic diagrams of a method for distinguishing a message bit block and a non-message bit block provided by an embodiment of the present application;
  • FIG. 4 is a schematic diagram of a layered architecture of a 40G/100G Ethernet provided by an embodiment of the present application
  • FIG. 5 is a schematic flowchart of a method for sending a bit block provided by an embodiment of the present application
  • 6a to 6d are schematic diagrams comparing message bit blocks and non-message bit blocks provided by embodiments of the present application;
  • 7a and 7b are schematic diagrams of formats of a 0-bit block provided by an embodiment of the present application.
  • 7c is a schematic diagram of transmission of a 0-bit block provided by an embodiment of the present application.
  • FIG. 7d is a schematic diagram of changes in packet length and link utilization provided by an embodiment of the present application.
  • 8a is a schematic diagram of the format of at least one first bit block provided by an embodiment of the present application.
  • 8b and 8c are schematic diagrams of transmission of a non-message start bit block and a non-message end bit block provided by an embodiment of the present application;
  • 9a and 9b are schematic diagrams of formats of at least one first bit block provided by an embodiment of the present application.
  • FIG. 9c is a schematic diagram of transmission of at least one first bit block provided by an embodiment of the present application.
  • 10a and 10b are schematic diagrams of formats of at least one first bit block provided by an embodiment of the present application.
  • 10c is a schematic diagram of transmission of at least one first bit block provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a communication device provided by an embodiment of the present application.
  • FIG. 12 is a schematic structural diagram of another communication device provided by an embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of another communication apparatus provided by an embodiment of the present application.
  • At least one (item) means one or more
  • plural means two or more
  • at least two (item) means two or three and three
  • “and/or” is used to describe the relationship of related objects, indicating that there can be three kinds of relationships, for example, "A and/or B” can mean: only A exists, only B exists, and both A and B exist three A case where A and B can be singular or plural.
  • the character “/” generally indicates that the associated objects are an “or” relationship.
  • At least one of the following” or similar expressions refers to any combination of these items. For example, at least one (a) of a, b or c, can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ".
  • the receiving end sends a credit update message to the sending end, and the credit update message includes the credit quantity, and the credit quantity can be determined according to the receiving buffer of the receiving end.
  • the sender can send the message to the receiver according to the number of credits included in the credit update message.
  • the sender can send the message immediately; and when the number of credits is insufficient, the sender can buffer the message and accumulate the number of credits.
  • the number of credits sent by the receiver can be used to instruct the sender to send a message corresponding to the amount of data.
  • the sender and the receiver can respectively include 8 queues.
  • the receiving end may send a PFC message to the sending end, and the PFC message (or may also be referred to as a PFC frame) includes the time when the queue stops sending messages. and the ID of the corresponding queue. Therefore, after receiving the PFC message, the sender stops or delays sending the message through the corresponding queue according to the PFC message. For the receiver, the receiver stops or delays receiving the message through the corresponding queue.
  • a message is a unit of data exchanged and transmitted in a network.
  • the message may include destination MAC address (destination address) information, source MAC address (source address) information, length/type (length/type) information, data information and frame check sequence (frame check sequence, FCS). )Wait.
  • the message may further include a preamble (preamble), a frame start delimiter (startofframedelimiter, SFD) and the like.
  • FIG. 4 shows a schematic diagram of a layered architecture in 40G/100G Ethernet.
  • the function of the media access control (MAC) layer is to verify the packets;
  • the function of the reconciliation sublayer (RS) is to provide a kind of media independent interface (some kind of media independent interface).
  • xMII and the signal mapping mechanism between the MAC layer;
  • the function of the physical coding sublayer (PCS) is to encode the signal received from xMII;
  • the physical media access sublayer physical media attachment, PMA
  • PMA physical media attachment
  • PMD physical media dependent layer
  • the functions introduced in this application are only examples, and in specific implementation, each layer may further include other functions, etc., which are not limited in this application.
  • every 8 bits of the message are sequentially mapped to channel 0 to channel 7 of the xMII interface.
  • the PCS performs 64B/66B encoding based on the signal received from the xMII interface, such as adding a 2-bit sync header to form a 64B/66B bit block.
  • a 7-byte preamble and a 1-byte SFD can be encoded as a start bit block; a 6-byte destination MAC address and a 2-byte partial source MAC address are encoded as the first data bit block, By analogy, several data bit blocks are formed.
  • the PCS will add an end bit block at the end of the packet.
  • the end bit block may contain FCS.
  • the value of the preset field of the start bit block may be set to the first value or the third value.
  • the start bit block may also be called a non-message start bit block, and the value of the preset field of the start bit block is the third value
  • the start bit block may also be referred to as the message start bit block.
  • the value of the preset field of the end bit block may also be set to different values to distinguish the message end bit block and the non-message end bit block.
  • information such as operation management and maintenance may be encoded as 0-bit blocks when 64B/66B encoding is performed through the PCS.
  • the value of the preset field of the 0-bit block may be the second value.
  • the first bit block may be a P1B/P2B bit block, or a P1B/P2B code block, or a P1B/P2B block, or a P1B/P2B encoding block, or a P1B/P2B encoding block. It can be called P1B/P2B bitstream, etc.
  • P1 represents the number of payload bits of the first bit block
  • P2 represents the total number of bits of the first bit block
  • P2-P1 represents the number of synchronization header bits of the first bit block
  • P1 and P2 are positive integers
  • P2 is greater than P1.
  • the P1B/P2B bit block may be a 64B/66B bit block; a 128B/129B bit block; or, alternatively, a 128B/130B bit block; alternatively, a 128B/131B bit block; Or, 256B/258B bit block; Or, 512B/513B bit block; Or, 512B/514B bit block; Or, 512B/515B bit block, etc.
  • Figure 2a shows different types of 64B/66B bit blocks.
  • the two bits “10" or "01" in the header are synchronization header bits
  • the last 64 bits are payload bits, which can be used to carry payload data and the like.
  • Each row in Figure 2a represents a code pattern definition, where D0-D7 represent data bytes, C0-C7 represent control bytes, S0 represent the beginning of a MAC frame, and T0-T7 represent the end of a MAC frame.
  • FIG. 2b shows a 128B/131B bit block, or it may also be called a flow control unit (flow control unit, flit).
  • flow control unit flow control unit
  • flit flow control unit
  • H header
  • H represents the synchronization header of the flit, and different values of H are used to indicate that the flit is a control bit block (also called a control flit) or a data bit block (also called a load) flit (payload flit)), the length of the H can be 1 bit, 2 bits, or 3 bits, etc.
  • the different values of the Type field are used to identify the type of the control bit block, such as the message start bit block (also called message start flit) or O-bit block (also called feedback flit or Oflit, etc.), etc. .
  • the length of the type can be at least 2 bits.
  • different values of the type field can also be used to identify the type of the control bit block as message start flit, credit update flit or PFC flit (credit update flit or PFC flit are collectively referred to as Off), etc.
  • the flit shown in Figure 2b(1) can generally be used to carry request, control or management information.
  • Figures 2b(2) to 2b(4) show that multiple flits carry one packet. The difference between them mainly lies in the protection methods of different CRCs.
  • Figure 2b (3) is the message
  • the start flit is protected by CRC-X
  • Figure 2b(4) shows that both the start flit and the load flit of the message are protected by CRC-Y.
  • the example shown above is illustrated by using different values of the type field to identify the start bit block or the 0-bit block of the message as an example.
  • the different values of the type field can also be used for Identifying the message start bit block, the message end bit block, or the O bit block, etc., will not be described in detail here.
  • the type field can be used to identify the start bit block and the end bit block, and then other fields can be used to distinguish the start bit block as a message start bit block or a non-message start bit block, or, other fields can be used to distinguish the end bit block as the end of the message.
  • the generation position of the first bit block is not limited, and the communication apparatus can either generate at least one first bit block at the xMII interface; or, can also generate at least one first bit block at the PCS layer.
  • at least the first bit block may be a P1B/P2B bit block generated at the PCS; alternatively, the at least one first bit block may also be a bit block including control characters or data characters generated through an xMII interface.
  • Blocks are encoded as P1B/P2B bit blocks after passing through the PCS sublayer.
  • the message bit block may include a boundary bit block and a data bit block, and the boundary bit block may be at least one of a start bit block and an end bit block. Therefore, the bit blocks corresponding to a message may be: A, start bit block + data bit block; B, start bit block + data bit block + end bit block; C, data bit block + end bit block. Exemplarily, if the message bit block is the message start bit block, the data bit block corresponding to the message start bit block, the end bit block corresponding to the message start bit block, the message end bit block, the message end bit block At least one of the start bit block corresponding to the bit block or the data bit block corresponding to the message end bit block.
  • the non-packet bit block may be another bit block other than the packet bit block, for example, it may be an 0-bit block transmitted between packets.
  • the non-message bit block may also be implemented by using a boundary bit block.
  • the non-message bit block may also be implemented by using a boundary bit block and a data bit block together.
  • the preset field of the boundary bit block in the non-message bit block can use a preset value (such as the first value), and the preset field can be used to Distinguish between message boundary bit blocks and non-message boundary bit blocks.
  • the preset field of the start bit block can be used to distinguish, that is, the message start bit block and the non-message start bit block can be distinguished, or the preset field of the end bit block can also be used to distinguish, that is, the message end block can be distinguished. bit blocks and non-end of message bit blocks.
  • the message bit block includes a boundary bit block and a data bit block corresponding to the boundary bit block;
  • the non-message bit block is another bit block other than the message bit block, for example, it may be an 0-bit block.
  • the non-message bit block includes the boundary bit block.
  • the message bit block includes a message boundary bit block and a data bit block corresponding to the message boundary bit block;
  • the non-message bit block is another bit block other than the message bit block, for example, it may be an 0-bit block, a non-message boundary bit block, a data bit block corresponding to a non-message boundary bit block, and a non-message boundary bit block corresponding to The boundary bit block etc.
  • the non-message bit block may include a 0-bit block, a non-message start bit block, a data bit block corresponding to a non-message start bit block, an end bit block corresponding to a non-message start bit block, and a non-message end bit block.
  • the data bit block corresponding to the non-message start bit block may also be called a non-message data bit block
  • the end bit block corresponding to the non-message start bit block may also be called a non-message end bit block
  • the non-message end bit block The start bit block corresponding to the bit block may also be referred to as a non-packet start bit block
  • the data bit block corresponding to the non-packet end bit block may also be referred to as a non-packet data bit block, and so on.
  • the transmission order between the bit blocks can also be adjusted.
  • the end bit block may be sent first, and then the start bit block may be sent, or the end bit block may be sent first, and then the start bit block may be sent.
  • the preset field can be used to identify a block of end-of-message bits or a block of non-end-of-message bits.
  • the message bit block includes a preset field
  • the non-message bit block includes a preset field
  • the value carried by the preset field can be used to identify the message start bit block or the non-message start bit block; or, the The value carried by the preset field can be used to identify the end-of-message block or the non-end-of-message block.
  • the value carried by the preset field may include a first value or a third value, where the first value corresponds to a non-packet bit block, and the third value corresponds to a packet bit block.
  • At least one first bit block includes a preset field
  • the preset field can be used to identify the at least one first bit block as a message bit block or a non-message bit block.
  • the value carried by the preset field may be used to identify the message start bit block or the non-message start bit block; or, the value carried by the preset field may be used to identify the message end bit block or non-message end block. bit block.
  • the preset field may be used to identify the role of the 0-bit block as carrying flow control information or other information.
  • a preset field may be understood as a preset area or a preset position in the bit block, and the preset area or preset position carries a numerical value. This application does not limit which region or position in the bit block the preset field is specifically located in.
  • the preset field may be located in at least one of a start bit block, an end bit block or a data bit block.
  • Figures 3b and 3c show different values of the preset fields in the non-message start bit block.
  • the preset fields in Figure 3b can be carried in the D1 area, and the preset fields in Figure 3c can be carried in the D7 area, or, It may also be said that the preset field in FIG. 3b is located in the D1 area, and the preset field in FIG. 3c is located in the D7 area.
  • the preset field in the non-message start bit block carries 0xE5
  • the preset field in the message start bit block carries 0x55.
  • the preset field in the non-message start bit block carries 0xC5
  • the preset field in the message start bit block carries 0xD5 (bit transmission sequence is 1010 1011).
  • 0xE5 and 0xC5 can be understood as the first value
  • 0x55 and 0xD5 can be understood as the third value.
  • FIG. 3a to FIG. 3c are only an example.
  • the preset field may also be located in other areas.
  • the preset field in FIG. 3b may also be any area or multiple areas in D2 to D6. This application also does not limit the value of the first value carried by the preset field of the non-message bit block, etc., as well.
  • FIG. 3b and FIG. 3c are illustrated by taking the preset field located in the starting bit block as an example, but in this application, the preset field can also be located in the ending bit block, that is, by using the preset field in the ending bit block. Different values of the fields are set to distinguish the end-of-message block and the non-end-of-message block.
  • FIG. 3b and FIG. 3c which will not be described in detail here.
  • various embodiments provided by the present application will be illustrated below by taking the preset field located in the start bit block as an example.
  • Figure 3d shows different values of preset fields in flit.
  • the preset field carries 00001, it means that the flit is a packet start flit.
  • the default field carries 01000, it indicates that the flit is Oflit.
  • the preset field can use two different values to distinguish the start of the packet flit. and Oflit will do. It can be understood that this description is also applicable to the credit update bit block and the PFC bit block in the various embodiments shown below.
  • Table 1 shows an example of a method for distinguishing between non-message bit blocks and message bit blocks.
  • the preset field can not only be used to identify message bit blocks and non-message bit blocks.
  • different values of the preset field may be used to identify the message bit block, the credit update bit block and the PFC bit block.
  • the credit update bit block and the PFC bit block can be understood as non-message bit blocks.
  • the preset field carries 00001, it means that the flit is a packet start flit.
  • the flit is a credit update flit, which can also be called a non-message bit block or an 0-bit block, etc.; when the preset field carries 00110, it means that the flit is a PFC flit, or it can be It is called a non-message bit block or an O-bit block, etc.
  • Table 2 is an example of the method of distinguishing the message bit block, the credit update bit block and the PFC bit block.
  • the values of the preset fields shown above are only examples.
  • the preset fields that distinguish the non-message start bit block and the message start bit block can also be located in other areas, or can also be used for Bearing other numerical values, etc., are not limited in this application. As long as the same field can be used to distinguish non-message bit blocks and message bit blocks by taking different values.
  • the preset fields shown above are mainly used to identify message bit blocks and non-message bit blocks, however, for control bit blocks such as 0-bit blocks, the preset fields can be used to identify the 0-bit block. carried information.
  • the different values carried by the preset fields in the 0-bit block are used to identify that the 0-bit block is used to carry flow control information or retransmission control information.
  • different values carried by the preset fields correspond to different information, and one value corresponds to one type of information. For example, when the preset field in the 0-bit block carries the second value, the 0-bit block is used to carry flow control information.
  • the preset field in the 0-bit block carries the fourth value, the 0-bit block may be used to carry retransmission control information, etc. (only an example).
  • the preset field in the 0-bit block in FIG. 3a may be carried in the 00 area, or it may also be called that the preset field in the 0-bit block is located in the 00 area, or the specific position of the preset field may be located in the 00 area.
  • the preset field may carry a second value, such as 0x06. That is, when the preset field in the 0-bit block carries 0x06, it means that the 0-bit block is used for feeding back flow control information.
  • FIG. 3a only shows the O-bit block corresponding to FIG. 2a, and the specific description of the Offit corresponding to FIG. 2b will not be described in detail here.
  • bit positions 2 to 9 are the D0 area
  • bit positions 10 to 17 8 bits are the D1 area.
  • the 8 bits between the bit positions 2 and 9 are 0x78 (ie, the block type field is 0x78), and the 8 bits between the bit positions 10 and 17 are the D1 area.
  • the 8 bits between the bit positions 2 and 9 are 0xFF (ie, the block type field is 0xFF), and the 8 bits between the bit positions 10 and 17 are the D0 area.
  • the starting bit positions of the bit blocks shown in this application are all 0s. If the start bit position is 1, the bit position occupied by 0x78 of the S0 bit block may be 8 bits between bit positions 3 to 10. In other words, the present application does not limit the starting bit position.
  • bit position Only the description of the bit position is shown here, but the application does not limit the relationship between the bit position and the bit transmission order.
  • the 8 bits between bit positions 2 to 9 are 0x78, but for the specific bit position of the corresponding 8 bits "0111 1000", this application does not limited.
  • the 8 bits whose bit positions are between 2 and 9 in the S0 bit block may be 0111 1000 in sequence, or 0001 1110 in sequence, etc., which is not limited in this application.
  • the receiver sends a credit update message or PFC message to the sender, because the length of the message is generally long, the credit update message or PFC message sent by the receiver may be blocked.
  • the receiving end is sending other messages (such as the first message), in this case, the receiving end needs to wait for the message to be sent before sending the credit update message or the PFC message.
  • the length of the message is 256 bytes, that is, the credit update message or the PFC message needs to wait for a message sending time of 256 bytes.
  • the PFC message may need to wait for a message sending time of the longest Ethernet message length, such as 1518 bytes, before sending the credit update message or PFC message.
  • the length of the credit update message itself also increases the delay for the receiver to send the credit update message. That is, once the credit update message is delayed, the sender cannot send the message in time, so the flow completion time (FCT) of the service flow will be prolonged, resulting in low network utilization.
  • FCT flow completion time
  • the present application provides a method and device for sending a bit block
  • the receiving end can not only indicate its buffer status to the sending end, but also can feed back flow control information in the form of bit blocks, so that the flow control information can be sent out in time is more likely, and the feedback method of flow control information is more flexible. Further, feeding back the flow control information in the form of bit blocks can also interrupt the first packet currently being sent by the receiving end, reduce the delay of the flow control information, reduce the delay of the FCT, and improve the network utilization rate.
  • the method provided in this application can not only be applied to high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIe) or flit-based information technology (information technology, IT) network, but also can be applied to Ethernet, Internet protocol (internet protocol, IP) network, packet transport network (PTN), agile transport network (ATN), sliced packet network (slicing packet network, SPN), etc., for the methods provided in this application can be applied to
  • the network is not limited.
  • the method provided in this application may be applied to a communication device, and the communication device may be a device supporting PCIe, flit, or Ethernet technology, or the like.
  • the communication device may be any form of computer, server, switch (or referred to as switching device, switching chip, etc.), router, network card, etc.
  • the specific form of the communication device is not limited in this application.
  • the method provided in this application may be applied to two communication apparatuses, for example, the two communication apparatuses may include a sending end and a receiving end.
  • the specific form of the transmitting end and the receiving end may refer to the above-mentioned form of the communication device.
  • the sending end and the receiving end may also be understood as any two interfaces.
  • the method provided in this application can be applied to a link-level (also referred to as point-to-point) scenario, where the link-level scenario may include a sender and a receiver, and During the transmission of a packet (such as the first packet or the second packet or at least one first bit block, etc.), the packet will not be lost, but problems such as transmission errors may occur.
  • the sending end may be understood as a communication device that sends the second message, and the receiving end may be understood as a communication device that receives the second message.
  • the sending end may be understood as a communication device that receives the first message, and the receiving end may be understood as a communication device that sends the first message.
  • the message shown in the present application may also be called a packet or a frame, etc., and other names of the message are not limited in this embodiment of the present application.
  • FIG. 5 is a schematic flowchart of a method for sending a bit block provided by an embodiment of the present application. As shown in FIG. 5 , the method includes:
  • the receiving end generates at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information, where the flow control information is obtained according to the buffering situation of the receiving end.
  • the buffering situation of the receiving end includes the buffering size of the receiving end, or the buffering size of the buffering queue of the receiving end, and the like.
  • the cache size of the cache queue of the receiving end includes whether the cache size of the cache queue of the receiving end exceeds a cache threshold and the like.
  • the receiving end can obtain the flow control information.
  • the flow control information may include information on the number of credits or the duration of time when at least one queue is stopped from sending packets.
  • the number of credits may be determined according to the buffer size of the receiving end, and one credit (credit) may correspond to a packet of a certain amount of data.
  • one credit may correspond to a 16-byte message, etc., which is not limited in this embodiment of the present application.
  • the duration information of at least one queue being stopped from sending packets may be determined according to the buffer size of the buffer queue of the receiving end.
  • the time unit of the duration information may be the time required for the physical layer chip to send 512-bit data.
  • one time unit of the duration information indicates that the time when the corresponding queue of the receiving end suspends receiving packets is the time required for the physical layer chip of the sending end to send 512-bit data.
  • the maximum time of the duration information may be 0xFFFF.
  • the flow control information may include, in addition to information on the duration of at least one queue that is stopped from sending packets, an identifier of the at least one queue.
  • the flow control information may include information on the duration of a queue being stopped from sending packets and an identifier of the queue.
  • the identifier of the queue may be any one of 0 to 7, or other identifiers, etc. , the embodiments of the present application are not limited.
  • the flow control information may include duration information of the two queues being stopped from sending packets and an identifier of each of the two queues.
  • the flow control information may include information on the duration that each of the eight queues is stopped from sending packets, and may also include an identifier of each of the eight queues.
  • the indication field includes not only duration information, but also a queue identifier corresponding to the duration information.
  • the at least one first bit block further includes a cyclic redundancy check CRC field, where the CRC field is used to carry the CRC information of the at least one first bit block, that is, the CRC field can be used for The at least one first block of bits is checked.
  • the CRC information may be used to protect the flow control information in the at least one first bit block.
  • the length of the CRC field may be 4 bits, 8 bits, 16 bits, or 32 bits, etc. The length of the CRC may be determined according to a CRC check method, etc. The length of the CRC field is not limited in this embodiment of the present application.
  • the receiving end sends at least one first bit block to the transmitting end, and correspondingly, the transmitting end receives the at least one first bit block.
  • the method shown in FIG. 5 may further include step 503 .
  • the receiving end sends a first message to the sending end, where the first message is composed of message bit blocks.
  • the sending end receives the first message.
  • the first packet may include a packet start bit block, a data bit block corresponding to the packet start bit block, and an end bit block corresponding to the packet start bit block (just an example).
  • the first packet may include a packet start bit block (eg S0), a packet data bit block (eg D0-D7) and a packet end bit block (eg T0-T7) as shown in FIG. 2a.
  • the first packet may include a packet start bit block and a data bit block corresponding to the packet start bit block.
  • the first packet may include a packet start bit block and a packet data bit block as shown in FIG. 2b(2).
  • the specific value of the preset field in the message start bit block reference may be made to the above description, which will not be described in detail here.
  • the first bit block may be a non-message bit block, or the first bit block is a message bit block.
  • the specific forms of the first bit block are respectively shown below.
  • the first bit block is a non-message bit block.
  • the first bit block is different from the bit block composing the message (for example, the bit block composing the message may be called the second bit block), for example, the value of the preset field in the non-message start bit block is the same as the message start bit.
  • the values of the preset fields in the block are different.
  • the first bit block is a non-message bit block.
  • at least one first bit block includes a non-message start bit block, as shown in the second diagrams of FIG. 6a to FIG. 6d, respectively.
  • the at least one first bit block may further include a non-packet end bit block, etc.
  • the receiving end may send the at least one first bit block independently.
  • the receiving end sends the first packet after sending the at least one first bit block; or, the receiving end sends the at least one first bit block after sending the first packet.
  • the receiving end may insert the at least one first bit block into the first message sent in. That is, the receiving end can interrupt the first packet currently being sent, and insert the at least one first bit block into the first packet.
  • the above step 503 can also be replaced with: after sending the message start bit block of the first message and the first message has not been sent, the receiving end sends at least one first bit to the sending end piece.
  • the preset fields are located in different areas. Therefore, in implementation manner 1, after receiving the at least one first bit block, the transmitting end can check the at least one bit block according to the CRC information carried in the CRC field in the at least one first bit block. In the case that the verification of the CRC information of the at least one first bit block is successful, the transmitting end may obtain the value carried in the preset field according to the block type field of the at least one first bit block. If the value carried in the preset field in the at least one first bit block is the first value, the sending situation of the second packet is adjusted according to the flow control information in the at least one first bit block.
  • the block type field of the non-packet start bit block is 8 bits whose bit positions are between 2 and 9, and the block type field of the non-packet type field is 8 bits.
  • the value is 0x78.
  • the sender can adjust the value of the second packet by acquiring the value carried by the preset field and indicating the field. delivery situation.
  • the block type field of the at least one 0-bit block is 8 bits whose bit position is between 2 and 9, and the value of the block type field is 0x4B . Then, according to the numerical value carried by the preset field of the at least one 0-bit block, such as the second numerical value, and the indication field, the sending situation of the second packet is adjusted.
  • the first bit block is a message bit block.
  • the receiving end may just need to send the first packet, but the first packet has not been sent. In this case, the receiving end may feed back the flow control information in the first packet. In other words, the receiving end may carry the credit quantity or duration information, etc. in the message start bit block, and send it together with the first message.
  • the value carried by the preset field in the first bit block is the third value, as shown in the first figures of FIG. 6a to FIG. 6d, respectively.
  • At least one first bit block in step 502 is carried in the first packet, and is sent together with the first packet.
  • the first packet shown here and the first packet in step 503 may be understood as different first packets (that is, may be understood as not the same packet).
  • the transmitting end may perform the first bit block according to the CRC information carried in the CRC field (also referred to as the frame check sequence (FCS) field) of the first packet.
  • CRC field also referred to as the frame check sequence (FCS) field
  • FCS frame check sequence
  • the sender also needs to check the CRC information protecting the first packet.
  • the transmitting end may perform step 505 . If another CRC information (eg, FCS) of the first packet fails to be checked, the sender may notify the receiver to retransmit the first packet.
  • FIG. 6a and FIG. 6c are schematic diagrams showing the format of at least one first bit block when the receiving end feeds back the number of credits.
  • FIG. 6b and FIG. 6d are schematic diagrams showing the format of at least one first bit block when the receiving end feeds back the duration information.
  • Figures 6a and 6b show schematic diagrams of the format of at least one first bit block when the receiving end feeds back flow control information in the form of 64B/66B
  • Figures 6c and 6d show the receiving end feeding back in the form of flit
  • flow control information a schematic diagram of the format of at least one first bit block. It can be understood that although the first packets shown in FIGS.
  • 6a to 6d include flow control information, the flow control information is carried in a packet bit block such as a packet start bit block.
  • the message start bit block includes a field for carrying flow control information and a CRC field. It can be understood that, in FIG. 6c and FIG. 6d , when the preset field carries 01000, it is also possible to identify whether the flit includes flow control information through the 2 bits after the preset field. Alternatively, whether the flit includes flow control information and the like may also be identified through 1 bit after the preset field, which is not limited in this embodiment of the present application.
  • the start flit of the first message sent by the receiving end may also include a type field, and the type field may be used to identify the start flit. Whether to include flow control information.
  • This embodiment of the present application does not limit the specific position or length of the field of this type.
  • the specific positions of the fields shown in FIG. 6a to FIG. 6d are only examples, and in a specific implementation, the above fields may also be in other positions.
  • the lengths of the above fields may also be determined according to the lengths of the message bit blocks included in the first message, and the lengths and specific values of the fields shown above are not limited in the embodiments of the present application.
  • Embodiment 1 to Embodiment 4 shown below For the specific description of the non-message bit block, reference may also be made to Embodiment 1 to Embodiment 4 shown below.
  • the method shown in FIG. 5 may further include step 504 and step 505 .
  • the transmitting end performs CRC check on at least one first bit block.
  • step 504 may also be understood as the sending end checking the CRC information in the at least one first bit block.
  • the sending end adjusts the sending situation of the second packet according to the flow control information in the at least one first bit block.
  • the sending end fails to check the CRC information in at least one first bit block
  • the at least one first bit block may be directly discarded.
  • the sending end may distinguish the message bit block and the non-message bit block according to the value carried by the preset field. If the preset field carries the first value, the flow control information can be obtained from the indication field. Alternatively, the sending end can obtain whether the bit block is an 0-bit block through the difference in the block type field of the bit block, and if it is an 0-bit block, the function of the 0-bit block can be obtained through a preset field, such as the preset field carrying For the second value, the flow control information is obtained from the 0-bit block indication field.
  • step 505 reference may also be made to Embodiments 1 to 4 shown below.
  • the sending end may adjust the data volume of the second packet to be sent according to the flow control information, or adjust the corresponding queue to stop sending the second packet, etc., which is not limited in the embodiment of the present application.
  • the sender adjusts the data amount of the second packet according to the number of credits in the at least one first bit block. If the data volume of the at least one second packet to be sent is less than or equal to the data volume corresponding to the credit quantity, the sending end may directly send the at least one second packet.
  • the sender first buffers the second packet, and accumulates the credit quantity until the data volume corresponding to the credit quantity is greater than or equal to the second packet.
  • the data volume of the message is sent, and the second message is sent.
  • the sending end may further adjust the sending rate of the corresponding queue according to the duration information in the at least one first bit block.
  • the receiving end may feed back the flow control information to the transmitting end in the form of a first bit block instead of a message.
  • the transmission delay of the at least one first bit block may be reduced, so as to prevent the transmission time of the at least one first bit block from being too long and other packets being blocked.
  • the first bit block is a non-packet bit block
  • the non-packet Bit blocks and message bit blocks can be distinguished by the receiver or the sender.
  • the value carried by at least one 0-bit block preset field is different from the value borne by other 0-bit block preset fields, so that the transmitting end or the receiving end can distinguish the role of at least one 0-bit block according to the value of the preset field.
  • the at least one first bit block can also be inserted into the first packet and sent out, which further reduces the waiting delay of the at least one first bit block, reduces the delay of the FCT, and improves the network utilization rate.
  • At least one first bit block includes at least one 0-bit block, and a preset field in each 0-bit block carries the second value.
  • the indication field and the CRC field may be located at bit block positions 10 to 33 and 38 to 65 in the 0-bit block, respectively, and the indication field and the CRC field may be located at different bit positions respectively.
  • the length of the indication field may be at least 8 bits, for example, the indication field may be 8 bits, 16 bits, 24 bits, 128 bits, etc.
  • the specific length of the indication field is not limited in this embodiment of the present application.
  • the length of the CRC field may be 4 bits, 8 bits, 16 bits, or 32 bits, etc. Regarding the length of the indication field and the CRC field, etc., the embodiments shown below are also applicable, and will not be described in detail below.
  • the positions and lengths of the indication field, the CRC field and the preset field in the 0-bit block may be as shown in FIG. 7a.
  • the indication field can be located in 8 bits between bit positions 10 to 17 in the 0-bit block
  • the CRC field can be located in the 0-bit block.
  • the positions are 8 bits between 18 and 25.
  • the indication field may be located in 20 bits between bit positions 10 to 29 in the 0-bit block, that is, a part of the indication field carries a queue The duration of the stopped sending packets, and the other part of the indication field carries the identifier of the one queue.
  • the CRC field is located in 4 bits between bit positions 30 to 33 in a block of 0 bits.
  • the positions and lengths of the indication field and the CRC field shown in FIG. 7a are only examples.
  • the indication field and the CRC field may also be located in other areas of the 0-bit block. This is not limited.
  • other positions in the 0-bit block are marked as reserved (reserved, rsvd), but this does not mean that the other positions are not occupied.
  • rsvd reserved (reserved, rsvd)
  • the embodiment of the present application does not limited.
  • other embodiments shown in this application are also applicable.
  • one credit corresponds to 16 bytes, the number of credits is 20, and the schematic diagram shown in Fig. 7a is taken as an example to describe the specific scene of the method for sending the bit block provided by the embodiment of the present application.
  • the format of the 0-bit block may be as shown in the first figure of FIG. 7b, the indication field occupies 8 bits, and the value range of the credit quantity is 0 to 255 (including 0 and 255).
  • the number of credits is equal to 0 it means that the receiving end has no receiving ability, that is, the buffering situation of the receiving end is saturated and the message cannot be buffered any more.
  • the receiving end When the receiving end needs to send the at least one 0-bit block, the receiving end is sending the first packet to the sending end.
  • the first message can be understood as S (the message start bit block) DDD...D (that is, the data bit block corresponding to the message start bit block) T (that is, the message start bit block corresponds to the end bit block) of the message bit block stream.
  • the receiving end may directly send the at least one 0-bit block without sending the message bit block stream of the first message, and FIG. 7c shows one 0-bit block. That is, the receiving end can interrupt the message bit block stream of the first message currently being sent, and insert at least one 0-bit block into the message bit block stream of the first message, so that the at least one 0-bit block send out.
  • the sending end receives the first message from the receiving end.
  • the sending end receives the control bit block and obtains the block type of the control bit block.
  • the format of the 0-bit block may be as shown in the second figure of Figure 7b, the indication field carries 0xFFFF, indicating that the priority queue numbered 7 needs to suspend the maximum time for sending packets, and the indication field also carries 0x7, indicating that the transmission is suspended
  • the queue number of the packet is 7.
  • the receiving end can also generate at least one 0-bit block, and the format of the 0-bit block is as shown in the third figure of Figure 7b. .
  • the method for the receiver to send the at least one 0-bit block and the method for the transmitter to receive the at least one 0-bit block can be referred to the above description, which will not be described in detail here.
  • the link utilization rate may satisfy the following formula.
  • TLP len is used to indicate the payload length of the first packet, that is, the maximum payload length of the first packet; H len is used to indicate the header length of the first packet; ACK len is used to indicate that the receiver receives the second The length of the acknowledgement (acknowledge, ACK) message fed back after the message; FC len is used to indicate the length of at least one first bit block; FC updateFactor is used to indicate the transmission factor of at least one first bit block; ACK updateFactor is used to indicate the length of the at least one first bit block.
  • P bw is used to indicate the blocking degree, such as the delay when the receiver sends at least one first bit block.
  • Fig. 7d shows the change of the link utilization rate according to the difference of the packet length (such as the above-mentioned TLP len ).
  • the packet length such as the above-mentioned TLP len
  • “1", "2" or “3” respectively indicate the change of the packet length and the link utilization rate in the best case, the average case or the worst case. It can be seen from FIG. 7d that the method provided by this embodiment of the present application can not only send at least one first bit block in time, but also improve link utilization.
  • the buffer size that needs to be increased by the receiving end is as follows Show:
  • the buffer size that the receiver needs to increase is only 16 bytes. byte.
  • At least one first bit block includes a non-message start bit block and a non-message end bit block, and a preset field in the non-message start bit block carries the first value.
  • the indication field, the CRC field, and the preset field may be located between 10 and 65 in the non-message start bit block, and between 10 and 65 in the non-message end bit block.
  • bit positions of the preset field, the indication field and the CRC field may be as shown in Figure 8a.
  • the indication field may be located in 8 bits in bit positions 10 to 17 in the non-end of message bit block, and the CRC field in bit positions 18 to 25 in the non-end of message bit block 8 bits between.
  • the indication field may be located in 5 bytes between bit positions 10 and 49 in the non-end of message bit block in which the CRC field is located Positions are 16 bits between 50 and 65.
  • the receiving end in the case that the receiving end needs to feed back flow control information, and the receiving end is currently sending the message bit block stream of the first message.
  • the receiving end may insert the non-message start bit block and the non-message end bit block into the stream of message bit blocks currently being sent. Therefore, after obtaining the non-message start bit block (for example, the block type field is 0x78), the sender can know that the non-message start bit block is not based on 0xE5 carried by the preset field in the non-message start bit block.
  • the message starts a block of bits.
  • the sender obtains the non-message end bit block, it obtains credit quantity or duration information from the indication field of the non-message end bit block. Then, the sending end adjusts the sending situation of the second packet.
  • FIG. 8b shows that the receiving end sequentially inserts a non-message start bit block and a non-message end bit block into the message bit block stream of the first message.
  • the receiving end may also insert a non-message end bit block and a non-message start bit block into the message bit block stream of the first message in sequence.
  • the receiving end may sequentially send a non-message start bit block and a non-message end bit block; or, the receiving end may also sequentially send a non-message end bit block and a non-message start bit block .
  • m and n in Fig. 8a may represent the identification (or number, etc.) of different queues. It can be understood that, for the specific description of FIGS. 8 a to 8 c , reference may be made to FIGS. 5 to 7 c , which will not be described in detail here.
  • At least one first bit block includes a non-packet start bit block, at least one non-packet data bit block corresponding to the non-packet start bit block, and a non-packet end bit block corresponding to the non-packet start bit block, and the The preset field in the non-message start bit block carries the first value.
  • the indication field and the CRC field may be located in non-message data bit blocks, respectively, and occupy different bit positions.
  • the at least one first bit block may include a non-message start bit block, a non-message data bit block, and a non-message end bit block.
  • the preset field is included in the non-message start bit block, and the indication field and the CRC field may be included in the non-message data bit block.
  • the embodiments of the present application do not limited.
  • the at least one first bit block may further include a non-message start bit block, at least two non-message data bit blocks, and a non-message end bit block.
  • the preset field is included in the non-message start bit block
  • the indication field and the CRC field may be included in the same non-message data bit block, or respectively included in different message data bit blocks, etc.
  • the indication field may be contained in the same block of non-message data bits, or the indication field may be contained in a different block of non-message data bits, or the like.
  • the indication field and the CRC field may be included in different non-message data bit blocks, and in Figure 9b, the indication field is included in at least three non-message data bits in the bit block.
  • the at least one first bit block may further include one non-message start bit block, eight non-message data bit blocks, and one non-message end bit block.
  • the CRC field can be understood as the eighth non-message data bit block, and the credit quantity and duration information, etc., are not limited in this embodiment of the present application.
  • the queue identification information with a length of 8 bits such as e[0:7] can be used to indicate the validity of the duration information corresponding to the eight queues respectively.
  • e[0x11](0001 0001) can indicate that the duration information of queue 0 and queue 4 is valid. It can be understood that the correspondence between the e[0:7] pairs of queues shown here is only an example.
  • Fig. 9c shows a method in which the receiving end sends at least one first bit block, and the transmitting end receives the at least one first bit block.
  • the receiving end sends at least one first bit block
  • the transmitting end receives the at least one first bit block.
  • At least one first bit block includes at least one 0-bit block, and a preset field in each 0-bit block carries the second value.
  • Embodiments 1 to 3 shown above are illustrated by taking the bit block shown in FIG. 2 a as an example, and this embodiment of the present application will take the bit block shown in FIG. 2 b as an example to describe the method provided by the embodiment of the present application.
  • the length of H may be 3 bits.
  • H bears 100 it indicates that the flit is a control flit; when H bears 001, it indicates that the flit is a payload flit.
  • the length of the preset field is 5 bits, the preset field carrying 00001 indicates that the type of the flit is the start of the message flit, the preset field carrying 00101 indicates that the flit type is credit update flit, and the preset field carrying 00110 indicates that the flit Type is PFC flit.
  • the preset field carrying 00001 indicates that the type of the flit is the start of the message flit
  • the preset field carrying 00101 indicates that the flit type is credit update flit
  • the preset field carrying 00110 indicates that the flit Type is PFC flit.
  • H carries 100 and the default field carries carries 00101 the flit is a credit update flit
  • 0x81 in Figure 10b is a representation of e[0:7].
  • e[0:7] may indicate the validity of the corresponding queue, for example, the binary value of 0x81 is 1000 0001, which indicates that Time[0] and Time[7] are valid values.
  • the format of the first bit block may be as shown in the third diagram of FIG. 10a, or as shown in the third diagram of FIG. 10b.
  • the receiving end may insert at least one first bit block into the bit block stream, and send the at least one first bit block to the transmitting end.
  • the Oflit shown in FIG. 10c is the at least one first bit block shown in the embodiment of the present application.
  • each flit in the embodiment of the present application includes a synchronization header, thereby ensuring that at least one first bit block is Inserted into the bit block stream of flit, the sender can also identify the at least one first bit block from D flit.
  • the sender may not be able to identify whether the received flit is a D flit or an Off. .
  • the flow control information is obtained according to the buffer status of the receiving end.
  • the buffer status of the receiving end includes the buffer size of the receiving end, or the buffer size of the buffer queue of the receiving end, and the like.
  • the cache size of the cache queue of the receiving end includes whether the cache size of the cache queue of the receiving end exceeds a cache threshold and the like.
  • the buffer size of the receiving end is further described.
  • the buffer size at the receiving end includes one or more of the following:
  • the size of the free buffer at the receiving end when determining the flow control information, the size of the free buffer at the receiving end.
  • the number of packets discharged by the receiving end is the newly added free buffer size. For example, within the time period when the flow control information is sent twice, the amount of packet data discharged by the receiving end is 2KB, so 2KB is the newly added free buffer size.
  • the link since the link is initialized, the sum of the total amount of packet data discharged by the receiver at the current moment and the buffer size is recorded as the cumulative allocable buffer size. For example, if the total number of packets emptied by the receiver is 10KB and the buffer size is 2KB, then the cumulative buffer size that can be allocated by the receiver is 12KB.
  • the buffer size of the buffer queue of the receiving end is further described.
  • the buffer size of the buffer queue at the receiving end may also include any one or more of the following:
  • the flow control information may include, in addition to the duration information that at least one queue is stopped from sending packets, and also includes the identifier of the at least one queue.
  • the flow control information may also include any one or more of the following:
  • the flow control information may include the identifier of each queue in the at least one queue, the buffer status of each queue, and the like.
  • FIG. 11 is a schematic structural diagram of a communication device provided by an embodiment of the present application, where the communication device includes a processing unit 1101 and a transceiver unit 1102 .
  • the communication apparatus shown in FIG. 11 may be used to perform the operations (functions or steps, etc.) performed by the receiving end in the foregoing embodiments.
  • the communication apparatus may be used to perform steps 501 and 502 shown in FIG. 5 , and the like.
  • the processing unit 1101 may be configured to generate at least one first bit block
  • the transceiver unit 1102 may be configured to output the at least one first bit block
  • the transceiver unit 1102 is further configured to output the first packet.
  • the transceiver unit 1102 is specifically configured to output at least one first bit block after the packet start bit block of the first packet is output and the first packet is not output completely .
  • the transceiver unit 1102 may also be used to acquire (or referred to as inputting) the second packet.
  • the communication apparatus shown in FIG. 11 may be used to perform the operations (or functions or steps, etc.) performed by the sender in the foregoing embodiments.
  • the communication apparatus may be used to perform steps 504 and 505 shown in FIG. 5 , and the like.
  • the transceiver unit 1102 is configured to acquire (or input) at least one first bit block; the processing unit 1101 is configured to adjust the sending of the second packet according to the flow control information in the at least one first bit block condition.
  • the transceiver unit 1102 is configured to output the second packet according to the sending situation of the second packet.
  • the processing unit 1101 is further configured to perform a CRC check on the at least one first bit block.
  • the manner in which the processing unit performs the CRC check on the at least one first bit block may also be different.
  • the processing unit may check the CRC information carried in the CRC field in the at least one first bit block. If at least one first bit block is a message bit block, the processing unit not only checks the CRC information carried by the CRC field in the at least one first bit block, but also needs to check another CRC field (for example, the CRC information carried in the FCS field) is checked.
  • transceiver unit and the processing unit shown in the various embodiments of the embodiments of this application are only examples.
  • each functional module or unit in each embodiment of the present application may be integrated in the A processor may also exist physically alone, or two or more modules or units may be integrated into one module or unit.
  • the above-mentioned integrated modules or units may be implemented in the form of hardware, or may be implemented in the form of software function modules.
  • the processing unit 1101 can be one or more processors
  • the transceiver unit 1102 can be a transceiver, or the transceiver unit 1102 can also be A sending unit and a receiving unit, the sending unit may be a transmitter, and the receiving unit may be a receiver, and the sending unit and the receiving unit are integrated into one device, such as a transceiver.
  • the processor and the transceiver may be coupled, etc., and the connection manner of the processor and the transceiver is not limited in the embodiment of the present application.
  • the communication device 120 includes one or more processors 1220 and a transceiver 1212 .
  • the processor and the transceiver may be configured to perform the functions or operations performed when the above-mentioned communication apparatus is used as the receiving end.
  • the processor is configured to generate at least one first bit block; the transceiver is configured to transmit the at least one first bit block.
  • the transceiver is used to send the first message.
  • the transceiver is configured to send the at least one first bit block after sending the message start bit block of the first message and when the first message has not been sent.
  • the transceiver is further configured to receive the second message.
  • the processor and the transceiver may be configured to perform the functions or operations performed when the above-mentioned communication apparatus is used as the sending end.
  • the transceiver is configured to receive at least one first bit block; the processor is configured to adjust the sending situation of the second packet according to the flow control information in the at least one first bit block.
  • the transceiver is further configured to send the second message according to the sending situation of the second message.
  • the processor is further configured to perform a CRC check on the at least one first bit block.
  • a transceiver may include a receiver for performing the function (or operation) of receiving and a transmitter for performing the function (or operation) of transmitting ). And transceivers are used to communicate with other devices/devices over the transmission medium.
  • the communication device 120 may further include one or more memories 1230 for storing program instructions and/or data.
  • Memory 1230 and processor 1220 are coupled.
  • the coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units or modules, which may be in electrical, mechanical or other forms, and is used for information exchange between devices, units or modules.
  • the processor 1220 may cooperate with the memory 1230.
  • the processor 1220 may execute program instructions stored in the memory 1230 .
  • at least one of the above-mentioned one or more memories may be included in the processor.
  • the specific connection medium between the transceiver 1212 , the processor 1220 , and the memory 1230 is not limited in the embodiments of the present application.
  • the memory 1230, the processor 1220, and the transceiver 1212 are connected through a bus 1240 in FIG. 12.
  • the bus is represented by a thick line in FIG. 12, and the connection between other components is only for schematic illustration. , is not limited.
  • the bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, only one thick line is shown in FIG. 12, but it does not mean that there is only one bus or one type of bus.
  • the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc.
  • a general purpose processor may be a microprocessor or any conventional processor or the like.
  • the steps of the method disclosed in conjunction with the embodiments of the present application may be directly embodied as being executed by a hardware processor, or executed by a combination of hardware and software modules in the processor, or the like.
  • the memory may include, but is not limited to, a non-volatile memory such as a hard disk drive (HDD) or a solid-state drive (SSD), a random access memory (Random Access Memory, RAM), Erasable Programmable Read-Only Memory (Erasable Programmable ROM, EPROM), Read-Only Memory (Read-Only Memory, ROM) or Portable Read-Only Memory (Compact Disc Read-Only Memory, CD-ROM) and so on.
  • a memory is any storage medium that can be used to carry or store program codes in the form of instructions or data structures, and can be read and/or written by a computer (such as the communication devices shown in this application, etc.), but is not limited thereto.
  • the memory in this embodiment of the present application may also be a circuit or any other device capable of implementing a storage function, for storing program instructions and/or data.
  • the communication device shown in the embodiment of the present application may also have more components and the like than those shown in FIG. 12 , which is not limited in the embodiment of the present application.
  • the processing unit 1101 may be one or more logic circuits, which transmit and receive
  • the unit 1102 may be an input/output interface, also called a communication interface, or an interface circuit, or an interface, and so on.
  • the transceiver unit 1102 may also be a sending unit and a receiving unit, the sending unit may be an output interface, and the receiving unit may be an input interface, the sending unit and the receiving unit are integrated into one unit, such as an input/output interface.
  • the logic circuit 1301 may be a chip, a processing circuit, an integrated circuit or a system on chip (SoC) chip, etc.
  • the interface 1302 may be a communication interface, an input and output interface, and the like.
  • the logic circuit and the interface may also be coupled to each other.
  • the specific connection manner of the logic circuit and the interface is not limited in this embodiment of the present application.
  • the communication device shown in FIG. 13 includes a logic circuit 1301 and an interface 1302 . That is, the above-mentioned processing unit 1101 may be implemented by the logic circuit 1301 , and the transceiver unit 1102 may be implemented by the interface 1302 .
  • the logic circuit and interface may be used to perform the functions or operations performed when the above-mentioned communication apparatus is used as the receiving end.
  • the logic circuit is used for generating at least one first bit block; the interface is used for outputting the at least one first bit block.
  • the interface is used to output the first packet.
  • the interface is configured to output the at least one first bit block after outputting the message start bit block of the first message and in the case that the output of the first message is not completed.
  • the interface is also used to input the second packet.
  • the logic circuit and interface may be used to perform the functions or operations performed when the above-mentioned communication apparatus is used as the sending end.
  • the interface is configured to input at least one first bit block; the logic circuit is configured to adjust the output condition of the second packet according to the flow control information in the at least one first bit block.
  • the interface is further configured to output the second packet according to the output condition of the second packet.
  • the logic circuit is further configured to perform CRC check on the at least one first bit block.
  • the present application also provides a computer program for implementing the operations and/or processing performed by the receiving end in the method provided by the present application.
  • the present application also provides a computer program for implementing the operations and/or processing performed by the sender in the method provided by the present application.
  • the present application also provides a computer-readable storage medium, where computer codes are stored in the computer-readable storage medium, and when the computer codes are run on the computer, the computer is made to perform the operations performed by the receiving end in the method provided by the present application and/or or processing.
  • the present application also provides a computer-readable storage medium, where computer codes are stored in the computer-readable storage medium, and when the computer codes are run on the computer, the computer is made to perform the operations performed by the sender in the method provided by the present application and/or or processing.
  • the present application also provides a computer program product, the computer program product includes computer code or computer program, when the computer code or computer program is run on a computer, the operation performed by the receiving end in the method provided by the present application and/or Processing is executed.
  • the present application also provides a computer program product, the computer program product includes computer code or computer program, when the computer code or computer program is run on a computer, the operation performed by the sending end in the method provided by the present application and/or Processing is executed.
  • the embodiment of the present application also provides a communication system, the communication system includes a sending end and a receiving end, the receiving end can be used to perform step 501 and step 502 (sending step) shown in FIG. 5, etc., the sending end can use In order to perform the receiving steps in steps 502 and 503 shown in FIG. 5 , as well as steps 504 and 505 and so on. It is understandable that the steps performed by the sender and the receiver shown here are only examples, and for other steps performed by the receiver and sender, reference may also be made to the foregoing embodiments, which will not be described in detail here.
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may also be electrical, mechanical or other forms of connection.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the technical effects of the solutions provided by the embodiments of the present application.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as an independent product, may be stored in a computer-readable storage medium.
  • a computer-readable storage medium includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned readable storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, etc. that can store program codes medium.

Abstract

La présente invention divulgue un procédé et un dispositif d'envoi de blocs de bits. Le procédé comprend les étapes consistant à : générer au moins un premier bloc de bits, ledit au moins un premier bloc de bits contenant un champ d'indication, le champ d'indication étant utilisé pour transporter des informations de commande de flux et les informations de commande de flux étant obtenues en fonction de la situation de mise en mémoire cache d'un dispositif de communication ; et envoyer ledit au moins un premier bloc de bits. Le procédé divulgué dans la présente invention peut garantir que le dispositif de communication renvoie les informations de commande de flux en temps opportun, ce qui rend le mode de renvoi plus flexible.
PCT/CN2021/109907 2020-07-31 2021-07-30 Procédé et dispositif d'envoi de blocs de bits WO2022022724A1 (fr)

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CN101621833A (zh) * 2009-08-13 2010-01-06 中兴通讯股份有限公司 一种报文流量控制方法和基站控制器
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CN105871502A (zh) * 2015-01-22 2016-08-17 华为技术有限公司 一种利用以太网信道传输业务信号的方法及通信设备
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US20040085904A1 (en) * 2002-10-31 2004-05-06 Bordogna Mark A. Method for flow control of packets aggregated from multiple logical ports over a transport link
CN101867511A (zh) * 2009-04-20 2010-10-20 华为技术有限公司 流控帧发送方法、相关设备及系统
CN101621833A (zh) * 2009-08-13 2010-01-06 中兴通讯股份有限公司 一种报文流量控制方法和基站控制器
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