WO2022022724A1

WO2022022724A1 - Bit block sending method and device

Info

Publication number: WO2022022724A1
Application number: PCT/CN2021/109907
Authority: WO
Inventors: 孙德胜; 杨春生; 丁力
Original assignee: 华为技术有限公司
Priority date: 2020-07-31
Filing date: 2021-07-30
Publication date: 2022-02-03
Also published as: CN114095435A

Abstract

The present application discloses a bit block sending method and device. The method comprises: generating at least one first bit block, the at least one first bit block comprising an indication field, the indication field being used for carrying flow control information, and the flow control information being obtained according to the caching situation of a communication device; and then sending the at least one first bit block. The method disclosed in the present application can ensure that the communication device feeds back the flow control information in time, so that the feedback mode is more flexible.

Description

Bit block transmission method and device

This application claims the priority of the Chinese patent application with the application number of 202010763618.9 and the application title of "Method and Device for Sending Bit Blocks", which was filed with the Chinese Patent Office on July 31, 2020, the entire contents of which are incorporated into this application by reference .

technical field

The present application relates to the field of communication technologies, and in particular, to a method and apparatus for sending a bit block.

Background technique

In order to ensure that data packets can be received accurately and without errors, communication devices generally adopt a flow control mechanism. If the flow control mechanism is adopted, it can be ensured that the sender will not send packets that the receiver cannot receive.

Fig. 1a shows a schematic flowchart of credit-based flow control. As shown in Fig. 1a, the receiver can send a credit update message to the sender, and the credit update message includes the number of credits. After the sender receives the credit update message, it can send the message to the receiver according to the number of credits included in the credit update message.

Figure 1b shows a schematic flow chart of priority-based flow control. As shown in Figure 1b, the receiver can send priority-based flow control to the sender according to the buffer conditions of the eight queues. PFC) message. After receiving the PFC message, the sender can stop or delay sending messages to the corresponding queue according to the PFC message.

Generally, the typical length of the message may be 256 bytes, and even the length of the message may be longer, wherein the message includes a credit update message or a PFC message. As a result, problems such as packet blocking may occur, so that the sender cannot receive the credit update packet or PFC packet from the receiver in time.

SUMMARY OF THE INVENTION

The present application provides a method and device for sending a bit block, which can ensure that a communication device feeds back flow control information in a timely manner and avoids problems such as packet blocking.

In a first aspect, an embodiment of the present application provides a method for sending a bit block. The method can be applied to a communication device. The method includes: generating at least one first bit block, where the at least one first bit block includes an indication field, the The indication field is used to carry flow control information, and the flow control information is obtained according to the buffer situation of the communication device; the at least one first bit block is sent.

In the embodiment of the present application, the communication device feeds back the flow control information to the opposite end in the form of the first bit block, so that the at least one first bit block is more likely to be sent in time, and the feedback manner is more flexible. Since the possibility of at least one first bit block being sent out in time is increased, the delay for the peer to obtain the first bit block is reduced, the delay of the service flow completion time (FCT) is reduced, and the network utilization. In addition, the length of the at least one first bit block is less than or equal to the length of the message as much as possible. Exemplarily, the length of the at least one first bit block may be 64 bits, 128 bits, 256 bits, etc. It is possible to reduce the transmission delay of the first bit block, so as to avoid that the transmission time of the at least one first bit block is too long and other packets are blocked.

In a possible implementation manner, the first bit block is a non-message bit block.

In this embodiment of the present application, the first bit block is a non-message bit block, and the non-message bit block includes a non-message start bit block. For example, the value carried by the preset field in the non-message start bit block is different from the value carried by the preset field in the message start bit block. Thereby, the non-message start bit block and the message start bit block can be distinguished; or, when at least one first bit block includes at least one 0-bit block, the value carried by the preset field of the 0-bit block is used, the O-bit blocks can also be distinguished from other O-bit blocks. Moreover, the at least one first bit block can also be inserted into the bit stream of the first message currently being sent by the communication device. It is avoided that the at least one first bit block waits for the first packet to be sent before it can be sent, thereby reducing the waiting delay of the at least one first bit block, reducing the delay of the FCT, and improving the network utilization rate.

In a possible implementation manner, the first bit block is a packet bit block.

In this embodiment of the present application, the first bit block is a message bit block. For example, when the communication device needs to feed back flow control information, it just needs to send the first message. In this case, the communication apparatus may feed back flow control information in the first packet.

In a possible implementation manner, the message bit block is the message start bit block, the data bit block corresponding to the message start bit block, the end bit block corresponding to the message start bit block, the message end bit block, At least one of the start bit block corresponding to the message end bit block or the data bit block corresponding to the message end bit block.

In this embodiment of the present application, not only can the message start bit block and the non-message start bit block be distinguished by the preset field, but also the message end bit block corresponding to the message start bit block can be distinguished from the non-message start bit block by the preset field. The non-message end bit block corresponding to the message start bit block. Alternatively, the message data bit block corresponding to the message start bit block and the non-message data bit block corresponding to the non-message start bit block can also be distinguished by a preset field.

In a possible implementation manner, the method further includes: sending a first packet, where the first packet is composed of packet bit blocks.

In the embodiment of the present application, exemplarily, the first packet may include a packet start bit block and a data bit block corresponding to the packet start bit block; or, the first packet may include a packet start bit block, the packet The data bit block corresponding to the message start bit block and the end bit block corresponding to the message start bit block.

In a possible implementation manner, sending the at least one first bit block includes: sending the at least one first bit block after sending the message start bit block of the first message and the first message has not been sent. piece.

In this embodiment of the present application, since the first bit block is a non-packet bit block, and the first packet is composed of packet bit blocks, even if the first bit block is inserted into the first packet, the opposite end can The first bit block is distinguished from the first message. Therefore, the opposite end can obtain the information fed back by the communication apparatus according to the at least one first bit block. At the same time, the first bit block is inserted into the first message and sent out, which further reduces the waiting delay of the at least one first bit block, reduces the delay of the FCT, and improves the network utilization rate.

In a possible implementation manner, at least one first bit block includes a non-packet start bit block, and a preset field in the non-packet start bit block carries the first value.

In a possible implementation manner, a preset field in the packet start bit block carries the third value.

In a possible implementation manner, at least one first bit block includes at least one sequence ordered set (O) bit block, and a preset field in each O-bit block in the at least one O-bit block carries the second numerical value.

In this embodiment of the present application, the communication apparatus may feed back the flow control information through at least one 0-bit block. Optionally, the at least one 0-bit block may also be inserted into the bit stream of the second packet being sent by the communication apparatus. Exemplarily, the at least one 0-bit block may include one 0-bit block, two 0-bit blocks, or three 0-bit blocks, etc., which is not limited in this embodiment of the present application.

In a possible implementation manner, the at least one first bit block further includes: at least one data bit block corresponding to a non-packet start bit block; or an end bit block corresponding to a non-packet start bit block; or a non-packet start bit block At least one data bit block corresponding to the start bit block and an end bit block corresponding to the non-message start bit block.

In the embodiment of the present application, the data bit block corresponding to the non-message start bit block may also be referred to as a non-message data bit block, and the end bit block corresponding to the non-message start bit block may also be referred to as a non-message end bit block.

In a possible implementation manner, when the at least one first bit block includes a non-packet start bit block and a non-packet end bit block, sending the at least one first bit block includes: sequentially sending the non-packet start bits block and non-message end bit block; or send non-message end bit block and non-message start bit block in sequence.

In a possible implementation manner, the non-packet bit block may further include at least one of a non-packet end bit block, a data bit block corresponding to the non-packet end bit block, or a start bit block corresponding to the non-packet end bit block One.

In the embodiment of the present application, the data bit block corresponding to the non-message end bit block may also be called a non-message data bit block, and the start bit block corresponding to the non-message end bit block may also be called a non-message start bit block.

In a possible implementation manner, the flow control information includes information on the number of credits or the duration information for which at least one queue is stopped from sending packets.

In a possible implementation manner, at least one of the first bit blocks further includes a cyclic redundancy check (cyclic redundancy check, CRC) field.

In this embodiment of the present application, the CRC field may be used to carry CRC information, and the CRC information may be used to protect flow control information and the like in the at least one first bit block.

In a possible implementation manner, the first bit block is a P1B/P2B bit block, P1 represents the number of payload bits of the first bit block, P2 represents the total number of bits of the first bit block, and P2-P1 represents the number of bits of the first bit block. The number of sync header bits for the first bit block.

In a possible implementation manner, the value of P1 is any one of the following: 64, 128, 256, or 512; the value of P2-P1 is any one of the following: 1, 2, or 3.

The method provided in the first aspect of the present application may be applied to a communication device, and the communication device may include a receiving end.

In a second aspect, an embodiment of the present application provides a method for receiving a bit block. The method includes: receiving at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information , the flow control information is obtained according to the buffering situation of the receiving end; and the sending situation of the second packet is adjusted according to the flow control information.

In the embodiment of the present application, the communication device may also obtain a block type field of at least one first bit block, and adjust the sending situation of the second message according to the type field, the value carried by the preset field, and the indication field . Exemplarily, if the block type field of at least one first bit block is 0x4B, and the preset field carries 0x06, it means that the obtained at least one first bit block is an 0-bit block, and the function of the 0-bit block is to be used for If the flow control information is fed back, the communication device can adjust the sending situation of the second packet according to the indication field in the 0-bit block. Exemplarily, if the block type field of at least one first bit block is 0x78, and the preset field carries 0xF5, the communication device can adjust the sending situation of the second message according to the indication field in the non-message start bit block.

In a possible implementation manner, at least one first bit block further includes a CRC field, where the CRC field is used to carry CRC information.

In a possible implementation manner, adjusting the sending situation of the second packet according to the flow control information includes: adjusting the data volume of the second packet according to the number of credits; or, according to the duration information of at least one queue being stopped from sending the packets Adjust the corresponding queue to stop sending the second packet.

In a possible implementation manner, adjusting the sending situation of the second packet according to the flow control information includes: adjusting the second packet according to the flow control information when the CRC information in the at least one first bit block is successfully checked. the sending of the text.

In this embodiment of the present application, for the description of the first bit block, the indication field, the message bit block, or the non-message bit block, etc., reference may be made to the introduction of the first aspect, which is not described in detail here.

The method provided in the second aspect of the present application can be applied to a communication device, and the communication device may include a transmitter.

For the beneficial effects of the second aspect, reference may be made to the beneficial effects of the first aspect, which will not be repeated here.

In a third aspect, the present application provides a communication apparatus for performing the method in the first aspect or any possible implementation manner of the first aspect. The communication apparatus includes corresponding means for performing the method of the first aspect or any possible implementation of the first aspect.

For example, the communication device may include a transceiving unit and a processing unit. It can be understood that, for the specific implementation of the transceiver unit and the processing unit, reference may be made to the following specific embodiments, which will not be described in detail here.

In a fourth aspect, the present application provides a communication apparatus for performing the method in the second aspect or any possible implementation manner of the second aspect. The communication device includes corresponding means for performing the method of the second aspect or any possible implementation of the second aspect.

In a fifth aspect, the present application provides a communication device, where the communication device includes a processor, and the processor can be configured to execute the method shown in the first aspect or any possible implementation manner of the first aspect.

In the embodiments of the present application, in the process of executing the above method, the process of sending a message, receiving a message, or sending at least one first bit block (hereinafter collectively referred to as information) in the above method can be understood as the information output by the processor process, and the process by which the processor receives input information. In outputting information, the processor outputs the information to the transceiver for transmission by the transceiver. After the information is output by the processor, additional processing may be required before reaching the transceiver. Similarly, when the processor receives incoming information, the transceiver receives that information and feeds it into the processor. Further, after the transceiver receives the information, the information may require additional processing before being input to the processor.

Based on the above principles, exemplary, for example, sending at least one first bit block may be understood as the processor outputting the at least one first bit block. For another example, sending the first packet may be understood as the processor outputting the first packet and so on.

For the sending and/or receiving operations involved in the processor, if there is no special description, or if it does not contradict its actual function or internal logic in the relevant description, it can be generally understood as the processor outputting and receiving, input, etc.

In the implementation process, the above-mentioned processor may be a processor specially used to execute these methods, or may be a processor that executes computer instructions in a memory to execute these methods, such as a general-purpose processor. For example, the processor may also be configured to execute a program stored in the memory, which, when executed, causes the communication apparatus to perform the method shown in the first aspect or any possible implementation of the first aspect.

In one possible implementation, the memory is located outside the above-mentioned communication device.

In one possible implementation, the memory is located within the above-mentioned communication device.

In this embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together.

In a possible implementation manner, the communication device further includes a transceiver, where the transceiver is configured to receive a message or send a message, and the like.

In this embodiment of the present application, for example, the processor may be configured to generate at least one first bit block; the transceiver may be configured to send at least one first bit block; or, to send a first packet; or, to receive a second messages, etc.

In a sixth aspect, the present application provides a communication device, where the communication device includes a processor, and the processor can be configured to execute the method shown in the second aspect or any possible implementation manner of the second aspect.

In this embodiment of the present application, for a specific description of the processor, reference may be made to the description of the fifth aspect, which is not described in detail here. Exemplarily, for example, receiving the at least one first bit block may be understood as the processor receiving the input at least one first bit block. For another example, sending the second packet may be understood as the processor outputting the second packet and so on.

In the implementation process, the above-mentioned processor may be a processor specially used to execute these methods, or may be a processor that executes computer instructions in a memory to execute these methods, such as a general-purpose processor. For example, the processor may also be configured to execute a program stored in the memory which, when executed, causes the communication apparatus to perform the method as shown in the second aspect or any possible implementation of the second aspect above.

In a possible implementation manner, the communication device further includes a transceiver, where the transceiver is configured to receive a message or send a message.

In the embodiment of the present application, for example, the processor may be configured to adjust the sending situation of the second packet according to the flow control information included in the at least one first bit block; or, the processor may also be configured to The CRC information in the one-bit block is checked, etc. The transceiver may be configured to receive at least one first bit block; or, receive a first message; or, send a second message, and so on.

In a seventh aspect, the present application provides a communication device, the communication device includes a logic circuit and an interface, the logic circuit is configured to generate at least one first bit block, and the interface is configured to output the at least one first bit block.

In a possible implementation manner, the interface may also be used to output the first packet and/or input the second packet.

In an eighth aspect, the present application provides a communication device, the communication device includes a logic circuit and an interface, the interface is used to input at least one first bit block, and the logic circuit can be used to adjust the sending of the first packet according to the flow control information condition.

In a possible implementation manner, the logic circuit may also be used to check the CRC information in the at least one first bit block.

In a possible implementation manner, the interface may also be used to input the first packet and/or output the second packet.

In a ninth aspect, the present application provides a computer-readable storage medium, the computer-readable storage medium is used to store a computer program, which, when it runs on a computer, enables the first aspect or any possible implementation of the first aspect The method shown is executed.

In a tenth aspect, the present application provides a computer-readable storage medium, the computer-readable storage medium is used to store a computer program, which enables the second aspect or any possible implementation manner of the second aspect when it runs on a computer. The method shown is executed.

In an eleventh aspect, the present application provides a computer program product, the computer program product comprising a computer program or computer code, which, when run on a computer, makes the above-mentioned first aspect or any possible implementation of the first aspect as shown method is executed.

In a twelfth aspect, the present application provides a computer program product, the computer program product comprising a computer program or computer code, which, when run on a computer, makes the second aspect or any possible implementation of the second aspect described above method is executed.

In a thirteenth aspect, the present application provides a computer program, when the computer program runs on a computer, the method shown in the first aspect or any possible implementation manner of the first aspect is executed.

In a fourteenth aspect, the present application provides a computer program, when the computer program runs on a computer, the method shown in the second aspect or any possible implementation manner of the second aspect is executed.

A fifteenth aspect, the present application provides a communication system, the communication system includes a sending end and a receiving end, the receiving end can be used to execute the method shown in the first aspect or any possible implementation manner of the first aspect, the The sending end may be configured to execute the method shown in the second aspect or any possible implementation manner of the second aspect.

Description of drawings

Figure 1a shows a schematic flowchart of a credit-based flow control provided by an embodiment of the present application;

FIG. 1b shows a schematic flowchart of a priority-based flow control provided by an embodiment of the present application;

2a is a schematic diagram of a format of a bit block provided by an embodiment of the present application;

FIG. 2b is a schematic diagram of a format of another bit block provided by an embodiment of the present application;

3a is a schematic diagram of the format of a 0-bit block provided by an embodiment of the present application;

3b to 3d are schematic diagrams of a method for distinguishing a message bit block and a non-message bit block provided by an embodiment of the present application;

FIG. 4 is a schematic diagram of a layered architecture of a 40G/100G Ethernet provided by an embodiment of the present application;

5 is a schematic flowchart of a method for sending a bit block provided by an embodiment of the present application;

6a to 6d are schematic diagrams comparing message bit blocks and non-message bit blocks provided by embodiments of the present application;

7a and 7b are schematic diagrams of formats of a 0-bit block provided by an embodiment of the present application;

7c is a schematic diagram of transmission of a 0-bit block provided by an embodiment of the present application;

FIG. 7d is a schematic diagram of changes in packet length and link utilization provided by an embodiment of the present application;

8a is a schematic diagram of the format of at least one first bit block provided by an embodiment of the present application;

8b and 8c are schematic diagrams of transmission of a non-message start bit block and a non-message end bit block provided by an embodiment of the present application;

9a and 9b are schematic diagrams of formats of at least one first bit block provided by an embodiment of the present application;

FIG. 9c is a schematic diagram of transmission of at least one first bit block provided by an embodiment of the present application;

10a and 10b are schematic diagrams of formats of at least one first bit block provided by an embodiment of the present application;

10c is a schematic diagram of transmission of at least one first bit block provided by an embodiment of the present application;

FIG. 11 is a schematic structural diagram of a communication device provided by an embodiment of the present application;

FIG. 12 is a schematic structural diagram of another communication device provided by an embodiment of the present application;

FIG. 13 is a schematic structural diagram of another communication apparatus provided by an embodiment of the present application.

detailed description

In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described below with reference to the accompanying drawings.

The terms "first" and "second" in the description, claims and drawings of the present application are only used to distinguish different objects, rather than to describe a specific order. Furthermore, the terms "comprising" and "having", and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device, etc. that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, etc., or optional It also includes other steps or units inherent to these processes, methods, products or devices, etc.

Reference herein to an "embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor a separate or alternative embodiment that is mutually exclusive of other embodiments. Those skilled in the art will understand, both explicitly and implicitly, that the embodiments described herein may be combined with other embodiments.

In this application, "at least one (item)" means one or more, "plurality" means two or more, "at least two (item)" means two or three and three In the above, "and/or" is used to describe the relationship of related objects, indicating that there can be three kinds of relationships, for example, "A and/or B" can mean: only A exists, only B exists, and both A and B exist three A case where A and B can be singular or plural. The character "/" generally indicates that the associated objects are an "or" relationship. "At least one of the following" or similar expressions, refers to any combination of these items. For example, at least one (a) of a, b or c, can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c" ".

The terms involved in this application are introduced in detail below.

1. Credit-based flow control

As shown in FIG. 1a, the receiving end sends a credit update message to the sending end, and the credit update message includes the credit quantity, and the credit quantity can be determined according to the receiving buffer of the receiving end. After the sender receives the credit update message, it can send the message to the receiver according to the number of credits included in the credit update message. Optionally, when the number of credits is sufficient, the sender can send the message immediately; and when the number of credits is insufficient, the sender can buffer the message and accumulate the number of credits. In other words, the number of credits sent by the receiver can be used to instruct the sender to send a message corresponding to the amount of data. For example, a credit amount may represent a 16-byte message. If the credit amount is 5, the sender may send a message with less than or equal to 80 (16*5=80) bytes.

2. Priority-based flow control (PFC)

In the IEEE802.1Qbb standard, 8 virtual channels are allowed to be created on an Ethernet link, and each virtual channel is assigned an IEEE802.1P priority, that is, 8 queues with priority. As shown in Fig. 1b, the sender and the receiver can respectively include 8 queues. Exemplarily, when the buffer of queue 5 in the receiving end exceeds the buffering threshold, the receiving end may send a PFC message to the sending end, and the PFC message (or may also be referred to as a PFC frame) includes the time when the queue stops sending messages. and the ID of the corresponding queue. Therefore, after receiving the PFC message, the sender stops or delays sending the message through the corresponding queue according to the PFC message. For the receiver, the receiver stops or delays receiving the message through the corresponding queue.

3. Message

A message is a unit of data exchanged and transmitted in a network. Exemplarily, the message may include destination MAC address (destination address) information, source MAC address (source address) information, length/type (length/type) information, data information and frame check sequence (frame check sequence, FCS). )Wait. Alternatively, the message may further include a preamble (preamble), a frame start delimiter (startofframedelimiter, SFD) and the like.

Figure 4 shows a schematic diagram of a layered architecture in 40G/100G Ethernet. Among them, the function of the media access control (MAC) layer is to verify the packets; the function of the reconciliation sublayer (RS) is to provide a kind of media independent interface (some kind of media independent interface). , xMII) and the signal mapping mechanism between the MAC layer; the function of the physical coding sublayer (PCS) is to encode the signal received from xMII; the physical media access sublayer (physical media attachment, PMA) Its function is to be responsible for parallel-serial and serial-to-parallel conversion of signals; the function of the physical media dependent layer (PMD) is to complete the interaction between the high-speed analog signal generated by the PMA and the peripheral medium. It can be understood that the functions introduced in this application are only examples, and in specific implementation, each layer may further include other functions, etc., which are not limited in this application.

Generally, in units of 8 bits, every 8 bits of the message are sequentially mapped to channel 0 to channel 7 of the xMII interface. Then, the PCS performs 64B/66B encoding based on the signal received from the xMII interface, such as adding a 2-bit sync header to form a 64B/66B bit block. Exemplarily, a 7-byte preamble and a 1-byte SFD can be encoded as a start bit block; a 6-byte destination MAC address and a 2-byte partial source MAC address are encoded as the first data bit block, By analogy, several data bit blocks are formed. Optionally, to mark the end of the packet, the PCS will add an end bit block at the end of the packet. Optionally, the end bit block may contain FCS.

In this application, when the PCS performs 64B/66B encoding, the value of the preset field of the start bit block may be set to the first value or the third value. Wherein, if the value of the preset field of the start bit block is the first value, the start bit block may also be called a non-message start bit block, and the value of the preset field of the start bit block is the third value When the value is set, the start bit block may also be referred to as the message start bit block. Optionally, when the PCS performs 64B/66B encoding, the value of the preset field of the end bit block may also be set to different values to distinguish the message end bit block and the non-message end bit block.

Optionally, information such as operation management and maintenance may be encoded as 0-bit blocks when 64B/66B encoding is performed through the PCS. Optionally, the value of the preset field of the 0-bit block may be the second value.

It can be understood that the above-described encoding method is only one encoding method, and the present application is also applicable to other types of encoding methods.

4. The first bit block

In this application, the first bit block may be a P1B/P2B bit block, or a P1B/P2B code block, or a P1B/P2B block, or a P1B/P2B encoding block, or a P1B/P2B encoding block. It can be called P1B/P2B bitstream, etc. Among them, P1 represents the number of payload bits of the first bit block, P2 represents the total number of bits of the first bit block, P2-P1 represents the number of synchronization header bits of the first bit block, P1 and P2 are positive integers, and P2 is greater than P1.

In this application, the P1B/P2B bit block may be a 64B/66B bit block; a 128B/129B bit block; or, alternatively, a 128B/130B bit block; alternatively, a 128B/131B bit block; Or, 256B/258B bit block; Or, 512B/513B bit block; Or, 512B/514B bit block; Or, 512B/515B bit block, etc.

As an example, Figure 2a shows different types of 64B/66B bit blocks. As shown in Figure 2a, the two bits "10" or "01" in the header are synchronization header bits, and the last 64 bits are payload bits, which can be used to carry payload data and the like. Each row in Figure 2a represents a code pattern definition, where D0-D7 represent data bytes, C0-C7 represent control bytes, S0 represent the beginning of a MAC frame, and T0-T7 represent the end of a MAC frame.

As an example, FIG. 2b shows a 128B/131B bit block, or it may also be called a flow control unit (flow control unit, flit). The following will take flit as an example to describe various embodiments provided in this application. As shown in Figure 2b, H (header) represents the synchronization header of the flit, and different values of H are used to indicate that the flit is a control bit block (also called a control flit) or a data bit block (also called a load) flit (payload flit)), the length of the H can be 1 bit, 2 bits, or 3 bits, etc. The different values of the Type field are used to identify the type of the control bit block, such as the message start bit block (also called message start flit) or O-bit block (also called feedback flit or Oflit, etc.), etc. . The length of the type can be at least 2 bits. Optionally, different values of the type field can also be used to identify the type of the control bit block as message start flit, credit update flit or PFC flit (credit update flit or PFC flit are collectively referred to as Off), etc.

Optionally, the flit shown in Figure 2b(1) can generally be used to carry request, control or management information. Figures 2b(2) to 2b(4) show that multiple flits carry one packet. The difference between them mainly lies in the protection methods of different CRCs. Figure 2b (2) is that each flit is protected by CRC-X (for example, X=16, that is, CRC-16), and Figure 2b (3) is the message The start flit is protected by CRC-X, and the loads flit0 to N are protected by CRC-Y (for example, Y=32, that is, CRC-32). Figure 2b(4) shows that both the start flit and the load flit of the message are protected by CRC-Y.

It can be understood that the example shown above is illustrated by using different values of the type field to identify the start bit block or the 0-bit block of the message as an example. In specific implementation, the different values of the type field can also be used for Identifying the message start bit block, the message end bit block, or the O bit block, etc., will not be described in detail here. Alternatively, the type field can be used to identify the start bit block and the end bit block, and then other fields can be used to distinguish the start bit block as a message start bit block or a non-message start bit block, or, other fields can be used to distinguish the end bit block as the end of the message. A block of bits or a block of non-end of message bits.

In this application, the generation position of the first bit block is not limited, and the communication apparatus can either generate at least one first bit block at the xMII interface; or, can also generate at least one first bit block at the PCS layer. In other words, at least the first bit block may be a P1B/P2B bit block generated at the PCS; alternatively, the at least one first bit block may also be a bit block including control characters or data characters generated through an xMII interface. Blocks are encoded as P1B/P2B bit blocks after passing through the PCS sublayer.

5. Message bit blocks and non-message bit blocks

In this application, the message bit block may include a boundary bit block and a data bit block, and the boundary bit block may be at least one of a start bit block and an end bit block. Therefore, the bit blocks corresponding to a message may be: A, start bit block + data bit block; B, start bit block + data bit block + end bit block; C, data bit block + end bit block. Exemplarily, if the message bit block is the message start bit block, the data bit block corresponding to the message start bit block, the end bit block corresponding to the message start bit block, the message end bit block, the message end bit block At least one of the start bit block corresponding to the bit block or the data bit block corresponding to the message end bit block.

In a possible implementation manner, the non-packet bit block may be another bit block other than the packet bit block, for example, it may be an 0-bit block transmitted between packets.

In another possible implementation manner, the non-message bit block may also be implemented by using a boundary bit block. Of course, the non-message bit block may also be implemented by using a boundary bit block and a data bit block together. In this case, in order to distinguish the message bit block and the non-message bit block, the preset field of the boundary bit block in the non-message bit block can use a preset value (such as the first value), and the preset field can be used to Distinguish between message boundary bit blocks and non-message boundary bit blocks. For example, the preset field of the start bit block can be used to distinguish, that is, the message start bit block and the non-message start bit block can be distinguished, or the preset field of the end bit block can also be used to distinguish, that is, the message end block can be distinguished. bit blocks and non-end of message bit blocks.

The following is a detailed description of whether the non-message bit block includes the boundary bit block:

Manner 1: The non-message bit block does not include the boundary bit block.

The message bit block includes a boundary bit block and a data bit block corresponding to the boundary bit block;

The non-message bit block is another bit block other than the message bit block, for example, it may be an 0-bit block.

Manner 2: The non-message bit block includes the boundary bit block.

The message bit block includes a message boundary bit block and a data bit block corresponding to the message boundary bit block;

The non-message bit block is another bit block other than the message bit block, for example, it may be an 0-bit block, a non-message boundary bit block, a data bit block corresponding to a non-message boundary bit block, and a non-message boundary bit block corresponding to The boundary bit block etc. Specifically, the non-message bit block may include a 0-bit block, a non-message start bit block, a data bit block corresponding to a non-message start bit block, an end bit block corresponding to a non-message start bit block, and a non-message end bit block. A bit block, a data bit block corresponding to a non-packet end bit block, a start bit block corresponding to a non-packet end bit block, and the like. For example it could be:

A. Non-message start bit block;

B. The data bit block corresponding to the non-message start bit block + the non-message start bit block;

C, the non-message start bit block + the data bit block corresponding to the non-message start bit block + the end bit block corresponding to the non-message start bit block;

D. The non-message start bit block + the end bit block corresponding to the non-message start bit block;

E. Non-message end bit block;

F. The data bit block corresponding to the non-message end bit block + the non-message end bit block;

G. The start bit block corresponding to the non-message end bit block + the data bit block corresponding to the non-message end bit block + the non-message end bit block;

H. The start bit block corresponding to the non-message end bit block + the non-message end bit block;

1. Non-message start bit block+non-message end bit block;

J, non-message start bit block + non-message start bit block corresponding data bit block + non-message end bit block;

Here, the data bit block corresponding to the non-message start bit block may also be called a non-message data bit block, and the end bit block corresponding to the non-message start bit block may also be called a non-message end bit block, and the non-message end bit block The start bit block corresponding to the bit block may also be referred to as a non-packet start bit block, and the data bit block corresponding to the non-packet end bit block may also be referred to as a non-packet data bit block, and so on.

The above is only an example, and other forms may also be used to implement, which will not be repeated here. In addition, it should be noted that the transmission order between the bit blocks can also be adjusted. For example, the end bit block may be sent first, and then the start bit block may be sent, or the end bit block may be sent first, and then the start bit block may be sent.

In other words, the preset field can be used to identify a block of end-of-message bits or a block of non-end-of-message bits. For example, the message bit block includes a preset field, and the non-message bit block includes a preset field, and the value carried by the preset field can be used to identify the message start bit block or the non-message start bit block; or, the The value carried by the preset field can be used to identify the end-of-message block or the non-end-of-message block. Exemplarily, the value carried by the preset field may include a first value or a third value, where the first value corresponds to a non-packet bit block, and the third value corresponds to a packet bit block.

Corresponding to the various embodiments provided in this application, at least one first bit block includes a preset field, and the preset field can be used to identify the at least one first bit block as a message bit block or a non-message bit block. Exemplarily, the value carried by the preset field may be used to identify the message start bit block or the non-message start bit block; or, the value carried by the preset field may be used to identify the message end bit block or non-message end block. bit block. Alternatively, the preset field may be used to identify the role of the 0-bit block as carrying flow control information or other information.

In this application, a preset field may be understood as a preset area or a preset position in the bit block, and the preset area or preset position carries a numerical value. This application does not limit which region or position in the bit block the preset field is specifically located in. The preset field may be located in at least one of a start bit block, an end bit block or a data bit block.

In order to understand the difference between the message bit block and the non-message bit block more vividly, as shown in Figure 3b to Figure 3d.

Figures 3b and 3c show different values of the preset fields in the non-message start bit block. The preset fields in Figure 3b can be carried in the D1 area, and the preset fields in Figure 3c can be carried in the D7 area, or, It may also be said that the preset field in FIG. 3b is located in the D1 area, and the preset field in FIG. 3c is located in the D7 area. As shown in Figure 3b, the preset field in the non-message start bit block carries 0xE5, and the preset field in the message start bit block carries 0x55. As shown in Figure 3c, the preset field in the non-message start bit block carries 0xC5, and the preset field in the message start bit block carries 0xD5 (bit transmission sequence is 1010 1011). Among them, 0xE5 and 0xC5 can be understood as the first value, and 0x55 and 0xD5 can be understood as the third value.

It can be understood that FIG. 3a to FIG. 3c are only an example. In a specific implementation, the preset field may also be located in other areas. The preset field in FIG. 3b may also be any area or multiple areas in D2 to D6. This application also does not limit the value of the first value carried by the preset field of the non-message bit block, etc., as well.

It can be understood that the comparison schematic diagrams shown in FIG. 3b and FIG. 3c are illustrated by taking the preset field located in the starting bit block as an example, but in this application, the preset field can also be located in the ending bit block, that is, by using the preset field in the ending bit block. Different values of the fields are set to distinguish the end-of-message block and the non-end-of-message block. For the specific description that the preset field is located in the end bit block, reference may be made to FIG. 3b and FIG. 3c, which will not be described in detail here. Without loss of generality, various embodiments provided by the present application will be illustrated below by taking the preset field located in the start bit block as an example.

Figure 3d shows different values of preset fields in flit. Exemplarily, when the preset field carries 00001, it means that the flit is a packet start flit. When the default field carries 01000, it indicates that the flit is Oflit. In other words, when the communication device feeds back its buffer status, it may not simultaneously feed back the number of credits and the information on the duration of at least one queue being stopped from sending packets. Therefore, the preset field can use two different values to distinguish the start of the packet flit. and Oflit will do. It can be understood that this description is also applicable to the credit update bit block and the PFC bit block in the various embodiments shown below. For the specific description of flit, reference may also be made to FIG. 10a, which will not be described in detail here. Table 1 shows an example of a method for distinguishing between non-message bit blocks and message bit blocks.

Table 1

In this application, the preset field can not only be used to identify message bit blocks and non-message bit blocks. Optionally, different values of the preset field may be used to identify the message bit block, the credit update bit block and the PFC bit block. Among them, the credit update bit block and the PFC bit block can be understood as non-message bit blocks. Exemplarily, when the preset field carries 00001, it means that the flit is a packet start flit. When the preset field carries 00101, it means that the flit is a credit update flit, which can also be called a non-message bit block or an 0-bit block, etc.; when the preset field carries 00110, it means that the flit is a PFC flit, or it can be It is called a non-message bit block or an O-bit block, etc. As shown in Table 2 is an example of the method of distinguishing the message bit block, the credit update bit block and the PFC bit block.

Table 2

It can be understood that the values of the preset fields shown above are only examples. In specific implementation, the preset fields that distinguish the non-message start bit block and the message start bit block can also be located in other areas, or can also be used for Bearing other numerical values, etc., are not limited in this application. As long as the same field can be used to distinguish non-message bit blocks and message bit blocks by taking different values.

7. O-bit block

The preset fields shown above are mainly used to identify message bit blocks and non-message bit blocks, however, for control bit blocks such as 0-bit blocks, the preset fields can be used to identify the 0-bit block. carried information. Optionally, the different values carried by the preset fields in the 0-bit block are used to identify that the 0-bit block is used to carry flow control information or retransmission control information. In other words, different values carried by the preset fields correspond to different information, and one value corresponds to one type of information. For example, when the preset field in the 0-bit block carries the second value, the 0-bit block is used to carry flow control information. When the preset field in the 0-bit block carries the fourth value, the 0-bit block may be used to carry retransmission control information, etc. (only an example).

The preset field in the 0-bit block in FIG. 3a may be carried in the 00 area, or it may also be called that the preset field in the 0-bit block is located in the 00 area, or the specific position of the preset field may be located in the 00 area. In this application, the preset field may carry a second value, such as 0x06. That is, when the preset field in the 0-bit block carries 0x06, it means that the 0-bit block is used for feeding back flow control information.

It can be understood that FIG. 3a only shows the O-bit block corresponding to FIG. 2a, and the specific description of the Offit corresponding to FIG. 2b will not be described in detail here.

It can be understood that a certain field described in this application carries a certain value, and it can also be understood that the value of the certain field is a certain value. For this description, the following embodiments are also applicable.

7. Bit position

Exemplarily, as shown in Figure 2a, for the data bit block (the first row in Figure 2a), 8 bits between bit positions 2 to 9 are the D0 area, and bit positions 10 to 17 8 bits are the D1 area. For the S0 bit block, the 8 bits between the bit positions 2 and 9 are 0x78 (ie, the block type field is 0x78), and the 8 bits between the bit positions 10 and 17 are the D1 area. For the T7 bit block, the 8 bits between the bit positions 2 and 9 are 0xFF (ie, the block type field is 0xFF), and the 8 bits between the bit positions 10 and 17 are the D0 area. It can be understood that the starting bit positions of the bit blocks shown in this application are all 0s. If the start bit position is 1, the bit position occupied by 0x78 of the S0 bit block may be 8 bits between bit positions 3 to 10. In other words, the present application does not limit the starting bit position.

Only the description of the bit position is shown here, but the application does not limit the relationship between the bit position and the bit transmission order. Exemplarily, for the S0 bit block shown in Figure 2b, the 8 bits between bit positions 2 to 9 are 0x78, but for the specific bit position of the corresponding 8 bits "0111 1000", this application does not limited. For example, the 8 bits whose bit positions are between 2 and 9 in the S0 bit block may be 0111 1000 in sequence, or 0001 1110 in sequence, etc., which is not limited in this application.

When the receiver sends a credit update message or PFC message to the sender, because the length of the message is generally long, the credit update message or PFC message sent by the receiver may be blocked. Especially when the receiving end is sending other messages (such as the first message), in this case, the receiving end needs to wait for the message to be sent before sending the credit update message or the PFC message. Exemplarily, the length of the message is 256 bytes, that is, the credit update message or the PFC message needs to wait for a message sending time of 256 bytes. In the worst case (worst case), the PFC message may need to wait for a message sending time of the longest Ethernet message length, such as 1518 bytes, before sending the credit update message or PFC message. In addition, the length of the credit update message itself also increases the delay for the receiver to send the credit update message. That is, once the credit update message is delayed, the sender cannot send the message in time, so the flow completion time (FCT) of the service flow will be prolonged, resulting in low network utilization.

In view of this, the present application provides a method and device for sending a bit block, the receiving end can not only indicate its buffer status to the sending end, but also can feed back flow control information in the form of bit blocks, so that the flow control information can be sent out in time is more likely, and the feedback method of flow control information is more flexible. Further, feeding back the flow control information in the form of bit blocks can also interrupt the first packet currently being sent by the receiving end, reduce the delay of the flow control information, reduce the delay of the FCT, and improve the network utilization rate.

The method provided in this application can not only be applied to high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIe) or flit-based information technology (information technology, IT) network, but also can be applied to Ethernet, Internet protocol (internet protocol, IP) network, packet transport network (PTN), agile transport network (ATN), sliced packet network (slicing packet network, SPN), etc., for the methods provided in this application can be applied to The network is not limited. Specifically, the method provided in this application may be applied to a communication device, and the communication device may be a device supporting PCIe, flit, or Ethernet technology, or the like. Exemplarily, the communication device may be any form of computer, server, switch (or referred to as switching device, switching chip, etc.), router, network card, etc. The specific form of the communication device is not limited in this application.

Optionally, the method provided in this application may be applied to two communication apparatuses, for example, the two communication apparatuses may include a sending end and a receiving end. Optionally, the specific form of the transmitting end and the receiving end may refer to the above-mentioned form of the communication device. Optionally, the sending end and the receiving end may also be understood as any two interfaces. In other words, the method provided in this application can be applied to a link-level (also referred to as point-to-point) scenario, where the link-level scenario may include a sender and a receiver, and During the transmission of a packet (such as the first packet or the second packet or at least one first bit block, etc.), the packet will not be lost, but problems such as transmission errors may occur.

In this embodiment of the present application, the sending end may be understood as a communication device that sends the second message, and the receiving end may be understood as a communication device that receives the second message. Alternatively, in this application, the sending end may be understood as a communication device that receives the first message, and the receiving end may be understood as a communication device that sends the first message. It is understandable that the message shown in the present application may also be called a packet or a frame, etc., and other names of the message are not limited in this embodiment of the present application.

FIG. 5 is a schematic flowchart of a method for sending a bit block provided by an embodiment of the present application. As shown in FIG. 5 , the method includes:

501. The receiving end generates at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information, where the flow control information is obtained according to the buffering situation of the receiving end.

In the embodiment of the present application, the buffering situation of the receiving end includes the buffering size of the receiving end, or the buffering size of the buffering queue of the receiving end, and the like. Or, the cache size of the cache queue of the receiving end includes whether the cache size of the cache queue of the receiving end exceeds a cache threshold and the like. Thus, according to the buffering situation of the receiving end, the receiving end can obtain the flow control information. For example, the flow control information may include information on the number of credits or the duration of time when at least one queue is stopped from sending packets. Optionally, the number of credits may be determined according to the buffer size of the receiving end, and one credit (credit) may correspond to a packet of a certain amount of data. For example, one credit may correspond to a 16-byte message, etc., which is not limited in this embodiment of the present application. Optionally, the duration information of at least one queue being stopped from sending packets may be determined according to the buffer size of the buffer queue of the receiving end. For the description of the cache queue, reference may be made to the description of FIG. 1b above, and details are not described here. The time unit of the duration information may be the time required for the physical layer chip to send 512-bit data. In other words, one time unit of the duration information indicates that the time when the corresponding queue of the receiving end suspends receiving packets is the time required for the physical layer chip of the sending end to send 512-bit data. In this embodiment of the present application, the maximum time of the duration information may be 0xFFFF.

In this embodiment of the present application, the flow control information may include, in addition to information on the duration of at least one queue that is stopped from sending packets, an identifier of the at least one queue. For example, the flow control information may include information on the duration of a queue being stopped from sending packets and an identifier of the queue. The identifier of the queue may be any one of 0 to 7, or other identifiers, etc. , the embodiments of the present application are not limited. For another example, the flow control information may include duration information of the two queues being stopped from sending packets and an identifier of each of the two queues. For another example, the flow control information may include information on the duration that each of the eight queues is stopped from sending packets, and may also include an identifier of each of the eight queues. In other words, the indication field includes not only duration information, but also a queue identifier corresponding to the duration information.

In a possible implementation manner, the at least one first bit block further includes a cyclic redundancy check CRC field, where the CRC field is used to carry the CRC information of the at least one first bit block, that is, the CRC field can be used for The at least one first block of bits is checked. Exemplarily, the CRC information may be used to protect the flow control information in the at least one first bit block. And the length of the CRC field may be 4 bits, 8 bits, 16 bits, or 32 bits, etc. The length of the CRC may be determined according to a CRC check method, etc. The length of the CRC field is not limited in this embodiment of the present application.

502. The receiving end sends at least one first bit block to the transmitting end, and correspondingly, the transmitting end receives the at least one first bit block.

In a possible implementation manner, the method shown in FIG. 5 may further include step 503 .

503. The receiving end sends a first message to the sending end, where the first message is composed of message bit blocks. Correspondingly, the sending end receives the first message.

Optionally, the first packet may include a packet start bit block, a data bit block corresponding to the packet start bit block, and an end bit block corresponding to the packet start bit block (just an example). As an example, the first packet may include a packet start bit block (eg S0), a packet data bit block (eg D0-D7) and a packet end bit block (eg T0-T7) as shown in FIG. 2a. Optionally, the first packet may include a packet start bit block and a data bit block corresponding to the packet start bit block. As an example, the first packet may include a packet start bit block and a packet data bit block as shown in FIG. 2b(2). As for the specific value of the preset field in the message start bit block, reference may be made to the above description, which will not be described in detail here.

In this embodiment of the present application, the first bit block may be a non-message bit block, or the first bit block is a message bit block. The specific forms of the first bit block are respectively shown below.

Implementation Mode 1: The first bit block is a non-message bit block.

That is, the first bit block is different from the bit block composing the message (for example, the bit block composing the message may be called the second bit block), for example, the value of the preset field in the non-message start bit block is the same as the message start bit. The values of the preset fields in the block are different. For the specific description of the preset field, reference may be made to the related descriptions of FIGS. 3 a to 3 d , which will not be described in detail here. The first bit block is a non-message bit block. For example, at least one first bit block includes a non-message start bit block, as shown in the second diagrams of FIG. 6a to FIG. 6d, respectively. Optionally, the at least one first bit block may further include a non-packet end bit block, etc. For other descriptions of the at least one first bit block, reference may also be made to Embodiments 1 to 4 shown below.

In some implementation manners of the present application, if the receiving end does not send the first packet when sending the at least one first bit block, the receiving end may send the at least one first bit block independently. As an example, the receiving end sends the first packet after sending the at least one first bit block; or, the receiving end sends the at least one first bit block after sending the first packet.

In other implementation manners of the present application, if the receiving end is sending the first message when sending the at least one first bit block, the receiving end may insert the at least one first bit block into the first message sent in. That is, the receiving end can interrupt the first packet currently being sent, and insert the at least one first bit block into the first packet. In this case, the above step 503 can also be replaced with: after sending the message start bit block of the first message and the first message has not been sent, the receiving end sends at least one first bit to the sending end piece.

For different types of bit blocks, the preset fields are located in different areas. Therefore, in implementation manner 1, after receiving the at least one first bit block, the transmitting end can check the at least one bit block according to the CRC information carried in the CRC field in the at least one first bit block. In the case that the verification of the CRC information of the at least one first bit block is successful, the transmitting end may obtain the value carried in the preset field according to the block type field of the at least one first bit block. If the value carried in the preset field in the at least one first bit block is the first value, the sending situation of the second packet is adjusted according to the flow control information in the at least one first bit block. Exemplarily, if at least one first bit block includes a non-packet start bit block, the block type field of the non-packet start bit block is 8 bits whose bit positions are between 2 and 9, and the block type field of the non-packet type field is 8 bits. The value is 0x78. Optionally, when the first bit block is flit, since the preset fields of different types of bit blocks can be located in the same area, the sender can adjust the value of the second packet by acquiring the value carried by the preset field and indicating the field. delivery situation. Or, if at least one first bit block is at least one 0-bit block, the block type field of the at least one 0-bit block is 8 bits whose bit position is between 2 and 9, and the value of the block type field is 0x4B . Then, according to the numerical value carried by the preset field of the at least one 0-bit block, such as the second numerical value, and the indication field, the sending situation of the second packet is adjusted.

Implementation Mode 2: The first bit block is a message bit block.

When the receiving end feeds back the flow control information to the sending end, the receiving end may just need to send the first packet, but the first packet has not been sent. In this case, the receiving end may feed back the flow control information in the first packet. In other words, the receiving end may carry the credit quantity or duration information, etc. in the message start bit block, and send it together with the first message.

In this implementation manner, the value carried by the preset field in the first bit block is the third value, as shown in the first figures of FIG. 6a to FIG. 6d, respectively. At least one first bit block in step 502 is carried in the first packet, and is sent together with the first packet. The first packet shown here and the first packet in step 503 may be understood as different first packets (that is, may be understood as not the same packet).

In this case, after receiving the at least one first bit block, the transmitting end may perform the first bit block according to the CRC information carried in the CRC field (also referred to as the frame check sequence (FCS) field) of the first packet. A message is checked. In other words, although the CRC field is included in the at least one first bit block, the CRC field is used to perform CRC check on the flow control information and the like included in the at least one first bit block. However, for the first packet, the sender also needs to check the CRC information protecting the first packet. In this embodiment of the present application, as long as the CRC information in at least one first bit block is successfully verified, the transmitting end may perform step 505 . If another CRC information (eg, FCS) of the first packet fails to be checked, the sender may notify the receiver to retransmit the first packet.

Exemplarily, FIG. 6a and FIG. 6c are schematic diagrams showing the format of at least one first bit block when the receiving end feeds back the number of credits. FIG. 6b and FIG. 6d are schematic diagrams showing the format of at least one first bit block when the receiving end feeds back the duration information. Figures 6a and 6b show schematic diagrams of the format of at least one first bit block when the receiving end feeds back flow control information in the form of 64B/66B, while Figures 6c and 6d show the receiving end feeding back in the form of flit In the case of flow control information, a schematic diagram of the format of at least one first bit block. It can be understood that although the first packets shown in FIGS. 6a to 6d include flow control information, the flow control information is carried in a packet bit block such as a packet start bit block. The message start bit block includes a field for carrying flow control information and a CRC field. It can be understood that, in FIG. 6c and FIG. 6d , when the preset field carries 01000, it is also possible to identify whether the flit includes flow control information through the 2 bits after the preset field. Alternatively, whether the flit includes flow control information and the like may also be identified through 1 bit after the preset field, which is not limited in this embodiment of the present application. Exemplarily, in addition to the indication field, CRC field, and preset field shown above, the start flit of the first message sent by the receiving end may also include a type field, and the type field may be used to identify the start flit. Whether to include flow control information. This embodiment of the present application does not limit the specific position or length of the field of this type.

It can be understood that the specific positions of the fields shown in FIG. 6a to FIG. 6d are only examples, and in a specific implementation, the above fields may also be in other positions. Meanwhile, the lengths of the above fields may also be determined according to the lengths of the message bit blocks included in the first message, and the lengths and specific values of the fields shown above are not limited in the embodiments of the present application. For the specific description of the non-message bit block, reference may also be made to Embodiment 1 to Embodiment 4 shown below.

In a possible implementation manner, the method shown in FIG. 5 may further include step 504 and step 505 .

504. The transmitting end performs CRC check on at least one first bit block.

In this embodiment of the present application, step 504 may also be understood as the sending end checking the CRC information in the at least one first bit block.

505. In the case that the CRC check is passed, the sending end adjusts the sending situation of the second packet according to the flow control information in the at least one first bit block.

In this embodiment of the present application, if the sending end fails to check the CRC information in at least one first bit block, the at least one first bit block may be directly discarded.

In the embodiment of the present application, the sending end may distinguish the message bit block and the non-message bit block according to the value carried by the preset field. If the preset field carries the first value, the flow control information can be obtained from the indication field. Alternatively, the sending end can obtain whether the bit block is an 0-bit block through the difference in the block type field of the bit block, and if it is an 0-bit block, the function of the 0-bit block can be obtained through a preset field, such as the preset field carrying For the second value, the flow control information is obtained from the 0-bit block indication field. For the specific description of step 505, reference may also be made to Embodiments 1 to 4 shown below.

In the embodiment of the present application, the sending end may adjust the data volume of the second packet to be sent according to the flow control information, or adjust the corresponding queue to stop sending the second packet, etc., which is not limited in the embodiment of the present application. Exemplarily, the sender adjusts the data amount of the second packet according to the number of credits in the at least one first bit block. If the data volume of the at least one second packet to be sent is less than or equal to the data volume corresponding to the credit quantity, the sending end may directly send the at least one second packet. Another example is that the data volume of the second packet to be sent is greater than the data volume corresponding to the credit quantity, the sender first buffers the second packet, and accumulates the credit quantity until the data volume corresponding to the credit quantity is greater than or equal to the second packet. The data volume of the message is sent, and the second message is sent. Exemplarily, the sending end may further adjust the sending rate of the corresponding queue according to the duration information in the at least one first bit block.

In this embodiment of the present application, the receiving end may feed back the flow control information to the transmitting end in the form of a first bit block instead of a message. The transmission delay of the at least one first bit block may be reduced, so as to prevent the transmission time of the at least one first bit block from being too long and other packets being blocked. On the other hand, when the first bit block is a non-packet bit block, if the value carried by the preset field of the non-packet start bit block is different from the value carried by the preset field of the packet start bit block, the non-packet Bit blocks and message bit blocks can be distinguished by the receiver or the sender. Or, the value carried by at least one 0-bit block preset field is different from the value borne by other 0-bit block preset fields, so that the transmitting end or the receiving end can distinguish the role of at least one 0-bit block according to the value of the preset field. . In addition, the at least one first bit block can also be inserted into the first packet and sent out, which further reduces the waiting delay of the at least one first bit block, reduces the delay of the FCT, and improves the network utilization rate.

For a better understanding of the method shown in FIG. 5 , specific embodiments will be shown below in different forms of at least one first bit block. It can be understood that, for the specific description of the preset fields in the various embodiments shown below, reference may be made to the above description, and the preset fields will not be described in detail below.

Embodiment 1.

At least one first bit block includes at least one 0-bit block, and a preset field in each 0-bit block carries the second value.

In this embodiment of the present application, the indication field and the CRC field may be located at bit block positions 10 to 33 and 38 to 65 in the 0-bit block, respectively, and the indication field and the CRC field may be located at different bit positions respectively. Meanwhile, the length of the indication field may be at least 8 bits, for example, the indication field may be 8 bits, 16 bits, 24 bits, 128 bits, etc. The specific length of the indication field is not limited in this embodiment of the present application. The length of the CRC field may be 4 bits, 8 bits, 16 bits, or 32 bits, etc. Regarding the length of the indication field and the CRC field, etc., the embodiments shown below are also applicable, and will not be described in detail below.

As an example, the positions and lengths of the indication field, the CRC field and the preset field in the 0-bit block may be as shown in FIG. 7a. As shown in the first diagram in Figure 7a, when the flow control information is the number of credits, the indication field can be located in 8 bits between bit positions 10 to 17 in the 0-bit block, and the CRC field can be located in the 0-bit block. The positions are 8 bits between 18 and 25. As shown in the second diagram in Figure 7a, when the flow control information is duration information, the indication field may be located in 20 bits between bit positions 10 to 29 in the 0-bit block, that is, a part of the indication field carries a queue The duration of the stopped sending packets, and the other part of the indication field carries the identifier of the one queue. The CRC field is located in 4 bits between bit positions 30 to 33 in a block of 0 bits.

It can be understood that the positions and lengths of the indication field and the CRC field shown in FIG. 7a are only examples. In a specific implementation, the indication field and the CRC field may also be located in other areas of the 0-bit block. This is not limited. In the embodiment of the present application, other positions in the 0-bit block are marked as reserved (reserved, rsvd), but this does not mean that the other positions are not occupied. For the role of the area of rsvd in FIG. 7a, the embodiment of the present application does not limited. For this description, other embodiments shown in this application are also applicable.

Hereinafter, one credit corresponds to 16 bytes, the number of credits is 20, and the schematic diagram shown in Fig. 7a is taken as an example to describe the specific scene of the method for sending the bit block provided by the embodiment of the present application.

The format of the 0-bit block may be as shown in the first figure of FIG. 7b, the indication field occupies 8 bits, and the value range of the credit quantity is 0 to 255 (including 0 and 255). When the number of credits is equal to 0, it means that the receiving end has no receiving ability, that is, the buffering situation of the receiving end is saturated and the message cannot be buffered any more. When the number of credits is equal to 266, it means that the maximum possible buffer space of the receiving end is 255*16=4080 bytes.

When the receiving end needs to send the at least one 0-bit block, the receiving end is sending the first packet to the sending end. From the 64B/66B codec layer, the first message can be understood as S (the message start bit block) DDD...D (that is, the data bit block corresponding to the message start bit block) T (that is, the message start bit block corresponds to the end bit block) of the message bit block stream. As shown in FIG. 7c, the receiving end may directly send the at least one 0-bit block without sending the message bit block stream of the first message, and FIG. 7c shows one 0-bit block. That is, the receiving end can interrupt the message bit block stream of the first message currently being sent, and insert at least one 0-bit block into the message bit block stream of the first message, so that the at least one 0-bit block send out.

The sending end receives the first message from the receiving end. When the sending end does not receive the message bit block stream of the first message, the sending end receives the control bit block and obtains the block type of the control bit block. The block type field is 0x4B, and the default field carries 0x06. If the CRC result calculated by the sender is consistent with the CRC result in the control bit block, the number of credits extracted from the D1 area (ie, the indication field) of the 0-bit block is 20. If the sender has a second packet less than or equal to 20*16=320 bytes to send, the sender can immediately send the second packet.

The following will describe a specific scenario of the method for sending a bit block provided by this embodiment of the present application by taking the receiving end needing to stop the priority queue numbered 7 from sending messages, and taking the schematic diagram shown in FIG. 7a as an example.

The format of the 0-bit block may be as shown in the second figure of Figure 7b, the indication field carries 0xFFFF, indicating that the priority queue numbered 7 needs to suspend the maximum time for sending packets, and the indication field also carries 0x7, indicating that the transmission is suspended The queue number of the packet is 7. For a specific description of the receiving end sending at least one 0-bit block, reference may be made to the above description about FIG. 7c , which will not be described in detail here.

Optionally, if the receiving end needs to restart the priority queue numbered 7 to send the message, the receiving end can also generate at least one 0-bit block, and the format of the 0-bit block is as shown in the third figure of Figure 7b. . For the specific description of the third diagram of FIG. 7b, the method for the receiver to send the at least one 0-bit block and the method for the transmitter to receive the at least one 0-bit block can be referred to the above description, which will not be described in detail here.

For the first embodiment, the beneficial effects of the embodiments of the present application are briefly analyzed according to the formula below.

Exemplarily, taking the link utilization model as an example, for example, the link utilization rate may satisfy the following formula.

Among them, TLP _len is used to indicate the payload length of the first packet, that is, the maximum payload length of the first packet; H _len is used to indicate the header length of the first packet; ACK _len is used to indicate that the receiver receives the second The length of the acknowledgement (acknowledge, ACK) message fed back after the message; FC _len is used to indicate the length of at least one first bit block; FC _updateFactor is used to indicate the transmission factor of at least one first bit block; ACK _updateFactor is used to indicate the length of the at least one first bit block. Indicates the sending factor of the ACK packet specified by the PCIe standard; P _bw is used to indicate the blocking degree, such as the delay when the receiver sends at least one first bit block. Exemplarily, when the receiving end sends at least one first bit block, it does not currently send the first packet, that is, in the best case (best case), P _bw =0. When the receiving end sends at least one first bit block, if the receiving end is currently sending the second packet, such as in a worst case (worst case), P _bw =(TLP _len +H _len )+FC _len .

In the embodiment of the present application, in the best case, P _bw =0; in the worst case, P _bw =8+8=16 bytes, that is, blocking the size of one bit block (according to the 100Gbps Ethernet interface, transmission For 100G services, considering 64B/66B encoding, the actual interface rate is 100*66/64Gbps. If only 100G rate is considered, one bit block can be converted into 64 bits, that is, 8 bytes). And the values of other parameters such as TLP _len = 256, the header length is 20 bytes, and then consider the 8-byte preamble and the 12-byte frame gap (ie, H _len =20+8+12=40). FC _updateFactor =2.5, ACK _updateFactor =2.5, ACK _len =8, FC _len =8.

Then applying the method provided by the embodiments of the present application, in the best case, U _{linkutilization} =0.979; in the worst case, U _{linkutilization} =0.959; in the middle case, U _{linkutilization} =(0.979+0.959)/ 2=0.969. It can be seen from this that, by applying the method provided by the embodiment of the present application, the utilization rate of the link in which the receiving end sends at least one first bit block to the transmitting end is close to 1.

Fig. 7d shows the change of the link utilization rate according to the difference of the packet length (such as the above-mentioned TLP _len ). Among them, "1", "2" or "3" respectively indicate the change of the packet length and the link utilization rate in the best case, the average case or the worst case. It can be seen from FIG. 7d that the method provided by this embodiment of the present application can not only send at least one first bit block in time, but also improve link utilization.

The following briefly analyzes the buffer size that needs to be increased at the receiving end in the method provided by the embodiment of the present application.

Assuming that the link rate is R, the sending rate of the receiver is R ₁ ≤? , the length of at least one first bit block carrying flow control information is L1, and the length of the sent bit block of the first packet interrupted by the at least one first bit block is L2, then the buffer size that needs to be increased by the receiving end is as follows Show:

Therefore, if the length of at least one first bit block is L1=8 bytes, if the interrupted first message sends the message start bit block such as L2=8 bytes, then the buffer size that the receiver needs to increase is only 16 bytes. byte.

It is understandable that each formula shown in the embodiments of the present application or descriptions about formulas, etc., are also applicable to Embodiments 2 to 4 shown below, and will not be described in detail below.

Embodiment two,

At least one first bit block includes a non-message start bit block and a non-message end bit block, and a preset field in the non-message start bit block carries the first value.

In this embodiment of the present application, the indication field, the CRC field, and the preset field may be located between 10 and 65 in the non-message start bit block, and between 10 and 65 in the non-message end bit block.

As an example, the bit positions of the preset field, the indication field and the CRC field may be as shown in Figure 8a. As shown in the second diagram of Figure 8a, the indication field may be located in 8 bits in bit positions 10 to 17 in the non-end of message bit block, and the CRC field in bit positions 18 to 25 in the non-end of message bit block 8 bits between. Alternatively, as shown in the third diagram of Figure 8c, the indication field may be located in 5 bytes between bit positions 10 and 49 in the non-end of message bit block in which the CRC field is located Positions are 16 bits between 50 and 65.

Still taking the related description in FIG. 7c as an example, as shown in FIG. 8b, in the case that the receiving end needs to feed back flow control information, and the receiving end is currently sending the message bit block stream of the first message. In this case, the receiving end may insert the non-message start bit block and the non-message end bit block into the stream of message bit blocks currently being sent. Therefore, after obtaining the non-message start bit block (for example, the block type field is 0x78), the sender can know that the non-message start bit block is not based on 0xE5 carried by the preset field in the non-message start bit block. The message starts a block of bits. At the same time, when the sender obtains the non-message end bit block, it obtains credit quantity or duration information from the indication field of the non-message end bit block. Then, the sending end adjusts the sending situation of the second packet.

Optionally, FIG. 8b shows that the receiving end sequentially inserts a non-message start bit block and a non-message end bit block into the message bit block stream of the first message. As shown in Figure 8c, the receiving end may also insert a non-message end bit block and a non-message start bit block into the message bit block stream of the first message in sequence. In other words, in this embodiment of the present application, the receiving end may sequentially send a non-message start bit block and a non-message end bit block; or, the receiving end may also sequentially send a non-message end bit block and a non-message start bit block .

m and n in Fig. 8a may represent the identification (or number, etc.) of different queues. It can be understood that, for the specific description of FIGS. 8 a to 8 c , reference may be made to FIGS. 5 to 7 c , which will not be described in detail here.

Embodiment three,

At least one first bit block includes a non-packet start bit block, at least one non-packet data bit block corresponding to the non-packet start bit block, and a non-packet end bit block corresponding to the non-packet start bit block, and the The preset field in the non-message start bit block carries the first value.

In this embodiment of the present application, the indication field and the CRC field may be located in non-message data bit blocks, respectively, and occupy different bit positions.

As an example, the at least one first bit block may include a non-message start bit block, a non-message data bit block, and a non-message end bit block. The preset field is included in the non-message start bit block, and the indication field and the CRC field may be included in the non-message data bit block. As for the specific positions of the indication field and the CRC field, the embodiments of the present application do not limited.

As an example, the at least one first bit block may further include a non-message start bit block, at least two non-message data bit blocks, and a non-message end bit block. Wherein, the preset field is included in the non-message start bit block, and the indication field and the CRC field may be included in the same non-message data bit block, or respectively included in different message data bit blocks, etc. For example, the indication field may be contained in the same block of non-message data bits, or the indication field may be contained in a different block of non-message data bits, or the like. In this case, as shown in Figures 9a and 9b, in Figure 9a, the indication field and the CRC field may be included in different non-message data bit blocks, and in Figure 9b, the indication field is included in at least three non-message data bits in the bit block.

As an example, the at least one first bit block may further include one non-message start bit block, eight non-message data bit blocks, and one non-message end bit block. As shown in FIG. 9a and FIG. 9b, the CRC field can be understood as the eighth non-message data bit block, and the credit quantity and duration information, etc., are not limited in this embodiment of the present application. In FIG. 9b, the queue identification information with a length of 8 bits, such as e[0:7], can be used to indicate the validity of the duration information corresponding to the eight queues respectively. For example, e[0x11](0001 0001) can indicate that the duration information of queue 0 and queue 4 is valid. It can be understood that the correspondence between the e[0:7] pairs of queues shown here is only an example.

Fig. 9c shows a method in which the receiving end sends at least one first bit block, and the transmitting end receives the at least one first bit block. For the method shown in Fig. 9c, reference may be made to the various embodiments introduced above, which are not detailed here. described.

Embodiment four,

Embodiments 1 to 3 shown above are illustrated by taking the bit block shown in FIG. 2 a as an example, and this embodiment of the present application will take the bit block shown in FIG. 2 b as an example to describe the method provided by the embodiment of the present application.

As an example, as shown in Figure 10a or Figure 10b, the length of H may be 3 bits. For example, when H bears 100, it indicates that the flit is a control flit; when H bears 001, it indicates that the flit is a payload flit. The length of the preset field is 5 bits, the preset field carrying 00001 indicates that the type of the flit is the start of the message flit, the preset field carrying 00101 indicates that the flit type is credit update flit, and the preset field carrying 00110 indicates that the flit Type is PFC flit. In other words, when H carries 100 and the default field carries 00101, the flit is a credit update flit; and when H carries 100 and the default field carries 00110, the flit is a PFC flit.

0x81 in Figure 10b is a representation of e[0:7]. Exemplarily, e[0:7] may indicate the validity of the corresponding queue, for example, the binary value of 0x81 is 1000 0001, which indicates that Time[0] and Time[7] are valid values.

Taking the related description in FIG. 8a as an example, the format of the first bit block may be as shown in the third diagram of FIG. 10a, or as shown in the third diagram of FIG. 10b. The receiving end may insert at least one first bit block into the bit block stream, and send the at least one first bit block to the transmitting end. It can be understood that the Oflit shown in FIG. 10c is the at least one first bit block shown in the embodiment of the present application.

It can be understood that the synchronization header (such as the H field) in the Sflit (ie, the packet start bit block) shown in FIG. 10b carries 100, and the synchronization header of the data flit (D flit) carries 001. Compared with the scheme in which only the synchronization header is included in S flit, and the synchronization header is not included in D flit, each flit in the embodiment of the present application includes a synchronization header, thereby ensuring that at least one first bit block is Inserted into the bit block stream of flit, the sender can also identify the at least one first bit block from D flit. Exemplarily, if the synchronization header is not included in the D flit, if the value of some fields in the D flit is exactly the same as the value of the Off, the sender may not be able to identify whether the received flit is a D flit or an Off. .

It can be understood that the emphases of different embodiments shown in this application are different, and for an implementation manner that is not described in detail in one embodiment, reference may also be made to other embodiments, etc., which will not be described in detail here.

In the method shown in FIG. 5 above in the present application, the flow control information is obtained according to the buffer status of the receiving end. The buffer status of the receiving end includes the buffer size of the receiving end, or the buffer size of the buffer queue of the receiving end, and the like. Or, the cache size of the cache queue of the receiving end includes whether the cache size of the cache queue of the receiving end exceeds a cache threshold and the like.

In view of the above description, the buffer size of the receiving end is further described. For example, the buffer size at the receiving end includes one or more of the following:

1. The current free buffer size of the receiver;

That is, when determining the flow control information, the size of the free buffer at the receiving end.

2. The size of the free buffer increased by the receiver;

That is, within the time period when the last time the flow control information is sent to the current time when the flow control information is sent, the number of packets discharged by the receiving end is the newly added free buffer size. For example, within the time period when the flow control information is sent twice, the amount of packet data discharged by the receiving end is 2KB, so 2KB is the newly added free buffer size.

3. Self-initialization accumulatively allocates the cache size.

That is, since the link is initialized, the sum of the total amount of packet data discharged by the receiver at the current moment and the buffer size is recorded as the cumulative allocable buffer size. For example, if the total number of packets emptied by the receiver is 10KB and the buffer size is 2KB, then the cumulative buffer size that can be allocated by the receiver is 12KB.

For the above description, the buffer size of the buffer queue of the receiving end is further described. For example, the buffer size of the buffer queue at the receiving end may also include any one or more of the following:

1. The size of the buffer currently occupied by the receiver;

2. Whether the buffer size occupied by the receiving end exceeds a certain threshold;

3. Whether the buffer size occupied by the receiving end is smaller than a certain threshold.

With regard to the above description, the flow control information may include, in addition to the duration information that at least one queue is stopped from sending packets, and also includes the identifier of the at least one queue. Optionally, the flow control information may also include any one or more of the following:

1. The cache situation of at least one queue;

For example, the flow control information may include the identifier of each queue in the at least one queue, the buffer status of each queue, and the like.

2. The duration information of at least one queue being suspended for sending packets;

3. Time information when at least one queue restarts sending packets.

The apparatus provided by the embodiments of the present application will be introduced below.

FIG. 11 is a schematic structural diagram of a communication device provided by an embodiment of the present application, where the communication device includes a processing unit 1101 and a transceiver unit 1102 .

In some embodiments of the present application, the communication apparatus shown in FIG. 11 may be used to perform the operations (functions or steps, etc.) performed by the receiving end in the foregoing embodiments. Exemplarily, the communication apparatus may be used to perform

steps

501 and 502 shown in FIG. 5 , and the like.

In this embodiment of the present application, the processing unit 1101 may be configured to generate at least one first bit block, and the transceiver unit 1102 may be configured to output the at least one first bit block.

In a possible implementation manner, the transceiver unit 1102 is further configured to output the first packet.

In a possible implementation manner, the transceiver unit 1102 is specifically configured to output at least one first bit block after the packet start bit block of the first packet is output and the first packet is not output completely .

In a possible implementation manner, the transceiver unit 1102 may also be used to acquire (or referred to as inputting) the second packet.

It can be understood that, for the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., reference may be made to the above-mentioned embodiments, which will not be described in detail here. Exemplarily, for the difference between a message bit block and a non-message bit block, reference may be made to FIG. 3a to FIG. 3d, or, reference may also be made to FIG. 6a to FIG. 6d, etc. FIG. For the description of the at least one first bit block, reference may be made to FIG. 7a to FIG. 10c and so on.

In other embodiments of the present application, the communication apparatus shown in FIG. 11 may be used to perform the operations (or functions or steps, etc.) performed by the sender in the foregoing embodiments. Exemplarily, the communication apparatus may be used to perform steps 504 and 505 shown in FIG. 5 , and the like.

In this embodiment of the present application, the transceiver unit 1102 is configured to acquire (or input) at least one first bit block; the processing unit 1101 is configured to adjust the sending of the second packet according to the flow control information in the at least one first bit block condition.

In a possible implementation manner, the transceiver unit 1102 is configured to output the second packet according to the sending situation of the second packet.

In a possible implementation manner, the processing unit 1101 is further configured to perform a CRC check on the at least one first bit block.

In this embodiment of the present application, according to whether the at least one first bit block is a non-message bit block or a message bit block, the manner in which the processing unit performs the CRC check on the at least one first bit block may also be different. Exemplarily, if the at least one first bit block is a non-message bit block, the processing unit may check the CRC information carried in the CRC field in the at least one first bit block. If at least one first bit block is a message bit block, the processing unit not only checks the CRC information carried by the CRC field in the at least one first bit block, but also needs to check another CRC field ( For example, the CRC information carried in the FCS field) is checked.

It can be understood that, for the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., reference may be made to the above-mentioned embodiments, which will not be described in detail here. Exemplarily, for the difference between a message bit block and a non-message bit block, reference may be made to FIGS. 3a to 3d, or, reference may also be made to FIGS. 6a to 6d, and so on. For the description of the at least one first bit block, reference may be made to FIG. 7a to FIG. 10c and so on.

The descriptions of the transceiver unit and the processing unit shown in the various embodiments of the embodiments of this application are only examples. For the specific implementation of the transceiver unit and the processing unit, reference may also be made to the various method embodiments shown in this application, which are not repeated here. Detailed description.

The division of modules in the embodiments of the present application is schematic, and is only a logical function division. In actual implementation, there may be other division methods. In addition, each functional module or unit in each embodiment of the present application may be integrated in the A processor may also exist physically alone, or two or more modules or units may be integrated into one module or unit. The above-mentioned integrated modules or units may be implemented in the form of hardware, or may be implemented in the form of software function modules.

In a possible implementation, when the communication device shown in FIG. 11 is any form of computer, server, switch, router or network card, etc.; or a device in any form of computer, server, switch, router or network card, etc. , or when it is a device matched with any form of computer, server, switch, router or network card, etc., the processing unit 1101 can be one or more processors, the transceiver unit 1102 can be a transceiver, or the transceiver unit 1102 can also be A sending unit and a receiving unit, the sending unit may be a transmitter, and the receiving unit may be a receiver, and the sending unit and the receiving unit are integrated into one device, such as a transceiver. In the embodiment of the present application, the processor and the transceiver may be coupled, etc., and the connection manner of the processor and the transceiver is not limited in the embodiment of the present application.

As shown in FIG. 12 , the communication device 120 includes one or more processors 1220 and a transceiver 1212 .

Optionally, the processor and the transceiver may be configured to perform the functions or operations performed when the above-mentioned communication apparatus is used as the receiving end. Exemplarily, for example, the processor is configured to generate at least one first bit block; the transceiver is configured to transmit the at least one first bit block. For another example, the transceiver is used to send the first message. For another example, the transceiver is configured to send the at least one first bit block after sending the message start bit block of the first message and when the first message has not been sent. For another example, the transceiver is further configured to receive the second message.

Optionally, the processor and the transceiver may be configured to perform the functions or operations performed when the above-mentioned communication apparatus is used as the sending end. Exemplarily, for example, the transceiver is configured to receive at least one first bit block; the processor is configured to adjust the sending situation of the second packet according to the flow control information in the at least one first bit block. In another example, the transceiver is further configured to send the second message according to the sending situation of the second message. In another example, the processor is further configured to perform a CRC check on the at least one first bit block.

It can be understood that, for the functions or operations performed by the transceiver and/or the processor, reference may be made to the various embodiments shown in FIG. 11 , or the method embodiment shown in FIG. 5 may also be referred to, which will not be described in detail here. described. It can be understood that, for the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., reference may be made to the above-mentioned embodiments, which will not be described in detail here. Exemplarily, for the difference between a message bit block and a non-message bit block, reference may be made to FIGS. 3a to 3d, or, reference may also be made to FIGS. 6a to 6d, and so on. For the description of the at least one first bit block, reference may be made to FIG. 7a to FIG. 10c and so on.

In various implementations of the communication device shown in FIG. 12, a transceiver may include a receiver for performing the function (or operation) of receiving and a transmitter for performing the function (or operation) of transmitting ). And transceivers are used to communicate with other devices/devices over the transmission medium.

Optionally, the communication device 120 may further include one or more memories 1230 for storing program instructions and/or data. Memory 1230 and processor 1220 are coupled. The coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units or modules, which may be in electrical, mechanical or other forms, and is used for information exchange between devices, units or modules. The processor 1220 may cooperate with the memory 1230. The processor 1220 may execute program instructions stored in the memory 1230 . Optionally, at least one of the above-mentioned one or more memories may be included in the processor.

The specific connection medium between the transceiver 1212 , the processor 1220 , and the memory 1230 is not limited in the embodiments of the present application. In the embodiment of the present application, the memory 1230, the processor 1220, and the transceiver 1212 are connected through a bus 1240 in FIG. 12. The bus is represented by a thick line in FIG. 12, and the connection between other components is only for schematic illustration. , is not limited. The bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, only one thick line is shown in FIG. 12, but it does not mean that there is only one bus or one type of bus.

In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc. Alternatively, each method, step, and logic block diagram disclosed in the embodiments of the present application are executed. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed in conjunction with the embodiments of the present application may be directly embodied as being executed by a hardware processor, or executed by a combination of hardware and software modules in the processor, or the like.

In this embodiment of the present application, the memory may include, but is not limited to, a non-volatile memory such as a hard disk drive (HDD) or a solid-state drive (SSD), a random access memory (Random Access Memory, RAM), Erasable Programmable Read-Only Memory (Erasable Programmable ROM, EPROM), Read-Only Memory (Read-Only Memory, ROM) or Portable Read-Only Memory (Compact Disc Read-Only Memory, CD-ROM) and so on. A memory is any storage medium that can be used to carry or store program codes in the form of instructions or data structures, and can be read and/or written by a computer (such as the communication devices shown in this application, etc.), but is not limited thereto. The memory in this embodiment of the present application may also be a circuit or any other device capable of implementing a storage function, for storing program instructions and/or data.

It is understandable that the communication device shown in the embodiment of the present application may also have more components and the like than those shown in FIG. 12 , which is not limited in the embodiment of the present application.

It can be understood that the method performed by the processor and the transceiver shown above is only an example, and for the specific steps performed by the processor and the transceiver, reference may be made to the method described above.

In another possible implementation manner, when the above-mentioned communication device is a chip system, such as a chip system in a server, an access device, a switch, a router or a network card, the processing unit 1101 may be one or more logic circuits, which transmit and receive The unit 1102 may be an input/output interface, also called a communication interface, or an interface circuit, or an interface, and so on. Alternatively, the transceiver unit 1102 may also be a sending unit and a receiving unit, the sending unit may be an output interface, and the receiving unit may be an input interface, the sending unit and the receiving unit are integrated into one unit, such as an input/output interface.

Wherein, the logic circuit 1301 may be a chip, a processing circuit, an integrated circuit or a system on chip (SoC) chip, etc., and the interface 1302 may be a communication interface, an input and output interface, and the like. In this embodiment of the present application, the logic circuit and the interface may also be coupled to each other. The specific connection manner of the logic circuit and the interface is not limited in this embodiment of the present application.

As shown in FIG. 13 , the communication device shown in FIG. 13 includes a logic circuit 1301 and an interface 1302 . That is, the above-mentioned processing unit 1101 may be implemented by the logic circuit 1301 , and the transceiver unit 1102 may be implemented by the interface 1302 .

Optionally, the logic circuit and interface may be used to perform the functions or operations performed when the above-mentioned communication apparatus is used as the receiving end. Exemplarily, the logic circuit is used for generating at least one first bit block; the interface is used for outputting the at least one first bit block. For another example, the interface is used to output the first packet. For another example, the interface is configured to output the at least one first bit block after outputting the message start bit block of the first message and in the case that the output of the first message is not completed. For another example, the interface is also used to input the second packet.

Optionally, the logic circuit and interface may be used to perform the functions or operations performed when the above-mentioned communication apparatus is used as the sending end. Exemplarily, for example, the interface is configured to input at least one first bit block; the logic circuit is configured to adjust the output condition of the second packet according to the flow control information in the at least one first bit block. In another example, the interface is further configured to output the second packet according to the output condition of the second packet. In another example, the logic circuit is further configured to perform CRC check on the at least one first bit block.

It can be understood that, for the functions or operations performed by the interface and/or the logic circuit, reference may be made to the various embodiments shown in FIG. 11 , or the method embodiment shown in FIG. 5 may also be referred to, which will not be described in detail here. . It can be understood that, for the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., reference may be made to the above-mentioned embodiments, which will not be described in detail here. Exemplarily, for the difference between a message bit block and a non-message bit block, reference may be made to FIGS. 3a to 3d, or, reference may also be made to FIGS. 6a to 6d, and so on. For the description of the at least one first bit block, reference may be made to FIG. 7a to FIG. 10c and so on.

In addition, the present application also provides a computer program for implementing the operations and/or processing performed by the receiving end in the method provided by the present application.

The present application also provides a computer program for implementing the operations and/or processing performed by the sender in the method provided by the present application.

The present application also provides a computer-readable storage medium, where computer codes are stored in the computer-readable storage medium, and when the computer codes are run on the computer, the computer is made to perform the operations performed by the receiving end in the method provided by the present application and/or or processing.

The present application also provides a computer-readable storage medium, where computer codes are stored in the computer-readable storage medium, and when the computer codes are run on the computer, the computer is made to perform the operations performed by the sender in the method provided by the present application and/or or processing.

The present application also provides a computer program product, the computer program product includes computer code or computer program, when the computer code or computer program is run on a computer, the operation performed by the receiving end in the method provided by the present application and/or Processing is executed.

The present application also provides a computer program product, the computer program product includes computer code or computer program, when the computer code or computer program is run on a computer, the operation performed by the sending end in the method provided by the present application and/or Processing is executed.

The embodiment of the present application also provides a communication system, the communication system includes a sending end and a receiving end, the receiving end can be used to perform step 501 and step 502 (sending step) shown in FIG. 5, etc., the sending end can use In order to perform the receiving steps in

steps

502 and 503 shown in FIG. 5 , as well as steps 504 and 505 and so on. It is understandable that the steps performed by the sender and the receiver shown here are only examples, and for other steps performed by the receiver and sender, reference may also be made to the foregoing embodiments, which will not be described in detail here.

In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may also be electrical, mechanical or other forms of connection.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the technical effects of the solutions provided by the embodiments of the present application.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.

The integrated unit, if implemented in the form of a software functional unit and sold or used as an independent product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the present application are essentially or part of contributions to the prior art, or all or part of the technical solutions can be embodied in the form of software products, and the computer software products are stored in a readable The storage medium includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned readable storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, etc. that can store program codes medium.

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this. should be covered within the scope of protection of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

A method for sending bit blocks, characterized in that the method is applied to a communication device, and the method includes:

generating at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information, and the flow control information is obtained according to a cache condition of the communication device;

The at least one first block of bits is sent.
The method according to claim 1, wherein the first bit block is a non-message bit block.
The method according to claim 2, wherein the message bit block is a message start bit block, a data bit block corresponding to the message start bit block, an end bit block corresponding to the message start bit block, At least one of the message end bit block, the start bit block corresponding to the message end bit block, or the data bit block corresponding to the message end bit block.
The method according to any one of claims 1-3, wherein the method further comprises:

A first message is sent, where the first message is composed of message bit blocks.
The method according to any one of claims 2-4, wherein the sending the at least one first bit block comprises:

The at least one first bit block is sent after the message start bit block of the first message is sent and the first message is not sent completely.
The method according to any one of claims 2-5, wherein the at least one first bit block includes a non-message start bit block, and a preset field in the non-message start bit block carries the first a value.
The method according to any one of claims 2-5, wherein the at least one first bit block includes at least one sequence O-bit block, and the at least one O-bit block in each O-bit block The preset field carries the second value.
The method according to claim 6, wherein the at least one first bit block further comprises:

at least one data bit block corresponding to the non-message start bit block; or

the end bit block corresponding to the non-message start bit block; or

At least one data bit block corresponding to the non-message start bit block and an end bit block corresponding to the non-message start bit block.
The method according to any one of claims 1 to 8, wherein the flow control information includes information on the number of credits or the duration information for which at least one queue is stopped from sending packets.
The method according to any one of claims 1-9, wherein the at least one first bit block further includes a cyclic redundancy check (CRC) field.
The method according to any one of claims 1-10, wherein the first bit block is a P1 B/P2 B bit block, the P1 represents the number of payload bits of the first bit block, and the The P2 represents the total number of bits of the first bit block, and P2-P1 represents the number of synchronization header bits of the first bit block.
The method according to claim 11, wherein the value of the P1 is any one of the following:

64, 128, 256 or 512;

The value of P2-P1 is any of the following:

1, 2 or 3.
The method according to any one of claims 3-5, wherein a preset field in the packet start bit block carries a third value.
The method according to claim 1, wherein the first bit block is a message bit block.
A communication device, characterized in that the device comprises:

a processor, configured to generate at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information, and the flow control information is obtained according to the cache condition of the communication device;

a transceiver for transmitting the at least one first bit block.
The apparatus according to claim 15, wherein the first bit block is a non-message bit block.
The device according to claim 16, wherein the message bit block is a message start bit block, a data bit block corresponding to the message start bit block, an end bit block corresponding to the message start bit block, At least one of the message end bit block, the start bit block corresponding to the message end bit block, or the data bit block corresponding to the message end bit block.
The device according to any one of claims 15-17, characterized in that,

The transceiver is further configured to send a first message, where the first message is composed of message bit blocks.
The device according to any one of claims 16-18, characterized in that,

The transceiver is specifically configured to send the at least one first bit block after the message start bit block of the first message is sent and the first message has not been sent completely.
The apparatus according to any one of claims 16-19, wherein the at least one first bit block includes a non-message start bit block, and a preset field in the non-message start bit block carries the first a value.
The apparatus according to any one of claims 16-19, wherein the at least one first bit block includes at least one sequence O-bit block, and the at least one O-bit block in each O-bit block The preset field carries the second value.
The apparatus according to claim 20, wherein the at least one first bit block further comprises:

at least one data bit block corresponding to the non-message start bit block; or

the end bit block corresponding to the non-message start bit block; or

At least one data bit block corresponding to the non-message start bit block and an end bit block corresponding to the non-message start bit block.
The apparatus according to any one of claims 15 to 22, wherein the flow control information includes information on the number of credits or the duration information for which at least one queue is stopped from sending packets.
The apparatus according to any one of claims 15-23, wherein the at least one first bit block further includes a cyclic redundancy check (CRC) field.
The apparatus according to any one of claims 15-24, wherein the first bit block is a P1 B/P2 B bit block, the P1 represents the number of payload bits of the first bit block, and the The P2 represents the total number of bits of the first bit block, and P2-P1 represents the number of synchronization header bits of the first bit block.
The device according to claim 25, wherein the value of the P1 is any one of the following:

64, 128, 256 or 512;

The value of P2-P1 is any of the following:

1, 2 or 3.
The apparatus according to any one of claims 17-19, wherein a preset field in the packet start bit block carries a third value.
The apparatus according to claim 15, wherein the first bit block is a message bit block.
A communication device, characterized in that, the communication device is configured to execute the method according to any one of claims 1-14.
A communication device, characterized in that the communication device comprises a processing unit and a transceiver unit,

The processing unit is configured to generate at least one first bit block according to the method according to any one of claims 1-14, and the transceiver unit is configured to transmit the at least one first bit block.
A communication device, characterized in that the communication device comprises a logic circuit and an interface, the logic circuit is configured to generate at least one first bit block according to the method according to any one of claims 1-14, the an interface for outputting the at least one first bit block.
A computer-readable storage medium, characterized in that, the computer-readable storage medium is used for storing instructions, and when the instructions are executed, the method according to any one of claims 1-14 is implemented.
A computer program product, characterized in that the computer program product comprises instructions which, when executed, cause the method according to any one of claims 1-14 to be implemented.