WO2022021344A1

WO2022021344A1 - Magnetic random access memory and device, and read-write control method

Info

Publication number: WO2022021344A1
Application number: PCT/CN2020/106252
Authority: WO
Inventors: 赵巍胜; 李智; 曹凯华; 张昆
Original assignee: 北京航空航天大学
Priority date: 2020-07-31
Filing date: 2020-07-31
Publication date: 2022-02-03

Abstract

A magnetic random access memory and device, and a read-write control method. The magnetic random access memory comprises: a ferroelectric layer (110); a dielectric layer (120) provided above the ferroelectric layer (110); and a magnetic tunnel junction, wherein at least one part of the magnetic tunnel junction is provided on the dielectric layer (120). The present invention can significantly improve the interface effect of the dielectric layer (120) and the magnetic tunnel junction, thereby greatly improving a VCMA effect provided for the magnetic tunnel junction, and further optimizing the performance of the magnetic random access memory, such as power consumption, a writing speed, and thermal stability.

Description

Magnetic random access memory, device and read/write control method

technical field

The present invention relates to the technical field of magnetic memory, and in particular, to a magnetic random access memory, a device and a read-write control method.

Background technique

As the size of the semiconductor process continues to shrink, Moore's Law slows down, the increase in leakage current and the interconnection delay become the bottleneck of traditional CMOS memory. Finding solutions for next-generation memory technology has become the focus of integrated circuit research, among which magnetic random access memory cells have received extensive attention. Compared with traditional devices, Magnetic random access memory (MRAM) has the advantages of unlimited erasing and rewriting times, non-volatility, fast read and write speed, and radiation resistance. Ideal for memory and in-memory computing.

Electric field (voltage) regulated magnetic anisotropy (VCMA) is a hot field in spintronics and has great potential in magnetic random access memory. MRAM based on VCMA effect can significantly reduce the current density required for magnetization inversion by adjusting the structure of the magnetic memory device and applying a bias voltage during the inversion process in the process of magnetization inversion of the free layer induced by the usual current. The size can be further reduced, while the write power consumption is greatly reduced. However, as the size of magnetic random access memory is reduced, the VCMA effect coefficient cannot meet the requirements of MRAM.

SUMMARY OF THE INVENTION

One object of the present invention is to provide a magnetic random access memory, which can significantly improve the interface effect between the dielectric layer and the magnetic tunnel junction, thereby greatly improving the VCMA effect provided for the magnetic tunnel junction, thereby optimizing the power consumption, writing, and power consumption of the magnetic random access memory. performance such as entry speed and thermal stability. Another object of the present invention is to provide a magnetic random access memory device. Another object of the present invention is to provide a control method of a magnetic random access memory.

In order to achieve the above purpose, one aspect of the present invention discloses a magnetic random access memory, comprising:

ferroelectric layer;

a dielectric layer disposed on the ferroelectric layer; and

A magnetic tunnel junction is at least partially disposed on the dielectric layer.

Preferably, the magnetic tunnel junction includes a free ferromagnetic layer, a tunneling layer provided on the free ferromagnetic layer, and a reference ferromagnetic layer provided on the tunneling layer, the free ferromagnetic layer at least partially on the dielectric layer; or,

The magnetic tunnel junction includes a free ferromagnetic layer disposed between the ferroelectric layer and the dielectric layer, and a reference ferromagnetic layer disposed at least partially on the dielectric layer.

Preferably, it further comprises a first electrode electrically connected to the reference ferromagnetic layer and a second electrode electrically connected to the free ferromagnetic layer.

Preferably, it further includes a bottom electrode electrically connected to the ferroelectric layer.

Preferably, the bottom electrode includes a bottom electrode layer and a third electrode electrically connected to the bottom electrode layer, and the ferroelectric layer is disposed on the bottom electrode layer.

Preferably, it further includes a metal layer disposed between the ferroelectric layer and the dielectric layer.

Preferably, the bottom area of the tunneling layer is smaller than the top area of the free ferromagnetic layer, and the second electrode is disposed on the free ferromagnetic layer.

Preferably, the bottom area of the ferroelectric layer is smaller than the top area of the bottom electrode layer, and the third electrode is disposed on the bottom electrode layer.

The present invention also discloses a magnetic random access memory device, comprising the above magnetic random access memory and a control circuit electrically connected with the magnetic random access memory;

The control circuit is used for applying a read voltage or a write current on the magnetic tunnel junction, and applying a forward bias voltage or a negative bias voltage on the negative capacitance structure formed by the ferroelectric layer and the dielectric layer To reduce or improve the magnetic anisotropy of the magnetic tunnel junction.

The invention also discloses a read-write control method of the magnetic random storage device, comprising:

During the write phase:

A forward bias voltage is applied to both ends of the negative capacitance structure formed by the ferroelectric layer and the dielectric layer through a control circuit to reduce the magnetic anisotropy of the magnetic tunnel junction;

Data writing is completed by applying a writing current corresponding to the data to be written at both ends of the magnetic tunnel junction by the control circuit;

During the read phase:

A read voltage is applied across the magnetic tunnel junction by a control circuit, and data stored in the magnetic tunnel junction is determined according to the change of the read voltage.

Preferably, it further includes:

During the write phase:

A forward bias is applied to both ends of the negative capacitance structure formed by the ferroelectric layer and the dielectric layer while the write current corresponding to the data to be written is applied to both ends of the magnetic tunnel junction through the control circuit Voltage;

During the read phase:

A negative bias voltage is applied to both ends of the negative capacitance structure formed by the ferroelectric layer and the dielectric layer while the read voltage is applied across the magnetic tunnel junction through the control circuit.

In the present invention, a negative capacitance structure is formed by arranging a dielectric layer and a ferroelectric layer, so that the dielectric layer can obtain a voltage gain effect. The interface effect of the junction is greatly improved, thereby greatly improving the VCMA effect provided for the magnetic tunnel junction, thereby optimizing the power consumption, writing speed and thermal stability of the magnetic random access memory.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to these drawings without creative efforts.

FIG. 1 shows a structural diagram of a magnetic random access memory according to an embodiment of the present invention;

Fig. 2 shows the structure diagram of the connection between the magnetic random access memory and the external control circuit in the first embodiment of the present invention;

Fig. 3 shows the voltage timing diagram of the first electrode and the second electrode in the first embodiment of the present invention;

4 shows a flowchart of a method for controlling a magnetic random access memory according to an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a computer device applying a magnetic random access memory according to an embodiment of the present invention.

FIG. 6 shows a structural diagram of a magnetic random access memory according to Embodiment 2 of the present invention;

FIG. 7 shows a structural diagram of a magnetic random access memory according to Embodiment 3 of the present invention.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The following disclosure provides many different embodiments or examples for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are only examples and are not intended to limit the invention. For example, in the following description, forming the first part over or on the second part may include embodiments in which the first part and the second part are formed in direct contact, and may also include additionally forming between the first part and the second part. parts so that the first part and the second part may not be in direct contact. Furthermore, the present invention may repeat reference numerals and/or characters in various embodiments. This repetition is for the purpose of simplicity and clarity, and does not in itself indicate a relationship between the various embodiments and/or configurations discussed.

Also, for ease of description, spatially relative terms such as "below", "below", "lower", "above", "upper" and the like may be used herein to describe the The relationship of one element or part to another (or other) elements or parts. In addition to the orientation shown in the figures, spatially relative terms are intended to encompass different orientations of the device in use or operation. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

An existing Magnetic Tunnel Junction (MTJ)-based Magnetic Random Access Memory (MRAM) includes a spin-orbit moment layer and at least one magnetic tunnel junction disposed on the spin-orbit moment layer. The magnetic tunnel junction includes a reference (ferromagnetic) layer 133, a potential barrier layer (tunneling layer 132) and a free (ferromagnetic) layer 131 arranged from top to bottom, the bottom surface of the free layer and the upper surface of the spin-orbit moment layer Surface contact fixation.

The resistance value of the magnetic tunnel junction depends on the magnetization directions of the free layer and the reference layer. If the magnetization directions of the free layer and the reference layer are consistent, the resistance value of the magnetic tunnel junction is small and the magnetic tunnel junction is in a low resistance state. On the contrary, if the magnetization directions of the free layer and the reference layer are opposite, the resistance value of the magnetic tunnel junction is larger, and the magnetic tunnel junction is in a high resistance state. The magnetization direction of the reference layer is preset as a fixed and constant magnetization direction. For example, a synthetic antiferromagnetic layer can be used to make the magnetization direction of the reference layer fixed, and the magnetization direction of the free layer can be changed by writing operations. In the later data reading, the data stored in the memory can be determined by determining the resistance state of the magnetic tunnel junction through the reading circuit.

The mechanism of Voltage Control Magnetic Anisotropy (VCMA) is that the electric field applied at both ends of the MTJ leads to the accumulation of electron charges, which causes the change of the interface atomic orbital and density of states, which leads to the change of the interface magnetic anisotropy. . STT-MRAM based on VCMA effect is a new type of non-volatile magnetic random access memory that realizes information writing through spin current. When current flows through the magnetic layer, the current will be polarized, forming a spin-polarized current. Spin electrons transfer spin momentum to the magnetic moment of the free layer, so that the magnetic moment of the spin magnetic layer changes direction after gaining spin momentum. This process is called spin transfer torque. By inputting a current into the free layer, the magnetic moment of the free layer is reversed, thereby changing the resistance state of the magnetic tunnel junction and realizing data writing. VCMA technology can significantly reduce the current density required for magnetization inversion by adjusting the structure of the magnetic memory device and applying a bias voltage during the inversion process in the usual current-induced magnetization inversion of the free layer, enabling the device size to be further improved. reduction, while substantially reducing write power consumption.

However, as the size of magnetic random access memory is reduced, the VCMA effect coefficient cannot meet the requirements of MRAM. The advantages brought by VCMA technology to MRAM are directly related to the VCMA effect coefficient (that is, the magnetic anisotropy change brought by unit electric field, unit fJ/Vm, the typical value is 100fJ/Vm). Under the bias voltage, a stronger magnetic anisotropy modulation effect can be produced, thereby optimizing the write power consumption, write speed, write error rate and thermal stability of the MRAM (these indicators are in a trade-off relationship with each other). However, under the trend of decreasing device size, the current VCMA effect coefficient cannot meet the requirements of MRAM. Taking STT-MRAM as an example, its write current density is usually 10 ⁶ -10 ⁸ A/cm ² , which leads to a sharp increase in the write current when the device size is smaller than 40 nm, and it is extremely difficult to further reduce the device size. Therefore, in the present invention, a negative capacitance structure is formed by arranging a ferroelectric layer and a dielectric layer, so as to increase the amount of charge accumulation at the interface of the ferroelectric layer and the dielectric layer, thereby increasing the strength of the VCMA effect. Therefore, when the same VCMA effect strength as the existing STT-MRAM is formed, the writing current density required by the present invention is lower, the device size can be reduced, and the demand for the continuous miniaturization of the magnetic random access memory is satisfied. Further, preferably, a first electrode electrically connected to the reference ferromagnetic layer, a second electrode electrically connected to the free ferromagnetic layer, and a bottom electrode electrically connected to the ferroelectric layer are arranged in the magnetic random access memory, forming a structure with three external Magnetic random access memory for electrodes. The negative capacitance structure is pressurized through the second electrode and the bottom electrode, and data writing and reading are performed through the first electrode and the second electrode. The data writing and reading currents do not pass through the ferroelectric layer, which avoids the influence of the dielectric ferroelectric layer on the data reading and writing process, further reduces the requirements for the writing current density, and is conducive to further shrinking the size of the device.

Example 1

According to an aspect of the present invention, the present embodiment discloses a magnetic random access memory. As shown in FIG. 1 , in this embodiment, the magnetic random access memory includes a ferroelectric layer 110 , a dielectric layer 120 disposed on the ferroelectric layer 110 , and a magnetic layer at least partially disposed on the dielectric layer 120 . tunnel junction.

In the present invention, by setting the dielectric layer 120 and the ferroelectric layer 110 to form a negative capacitance structure, the dielectric layer 120 can obtain a voltage gain effect, and the magnetic tunnel junction is arranged on the dielectric layer 120 and the ferroelectric layer 110, which can significantly improve the dielectric The interface effect between the electrical layer 120 and the magnetic tunnel junction can greatly improve the VCMA effect provided for the magnetic tunnel junction, thereby optimizing the power consumption, writing speed and thermal stability of the magnetic random access memory.

Specifically, for the ferroelectric material forming the ferroelectric layer 110 , there is a negative capacitance region that cannot be stabilized under normal circumstances. According to the positive feedback model known in the art:

Q=C ₀ (V+a _f Q)

Among them, Q is the charge accumulation, and V is the applied voltage.

Using ferroelectric materials as ordinary capacitors has:

Q=C _fe V=C ₀ (V+a _f Q)

Then there are:

It can be seen that when C _fe < 0, since the positive feedback model cannot be stabilized, the ferroelectric material will continue to charge until it is limited by the neglected nonlinear term in the positive feedback model. However, if an ordinary capacitor is connected in series with the ferroelectric material, so that the total capacitance of the two is positive, the whole system can be stabilized, and the total capacitance value of the ferroelectric material and the ordinary capacitor connected in series is greater than their respective capacitances, namely:

C _tot ^-1 =C _fe ^-1 +C _cap ^-1

Therefore, the ferroelectric layer 110 and the dielectric layer 120 are disposed up and down and are in electrical contact, which is equivalent to connecting the ferroelectric layer 110 and the dielectric layer 120 in series to form a negative capacitance structure, which can improve the equivalent capacitance. At the same time, the amount of charge accumulation at the interface between the ferroelectric layer 110 and the dielectric layer 120 is increased, thereby increasing the strength of the VCMA effect.

In an optional embodiment, the magnetic tunnel junction includes a free ferromagnetic layer 131 , a tunneling layer 132 disposed on the free ferromagnetic layer 131 and a reference ferromagnetic layer disposed on the tunneling layer 132 133 , the free ferromagnetic layer 131 is at least partially disposed on the dielectric layer 120 . It can be understood that the free ferromagnetic layer 131 of the magnetic tunnel junction is disposed on the dielectric layer 120, and under the action of the negative capacitance structure of the ferroelectric layer 110 and the dielectric layer 120, a stronger VCMA is generated under the condition of an applied voltage effect, increase or decrease the magnetic anisotropy of the magnetic tunnel junction, and facilitate the writing of data. Preferably, the free ferromagnetic layer 131 may include two ferromagnetic layers and a metal coupling layer between the two ferromagnetic layers. The two ferromagnetic layers and the metal coupling layer between the two ferromagnetic layers form a synthetic free ferromagnetic layer 131, which can improve the thermal stability of the memory and reduce the difficulty of processing the memory.

In other optional embodiments, the structure composed of the tunnel layer and the free ferromagnetic layer 131 may be provided in multiple numbers, that is, the magnetic tunnel junction includes multiple combined layer structures and reference ferromagnetic structures formed on the multiple combined layer structures layer 133 , wherein each combined layer structure includes a free ferromagnetic layer 131 and a tunneling layer 132 provided on the free ferromagnetic layer 131 .

In a preferred embodiment, the magnetic random access memory further includes a first electrode 150 electrically connected to the reference ferromagnetic layer 133 and a second electrode 160 electrically connected to the free ferromagnetic layer 131 . It can be understood that, by connecting the first electrode 150 and the second electrode 160 to an external control circuit, as shown in FIG. 2 . The external control circuit can input the write current and the read voltage into the magnetic random access memory through the first electrode 150 and the second electrode 160 to realize the writing and reading of data.

In a preferred embodiment, the magnetic random access memory further includes a bottom electrode electrically connected to the ferroelectric layer 110 . It can be understood that the second electrode 160 is electrically connected to the free ferromagnetic layer 131. By connecting the bottom electrode and the second electrode 160 to an external control circuit, the bottom electrode and the second electrode 160 pass through different paths through the external control circuit. Therefore, the negative capacitance structure formed by the ferroelectric layer 110 and the dielectric layer 120 increases or decreases the magnetic anisotropy of the magnetic tunnel junction, thereby realizing data writing. Preferably, the bottom area of the tunneling layer 132 can be made smaller than the top area of the free ferromagnetic layer 131, and the second electrode 160 is disposed on the free ferromagnetic layer 131, thereby reducing the magnetic random access memory (RAM) capacity. size, easy to process molding.

More preferably, the bottom electrode may include a bottom electrode layer 171 and a third electrode 172 electrically connected to the bottom electrode layer 171 , and the ferroelectric layer 110 is disposed on the bottom electrode layer 171 . It can be understood that, by providing the bottom electrode in the form of the bottom electrode layer 171 and the third electrode 172, the ferroelectric layer 110 and its upper structure can be supported, and the bottom electrode layer 171 and the ferroelectric layer 110 can be in surface contact , and the third electrode 172 can be electrically connected with the external control circuit, and the connection method is simple. Preferably, the bottom area of the ferroelectric layer 110 can be made smaller than the top area of the bottom electrode layer 171, and the third electrode 172 is disposed on the bottom electrode layer 171, thereby further reducing the size of the magnetic random access memory. , which is convenient for process forming.

In this preferred embodiment, since the ferroelectric material of the ferroelectric layer 110 has dielectric properties, the ferroelectric layer 110 will affect the writing current of data. In order to avoid conflict between the change of magnetic anisotropy of the magnetic tunnel junction and the reading and writing of data, a bottom electrode electrically connected to the ferroelectric layer 110 and a second electrode 160 electrically connected to the free ferromagnetic layer 131 are provided. In actual use, as shown in FIG. 3 , a forward bias voltage can be applied between the second electrode 160 and the third electrode 172 to reduce the magnetic anisotropy of the free ferromagnetic layer 131 , thereby reducing the writing current and magnetic field. The thermal stability of the random access memory makes it possible to complete the data writing operation in the magnetic tunnel junction by inputting a small writing current between the first electrode 150 and the second electrode 160 .

After the data writing is completed, due to the existence of the remanent polarization of the ferroelectric layer 110, the VCMA effect of the ferroelectric layer 110 still partially exists after the end of the applied voltage, that is, the VCMA effect is non-volatile. In STT-MRAM, an external voltage can be applied during data writing to reduce the perpendicular magnetic anisotropy of the free ferromagnetic layer 131 , and a negative bias voltage can be applied after data writing is completed to improve the free ferromagnetic layer 131 . Various anisotropy of perpendicular magnetism, that is, improving the thermal stability of the magnetic tunnel junction and preventing the magnetic tunnel junction from being affected by the environment.

In a preferred embodiment, the magnetic random access memory further includes a metal layer 140 disposed between the ferroelectric layer 110 and the dielectric layer 120 . It can be understood that, for some ferroelectric materials (such as hafnium zirconium oxide), it is preferable to set a barrier layer between the dielectric layer 120 and the dielectric layer 120 , and for some of the dielectric layers 120 or the ferroelectric layer 110 , The metal layer 140 may be provided as a seed layer with a specific lattice structure to improve its film formation quality.

It should be noted that common shapes such as cylinder, cube or truncated cone can be used for the magnetic tunnel junction to reduce cost and facilitate the continuous miniaturization of size. In other embodiments, other shapes may also be selected, which are not limited in the present invention.

It should be noted that the arrangement of the first electrode 150 , the second electrode 160 and the third electrode 172 in this embodiment is only an example. In other embodiments, the first electrode 150 , the second electrode 160 and the third electrode 172 Other setting methods can also be used, which can be directly or indirectly electrically connected to the reference ferromagnetic layer 133, the free ferromagnetic layer 131 and the bottom electrode layer 171 without short-circuiting other layer structures. The shape, size and arrangement of the third electrode 160 and the third electrode 172 are not limited.

Preferably, the material of the free ferromagnetic layer 131 and the reference ferromagnetic layer 133 may be ferromagnetic metal, and the material of the tunneling layer 132 may be oxide. The ferromagnetic metal may be a single or mixed metal material formed of at least one of cobalt iron CoFe, cobalt iron boron CoFeB or nickel iron NiFe, wherein the ratio of the mixed metal materials may be the same or different. The oxide may be one of oxides such as magnesium oxide MgO or aluminum oxide Al ₂ O ₃ , which is used to generate the tunneling magnetoresistance effect. In practical applications, ferromagnetic metals and oxides can also adopt other feasible materials, which are not limited in the present invention.

Preferably, the material of the ferroelectric layer 110 may include hafnium oxide and doped one or more elements selected from elements such as silicon, zirconium, aluminum, lanthanum, yttrium, gadolinium, magnesium, and strontium. , the material of the ferroelectric layer 110 may include zirconia and doped one or more elements, the one or more elements are selected from elements such as silicon, hafnium, aluminum, lanthanum, yttrium, gadolinium, magnesium and strontium, iron The material of the electrical layer 110 may include strontium titanate and doped one or more elements selected from elements such as silicon, zirconium, aluminum, lanthanum, yttrium, gadolinium, magnesium, and hafnium. In other embodiments, the ferroelectric layer 110 may also be selected from other materials available in the art, which are not limited in the present invention.

Preferably, the material of the dielectric layer 120 may include hafnium oxide, zirconium oxide, magnesium oxide, aluminum oxide, strontium titanate and other metal oxides. In other embodiments, the dielectric layer 120 may also be selected from other feasible materials in the art. material, which is not limited in the present invention.

In a preferred embodiment, the layers of the magnetic random access memory can be arranged from bottom to top by conventional chemical vapor deposition, physical vapor deposition (including sputtering), ion beam epitaxy, atomic layer deposition or magnetron sputtering. are sequentially formed on the bottom electrode layer 171, and then the final magnetic random access memory is prepared by traditional nano-device processing techniques such as photolithography and etching.

Based on the same principle, this embodiment also discloses a magnetic random access memory device. The magnetic random access memory device includes the magnetic random access memory described in this embodiment and a control circuit electrically connected to the magnetic random access memory.

Wherein, the control circuit is used to apply a read voltage or a write current on the magnetic tunnel junction, and a forward bias voltage or negative capacitance is applied to the negative capacitance structure formed by the ferroelectric layer 110 and the dielectric layer 120 bias voltage to reduce or increase the magnetic anisotropy of the magnetic tunnel junction.

Since the principle of the device for solving the problem is similar to the above memory, the implementation of the device can refer to the implementation of the memory, and details are not repeated here.

Based on the same principle, this embodiment also discloses a read-write control method for a magnetic random access memory device. In this embodiment, as shown in FIG. 4 , the method includes:

During the write phase:

S100: A forward bias voltage is applied to both ends of the negative capacitance structure formed by the ferroelectric layer 110 and the dielectric layer 120 through a control circuit to reduce the magnetic anisotropy of the magnetic tunnel junction.

S200: Complete data writing by applying a writing current corresponding to the data to be written at both ends of the magnetic tunnel junction through a control circuit.

During the read phase:

S300: Apply a read voltage to both ends of the magnetic tunnel junction through a control circuit, and determine the data stored in the magnetic tunnel junction according to the change of the read voltage.

In a preferred embodiment, the method further comprises:

During the write phase:

S400 : while applying a writing current corresponding to the data to be written at both ends of the magnetic tunnel junction through a control circuit, apply a writing current to both ends of the negative capacitance structure formed by the ferroelectric layer 110 and the dielectric layer 120 Forward Bias Voltage. It can be understood that by applying a forward bias voltage to the second electrode 160 and the third electrode 172, the magnetic anisotropy of the magnetic tunnel junction can be reduced, thereby reducing the current density of the writing current in the writing stage.

In a preferred embodiment, the method further comprises:

During the read phase:

S500 : applying a negative bias voltage to both ends of the negative capacitance structure formed by the ferroelectric layer 110 and the dielectric layer 120 while applying the read voltage to both ends of the magnetic tunnel junction through the control circuit.

It can be understood that by applying a negative bias voltage to the second electrode 160 and the third electrode 172, the magnetic anisotropy of the magnetic tunnel junction can be improved, thereby reducing the probability of false inversion during data reading.

Since the principle of the method for solving the problem is similar to the above memory and device, the implementation of the method can refer to the implementation of the memory and the device, and details are not repeated here.

The magnetic random access memory in this embodiment can be used to form equipment such as computer chips. Specifically, the computer device may be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device Or a combination of any of these devices. In a typical example, the computer device specifically includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the memory can use the magnetic random access memory described in this embodiment.

Referring next to FIG. 5 , it shows a schematic structural diagram of a computer device 600 suitable for implementing the embodiments of the present application.

As shown in FIG. 5, a computer device 600 includes a central processing unit (CPU) 601 that can be loaded into a random access memory (RAM) 603 according to a program stored in a read only memory (ROM) 602 or from a storage section 608 program to perform various appropriate tasks and processes. In the RAM 603, various programs and data necessary for the operation of the system 600 are also stored. The CPU 601 , the ROM 602 , and the RAM 603 are connected to each other through a bus 604 . An input/output (I/O) interface 605 is also connected to bus 604 .

The following components are connected to the I/O interface 605: an input section 606 including a keyboard, a mouse, etc.; an output section 607 including a cathode ray tube (CRT), a liquid crystal feedback device (LCD), etc., and a speaker, etc.; a storage section including a hard disk, etc. 608; and a communication section 609 including network interface cards such as LAN cards, modems, and the like. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the I/O interface 605 as needed. A removable medium 611, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is mounted on the drive 610 as needed so that a computer program read therefrom is installed as the storage section 608 as needed.

Embodiment 2

The upper and lower order of each film layer of the magnetic random access memory is only to illustrate the relative positional relationship of each layer. According to the device application and preparation process of the magnetic random access memory, each layer can be from top to bottom in actual space. The bottom-up sequence setting, that is, the top-bottom sequence of each layer of the magnetic random access memory can be reversed, so as to optimize the film quality or device performance. Therefore, different from the first embodiment, in this embodiment, the upper and lower positions of each layer of the magnetic random access memory are opposite to those of the first embodiment. As shown in FIG. 6 , in this embodiment, the magnetic random access memory consists of bottom electrode 270 , ferroelectric layer 210 , metal layer 240 , dielectric layer 220 , free ferromagnetic layer 231 , tunneling layer 232 , reference The ferromagnetic layer 233 and the first electrode. The magnetic random access memory also includes a second electrode 260 in electrical contact with the free ferromagnetic layer 231 . Since the first electrode is located at the bottom layer of the magnetic random access memory in this embodiment, the first electrode may include a first electrode layer 251 and a first external electrode 252 located on the first electrode layer 251 . The other technical features of this embodiment are similar to those in the first embodiment, and are not repeated here.

Embodiment 3

Different from Embodiment 1 and Embodiment 2, in this embodiment, by setting the material and thickness of the tunneling layer and the ferroelectric layer, the dielectric layer can be replaced by the tunneling layer, that is, at this time, the magnetic tunnel junction includes a set of A free ferromagnetic layer between the ferroelectric layer and the dielectric layer and a reference ferromagnetic layer disposed at least partially on the dielectric layer. A part of the magnetic tunnel junction is between the ferroelectric layer and the dielectric layer, and the other part of the magnetic tunnel junction is arranged on the dielectric layer to realize non-volatile storage of data. For example, as shown in FIG. 7 , the magnetic random access memory includes a first electrode 350 , a reference ferromagnetic layer 333 , a dielectric layer 320 , a free ferromagnetic layer 331 , a ferroelectric layer 310 and a bottom electrode layer 371 in order from top to bottom. The magnetic random access memory further includes a third electrode 372 in electrical contact with the bottom electrode layer 371 and a second electrode 360 in electrical contact with the free ferromagnetic layer 331 .

In practical applications, different from the data read/write control method of the magnetic random access memory in the first embodiment, in this embodiment, a forward bias voltage needs to be applied between the first electrode and the third electrode to reduce the free ferromagnetic layer Therefore, the write current and the thermal stability of the magnetic random access memory are reduced, so that the data write operation in the magnetic tunnel junction can be completed by inputting a small write current between the first electrode and the second electrode. Other technical features of this embodiment are similar to those in the first embodiment, and are not repeated here.

It should also be noted that the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device comprising a series of elements includes not only those elements, but also Other elements not expressly listed, or which are inherent to such a process, method, article of manufacture, or apparatus are also included. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in the process, method, article of manufacture or device that includes the element.

Each embodiment in this specification is described in a progressive manner, and the same and similar parts between the various embodiments may be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, as for the system embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and for related parts, please refer to the partial descriptions of the method embodiments.

The above descriptions are merely examples of the present application, and are not intended to limit the present application. Various modifications and variations of this application are possible for those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included within the scope of the claims of this application.

Claims

A magnetic random access memory, comprising:

ferroelectric layer;

a dielectric layer disposed on the ferroelectric layer; and

A magnetic tunnel junction is at least partially disposed on the dielectric layer.
The magnetic random access memory of claim 1, wherein the magnetic tunnel junction comprises a free ferromagnetic layer, a tunneling layer provided on the free ferromagnetic layer, and a reference provided on the tunneling layer a ferromagnetic layer, the free ferromagnetic layer is disposed at least partially on the dielectric layer; or,

The magnetic tunnel junction includes a free ferromagnetic layer disposed between the ferroelectric layer and the dielectric layer, and a reference ferromagnetic layer disposed at least partially on the dielectric layer.
The magnetic random access memory of claim 2, further comprising a first electrode electrically connected to the reference ferromagnetic layer and a second electrode electrically connected to the free ferromagnetic layer.
The magnetic random access memory of claim 1, further comprising a bottom electrode electrically connected to the ferroelectric layer.
The magnetic random access memory of claim 4, wherein the bottom electrode comprises a bottom electrode layer and a third electrode electrically connected to the bottom electrode layer, and the ferroelectric layer is provided on the bottom electrode layer.
The magnetic random access memory of claim 1, further comprising a metal layer disposed between the ferroelectric layer and the dielectric layer.
The magnetic random access memory of claim 3, wherein a bottom area of the tunneling layer is smaller than a top area of the free ferromagnetic layer, and the second electrode is disposed on the free ferromagnetic layer.
The magnetic random access memory of claim 5, wherein the bottom area of the ferroelectric layer is smaller than the top area of the bottom electrode layer, and the third electrode is disposed on the bottom electrode layer.
A magnetic random access memory device, characterized by comprising the magnetic random access memory according to any one of claims 1-8 and a control circuit electrically connected to the magnetic random access memory;

The control circuit is used for applying a read voltage or a write current on the magnetic tunnel junction, and applying a forward bias voltage or a negative bias voltage on the negative capacitance structure formed by the ferroelectric layer and the dielectric layer To reduce or improve the magnetic anisotropy of the magnetic tunnel junction.
A read-write control method for a magnetic random access storage device, comprising:

During the write phase:

A forward bias voltage is applied to both ends of the negative capacitance structure formed by the ferroelectric layer and the dielectric layer through a control circuit to reduce the magnetic anisotropy of the magnetic tunnel junction;

Data writing is completed by applying a writing current corresponding to the data to be written at both ends of the magnetic tunnel junction by the control circuit;

During the read phase:

A read voltage is applied across the magnetic tunnel junction by a control circuit, and data stored in the magnetic tunnel junction is determined according to the change of the read voltage.
The read-write control method of a magnetic random access storage device according to claim 10, further comprising:

During the write phase:

A forward bias is applied to both ends of the negative capacitance structure formed by the ferroelectric layer and the dielectric layer while the write current corresponding to the data to be written is applied to both ends of the magnetic tunnel junction through the control circuit Voltage;

During the read phase:

A negative bias voltage is applied to both ends of the negative capacitance structure formed by the ferroelectric layer and the dielectric layer while the read voltage is applied across the magnetic tunnel junction through the control circuit.