WO2022017049A1 - 抗电力环境抑制电路、触控屏及触控显示装置 - Google Patents

抗电力环境抑制电路、触控屏及触控显示装置 Download PDF

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Publication number
WO2022017049A1
WO2022017049A1 PCT/CN2021/099391 CN2021099391W WO2022017049A1 WO 2022017049 A1 WO2022017049 A1 WO 2022017049A1 CN 2021099391 W CN2021099391 W CN 2021099391W WO 2022017049 A1 WO2022017049 A1 WO 2022017049A1
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WIPO (PCT)
Prior art keywords
power
circuit
coupled
suppression
differential mode
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PCT/CN2021/099391
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English (en)
French (fr)
Inventor
王建亭
王洁琼
雷利平
邢颖
黄翠兰
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/783,846 priority Critical patent/US20230009200A1/en
Publication of WO2022017049A1 publication Critical patent/WO2022017049A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/123—Suppression of common mode voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/126—Arrangements for reducing harmonics from ac input or output using passive filters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics

Definitions

  • the present disclosure relates to the field of touch technology, and in particular, to an anti-power environment suppression circuit, a touch screen and a touch display device.
  • capacitive touch display such as interactive electronic whiteboards, capacitive touch digital signage and other capacitive touch display devices, because they sense the touch position by capturing the weak capacitance changes of the touch screen, and these products are powered by AC power Therefore, it is very easy to be interfered by the input AC power of the product, resulting in false alarms of the product. Therefore, the capacitive touch display device has higher requirements on the power environment.
  • an anti-power environment suppression circuit including: a power input terminal, a power output terminal, a live wire, a neutral wire and a ground wire, and a common mode suppression sub-circuit.
  • the power input is configured to receive alternating current from an external power supply.
  • the power output terminal is configured to output an anti-jamming treated alternating current.
  • a live wire, a neutral wire and a ground wire are coupled in parallel between the power input terminal and the power output terminal.
  • the common-mode suppression sub-circuit is coupled to the line of the ground wire, and the common-mode suppression sub-circuit is further coupled to the live wire and the neutral wire; the common-mode suppression sub-circuit is configured to suppress the ground wire The common mode interference between the live wire and the live wire is suppressed, and the common mode interference between the ground wire and the neutral wire is suppressed, so as to perform anti-interference processing on the input alternating current.
  • the common mode rejection subcircuit includes at least one common mode rejection unit.
  • the common mode suppression unit includes: a common mode inductor, a first Y-type filter capacitor and a second Y-type filter capacitor.
  • the common mode inductor is coupled to the line of the ground wire.
  • One end of the first Y-shaped filter capacitor is coupled to the ground wire, and the other end of the first Y-shaped filter capacitor is coupled to the live wire.
  • One end of the second Y-type filter capacitor is coupled to the ground line, and the other end of the second Y-type filter capacitor is coupled to the neutral line.
  • the inductance of the common mode inductor ranges from 1 ⁇ H to 30 ⁇ H; the capacitance of the first Y-type filter capacitor is equal to the capacitance of the second Y-type filter capacitor.
  • the common mode rejection sub-circuit when the common mode rejection sub-circuit includes a plurality of common mode rejection units, the plurality of common mode rejection units are connected in series.
  • the anti-power environment suppression circuit further comprises: a differential mode suppression subcircuit in the line coupled to the live wire and the neutral wire.
  • the differential mode suppression subcircuit is configured to suppress differential mode interference between the live wire and the neutral wire, so as to perform anti-interference processing on the input alternating current.
  • the differential mode suppression subcircuit includes at least one differential mode suppression unit.
  • the differential mode suppression unit includes: a first differential mode inductor, a second differential mode inductor and an X-type filter capacitor.
  • the first differential mode inductor is coupled to the line of the live wire.
  • the second differential mode inductor is coupled in the line of the neutral line.
  • One end of the X-type filter capacitor is coupled to the live line, and the other end of the X-type filter capacitor is coupled to the neutral line.
  • the inductance of the first differential mode inductor is equal to the inductance of the second differential mode inductor; the capacitance range of the X-type filter capacitor is 0.08 ⁇ F ⁇ 0.12 ⁇ F.
  • the differential mode suppression sub-circuit when the differential mode suppression sub-circuit includes multiple differential mode suppression units, the multiple differential mode suppression units are connected in series.
  • a touch screen comprising: a touch panel, a power supply circuit, an AC input interface, and the anti-power environment suppression circuit described in any one of the above.
  • the power supply circuit is disposed on the non-sensing surface side of the touch panel, and the power supply circuit is coupled to the touch panel.
  • the anti-power environment suppression circuit is arranged on the non-inductive surface side of the touch panel, and the power input end of the anti-power environment suppression circuit is coupled to the AC input interface through live wire, neutral wire and ground wire, and the The power output terminal of the anti-power environment suppression circuit is coupled to the power circuit through a live wire, a neutral wire and a ground wire.
  • the touch screen further includes: a touch driver chip; the touch driver chip is coupled to the touch panel and the power circuit.
  • a touch display device comprising: a display screen and the above-mentioned touch screen; the touch screen and the display screen are superimposed and arranged.
  • FIG. 1 is a structural diagram of a capacitive touch display panel according to some embodiments
  • FIG. 2 is a structural diagram of an anti-power environment suppression circuit according to some embodiments.
  • FIG. 3 is another structural diagram of an anti-power environment suppression circuit according to some embodiments.
  • FIG. 4 is another structural diagram of an anti-power environment suppression circuit according to some embodiments.
  • FIG. 5 is another structural diagram of an anti-power environment suppression circuit according to some embodiments.
  • FIG. 6 is another structural diagram of an anti-power environment suppression circuit according to some embodiments.
  • FIG. 7 is another structural diagram of an anti-power environment suppression circuit according to some embodiments.
  • FIG. 8A is a structural diagram of a touch screen according to some embodiments.
  • 8B is a structural diagram of a touch driver chip in a touch screen according to some embodiments.
  • FIG. 9 is a structural diagram of a touch display device according to some embodiments.
  • FIG. 10 is another structural diagram of a touch display device according to some embodiments.
  • FIG. 11 is another structural diagram of a touch display device according to some embodiments.
  • FIG. 12 is another structural diagram of a touch display device according to some embodiments.
  • FIG. 13 is another structural diagram of a touch display device according to some embodiments.
  • FIG. 14 is another structural diagram of a touch display device according to some embodiments.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as “first” or “second” may expressly or implicitly include one or more of that feature.
  • plural means two or more.
  • Coupled and its derivatives may be used.
  • the term “coupled” may be used in describing some embodiments to indicate that two or more components are in electrical contact with each other.
  • the term “coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited by the content herein.
  • the term “if” is optionally construed to mean “when” or “at” or “in response to determining” or “in response to detecting,” depending on the context.
  • the phrases “if it is determined that" or “if a [statement or event] is detected” are optionally interpreted to mean “in determining" or “in response to determining" or “on detection of [recited condition or event]” or “in response to detection of [recited condition or event]”.
  • the capacitive touch display device has higher requirements on the power environment, because the capacitive touch display device captures the capacitance at the touched position in the touch module by capturing the capacitance of the touch display device.
  • the change amount is converted into a current change value or a voltage change value according to the capacitance change.
  • the touch drive chip realizes the positioning of the touched position according to the current change value or voltage change value.
  • the impedance of the touch electrodes TX and the sensing electrodes RX is relatively large, so that the current change value or voltage change provided to the touch driving chip via the touch electrodes TX and the sensing electrodes RX The value is weaker, so that the capacitive touch display device is prone to false alarms or misoperations when it is disturbed by the power environment.
  • the power environment refers to electromagnetic interference (Electromagnetic Interference, EMI for short) generated by other electronic devices that need to be powered around the electronic device (eg, a capacitive touch display device) that needs to be powered.
  • electromagnetic interference Electromagnetic Interference, EMI for short
  • the harsh power environment is mainly caused by the common-mode current generated in the reference ground.
  • the interference factors include electrical fast transient pulse trains, surges, voltage drops, short-term interruptions and voltage changes, AC harmonics, harmonics Interwave etc.
  • the capacitive touch display device and multiple other electronic devices requiring power supply will generate electromagnetic interference, so that the alternating current output by the power supply system is polluted. Abnormal phenomena such as instability occur, and the capacitive touch display device is sensitive to the power environment, so touch failure may occur.
  • the present disclosure provides an anti-power environment suppression circuit.
  • the above-mentioned anti-power environment suppression circuit can be applied to a capacitive touch display device, and is configured to perform anti-interference processing on the alternating current input to the capacitive touch display device, so that the The alternating current is not disturbed by the harsh external power environment, and provides clean power for each element (especially the touch screen) in the capacitive touch display device.
  • anti-power environment suppression circuit can also be applied to other devices that are sensitive to the power environment.
  • the anti-power environment suppression circuit is disposed at the AC input terminal of the capacitive touch display device.
  • the capacitive touch display device 1000 includes a main AC input interface 10 , an anti-power environment suppression circuit 20 , a main power supply circuit 30 and other functional elements. Between the input interface 10 and the main power supply circuit 30, the current of the main alternating current input interface 10 is input from the external power supply system. After the anti-interference processing of the anti-power environment suppression circuit 20, the common mode interference and differential mode interference generated by the alternating current are eliminated.
  • the main power supply circuit 30 After canceling, it is input to the main power supply circuit 30 so that the AC power received by the main power supply circuit 30 is clean power, and the main power supply circuit 30 generates a corresponding voltage according to the received power and distributes it to each functional element.
  • the main power circuit 30 distributes the voltage to the touch module in the capacitive touch display device 1
  • the anti-power environment suppression circuit 20 since the anti-power environment suppression circuit 20 performs anti-interference processing on the input AC power, the input AC power is finally input to the touch panel.
  • the AC power of the module is to eliminate the AC power of external pollution, so that the capacitive touch display device 1000 will not be disturbed by the power environment, thus avoiding the occurrence of false alarms or misoperations, thereby improving the accuracy of the capacitive touch display device 1000 and reliability.
  • the power transmission is in a three-phase four-wire manner, that is to say, the above-mentioned transmission lines of the alternating current include a live wire, a neutral wire and a ground wire.
  • the main AC input interface 10 is coupled to the power supply system through a three-claw plug.
  • the above capacitive touch display device 1000 is equipped with a system ground.
  • the system ground generally refers to a large-area ground in the capacitive touch display device 1000 .
  • the metal of the capacitive touch display device 1000 is generally grounded.
  • the back panel is regarded as the system ground, for example, the main AC input interface 10 is set on the metal back panel, and the system ground is connected to the ground wire in the "live wire, neutral wire and ground wire", and the anti-power environment suppression circuit 20 includes the power input terminal and the power output terminal, the power input terminal of the anti-power environment suppression circuit is coupled with the AC input interface through the live wire, the neutral wire and the ground wire, and the power output terminal of the anti-power environment suppression circuit is coupled with the power supply circuit through the live wire, the neutral wire and the ground wire catch.
  • the ground wire of "live wire, neutral wire and ground wire” is connected to the grounding point closest to the system ground of the connecting terminal of the main power circuit 30 after passing through the above-mentioned anti-power environment suppression circuit 20 .
  • the structure of the anti-power environment suppression circuit is described below.
  • the electromagnetic interference generates differential mode current between the line-line (ie, the neutral line and the live line), which causes interference on the load, which is differential mode interference.
  • Electromagnetic interference generates a common mode current between the line and ground (such as the live wire and the ground wire), and the common mode current generates a differential mode voltage on the load, causing interference, which is the common mode interference.
  • Both differential mode interference and common mode interference belong to power line noise, which will affect the normal operation of electronic devices that need to be powered. For example, due to the existence of differential mode interference and common mode interference, capacitive touch display devices cannot achieve normal touch functions. , prone to false positives or misoperations.
  • an anti-power environment suppression circuit 20 including: a power input terminal 201 , a power output terminal 202 , a power transmission line, and a common mode suppression sub-circuit 203 .
  • the anti-power environment suppression circuit 20 is configured to perform anti-interference processing on the received AC power, eliminate the influence of the external environment on the AC power, and output the AC power as a clean current to improve the AC power's anti-power environment pollution capability.
  • the power input terminal 201 is configured to receive AC power input from an external power source; the power output terminal 202 is configured to output AC power that has undergone anti-interference processing.
  • the power transmission line includes a live wire L, a neutral wire N, and a ground wire G coupled in parallel between the power input terminal 201 and the power output terminal 202 .
  • the common mode suppression sub-circuit 203 is coupled to the line of the ground line G, and the common mode suppression sub-circuit 203 is also coupled to the live line L and the neutral line N.
  • the common mode suppression sub-circuit 203 is configured to suppress the common mode interference between the ground wire G and the live wire L, so as to perform anti-interference processing on the input alternating current.
  • the common mode suppression subcircuit 203 can also Suppress common mode interference between ground line G and neutral line N.
  • the common mode suppression sub-circuit is set in the line of the ground wire G 203, and the common mode suppression sub-circuit 203 is coupled with the live wire L and the neutral wire N, which can suppress the common mode interference between the ground wire G and the live wire L, and suppress the common mode interference between the ground wire G and the neutral wire N , so that anti-interference processing can be performed on the alternating current, so that the alternating current output by the power output terminal 202 is protected from the interference of the external power environment.
  • the common mode rejection sub-circuit 203 includes at least one common mode rejection unit 2031 .
  • the common mode rejection sub-circuit 203 includes a common mode rejection unit 2031 .
  • the common mode suppression sub-circuit 203 may further include a plurality of common mode suppression units 2031, and when the common mode suppression subcircuit 203 includes a plurality of common mode suppression units 2031, the multiple common mode suppression units 2031 are connected in series.
  • the common mode suppression sub-circuit 203 includes two common mode suppression units 2031 , and the two common mode suppression units 2031 are connected in series.
  • the common mode suppression sub-circuit 203 may further include three common mode suppression units 2031, and the three common mode suppression units 2031 are connected in series.
  • the common mode rejection unit 2031 includes: a common mode inductor L1 , a first Y-type filter capacitor C1 and a second Y-type filter capacitor C2 .
  • the common mode inductor L1 is coupled to the ground line G, that is, both ends of the common mode sensor are coupled to the ground line G.
  • One end of the first Y-shaped filter capacitor C1 is coupled to the ground wire G, and the other end of the first Y-shaped filter capacitor C1 is coupled to the live wire L.
  • One end of the second Y-type filter capacitor C2 is coupled to the ground line G, and the other end of the second Y-type filter capacitor C2 is coupled to the neutral line N.
  • the common mode inductor L1 (Common mode Choke), also known as a common mode choke coil, can play the role of electromagnetic interference filtering, and is used to suppress the electromagnetic waves generated by high-speed signal lines. .
  • Y-type filter capacitors are also called “line-to-ground capacitors", that is, Y-type filter capacitors are capacitors placed between the line (live line L or neutral line N) and ground line G. Y-type filter capacitors can reduce the generation of electromagnetic interference.
  • the above-mentioned common mode suppression unit 2031 composed of the common mode inductor L1, the first Y-type filter capacitor C1 and the second Y-type filter capacitor C2 is equivalent to a filter circuit, and a common mode current is generated between the ground wire G and the live wire L, or
  • a common mode current is generated between the ground line G and the neutral line N
  • a magnetic field in the same direction will be generated in the coil.
  • Increasing the inductive reactance of the coil makes the coil show high impedance and produces a strong damping effect, thereby attenuating the common mode current and achieving the purpose of filtering.
  • the common mode electromagnetic interference signal on the ground wire G line can be controlled at a very low level.
  • the common mode suppression unit 2031 can not only suppress the incoming of external electromagnetic interference signals, but also attenuate the electromagnetic interference signals generated when the line itself works, which can effectively reduce the interference intensity of electromagnetic interference and play a filtering role.
  • the suppression can be greatly reduced. Common mode interference, so that the alternating current can achieve better anti-interference effect.
  • the inductance range of the common mode inductor L1 is 1 ⁇ H ⁇ 30 ⁇ H, for example, the inductance of the common mode inductor L1 is 10 ⁇ H, 20 ⁇ H or 30 ⁇ H.
  • the capacitance range of the first Y-type filter capacitor C1 is 400pF ⁇ 600pF, for example, the capacitance of the first Y-type filter capacitor C1 is 470pF, 500pF or 600pF.
  • the capacitance range of the second Y-type filter capacitor C2 is 400pF ⁇ 600pF, for example, the capacitance of the second Y-type filter capacitor C2 is 470pF, 500pF or 600pF.
  • the capacitance of the first Y-type filter capacitor C1 is equal to the capacitance of the second Y-type filter capacitor C2, eg, the capacitance of the first Y-type filter capacitor C1 and the capacitance of the second Y-type filter capacitor C2
  • the capacities are both 470pF.
  • the capacitance of the first Y-type filter capacitor C1 and the capacitance of the second Y-type filter capacitor C2 may not be equal, for example, the capacitance of the first Y-type filter capacitor C1 is 500pF, The capacitance of the type filter capacitor C2 is 470pF.
  • the settings of the inductance of the common mode inductor L1, the capacitance of the first Y-type filter capacitor C1 and the capacitance of the second Y-type filter capacitor C2 can be selected within the ranges provided above according to actual needs. The value is not limited.
  • the anti-power environment suppression circuit 20 further includes, in addition to the common mode suppression sub-circuit 203 described above, differential mode suppression in the lines coupled to the live line L and the neutral line N Subcircuit 204 .
  • the differential mode suppression sub-circuit 204 is configured to suppress the differential mode interference between the live wire L and the neutral wire N, so as to perform anti-interference processing on the input alternating current.
  • differential mode interference between the neutral line N and the live line L which will affect the alternating current.
  • the differential mode suppression subcircuit 204 by disposing the differential mode suppression subcircuit 204 in the line between the live wire L and the neutral wire N, the differential mode interference between the neutral wire N and the live wire L can be suppressed, so that the common mode suppression subcircuit can be suppressed.
  • 203 cooperates with the differential mode suppression sub-circuit 204 to perform anti-interference processing on the AC power, which can enhance the AC anti-interference processing effect of the anti-power environment suppression circuit 20, so that the AC power output by the power output terminal 202 is further protected from the interference of the external power environment. .
  • the differential mode suppression subcircuit 204 includes at least one differential mode suppression unit 2041 .
  • the differential mode suppression sub-circuit 204 includes a differential mode suppression unit 2041 .
  • the differential mode suppression sub-circuit 204 may further include a plurality of differential mode suppression units 2041, and when the differential mode suppression sub-circuit 204 includes a plurality of differential mode suppression units 2041, the multiple differential mode suppression units 2041 are connected in series.
  • the differential mode suppression sub-circuit 204 includes two differential mode suppression units 2041, and the two differential mode suppression units 2041 are connected in series.
  • the differential mode suppression sub-circuit 204 may further include three differential mode suppression units 2041, and the three differential mode suppression units 2041 are connected in series.
  • the differential mode suppression unit 2041 includes: a first differential mode inductor L2 , a second differential mode inductor L3 and an X-type filter capacitor C3 .
  • the first differential mode inductor L2 is coupled to the line of the live wire L, that is, both ends of the first differential mode inductor L2 are coupled to the live wire L.
  • the second differential mode inductor L3 is coupled to the line of the neutral line N, that is, both ends of the second differential mode inductor L3 are coupled to the neutral line N.
  • first differential mode inductor L2 and the second differential mode inductor L3 have mutual inductance properties, and the first differential mode inductor L2 and the second differential mode inductor L3 share the same
  • the differential mode inductance device is formed, which can suppress the differential mode interference between the live wire L and the neutral wire N.
  • One end of the X-type filter capacitor C3 is coupled to the live line L, and the other end of the X-type filter capacitor C3 is coupled to the neutral line N.
  • the differential mode inductor is a filter inductor capable of suppressing differential mode interference.
  • the X-type filter capacitor C3 is also called "cross-line capacitor", that is, the X-type filter capacitor C3 is a capacitor placed between the live line L and the neutral line N.
  • the X-type filter capacitor C3 can reduce the generation of electromagnetic interference to a considerable extent.
  • the above-mentioned differential mode suppression unit 2041 composed of the first differential mode inductor L2, the second differential mode inductor L3 and the X-type filter capacitor C3 is equivalent to a filter circuit, as shown in FIG.
  • the transmission direction of the alternating current (as shown by the arrow) is opposite.
  • the common mode suppression unit 2031 can effectively reduce the interference intensity of the differential mode interference and play a filtering role.
  • the inductances of the first differential mode inductor L2, the second differential mode inductor L3, and the capacitance value of the X-type filter capacitor C3 within an appropriate range, it is possible to suppress the Differential mode interference, so that the alternating current can achieve better anti-interference effect.
  • the inductance range of the first differential mode inductor L2 is 1 ⁇ H ⁇ 30 ⁇ H, for example, the inductance of the first differential mode inductor L2 is 10 ⁇ H, 20 ⁇ H or 30 ⁇ H.
  • the inductance range of the second differential mode inductor L3 is 1 ⁇ H ⁇ 30 ⁇ H, for example, the inductance of the second differential mode inductor L3 is 10 ⁇ H, 20 ⁇ H or 30 ⁇ H.
  • the capacitance range of the X-type filter capacitor C3 is 0.08 ⁇ F to 0.12 ⁇ F, for example, the capacitance of the X-type filter capacitor C3 is 0.08 ⁇ F, 0.1 ⁇ F or 0.12 ⁇ F.
  • the inductance of the first differential mode inductor L2 is equal to the inductance of the second differential mode inductor L3, eg, the inductance of the first differential mode inductor L2 and the inductance of the second differential mode inductor L3 The amount is 0.1 ⁇ F.
  • the inductance of the first differential mode inductor L2 and the inductance of the second differential mode inductor L3 may not be equal.
  • the inductance of the first differential mode inductor L2 is 0.1 ⁇ F
  • the second differential mode inductor L2 The inductance of the differential mode inductor L3 is 0.12 ⁇ F.
  • the settings of the inductance of the first differential mode inductor L2, the inductance of the second differential mode inductor L3 and the capacitance of the X-type filter capacitor C3 can be selected from the ranges provided above according to actual needs. The value is not limited.
  • the common mode inductor L1 , the first Y-type filter capacitor C1 and the second Y-type filter capacitor C2 included in the common mode suppression unit 2031 and the differential mode suppression unit 2041 The included first differential mode inductor L2, second differential mode inductor L3 and X-type filter capacitor C3, as well as the power input terminal 201 and the power output terminal 202 are all integrated on the circuit board 205, for example, the circuit board 205 is a PCB Board (Printed circuit boards, printed circuit boards), the PCB board is fixed in the touch display device, and is electrically connected to the corresponding device through the power input terminal 201 and the power output terminal 202, so that the anti-power environment suppression circuit 20 can The anti-interference processing of the alternating current input to the touch display device is realized.
  • the circuit board 205 is a PCB Board (Printed circuit boards, printed circuit boards)
  • the PCB board is fixed in the touch display device, and is electrically connected to the corresponding device through the power input terminal 201 and the power output terminal 202, so
  • the touch screen 40 includes: a touch panel 401 , an AC input interface 402 , a power supply circuit 403 and an anti-power environment suppression circuit 20 .
  • the alternating current from the power supply system enters the touch screen 40 through the alternating current input interface 402 , so as to provide power for the touch screen 40 .
  • the touch panel 401 has two opposite sides, which are a sensing surface and a non-sensing surface.
  • the sensing surface is provided with a plurality of touch electrodes TX and a plurality of sensing electrodes RX, and the plurality of touch electrodes TX and the plurality of sensing electrodes RX form a plurality of
  • a human body eg, a finger
  • the capacitance values of the plurality of capacitors corresponding to the touch position will change, so that touch can be realized by detecting the change in the capacitance values of the capacitors.
  • the power circuit 403 is disposed on the non-sensing surface side of the touch panel 401 , and the power circuit 403 is coupled to the touch panel 401 .
  • the anti-power environment suppression circuit 20 is disposed on the non-inductive surface side of the touch panel 104, and the power input terminal 201 of the anti-power environment suppression circuit 20 is coupled to the AC input interface 402 through the live wire L, the neutral wire N and the ground wire G, and the anti-power The power output terminal 202 of the environmental suppression circuit 20 is coupled to the power supply circuit 403 through the live wire L, the neutral wire N and the ground wire G.
  • the power supply circuit 403 is configured to generate a corresponding voltage according to the alternating current from the alternating current input port 402 to provide power to the touch panel 401 . Since the anti-power environment suppression circuit 20 is disposed between the AC power input port 402 and the power supply circuit 403 , the anti-power environment suppression circuit 20 can perform anti-interference processing on the AC power input to the touch screen 40 to suppress differential mode interference and common mode interference , so that the alternating current is not disturbed by the harsh external power environment and provides clean power for each element in the touch screen 40 .
  • the capacitance value change of the touch panel 401 can be accurately detected, which effectively improves the anti-power pollution capability of the touch screen 40, thereby reducing the interference of the touch screen by the power environment and the occurrence of false alarms or false alarms. case of misoperation.
  • the touch screen 40 further includes a touch driver chip 404 disposed on the non-sensing surface side of the touch panel 401 , and the touch driver chip 404 is coupled to the touch panel 401 . , and is also coupled to the power supply circuit 403 .
  • the power supply circuit is further configured to generate a corresponding voltage according to the alternating current from the alternating current input port 402 to provide power for the touch driving chip 404 .
  • the touch driving chip 404 is configured to provide a voltage signal to a plurality of touch electrodes TX and a plurality of sensing electrodes RX in the touch panel 401, and to receive the voltage or current change caused by the change of the capacitance value of the touch panel 401, so that the touch panel 401 changes according to the voltage or current. This voltage or current enables sensing of the touched position.
  • the touch driving chip 404 includes an AFE (Active Front End) rectifier unit 4041, a voltage amplifying unit 4042, a current amplifying unit 4043, and an analog-to-digital conversion unit 4044 that are connected in series in sequence.
  • the touch driver chip 404 further includes an internal power management module 4045 , which is coupled to the AFE rectifier unit 4041 , the voltage amplifying unit 4042 and the current amplifying unit 4043 respectively.
  • the reference reference voltage is provided to the AFE rectifying unit 4041, and the amplified voltage is provided to the voltage amplifying unit 4042 and the current amplifying unit 4043, so that the AFE rectifying unit 4041, the voltage amplifying unit 4042, and the current amplifying unit 4043 And the analog-to-digital conversion unit 4044 processes the received voltage or current (the current or voltage is an analog signal), thereby converting the input analog signal into a digital signal, and then processing the digital signal to realize the sensing of the touched position.
  • the touch driving chip 404 further includes a filter network 4046 and a bias unit 4047 , the filter network 4046 is coupled to the voltage amplifying unit 4042 , and the filter network 4046 is configured to input the AFE rectifier unit 4041 to the voltage amplifying unit 4042 .
  • the signal is subjected to noise reduction processing.
  • the biasing unit 4047 is coupled to the voltage amplifying unit 4042 , and the biasing unit 4047 is configured to provide a biasing voltage to the voltage amplifying unit 4042 .
  • measures such as threshold follow are also adopted, which can further eliminate product false alarms and misoperations caused by harsh power environments, and increase the reliability of the touch screen.
  • the touch display device may be, for example, the capacitive touch display device 1000 shown in FIG. 1 .
  • the touch display device 100 includes a display screen 50 and a touch screen 40 , and the touch screen 40 and the display screen 50 are superimposed and arranged.
  • the touch screen 40 is arranged on the side of the display screen 50 On the display surface side, the sensing surface of the touch screen 40 is farther from the display screen 50 than the non-sensing surface thereof.
  • the anti-power environment suppression circuit 20 is provided in the touch screen 40 , it can effectively prevent the touch screen 40 from being disturbed by the power environment and cause false alarms or misoperations, thereby improving the performance of the touch display device 100 . Accuracy and reliability.
  • the touch display device may be a liquid crystal display device (Liquid Crystal Display, LCD for short); the touch display device may also be an electroluminescence display device or a photoluminescence display device.
  • the electroluminescence display device may be an organic electroluminescence display device (Organic Light-Emitting Diode, OLED for short) or a quantum dot electroluminescence display device (Quantum Dot Light). Emitting Diodes, referred to as QLED).
  • the display device is a photoluminescence display device
  • the photoluminescence display device may be a quantum dot photoluminescence display device.
  • the above-mentioned touch display device can be a large-sized capacitive touch display device, such as an electronic interactive whiteboard (Interactive White Board, IWB for short) or a capacitive touch digital signage.
  • the above-mentioned touch display device may also be a capacitive interactive display product used for navigation, medical guidance, and shopping guidance.
  • the touch display device is an electronic interactive whiteboard
  • the touch display device includes: electronic whiteboard, short-focus projection, power amplifier, audio, computer, video booth, central control, wireless headset, cable TV and other multimedia equipment, among which the electronic whiteboard
  • the electronic whiteboard For an integrated structure including a display screen and a touch screen, the above-mentioned multiple multimedia devices are highly integrated and integrated.
  • the specific superposition methods of the touch screen 40 and the display screen 50 are as follows.
  • the touch screen 40 and the display screen 50 can be combined in an external way, or can be combined by on-cell technology or in-cell technology combined into one.
  • the touch screen 40 includes a touch structure 41
  • the display screen 50 includes a display panel.
  • the display screen 50 includes a liquid crystal display panel 1 , and the liquid crystal display panel 1 includes an array substrate 11 and a cell assembling substrate 14 arranged oppositely.
  • the touch display device 100 further includes a glass cover plate 2 .
  • the touch control structure 41 is disposed outside the liquid crystal display panel 1 , that is, the touch control structure 41 is disposed between the cover glass 2 and the first polarizer 14 .
  • the touch display device 100 is referred to as External touch display device.
  • the touch control structure 41 is disposed in the liquid crystal display panel 1 .
  • the touch display device is called an in-cell touch display device.
  • the touch control structure 41 may be arranged between the first polarizer 14 and the cell assembling substrate 12 .
  • the touch The display device is called an external (On cell) touch display device.
  • the touch control structure 41 is disposed between the first substrate 110 and the second substrate 120 , for example, disposed on the first substrate 110 .
  • the touch display device is referred to as Embedded (Incell) touch display device.
  • the main structure of the electroluminescence display device or the photoluminescence display device includes electroluminescence display devices arranged in sequence.
  • the electroluminescence display panel 3 or the photoluminescence display panel 3 includes a display substrate 31 and an encapsulation layer 32 for encapsulating the display substrate 31 .
  • the encapsulation layer 32 may be an encapsulation film or an encapsulation substrate.
  • the touch control structure 41 is directly disposed on the encapsulation layer 32 , that is, no other film layer is disposed between the touch control structure 41 and the encapsulation layer 32 .
  • the touch control structure 41 is disposed on the substrate 6, and the substrate 6 is attached to the encapsulation layer 32 through the second optical adhesive 7.
  • the thickness of the touch display device is relatively small, which is beneficial to realize thinning.
  • the touch display device includes a touch screen and a display screen. Since the touch screen is provided with an anti-power environment suppression circuit, before the AC power is input to the power supply circuit of the touch screen, the line passes through the anti-power environment suppression circuit. The circuit performs anti-interference processing on the alternating current, eliminates common mode interference and differential mode interference, and then transmits it to the power supply circuit, thereby avoiding the problem of false alarms on the touch screen caused by the interference of the input alternating current, and improving the reliability of the touch display device. sex.

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Abstract

提供一种抗电力环境抑制电路，包括：电力输入端、电力输出端、火线、零线和地线、及共模抑制子电路。所述电力输入端被配置为接收外部电源输入的交流电。所述电力输出端被配置为输出经过抗干扰处理的交流电。火线、零线和地线并联耦接于所述电力输入端与所述电力输出端之间的。共模抑制子电路耦接于所述地线的线路中，所述共模抑制子电路还与所述火线和零线耦接；所述共模抑制子电路被配置为，抑制所述地线与所述火线之间的共模干扰，及抑制所述地线与所述零线之间的共模干扰，以对所输入的交流电进行抗干扰处理。

Description

抗电力环境抑制电路、触控屏及触控显示装置
本申请要求于2020年07月22日提交的、申请号为202010712548.4的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及触控技术领域，尤其涉及一种抗电力环境抑制电路、触控屏及触控显示装置。
背景技术
在电容触控显示领域，例如交互式电子白板、电容触控数字标牌等电容触控显示装置，由于其是通过捕捉触控屏微弱的电容变化来进行触摸位置的感应，而这些产品使用交流电供电，因此极易受到产品输入交流电的干扰，造成产品误报，因此电容触控显示装置对电力环境的要求较高。
发明内容
一方面，提供一种抗电力环境抑制电路，包括：电力输入端、电力输出端、火线、零线和地线、及共模抑制子电路。所述电力输入端被配置为接收外部电源输入的交流电。所述电力输出端被配置为输出经过抗干扰处理的交流电。火线、零线和地线并联耦接于所述电力输入端与所述电力输出端之间。共模抑制子电路耦接于所述地线的线路中，所述共模抑制子电路还与所述火线和零线耦接；所述共模抑制子电路被配置为，抑制所述地线与所述火线之间的共模干扰，及抑制所述地线与所述零线之间的共模干扰，以对所输入的交流电进行抗干扰处理。
在一些实施例中，所述共模抑制子电路包括至少一个共模抑制单元。所述共模抑制单元包括：共模电感器、第一Y型滤波电容器和第二Y型滤波电容器。所述共模电感器耦接于所述地线的线路中。所述第一Y型滤波电容器的一端与所述地线耦接，所述第一Y型滤波电容器的另一端与所述火线耦接。所述第二Y型滤波电容器的一端与所述地线耦接，所述第二Y型滤波电容器的另一端与所述零线耦接。
在一些实施例中，所述共模电感器的电感量范围为1μH～30μH；所述第一Y型滤波电容器的电容量与所述第二Y型滤波电容器的电容量相等。
在一些实施例中，在所述共模抑制子电路包括多个共模抑制单元的情况下，所述多个共模抑制单元串联。
在一些实施例中，抗电力环境抑制电路还包括：耦接于所述火线和所述零线的线路中的差模抑制子电路。所述差模抑制子电路被配置为，抑制所述 火线与所述零线之间的差模干扰，以对所输入的交流电进行抗干扰处理。
在一些实施例中，所述差模抑制子电路包括至少一个差模抑制单元。所述差模抑制单元包括：第一差模电感器、第二差模电感器和X型滤波电容器。所述第一差模电感器耦接于所述火线的线路中。所述第二差模电感器耦接于所述零线的线路中。所述X型滤波电容器的一端与所述火线耦接，所述X型滤波电容器的另一端与所述零线耦接。
在一些实施例中，所述第一差模电感器的电感量与所述第二差模电感器的电感量相等；所述X型滤波电容器的电容量范围为0.08μF～0.12μF。
在一些实施例中，在所述差模抑制子电路包括多个差模抑制单元的情况下，所述多个差模抑制单元串联。
另一方面，提供一种触控屏，包括：触控面板、电源电路、交流电输入接口和如上任一项所述的抗电力环境抑制电路。电源电路设置于所述触控面板的非感应面侧，所述电源电路与所述触控面板耦接。所述抗电力环境抑制电路设置于所述触控面板的非感应面侧，所述抗电力环境抑制电路的电力输入端通过火线、零线和地线与所述交流电输入接口耦接，所述抗电力环境抑制电路的电力输出端通过火线、零线和地线与所述电源电路耦接。
在一些实施例中，触控屏还包括：触控驱动芯片；所述触控驱动芯片与所述触控面板和所述电源电路耦接。
又一方面，提供一种触控显示装置，包括：显示屏和如上所述的触控屏；所述触控屏与所述显示屏叠加设置。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为根据一些实施例的电容触控显示面板的结构图；
图2为根据一些实施例的抗电力环境抑制电路的一种结构图；
图3为根据一些实施例的抗电力环境抑制电路的另一种结构图；
图4为根据一些实施例的抗电力环境抑制电路的又一种结构图；
图5为根据一些实施例的抗电力环境抑制电路的又一种结构图；
图6为根据一些实施例的抗电力环境抑制电路的又一种结构图；
图7为根据一些实施例的抗电力环境抑制电路的又一种结构图；
图8A为根据一些实施例的触控屏的结构图；
图8B为根据一些实施例的触控屏中的触控驱动芯片的结构图；
图9为根据一些实施例的触控显示装置的一种结构图；
图10为根据一些实施例的触控显示装置的另一种结构图；
图11为根据一些实施例的触控显示装置的又一种结构图；
图12为根据一些实施例的触控显示装置的又一种结构图；
图13为根据一些实施例的触控显示装置的又一种结构图；
图14为根据一些实施例的触控显示装置的又一种结构图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“耦接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“耦接”以表明两个或两个以上部件彼此间有电接触。又如，术语“耦接”也可能指两个或两个以上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
在触控显示领域，以电容触控显示装置为例，电容触控显示装置对电力环境的要求较高，这是由于电容触控显示装置是通过捕捉触控模组中被触摸位置处的电容变化量，根据电容变化量转化为电流变化值或电压变化值，触控驱动芯片根据电流变化值或电压变化值来实现被触摸位置的定位，在人体触摸到触控模组的某一位置时，该位置处的电容值变化量非常微弱，一般在2pF～4pF之间，从而电容触控显示装置极易受到从外界输入的交流电的影响。并且，对于大尺寸的电容触控显示装置来说，触控电极TX和感应电极RX的阻抗较大，从而经由触控电极TX和感应电极RX提供给触控驱动芯片的电流变化值或电压变化值更加微弱，这样电容触控显示装置在受到电力环境的干扰的情况下，容易出现误报或误操作的情况。
在本公开中，电力环境指的是需供电电子器件(例如电容触控显示装置)周围的其他需供电电子器件产生的电磁干扰(Electromagnetic Interference，简称EMI)。其中，恶劣的电力环境主要是由于参考地中产生的共模电流引起的，另外，干扰因素有电快速瞬变脉冲串、浪涌、电压跌落、短时中断和电压变化、交流谐波、谐间波等。示例性地，在电容触控显示装置与多个其他需供电电子器件接入同一个供电系统的情况下，多个其他需供电电子器件会产生电磁干扰，使得供电系统所输出的交流电被污染，出现不稳定等异常现象，而电容触控显示装置对电力环境较敏感，从而可能会出现触控失灵。
基于此，本公开提供一种抗电力环境抑制电路，上述抗电力环境抑制电路可以应用于电容触控显示装置中，被配置为对输入至电容触控显示装置的交流电进行抗干扰处理，以使交流电不受外界恶劣的电力环境的干扰，为电容触控显示装置中的各个元件(尤其是触控屏)提供洁净的电力。
另外，上述抗电力环境抑制电路也可以应用于其他对电力环境较敏感的 装置中。
在一些示例中，抗电力环境抑制电路设置在电容触控显示装置的交流电输入端。示例性地，如图1所示，电容触控显示装置1000包括主交流电输入接口10、抗电力环境抑制电路20、主电源电路30以及其他各功能元件，抗电力环境抑制电路20设置于主交流电输入接口10与主电源电路30之间，从外界供电系统输入主交流电输入接口10的电流，在经过抗电力环境抑制电路20的抗干扰处理之后，交流电所产生的共模干扰和差模干扰被消除，之后在输入至主电源电路30，从而主电源电路30接收到的交流电为洁净的电力，主电源电路30根据所接收的电力生成相应的电压，分配至各功能元件。例如，在主电源电路30将电压分配给电容触控显示装置1中的触控模组的情况下，由于抗电力环境抑制电路20对输入的交流电进行了抗干扰处理，因此最终输入至触控模组的交流电为消除了外界污染的交流电，这样电容触控显示装置1000不会受到电力环境的干扰，避免了出现误报或误操作的情况，从而提高了电容触控显示装置1000的准确性和可靠性。
在一些实施例中，为了使交流电具有很方便的动力转换功能，电力传输以三相四线的方式，也就是说上述交流电的传输线包括火线、零线和地线，电容触控显示装置1000的主交流电输入接口10通过三爪插头与供电系统耦接。并且，上述电容触控显示装置1000配合有系统接地，示例性地，系统地一般是指电容触控显示装置1000中的大面积铺接的地，实际上一般把电容触控显示装置1000的金属后背板看成系统地，例如主交流电输入接口10设置在金属后背板上，系统地与“火线、零线和地线”中的地线相连，抗电力环境抑制电路20包括电力输入端和电力输出端，抗电力环境抑制电路的电力输入端通过火线、零线和地线与交流电输入接口耦接，抗电力环境抑制电路的电力输出端通过火线、零线和地线与电源电路耦接。其中，“火线、零线和地线”的地线在经过上述抗电力环境抑制电路20后接到主电源电路30的连接端子的距离系统地最近的的接地点。
以下对抗电力环境抑制电路的结构进行介绍。
首先需要说明的是，在交流电的传输过程中，电磁干扰在线-线(即零线和火线)之间产生差模电流，在负载上引起干扰，这就是差模干扰。电磁干扰在线-地(例如火线和地线)之间产生共模电流，共模电流在负载上产生差模电压，引起干扰，这就是共模干扰。差模干扰和共模干扰均属于电源线噪声，会对需供电电子器件的正常工作产生影响，例如，由于差模干扰和共模干扰的存在，电容触控显示装置无法实现正常的触控功能，容易出现误报或 误操作的情况。
如图2和图3所示，本公开提供了一种抗电力环境抑制电路20，包括：电力输入端201、电力输出端202、电力传输线和共模抑制子电路203。
抗电力环境抑制电路20被配置为对所接收的交流电进行抗干扰处理，消除外界环境对交流电的影响，输出的交流电为洁净电流，提高交流电的抗电力环境污染能力。
电力输入端201被配置为接收外部电源输入的交流电；电力输出端202被配置为输出经过抗干扰处理的交流电。
电力传输线包括并联耦接于电力输入端201与电力输出端202之间的火线L、零线N和地线G。
共模抑制子电路203耦接于地线G的线路中，共模抑制子电路203还与火线L和零线N耦接。共模抑制子电路203被配置为，抑制地线G与火线L之间的共模干扰，以对所输入的交流电进行抗干扰处理。
需要说明的是，地线G和火线L之间会出现较明显的共模干扰，从而对交流电造成影响，零线N与地线G之间也会存在干扰，共模抑制子电路203还能够抑制地线G与零线N之间的共模干扰。
在前边提到，恶劣的电力环境的产生原因主要是由于参考地中产生的共模电流，因此，在上述抗电力环境抑制电路20中，通过在地线G的线路中设置共模抑制子电路203，且使共模抑制子电路203与火线L和零线N耦接，能够抑制地线G与火线L之间的共模干扰，以及抑制地线G与零线N之间的共模干扰，从而能够对交流电进行抗干扰处理，使电力输出端202所输出的交流电免受外界电力环境的干扰。
在一些实施例中，共模抑制子电路203包括至少一个共模抑制单元2031。例如，如图4所示，共模抑制子电路203包括一个共模抑制单元2031。或者，共模抑制子电路203还可以包括多个共模抑制单元2031，在共模抑制子电路203包括多个共模抑制单元2031的情况下，多个共模抑制单元2031串联。如图5所示，共模抑制子电路203包括两个共模抑制单元2031，且这两个共模抑制单元2031串联。或者，共模抑制子电路203还可以包括三个共模抑制单元2031，且这三个共模抑制单元2031串联。
示例性地，如图6所示，共模抑制单元2031包括：共模电感器L1、第一Y型滤波电容器C1和第二Y型滤波电容器C2。
共模电感器L1耦接于地线G的线路中，即共模传感器的两端均与地线G耦接。
第一Y型滤波电容器C1的一端与地线G耦接，第一Y型滤波电容器C1的另一端与火线L耦接。
第二Y型滤波电容器C2的一端与地线G耦接，第二Y型滤波电容器C2的另一端与零线N耦接。
在上述共模抑制单元2031中，共模电感器L1(Common mode Choke)，也叫共模扼流圈，能够起到电磁干扰滤波的作用，用于抑制高速信号线产生的电磁波向外辐射发射。
Y型滤波电容器也称为“线对地电容器”，即Y型滤波电容器是置于线路(火线L或零线N)与地线G之间的电容器，Y型滤波电容器能够相当大限度地减少电磁干扰的产生。
上述由共模电感器L1、第一Y型滤波电容器C1和第二Y型滤波电容器C2组成的共模抑制单元2031，相当于滤波电路，当地线G与火线L之间产生共模电流，或者地线G与零线N之间产生共模电流时，当有共模电流流经共模电感器L1的线圈时，由于共模电流的同向性，会在线圈内产生同向的磁场而增大线圈的感抗，使线圈表现为高阻抗，产生较强的阻尼效果，以此衰减共模电流，达到滤波的目的。通过共模抑制单元2031，可以使地线G线路上的共模电磁干扰信号被控制在很低的电平上。该共模抑制单元2031既可以抑制外部的电磁干扰信号传入，又可以衰减线路自身工作时产生的电磁干扰信号，能有效地降低电磁干扰的干扰强度，起到滤波作用。
在一些示例中，通过将上述共模电感器L1的电感量，以及第一Y型滤波电容器C1和第二Y型滤波电容器C2的电容值设定在合适的范围内，能够较大程度地抑制共模干扰，使交流电达到较好的抗干扰效果。
示例性地，共模电感器L1的电感量范围为1μH～30μH，例如共模电感器L1的电感量为10μH、20μH或30μH。
第一Y型滤波电容器C1的电容量范围为400pF～600pF，例如第一Y型滤波电容器C1的电容量为470pF、500pF或600pF。第二Y型滤波电容器C2的电容量范围为400pF～600pF，例如第二Y型滤波电容器C2的电容量为470pF、500pF或600pF。
在一些示例中，第一Y型滤波电容器C1的电容量与第二Y型滤波电容器C2的电容量相等，例如，第一Y型滤波电容器C1的电容量和第二Y型滤波电容器C2的电容量均为470pF。在另一些示例中，第一Y型滤波电容器C1的电容量与第二Y型滤波电容器C2的电容量也可以不相等，例如，第一Y型滤波电容器C1的电容量为500pF，第二Y型滤波电容器C2的电容量均 为470pF。
对于共模电感器L1的电感量、第一Y型滤波电容器C1的电容量与第二Y型滤波电容器C2的电容量的设置可以根据实际需要在上述提供的范围内进行选择，本公开对具体取值并不设限。
在一些实施例中，如图3所示，抗电力环境抑制电路20在包括上述共模抑制子电路203的基础上，还包括：耦接于火线L和零线N的线路中的差模抑制子电路204。差模抑制子电路204被配置为，抑制火线L与零线N之间的差模干扰，以对所输入的交流电进行抗干扰处理。
需要说明的是，零线N和火线L之间会出现较明显的差模干扰，从而对交流电造成影响。在上述抗电力环境抑制电路20中，通过在火线L和零线N的线路中设置差模抑制子电路204，能够抑制零线N与火线L之间的差模干扰，从而共模抑制子电路203与差模抑制子电路204相互配合，对交流电进行抗干扰处理，能够增强抗电力环境抑制电路20的交流电抗干扰处理效果，使电力输出端202所输出的交流电进一步免受外界电力环境的干扰。
在一些实施例中，差模抑制子电路204包括至少一个差模抑制单元2041。例如，如图4所示，差模抑制子电路204包括一个差模抑制单元2041。或者，差模抑制子电路204还可以包括多个差模抑制单元2041，在差模抑制子电路204包括多个差模抑制单元2041的情况下，多个差模抑制单元2041串联。如图5所示，差模抑制子电路204包括两个差模抑制单元2041，且这两个差模抑制单元2041串联。或者，差模抑制子电路204还可以包括三个差模抑制单元2041，且这三个差模抑制单元2041串联。
示例性地，如图6所示，差模抑制单元2041包括：第一差模电感器L2、第二差模电感器L3和X型滤波电容器C3。
第一差模电感器L2耦接于火线L的线路中，即第一差模电感器L2的两端均与火线L耦接。第二差模电感器L3耦接于零线N的线路中，即第二差模电感器L3的两端均与零线N耦接。
请参见图6和图7，需要说明的是，第一差模电感器L2和第二差模电感器L3之间具有互感属性，第一差模电感器L2与第二差模电感器L3共同组成差模电感器件，能够抑制抑制火线L与零线N之间的差模干扰。
X型滤波电容器C3的一端与火线L耦接，X型滤波电容器C3的另一端与零线N耦接。
在上述差模抑制单元2041中，差模电感器是能够抑制差模干扰的滤波电感。X型滤波电容器C3也称为“跨线电容器”，即X型滤波电容器C3是置 于火线L和零线N之间的电容器，X型滤波电容器C3能够相当大限度地减少电磁干扰的产生。
上述由第一差模电感器L2、第二差模电感器L3和X型滤波电容器C3的差模抑制单元2041，相当于滤波电路，如图6所示，在零线N与火线L传输的交流电的传输方向(如箭头所示)相反，当零线N与火线L之间产生差模电流时，通过共模抑制单元2031，能够有效地降低差模干扰的干扰强度，起到滤波作用。
在一些示例中，通过将上述第一差模电感器L2、第二差模电感器L3的电感量，以及X型滤波电容器C3的电容值设定在合适的范围内，能够较大程度地抑制差模干扰，使交流电达到较好的抗干扰效果。
示例性地，第一差模电感器L2的电感量范围为1μH～30μH，例如第一差模电感器L2的电感量为10μH、20μH或30μH。第二差模电感器L3的电感量范围为1μH～30μH，例如第二差模电感器L3的电感量为10μH、20μH或30μH。X型滤波电容器C3的电容量范围为0.08μF～0.12μF，例如X型滤波电容器C3的电容量为0.08μF、0.1μF或0.12μF。
在一些示例中，第一差模电感器L2的电感量与第二差模电感器L3的电感量相等，例如，第一差模电感器L2的电感量与第二差模电感器L3的电感量均为0.1μF。在另一些示例中，第一差模电感器L2的电感量与第二差模电感器L3的电感量也可以不相等，例如，第一差模电感器L2的电感量为0.1μF，第二差模电感器L3的电感量为0.12μF。
对于第一差模电感器L2的电感量、第二差模电感器L3的电感量和X型滤波电容器C3的电容量的设置可以根据实际需要在上述提供的范围内进行选择，本公开对具体取值并不设限。
在一些实施例中，如图7所示，上述共模抑制单元2031所包括的共模电感器L1、第一Y型滤波电容器C1和第二Y型滤波电容器C2，和上述差模抑制单元2041所包括的第一差模电感器L2、第二差模电感器L3和X型滤波电容器C3，以及电力输入端201和电力输出端202均集成在电路板205上，例如该电路板205为PCB板(Printed circuit boards，印制电路板)，将该PCB板固定在触控显示装置中，并通过电力输入端201和电力输出端202与相应的器件电连接，从而抗电力环境抑制电路20能够实现对输入至触控显示装置的交流电进行抗干扰处理。
本公开的一些实施例还提供一种触控屏，如图8A所示，该触控屏40包括：触控面板401、交流电输入接口402、电源电路403和抗电力环境抑制电 路20。
其中，来自供电系统的交流电通过交流电输入接口402进入触控屏40，从而为触控屏40提供电力。
触控面板401具有相对的两面，分别为感应面和非感应面，感应面中设置有多个触控电极TX和多个感应电极RX，多个触控电极TX和多个感应电极RX形成多个电容，在人体(例如手指)触摸触控面板的感应面时，触摸位置处对应的多个电容的电容值会发生变化，从而通过检测电容的电容值变化量能够实现触控。
电源电路403设置于触控面板401的非感应面侧，电源电路403与触控面板401耦接。
抗电力环境抑制电路20设置于触控面板104的非感应面侧，抗电力环境抑制电路20的电力输入端201通过火线L、零线N和地线G与交流电输入接口402耦接，抗电力环境抑制电路20的电力输出端202通过火线L、零线N和地线G与电源电路403耦接。
电源电路403被配置为根据来自交流电输入端口402的交流电生成对应的电压，为触控面板401提供电能。由于在交流电输入端口402和电源电路403之间设置有抗电力环境抑制电路20，抗电力环境抑制电路20能够对输入至触控屏40的交流电进行抗干扰处理，抑制差模干扰和共模干扰，以使交流电不受外界恶劣的电力环境的干扰，为触控屏40中的各个元件提供洁净的电力。从而触控屏40中，触控面板401的电容值变化量能够被准确地检测到，有效提高触控屏40的抗电力污染能力，从而减少触控屏受电力环境的干扰而出现误报或者误操作的情况。
在一些实施例中，如图8A所示，触控屏40还包括设置于设置于触控面板401的非感应面侧的触控驱动芯片404，触控驱动芯片404与触控面板401耦接，还与电源电路403耦接。
电源电路还被配置为根据来自交流电输入端口402的交流电生成对应的电压，为触控驱动芯片404提供电能。
触控驱动芯片404被配置为向触控面板401中的多个触控电极TX和多个感应电极RX提供电压信号，并接收触控面板401的电容值变化引起的电压或者电流变化，从而根据该电压或者电流实现被触摸位置的感应。
在一些实施例中，如图8B所示，触控驱动芯片404包括依次串联的AFE(Active Front End，主动前端)整流单元4041、电压放大单元4042、电流放大单元4043和模数转换单元4044，触控驱动芯片404还包括内部电源管理模 块4045，内部电源管理模块4045与AFE整流单元4041、电压放大单元4042、电流放大单元4043分别耦接，内部电源管理模块4045被配置为接收电源电路403所提供的电能，并根据所接收的电能向AFE整流单元4041提供参考基准电压，并向电压放大单元4042和电流放大单元4043提供放大电压，从而AFE整流单元4041、电压放大单元4042、电流放大单元4043和模数转换单元4044对所接收的电压或者电流(该电流或电压为模拟信号)进行处理，从而将输入的模拟信号转换成数字信号，进而对该数字信号进行处理实现被触摸位置的感应。
在一些示例中，触控驱动芯片404还包括滤波网络4046和偏置单元4047，滤波网络4046与电压放大单元4042耦接，滤波网络4046被配置为对AFE整流单元4041输入至电压放大单元4042的信号进行降噪处理，偏置单元4047与电压放大单元4042耦接，偏置单元4047被配置为向电压放大单元4042提供偏置电压。另外，在模数转换单元4044进行信号转换的过程中，还采用阈值跟随等措施，这样能够进一步消除恶劣的电力环境引起的产品误报及误操作，增加触控屏的可靠性。
本公开的一些实施例还提供了一种触控显示装置，如前所述，该触控显示装置例如可以为如图1所示的电容触控显示装置1000。
在一些实施例中，如图9所示，触控显示装置100包括显示屏50和触控屏40，触控屏40和显示屏50叠加设置，例如，触控屏40设置于显示屏50的显示面一侧，触控屏40的感应面相对于其非感应面远离显示屏50。
由于在触控屏40中设置有抗电力环境抑制电路20，从而能够有效避免上述触控屏40出现受电力环境的干扰而误报或者误操作的情况，从而能够提高该触控显示装置100的准确性和可靠性。
示例性地，触控显示装置可以为液晶显示装置(Liquid Crystal Display，简称LCD)；触控显示装置也可以为电致发光显示装置或光致发光显示装置。在触控显示装置为电致发光显示装置的情况下，电致发光显示装置可以为有机电致发光显示装置(Organic Light-Emitting Diode，简称OLED)或量子点电致发光显示装置(Quantum Dot Light Emitting Diodes，简称QLED)。在显示装置为光致发光显示装置的情况下，光致发光显示装置可以为量子点光致发光显示装置。
上述触控显示装置可以使大尺寸的电容触控显示装置，例如可以是电子交互白板(Interactive White Board，简称IWB)或电容触控数字标牌等装置。或者上述触控显示装置还可以是电容交互的用于导航、导医、导购的显示产 品。
在触控显示装置为电子交互白板的情况下，触控显示装置包括：电子白板、短焦投影、功放、音响、电脑、视频展台、中控、无线耳麦、有线电视等多媒体设备，其中电子白板为包括显示屏和触控屏的一体结构，上述多个多媒体设备高度集成，合为一体。
在一些实施例中，触控屏40与显示屏50的具体叠加方式有如下几种情况，触控屏40与显示屏50可以通过外挂式的方式结合，也可以通过on cell技术或者in cell技术结合为一体。其中，触控屏40包括触控结构41，显示屏50包括显示面板。
在上述触控显示装置为液晶显示装置的情况下，如图10～图12所示，显示屏50包括液晶显示面板1，液晶显示面板1包括相对设置的阵列基板11和对盒基板14，设置于阵列基板11和对盒基板14之间的液晶层13，以及设置于对盒基板12的外侧的第一偏光片14、设置于阵列基板11的外侧的第二偏光片15。触控显示装置100还包括玻璃盖板2。
在一些示例中，触控结构41设置在液晶显示面板1外，即，触控结构41设置在盖板玻璃2和第一偏光片14之间，在此情况下，触控显示装置100称为外挂式触控显示装置。
在另一些示例中，如图11和图12所示，触控结构41设置在液晶显示面板1内，在此情况下，触控显示装置称为内嵌式触控显示装置。在触控结构41设置在液晶显示面板1内的情况下，可以是如图11所示，触控结构41设置在第一偏光片14和对盒基板12之间，在此情况下，触控显示装置称为外置式(On cell)触控显示装置。也可以是如图12所示，触控结构41设置在第一衬底110和第二衬底120之间，例如设置在第一衬底110上，在此情况下，触控显示装置称为嵌入式(Incell)触控显示装置。
在触控显示装置为电致发光显示装置或光致发光显示装置的情况下，如图13和图14所示，电致发光显示装置或光致发光显示装置的主要结构包括依次设置的电致发光显示面板3或光致发光显示面板3、触控结构41、偏光片4、第一光学胶(Optically Clear Adhesive，简称OCA)5和盖板玻璃2。
其中，电致发光显示面板3或光致发光显示面板3包括显示用基板31和用于封装显示用基板31的封装层32。此处，封装层32可以为封装薄膜，也可以为封装基板。
在一些示例中，如图13所示，触控结构41直接设置在封装层32上，即，触控结构41和封装层32之间不设置其它膜层。在另一些示例中，如图14所 示，触控结构41设置在基板6上，基板6通过第二光学胶7贴附在封装层32上。此处，如图13所示，在触控结构41直接设置在封装层32上的情况下，触控显示装置的厚度较小，有利于实现轻薄化。
综上，本公开所提供的触控显示装置包括触控屏和显示屏，由于触控屏中设置有抗电力环境抑制电路，在交流电输入触控屏的电源电路之前，线通过抗电力环境抑制电路对交流电进行抗干扰处理，消除共模干扰和差模干扰，之后再传输给电源电路，从而避免了所输入的交流电存在干扰引起触控屏误报的问题，提高了触控显示装置的可靠性。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (11)

  1. 一种抗电力环境抑制电路，包括：
    电力输入端；所述电力输入端被配置为接收外部电源输入的交流电；
    电力输出端；所述电力输出端被配置为输出经过抗干扰处理的交流电；
    并联耦接于所述电力输入端与所述电力输出端之间的火线、零线和地线；
    耦接于所述地线的线路中的共模抑制子电路，所述共模抑制子电路还与所述火线和零线耦接；所述共模抑制子电路被配置为，抑制所述地线与所述火线之间的共模干扰，及抑制所述地线与所述零线之间的共模干扰，以对所输入的交流电进行抗干扰处理。
  2. 根据权利要求1所述的抗电力环境抑制电路，其中，所述共模抑制子电路包括至少一个共模抑制单元；
    所述共模抑制单元包括：共模电感器、第一Y型滤波电容器和第二Y型滤波电容器；
    所述共模电感器耦接于所述地线的线路中；
    所述第一Y型滤波电容器的一端与所述地线耦接，所述第一Y型滤波电容器的另一端与所述火线耦接；
    所述第二Y型滤波电容器的一端与所述地线耦接，所述第二Y型滤波电容器的另一端与所述零线耦接。
  3. 根据权利要求2所述的抗电力环境抑制电路，其中，
    所述共模电感器的电感量范围为1μH～30μH；
    所述第一Y型滤波电容器的电容量与所述第二Y型滤波电容器的电容量相等。
  4. 根据权利要求2或3所述的抗电力环境抑制电路，其中，在所述共模抑制子电路包括多个共模抑制单元的情况下，所述多个共模抑制单元串联。
  5. 根据权利要求1～4中任一项所述的抗电力环境抑制电路，还包括：耦接于所述火线和所述零线的线路中的差模抑制子电路；
    所述差模抑制子电路被配置为，抑制所述火线与所述零线之间的差模干扰，以对所输入的交流电进行抗干扰处理。
  6. 根据权利要求5所述的抗电力环境抑制电路，其中，所述差模抑制子电路包括至少一个差模抑制单元；
    所述差模抑制单元包括：第一差模电感器、第二差模电感器和X型滤波电容器；
    所述第一差模电感器耦接于所述火线的线路中；
    所述第二差模电感器耦接于所述零线的线路中；
    所述X型滤波电容器的一端与所述火线耦接，所述X型滤波电容器的另一端与所述零线耦接。
  7. 根据权利要求6所述的抗电力环境抑制电路，其中，
    所述第一差模电感器的电感量与所述第二差模电感器的电感量相等；
    所述X型滤波电容器的电容量范围为0.08μF～0.12μF。
  8. 根据权利要求6或7所述的抗电力环境抑制电路，其中，在所述差模抑制子电路包括多个差模抑制单元的情况下，所述多个差模抑制单元串联。
  9. 一种触控屏，包括：
    触控面板；
    设置于所述触控面板的非感应面侧的电源电路，所述电源电路与所述触控面板耦接；
    交流电输入接口；和
    如权利要求1～8中任一项所述的抗电力环境抑制电路；所述抗电力环境抑制电路设置于所述触控面板的非感应面侧，所述抗电力环境抑制电路的电力输入端通过火线、零线和地线与所述交流电输入接口耦接，所述抗电力环境抑制电路的电力输出端通过火线、零线和地线与所述电源电路耦接。
  10. 根据权利要求9所述的触控屏，还包括：触控驱动芯片；
    所述触控驱动芯片与所述触控面板和所述电源电路耦接。
  11. 一种触控显示装置，包括：
    显示屏；
    如权利要求9或10所述的触控屏；所述触控屏与所述显示屏叠加设置。
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