WO2022014863A1 - High-heat dissipation igbt power semiconductor package and manufacturing method therefor - Google Patents

High-heat dissipation igbt power semiconductor package and manufacturing method therefor Download PDF

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Publication number
WO2022014863A1
WO2022014863A1 PCT/KR2021/006943 KR2021006943W WO2022014863A1 WO 2022014863 A1 WO2022014863 A1 WO 2022014863A1 KR 2021006943 W KR2021006943 W KR 2021006943W WO 2022014863 A1 WO2022014863 A1 WO 2022014863A1
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power semiconductor
epoxy
semiconductor package
layer
weight
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PCT/KR2021/006943
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French (fr)
Korean (ko)
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김윤진
김현준
장상현
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주식회사 테라온
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Publication of WO2022014863A1 publication Critical patent/WO2022014863A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/296Organo-silicon compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4846Connecting portions with multiple bonds on the same bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Definitions

  • the present invention relates to a high heat dissipation IGBT power semiconductor package having a simple structure and reducing weight by applying a new insulating layer without using a conventional direct bonded copper (DBC) and a method for manufacturing the same.
  • DBC direct bonded copper
  • An insulated gate bipolar transistor (IGBT) power semiconductor is a device that converts, transforms, stabilizes, distributes, and controls power, and improves energy efficiency and changes voltage in the process of transmitting and controlling power. It is a key component that provides stability and reliability of the system by stably controlling the IGBT.
  • the power semiconductor not only conventional Si-based semiconductor devices, but also WBG (wide band gap) compound semiconductors (eg, SiC, GaN, artificial diamond, etc.) are used or are currently being developed.
  • WBG wide band gap
  • the power semiconductor using the WBG compound semiconductor is receiving great attention because it is expected that it can cope with high voltage and high current, has high energy efficiency, and has a maximum operating temperature of 200 to 300°C.
  • the power semiconductor is widely used from washing machines, refrigerators, air conditioners, elevators, escalators, UPS, renewable energy, electric vehicles, etc. to motors, which are essential parts for most industrial machines.
  • the power semiconductor may be used alone, but is typically applied to a product in the form of a package or module including a power semiconductor.
  • a power semiconductor package or power module containing a power semiconductor improves performance (increasing voltage and current) by putting several individual devices in one package, or power IC for control ( power IC) and protection circuits are added and integrated into one package.
  • the power semiconductor package or power module is composed of various components such as a power semiconductor, direct bond copper (DBC), an aluminum wire, a base plate, molding silicon, a case and/or cover, and a terminal. .
  • DBC direct bond copper
  • FIG. 1 is a cross-sectional view showing the structure of a conventional power semiconductor package.
  • the conventional power semiconductor package is SiO 2 , SiC, AlN, SiN, etc., on the DBC in which copper is directly bonded to the upper part 7 and the lower part 5 of the substrate 6 made of a ceramic material.
  • a power semiconductor chip 9 bonded by solder or an attach material 8 is located, and a metal base plate 3 made of a metal component or material is again placed under the DBC with solder 4 and the like. bonded through
  • a heat sink 1 bonded to the metal base plate by a thermal interface material (TIM) 2 may be included under the metal base plate.
  • the copper layer 7 on the ceramic substrate 6 of the DBC includes a circuit, and the circuit on the copper layer 7 is directly connected to the power semiconductor 9 through the solder 8 and the wire 10 do. Accordingly, the copper layer 7 on which the circuit is formed located on the ceramic substrate of the DBC performs a function of electrically transmitting a signal to the power semiconductor 9 thereon.
  • the copper layer 5 under the ceramic substrate 6 of the DBC does not perform any different electrically or thermally functions in the lower power semiconductor package, unlike the upper copper layer 7 .
  • the heat sink 1 is located under the DBC together with the metal base plate 3, and the metal base plate 3 and the heat sink 1 can very effectively perform a function of dissipating the heat generated in the power semiconductor. because there is
  • DBC is made by heat-treating the base substrate and copper foil at high temperature and high pressure.
  • DCB was manufactured by placing copper foils on both the upper and lower sides of the base substrate to prevent warpage of the DBC.
  • the copper layer 5 positioned under the ceramic substrate of the DBC is configured to prevent warpage during DBC manufacturing, and the lower copper layer 5 is an essential component in DBC manufacturing.
  • Another object of the present invention is to provide a lightweight IGBT power semiconductor package through a DBC free structure.
  • Another object of the present invention is to provide an IGBT power semiconductor package with improved durability due to excellent heat dissipation characteristics while having a DBC free structure.
  • Another object of the present invention is to provide a method of manufacturing an IGBT power semiconductor package capable of stably realizing a DBC free structure power semiconductor package.
  • a power semiconductor package according to an embodiment of the present invention for achieving the above object is characterized in that the power semiconductor package does not include DBC on a metal base plate.
  • an insulating layer including an aminophenol-based epoxy resin may be positioned on the metal base plate.
  • a power semiconductor package which is more specific for achieving the above object, includes a power semiconductor chip; a copper layer positioned under the power semiconductor chip; an epoxy insulating layer positioned under the copper layer; a metal base plate positioned under the epoxy insulating layer; and a heat sink positioned under the metal base plate, wherein the epoxy insulating layer may be an amino phenol-based epoxy resin power semiconductor package.
  • the copper layer may have a multilayer structure including a lower seed copper layer and an upper copper layer.
  • the epoxy resin includes an inorganic filler
  • the inorganic filler may be an inorganic filler whose surface forms a covalent bond with a silane coupling agent.
  • the average particle size of the inorganic filler may be 0.2 to 10.0 ⁇ m.
  • the inorganic filler may be two or more kinds of silica having different average particle sizes.
  • it may include a solder layer positioned between the copper layer and the power semiconductor chip, and a heat transfer material layer positioned between the metal base plate and the heat sink.
  • a power semiconductor package manufacturing method in a more specific embodiment for achieving the above object comprises the steps of preparing a metal base plate; coating an aminophenol-based epoxy composition on the metal base plate; heat-treating the base plate coated with the composition; It may be a power semiconductor package manufacturing method comprising; forming a copper layer on the insulating layer formed by the heat-treated coating.
  • the forming of the copper layer may include forming a copper seed layer and forming a copper layer on the copper seed layer.
  • physical vapor deposition or chemical vapor deposition may be applied to forming the copper seed layer, and electroless plating may be applied to forming the copper layer on the copper seed layer.
  • a composition applied to a power semiconductor package according to an embodiment of the present invention more specifically for achieving the above object is an amino phenol-based epoxy resin; hardener; curing catalyst; It may be an epoxy composite composition comprising a; inorganic filler.
  • the inorganic filler may form a covalent bond with the silane coupling agent on the surface.
  • the inorganic filler may have an average particle size of 0.2 ⁇ m to 10 ⁇ m.
  • the inorganic filler may be two or more types of spherical silica having different average particle sizes.
  • the curing agent may be at least one selected from the group consisting of an amine-based curing agent, a modified amine-based curing agent, an isocyanate-based curing agent, an acid anhydride-based curing agent, and a phenol-based curing agent.
  • the curing agent is included in an amount of 80 to 200 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin
  • the curing catalyst is included in an amount of 0.5 to 5 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin
  • the inorganic filler may be included in an amount of 170 to 1600 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin.
  • the epoxy composite composition may have a glass transition temperature of 145° C. to 185° C. or no glass transition temperature (Tg less).
  • the epoxy composite composition may have a coefficient of thermal expansion within the range of 12 ppm/° C. to 22 ppm/° C. below the glass transition temperature by dynamic mechanical analysis after curing.
  • the power semiconductor package of the present invention can reduce the thickness and volume of the package compared to the conventional power semiconductor package.
  • the power semiconductor package of the present invention can have the advantage that the weight of the package can be reduced by 20% or more and the cost can be reduced by 30% or more compared to the conventional power semiconductor package due to the structural characteristics.
  • the power semiconductor package manufacturing method of the present invention does not require atmosphere control for oxidation of copper (Cu) together with a high temperature and high pressure firing process of 1,000° C. or more for DBC manufacturing.
  • the power semiconductor package manufacturing method of the present invention does not require a soldering process for bonding the copper layer under the DBC and the metal base plate layer, which must be included in the conventional DBC power semiconductor package manufacturing method.
  • the method for manufacturing a power semiconductor package of the present invention has the advantage of simplifying the package manufacturing process and increasing productivity by not requiring a manufacturing step that takes a long time and high cost.
  • FIG. 1 is a cross-sectional view showing the structure of a conventional power semiconductor package.
  • FIG. 2 is a cross-sectional view illustrating a structure of a power semiconductor package according to an embodiment of the present invention.
  • FIG. 3 is a flowchart illustrating a method of manufacturing a power semiconductor package according to an embodiment of the present invention.
  • first, second, etc. are used to describe various elements, these elements are not limited by these terms, of course. These terms are only used to distinguish one component from other components, and unless otherwise stated, it goes without saying that the first component may be the second component.
  • an arbitrary component is disposed on the "upper (or lower)" of a component or “upper (or below)” of a component means that any component is disposed in contact with the upper surface (or lower surface) of the component. Furthermore, it may mean that other components may be interposed between the component and any component disposed on (or under) the component.
  • each component when it is described that a component is “connected”, “coupled” or “connected” to another component, the components may be directly connected or connected to each other, but other components are “interposed” between each component. It should be understood that “or, each component may be “connected,” “coupled,” or “connected,” through another component.
  • FIG. 2 is a cross-sectional view illustrating a structure of a power semiconductor package according to an embodiment of the present invention.
  • a power semiconductor package includes a power semiconductor chip 17, chip bonding (solder layer 16 and/or bonding wire 18) in the downward direction of FIG. 2 based on the top of FIG. ), a copper layer 15 , an epoxy insulating layer 14 , a metal base plate 13 , a heat transfer material layer 12 , and a heat sink 11 in this order.
  • the power semiconductor package according to an embodiment of the present invention of FIG. 2 has a DBC ceramic substrate and an organic insulating layer in which the copper layer under the ceramic substrate is replaced with the structure of the conventional power semiconductor package shown in FIG. have structural features.
  • the power semiconductor package according to an embodiment of the present invention has a structural feature that does not include a solder layer between the epoxy insulating layer and the metal base plate.
  • the power semiconductor package according to an embodiment of the present invention can reduce the thickness and volume of the package compared to the conventional power semiconductor package.
  • the power semiconductor package according to an embodiment of the present invention may have the advantage that the weight of the package can be reduced by 20% or more and the cost can be reduced by 30% or more compared to the conventional power semiconductor package due to the structural features.
  • the manufacturing method for manufacturing the power semiconductor package according to the embodiment of the present invention of FIG. 2 does not use the conventional DBC, so that the epoch-making process improvement, that is, the process shortening is possible.
  • the method of manufacturing a power semiconductor package according to an embodiment of the present invention does not require atmosphere control for oxidation of copper (Cu) together with a high temperature and high pressure firing process of 1,000° C. or more for DBC manufacturing.
  • the method for manufacturing a power semiconductor package according to an embodiment of the present invention does not require a soldering process for bonding the copper layer under the DBC and the metal base plate layer, which must be included in the conventional DBC power semiconductor package manufacturing method.
  • the method for manufacturing a power semiconductor package according to an embodiment of the present invention can simplify the package manufacturing process and does not require a manufacturing step that takes a long time and high cost, thereby increasing productivity.
  • an epoxy composite composition for forming an insulating layer positioned on a metal base plate will be examined.
  • the epoxy composite composition is an amino epoxy resin; hardener; curing catalyst; and inorganic fillers.
  • an underfill process of filling the underside of the package such as a BGA or a chip with an insulating resin is used as needed.
  • the materials used in the underfill process were mainly epoxy-based resins.
  • bisphenol A-based epoxy or a mixture of bisphenol A-based epoxy and bisphenol F-based epoxy was mainly used as the underfill material.
  • bisphenol A-based epoxy has a large free volume and has a high coefficient of thermal expansion of 55 to 75 ppm/° C., and there is a limit in lowering the thermal expansion coefficient of bisphenol A-based epoxy even when highly impregnated with a filler.
  • the bisphenol A-based epoxy has a higher viscosity than the aminophenol-based epoxy, there is a limitation in adding a larger weight of silica.
  • the coefficient of thermal expansion is one of very important requirements for reliability.
  • the power semiconductor package is typically exposed to high-temperature and low-temperature thermal cycles for a certain period or number of times.
  • the thermal expansion coefficient of any component among the power semiconductor package components has a large difference from the thermal expansion coefficient of other components, or if the thermal expansion coefficient of any component is very large, the component having a large thermal expansion coefficient or a component having a large difference in the thermal expansion coefficient is the thermal expansion coefficient. It can cause a fatal problem of cracking by cycle.
  • aminophenol-based epoxy is preferable.
  • aminophenol-based epoxy resin examples include, but are not limited to, paratriglycidyl aminophenol epoxy, metatriglycidyl aminophenol epoxy, and triglycidyl methyl aminophenol epoxy.
  • the inorganic filler is a component for controlling the strength, flowability, thermal properties, and coefficient of thermal expansion of the epoxy composite composition according to an embodiment of the present invention.
  • a spherical inorganic filler in which the surface of the inorganic filler forms a covalent bond with the silane coupling agent. is preferable
  • the inorganic filler may have an average particle size of 0.2 ⁇ m to 10 ⁇ m, and more preferably 1 ⁇ m to 7 ⁇ m.
  • the inorganic filler may be two or more types of spherical silica having different average particle sizes, more preferably spherical fused silica.
  • the inorganic filler may be included in an amount of 170 to 1600 parts by weight based on 100 parts by weight of the amino epoxy resin constituting the epoxy composite composition.
  • the content of the inorganic filler is less than 170 parts by weight, the hygroscopicity of the epoxy composite composition is increased, and the thermal expansion coefficient difference is increased, so that package and module reliability such as cracks may occur.
  • the content of the inorganic filler exceeds 1600 parts by weight, the flowability of the epoxy composite composition may be poor.
  • the average particle size of the inorganic filler is less than 0.2 ⁇ m, there is a problem in that it is difficult to load 170 parts by weight or more of the filler because the apparent density is low when the spherical inorganic filler is added alone.
  • the inorganic filler is composed of a combination of two or more kinds of particles having different average particle diameters, the maximum packing ratio increases, so that flowability can be maintained while including a large amount of fillers.
  • the inorganic filler may be at least one of spherical fused silica and amorphous silica in which a surface is covalently formed with a silane coupling agent.
  • the silane coupling agent is preferably an amine-based, phenyl-based or epoxy-based silane coupling agent.
  • the epoxide group or amine group formed on the surface of the inorganic filler chemically forms a covalent bond with the aminophenol-based epoxy resin, and as a result, high dispersibility and high thermal decomposition initiation temperature of the epoxy composite composition according to an embodiment of the present invention , because it can exhibit effects such as a high glass transition temperature and a low coefficient of thermal expansion.
  • the amine-based or epoxy-based silane coupling agent is non-limiting and specific examples include 3-glycidoxypropyl trimethoxysilane, 3-glycidoxypropyl (methyl) dimethoxysilane (3-glycidoxypropyl trimethoxysilane) glycidoxypropyl(methyl) dimethoxysilane), 2-(2,3-epoxycyclohexyl)ethyl trimethoxysilane (2-(3,4-epoxycyclohexyl)ethyl trimethoxysilane), 3-aminopropyl trimethoxysilane ), 3-aminopropyl triethoxysilane, N-phenyl-3-aminopropyl trimethoxysilane, 3- (2-aminoethyl) aminopropyl Trimethoxysilane (3-(2-aminoethyl)aminopropyl trimethoxysilane), gamma-methacryl
  • the silane coupling agent binds to the activated OH-group on the surface of the silica inorganic filler to make the OH-group on the silica surface inactive to prevent aggregation between silica particles.
  • the silane coupling agent can have the effect of increasing the dispersibility of the composition when manufacturing the epoxy composite composition according to an embodiment of the present invention.
  • the curing agent that may be included in the epoxy composite composition according to an embodiment of the present invention is not specifically limited as long as it is a curing agent for an aminophenol-based epoxy resin, and further commonly known compounds may be used.
  • the curing agent may be an amine-based curing agent, a modified amine-based curing agent, an isocyanate-based curing agent, an acid anhydride-based curing agent, or a phenol-based curing agent, but is not limited thereto.
  • the amine-based or modified amine-based curing agent may be, for example, aliphatic amines, polyether polyamines, alicyclic amines, aromatic amines, and the like, and examples of the aliphatic amines include ethylenediamine, 1,3-diaminopropane, 1,4- Diaminopropane, hexamethylenediamine, 2,5-dimethylhexamethylenediamine, trimethylhexamethylenediamine, etc. are mentioned.
  • the polyether polyamines may be one of triethylene glycol diamine, tetraethylene glycol diamine, diethylene glycol bis (propylamine), polyoxypropylene diamine, and mixtures selected from these.
  • alicyclic amines examples include isophoronediamine, 4,4-methylenebis(2-methylcyclohexylamine), 4,4-methylenebiscyclohexylamine, metacenediamine, N-aminoethylpiperazine, and bis(4-amino -3-methyldicyclohexyl)methane, bis(aminomethyl)cyclohexane, 3,9-bis(3-aminopropyl)2,4,8,10-tetraoxaspiro(5,5)undecane, norbor Nendiamine etc. are mentioned.
  • aromatic amines tetrachloro-p-xylenediamine, m-xylenediamine, p-xylenediamine, m-phenylenediamine, o-phenylenediamine, p-phenylenediamine, 2,4-diaminoanisole, 2 , 4-toluenediamine, diethyltoluenediamine, 2,4-diaminodiphenylmethane, 4,4'-diaminodiphenylmethane, 4,4'-diamino-1,2-diphenylethane, 2, 4-diaminodiphenylsulfone and mixtures selected from them.
  • hexamethylenediamine, isophoronediamine, 4,4-methylenebis(2-methylcyclohexylamine), 4,4-methylenebiscyclohexylamine, bis(aminomethyl)cyclohexane, and norbornenediamine At least one selected from the group consisting of may be used.
  • the isocyanate-based curing agent includes, for example, 1,3,5-tris(1-carboxymethyl)isocyanurate, 1,3,5-tris(2-carboxyethyl)isocyanurate, 1,3, 5-tris(3-carboxypropyl)isocyanurate, 1,3-bis(2-carboxyethyl)isocyanurate, etc. are mentioned.
  • the acid anhydride-based curing agent is, for example, nadic maleic anhydride, dodecyl succinic anhydride, maleic anhydride, succinic anhydride, methyltetrahydrophthalic anhydride, hexahydrophthalic anhydride, Tetrahydrophthalic anhydride, pyromellitic anhydride, cyclohexanedicarbonyl anhydride, methyl tetrahydrophthalic anhydride, methyl hexahydrophthalic anhydride, nadicmethyl anhydride, hydrolyzed Methyl nadic anhydride, phthalic anhydride, nadic anhydride, etc. are mentioned.
  • phenolic curing agent examples include phenols such as phenol, cresol, resorcinol, catechol, bisphenol A, bisphenol F, phenylphenol, aminophenol and/or ⁇ -naphthol, ⁇ -naphthol, dihydroxynaphthalene novolac-type phenolic resins obtained by condensing or co-condensing naphthols such as naphthols and a compound having an aldehyde group such as formaldehyde, benzaldehyde, and salicylaldehyde under an acidic catalyst; phenol/aralkyl resin synthesized from phenols and/or naphthols and dimethoxyparaxylene or bis(methoxy)biphenyl; aralkyl-type phenol resins such as biphenylene-type phenol/aralkyl resins and naphthol/aralkyl resins; dicyclopentadiene type phenol resins such as
  • the curing agent may be included in an amount of 80 to 200 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin, which is one of the components of the epoxy composite composition according to an embodiment of the present invention.
  • the content of the curing agent is less than 80 parts by weight, there may be problems in curability and moldability of the epoxy composite composition according to an embodiment of the present invention.
  • the higher the degree of curing (conversion rate) of the epoxy composite composition according to an embodiment of the present invention it may have a high glass transition temperature and a low coefficient of thermal expansion.
  • the curing catalyst that may be included in the epoxy composite composition according to an embodiment of the present invention functions to promote a curing reaction between the aminophenol-based epoxy resin and the curing agent, and the component is preferably an imidazole-based catalyst. .
  • the imidazole-based catalyst includes, for example, 2-methylimidazole (2-methylimidazole, 2MZ), 2-undecylimidazole (C11-Z), 2 -Heptadecylimidazole (2-heptadecylimidazole, C17Z), 1,2-dimethylimidazole (1,2-dimethylimidazole, 1.2DMZ), 2-ethyl-4-methylimidazole (2-ethyl-4 -methylimidazole, 2E4MZ), 2-phenylimidazole (2-phenylimidazole, 2PZ), 2-phenyl-4-methylimidazole (2-phenyl-4-methylimidazole, 2P4MZ), 1-benzyl-2-methyl Midazole (1-benzyl-2-methylimidazole, 1B2MZ), 1-benzyl-2-phenylimidazole (1-benzyl-2-phenylimidazole (1-benzyl-2-pheny
  • the curing catalyst may be included in an amount of 0.5 to 5 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin included in the epoxy composite composition according to an embodiment of the present invention.
  • the curing reaction time is not delayed, and furthermore, fluidity of the epoxy composite composition according to an embodiment of the present invention can be secured.
  • the epoxy composite composition according to an embodiment of the present invention has a glass transition temperature of 145° C. to 185° C. measured by differential scanning calorimetry (DCS) after curing, or a fully cured state that does not show a glass transition temperature (Tg less) can be
  • the free volume of the amino-epoxy resin rapidly increases, and the coefficient of thermal expansion of the epoxy composite composition according to an embodiment of the present invention increases in proportion to this.
  • the epoxy composite composition may have a coefficient of thermal expansion measured by dynamic mechanical analysis after curing in the range of 12 ppm/°C to 22 ppm/°C below the glass transition temperature.
  • FIG. 3 is a flowchart illustrating a method of manufacturing a power semiconductor package according to an embodiment of the present invention.
  • a metal base plate such as Al or Cu is prepared.
  • the metal base plate may be a metal having high thermal conductivity, and Al alloy or Cu alloy as well as Al or Cu is not limited.
  • any known coating method that can be used in the field of coating of organic or inorganic materials is applicable.
  • coating methods such as spraying, screen printing, slot die coating, and dispensing may all be applied to the manufacturing method of the present invention.
  • the metal base plate coated with the epoxy composite composition of the present invention is heat-treated.
  • the heat treatment does not require a separate atmosphere control.
  • the heat treatment can be freely performed through one or more heat treatment processes so that the conversion rate is 95% or more in a temperature range of 110 ° C. to 250 ° C. for curing the epoxy composite composition of the present invention.
  • a Cu layer for electrical and mechanical bonding with the power semiconductor chip is formed on the insulating layer formed on the metal base plate by heat treatment.
  • the Cu layer may be formed by various methods.
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • the physical vapor deposition or chemical vapor deposition enables the formation of a stable Cu layer on the epoxy composite composition of the present invention.
  • the physical vapor deposition or chemical vapor deposition has a problem in that the deposition rate is too low and the process time is long.
  • a plating process such as electroplating or electroless plating may also be used for depositing the Cu layer.
  • the insulating layer formed of the epoxy composite composition of the present invention which is a base layer, is an electrically insulator and does not conduct electricity, so a seed layer is required on the insulating layer.
  • an insulating layer formed of the epoxy composite composition of the present invention which is a base layer of the Cu layer, may be applicable as it does not require external electricity supply during the plating process.
  • electroless plating also requires a seed layer on the epoxy composite composition of the present invention, which is the Cu layer underlayer, for stable and uniform growth of the Cu layer.
  • a seed Cu layer may be formed on the insulating layer formed of the epoxy composite composition of the present invention.
  • the seed Cu layer is a process for forming a stable and highly productive Cu layer when the Cu layer is formed by a subsequent process.
  • the seed Cu layer may be formed by physical vapor deposition or chemical vapor deposition.
  • the film formation rate is slow, but the quality of the formed film is excellent.
  • the thickness of the seed Cu layer does not need to be thick, but the insulating layer below it must be uniformly deposited with a uniform thickness, so the physical vapor deposition or chemical vapor deposition process is preferable.
  • a Cu layer may be formed on the seed Cu layer.
  • the Cu layer is formed with a minimum thickness of ⁇ m level on the seed Cu layer having uniform and excellent film quality, a fast film formation speed is required.
  • the Cu layer on the seed Cu layer is preferably formed by electroless plating.
  • the electroless plating has a fast film formation speed with stable film formation compared to other deposition processes.
  • a conventional power semiconductor manufacturing method may be applied on the Cu layer as it is.
  • the Cu layer and the power semiconductor chip may be bonded by a soldering process, and the power semiconductor chip and the Cu layer may be electrically connected to each other by a bonding wire made of Al or Cu.
  • the metal base plate may be bonded to a heat sink at a lower portion thereof by means of thermal interface materials (TIM).
  • TIM thermal interface materials
  • NMA Nadic methyl anhydride
  • PAPS N-phenyl-3-aminopropyltrimethoxysilane
  • NMA Nadic methyl anhydride
  • PAPS N-phenyl-3-aminopropyltrimethoxysilane
  • Nadic methyl anhydride (NMA) having a weight ratio of 150 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, an amorphous having an average particle size of 2 ⁇ m and 1 ⁇ m without silane treatment on the surface
  • NMA Nadic methyl anhydride
  • a composition containing 600 parts by weight of silica with respect to 100 parts by weight of the epoxy resin in a weight ratio of 8:2 was pre-dispersed at 100 rpm for 1 hour using a planetary mixer.
  • NMA Nadic methyl anhydride
  • PAPS N-phenyl-3-aminopropyltrimethoxysilane
  • 2-ethyl-4-methylimidazole (2-ethyl-4-methylimidazole, 2E4MZ) was added in 2 parts by weight compared to the epoxy, and stirred sufficiently using a 3-bon mill to prepare an epoxy/silica composite composition.
  • Amorphous silica having particle sizes of 6.2 ⁇ m, 2 ⁇ m and 1.7 ⁇ m was pre-dispersed in a weight ratio of 4:4:2 to 750 parts by weight relative to 100 parts by weight of the epoxy resin using a planetary mixer at 100 rpm for 1 hour.
  • NMA Nadic methyl anhydride having a weight ratio of triglycidyl methyl aminophenol epoxy and 150 parts by weight to 100 parts by weight of the epoxy resin, N-phenyl-3-aminopropyltrimethoxysilane
  • a composition comprising 1000 parts by weight of amorphous silica having an average particle size of 6.2 ⁇ m, 2 ⁇ m and 1.7 ⁇ m to which N-phenyl-3-aminopropyltrimethoxysilane (PAPS) is covalently bonded to 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer.
  • Nadic methyl anhydride having a weight ratio of 150 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, average particle size of 6.2 ⁇ m, 2 ⁇ m and 1 without silane treatment on the surface
  • a composition comprising 750 parts by weight of amorphous silica having a thickness of ⁇ m based on 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer.
  • Nadic methyl anhydride having a weight ratio of triglycidyl methyl aminophenol epoxy and 150 parts by weight based on 100 parts by weight of the epoxy resin, silane-untreated average particle size on the surface of 6.2 ⁇ m, 2 ⁇ m, and 1
  • a composition comprising 750 parts by weight of amorphous silica having a thickness of ⁇ m based on 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer.
  • NMA Nadic methyl anhydride having a weight ratio of low-viscosity bisphenol A epoxy and 150 parts by weight to 100 parts by weight of the epoxy resin
  • N- A composition comprising 600 parts by weight of amorphous silica having an average particle size of 6.2 ⁇ m, 2 ⁇ m and 1.7 ⁇ m covalently bonded to phenyl-3-aminopropyltrimethoxysilane (PAPS) in a weight ratio of 4:4:2 with respect to 100 parts by weight of the epoxy resin
  • PAPS phenyl-3-aminopropyltrimethoxysilane
  • Nadic methyl anhydride having a weight ratio of 150 parts by weight based on 100 parts by weight of a mixture of low-viscosity bisphenol A epoxy and bisphenol F epoxy in a 5:5 weight ratio and 100 parts by weight of the epoxy resin mixture, N on the surface -Phenyl-3-aminopropyltrimethoxysilane (N-phenyl-3-aminopropyltrimethoxysilane, PAPS) is covalently bonded to amorphous silica having average particle sizes of 6.2 ⁇ m, 2 ⁇ m and 1.7 ⁇ m in a weight ratio of 4:4:2.
  • a composition containing 600 parts by weight based on 100 parts by weight of the epoxy resin mixture was pre-dispersed for 1 hour at 100 rpm using a planetary mixer. After that, 1 part by weight of 1-benzyl-2-methylimidazole (1-benzyl-2-methylimidazole, 1B2MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
  • the glass transition temperature was measured by Differential Scanning Calorimetry (DSC). At this time, the glass transition temperature was measured using DSC by dispensing a certain amount of the epoxy compositions of the Examples and Comparative Examples on glass and curing at 170° C. for 20 minutes and 200° C. for 1 hour.
  • DSC Differential Scanning Calorimetry
  • the package resistance after thermal cycling test (JEDED G grade) was measured.
  • the cured specimen of the epoxy insulation composition according to the present invention was put into a thermal cycling tester composed of a cold chamber and a hot chamber, stayed at -40°C for 30 minutes, and then again using an elevator at 125°C as a hot chamber for 30 minutes. Retention for a minute was repeated 1000 times, and the rate of change in resistance of the test specimen package terminal was measured. The change rate was calculated by measuring the resistance after the test compared to the package resistance before the thermal cycling test. In addition, for specimens with large resistance changes, cross-polished cross-sections were performed to determine the presence of cracks by SEM observation.
  • Comparative Examples 4 and 5 are compositions including a bisphenol A-based epoxy resin used as a conventional underfill material.
  • Comparative Examples 1 to 3 include an inorganic filler to which the silane coupling agent is not covalently bonded to the surface, and Comparative Example 1 is a composition in which the silane used in Examples 1 to 3 is separately added.
  • the composite composition according to Examples 1 to 5 of the present invention includes an epoxy resin having a specific structure and spherical silica covalently bonded to a silane compound on the surface, thereby providing a higher content than the composite composition in Comparative Examples. It has effects such as acidity, high glass transition temperature or Tg less, and low coefficient of thermal expansion, so it can be applied as a dispensing composition for various semiconductor packages.

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Abstract

A power semiconductor package of the present invention may comprise: a power semiconductor chip; a copper layer disposed under the power semiconductor chip; an epoxy insulating layer disposed under the copper layer; a metal base plate disposed under the epoxy insulating layer; and a heat sink disposed under the metal base plate, wherein the epoxy insulating layer comprises an aminophenol-based epoxy resin.

Description

고방열 IGBT 전력 반도체 패키지 및 제조 방법High heat dissipation IGBT power semiconductor package and manufacturing method
본 발명은 종래의 DBC(direct bonded copper)를 사용하지 않고 새로운 절연층을 적용하여 무게를 줄이고 구조를 간단히 한 고방열 IGBT 전력 반도체 패키지 및 그 제조 방법에 관한 것이다.The present invention relates to a high heat dissipation IGBT power semiconductor package having a simple structure and reducing weight by applying a new insulating layer without using a conventional direct bonded copper (DBC) and a method for manufacturing the same.
IGBT(insulated gate bipolar transistor) 전력 반도체(power semiconductor)는 전력의 변환, 변압, 안정화, 분배 및 제어 등을 수행하는 소자(device)로써, 전력의 전달 및 제어 과정에서 에너지 효율을 향상시키고 전압의 변화를 안정적으로 제어하여 시스템의 안정성과 신뢰성을 제공하는 핵심적인 부품이다.An insulated gate bipolar transistor (IGBT) power semiconductor is a device that converts, transforms, stabilizes, distributes, and controls power, and improves energy efficiency and changes voltage in the process of transmitting and controlling power. It is a key component that provides stability and reliability of the system by stably controlling the
상기 전력 반도체는 기존의 Si 기반의 반도체 소자는 물론이거니와 WBG(wide band gap) 화합물 반도체(예를 들면, SiC, GaN, 인공 다이아몬드 등) 등이 사용되거나 현재 개발 중에 있다. 특히 상기 WBG 화합물 반도체를 이용한 전력 반도체는 고전압, 고전류에 대응할 수 있고, 에너지 효율이 높으며, 최대 동작 온도가 200~300℃ 구간까지 유지될 수 있을 것으로 예상되고 있어 큰 주목을 받고 있다. As the power semiconductor, not only conventional Si-based semiconductor devices, but also WBG (wide band gap) compound semiconductors (eg, SiC, GaN, artificial diamond, etc.) are used or are currently being developed. In particular, the power semiconductor using the WBG compound semiconductor is receiving great attention because it is expected that it can cope with high voltage and high current, has high energy efficiency, and has a maximum operating temperature of 200 to 300°C.
상기 전력 반도체는 세탁기, 냉장고, 에어컨, 엘리베이터, 에스컬레이터, UPS, 신재생 에너지, 전동차 등에서부터 산업기계 대부분에 필수적인 부품인 모터에까지 매우 넓게 사용되고 있다. The power semiconductor is widely used from washing machines, refrigerators, air conditioners, elevators, escalators, UPS, renewable energy, electric vehicles, etc. to motors, which are essential parts for most industrial machines.
특히 최근 들어 자동차 분야, 특히 하이브리드 자동차나 전기 자동차의 모터등에서 전력 반도체의 수요가 급증하고 있다.In particular, in recent years, the demand for power semiconductors is rapidly increasing in the automobile field, particularly in the motors of hybrid vehicles and electric vehicles.
상기 전력 반도체는 단독으로도 사용될 수도 있으나, 통상적으로는 전력 반도체를 포함한 패키지 또는 모듈 형태로 제품에 적용된다. The power semiconductor may be used alone, but is typically applied to a product in the form of a package or module including a power semiconductor.
이와 같이 전력 반도체가 포함된 전력 반도체 패키지(power semiconductor package) 또는 전력 모듈(power module)은 개별 소자 여러 개를 하나의 패키지 안에 넣어 성능을 향상(전압, 전류의 상승)시키거나 컨트롤용 전력 IC(power IC)와 보호회로 등을 추가로 넣어 하나의 패키지로 집적한 것을 말한다.As such, a power semiconductor package or power module containing a power semiconductor improves performance (increasing voltage and current) by putting several individual devices in one package, or power IC for control ( power IC) and protection circuits are added and integrated into one package.
따라서 상기 전력 반도체 패키지 또는 전력 모듈은 전력 반도체, DBC(direct bond copper), 알루미늄 와이어(wire), 베이스 플레이트(base plate), 몰딩 실리콘, 케이스 및/또는 커버, 터미널 등과 같은 다양한 부품들로 구성된다.Accordingly, the power semiconductor package or power module is composed of various components such as a power semiconductor, direct bond copper (DBC), an aluminum wire, a base plate, molding silicon, a case and/or cover, and a terminal. .
도 1은 종래의 전력 반도체 패키지의 구조를 도시한 단면도이다.1 is a cross-sectional view showing the structure of a conventional power semiconductor package.
도 1에서 도시한 바와 같이, 종래의 전력 반도체 패키지는 SiO2, SiC, AlN, SiN 등의 세라믹 재질의 기판(6)의 상부(7) 및 하부(5)에 구리가 직접 본딩된 DBC 상에 솔더(solder) 또는 어태치(attach) 소재(8)에 의해 본딩된 전력 반도체 칩(9)이 위치하고, 상기 DBC 하부에는 다시 금속 성분 또는 소재의 메탈 베이스 플레이트(3)가 솔더(4) 등을 통해 본딩된다. As shown in FIG. 1 , the conventional power semiconductor package is SiO 2 , SiC, AlN, SiN, etc., on the DBC in which copper is directly bonded to the upper part 7 and the lower part 5 of the substrate 6 made of a ceramic material. A power semiconductor chip 9 bonded by solder or an attach material 8 is located, and a metal base plate 3 made of a metal component or material is again placed under the DBC with solder 4 and the like. bonded through
상기 메탈 베이스 플레이트의 하부에는 열전달 물질(TIM, thermal interface materials)(2) 소재에 의해 메탈 베이스 플레이트에 본딩된 히트 싱크(1)가 포함될 수 있다.A heat sink 1 bonded to the metal base plate by a thermal interface material (TIM) 2 may be included under the metal base plate.
이 때 상기 DBC의 세라믹 기판(6) 상의 구리 층(7)은 회로를 포함하고, 상기 구리 층(7) 상의 회로는 전력 반도체(9)와 직접 솔더(8)와 와이어(10)를 통해 연결된다. 따라서 DBC의 세라믹 기판 상에 위치하는 회로가 형성된 구리 층(7)은 그 위의 전력 반도체(9)와 전기적으로 신호를 전달하는 기능을 수행한다.At this time, the copper layer 7 on the ceramic substrate 6 of the DBC includes a circuit, and the circuit on the copper layer 7 is directly connected to the power semiconductor 9 through the solder 8 and the wire 10 do. Accordingly, the copper layer 7 on which the circuit is formed located on the ceramic substrate of the DBC performs a function of electrically transmitting a signal to the power semiconductor 9 thereon.
반면 상기 DBC의 세라믹 기판(6) 하부의 구리 층(5)은 상기 상부의 구리 층(7)과는 달리 하부의 전력 반도체 패키지 내에서 전기적으로나 열적으로 별 다른 기능을 수행하지 않는다. 왜냐하면 상기 DBC 하부에는 금속 베이스 플레이트(3)와 함께 히트 싱크(1)가 위치하고 상기 금속 베이스 플레이트(3) 및 히트싱크(1)는 전력 반도체에서 발생하는 열을 분산시키는 기능을 매우 효과적으로 수행할 수 있기 때문이다.On the other hand, the copper layer 5 under the ceramic substrate 6 of the DBC does not perform any different electrically or thermally functions in the lower power semiconductor package, unlike the upper copper layer 7 . Because the heat sink 1 is located under the DBC together with the metal base plate 3, and the metal base plate 3 and the heat sink 1 can very effectively perform a function of dissipating the heat generated in the power semiconductor. because there is
이에 따라 상기 DBC의 하부의 구리 층(5)을 삭제하여 비용의 저감과 함께 패키지의 무게 및 크기를 줄이고 방열성을 높이려는 시도들이 있어 왔다.Accordingly, attempts have been made to reduce the weight and size of the package and increase heat dissipation while reducing the cost by removing the copper layer 5 under the DBC.
일반적으로 DBC는 상기 베이스 기판과 구리 박을 고온 및 고압에서 열처리함으로써 만들어 진다. In general, DBC is made by heat-treating the base substrate and copper foil at high temperature and high pressure.
만일 DBC 세락믹 기판의 상부에만 구리 박(foil)을 위치시키고 상기 고온고압의 열처리를 하게 되면, 세라믹과 구리 사이의 탄성 계수 및 열팽창 계수의 차이로 인해 기판의 굽힘이나 뒤틀림 같은 warpage가 발생하게 된다. If a copper foil is placed only on the upper part of the DBC ceramic substrate and the high-temperature and high-pressure heat treatment is performed, warpage such as bending or warping of the substrate occurs due to the difference in the elastic modulus and thermal expansion coefficient between the ceramic and copper. .
그 결과 DBC의 warpage를 방지하기 위해 베이스 기판의 상부 및 하부 양면 모두에 구리 박(foil)을 위치시켜 DCB가 제조되었다. As a result, DCB was manufactured by placing copper foils on both the upper and lower sides of the base substrate to prevent warpage of the DBC.
결국 DBC의 세라믹 기판 하부에 위치하는 구리 층(5)은 DBC 제조 시 warpage를 방지하기 위한 구성이며, 상기 하부 구리 층(5)은 DBC 제조에 있어서는 없어서는 아니 되는 구성이다.After all, the copper layer 5 positioned under the ceramic substrate of the DBC is configured to prevent warpage during DBC manufacturing, and the lower copper layer 5 is an essential component in DBC manufacturing.
한편 전력 반도체 패키지가 자동차 분야에 적용되는 경우, 자동차의 특성 상 전력 반도체 패키지는 고온에 장시간 노출될 수 밖에 없다. 반면 자동차의 경우 다른 제품과 달리 신뢰성과 내구성이 높은 수준으로 요구된다.On the other hand, when the power semiconductor package is applied to the automobile field, the power semiconductor package is inevitably exposed to high temperature for a long time due to the characteristics of the automobile. On the other hand, automobiles require high reliability and durability unlike other products.
이에 따라 200~300℃의 고온 환경에서도 안정적인 동작이 가능하고, 방열 특성이 우수하여 내구성이 향상되고, 가볍고 두께도 얇은 컴팩트한 구조를 가지는 새로운 구조의 전력 반도체 패키지에 대한 요구가 증대되고 있다.Accordingly, stable operation is possible even in a high-temperature environment of 200 to 300° C., and durability is improved due to excellent heat dissipation characteristics.
본 발명의 목적은 DBC를 사용하지 않는 DBC free 구조의 컴팩트한 구조의IGBT 전력 반도체 패키지를 제공하는 것이다.It is an object of the present invention to provide an IGBT power semiconductor package having a compact structure having a DBC free structure that does not use DBC.
또한 본 발명의 목적은 DBC free 구조를 통해 경량의 IGBT 전력 반도체 패키지를 제공하는 것이다.Another object of the present invention is to provide a lightweight IGBT power semiconductor package through a DBC free structure.
또한 본 발명의 목적은 DBC free 구조를 가지면서도 방열 특성이 우수하여 내구성이 향상된 IGBT 전력 반도체 패키지를 제공하는 것이다.Another object of the present invention is to provide an IGBT power semiconductor package with improved durability due to excellent heat dissipation characteristics while having a DBC free structure.
또한 본 발명의 목적은 DBC free 구조의 전력 반도체 패키지를 안정적으로 구현할 수 있는 IGBT 전력 반도체 패키지의 제조 방법을 제공하는 것이다.Another object of the present invention is to provide a method of manufacturing an IGBT power semiconductor package capable of stably realizing a DBC free structure power semiconductor package.
본 발명의 목적들은 이상에서 언급한 목적으로 제한되지 않으며, 언급되지 않은 본 발명의 다른 목적 및 장점들은 하기의 설명에 의해서 이해될 수 있고, 본 발명의 실시예에 의해 보다 분명하게 이해될 것이다. 또한, 본 발명의 목적 및 장점들은 특허 청구 범위에 나타낸 수단 및 그 조합에 의해 실현될 수 있음을 쉽게 알 수 있을 것이다.The objects of the present invention are not limited to the above-mentioned objects, and other objects and advantages of the present invention not mentioned may be understood by the following description, and will be more clearly understood by the examples of the present invention. It will also be readily apparent that the objects and advantages of the present invention may be realized by the means and combinations thereof indicated in the appended claims.
상기 목적을 이루기 위한 본 발명의 일 실시 형태인 전력 반도체 패키지는 금속 베이스 플레이트 상에 DBC를 포함하지 않는 전력 반도체 패키지인 것을 특징으로 한다.A power semiconductor package according to an embodiment of the present invention for achieving the above object is characterized in that the power semiconductor package does not include DBC on a metal base plate.
여기서 금속 베이스 플레이트 상에는 아미노 페놀계 에폭시 수지를 포함하는절연층이 위치할 수 있다.Here, an insulating layer including an aminophenol-based epoxy resin may be positioned on the metal base plate.
또한 DBC를 포함하지 않으므로 DBC와 금속 베이스 플레이트 사이에 솔더층을 포함하지 않는 것을 특징으로 한다.In addition, since it does not contain DBC, it is characterized in that it does not include a solder layer between the DBC and the metal base plate.
상기 목적을 이루기 위한 보다 구체화된 본 발명의 일 실시 형태인 전력 반도체 패키지는 전력 반도체 칩; 상기 전력 반도체 칩 하부에 위치하는 구리층; 상기 구리층 하부에 위치하는 에폭시 절연층; 상기 에폭시 절연층 하부에 위치하는 메탈 베이스 플레이트; 상기 메탈 베이스 플레이트 하부에 위치하는 히트 싱크;를 포함하고, 상기 에폭시 절연층은 아미노 페놀계 에폭시 수지인 전력 반도체 패키지가 될 수 있다.A power semiconductor package according to an embodiment of the present invention, which is more specific for achieving the above object, includes a power semiconductor chip; a copper layer positioned under the power semiconductor chip; an epoxy insulating layer positioned under the copper layer; a metal base plate positioned under the epoxy insulating layer; and a heat sink positioned under the metal base plate, wherein the epoxy insulating layer may be an amino phenol-based epoxy resin power semiconductor package.
바람직하게는 상기 구리층은 하부의 시드 구리층과 상부의 구리층을 포함하는 다층 구조일 수 있다.Preferably, the copper layer may have a multilayer structure including a lower seed copper layer and an upper copper layer.
바람직하게는 상기 에폭시 수지는 무기충전제를 포함하고, 상기 무기충전제는 표면이 실란 커플링제와 공유결합을 형성한 무기충전제일 수 있다.Preferably, the epoxy resin includes an inorganic filler, and the inorganic filler may be an inorganic filler whose surface forms a covalent bond with a silane coupling agent.
보다 바람직하게는 상기 무기 충전제의 평균 입도는 0.2~10.0 ㎛일 수 있다.More preferably, the average particle size of the inorganic filler may be 0.2 to 10.0 μm.
보다 바람직하게는 상기 무기 충전체는 평균 입도가 다른 2종 이상의 실리카일 수 있다.More preferably, the inorganic filler may be two or more kinds of silica having different average particle sizes.
바람직하게는 상기 구리층과 상기 전력 반도체 칩 사이에 위치하는 솔더층;과 상기 메탈 베이스 플레이트와 상기 히트 싱크 사이에 위치하는 열전달 물질층;을 포함할 수 있다.Preferably, it may include a solder layer positioned between the copper layer and the power semiconductor chip, and a heat transfer material layer positioned between the metal base plate and the heat sink.
상기 목적을 이루기 위한 보다 구체화된 본 발명의 일 실시 형태인 전력 반도체 패키지 제조 방법은 금속 베이스 플레이트를 준비하는 단계; 상기 금속 베이스 플레이트 상에 아미노 페놀계 에폭시 조성물을 코팅하는 단계; 상기 조성물이 코팅된 상기 베이스 플레이트를 열처리하는 단계; 상기 열처리된 코팅물에 의해 형성된 절연층 상에 구리층을 형성하는 단계;를 포함하는 전력 반도체 패키지 제조 방법일 수 있다.A power semiconductor package manufacturing method according to an embodiment of the present invention in a more specific embodiment for achieving the above object comprises the steps of preparing a metal base plate; coating an aminophenol-based epoxy composition on the metal base plate; heat-treating the base plate coated with the composition; It may be a power semiconductor package manufacturing method comprising; forming a copper layer on the insulating layer formed by the heat-treated coating.
바람직하게는 상기 구리층을 형성하는 단계는, 구리 시드층을 형성하는 단계;와 상기 구리 시드층 상에 구리층을 형성하는 단계;를 포함할 수 있다.Preferably, the forming of the copper layer may include forming a copper seed layer and forming a copper layer on the copper seed layer.
보다 바람직하게는 상기 구리 시드층을 형성하는 단계는 물리기상증착 또는 화학기상증착이 적용되고, 상기 구리 시드층 상에 구리층을 형성하는 단계는 무전해도금이 적용될 수 있다.More preferably, physical vapor deposition or chemical vapor deposition may be applied to forming the copper seed layer, and electroless plating may be applied to forming the copper layer on the copper seed layer.
상기 목적을 이루기 위한 보다 구체화된 본 발명의 일 실시 형태인 전력 반도체 패키지에 적용되는 조성물은, 아미노 페놀계 에폭시 수지; 경화제; 경화촉매; 무기충전제;를 포함하는 에폭시 복합 조성물 일 수 있다.A composition applied to a power semiconductor package according to an embodiment of the present invention more specifically for achieving the above object is an amino phenol-based epoxy resin; hardener; curing catalyst; It may be an epoxy composite composition comprising a; inorganic filler.
바람직하게는 상기 무기충전제는 표면에 실란 커플링제와 공유결합이 형성될 수 있다.Preferably, the inorganic filler may form a covalent bond with the silane coupling agent on the surface.
바람직하게는 상기 무기충전제는 평균입도가 0.2㎛ 내지 10㎛일 수 있다.Preferably, the inorganic filler may have an average particle size of 0.2 μm to 10 μm.
보다 바람직하게는 상기 무기충전제는 평균입도가 다른 2종 이상의 구형의 실리카일 수 있다.More preferably, the inorganic filler may be two or more types of spherical silica having different average particle sizes.
바람직하게는 상기 경화제는 아민계 경화제, 변성 아민계 경화제, 이소시아네이트계 경화제, 산무수물계 경화제 및 페놀계 경화제로 이루어진 군에서 선택되는 적어도 하나 이상일 수 있다.Preferably, the curing agent may be at least one selected from the group consisting of an amine-based curing agent, a modified amine-based curing agent, an isocyanate-based curing agent, an acid anhydride-based curing agent, and a phenol-based curing agent.
바람직하게는 상기 경화제는 상기 아미노 페놀계 에폭시 수지 100중량부에 대하여 80 내지 200중량부;로 포함되고, 상기 경화촉매는 상기 아미노 페놀계 에폭시 수지 100중량부에 대하여 0.5 내지 5중량부;로 포함되고, 상기 무기충전제는 아미노 페놀계 에폭시 수지 100중량부에 대해 170 내지 1600중량부;로 포함될 수 있다.Preferably, the curing agent is included in an amount of 80 to 200 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin, and the curing catalyst is included in an amount of 0.5 to 5 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin. and the inorganic filler may be included in an amount of 170 to 1600 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin.
바람직하게는 상기 에폭시 복합 조성물은 유리전이온도가 145℃ 내지 185℃이거나 또는 유리전이온도를 가지지 않을(Tg less) 수 있다.Preferably, the epoxy composite composition may have a glass transition temperature of 145° C. to 185° C. or no glass transition temperature (Tg less).
바람직하게는 상기 에폭시 복합 조성물은 경화후 동적 기계 분석법에 의해 유리전이온도 이하에서 12ppm/℃ 내지 22ppm/℃ 범위 내의 열팽창계수를 가질 수 있다.Preferably, the epoxy composite composition may have a coefficient of thermal expansion within the range of 12 ppm/° C. to 22 ppm/° C. below the glass transition temperature by dynamic mechanical analysis after curing.
본 발명의 전력 반도체 패키지는 종래의 전력 반도체 패키지보다 패키지의 두께 및 부피를 감소시킬 수 있다.The power semiconductor package of the present invention can reduce the thickness and volume of the package compared to the conventional power semiconductor package.
나아가 본 발명의 전력 반도체 패키지는 구조적 특징으로 인해 종래의 전력 반도체 패키지보다 패키지의 중량을 20% 이상 저감시킬 수 있고, 원가의 절감이 30% 이상 가능한 이점을 가질 수 있다.Furthermore, the power semiconductor package of the present invention can have the advantage that the weight of the package can be reduced by 20% or more and the cost can be reduced by 30% or more compared to the conventional power semiconductor package due to the structural characteristics.
본 발명의 전력 반도체 패키지 제조 방법은 DBC 제조를 위한 1,000℃ 이상의 고온 및 고압의 소성공정과 함께 구리(Cu)의 산화를 위한 분위기 제어를 필요로 하지 않는다. The power semiconductor package manufacturing method of the present invention does not require atmosphere control for oxidation of copper (Cu) together with a high temperature and high pressure firing process of 1,000° C. or more for DBC manufacturing.
또한 본 발명의 전력 반도체 패키지 제조 방법은 종래의 DBC 전력 반도체 패키지 제조 방법에서 포함해야 하는 DBC 하부의 구리 층과 금속 베이스 플레이트층을 결합시키기 위한 솔더링 공정을 필요로 하지 않는다.In addition, the power semiconductor package manufacturing method of the present invention does not require a soldering process for bonding the copper layer under the DBC and the metal base plate layer, which must be included in the conventional DBC power semiconductor package manufacturing method.
이에 따라 본 발명의 전력 반도체 패키지 제조 방법은 패키지 제조 공정을 단순화시킬 수 있고 고비용과 장시간이 소요되는 제조 단계를 필요로 하지 않아 생산성을 높일 수 있는 이점이 있다.Accordingly, the method for manufacturing a power semiconductor package of the present invention has the advantage of simplifying the package manufacturing process and increasing productivity by not requiring a manufacturing step that takes a long time and high cost.
상술한 효과와 더불어 본 발명의 구체적인 효과는 이하 발명을 실시하기 위한 구체적인 사항을 설명하면서 함께 기술한다.In addition to the above-described effects, the specific effects of the present invention will be described together while describing specific details for carrying out the invention below.
도 1은 종래의 전력 반도체 패키지의 구조를 도시한 단면도이다.1 is a cross-sectional view showing the structure of a conventional power semiconductor package.
도 2는 본 발명의 일 실시예에 따른 전력 반도체 패키지의 구조를 도시한 단면도이다.2 is a cross-sectional view illustrating a structure of a power semiconductor package according to an embodiment of the present invention.
도 3은 본 발명의 일 실시예에 따른 전력 반도체 패키지의 제조 방법을 예시한 순서도이다.3 is a flowchart illustrating a method of manufacturing a power semiconductor package according to an embodiment of the present invention.
전술한 목적, 특징 및 장점은 첨부된 도면을 참조하여 상세하게 후술되며, 이에 따라 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 것이다. 본 발명을 설명함에 있어서 본 발명과 관련된 공지 기술에 대한 구체적인 설명이 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우에는 상세한 설명을 생략한다. 이하, 첨부된 도면을 참조하여 본 발명에 따른 바람직한 실시예를 상세히 설명하기로 한다. 도면에서 동일한 참조 부호는 동일 또는 유사한 구성요소를 가리키는 것으로 사용된다.The above-described objects, features and advantages will be described below in detail with reference to the accompanying drawings, and accordingly, those of ordinary skill in the art to which the present invention pertains will be able to easily implement the technical idea of the present invention. In describing the present invention, if it is determined that a detailed description of a known technology related to the present invention may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to refer to the same or similar components.
비록 제1, 제2 등이 다양한 구성요소들을 서술하기 위해서 사용되나, 이들 구성요소들은 이들 용어에 의해 제한되지 않음은 물론이다. 이들 용어들은 단지 하나의 구성요소를 다른 구성요소와 구별하기 위하여 사용하는 것으로, 특별히 반대되는 기재가 없는 한, 제1 구성요소는 제2 구성요소일 수도 있음은 물론이다.Although the first, second, etc. are used to describe various elements, these elements are not limited by these terms, of course. These terms are only used to distinguish one component from other components, and unless otherwise stated, it goes without saying that the first component may be the second component.
이하에서 구성요소의 "상부 (또는 하부)" 또는 구성요소의 "상 (또는 하)"에 임의의 구성이 배치된다는 것은, 임의의 구성이 상기 구성요소의 상면 (또는 하면)에 접하여 배치되는 것뿐만 아니라, 상기 구성요소와 상기 구성요소 상에 (또는 하에) 배치된 임의의 구성 사이에 다른 구성이 개재될 수 있음을 의미할 수 있다.In the following, that an arbitrary component is disposed on the "upper (or lower)" of a component or "upper (or below)" of a component means that any component is disposed in contact with the upper surface (or lower surface) of the component. Furthermore, it may mean that other components may be interposed between the component and any component disposed on (or under) the component.
또한 어떤 구성요소가 다른 구성요소에 "연결", "결합" 또는 "접속"된다고 기재된 경우, 상기 구성요소들은 서로 직접적으로 연결되거나 또는 접속될 수 있지만, 각 구성요소 사이에 다른 구성요소가 "개재"되거나, 각 구성요소가 다른 구성요소를 통해 "연결", "결합" 또는 "접속"될 수도 있는 것으로 이해되어야 할 것이다.In addition, when it is described that a component is “connected”, “coupled” or “connected” to another component, the components may be directly connected or connected to each other, but other components are “interposed” between each component. It should be understood that “or, each component may be “connected,” “coupled,” or “connected,” through another component.
명세서 전체에서, 특별히 반대되는 기재가 없는 한, 각 구성요소는 단수일 수도 있고 복수일 수도 있다.Throughout the specification, unless otherwise stated, each element may be singular or plural.
본 명세서에서 사용되는 단수의 표현은 문맥상 명백하게 다르게 뜻하지 않는 한, 복수의 표현을 포함한다. 본 출원에서, "구성된다" 또는 "포함한다" 등의 용어는 명세서 상에 기재된 여러 구성 요소들, 또는 여러 단계들을 반드시 모두 포함하는 것으로 해석되지 않아야 하며, 그 중 일부 구성 요소들 또는 일부 단계들은 포함되지 않을 수도 있고, 또는 추가적인 구성 요소 또는 단계들을 더 포함할 수 있는 것으로 해석되어야 한다.As used herein, the singular expression includes the plural expression unless the context clearly dictates otherwise. In the present application, terms such as “consisting of” or “comprising” should not be construed as necessarily including all of the various components or various steps described in the specification, some of which components or some steps are It should be construed that it may not include, or may further include additional components or steps.
명세서 전체에서, "A 및/또는 B" 라고 할 때, 이는 특별한 반대되는 기재가 없는 한, A, B 또는 A 및 B 를 의미하며, "C 내지 D" 라고 할 때, 이는 특별한 반대되는 기재가 없는 한, C 이상이고 D 이하인 것을 의미한다.Throughout the specification, when “A and/or B” is used, it means A, B or A and B, unless otherwise stated, and when “C to D” is used, it means that there is no specific opposite description. Unless otherwise specified, it means that it is greater than or equal to C and less than or equal to D.
이하에서는, 본 발명의 일 실시예에 따른 전력 반도체 패키지를 설명하도록 한다.Hereinafter, a power semiconductor package according to an embodiment of the present invention will be described.
도 2는 본 발명의 일 실시예에 따른 전력 반도체 패키지의 구조를 도시한 단면도이다.2 is a cross-sectional view illustrating a structure of a power semiconductor package according to an embodiment of the present invention.
본 발명의 일 실시예에 따른 전력 반도체 패키지는 도 2의 위를 기준으로 하여 도 2의 아래 방향으로 전력 반도체 칩(17), 칩본딩(솔더층(16) 및/또는 본딩 와이어(18) 포함), 구리층(15), 에폭시 절연층(14), 메탈 베이스 플레이트(13), 열전달 물질층(12), 히트 싱크(11)의 순서로 구성될 수 있다.A power semiconductor package according to an embodiment of the present invention includes a power semiconductor chip 17, chip bonding (solder layer 16 and/or bonding wire 18) in the downward direction of FIG. 2 based on the top of FIG. ), a copper layer 15 , an epoxy insulating layer 14 , a metal base plate 13 , a heat transfer material layer 12 , and a heat sink 11 in this order.
상기 도 2의 본 발명의 일 실시예에 따른 전력 반도체 패키지는 도 1에서 도시된 종래의 전력 반도체 패키지의 구조와 대비할 때, DBC 세라믹 기판 및 상기 세라믹 기판 하부의 구리 층을 유기 절연층으로 대체한 구조적 특징을 가진다.The power semiconductor package according to an embodiment of the present invention of FIG. 2 has a DBC ceramic substrate and an organic insulating layer in which the copper layer under the ceramic substrate is replaced with the structure of the conventional power semiconductor package shown in FIG. have structural features.
또한 본 발명의 일 실시예에 따른 전력 반도체 패키지는 에폭시 절연층과 메탈 베이스 플레이트 사이에 솔더층을 포함하지 않는 구조적 특징을 가진다.In addition, the power semiconductor package according to an embodiment of the present invention has a structural feature that does not include a solder layer between the epoxy insulating layer and the metal base plate.
이에 따라 본 발명의 일 실시예에 따른 전력 반도체 패키지는 종래의 전력 반도체 패키지보다 패키지의 두께 및 부피를 감소시킬 수 있다.Accordingly, the power semiconductor package according to an embodiment of the present invention can reduce the thickness and volume of the package compared to the conventional power semiconductor package.
나아가 본 발명의 일 실시예에 따른 전력 반도체 패키지는 상기 구조적 특징으로 인해 종래의 전력 반도체 패키지보다 패키지의 중량을 20% 이상 저감시킬 수 있고, 원가의 절감이 30% 이상 가능한 이점을 가질 수 있다.Furthermore, the power semiconductor package according to an embodiment of the present invention may have the advantage that the weight of the package can be reduced by 20% or more and the cost can be reduced by 30% or more compared to the conventional power semiconductor package due to the structural features.
한편 도 2의 본 발명의 일 실시예에 따른 전력 반도체 패키지를 제조하기 위한 제조 방법은 종래의 DBC를 사용하지 않음으로써 획기적인 공정 개선, 다시 말하면 공정의 단축이 가능하다.Meanwhile, the manufacturing method for manufacturing the power semiconductor package according to the embodiment of the present invention of FIG. 2 does not use the conventional DBC, so that the epoch-making process improvement, that is, the process shortening is possible.
구체적으로 본 발명의 일 실시예에 따른 전력 반도체 패키지 제조 방법은 DBC 제조를 위한 1,000℃ 이상의 고온 및 고압의 소성공정과 함께 구리(Cu)의 산화를 위한 분위기 제어를 필요로 하지 않는다. Specifically, the method of manufacturing a power semiconductor package according to an embodiment of the present invention does not require atmosphere control for oxidation of copper (Cu) together with a high temperature and high pressure firing process of 1,000° C. or more for DBC manufacturing.
또한 본 발명의 일 실시예에 따른 전력 반도체 패키지 제조 방법은 종래의DBC 전력 반도체 패키지 제조 방법에서 포함해야 하는 DBC 하부의 구리 층과 금속 베이스 플레이트층을 결합시키기 위한 솔더링 공정을 필요로 하지 않는다.In addition, the method for manufacturing a power semiconductor package according to an embodiment of the present invention does not require a soldering process for bonding the copper layer under the DBC and the metal base plate layer, which must be included in the conventional DBC power semiconductor package manufacturing method.
이에 따라 본 발명의 일 실시예에 따른 전력 반도체 패키지 제조 방법은 패키지 제조 공정을 단순화시킬 수 있고 고비용과 장시간이 소요되는 제조 단계를 필요로 하지 않아 생산성을 높일 수 있는 이점이 있다.Accordingly, the method for manufacturing a power semiconductor package according to an embodiment of the present invention can simplify the package manufacturing process and does not require a manufacturing step that takes a long time and high cost, thereby increasing productivity.
다시 상기 도 2를 참조하여, 본 발명의 일 실시에에 따른 전력 반도체 패키지는 금속 베이스 플레이트 상에 위치하는 절연층을 형성하는 에폭시 복합 조성물에 대해 살펴보고자 한다.Referring back to FIG. 2 , in the power semiconductor package according to an embodiment of the present invention, an epoxy composite composition for forming an insulating layer positioned on a metal base plate will be examined.
본 발명의 일 실시예에 따르면, 상기 에폭시 복합 조성물은 아미노 에폭시 수지; 경화제; 경화촉매; 및 무기 충전제를 포함할 수 있다.According to an embodiment of the present invention, the epoxy composite composition is an amino epoxy resin; hardener; curing catalyst; and inorganic fillers.
본 발명의 전력 반도체 패키지가 속하는 종래의 반도체 패키지에서는 BGA나 칩(chip)등의 패키지 밑을 절연 수지로 메우는 언더필(underfill) 공정이 필요에 따라 사용되었다. In the conventional semiconductor package to which the power semiconductor package of the present invention belongs, an underfill process of filling the underside of the package such as a BGA or a chip with an insulating resin is used as needed.
이 때 상기 언더필 공정에 사용되는 소재들은 주로 에폭시계 수지들이 이용되었다. 특히 비스페놀 A계 에폭시, 또는 비스페놀 A계 에폭시와 비스페놀 F계 에폭시의 혼합물이 언더필 소재로 주로 사용되었다.In this case, the materials used in the underfill process were mainly epoxy-based resins. In particular, bisphenol A-based epoxy or a mixture of bisphenol A-based epoxy and bisphenol F-based epoxy was mainly used as the underfill material.
그러나 비스페놀 A계 에폭시는 자유 체적(free volume)이 커서 55 내지 75 ppm/℃의 높은 열팽창계수를 가지며, 필러(filler)를 고함침하더라도 비스페놀 A계 에폭시의 열팽창 계수를 낮추는 데는 한계가 있다. However, bisphenol A-based epoxy has a large free volume and has a high coefficient of thermal expansion of 55 to 75 ppm/° C., and there is a limit in lowering the thermal expansion coefficient of bisphenol A-based epoxy even when highly impregnated with a filler.
또한, 비스페놀 A계 에폭시는 아미노 페놀계 에폭시에 비해서 점도가 높아 좀 더 많은 중량의 실리카를 첨가하는데 한계가 있다.In addition, since the bisphenol A-based epoxy has a higher viscosity than the aminophenol-based epoxy, there is a limitation in adding a larger weight of silica.
특히 본 발명에서의 전력 반도체 패키지에 있어서 열팽창 계수는 신뢰성에 있어 매우 중요한 요건들 중 하나이다. In particular, in the power semiconductor package in the present invention, the coefficient of thermal expansion is one of very important requirements for reliability.
수명 및/또는 신뢰성 평가를 위해, 전력 반도체 패키지는 통상 고온과 저온의 열싸이클을 일정 기간 또는 회수 동안 노출된다. For lifetime and/or reliability evaluation, the power semiconductor package is typically exposed to high-temperature and low-temperature thermal cycles for a certain period or number of times.
상기 열사이클 이후, 크랙(crack)이 전력 반도체 패키지 내에서 발생되지 않아야 하는 요구조건이 충족되어야 한다.After the thermal cycle, the requirement that no cracks occur in the power semiconductor package must be met.
만일 전력 반도체 패키지 부품들 가운데 어느 부품의 열팽창 계수가 다른 부품의 열팽창 계수와 차이가 크거나 또는 어느 부품의 열팽창 계수가 매우 크게 되면, 열팽창 계수가 큰 부품 또는 열팽창 계수의 차이가 큰 부품은 상기 열싸이클에 의해 크랙을 발생시키게 되는 치명적인 문제를 일으킬 수 있다.If the thermal expansion coefficient of any component among the power semiconductor package components has a large difference from the thermal expansion coefficient of other components, or if the thermal expansion coefficient of any component is very large, the component having a large thermal expansion coefficient or a component having a large difference in the thermal expansion coefficient is the thermal expansion coefficient. It can cause a fatal problem of cracking by cycle.
상기와 같은 이유들로 인해 본 발명의 일 실시예에 따른 전력 반도체 패키지에서는 아미노 폐놀계 에폭시가 바람직하다.For the above reasons, in the power semiconductor package according to an embodiment of the present invention, aminophenol-based epoxy is preferable.
상기 아미노 페놀계 에폭시 수지로는, 비 한정적이고 구체적인 예로써, 파라트리글리시딜 아미노페놀 에폭시, 메타트리글리시딜 아미노페놀 에폭시, 트리글리시딜 메틸 아미노 페놀 에폭시 등이 있다.Examples of the aminophenol-based epoxy resin include, but are not limited to, paratriglycidyl aminophenol epoxy, metatriglycidyl aminophenol epoxy, and triglycidyl methyl aminophenol epoxy.
상기 무기충전제는 본 발명의 일 실시예에 따른 에폭시 복합 조성물의 강도와 흐름성 및 열적 특성과 열팽창계수를 조절하기 위한 성분으로, 무기충전제 표면이 실란 커플링제와 공유결합을 형성한 구형의 무기충전제가 바람직하다.The inorganic filler is a component for controlling the strength, flowability, thermal properties, and coefficient of thermal expansion of the epoxy composite composition according to an embodiment of the present invention. A spherical inorganic filler in which the surface of the inorganic filler forms a covalent bond with the silane coupling agent. is preferable
상기 무기충전제는 그 평균 입도가 0.2㎛ 내지 10㎛일 수 있으며, 보다 바람직하게는 1㎛ 내지 7㎛일 수 있다. The inorganic filler may have an average particle size of 0.2 μm to 10 μm, and more preferably 1 μm to 7 μm.
또한, 상기 무기충전제는 평균입도가 다른 2종 이상의 구형의 실리카일 수 있으며, 구형의 용융 실리카인 것이 보다 바람직하다.In addition, the inorganic filler may be two or more types of spherical silica having different average particle sizes, more preferably spherical fused silica.
상기 무기충전제는 상기 에폭시 복합 조성물을 구성하는 아미노 에폭시 수지 100 중량부에 대해 170 내지 1600 중량부로 포함될 수 있다. The inorganic filler may be included in an amount of 170 to 1600 parts by weight based on 100 parts by weight of the amino epoxy resin constituting the epoxy composite composition.
만일 상기 무기충전제의 함량이 170 중량부 미만이면, 에폭시 복합 조성물의 흡습성이 높아지고, 열팽창계수 차이가 커짐으로써 크랙 등의 패키지 및 모듈 신뢰성 저하가 발생할 수 있다. If the content of the inorganic filler is less than 170 parts by weight, the hygroscopicity of the epoxy composite composition is increased, and the thermal expansion coefficient difference is increased, so that package and module reliability such as cracks may occur.
반면 상기 무기충전제의 함량이 1600 중량부를 초과하면, 에폭시 복합 조성물의 흐름성이 불량하게 될 수 있다.On the other hand, when the content of the inorganic filler exceeds 1600 parts by weight, the flowability of the epoxy composite composition may be poor.
한편, 상기 무기충전제의 평균 입도가 0.2㎛ 미만이면, 구형의 무기충전제를 단독으로 첨가할 시 겉보기 밀도가 낮아 170 중량부 이상의 필러를 로딩하기 어렵다는 문제가 있다. On the other hand, if the average particle size of the inorganic filler is less than 0.2 μm, there is a problem in that it is difficult to load 170 parts by weight or more of the filler because the apparent density is low when the spherical inorganic filler is added alone.
반면 상기 무기충전제의 평균 입도가 10㎛ 초과이면, 표면 거칠기가 커지고 절연파괴강도 혹은 내전압이 저하되는 문제가 있다.On the other hand, when the average particle size of the inorganic filler exceeds 10 μm, there is a problem in that the surface roughness increases and the dielectric breakdown strength or withstand voltage decreases.
한편 무기충전제가 2종 이상의 서로 다른 평균 입경을 갖는 입자의 조합으로 구성되는 경우, 최대 패킹율(maximum packing ratio)이 증가하여 많은 함량의 필러를 포함하면서도 흐름성이 유지될 수 있는 이점이 생긴다. On the other hand, when the inorganic filler is composed of a combination of two or more kinds of particles having different average particle diameters, the maximum packing ratio increases, so that flowability can be maintained while including a large amount of fillers.
또한, 상기 무기충전제는 표면이 실랑 커플링제로 공유결합을 형성한 구형의 용융 실리카, 비정질 실리카 중 하나 이상일 수 있다.In addition, the inorganic filler may be at least one of spherical fused silica and amorphous silica in which a surface is covalently formed with a silane coupling agent.
이 때 상기 실란 커플링제는 아민계, 페닐계 또는 에폭시계 실란 커플링제인 것이 바람직하다. In this case, the silane coupling agent is preferably an amine-based, phenyl-based or epoxy-based silane coupling agent.
이 경우 무기충전체의 표면에 형성된 에폭사이드기 또는 아민기와 아미노 페놀계 에폭시 수지가 화학적으로 공유결합을 형성하여, 그 결과 본 발명의 일 실시예에 따른 에폭시 복합 조성물의 높은 분산성과 높은 열분해 개시온도, 높은 유리전이온도, 낮은 열팽창계수 등의 효과를 나타낼 수 있기 때문이다.In this case, the epoxide group or amine group formed on the surface of the inorganic filler chemically forms a covalent bond with the aminophenol-based epoxy resin, and as a result, high dispersibility and high thermal decomposition initiation temperature of the epoxy composite composition according to an embodiment of the present invention , because it can exhibit effects such as a high glass transition temperature and a low coefficient of thermal expansion.
상기 아민계 또는 에폭시계 실란 커플링제로는 비 한정적이구 구체적인 예로써, 3-글리시독시프로필 트리메톡시실란(3-glycidoxypropyl trimethoxysilane), 3-글리시독시프로필(메틸) 디메톡시실란(3-glycidoxypropyl(methyl) dimethoxysilane), 2-(2,3-에폭시시클로헥실)에틸 트리메톡시실란(2-(3,4-epoxycyclohexyl)ethyl trimethoxysilane), 3-아미노프로필 트리메톡시실란(3-aminopropyl trimethoxysilane), 3-아미노프로필 트리에톡시실란(3-aminopropyl triethoxysilane), N-페닐-3-아미노프로필 트리메톡시실란(N-phenyl-3-aminopropyl trimethoxysilane), 3-(2-아미노에틸)아미노프로필트리메톡시실란(3-(2-aminoethyl)aminopropyl trimethoxysilane), 감마-메타크릴옥시프로필 트리메톡시실란(gamma-methacryloxypropyl trimethoxysilane), 감마-메르캅토프로필 트리메톡시실란(gamma-mercaptopropyl trimethoxysilane), N-phenyl-3-aminopropyltrimethoxysilane 등에서 적어도 하나 또는 둘 이상을 사용할 수 있다. The amine-based or epoxy-based silane coupling agent is non-limiting and specific examples include 3-glycidoxypropyl trimethoxysilane, 3-glycidoxypropyl (methyl) dimethoxysilane (3-glycidoxypropyl trimethoxysilane) glycidoxypropyl(methyl) dimethoxysilane), 2-(2,3-epoxycyclohexyl)ethyl trimethoxysilane (2-(3,4-epoxycyclohexyl)ethyl trimethoxysilane), 3-aminopropyl trimethoxysilane ), 3-aminopropyl triethoxysilane, N-phenyl-3-aminopropyl trimethoxysilane, 3- (2-aminoethyl) aminopropyl Trimethoxysilane (3-(2-aminoethyl)aminopropyl trimethoxysilane), gamma-methacryloxypropyl trimethoxysilane, gamma-mercaptopropyl trimethoxysilane, N At least one or two or more can be used in -phenyl-3-aminopropyltrimethoxysilane, etc.
특히 실리카 무기충전제가 상기 실란 커플링제와 공유결합을 형성하면, 상기상기 실란 커플링제는 실리카 무기충전제 표면의 활성화된 OH-기와 결합하여 실리카 표면의 OH-기를 비활성화 상태로 만들어서 실리카 입자간의 뭉침 현상을 방지시킬 수 있다. 그 결과 본 발명의 일 실시예에 따른 에폭시 복합 조성물 제조 시 상기 조성물의 분산성을 증대시키는 효과를 가질 수 있다.In particular, when the inorganic silica filler forms a covalent bond with the silane coupling agent, the silane coupling agent binds to the activated OH-group on the surface of the silica inorganic filler to make the OH-group on the silica surface inactive to prevent aggregation between silica particles. can be prevented As a result, it can have the effect of increasing the dispersibility of the composition when manufacturing the epoxy composite composition according to an embodiment of the present invention.
본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물에 포함될 수 있는 경화제는 아미노 페놀계 에폭시 수지의 경화제인 한 구체적으로 제한되지는 않으며, 나아가 통상적으로 알려져 있는 화합물도 사용될 수 있다. The curing agent that may be included in the epoxy composite composition according to an embodiment of the present invention is not specifically limited as long as it is a curing agent for an aminophenol-based epoxy resin, and further commonly known compounds may be used.
비한정적이고 구체적인 예로써, 상기 경화제는 아민계 경화제, 변성 아민계 경화제, 이소시아네이트계 경화제, 산무수물계 경화제, 페놀계 경화제 등일 수 있으나 이에 한정되는 것은 아니다.As a non-limiting and specific example, the curing agent may be an amine-based curing agent, a modified amine-based curing agent, an isocyanate-based curing agent, an acid anhydride-based curing agent, or a phenol-based curing agent, but is not limited thereto.
상기 아민계, 변성 아민계 경화제로는 예를 들면 지방족 아민류, 폴리에테르폴리아민류, 지환식 아민류, 방향족 아민류 등일 수 있으며, 지방족 아민류로서는, 에틸렌디아민, 1,3-디아미노프로판, 1,4-디아미노프로판, 헥사메틸렌디아민, 2,5-디메틸헥사메틸렌디아민, 트리메틸헥사메틸렌디아민 등을 들 수 있다. 폴리에테르폴리아민류로서는, 트리에틸렌글리콜디아민, 테트라에틸렌글리콜디아민, 디에틸렌글리콜비스(프로필아민), 폴리옥시프로필렌디아민, 및 이들로부터 선택된 혼합물 중 하나일 수 있다. 지환식 아민류로서는, 이소포론디아민, 4,4-메틸렌비스(2-메틸사이클로헥실아민), 4,4-메틸렌비스 사이클로헥실아민, 메타센디아민, N-아미노에틸피페라진, 비스(4-아미노-3-메틸디시클로헥실)메탄, 비스(아미노메틸)시클로헥산, 3,9-비스(3-아미노프로필)2,4,8,10-테트라옥사스피로(5,5)운데칸, 노르보르넨디아민 등을 들 수 있다. 방향족 아민류로서는, 테트라클로로-p-크실렌디아민, m-크실렌디아민, p-크실렌디아민, m-페닐렌디아민, o-페닐렌디아민, p-페닐렌디아민, 2,4-디아미노아니솔, 2,4-톨루엔디아민, 디에틸톨루엔디아민, 2,4-디아미노디페닐메탄, 4,4'-디아미노디페닐메탄, 4,4'-디아미노-1,2-디페닐에탄, 2,4-디아미노디페닐술폰 및 이들로부터 선택된 혼합물 중 하나일 수 있다. 바람직하기로, 헥사메틸렌디아민, 이소포론디아민, 4,4-메틸렌비스(2-메틸사이클로헥실아민), 4,4-메틸렌비스 사이클로헥실아민, 비스(아미노메틸)시클로헥산, 및 노르보르넨디아민으로 이루어지는 군에서 선택되는 1종 이상이 사용될 수 있다.The amine-based or modified amine-based curing agent may be, for example, aliphatic amines, polyether polyamines, alicyclic amines, aromatic amines, and the like, and examples of the aliphatic amines include ethylenediamine, 1,3-diaminopropane, 1,4- Diaminopropane, hexamethylenediamine, 2,5-dimethylhexamethylenediamine, trimethylhexamethylenediamine, etc. are mentioned. The polyether polyamines may be one of triethylene glycol diamine, tetraethylene glycol diamine, diethylene glycol bis (propylamine), polyoxypropylene diamine, and mixtures selected from these. Examples of the alicyclic amines include isophoronediamine, 4,4-methylenebis(2-methylcyclohexylamine), 4,4-methylenebiscyclohexylamine, metacenediamine, N-aminoethylpiperazine, and bis(4-amino -3-methyldicyclohexyl)methane, bis(aminomethyl)cyclohexane, 3,9-bis(3-aminopropyl)2,4,8,10-tetraoxaspiro(5,5)undecane, norbor Nendiamine etc. are mentioned. As aromatic amines, tetrachloro-p-xylenediamine, m-xylenediamine, p-xylenediamine, m-phenylenediamine, o-phenylenediamine, p-phenylenediamine, 2,4-diaminoanisole, 2 , 4-toluenediamine, diethyltoluenediamine, 2,4-diaminodiphenylmethane, 4,4'-diaminodiphenylmethane, 4,4'-diamino-1,2-diphenylethane, 2, 4-diaminodiphenylsulfone and mixtures selected from them. Preferably, hexamethylenediamine, isophoronediamine, 4,4-methylenebis(2-methylcyclohexylamine), 4,4-methylenebiscyclohexylamine, bis(aminomethyl)cyclohexane, and norbornenediamine At least one selected from the group consisting of may be used.
상기 이소시아네이트계 경화제로는 예를 들어, 1,3,5-트리스(1-카르복시메틸)이소시아누레이트, 1,3,5-트리스(2-카르복시에틸)이소시아누레이트, 1,3,5-트리스(3-카르복시프로필)이소시아누레이트, 1,3-비스(2-카르복시에틸)이소시아누레이트 등을 들 수 있다.The isocyanate-based curing agent includes, for example, 1,3,5-tris(1-carboxymethyl)isocyanurate, 1,3,5-tris(2-carboxyethyl)isocyanurate, 1,3, 5-tris(3-carboxypropyl)isocyanurate, 1,3-bis(2-carboxyethyl)isocyanurate, etc. are mentioned.
상기 산무수물계 경화제는 예를 들어, 나딕말레익언하이드라이드, 도데실숙신언하이드라이드, 말레익언하이드라이드, 숙신언하이드라이드, 메틸테트라하이드로프탈릭언하이드라이드, 헥사하이드로프탈릭언하이드라이드, 테트라하이드로프탈릭언하이드라이드, 피로멜리틱디언하이드라이드, 시클로헥산디카르보닐언하이드라이드, 메틸테트라하이드로프탈릭언하이드라이드, 메틸헥사하이드리프탈릭언하이드라이드, 나딕메틸언하이드라이드, 하이드롤리제드메틸나딕언하이드라이드, 프탈릭언하이드라이드, 나딕언하이드라이드 등을 들 수 있다.The acid anhydride-based curing agent is, for example, nadic maleic anhydride, dodecyl succinic anhydride, maleic anhydride, succinic anhydride, methyltetrahydrophthalic anhydride, hexahydrophthalic anhydride, Tetrahydrophthalic anhydride, pyromellitic anhydride, cyclohexanedicarbonyl anhydride, methyl tetrahydrophthalic anhydride, methyl hexahydrophthalic anhydride, nadicmethyl anhydride, hydrolyzed Methyl nadic anhydride, phthalic anhydride, nadic anhydride, etc. are mentioned.
상기 페놀계 경화제로는 예를 들어, 페놀, 크레졸, 레조르시놀, 카테콜, 비스페놀 A, 비스페놀 F, 페닐페놀, 아미노페놀 등의 페놀류 및/또는 α-나프톨, β-나프톨, 디히드록시나프탈렌 등의 나프톨류와 포름알데히드, 벤즈알데히드, 살리실알데히드 등의 알데히드기를 갖는 화합물을 산성 촉매하에서 축합 또는 공축합시켜 얻어지는 노볼락형 페놀수지; 페놀류 및/또는 나프톨류와 디메톡시파라크실렌 또는 비스(메톡시)비페닐로부터 합성되는 페놀·아랄킬 수지; 비페닐렌형 페놀·아랄킬 수지, 나프톨·아랄킬 수지 등의 아랄킬형 페놀수지; 페놀류 및/또는 나프톨류와 디시클로펜타디엔과의 공중합에 의해 합성되는 디시클로펜타디엔형 페놀 노볼락 수지, 디시클로펜타디엔형 나프톨 노볼락 수지 등의 디시클로펜타디엔형 페놀 수지; 트리페닐메탄형 페놀 수지; 테르펜 변성 페놀 수지; 파라크실렌 및/또는 메타크실렌 변성 페놀 수지; 멜라민 변성 페놀 수지; 또는 시클로펜타디엔 변성 페놀 수지를 사용할 수 있다.Examples of the phenolic curing agent include phenols such as phenol, cresol, resorcinol, catechol, bisphenol A, bisphenol F, phenylphenol, aminophenol and/or α-naphthol, β-naphthol, dihydroxynaphthalene novolac-type phenolic resins obtained by condensing or co-condensing naphthols such as naphthols and a compound having an aldehyde group such as formaldehyde, benzaldehyde, and salicylaldehyde under an acidic catalyst; phenol/aralkyl resin synthesized from phenols and/or naphthols and dimethoxyparaxylene or bis(methoxy)biphenyl; aralkyl-type phenol resins such as biphenylene-type phenol/aralkyl resins and naphthol/aralkyl resins; dicyclopentadiene type phenol resins such as dicyclopentadiene type phenol novolac resin and dicyclopentadiene type naphthol novolac resin synthesized by copolymerization of phenols and/or naphthols with dicyclopentadiene; triphenylmethane type phenol resin; terpene-modified phenolic resin; para-xylene and/or meta-xylene-modified phenolic resins; melamine-modified phenolic resin; Alternatively, a cyclopentadiene-modified phenol resin may be used.
상기 경화제는 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물의 구성성분들 중 하나인 상기 아미노 페놀계 에폭시 수지 100 중량부에 대하여 80 내지 200 중량부로 포함될 수 있다. The curing agent may be included in an amount of 80 to 200 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin, which is one of the components of the epoxy composite composition according to an embodiment of the present invention.
상기 경화제의 함량이 80 중량부 미만이면, 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물의 경화성 및 성형성에 문제가 생길 수 있다.If the content of the curing agent is less than 80 parts by weight, there may be problems in curability and moldability of the epoxy composite composition according to an embodiment of the present invention.
반면 경화제의 함량이 200 중량부를 초과하면, 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물의 흡습량 증가로 신뢰성이 저하되고, 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물의 강도가 상대적으로 낮아질 수 있는 문제가 있다.On the other hand, when the content of the curing agent exceeds 200 parts by weight, reliability is reduced due to an increase in moisture absorption of the epoxy composite composition according to an embodiment of the present invention, and the strength of the epoxy composite composition according to an embodiment of the present invention is relatively There is a problem that can be lowered.
한편, 본 발명의 일 실시예에 따른 상기 에폭시 복합조성물의 경화도(전환율, conversion rate)가 높을수록 높은 유리전이온도와 낮은 열팽창계수를 가질 수 있다.On the other hand, the higher the degree of curing (conversion rate) of the epoxy composite composition according to an embodiment of the present invention, it may have a high glass transition temperature and a low coefficient of thermal expansion.
따라서 본 발명의 일 실시예에 따른 상기 에폭시 복합조성물의 경화도를 높이기 위해서는 상기 에폭시 수지와 경화제의 당량비와 열처리 조건 제어가 반드시 필요하다.Therefore, in order to increase the degree of curing of the epoxy composite composition according to an embodiment of the present invention, it is necessary to control the equivalent ratio of the epoxy resin and the curing agent and the heat treatment conditions.
본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물에 포함될 수 있는 경화촉매는 상기 아미노 페놀계 에폭시 수지와 상기 경화제의 경화반응을 촉진하는 기능을 하며, 그 성분으로는 이미다졸계 촉매인 것이 바람직하다.The curing catalyst that may be included in the epoxy composite composition according to an embodiment of the present invention functions to promote a curing reaction between the aminophenol-based epoxy resin and the curing agent, and the component is preferably an imidazole-based catalyst. .
비한정적이고 구체적인 예로써, 상기 이미다졸계 촉매로는 예를 들어, 2-메틸이미다졸(2-methylimidazole, 2MZ), 2-운데실이미다졸(2-undecylimidazole, C11-Z), 2-헵타데실이미다졸(2-heptadecylimidazole, C17Z), 1,2-다이메틸이미다졸(1,2-dimethylimidazole, 1.2DMZ), 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ), 2-페닐이미다졸(2-phenylimidazole, 2PZ), 2-페닐-4-메틸이미다졸(2-phenyl-4-methylimidazole, 2P4MZ), 1-벤질-2-메틸이미다졸(1-benzyl-2-methylimidazole, 1B2MZ), 1-벤질-2-페닐이미다졸(1-benzyl-2-phenylimidazole, 1B2PZ), 1-사이아노에틸-2-메틸이미다졸(1-cyanoethyl-2-methylimidazole, 2MZ-CN), 1-사이아노에틸-2-에틸-4-메틸이미다졸(1-cyanoethyl-2-ethyl-4-methylimidazole, 2E4MZ-CN), 1-사이아노에틸-2-운데실이미다졸(1-cyanoethyl-2-undecylimidazole, C11Z-CN), 1-사이아노에틸-2-페닐이미다졸륨 트라이멜리테이트(1-cyanoethyl-2-phenylimidazolium trimellitate, 2PZCNS-PW), 2,4-다이아미노-6-[2'-메틸이미다졸릴-(1')]-에틸-s-트라이아진(2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, 2MZ-A), 2,4-다이아미노-6-[2'-운데실이미다졸릴-(1')]-에틸-s-트라이아진(2,4-diamino-6-[2'-undecylimidazolyl-(1')]-ethyl-s-triazine, C11Z-A), 2,4-다이아미노-6-[2'-에틸-4'-메틸이미다졸릴-(1')]-에틸-s-트라이아진 (2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-s-triazine, 2E4MZ-A), 2,4-다이아미노-6-[2'-메틸이미다졸릴-(1')]-에틸-s트라이아진 아이소사이아누르산 부가물(2,4-diamino-6-[2'-metthylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct, 2MA-OK), 2-페닐-4,5-다이하이드록시메틸이미다졸(2-phenyl-4,5-dihydroxymethylimidazole, 2PHZ-PW), 2-페닐-4-메틸-5-하이드록시메틸이미다졸(2-phenyl-4-methyl-5-hydroxymethylimidazole, 2P4MHZ-PW) 등을 적어도 하나 이상 사용할 수 있다.As a non-limiting and specific example, the imidazole-based catalyst includes, for example, 2-methylimidazole (2-methylimidazole, 2MZ), 2-undecylimidazole (C11-Z), 2 -Heptadecylimidazole (2-heptadecylimidazole, C17Z), 1,2-dimethylimidazole (1,2-dimethylimidazole, 1.2DMZ), 2-ethyl-4-methylimidazole (2-ethyl-4 -methylimidazole, 2E4MZ), 2-phenylimidazole (2-phenylimidazole, 2PZ), 2-phenyl-4-methylimidazole (2-phenyl-4-methylimidazole, 2P4MZ), 1-benzyl-2-methyl Midazole (1-benzyl-2-methylimidazole, 1B2MZ), 1-benzyl-2-phenylimidazole (1-benzyl-2-phenylimidazole, 1B2PZ), 1-cyanoethyl-2-methylimidazole (1 -cyanoethyl-2-methylimidazole, 2MZ-CN), 1-cyanoethyl-2-ethyl-4-methylimidazole (1-cyanoethyl-2-ethyl-4-methylimidazole, 2E4MZ-CN), 1-cyano Ethyl-2-undecylimidazole (1-cyanoethyl-2-undecylimidazole, C11Z-CN), 1-cyanoethyl-2-phenylimidazolium trimellitate (1-cyanoethyl-2-phenylimidazolium trimellitate, 2PZCNS- PW), 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine (2,4-diamino-6-[2'-methylimidazolyl-(1) ')]-ethyl-s-triazine, 2MZ-A), 2,4-diamino-6-[2'-undecylimidazolyl-(1')]-ethyl-s-triazine (2,4 -diamino-6-[2'-undecylimidazolyl-(1')]-ethyl-s-triazine, C11Z-A), 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl -(1')]-ethyl-s-triazine (2,4-diamino-6-[2'-ethy) l-4'-methylimidazolyl-(1')]-ethyl-s-triazine, 2E4MZ-A), 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl- s-triazine isocyanuric acid adduct (2,4-diamino-6-[2'-metthylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct, 2MA-OK), 2-phenyl-4 ,5-dihydroxymethylimidazole (2-phenyl-4,5-dihydroxymethylimidazole, 2PHZ-PW), 2-phenyl-4-methyl-5-hydroxymethylimidazole (2-phenyl-4-methyl At least one or more of -5-hydroxymethylimidazole, 2P4MHZ-PW), etc. may be used.
상기 경화촉매는 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물에 포함되는 상기 아미노 페놀계 에폭시 수지 100 중량부에 대하여 0.5 내지 5 중량부로 포함될 수 있다. The curing catalyst may be included in an amount of 0.5 to 5 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin included in the epoxy composite composition according to an embodiment of the present invention.
상기 경화촉매가 상기 범위를 만족시키면, 경화 반응 시간이 지연되지 않고 나아가 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물의 유동성이 확보될 수 있다.When the curing catalyst satisfies the above range, the curing reaction time is not delayed, and furthermore, fluidity of the epoxy composite composition according to an embodiment of the present invention can be secured.
본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물은 경화 후에 시차주사열량계(DCS)에 의해 측정된 유리전이온도가 145℃ 내지 185℃이거나, 유리전이온도를 나타내지 않는(Tg less) 완전 경화 상태가 될 수 있다. The epoxy composite composition according to an embodiment of the present invention has a glass transition temperature of 145° C. to 185° C. measured by differential scanning calorimetry (DCS) after curing, or a fully cured state that does not show a glass transition temperature (Tg less) can be
상기 유리전이온도를 경계로 유리전이온도 이상에서는 상기 아미노 에폭시 수지의 자유체적(free volume)이 급격히 증가하고 이에 비례해서 본 발명의 일 실시예에 따른 상기 에폭시 복합 조성물의 열팽창계수가 높아지게 된다. Above the glass transition temperature with respect to the glass transition temperature, the free volume of the amino-epoxy resin rapidly increases, and the coefficient of thermal expansion of the epoxy composite composition according to an embodiment of the present invention increases in proportion to this.
그 결과 본 발명의 상기 에폭시 복합 조성물의 고온 사용 시에 박리, 크랙 등이 발생하여 최종 제품인 전력 반도체 패키징의 불량이 유발된다. As a result, peeling, cracks, etc. occur when the epoxy composite composition of the present invention is used at a high temperature, thereby causing defects in the packaging of the final product, the power semiconductor.
반면 본 발명의 상기 에폭시 복합 조성물의 유리전이온도가 없는 경우, 열팽창계수의 급격한 상승이 없기 때문에 본 발명의 상기 에폭시 복합 조성물의 고온에서의 박리, 크랙 등이 발생하지 않을 수 있다.On the other hand, when there is no glass transition temperature of the epoxy composite composition of the present invention, since there is no rapid increase in the coefficient of thermal expansion, peeling, cracking, etc. at high temperature of the epoxy composite composition of the present invention may not occur.
따라서 상기 에폭시 복합 조성물의 유리전이온도가 없는 것이 가장 이상적일 수 있다.Therefore, it may be ideal that there is no glass transition temperature of the epoxy composite composition.
상기 에폭시 복합 조성물은 경화 후 동적 기계 분석법에 의해 측정된 열팽창계수가 유리전이온도 이하에서 12ppm/℃ 내지 22ppm/℃ 범위를 가질 수 있다.The epoxy composite composition may have a coefficient of thermal expansion measured by dynamic mechanical analysis after curing in the range of 12 ppm/°C to 22 ppm/°C below the glass transition temperature.
도 3은 본 발명의 일 실시예에 따른 전력 반도체 패키지의 제조 방법을 예시한 순서도이다.3 is a flowchart illustrating a method of manufacturing a power semiconductor package according to an embodiment of the present invention.
먼저 Al 또는 Cu 등의 금속 베이스 플레이트를 준비한다.First, a metal base plate such as Al or Cu is prepared.
상기 금속 베이스 플레이트는 높은 열전도를 가지는 금속이면 족하며, 상기 Al 또는 Cu 뿐만 아니라 Al 합금이나 Cu 합금 등도 제한되지는 않는다.The metal base plate may be a metal having high thermal conductivity, and Al alloy or Cu alloy as well as Al or Cu is not limited.
다음으로 상기 금속 베이스 플레이트에 위에서 언급한 본 발명의 에폭시 복합 조성물을 코팅한다.Next, the above-mentioned epoxy composite composition of the present invention is coated on the metal base plate.
상기 코팅은 유기물 또는 무기물의 코팅 분야에서 사용될 수 있는 공지의 코팅 방법이 모두 적용 가능하다.As for the coating, any known coating method that can be used in the field of coating of organic or inorganic materials is applicable.
비한정적이고 구체적인 코팅의 예로써, 스프레이, 스크린 프린팅, 슬롯 다이 코팅, 디스펜싱 등의 방법이 모두 본 발명의 제조 방법에 적용될 수 있다. As non-limiting and specific examples of coating, methods such as spraying, screen printing, slot die coating, and dispensing may all be applied to the manufacturing method of the present invention.
다음으로 상기 본 발명의 에폭시 복합 조성물이 코팅된 금속 베이스 플레이트를 열처리한다.Next, the metal base plate coated with the epoxy composite composition of the present invention is heat-treated.
상기 열처리는 유기물 또는 무기물 분야에서 널리 사용되는 공지의 열처리 방법이 모두 적용될 수 있다.For the heat treatment, all known heat treatment methods widely used in the field of organic or inorganic materials may be applied.
상기 열처리는 별도의 분위기 제어를 필요로 하지 않는다.The heat treatment does not require a separate atmosphere control.
다만 상기 열처리는 본 발명의 에폭시 복합 조성물의 경화를 위해 110℃내지 250℃의 온도 범위에서 전환율 95% 이상이 되도록 하나 이상의 열처리 과정을 거쳐 자유롭게 수행될 수 있다.However, the heat treatment can be freely performed through one or more heat treatment processes so that the conversion rate is 95% or more in a temperature range of 110 ° C. to 250 ° C. for curing the epoxy composite composition of the present invention.
다음으로 상기 열처리되어 금속 베이스 플레이트 상에 형성된 절연층 상에 전력 반도체 칩과 전기적 그리고 기계적 본딩을 위한 Cu층이 형성된다.Next, a Cu layer for electrical and mechanical bonding with the power semiconductor chip is formed on the insulating layer formed on the metal base plate by heat treatment.
상기 Cu층은 다양한 방법으로 형성될 수 있다.The Cu layer may be formed by various methods.
먼저 반도체 분야에서 사용되는 물리적기상증착(PVD, physical vapor deposition)이나 화학적기상증착(CVD, chemical vapor deposition)이 적용될 수 있다.First, physical vapor deposition (PVD) or chemical vapor deposition (CVD) used in the semiconductor field may be applied.
상기 물리적기상증착이나 화학적기상증착은 본 발명의 에폭시 복합 조성물 상에서 안정적인 Cu층의 형성을 가능하게 한다.The physical vapor deposition or chemical vapor deposition enables the formation of a stable Cu layer on the epoxy composite composition of the present invention.
그러나 상기 물리적기상증착이나 화학적기상증착은 증착속도(deposition rate)가 너무 낮아서 공정시간이 오래 소요되는 문제가 있다.However, the physical vapor deposition or chemical vapor deposition has a problem in that the deposition rate is too low and the process time is long.
한편 전해도금 또는 무전해도금과 같은 도금(plating) 공정도 상기 Cu층 증착에 이용될 수 있다.Meanwhile, a plating process such as electroplating or electroless plating may also be used for depositing the Cu layer.
그러나 전해도금의 경우, 하지층인 본 발명의 에폭시 복합 조성물로 형성된 절연층이 전기적으로 절연체여서 전기를 통하지 않아 상기 절연층 상에 시드(seed)층을 필요로 한다.However, in the case of electroplating, the insulating layer formed of the epoxy composite composition of the present invention, which is a base layer, is an electrically insulator and does not conduct electricity, so a seed layer is required on the insulating layer.
무전해도금의 경우, 도금 공정 동안 외부에서 전기의 공급을 필요치 않아 Cu층의 하지층인 본 발명의 에폭시 복합 조성물로 형성된 절연층에도 적용이 가능할 수 있다.In the case of electroless plating, an insulating layer formed of the epoxy composite composition of the present invention, which is a base layer of the Cu layer, may be applicable as it does not require external electricity supply during the plating process.
그러나 무전해도금도 Cu층의 안정적이고 균일한 성장을 위해서는 Cu층 하지층인 본 발명의 에폭시 복합 조성물 상에 시드층을 필요로 한다.However, electroless plating also requires a seed layer on the epoxy composite composition of the present invention, which is the Cu layer underlayer, for stable and uniform growth of the Cu layer.
상기와 같은 각각의 공정 상의 특징을 조합함으로써 본 발명의 에폭시 복합 조성물로 형성된 절연층 상에 품질이 우수하고 공정시간도 크게 감소시킬 수 있는 Cu층 형성 단계를 도출하였다.By combining the characteristics of each process as described above, a step of forming a Cu layer that has excellent quality and can greatly reduce the process time on the insulating layer formed of the epoxy composite composition of the present invention was derived.
본 발명의 발명의 일 실시예에 따른 전력 반도체 패키지의 제조 방법에서는먼저 본 발명의 에폭시 복합 조성물로 형성된 절연층 상에 시드 Cu층을 형성할 수 있다.In the method of manufacturing a power semiconductor package according to an embodiment of the present invention, first, a seed Cu layer may be formed on the insulating layer formed of the epoxy composite composition of the present invention.
상기 시드 Cu층은 후속 공정에 의해 Cu층을 형성할 때 안정적이고 생산성이 높은 Cu층 형성을 위한 공정이다.The seed Cu layer is a process for forming a stable and highly productive Cu layer when the Cu layer is formed by a subsequent process.
상기 시드 Cu층은 물리적기상증착이나 화학적기상증착에 의해 형성될 수 있다.The seed Cu layer may be formed by physical vapor deposition or chemical vapor deposition.
상기 물리적기상증착이나 화학적기상증착은 성막 속도는 느리지만 형성되는 막 품질이 우수하다.In the physical vapor deposition or chemical vapor deposition, the film formation rate is slow, but the quality of the formed film is excellent.
시드 Cu층은 두께는 두꺼울 필요가 없는 반면 균일한 두께와 함께 그 아래의 절연층을 균일하게 증착해야 하므로 상기 물리적기상증착이나 화학적기상증착 공정이 바람직하다.The thickness of the seed Cu layer does not need to be thick, but the insulating layer below it must be uniformly deposited with a uniform thickness, so the physical vapor deposition or chemical vapor deposition process is preferable.
다음으로 상기 시드 Cu층 상에 Cu층이 형성될 수 있다.Next, a Cu layer may be formed on the seed Cu layer.
상기 Cu층은 균일하고 우수한 막 품질을 가지는 시드 Cu층 상에서 최소 ㎛ 수준의 두께로 형성되므로 빠른 성막속도가 요구된다.Since the Cu layer is formed with a minimum thickness of ㎛ level on the seed Cu layer having uniform and excellent film quality, a fast film formation speed is required.
상기 시드 Cu층 상의 Cu층은 무전해도금에 의해 형성되는 것이 바람직하다.The Cu layer on the seed Cu layer is preferably formed by electroless plating.
상기 무전해도금은 다른 증착 공정 대비 안정적인 성막과 함께 빠른 성막속도를 가지기 때문이다.This is because the electroless plating has a fast film formation speed with stable film formation compared to other deposition processes.
상기 Cu층 상에는 종래의 전력 반도체 제조 방법이 그대로 적용될 수 있다.A conventional power semiconductor manufacturing method may be applied on the Cu layer as it is.
예를 들면, Cu층과 전력 반도체 칩은 솔더링 공정에 의해 본딩될 수 있고, 상기 전력 반도체 칩과 상기 Cu층은 Al 또는 Cu 소재의 본딩 와이어에 의해 전기적으로 연결될 수 있다.For example, the Cu layer and the power semiconductor chip may be bonded by a soldering process, and the power semiconductor chip and the Cu layer may be electrically connected to each other by a bonding wire made of Al or Cu.
또한 상기 금속 베이스 플레이트는 TIM (thermal interface materials)에 의해 그 하부에 히트 싱크와 본딩될 수 있다.In addition, the metal base plate may be bonded to a heat sink at a lower portion thereof by means of thermal interface materials (TIM).
<실시예 1><Example 1>
메타트리글리시딜 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 N-페닐-3-아미노프로필트리메톡시실란(N-phenyl-3-aminopropyltrimethoxysilane, PAPS)이 공유결합된 평균입도가 2㎛인 비정질 실리카를 상기 에폭시 수지 100 중량부 대비 600 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ)을 상기 에폭시 수지 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of 150 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, N-phenyl-3-aminopropyltrimethoxysilane ( A composition containing 600 parts by weight of amorphous silica having an average particle size of 2 μm to which N-phenyl-3-aminopropyltrimethoxysilane (PAPS) is covalently bonded to 100 parts by weight of the epoxy resin is linearly dispersed at 100 rpm for 1 hour using a planetary mixer. did Thereafter, 1 part by weight of 2-ethyl-4-methylimidazole (2-ethyl-4-methylimidazole, 2E4MZ) was added compared to the epoxy resin, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<실시예 2><Example 2>
메타트리글리시딜 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 N-페닐-3-아미노프로필트리메톡시실란(N-phenyl-3-aminopropyltrimethoxysilane, PAPS)이 공유결합된 평균입도가 2㎛와 1.7㎛인 비정질 실리카를 8:2의 중량비로 상기 에폭시 수지 100 중량부 대비 600 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ)을 상기 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of 150 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, N-phenyl-3-aminopropyltrimethoxysilane ( A composition comprising 600 parts by weight of amorphous silica having an average particle size of 2㎛ and 1.7㎛ covalently bonded to N-phenyl-3-aminopropyltrimethoxysilane (PAPS) in a weight ratio of 8:2 to 100 parts by weight of the epoxy resin using a planetary mixer and linearly dispersed at 100 rpm for 1 hour. Thereafter, 1 part by weight of 2-ethyl-4-methylimidazole (2-ethyl-4-methylimidazole, 2E4MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<비교예 1><Comparative Example 1>
메타트리글리시딜 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 실란 미처리된 평균입도가 2㎛와 1㎛인 비정질 실리카를 8:2의 중량비로 상기 에폭시 수지 100 중량부 대비 600 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ)을 에폭시 대비 1 중량부 및 3-아미노프로필 트리메톡시실란(3-aminopropyl trimethoxysilane, APS) 3중량부를 별도로 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of 150 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, an amorphous having an average particle size of 2 μm and 1 μm without silane treatment on the surface A composition containing 600 parts by weight of silica with respect to 100 parts by weight of the epoxy resin in a weight ratio of 8:2 was pre-dispersed at 100 rpm for 1 hour using a planetary mixer. After that, 1 part by weight of 2-ethyl-4-methylimidazole (2E4MZ) compared to epoxy and 3 parts by weight of 3-aminopropyl trimethoxysilane (APS) were separately added and sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<실시예 3><Example 3>
메타트리글리시딜 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 180 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 N-페닐-3-아미노프로필트리메톡시실란(N-phenyl-3-aminopropyltrimethoxysilane, PAPS)이 공유결합된 평균입도가 6.2㎛, 2㎛ 및 1.7㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 100 중량부 대비 990 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ)을 상기 에폭시 대비 2중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of 180 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, N-phenyl-3-aminopropyltrimethoxysilane ( A composition comprising 990 parts by weight of amorphous silica having an average particle size of 6.2 μm, 2 μm and 1.7 μm to which N-phenyl-3-aminopropyltrimethoxysilane (PAPS) is covalently bonded to 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer. Thereafter, 2-ethyl-4-methylimidazole (2-ethyl-4-methylimidazole, 2E4MZ) was added in 2 parts by weight compared to the epoxy, and stirred sufficiently using a 3-bon mill to prepare an epoxy/silica composite composition.
<실시예 4><Example 4>
메타트리글리시딜 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 변성 아민계 경화제, 표면에 3-아미노프로필 트리메톡시실란(3-aminopropyl trimethoxysilane, APS)이 공유결합된 평균입도가 6.2㎛, 2㎛ 및 1.7㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 100 중량부 대비 750 중량부를 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ)을 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Metatriglycidyl aminophenol epoxy and a modified amine-based curing agent having a weight ratio of 150 parts by weight based on 100 parts by weight of the epoxy resin, 3-aminopropyl trimethoxysilane (APS) covalently bonded to the surface Amorphous silica having particle sizes of 6.2 μm, 2 μm and 1.7 μm was pre-dispersed in a weight ratio of 4:4:2 to 750 parts by weight relative to 100 parts by weight of the epoxy resin using a planetary mixer at 100 rpm for 1 hour. Thereafter, 1 part by weight of 2-ethyl-4-methylimidazole (2-ethyl-4-methylimidazole, 2E4MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<실시예 5><Example 5>
트리글리시딜 메틸 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 N-페닐-3-아미노프로필트리메톡시실란(N-phenyl-3-aminopropyltrimethoxysilane, PAPS)이 공유결합된 평균입도가 6.2㎛, 2㎛ 및 1.7㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 100 중량부 대비 1000 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 1-벤질-2-메틸이미다졸(1-benzyl-2-methylimidazole, 1B2MZ)을 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of triglycidyl methyl aminophenol epoxy and 150 parts by weight to 100 parts by weight of the epoxy resin, N-phenyl-3-aminopropyltrimethoxysilane ( A composition comprising 1000 parts by weight of amorphous silica having an average particle size of 6.2 μm, 2 μm and 1.7 μm to which N-phenyl-3-aminopropyltrimethoxysilane (PAPS) is covalently bonded to 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer. After that, 1 part by weight of 1-benzyl-2-methylimidazole (1-benzyl-2-methylimidazole, 1B2MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<비교예 2><Comparative Example 2>
메타트리글리시딜 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 실란 미처리된 평균입도가 6.2㎛, 2㎛ 및 1㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 100 중량부 대비 750 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 2-에틸-4-메틸이미다졸(2-ethyl-4-methylimidazole, 2E4MZ)을 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of 150 parts by weight to metatriglycidyl aminophenol epoxy and 100 parts by weight of the epoxy resin, average particle size of 6.2 μm, 2 μm and 1 without silane treatment on the surface A composition comprising 750 parts by weight of amorphous silica having a thickness of ㎛ based on 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer. Thereafter, 1 part by weight of 2-ethyl-4-methylimidazole (2-ethyl-4-methylimidazole, 2E4MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<비교예 3><Comparative Example 3>
트리글리시딜 메틸 아미노페놀 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 실란 미처리된 평균입도가 6.2㎛, 2㎛ 및 1㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 100 중량부 대비 750 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 1-벤질-2-메틸이미다졸(1-benzyl-2-methylimidazole, 1B2MZ)을 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of triglycidyl methyl aminophenol epoxy and 150 parts by weight based on 100 parts by weight of the epoxy resin, silane-untreated average particle size on the surface of 6.2 μm, 2 μm, and 1 A composition comprising 750 parts by weight of amorphous silica having a thickness of ㎛ based on 100 parts by weight of the epoxy resin in a weight ratio of 4:4:2 was pre-dispersed for 1 hour at 100 rpm using a planetary mixer. After that, 1 part by weight of 1-benzyl-2-methylimidazole (1-benzyl-2-methylimidazole, 1B2MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<비교예 4><Comparative Example 4>
저점도 비스페놀 A 에폭시와 상기 에폭시 수지 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 N-페닐-3-아미노프로필트리메톡시실란(N-phenyl-3-aminopropyltrimethoxysilane, PAPS)이 공유결합된 평균입도가 6.2㎛, 2㎛ 및 1.7㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 100 중량부 대비 600 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 1-벤질-2-메틸이미다졸(1-benzyl-2-methylimidazole, 1B2MZ)을 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of low-viscosity bisphenol A epoxy and 150 parts by weight to 100 parts by weight of the epoxy resin, N-phenyl-3-aminopropyltrimethoxysilane (N- A composition comprising 600 parts by weight of amorphous silica having an average particle size of 6.2 μm, 2 μm and 1.7 μm covalently bonded to phenyl-3-aminopropyltrimethoxysilane (PAPS) in a weight ratio of 4:4:2 with respect to 100 parts by weight of the epoxy resin Pre-dispersion was carried out for 1 hour at 100 rpm using a mixer. After that, 1 part by weight of 1-benzyl-2-methylimidazole (1-benzyl-2-methylimidazole, 1B2MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
<비교예 5><Comparative Example 5>
저점도 비스페놀 A 에폭시와 비스페놀 F 에폭시를 5:5 중량비로 혼합한 혼합물과 상기 에폭시 수지 혼합물 100 중량부에 대해 150 중량부의 중량비를 가지는 나딕 메틸 언하이드라이드(Nadic methyl anhydride, NMA), 표면에 N-페닐-3-아미노프로필트리메톡시실란(N-phenyl-3-aminopropyltrimethoxysilane, PAPS)이 공유결합된 평균입도가 6.2㎛, 2㎛ 및 1.7㎛인 비정질 실리카를 4:4:2의 중량비로 상기 에폭시 수지 혼합물 100 중량부 대비 600 중량부를 포함하는 조성물을 planetary mixer를 이용하여 100 rpm으로 1시간 동안 선분산하였다. 이후 1-벤질-2-메틸이미다졸(1-benzyl-2-methylimidazole, 1B2MZ)을 에폭시 대비 1중량부를 첨가하고 3본밀을 이용하여 충분히 교반하여 에폭시/실리카 복합 조성물을 제조하였다.Nadic methyl anhydride (NMA) having a weight ratio of 150 parts by weight based on 100 parts by weight of a mixture of low-viscosity bisphenol A epoxy and bisphenol F epoxy in a 5:5 weight ratio and 100 parts by weight of the epoxy resin mixture, N on the surface -Phenyl-3-aminopropyltrimethoxysilane (N-phenyl-3-aminopropyltrimethoxysilane, PAPS) is covalently bonded to amorphous silica having average particle sizes of 6.2 μm, 2 μm and 1.7 μm in a weight ratio of 4:4:2. A composition containing 600 parts by weight based on 100 parts by weight of the epoxy resin mixture was pre-dispersed for 1 hour at 100 rpm using a planetary mixer. After that, 1 part by weight of 1-benzyl-2-methylimidazole (1-benzyl-2-methylimidazole, 1B2MZ) was added compared to the epoxy, and the mixture was sufficiently stirred using a 3-bon mill to prepare an epoxy/silica composite composition.
상기 실시예 1 내지 5 및 비교예 1 내지 5에서 제조한 복합 조성물의 유동성, 유리전이온도, 열팽창계수 및 초기 요변지수를 측정하여 하기 표 1에 나타내었다.The fluidity, glass transition temperature, thermal expansion coefficient, and initial thixotropic index of the composite compositions prepared in Examples 1 to 5 and Comparative Examples 1 to 5 were measured and shown in Table 1 below.
[표 1][Table 1]
Figure PCTKR2021006943-appb-img-000001
Figure PCTKR2021006943-appb-img-000001
상기 표 1에서 열팽창계수는 동적 기계 분석법(DMA)에 의해 측정되었다.In Table 1, the coefficient of thermal expansion was measured by dynamic mechanical analysis (DMA).
한편 유리전이온도는 시차주사열량계(Differential Scanning Calorimetry, DSC)에 의해 측정되었다. 이 때 유리전이온도는 글라스에 상기 실시예들 및 비교예들의 에폭시 조성물을 일정량 디스펜싱하고 170℃에서 20분, 200℃에서 1시간 동안 경화한 후 시료를 채취하여 DSC를 이용하여 측정되었다. Meanwhile, the glass transition temperature was measured by Differential Scanning Calorimetry (DSC). At this time, the glass transition temperature was measured using DSC by dispensing a certain amount of the epoxy compositions of the Examples and Comparative Examples on glass and curing at 170° C. for 20 minutes and 200° C. for 1 hour.
내전압 특성은 Cu 배선에 상기 실시예들 및 비교예들의 에폭시 절연 조성물 모두를 50㎛ 두께로 인쇄, 열처리 후 배선에 (+) 전극, 절연 조성물의 인쇄표면에 (-) 전극을 물려 500V까지 승압하면서 10mA 이상의 누설 전류가 발생할 때의 인가 전압을 측정하는 방식으로 측정되었다.Withstanding voltage characteristics, all of the epoxy insulating compositions of the Examples and Comparative Examples are printed on Cu wiring to a thickness of 50 μm, and after heat treatment, a (+) electrode is applied to the wiring and a (-) electrode is applied to the printed surface of the insulating composition to increase the voltage to 500V while It was measured by measuring the applied voltage when a leakage current of 10 mA or more occurred.
Thermal cycling 시험 (JEDED G grade) 후의 패키지 저항을 측정하였다.The package resistance after thermal cycling test (JEDED G grade) was measured.
구체적으로 본 발명에 의한 에폭시 절연 조성물의 경화 시편을 cold chamber와 hot chamver로 구성된 thermal cycling 시험기에 투입한 후 -40℃에서 30분간 체류하고, 다시 엘리베이터를 이용하여 125℃에 hot chamber로 이용하여 30분간 체류하는 것을 1000회 반복 시험하며, 시험이 완료된 시편 패키지 단자의 저항 변화율을 측정하였다. Thermal cycling 시험 전의 패키지 저항 대비 시험 이후의 저항을 측정하여 변화율을 계산하였다. 또한 저항 변화가 많은 시편은 단면을 cross polishing 하여 SEM 관찰하여 crack 유무를 판별하였다.Specifically, the cured specimen of the epoxy insulation composition according to the present invention was put into a thermal cycling tester composed of a cold chamber and a hot chamber, stayed at -40°C for 30 minutes, and then again using an elevator at 125°C as a hot chamber for 30 minutes. Retention for a minute was repeated 1000 times, and the rate of change in resistance of the test specimen package terminal was measured. The change rate was calculated by measuring the resistance after the test compared to the package resistance before the thermal cycling test. In addition, for specimens with large resistance changes, cross-polished cross-sections were performed to determine the presence of cracks by SEM observation.
먼저 비교예 4 및 5는 종래의 언더필 소재료 사용되는 비스페놀 A계 에폭시 수지를 포함하는 조성물들이다.First, Comparative Examples 4 and 5 are compositions including a bisphenol A-based epoxy resin used as a conventional underfill material.
상기 비교예 4 및 5는 비스페놀 A계 에폭시 수지의 낮은 유리전이온도와 높은 열팽창계수로 인해 열사이클 시험 후에 패키지에 크랙이 발생하였다.In Comparative Examples 4 and 5, cracks occurred in the package after the thermal cycle test due to the low glass transition temperature and high coefficient of thermal expansion of the bisphenol A-based epoxy resin.
한편 비교예 1 내지 3은 표면에 실란 커플링제가 공유결합되지 않은 무기충전제를 포함하고 별도로 비교예 1은 실시예 1 내지 3에 사용한 실란을 별도로 첨가한 조성물이다. Meanwhile, Comparative Examples 1 to 3 include an inorganic filler to which the silane coupling agent is not covalently bonded to the surface, and Comparative Example 1 is a composition in which the silane used in Examples 1 to 3 is separately added.
상기 비교예 1 내지 3은 비록 유리전이온도 특성은 일부 만족하더라도 조성물로 형성된 유전층의 열팽창계수가 실시예들 대비 높을 뿐만 아니라 내전압이 낮고 패키지 저항이 모두 지나치게 높은 것으로 측정되었다. In Comparative Examples 1 to 3, although the glass transition temperature characteristics were partially satisfied, the coefficient of thermal expansion of the dielectric layer formed of the composition was higher than in Examples, and the dielectric strength was low and the package resistance was all too high.
이는 실리카 표면의 하이드록시기에 의한 입자 응집으로 인한 에폭시 절연 조성물의 분산성 저하 때문인 것으로 추정된다. This is presumed to be due to a decrease in the dispersibility of the epoxy insulating composition due to particle aggregation caused by hydroxyl groups on the silica surface.
별도로 첨가되는 실란은 실시예 1내지 3과 달리, 에폭시 절연복합 조성물의 분산성 향상에 기여하는 바가 없는 것으로 추정된다.It is estimated that the separately added silane does not contribute to the improvement of the dispersibility of the epoxy insulation composite composition, unlike Examples 1 to 3.
상기 비교예들과 달리 본 발명의 실시예 1 내지 5에 의한 복합 조성물은 특정 구조의 에폭시 수지와 표면에 실란 화합물과 공유결합된 구형의 실리카를 포함함으로써 비교예들에서의 복합 조성물에 비하여 높은 분산성, 높은 유리전이온도 혹은 Tg less, 낮은 열팽창계수 등의 효과를 가지고 있어 다양한 반도체 패키지의 디스펜싱 조성물로 적용될 수 있다.Unlike the comparative examples, the composite composition according to Examples 1 to 5 of the present invention includes an epoxy resin having a specific structure and spherical silica covalently bonded to a silane compound on the surface, thereby providing a higher content than the composite composition in Comparative Examples. It has effects such as acidity, high glass transition temperature or Tg less, and low coefficient of thermal expansion, so it can be applied as a dispensing composition for various semiconductor packages.
이상과 같이 본 발명에 대해서 예시한 도면을 참조로 하여 설명하였으나, 본 명세서에 개시된 실시 예와 도면에 의해 본 발명이 한정되는 것은 아니며, 본 발명의 기술사상의 범위 내에서 통상의 기술자에 의해 다양한 변형이 이루어질 수 있음은 자명하다. 아울러 앞서 본 발명의 실시 예를 설명하면서 본 발명의 구성에 따른 작용 효과를 명시적으로 기재하여 설명하지 않았을 지라도, 해당 구성에 의해 예측 가능한 효과 또한 인정되어야 함은 당연하다.As described above, the present invention has been described with reference to the illustrated drawings, but the present invention is not limited by the embodiments and drawings disclosed in the present specification. It is obvious that variations can be made. In addition, although the effects according to the configuration of the present invention have not been explicitly described and described while describing the embodiments of the present invention, it is natural that the effects predictable by the configuration should also be recognized.

Claims (17)

  1. 전력 반도체 칩;power semiconductor chips;
    상기 전력 반도체 칩 하부에 위치하는 구리층;a copper layer positioned under the power semiconductor chip;
    상기 구리층 하부에 위치하는 에폭시 절연층;an epoxy insulating layer positioned under the copper layer;
    상기 에폭시 절연층 하부에 위치하는 메탈 베이스 플레이트;a metal base plate positioned under the epoxy insulating layer;
    상기 메탈 베이스 플레이트 하부에 위치하는 히트 싱크;를 포함하고,Including; a heat sink located under the metal base plate;
    상기 에폭시 절연층은 아미노 페놀계 에폭시 수지인 전력 반도체 패키지.The epoxy insulating layer is an amino phenol-based epoxy resin power semiconductor package.
  2. 제1항에 있어서,According to claim 1,
    상기 구리층은 하부의 시드 구리층과 상부의 구리층을 포함하는 다층 구조인 전력 반도체 패키지.The copper layer is a power semiconductor package having a multi-layer structure including a lower seed copper layer and an upper copper layer.
  3. 제1항에 있어서,According to claim 1,
    상기 에폭시 수지는 무기충전제를 포함하고, 상기 무기충전제는 표면이 실란 커플링제와 공유결합을 형성한 전력 반도체 패키지.The epoxy resin includes an inorganic filler, and the inorganic filler has a surface of the power semiconductor package forming a covalent bond with a silane coupling agent.
  4. 제3항에 있어서,4. The method of claim 3,
    상기 무기 충전제의 평균 입도는 0.2 내지 10.0 ㎛인 전력 반도체 패키지.The average particle size of the inorganic filler is 0.2 to 10.0 ㎛ power semiconductor package.
  5. 제4항에 있어서,5. The method of claim 4,
    상기 무기 충전체는 평균 입도가 다른 2종 이상의 비정질 실리카인 전력 반도체 패키지.The inorganic filler is a power semiconductor package of two or more kinds of amorphous silica having different average particle sizes.
  6. 제1항에 있어서,According to claim 1,
    상기 구리층과 상기 전력 반도체 칩 사이에 위치하는 솔더층;a solder layer positioned between the copper layer and the power semiconductor chip;
    상기 메탈 베이스 플레이트와 상기 히트 싱크 사이에 위치하는 열전달 물질층;을 포함하는 전력 반도체 패키지.and a heat transfer material layer positioned between the metal base plate and the heat sink.
  7. 금속 베이스 플레이트를 준비하는 단계;preparing a metal base plate;
    상기 금속 베이스 플레이트 상에 아미노 페놀계 에폭시 조성물을 코팅하는 단계;coating an aminophenol-based epoxy composition on the metal base plate;
    상기 조성물이 코팅된 상기 베이스 플레이트를 열처리하는 단계;heat-treating the base plate coated with the composition;
    상기 열처리된 코팅물에 의해 형성된 절연층 상에 구리층을 형성하는 단계;를 포함하는 전력 반도체 패키지 제조 방법.A method of manufacturing a power semiconductor package comprising a; forming a copper layer on the insulating layer formed by the heat-treated coating.
  8. 제7항에 있어서,8. The method of claim 7,
    상기 구리층을 형성하는 단계는,The step of forming the copper layer,
    구리 시드층을 형성하는 단계;와forming a copper seed layer; and
    상기 구리 시드층 상에 구리층을 형성하는 단계;를 포함하는 전력 반도체 패키지 제조 방법.and forming a copper layer on the copper seed layer.
  9. 제7항에 있어서,8. The method of claim 7,
    상기 구리 시드층을 형성하는 단계는 물리기상증착 또는 화학기상증착이 적용되고,In the step of forming the copper seed layer, physical vapor deposition or chemical vapor deposition is applied,
    상기 구리 시드층 상에 구리층을 형성하는 단계는 무전해도금이 적용되는 전력 반도체 패키지 제조 방법.Forming a copper layer on the copper seed layer is a power semiconductor package manufacturing method to which electroless plating is applied.
  10. 아미노 페놀계 에폭시 수지;aminophenol-based epoxy resins;
    경화제;hardener;
    경화촉매;curing catalyst;
    무기충전제;를 포함하는 에폭시 복합 조성물.Epoxy composite composition comprising a; inorganic filler.
  11. 제10항에 있어서,11. The method of claim 10,
    상기 무기충전제는 표면이 실란 커플링제와 공유결합을 형성한 에폭시 복합 조성물.The inorganic filler is an epoxy composite composition in which the surface forms a covalent bond with a silane coupling agent.
  12. 제10항에 있어서,11. The method of claim 10,
    상기 무기충전제는 평균입도가 1㎛ 내지 7㎛인 에폭시 복합 조성물.The inorganic filler is an epoxy composite composition having an average particle size of 1 μm to 7 μm.
  13. 제12항에 있어서,13. The method of claim 12,
    상기 무기충전제는 평균입도가 다른 2종 이상의 비정질 실리카인 에폭시 복합 조성물.The inorganic filler is an epoxy composite composition of two or more kinds of amorphous silica having different average particle sizes.
  14. 제10항에 있어서,11. The method of claim 10,
    상기 경화제는 아민계 경화제, 변성 아민계 경화제, 이소시아네이트계 경화제, 산무수물계 경화제 및 페놀계 경화제로 이루어진 군에서 선택되는 적어도 하나 이상인 에폭시 복합 조성물.The curing agent is an epoxy composite composition of at least one selected from the group consisting of an amine-based curing agent, a modified amine-based curing agent, an isocyanate-based curing agent, an acid anhydride-based curing agent, and a phenol-based curing agent.
  15. 제10항에 있어서,11. The method of claim 10,
    상기 경화제는 상기 아미노 페놀계 에폭시 수지 100중량부에 대하여 80 내지 200중량부;로 포함되고,The curing agent is included in an amount of 80 to 200 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin,
    상기 경화촉매는 상기 아미노 페놀계 에폭시 수지 100중량부에 대하여 0.5 내지 5중량부;로 포함되고The curing catalyst is included in an amount of 0.5 to 5 parts by weight based on 100 parts by weight of the aminophenol-based epoxy resin.
    상기 무기충전제는 상기 아미노 페놀계 에폭시 수지 100중량부에 대해 170 내지 1600중량부;로 포함되는 에폭시 복합 조성물The inorganic filler is 170 to 1600 parts by weight based on 100 parts by weight of the amino phenol-based epoxy resin; epoxy composite composition comprising
  16. 제10항에 있어서,11. The method of claim 10,
    상기 에폭시 복합 조성물은 유리전이온도가 145℃ 내지 185℃이거나 또는 유리전이온도를 가지지 않는(Tg less) 에폭시 복합 조성물.The epoxy composite composition has a glass transition temperature of 145° C. to 185° C. or does not have a glass transition temperature (Tg less) epoxy composite composition.
  17. 제10항에 있어서,11. The method of claim 10,
    상기 에폭시 복합 조성물은 경화후 동적 기계 분석법에 의해 유리전이온도 이하에서 12ppm/℃내지 22ppm/℃범위 내의 열팽창계수를 가지는 에폭시 복합 조성물.The epoxy composite composition is an epoxy composite composition having a coefficient of thermal expansion within the range of 12ppm/℃ to 22ppm/℃ below the glass transition temperature by dynamic mechanical analysis after curing.
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