WO2022009308A1 - Power supply device and power supply system - Google Patents
Power supply device and power supply system Download PDFInfo
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- WO2022009308A1 WO2022009308A1 PCT/JP2020/026562 JP2020026562W WO2022009308A1 WO 2022009308 A1 WO2022009308 A1 WO 2022009308A1 JP 2020026562 W JP2020026562 W JP 2020026562W WO 2022009308 A1 WO2022009308 A1 WO 2022009308A1
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- power supply
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- control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
Definitions
- the present invention relates to a power supply device and a power supply system that convert DC power.
- the power supply device includes a transformer, a primary bridge circuit provided on the primary side of the transformer, a secondary bridge circuit provided on the secondary side of the transformer, and a transformer. It is provided with a resonance circuit provided on at least one of the primary side and the secondary side.
- This power supply further provides a control circuit that performs unidirectional or bidirectional power conversion by driving the switch elements of the primary side bridge circuit and the secondary side bridge circuit by different control methods depending on the output voltage range. I have.
- the primary side generally refers to the side connected to the commercial system
- the secondary side generally refers to the side connected to the load system. Pointing to.
- the power supply system includes a power supply device that converts DC power, a stabilized DC power supply (PFC converter output, battery, etc.) connected to the primary side of the power supply device, and a power supply. It is equipped with a DC load device (various electric devices, batteries, etc.) connected to the secondary side of the device.
- the power supply device in this power supply system has the same configuration as the power supply device according to the first aspect.
- the switch elements of the primary side bridge circuit and the secondary side bridge circuit are different from each other depending on the output voltage range. Since one-way or two-way power conversion is performed by driving with a control method, for example, PFM (Pulse Frequency Modulation) control is applied only to the primary side bridge circuit to apply the output voltage. Compared with the case of controlling or applying PWM (Pulse Width Modulation) control only to the secondary side bridge circuit to control the output voltage, the amount of energy stored in the resonant inductor can be reduced. As a result, the magnetic component can be miniaturized. Therefore, the volume of the power supply device can be reduced.
- PFM Pulse Frequency Modulation
- FIG. 11 is a diagram showing an example of the relationship between the duty ratio of the drive pulse and the peak value of the current flowing through the primary resonance circuit in the DC-DC converter of FIG. It is a figure which shows an example of the equivalent circuit of the resonance circuit of the primary side and the secondary side in the DC-DC converter of FIG.
- FIG. 11 is a diagram showing an example of the equivalent circuit of the resonance circuit of the primary side and the secondary side in the DC-DC converter of FIG.
- FIG. 11 is a diagram showing an example of the relationship between the drive frequency and the output voltage during charging of the DC-DC converter of FIG. 11.
- FIG. 11 is a diagram showing an example of the relationship between the drive frequency and the output voltage when the DC-DC converter of FIG. 11 is discharged.
- It is a figure which shows an example of the drive of a DC-DC converter in a transmission mode.
- It is a figure which shows an example of the drive of a DC-DC converter in a reflux mode.
- First Embodiment CL type one-way DC-DC converter A one-way DC-DC converter provided with a resonance circuit by a capacitor and an inductor on the primary side will be described as an example).
- Second Embodiment CLLC type bidirectional DC-DC converter A bidirectional DC-DC converter having a resonance circuit with a capacitor and an inductor on the primary side and the secondary side will be described as an example).
- FIG. 1 shows a circuit diagram of a DC-DC converter 1 according to a first embodiment of the present invention.
- the DC-DC converter 1 includes one inductor L RP and one capacitor C RP as a resonance circuit on the primary side, and is a CL system utilizing resonance by these inductor L RP and capacitor C RP. It is a DC-DC converter.
- the DC-DC converter 1 includes a transformer 10, a primary side bridge circuit 20, a secondary side bridge circuit 30, a primary side driver 40, a secondary side driver 50, and a control circuit 60.
- Transformer 10 has a primary coil N P, 2 primary coil N S and core CR.
- Primary coil N P and the secondary coil N S is wound magnetic core CR.
- the turns ratio of the transformer 10, n P has a n S.
- Inductor L RP and capacitor C RP is serially connected to the primary coil N P.
- the turns ratio of the transformer 10 is set so that the reference output voltage (VS (std) ) is at or near the center in the output voltage range of the DC-DC converter 1, for example, as shown in FIG.
- the turns ratio (n P : n S ) of the transformer 10 is, for example, 5: 4.
- the primary side bridge circuit 20 is a full bridge type circuit including four switch elements controlled on / off by the control circuit 60.
- Primary bridge circuit 20 includes two switching elements Q B corresponding to the low side of the two switching elements of the four switching elements, and Q D, the two switch elements of the high-side of the four switching elements It has two corresponding switch elements Q A and Q C.
- the secondary side bridge circuit 30 is a full bridge type circuit including two switch elements controlled on and off by the control circuit 60 and two diode elements.
- the secondary side bridge circuit 30 has two switch elements Q E and Q F corresponding to two low side switch elements and two diode elements D 1 and D 2 corresponding to two high side diode elements. is doing.
- the switch elements Q A , Q B , Q C , Q D , Q E , and Q F are composed of switch elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistor).
- Switching element Q A, Q B, Q C , Q D, Q E, Q F has terminals T 11, body diode are connected in parallel so as to be biased with respect to T 21 D QA, D QB, D QC , D QD , D QE , D QF are included.
- Primary bridge circuit 20 includes the switching elements Q A, Q B, Q C , the capacitor C A connected in parallel to Q D, C B, C C , the C D.
- Secondary bridge circuit 30, the switch elements Q E, Q F in parallel connected capacitors C E, has a C F.
- the switch elements Q A , Q B , Q C , Q D , Q E , and Q F may be composed of, for example, an RC (reverse conduction) -IGBT (insulated gate bipolar transistor).
- the FRD (fast recovery diode) built in the RC-IGBT substitutes for the body diode described above.
- the switch elements Q A , Q B , Q C , Q D , Q E , and Q F may be composed of, for example, a FET including a wide-gap semiconductor (SiC, GaN).
- the switch elements Q A , Q B , Q C , Q D , Q E , and Q F are externally attached in place of the above-mentioned body diode in order to prevent a decrease in efficiency due to the high forward voltage.
- Diodes may be connected in parallel.
- Two switching elements Q A, Q B are connected in series with one another at a connection point P 1.
- Two switching elements Q C, Q D are connected in series with one another at the connection point P 2.
- Connection point P 1 and the connection point P 2 is the primary coil N P, and the inductor L RP and capacitor C RP is connected via the series.
- the diode element D 2 and the switch element Q F are connected in series with each other at the connection point P 3.
- the diode element D 1 and the switch element Q E are connected in series with each other at the connection point P 4.
- Connection point P 4 and the connection point P 3 is connected via the secondary coil N S.
- the DC-DC converter 1 further includes terminals T 11 and T 12 on the primary side and terminals T 21 and T 22 on the secondary side.
- the terminal T 11 is connected to the high side of the primary side bridge circuit 20, and the terminal T 12 is connected to the low side of the primary side bridge circuit 20.
- DC-DC converter 1, further the capacitor C P between the terminal T 11 and the terminal T 12, and a capacitor C S between the terminal T 21 and the terminal T 22.
- the terminal T 21 is connected to the high side of the secondary side bridge circuit 30, and the terminal T 22 is connected to the low side of the secondary side bridge circuit 30.
- the primary side driver 40 transmits the control signal for performing phase shift control (PPS: Pulse Phase Shift) generated by the control circuit 60 to the four switch elements Q A , Q B , and Q included in the primary side bridge circuit 20. C, and outputs it to the Q D.
- PPS Phase shift control
- the primary driver 40 in the Duty range of 0.5 or less generated by the control circuit 60, a signal of fixed frequency and 50% within the pulse width switching element Q A, the Q B outputs for outputs switching element Q a, a signal obtained by shifting an arbitrary phase that is determined by the Duty respect Q B switching element Q C, to Q D.
- the primary side driver 40 has a fixed frequency and within 50% of the switch elements Q A and Q D and the switch elements Q B and Q C in the range where the duty generated by the control circuit 60 exceeds 0.5. Outputs a signal that turns on and off alternately with the pulse width of.
- Secondary driver 50 PWM control that is generated by the control circuit 60 (PWM: Pulse Wide Modulation) 2 two switching elements Q E contained a control signal to the secondary bridge circuit 30 which performs, and outputs the Q F.
- PWM Pulse Wide Modulation
- the secondary-side driver 50 in the Duty range of 0.5 or less generated by the control circuit 60, a fixed frequency and switching element signals 50 percent of the pulse width is determined by the Duty Q E , Q F is output.
- the secondary-side driver 50 in the range Duty generated by the control circuit 60 is more than 0.5, and outputs a signal having a pulse width greater than 50% at a fixed frequency switching element Q E, the Q F.
- the control circuit 60 is configured by using a DSP (Digital Signal Processor), and is a switch element of the primary side bridge circuit 20 and the secondary side bridge circuit 30 via the primary side driver 40 and the secondary side driver 50. By controlling the above, power conversion from the primary side to the secondary side (one direction) is performed.
- the control circuit 60 detects the output voltage (secondary voltage V S), generates a Duty as the output voltage (secondary voltage V S) becomes the target voltage value. When the duty generated at this time is 50% or less, the control circuit 60 mainly uses the phase shift control signal output to the primary side driver 40 as the output voltage of the DC-DC converter 1 (secondary side voltage VS). ) Is controlled.
- DSP Digital Signal Processor
- the smaller the generated Duty the smaller the phase shift amount, and a lower output voltage can be obtained.
- the control circuit 60 mainly a PWM control signal to be output to the secondary-side driver 50, DC-DC converter 1 of the output voltage (secondary voltage V S) To control.
- the larger the generated Duty the longer the time width during which the two switch elements Q E and Q F are turned on at the same time, and the larger the energy stored in the inductor L RP at this time, so that a higher output voltage is obtained. Can be done.
- FIG. 3 shows an example of the drive pulse waveform in the step-down mode (Duty ⁇ 0.5) in the DC-DC converter 1.
- FIG. 4 shows an example of driving the DC-DC converter 1 in the period T1 (transmission mode) of FIG.
- FIG. 5 shows an example of driving the DC-DC converter 1 in the period T2 (reflux mode) of FIG. 4 and 5, together with the capacitor C P is connected to the terminal T 11, T 12, a power supply system battery BT1 is connected as an example of the DC power supply is illustrated.
- FIG. 4, 5, together with the capacitor C S is connected to the terminal T 21, T 22, a power supply system battery BT2 is connected as an example of the load is illustrated.
- the battery BT2 is assumed to be a secondary battery.
- D PPS represents the phase shift width when phase shift control is performed with respect to the primary side bridge circuit 20
- D PWM represents the low side switch elements Q E , Q F of the secondary side bridge circuit 30.
- T SW represents the length of one period
- TAB denotes switching element QA of the primary bridge circuit 20
- QB the dead time of the QD
- T AE the dead time of the QD
- T AE represents the delay amount to the low-side switching element Q E of the secondary bridge circuit 30
- a Q F is ZVS (zero-voltage switching).
- D PPS is determined by T SW x D- (TAB + TCD), and D PWM is determined by T SW x D- (TAB + TCD) -T AE .
- D used for deriving D PPS and D PWM is a duty control amount, and takes a value within the range of D min to D max.
- the control circuit 60 performs a step-down operation by, for example, controlling the ratio between the length of the transmission mode period and the length of the reflux mode period. For example, as shown in FIG. 3, the control circuit 60 turns on the switch elements Q A , Q D , and Q E, and turns off the switch elements Q B , Q C , and Q F. As a result, for example, as shown in FIG. 4, a period (transmission mode) for transmitting the power conversion from the primary side to the secondary side is generated. Further, for example, as shown in FIG. 3, the control circuit 60 turns on the switch elements Q C after turning off the switch elements Q D and Q E while keeping the switch element Q A on. Then, for example, as shown in FIG. 5, the diode D 2 is turned off, and a period (reflux mode) in which power is not transmitted from the primary side to the secondary side is generated.
- the control circuit 60 turns on the switch elements Q A , Q D , and Q E, and turns off the switch elements Q B , Q C , and Q
- FIG. 6 shows an example of the drive pulse waveform in the boost mode (Duty> 0.5) in the DC-DC converter 1.
- FIG. 7 shows an example of driving the DC-DC converter 1 in the period T3 (storage mode) of FIG.
- FIG. 8 shows an example of driving the DC-DC converter 1 in the period T4 (emission mode) of FIG. 7 and 8, together with the capacitor C P is connected to the terminal T 11, T 12, a power supply system battery BT1 is connected as an example of the DC power supply is illustrated.
- FIG. 7, 8, together with the capacitor C S is connected to the terminal T 21, T 22, a power supply system battery BT2 is connected as an example of the load is illustrated.
- the battery BT2 is assumed to be a secondary battery.
- D PPS represents the phase shift width when phase shift control is performed with respect to the primary side bridge circuit 20
- D PWM represents the low side switch elements Q E , Q F of the secondary side bridge circuit 30.
- T SW represents the length of one period
- TAB denotes switching element QA of the primary bridge circuit 20
- QB the dead time of the QD
- T AE the dead time of the QD
- T AE represents the delay amount to the low-side switching element Q E of the secondary bridge circuit 30
- a Q F is ZVS (zero-voltage switching).
- D used for deriving D PPS and D PWM is a duty control amount, and takes a value within the range of D min to D max.
- the control circuit 60 performs a boosting operation by, for example, controlling the ratio between the length of the period of the storage mode and the length of the period of the emission mode. For example, as shown in FIG. 6, the control circuit 60 turns on the switch elements Q A , Q D , Q E , and Q F and turns off the switch elements Q B , Q C in the storage mode. As a result, for example, as shown in FIG. 7, a period (storage mode) for storing energy in the inductor L RP is generated. Further, for example, as shown in FIG. 6, the control circuit 60 turns off the switch element Q F while keeping the switch elements Q A , Q D , and Q E on. Then, for example, as shown in FIG. 8, a period (emission mode) in which the energy stored in the inductor L RP is released is generated.
- power conversion in one direction is performed by driving the switch elements of the primary side bridge circuit 20 and the secondary side bridge circuit 30 by different control methods depending on the output voltage range.
- PFM control is applied only to the primary side bridge circuit to control the output voltage
- PWM control is applied only to the secondary side bridge circuit to control the output voltage.
- control method according to a comparative example. reduces the amount of energy stores in resonant inductor L R.
- the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 1 can be reduced.
- PWM control for the secondary bridge circuit 20 is performed as the main control, and in the output voltage range of the DC-DC converter 1.
- phase shift control for the primary bridge circuit 20 is performed as the main control.
- the reference output voltage (VS (std) ) determined according to the turns ratio of the transformer 10 in the output voltage range of the DC-DC converter 1 is set to the output voltage range of the DC-DC converter 1.
- the boost control is performed by performing the PWM control for the secondary side bridge circuit 30 as the main control, and the output voltage range of the DC-DC converter 1 is performed.
- the step-down control is performed by performing the phase shift control for the primary side bridge circuit 20 as the main control.
- the PWM control for the secondary side bridge circuit 30 is performed as the main control in the operating region where the Duty exceeds 0.5, and the primary side bridge is performed in the operating region where the Duty is 0.5 or less.
- the phase shift control for the circuit 20 is performed as the main control.
- the switches of the primary side bridge circuit 20 and the secondary side bridge circuit 30 have a fixed drive frequency f SW having a value larger than the resonance frequency f R of the LC resonance circuit provided on the primary side.
- the element is controlled.
- the circuit current becomes small, so that the charging efficiency becomes higher than in the discontinuous mode.
- the primary bridge circuit 20 a plurality of switching elements Q A is on-off controlled by the control circuit 60, Q B, Q C, full-bridge, which is configured to include a Q D It is a circuit of.
- the secondary side bridge circuit 30 includes a plurality of low-side switch elements Q E and Q F controlled on and off by the control circuit 60, and a plurality of high-side diode elements D 1 and D 2. It is a full bridge type circuit.
- FIG. 11 shows a circuit diagram of the DC-DC converter 2 according to the second embodiment of the present invention.
- the DC-DC converter 2 includes one inductor L RP and one capacitor C RP as the resonance circuit on the primary side, and one inductor L RS and one capacitor as the resonance circuit on the secondary side. It is equipped with C RS.
- the DC-DC converter 2 is a CLLC type DC-DC converter that utilizes resonance caused by these inductors L RP and L RS and capacitors C RP and C RS.
- the DC-DC converter 2 includes a transformer 10, a primary bridge circuit 20, a secondary bridge circuit 70, a primary driver 40, a secondary driver 80, and a control circuit 90.
- Primary bridge circuit 20 includes four switching elements Q A is on-off controlled by the control circuit 90, Q B, Q C, has a full bridge circuit that is configured to include a Q D.
- the secondary side bridge circuit 70 is a full bridge type circuit including four switch elements controlled on / off by the control circuit 90.
- Secondary bridge circuit 70 includes two switching elements Q E which corresponds to the low side of the two switching elements of the four switching elements, and Q F, the two switch elements of the high-side of the four switching elements It has two corresponding switch elements Q G and Q H.
- the switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H are composed of switch elements such as MOSFETs.
- Primary bridge circuit 20 includes the switching elements Q A, Q B, Q C , the capacitor C A connected in parallel to Q D, C B, C C , the C D.
- the secondary side bridge circuit 70 has capacitors C E , C F , C G , and C H connected in parallel to each switch element Q E , Q F , Q G , and Q H.
- the switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H may be composed of, for example, an RC-IGBT.
- the FRD built in the RC-IGBT substitutes for the body diode described above.
- the switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H may be composed of, for example, FETs including a wide-gap semiconductor (SiC, GaN).
- the switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H have the above-mentioned body diodes for the purpose of preventing the decrease in efficiency due to the high forward voltage.
- An external diode that replaces the above may be connected in parallel.
- Two switching elements Q A, Q B are connected in series with one another at a connection point P 1.
- Two switching elements Q C, Q D are connected in series with one another at the connection point P 2.
- Connection point P 1 and the connection point P 2 is the primary coil N P, and the inductor L RP and capacitor C RP is connected via the series.
- Two switching elements Q H, Q F is connected in series with each other at a connection point P 3.
- Two switching elements Q G, Q E are connected in series with one another at a connection point P 4.
- Connection point P 4 and the connection point P 3 is the secondary coil N S, and the inductor L RS and capacitor C RS is connected via the series.
- Primary driver 40 outputs a control signal for performing phase shift control, which is generated by the control circuit 90, the four switching elements Q A included in the primary bridge circuit 20, Q B, Q C, to Q D ..
- the primary driver 40 in the Duty range of 0.5 or less generated by the control circuit 90, a signal of fixed frequency and 50% within the pulse width switching element Q A, the Q B outputs for outputs switching element Q a, a signal obtained by shifting an arbitrary phase that is determined by the Duty respect Q B switching element Q C, to Q D.
- the primary side driver 40 has a fixed frequency and within 50% of the switch elements Q A , Q D and the switch elements Q B , Q C in the range where the duty generated by the control circuit 90 exceeds 0.5. Outputs a signal that turns on and off alternately with the pulse width of.
- the secondary driver 80 outputs a control signal for PWM control generated by the control circuit 90 to the two switch elements Q E and Q F included in the secondary bridge circuit 70. Specifically, in the range where the Duty generated by the control circuit 90 is 0.5 or less, the secondary driver 80 outputs a signal having a fixed frequency and a pulse width of 50% or less determined by the Duty to two switch elements. Output to Q E and Q F. On the other hand, in the range where the Duty generated by the control circuit 60 exceeds 0.5, the secondary driver 80 outputs a signal having a pulse width exceeding 50% at a fixed frequency to the two switch elements Q E and Q F. do.
- two switch elements Q G does not output the control signal to the Q H, two switching elements Q G, the body diode or external Q H Rectification is performed using a diode.
- the control circuit 90 detects the output voltage (secondary voltage V S), generates a Duty as the output voltage (secondary voltage V S) becomes the target voltage value.
- the control circuit 60 mainly uses the phase shift control signal output to the primary side driver 40 as the output voltage of the DC-DC converter 1 (secondary side voltage V). S ) is controlled. For example, the smaller the generated Duty, the smaller the phase shift amount, and a lower output voltage can be obtained.
- the control circuit 60 mainly uses the PWM control signal output to the secondary side driver 80 as the output voltage of the DC-DC converter 2 (secondary side voltage VS). ) Is controlled. Specifically the larger Duty generated, the two switching elements Q E, the time width Q F is turned on simultaneously increases, at this time, since the inductor L RP, the energy stored in L RS increases, higher The output voltage can be obtained.
- FIG. 12 shows an example of the relationship between the duty ratio of the drive pulse of the DC-DC converter 2 and the peak value of the current flowing through the primary resonance circuit.
- the DC-DC converter 2 is provided with capacitors C RP and C RS for the resonance circuits on the primary side and the secondary side, so that the capacitors C RP and C RS play a role of preventing demagnetization of the transformer 10. I am in charge.
- FIG. 13 shows an example of an equivalent circuit of the resonance circuit on the primary side and the secondary side in the DC-DC converter 2.
- the impedance Z 1 of the resonant circuit of the primary side (f R) and, of the circuit impedance conversion by the turns ratio of the transformer 10 the resonant circuit of the secondary side to the primary side in Bee Dance Z 2 Each constant of the resonance circuit on the primary side and the secondary side is designed so that'(f R) becomes 0 ⁇ as shown in the following equations (1) and (2).
- L RP L RS ', so that the primary side inductor L RP and the secondary side inductor L RS can also utilize the leakage inductance of the transformer.
- Figure 14 illustrates an example of the relationship between the resonant frequency f R and the output voltage (secondary voltage V S) at the time of the charging mode of the DC-DC converter 2.
- Figure 15 is a diagram showing an example of the relationship between the resonance frequency f R and the output voltage (primary voltage V P) in the discharge mode of the DC-DC converter 2.
- Vp (std) is a reference output voltage output when the Duty is 0.5.
- the primary side and the secondary side and the secondary side so that the impedances Z 1 (f R ) and Z 2 '(f R ) become 0 ⁇ as shown in the above equations (1) and (2). If the constants of the resonance circuit side is designed, in charge mode of the DC-DC converter 2 and the discharge mode, it can be seen that the relationship between the output voltage resonance frequency f R are identical.
- An example of the drive pulse waveform in the step-down mode (Duty ⁇ 0.5) in the DC-DC converter 2 is the waveform shown in FIG. 3 (Duty ⁇ 0.5 in the DC-DC converter 1). It is common with an example of the drive pulse waveform).
- an example of the drive pulse waveform in the boost mode (Duty> 0.5) in the DC-DC converter 2 is the waveform shown in FIG. 6 (Duty> 0.5 in the DC-DC converter 1). It is common with an example of the drive pulse waveform).
- FIG. 16 shows an example of driving the DC-DC converter 2 in the period T1 (transmission mode) of FIG.
- FIG. 17 shows an example of driving the DC-DC converter 2 in the period T2 (reflux mode) of FIG. 16, 17, together with the capacitor C P is connected to the terminal T 11, T 12, a power supply system battery BT1 is connected as an example of the DC power supply is illustrated. Further, FIG. 16, 17, together with the capacitor C S is connected to the terminal T 21, T 22, a power supply system battery BT2 is connected as an example of a DC load device is illustrated. In the present embodiment, both the batteries BT1 and BT2 are assumed to be secondary batteries.
- the control circuit 90 performs a step-down operation by, for example, controlling the ratio between the length of the transmission mode period and the length of the reflux mode period. For example, as shown in FIGS. 3 and 16, the control circuit 90 turns on the switch elements Q A , Q D , and Q E, and turns off the switch elements Q B , Q C , and Q F. As a result, for example, as shown in FIG. 16, a period (transmission mode) for transmitting electric power from the primary side to the secondary side is generated. Further, the control circuit 90, for example, FIG. 3, as shown in FIG. 17, while to turn on the switching elements Q A, switching element Q D, after turning off the Q E, to turn on the switching element Q C .. Then, for example, as shown in FIG. 17, a reflux current flows on each of the primary side and the secondary side, and the reflux mode is set.
- FIG. 18 shows an example of driving the DC-DC converter 2 in the period T3 (storage mode) of FIG.
- FIG. 19 shows an example of driving the DC-DC converter 2 in the period T4 (emission mode) of FIG. 18, 19, together with the capacitor C P is connected to the terminal T 11, T 12, battery BT1 is connected as an example of the DC power supply.
- FIG. 18, 19, together with the capacitor C S is connected to the terminal T 21, T 22, the battery BT2 is connected as an example of a DC load.
- both the batteries BT1 and BT2 are assumed to be secondary batteries.
- the control circuit 90 performs a boosting operation by, for example, controlling the ratio between the length of the period of the storage mode and the length of the period of the emission mode. For example, as shown in FIGS. 6 and 18, the control circuit 90 turns on the switch elements Q A , Q D , Q E , and Q F and turns off the switch elements Q B , Q C in the storage mode. .. As a result, for example, as shown in FIG. 18, it operates as a period for storing energy in the inductors L RP and L RS (storage mode). Further, as shown in FIGS. 6 and 19, for example, the control circuit 60 turns off the switch element Q F while keeping the switch elements Q A , Q D , and Q E on. Then, for example, as shown in FIG. 19, it operates as a period during which the energy stored in the inductor L RP is released (release mode).
- the switch elements of the primary side bridge circuit 20 and the secondary side bridge circuit 70 are driven by different control methods in the high output voltage region and the low output voltage region in the output voltage range of the DC-DC converter 2.
- bidirectional power conversion is performed.
- PFM control is applied only to the primary side bridge circuit to control the output voltage
- PWM control is applied only to the secondary side bridge circuit to control the output voltage.
- control method according to a comparative example. reduces the amount of energy stores in resonant inductor L R.
- the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 2 can be reduced.
- PWM control for the secondary bridge circuit 70 is performed as the main control, and in the output voltage range of the DC-DC converter 2.
- phase shift control is performed as the main control for the primary bridge circuit 20.
- the reference output voltage (VS (std) ) determined according to the turns ratio of the transformer 10 is set to be the center of the output voltage range of the DC-DC converter 2.
- the PWM control for the secondary side bridge circuit 70 is performed as the main control in the operating region where the Duty exceeds 0.5, and the primary side bridge is performed in the operating region where the Duty is 0.5 or less.
- the phase shift control for the circuit 20 is performed as the main control.
- the primary side bridge has a fixed drive frequency f SW having a value larger than the resonance frequency f R of the resonance circuit obtained by converting the LC resonance circuit on the secondary side to the primary side.
- the switch elements of the circuit 20 and the secondary bridge circuit 70 are controlled.
- the circuit current becomes small, so that the charging efficiency becomes higher than in the discontinuous mode.
- Each constant of the resonance circuit on the primary side and the secondary side is designed so that (f R) becomes 0 ⁇ as shown in the above equations (1) and (2).
- L RP L RS'in FIG. 13
- the primary side inductor L RP and the secondary side inductor L RS can also utilize the leakage inductance of the transformer.
- the primary bridge circuit 20 a plurality of switching elements Q A is on-off controlled by the control circuit 90, Q B, Q C, full-bridge, which is configured to include a Q D It is a circuit of.
- the secondary side bridge circuit 70 is also a full bridge type circuit composed of a plurality of switch elements Q E , Q F , Q G , and Q H controlled on / off by the control circuit 90. ..
- the DC-DC converter 2 is provided with capacitors C RP and C RS for the resonance circuits on the primary side and the secondary side, so that the capacitors C RP and C RS play a role of preventing demagnetization of the transformer 10. I am in charge.
- the control circuit 90 increases the period in which the current flows through the rectifier circuit as the Duty increases.
- the width of the driving pulse to be applied to the switching element Q H (oN width) must also be increased.
- the Duty> 0.5 boost PWM mode
- FIG. 24 shows a circuit diagram of the DC-DC converter 3 according to the third embodiment of the present invention.
- the DC-DC converter 3 includes one inductor L RP and one capacitor C RP as the resonance circuit on the primary side, and one inductor L RS and one capacitor as the resonance circuit on the secondary side. It is equipped with C RS.
- the DC-DC converter 3 is a CLLC type DC-DC converter that utilizes resonance caused by these inductors L RP and L RS and capacitors C RP and C RS.
- DC-DC converter 3 comprises a transformer 10, 1-side bridge circuit 20, a secondary-side bridge circuit 70,1 primary driver 40 and a secondary-side driver 80, the current sensor S P, S S and the control circuit 100 There is.
- Current sensor S P output primary side detects the circuit current I P flowing through the high side of the primary bridge circuit 20, and outputs a detection value corresponding to the detected circuit current I P to the control circuit 100.
- Current sensor S S of the secondary side detects the circuit current I S flowing through the high side of the secondary bridge circuit 70, and outputs a detection value corresponding to the detected circuit current I S to the control circuit 100.
- Control circuit 100 based on the primary side of the current sensor S P and the secondary side of the current sensor S detected values obtained from the S (I P, I S) with a control signal generated within the control circuit 100 Then, a synchronous rectification signal is output to the switch element on the high side of the secondary side bridge circuit 70.
- FIG. 25 shows an example of the circuit configuration of the synchronous rectification pulse generation circuit 101, which is incorporated in the control circuit 100 and is output to the switch element on the high side side of the rectification side bridge during charging.
- the synchronous rectification pulse generation circuit 101 includes, for example, a comparator and two AND circuits. Comparator detects the circuit current I S of the secondary bridge circuit 70. The AND circuit synthesizes the control signal generated by the control circuit 100 and the output signal of the comparator. Thus, while synchronously rectifying the high-side switching element on the secondary side bridge, short circuit and the capacitor C S, backflow of current to the capacitor C P is prevented.
- a control signal input to the switch element Q A (2) a control signal input to the switch element Q D , (3) a COMP signal, and (4) input to the switch element Q F.
- a control signal, the switch element Q F, a total of four types of signals of the inverted signal of the dead time T FH and the sum signal provided as a short circuit prevention between the Q H (INV (Q F + T FH)) is input, the output signal of the aND circuit is output to the switch element Q H.
- the switch elements Q A and Q D are used to determine the polarity of the voltage applied to the transformer 10, and the COMP signal is used to detect the section in which the current is flowing in the switch element.
- the signal (INV (Q F + TFH )) is used for the purpose of preventing a short circuit between the upper and lower arms.
- FIG. 26 shows an example of the drive pulse waveform in Duty ⁇ 0.5 (step-down mode).
- FIG. 27 shows an example of the drive pulse waveform when Duty> 0.5 (boost mode).
- FIG. 26 the waveform measurement of FIG. 27, with the capacitor C P is connected to the terminal T 11, T 12, battery BT1 is connected as an example of the DC power supply.
- FIG. 26 the waveform measurement of FIG. 27, with the capacitor C S is connected to the terminal T 21, T 22, the battery BT2 is connected as an example of a DC load.
- both the batteries BT1 and BT2 are assumed to be secondary batteries.
- the synchronous rectification pulse generation circuit 101 outputs a synchronous rectification signal to the switch element on the high side side of the secondary side bridge circuit 70 according to the control by the control circuit 100.
- Synchronous pulse generator 101 is, for example, in the period of FIG. 26 T1 (Duty ⁇ 0.5 (Buck Mode)), the switch element Q H, 2-side bridge control signal for turning on the switching element Q H Output to the circuit 70.
- the Duty is increased, to increase the pulse width of the control signal for turning on the switching element Q H (ON width).
- Synchronous pulse generator 101 is, for example, in the period of FIG.
- a current sensor for detecting a current sensor S P for detecting the circuit current I P flowing through the high side of the primary bridge circuit 20, the circuit current I S flowing through the high side of the secondary bridge circuit 70 and the S S are provided.
- These current sensors S P, S circuit current detected by the S I P, based on the I S, synchronous rectification on the secondary side bridge circuit 70 is performed.
- the switch element Q H by narrowing the pulse width of the control signal for turning on the Q G (ON width), short circuit and the capacitor C S, it is possible to prevent the reverse flow of current to the capacitor C P.
- the capacitor C P Efficiency can be improved by preventing backflow of current to.
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Abstract
A power supply device according to one aspect of the present invention comprises: a transformer; a primary-side bridge circuit provided on the primary side of the transformer; a secondary-side bridge circuit provided on the secondary side of the transformer; and a resonant circuit provided on at least one of the primary and secondary sides of the transformer. The power supply device further comprises a control circuit that performs unidirectional or bidirectional power conversion, by driving the switch elements of the primary-side bridge circuit and the secondary-side bridge circuit by different control methods depending on the output voltage range.
Description
本発明は、直流電力を変換する電源装置および電源システムに関する。
The present invention relates to a power supply device and a power supply system that convert DC power.
直流電力を変換する電源装置において、広い出力電圧範囲の電力伝送を周波数制御の共振回路(LLC共振回路)で行う場合、大きな昇圧比を得るために、励磁インダクタLMおよび共振インダクタLRの比(=LR/LM)を大きく設計する必要がある。励磁インダクタLMは1次側ブリッジをZVS(ゼロボルトスイッチング)するために必要な励磁電流の制約から設計されるために、共振インダクタLRでLR/LMを調整することになる(例えば、特許文献1参照)。
In the power supply apparatus for converting DC power, when performing power transmission in a wide output voltage range at the resonance circuit of the frequency control (LLC resonant circuit), in order to obtain a large step-up ratio, the ratio of the excitation inductor L M and resonant inductor L R it is necessary to design a large (= L R / L M) . For exciting the inductor L M is designed from constraints of the excitation current necessary for the primary bridge to ZVS (Zero Voltage Switching), it will adjust the L R / L M in resonant inductor L R (e.g., See Patent Document 1).
ところで、共振インダクタLRを大きくすると、印加される電圧が大きくなり、鉄損が増加するため、コアの断面積や巻数を増やす必要がある。そのため、共振インダクタLRの体積が大きくなるという問題がある。共振インダクタLRをトランスと一体化した場合であっても、コアの断面積や、1次巻線および2次巻線の巻数を増やす必要があるため、体積を小さくすることが容易ではない。従って、体積を小さくすることの可能な電源装置およびそのような電源装置を備えた電源システムを提供することが望ましい。
By the way, when the resonance inductor LR is increased, the applied voltage increases and the iron loss increases, so that it is necessary to increase the cross-sectional area and the number of turns of the core. Therefore, there is a problem that the volume of the resonant inductor L R is increased. Also a resonant inductor L R A when integrated with transformer, and the cross-sectional area of the core, it is necessary to increase the number of turns of the primary winding and the secondary winding, it is not easy to reduce the volume. Therefore, it is desirable to provide a power supply device capable of reducing the volume and a power supply system including such a power supply device.
本発明の第1の側面に係る電源装置は、トランスと、トランスの1次側に設けられた1次側ブリッジ回路と、トランスの2次側に設けられた2次側ブリッジ回路と、トランスの1次側および2次側のうち少なくとも一方の側に設けられた共振回路とを備えている。この電源装置は、さらに、出力電圧範囲によって、1次側ブリッジ回路および2次側ブリッジ回路のスイッチ素子を互いに異なる制御方法で駆動することにより、一方向または双方向の電力変換を行う制御回路を備えている。なお、一方向または双方向の電力変換いずれの場合も、1次側とは一般的に商用系統に接続される側を指しており、2次側とは一般的に負荷系統に接続される側を指している。
The power supply device according to the first aspect of the present invention includes a transformer, a primary bridge circuit provided on the primary side of the transformer, a secondary bridge circuit provided on the secondary side of the transformer, and a transformer. It is provided with a resonance circuit provided on at least one of the primary side and the secondary side. This power supply further provides a control circuit that performs unidirectional or bidirectional power conversion by driving the switch elements of the primary side bridge circuit and the secondary side bridge circuit by different control methods depending on the output voltage range. I have. In both unidirectional and bidirectional power conversions, the primary side generally refers to the side connected to the commercial system, and the secondary side generally refers to the side connected to the load system. Pointing to.
本発明の第2の側面に係る電源システムは、直流電力を変換する電源装置と、電源装置の1次側に接続される安定化された直流電源(PFCコンバータの出力やバッテリ等)と、電源装置の2次側に接続される直流負荷装置(各種電気機器やバッテリ等)とを備えている。この電源システムにおける電源装置は、上記第1の側面に係る電源装置と同一の構成を有している。
The power supply system according to the second aspect of the present invention includes a power supply device that converts DC power, a stabilized DC power supply (PFC converter output, battery, etc.) connected to the primary side of the power supply device, and a power supply. It is equipped with a DC load device (various electric devices, batteries, etc.) connected to the secondary side of the device. The power supply device in this power supply system has the same configuration as the power supply device according to the first aspect.
本発明の第1の側面に係る電源装置、および本発明の第2の側面に係る電源システムによれば、出力電圧範囲によって、1次側ブリッジ回路および2次側ブリッジ回路のスイッチ素子を互いに異なる制御方法で駆動することにより、一方向または双方向の電力変換を行うようにしたので、例えば、1次側ブリッジ回路のみにPFM(Pulse Frequency Modulation;パルス周波数変調)制御を適用して出力電圧を制御する場合、あるいは2次側ブリッジ回路のみにPWM(Pulse Width Modulation;パルス幅変調)制御を適用して出力電圧を制御する場合と比べて、共振インダクタに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、電源装置の体積を小さくすることができる。
According to the power supply device according to the first aspect of the present invention and the power supply system according to the second aspect of the present invention, the switch elements of the primary side bridge circuit and the secondary side bridge circuit are different from each other depending on the output voltage range. Since one-way or two-way power conversion is performed by driving with a control method, for example, PFM (Pulse Frequency Modulation) control is applied only to the primary side bridge circuit to apply the output voltage. Compared with the case of controlling or applying PWM (Pulse Width Modulation) control only to the secondary side bridge circuit to control the output voltage, the amount of energy stored in the resonant inductor can be reduced. As a result, the magnetic component can be miniaturized. Therefore, the volume of the power supply device can be reduced.
以下、本発明の実施の形態について、図面を参照して詳細に説明する。以下に説明する実施の形態は、いずれも本開示の好ましい一具体例を示すものである。したがって、以下の実施の形態で示される数値、形状、材料、構成要素、構成要素の配置位置及び接続形態などは、一例であって本開示を限定する主旨ではない。よって、以下の実施の形態における構成要素のうち、本開示の最上位概念を示す独立請求項に記載されていない構成要素については、任意の構成要素として説明される。なお、各図は、模式図であり、必ずしも厳密に図示されたものではない。また、各図において、実質的に同一の構成に対しては同一の符号を付しており、重複する説明は省略又は簡略化する。なお、説明は以下の順序で行う。
1.第1の実施の形態
CL方式の一方向DC-DCコンバータ
(キャパシタとインダクタによる共振回路を1次側に備えた
一方向DC-DCコンバータを例に説明します)
2.第2の実施の形態
CLLC方式の双方向DC-DCコンバータ
(キャパシタとインダクタによる共振回路を1次側および2次側に
備えた双方向DC-DCコンバータを例に説明します)
3.第3の実施の形態
CLLC方式の双方向DC-DCコンバータ
CLLC方式の双方向同期整流DC-DCコンバータ
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Each of the embodiments described below shows a preferred specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, arrangement positions of components, connection forms, and the like shown in the following embodiments are examples and are not intended to limit the present disclosure. Therefore, among the components in the following embodiments, the components not described in the independent claims indicating the highest level concept of the present disclosure are described as arbitrary components. It should be noted that each figure is a schematic view and is not necessarily exactly illustrated. Further, in each figure, the same reference numerals are given to substantially the same configurations, and duplicate explanations will be omitted or simplified. The explanation will be given in the following order.
1. 1. First Embodiment CL type one-way DC-DC converter (A one-way DC-DC converter provided with a resonance circuit by a capacitor and an inductor on the primary side will be described as an example).
2. 2. Second Embodiment CLLC type bidirectional DC-DC converter (A bidirectional DC-DC converter having a resonance circuit with a capacitor and an inductor on the primary side and the secondary side will be described as an example).
3. 3. Third Embodiment CLLC-type bidirectional DC-DC converter CLLC-type bidirectional synchronous rectification DC-DC converter
1.第1の実施の形態
CL方式の一方向DC-DCコンバータ
(キャパシタとインダクタによる共振回路を1次側に備えた
一方向DC-DCコンバータを例に説明します)
2.第2の実施の形態
CLLC方式の双方向DC-DCコンバータ
(キャパシタとインダクタによる共振回路を1次側および2次側に
備えた双方向DC-DCコンバータを例に説明します)
3.第3の実施の形態
CLLC方式の双方向DC-DCコンバータ
CLLC方式の双方向同期整流DC-DCコンバータ
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Each of the embodiments described below shows a preferred specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, arrangement positions of components, connection forms, and the like shown in the following embodiments are examples and are not intended to limit the present disclosure. Therefore, among the components in the following embodiments, the components not described in the independent claims indicating the highest level concept of the present disclosure are described as arbitrary components. It should be noted that each figure is a schematic view and is not necessarily exactly illustrated. Further, in each figure, the same reference numerals are given to substantially the same configurations, and duplicate explanations will be omitted or simplified. The explanation will be given in the following order.
1. 1. First Embodiment CL type one-way DC-DC converter (A one-way DC-DC converter provided with a resonance circuit by a capacitor and an inductor on the primary side will be described as an example).
2. 2. Second Embodiment CLLC type bidirectional DC-DC converter (A bidirectional DC-DC converter having a resonance circuit with a capacitor and an inductor on the primary side and the secondary side will be described as an example).
3. 3. Third Embodiment CLLC-type bidirectional DC-DC converter CLLC-type bidirectional synchronous rectification DC-DC converter
<1.第1の実施の形態>
[構成]
図1は、本発明の第1の実施の形態に係るDC-DCコンバータ1の回路図を表したものである。DC-DCコンバータ1は、1次側の共振回路として、1つのインダクタLRPと、1つのキャパシタCRPとを備えており、これらのインダクタLRPおよびキャパシタCRPによる共振を利用したCL方式のDC-DCコンバータである。DC-DCコンバータ1は、トランス10、1次側ブリッジ回路20、2次側ブリッジ回路30、1次側ドライバ40、2次側ドライバ50および制御回路60を備えている。 <1. First Embodiment>
[composition]
FIG. 1 shows a circuit diagram of a DC-DC converter 1 according to a first embodiment of the present invention. The DC-DC converter 1 includes one inductor L RP and one capacitor C RP as a resonance circuit on the primary side, and is a CL system utilizing resonance by these inductor L RP and capacitor C RP. It is a DC-DC converter. The DC-DC converter 1 includes a transformer 10, a primary side bridge circuit 20, a secondary side bridge circuit 30, a primary side driver 40, a secondary side driver 50, and a control circuit 60.
[構成]
図1は、本発明の第1の実施の形態に係るDC-DCコンバータ1の回路図を表したものである。DC-DCコンバータ1は、1次側の共振回路として、1つのインダクタLRPと、1つのキャパシタCRPとを備えており、これらのインダクタLRPおよびキャパシタCRPによる共振を利用したCL方式のDC-DCコンバータである。DC-DCコンバータ1は、トランス10、1次側ブリッジ回路20、2次側ブリッジ回路30、1次側ドライバ40、2次側ドライバ50および制御回路60を備えている。 <1. First Embodiment>
[composition]
FIG. 1 shows a circuit diagram of a DC-
トランス10は、1次側コイルNP、2次側コイルNSおよび磁心CRを有している。1次側コイルNPおよび2次側コイルNSは磁心CRに巻かれている。1次側コイルNPの巻数をnPとし、2次側コイルNSの巻数をnSとすると、トランス10の巻数比は、nP:nSとなっている。インダクタLRPおよびキャパシタCRPは、1次側コイルNPに直列接続されている。トランス10の巻数比は、例えば、図2に示したように、基準出力電圧(VS(std))がDC-DCコンバータ1の出力電圧範囲における中心もしくは中心付近になるように設定される。例えば、DC-DCコンバータ1の入力電圧(1次側電圧VP)が400Vに設定されるとともに、DC-DCコンバータ1の出力電圧範囲が240V~420Vに設定されたとき、DC-DCコンバータ1の出力電圧範囲における中心は、330Vとなる。このとき、トランス10の巻数比(nP:nS)は、例えば、5:4となる。
Transformer 10 has a primary coil N P, 2 primary coil N S and core CR. Primary coil N P and the secondary coil N S is wound magnetic core CR. When the number of turns of the primary coil N P and n P, the number of turns of the secondary coil N S and n S, the turns ratio of the transformer 10, n P: has a n S. Inductor L RP and capacitor C RP is serially connected to the primary coil N P. The turns ratio of the transformer 10 is set so that the reference output voltage (VS (std) ) is at or near the center in the output voltage range of the DC-DC converter 1, for example, as shown in FIG. For example, with DC-DC converter 1 of the input voltage (primary voltage V P) is set to 400V, when the output voltage range of the DC-DC converter 1 is set to 240V ~ 420 V, the DC-DC converter 1 The center of the output voltage range is 330V. At this time, the turns ratio (n P : n S ) of the transformer 10 is, for example, 5: 4.
1次側ブリッジ回路20は、制御回路60によってオン・オフ制御される4つのスイッチ素子を含んで構成されたフルブリッジ型の回路となっている。1次側ブリッジ回路20は、4つのスイッチ素子のうちのローサイドの2つのスイッチ素子に相当する2つのスイッチ素子QB,QDと、4つのスイッチ素子のうちのハイサイドの2つのスイッチ素子に相当する2つのスイッチ素子QA,QCとを有している。
The primary side bridge circuit 20 is a full bridge type circuit including four switch elements controlled on / off by the control circuit 60. Primary bridge circuit 20 includes two switching elements Q B corresponding to the low side of the two switching elements of the four switching elements, and Q D, the two switch elements of the high-side of the four switching elements It has two corresponding switch elements Q A and Q C.
2次側ブリッジ回路30は、制御回路60によってオン・オフ制御される2つのスイッチ素子と、2つのダイオード素子とを含んで構成されたフルブリッジ型の回路となっている。2次側ブリッジ回路30は、ローサイドの2つのスイッチ素子に相当する2つのスイッチ素子QE,QFと、ハイサイドの2つのダイオード素子に相当する2つのダイオード素子D1,D2とを有している。
The secondary side bridge circuit 30 is a full bridge type circuit including two switch elements controlled on and off by the control circuit 60 and two diode elements. The secondary side bridge circuit 30 has two switch elements Q E and Q F corresponding to two low side switch elements and two diode elements D 1 and D 2 corresponding to two high side diode elements. is doing.
スイッチ素子QA,QB,QC,QD,QE,QFは、MOSFET(Metal Oxide Semiconductor Field Effect Transistor)等のスイッチ素子で構成されている。スイッチ素子QA,QB,QC,QD,QE,QFは、端子T11,T21に対して逆バイアスになるように並列接続されたボディダイオードDQA,DQB,DQC,DQD,DQE,DQFを含んで構成されている。1次側ブリッジ回路20は、各スイッチ素子QA,QB,QC,QDに並列接続されたキャパシタCA,CB,CC,CDを有している。2次側ブリッジ回路30は、各スイッチ素子QE,QFに並列接続されたキャパシタCE,CFを有している。
The switch elements Q A , Q B , Q C , Q D , Q E , and Q F are composed of switch elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistor). Switching element Q A, Q B, Q C , Q D, Q E, Q F has terminals T 11, body diode are connected in parallel so as to be biased with respect to T 21 D QA, D QB, D QC , D QD , D QE , D QF are included. Primary bridge circuit 20 includes the switching elements Q A, Q B, Q C , the capacitor C A connected in parallel to Q D, C B, C C , the C D. Secondary bridge circuit 30, the switch elements Q E, Q F in parallel connected capacitors C E, has a C F.
なお、スイッチ素子QA,QB,QC,QD,QE,QFは、例えば、RC(逆導通)-IGBT(絶縁ゲート型バイポーラトランジスタ)で構成されていてもよい。この場合、RC-IGBTに内蔵されているFRD(ファストリカバリダイオード)が上述のボディダイオードの代わりとなる。スイッチ素子QA,QB,QC,QD,QE,QFは、例えば、ワイドギャップ半導体(SiC,GaN)を含むFETで構成されていてもよい。この場合、スイッチ素子QA,QB,QC,QD,QE,QFには、順方向電圧の高さによる効率の低下を防ぐ目的で、上述のボディダイオードの代わりとなる外付けのダイオードが並列に接続されていてもよい。
The switch elements Q A , Q B , Q C , Q D , Q E , and Q F may be composed of, for example, an RC (reverse conduction) -IGBT (insulated gate bipolar transistor). In this case, the FRD (fast recovery diode) built in the RC-IGBT substitutes for the body diode described above. The switch elements Q A , Q B , Q C , Q D , Q E , and Q F may be composed of, for example, a FET including a wide-gap semiconductor (SiC, GaN). In this case, the switch elements Q A , Q B , Q C , Q D , Q E , and Q F are externally attached in place of the above-mentioned body diode in order to prevent a decrease in efficiency due to the high forward voltage. Diodes may be connected in parallel.
2つのスイッチ素子QA,QBは、接続点P1で互いに直列に接続されている。2つのスイッチ素子QC,QDは、接続点P2で互いに直列に接続されている。接続点P1と接続点P2は、1次側コイルNP、インダクタLRPおよびキャパシタCRPを直列に介して接続されている。
Two switching elements Q A, Q B are connected in series with one another at a connection point P 1. Two switching elements Q C, Q D are connected in series with one another at the connection point P 2. Connection point P 1 and the connection point P 2 is the primary coil N P, and the inductor L RP and capacitor C RP is connected via the series.
ダイオード素子D2およびスイッチ素子QFは、接続点P3で互いに直列に接続されている。ダイオード素子D1およびスイッチ素子QEは、接続点P4で互いに直列に接続されている。接続点P3と接続点P4は、2次側コイルNSを介して接続されている。
The diode element D 2 and the switch element Q F are connected in series with each other at the connection point P 3. The diode element D 1 and the switch element Q E are connected in series with each other at the connection point P 4. Connection point P 4 and the connection point P 3 is connected via the secondary coil N S.
DC-DCコンバータ1は、さらに、1次側に端子T11,T12を、2次側に端子T21,T22を備えている。端子T11が1次側ブリッジ回路20のハイサイドに接続されており、端子T12が1次側ブリッジ回路20のローサイドに接続されている。DC-DCコンバータ1は、さらに、端子T11と端子T12との間にキャパシタCPを、端子T21と端子T22との間にキャパシタCSを備えている。端子T21が2次側ブリッジ回路30のハイサイドに接続されており、端子T22が2次側ブリッジ回路30のローサイドに接続されている。
The DC-DC converter 1 further includes terminals T 11 and T 12 on the primary side and terminals T 21 and T 22 on the secondary side. The terminal T 11 is connected to the high side of the primary side bridge circuit 20, and the terminal T 12 is connected to the low side of the primary side bridge circuit 20. DC-DC converter 1, further the capacitor C P between the terminal T 11 and the terminal T 12, and a capacitor C S between the terminal T 21 and the terminal T 22. The terminal T 21 is connected to the high side of the secondary side bridge circuit 30, and the terminal T 22 is connected to the low side of the secondary side bridge circuit 30.
1次側ドライバ40は、制御回路60によって生成された位相シフト制御(PPS:Pulse Phase Shift)を行う制御信号を、1次側ブリッジ回路20に含まれる4つのスイッチ素子QA,QB,QC,QDに出力する。具体的には、1次側ドライバ40は、制御回路60によって生成されたDutyが0.5以下の範囲においては、固定周波数且つ50%以内のパルス幅の信号をスイッチ素子QA,QBに対して出力し、スイッチ素子QA,QBに対してDutyによって決められる任意の位相をシフトさせた信号をスイッチ素子QC,QDに出力する。一方、1次側ドライバ40は、制御回路60によって生成されたDutyが0.5を超える範囲においては、スイッチ素子QA,QDとスイッチ素子QB,QCとを固定周波数且つ50%以内のパルス幅で交互にオン、オフする信号を出力する。
The primary side driver 40 transmits the control signal for performing phase shift control (PPS: Pulse Phase Shift) generated by the control circuit 60 to the four switch elements Q A , Q B , and Q included in the primary side bridge circuit 20. C, and outputs it to the Q D. Specifically, the primary driver 40, in the Duty range of 0.5 or less generated by the control circuit 60, a signal of fixed frequency and 50% within the pulse width switching element Q A, the Q B outputs for outputs switching element Q a, a signal obtained by shifting an arbitrary phase that is determined by the Duty respect Q B switching element Q C, to Q D. On the other hand, the primary side driver 40 has a fixed frequency and within 50% of the switch elements Q A and Q D and the switch elements Q B and Q C in the range where the duty generated by the control circuit 60 exceeds 0.5. Outputs a signal that turns on and off alternately with the pulse width of.
2次側ドライバ50は、制御回路60によって生成されたPWM制御(PWM:Pulse Wide Modulation)を行う制御信号を2次側ブリッジ回路30に含まれる2つのスイッチ素子QE,QFに出力する。具体的には、2次側ドライバ50は、制御回路60によって生成されたDutyが0.5以下の範囲においては、固定周波数且つDutyによって決められる50%以下のパルス幅の信号をスイッチ素子QE,QFに出力する。一方、2次側ドライバ50は、制御回路60によって生成されたDutyが0.5を超える範囲においては、固定周波数で50%を超えるパルス幅の信号をスイッチ素子QE,QFに出力する。
Secondary driver 50, PWM control that is generated by the control circuit 60 (PWM: Pulse Wide Modulation) 2 two switching elements Q E contained a control signal to the secondary bridge circuit 30 which performs, and outputs the Q F. Specifically, the secondary-side driver 50, in the Duty range of 0.5 or less generated by the control circuit 60, a fixed frequency and switching element signals 50 percent of the pulse width is determined by the Duty Q E , Q F is output. On the other hand, the secondary-side driver 50, in the range Duty generated by the control circuit 60 is more than 0.5, and outputs a signal having a pulse width greater than 50% at a fixed frequency switching element Q E, the Q F.
制御回路60は、DSP(Digital Signal Processor)を用いて構成されており、1次側ドライバ40および2次側ドライバ50を介して、1次側ブリッジ回路20および2次側ブリッジ回路30のスイッチ素子を制御することにより、1次側から2次側(一方向)への電力変換を行う。制御回路60は、出力電圧(2次側電圧VS)を検出し、この出力電圧(2次側電圧VS)が目標電圧値になるようにDutyを生成する。このとき生成されたDutyが50%以下の場合、制御回路60は、1次側ドライバ40に対して出力する位相シフト制御信号を主として、DC-DCコンバータ1の出力電圧(2次側電圧VS)を制御する。例えば、生成されたDutyが小さい程、位相シフト量が小さくなり、低い出力電圧を得ることが出来る。一方、生成されたDutyが50%を超える場合、制御回路60は、2次側ドライバ50に対して出力するPWM制御信号を主として、DC-DCコンバータ1の出力電圧(2次側電圧VS)を制御する。具体的には生成されたDutyが大きい程、2つのスイッチ素子QE,QFが同時オンする時間幅が大きくなり、この時インダクタLRPに蓄えられるエネルギーが大きくなるため、高い出力電圧を得ることが出来る。
The control circuit 60 is configured by using a DSP (Digital Signal Processor), and is a switch element of the primary side bridge circuit 20 and the secondary side bridge circuit 30 via the primary side driver 40 and the secondary side driver 50. By controlling the above, power conversion from the primary side to the secondary side (one direction) is performed. The control circuit 60 detects the output voltage (secondary voltage V S), generates a Duty as the output voltage (secondary voltage V S) becomes the target voltage value. When the duty generated at this time is 50% or less, the control circuit 60 mainly uses the phase shift control signal output to the primary side driver 40 as the output voltage of the DC-DC converter 1 (secondary side voltage VS). ) Is controlled. For example, the smaller the generated Duty, the smaller the phase shift amount, and a lower output voltage can be obtained. On the other hand, if the generated Duty exceeds 50%, the control circuit 60, mainly a PWM control signal to be output to the secondary-side driver 50, DC-DC converter 1 of the output voltage (secondary voltage V S) To control. Specifically, the larger the generated Duty, the longer the time width during which the two switch elements Q E and Q F are turned on at the same time, and the larger the energy stored in the inductor L RP at this time, so that a higher output voltage is obtained. Can be done.
[動作]
次に、DC-DCコンバータ1の動作について説明する。 [motion]
Next, the operation of the DC-DC converter 1 will be described.
次に、DC-DCコンバータ1の動作について説明する。 [motion]
Next, the operation of the DC-
図3は、DC-DCコンバータ1における降圧モード(Duty≦0.5)時の駆動パルス波形の一例を表したものである。図4は、図3の期間T1(伝送モード)におけるDC-DCコンバータ1の駆動の一例を表したものである。図5は、図3の期間T2(還流モード)におけるDC-DCコンバータ1の駆動の一例を表したものである。図4、図5では、端子T11,T12にキャパシタCPが接続されるとともに、直流電源の一例としてバッテリBT1が接続された電源システムが例示されている。さらに、図4、図5では、端子T21,T22にキャパシタCSが接続されるとともに、負荷の一例としてバッテリBT2が接続された電源システムが例示されている。本実施の形態では、バッテリBT2は、2次電池を想定している。
FIG. 3 shows an example of the drive pulse waveform in the step-down mode (Duty ≦ 0.5) in the DC-DC converter 1. FIG. 4 shows an example of driving the DC-DC converter 1 in the period T1 (transmission mode) of FIG. FIG. 5 shows an example of driving the DC-DC converter 1 in the period T2 (reflux mode) of FIG. 4 and 5, together with the capacitor C P is connected to the terminal T 11, T 12, a power supply system battery BT1 is connected as an example of the DC power supply is illustrated. Further, FIG. 4, 5, together with the capacitor C S is connected to the terminal T 21, T 22, a power supply system battery BT2 is connected as an example of the load is illustrated. In this embodiment, the battery BT2 is assumed to be a secondary battery.
図3において、DPPSは1次側ブリッジ回路20に対して位相シフト制御を行う際の位相シフト幅を表しており、DPWMは2次側ブリッジ回路30のローサイドのスイッチ素子QE,QFのPWM幅を表している。また、図3において、TSWは1周期の長さを表しており、TAB,TCDは1次側ブリッジ回路20のスイッチ素子QA,QB,QC,QDのデッドタイムを表しており、TAE,TBFは2次側ブリッジ回路30のローサイドのスイッチ素子QE,QFをZVS(ゼロボルトスイッチング)させる遅延量を表している。DPPSは、TSW×D-(TAB+TCD)で求められ、DPWMは、TSW×D-(TAB+TCD)-TAEで求められる。DPPS,DPWMの導出に用いられるDは、デューティ制御量であり、Dmin~Dmaxの範囲内の値を採る。
In FIG. 3, D PPS represents the phase shift width when phase shift control is performed with respect to the primary side bridge circuit 20, and D PWM represents the low side switch elements Q E , Q F of the secondary side bridge circuit 30. Represents the PWM width of. Further, in FIG. 3, T SW represents the length of one period, TAB, TCD denotes switching element QA of the primary bridge circuit 20, QB, QC, the dead time of the QD, T AE, T BF represents the delay amount to the low-side switching element Q E of the secondary bridge circuit 30, a Q F is ZVS (zero-voltage switching). D PPS is determined by T SW x D- (TAB + TCD), and D PWM is determined by T SW x D- (TAB + TCD) -T AE . D used for deriving D PPS and D PWM is a duty control amount, and takes a value within the range of D min to D max.
制御回路60は、例えば、伝送モードの期間の長さと、還流モードの期間の長さとの割合を制御することにより、降圧動作を行う。制御回路60は、例えば、図3に示したように、スイッチ素子QA,QD,QEをオンさせるとともに、スイッチ素子QB,QC,QFをオフさせる。これにより、例えば、図4に示したように、1次側から2次側に電力変換を伝送する期間(伝送モード)が生成される。また、制御回路60は、例えば、図3に示したように、スイッチ素子QAをオンさせたまま、スイッチ素子QD,QEをオフさせた後に、スイッチ素子QCをオンさせる。すると、例えば、図5に示したように、ダイオードD2がオフし、1次側から2次側に電力を伝送しない期間(還流モード)が生成される。
The control circuit 60 performs a step-down operation by, for example, controlling the ratio between the length of the transmission mode period and the length of the reflux mode period. For example, as shown in FIG. 3, the control circuit 60 turns on the switch elements Q A , Q D , and Q E, and turns off the switch elements Q B , Q C , and Q F. As a result, for example, as shown in FIG. 4, a period (transmission mode) for transmitting the power conversion from the primary side to the secondary side is generated. Further, for example, as shown in FIG. 3, the control circuit 60 turns on the switch elements Q C after turning off the switch elements Q D and Q E while keeping the switch element Q A on. Then, for example, as shown in FIG. 5, the diode D 2 is turned off, and a period (reflux mode) in which power is not transmitted from the primary side to the secondary side is generated.
図6は、DC-DCコンバータ1における昇圧モード(Duty>0.5)時の駆動パルス波形の一例を表したものである。図7は、図6の期間T3(蓄積モード)におけるDC-DCコンバータ1の駆動の一例を表したものである。図8は、図6の期間T4(放出モード)におけるDC-DCコンバータ1の駆動の一例を表したものである。図7、図8では、端子T11,T12にキャパシタCPが接続されるとともに、直流電源の一例としてバッテリBT1が接続された電源システムが例示されている。さらに、図7、図8では、端子T21,T22にキャパシタCSが接続されるとともに、負荷の一例としてバッテリBT2が接続された電源システムが例示されている。本実施の形態では、バッテリBT2は、2次電池を想定している。
FIG. 6 shows an example of the drive pulse waveform in the boost mode (Duty> 0.5) in the DC-DC converter 1. FIG. 7 shows an example of driving the DC-DC converter 1 in the period T3 (storage mode) of FIG. FIG. 8 shows an example of driving the DC-DC converter 1 in the period T4 (emission mode) of FIG. 7 and 8, together with the capacitor C P is connected to the terminal T 11, T 12, a power supply system battery BT1 is connected as an example of the DC power supply is illustrated. Further, FIG. 7, 8, together with the capacitor C S is connected to the terminal T 21, T 22, a power supply system battery BT2 is connected as an example of the load is illustrated. In this embodiment, the battery BT2 is assumed to be a secondary battery.
図6において、DPPSは1次側ブリッジ回路20に対して位相シフト制御を行う際の位相シフト幅を表しており、DPWMは2次側ブリッジ回路30のローサイドのスイッチ素子QE,QFのPWM幅を表している。また、図6において、TSWは1周期の長さを表しており、TAB,TCDは1次側ブリッジ回路20のスイッチ素子QA,QB,QC,QDのデッドタイムを表しており、TAE,TBFは2次側ブリッジ回路30のローサイドのスイッチ素子QE,QFをZVS(ゼロボルトスイッチング)させる遅延量を表している。DPPSは、(1/2)×TSW-(TAB+TCD)(=固定値)で求められ、DPWMは、TSW×D-(TAB+TCD)-TAEで求められる。DPPS,DPWMの導出に用いられるDは、デューティ制御量であり、Dmin~Dmaxの範囲内の値を採る。
In FIG. 6, D PPS represents the phase shift width when phase shift control is performed with respect to the primary side bridge circuit 20, and D PWM represents the low side switch elements Q E , Q F of the secondary side bridge circuit 30. Represents the PWM width of. Further, in FIG. 6, T SW represents the length of one period, TAB, TCD denotes switching element QA of the primary bridge circuit 20, QB, QC, the dead time of the QD, T AE, T BF represents the delay amount to the low-side switching element Q E of the secondary bridge circuit 30, a Q F is ZVS (zero-voltage switching). D PPS is determined by (1/2) × T SW − (TAB + TCD) (= fixed value), and D PWM is determined by T SW × D − (TAB + TCD) −T AE . D used for deriving D PPS and D PWM is a duty control amount, and takes a value within the range of D min to D max.
制御回路60は、例えば、蓄積モードの期間の長さと、放出モードの期間の長さとの割合を制御することにより、昇圧動作を行う。制御回路60は、例えば、図6に示したように、蓄積モードでは、スイッチ素子QA,QD,QE,QFをオンさせるとともに、スイッチ素子QB,QCをオフさせる。これにより、例えば、図7に示したように、インダクタLRPにエネルギーを蓄積する期間(蓄積モード)が生成される。また、制御回路60は、例えば、図6に示したように、スイッチ素子QA,QD,QEをオンさせたまま、スイッチ素子QFをオフさせる。すると、例えば、図8に示したように、インダクタLRPに蓄積されたエネルギーが放出される期間(放出モード)が生成される。
The control circuit 60 performs a boosting operation by, for example, controlling the ratio between the length of the period of the storage mode and the length of the period of the emission mode. For example, as shown in FIG. 6, the control circuit 60 turns on the switch elements Q A , Q D , Q E , and Q F and turns off the switch elements Q B , Q C in the storage mode. As a result, for example, as shown in FIG. 7, a period (storage mode) for storing energy in the inductor L RP is generated. Further, for example, as shown in FIG. 6, the control circuit 60 turns off the switch element Q F while keeping the switch elements Q A , Q D , and Q E on. Then, for example, as shown in FIG. 8, a period (emission mode) in which the energy stored in the inductor L RP is released is generated.
[効果]
次に、本実施の形態に係るDC-DCコンバータ1の効果について説明する。 [effect]
Next, the effect of the DC-DC converter 1 according to the present embodiment will be described.
次に、本実施の形態に係るDC-DCコンバータ1の効果について説明する。 [effect]
Next, the effect of the DC-
直流電力を変換する電源装置において、広い出力電圧範囲の電力伝送を周波数制御の共振回路(LLC共振回路)で行う場合、大きな昇圧比を得るために、励磁インダクタLMおよび共振インダクタLRの比(=LR/LM)を大きく設計する必要がある。励磁インダクタLMは1次側ブリッジをZVS(ゼロボルトスイッチング)するために必要な励磁電流の制約から設計されるために、共振インダクタLRでLR/LMを調整することになる(例えば、上記特許文献1参照)。
In the power supply apparatus for converting DC power, when performing power transmission in a wide output voltage range at the resonance circuit of the frequency control (LLC resonant circuit), in order to obtain a large step-up ratio, the ratio of the excitation inductor L M and resonant inductor L R it is necessary to design a large (= L R / L M) . For exciting the inductor L M is designed from constraints of the excitation current necessary for the primary bridge to ZVS (Zero Voltage Switching), it will adjust the L R / L M in resonant inductor L R (e.g., See Patent Document 1 above).
ところで、共振インダクタLRを大きくすると、印加される電圧が大きくなり、鉄損が増加するため、コアの断面積や巻数を増やす必要がある。そのため、共振インダクタLRの体積が大きくなるという問題がある。共振インダクタLRをトランスと一体化した場合であっても、コアの断面積や、1次巻線および2次巻線の巻数を増やす必要があるため、体積を小さくすることが容易ではない。
By the way, when the resonance inductor LR is increased, the applied voltage increases and the iron loss increases, so that it is necessary to increase the cross-sectional area and the number of turns of the core. Therefore, there is a problem that the volume of the resonant inductor L R is increased. Also a resonant inductor L R A when integrated with transformer, and the cross-sectional area of the core, it is necessary to increase the number of turns of the primary winding and the secondary winding, it is not easy to reduce the volume.
一方、本実施の形態では、出力電圧範囲によって、1次側ブリッジ回路20および2次側ブリッジ回路30のスイッチ素子を互いに異なる制御方法で駆動することにより、一方向の電力変換が行われる。これにより、例えば、1次側ブリッジ回路のみにPFM制御を適用して出力電圧を制御(例えば、図9参照)する場合、あるいは2次側ブリッジ回路のみにPWM制御を適用して出力電圧を制御(例えば、図10参照)する場合(以下、「比較例に係る制御方法」と称する。)と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ1の体積を小さくすることができる。
On the other hand, in the present embodiment, power conversion in one direction is performed by driving the switch elements of the primary side bridge circuit 20 and the secondary side bridge circuit 30 by different control methods depending on the output voltage range. Thereby, for example, when PFM control is applied only to the primary side bridge circuit to control the output voltage (for example, see FIG. 9), or PWM control is applied only to the secondary side bridge circuit to control the output voltage. (e.g., see FIG. 10) can be the case of (hereinafter referred to as "control method according to a comparative example.") and compared, reduce the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 1 can be reduced.
また、本実施の形態では、DC-DCコンバータ1の出力電圧範囲における高い出力電圧領域において、2次側ブリッジ回路20に対するPWM制御が主制御として行われ、DC-DCコンバータ1の出力電圧範囲における低い出力電圧領域において、1次側ブリッジ回路20に対する位相シフト制御が主制御として行われる。これにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ1の体積を小さくすることができる。
Further, in the present embodiment, in the high output voltage region in the output voltage range of the DC-DC converter 1, PWM control for the secondary bridge circuit 20 is performed as the main control, and in the output voltage range of the DC-DC converter 1. In the low output voltage region, phase shift control for the primary bridge circuit 20 is performed as the main control. Thus, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 1 can be reduced.
また、本実施の形態では、DC-DCコンバータ1の出力電圧範囲における、トランス10の巻数比に応じて決定される基準出力電圧(VS(std))をDC-DCコンバータ1の出力電圧範囲の中心になるように設定する。基準出力電圧(VS(std))よりも高い出力電圧領域において、2次側ブリッジ回路30に対するPWM制御が主制御として行われることにより昇圧制御が行われ、DC-DCコンバータ1の出力電圧範囲における、基準出力電圧(VS(std))以下の出力電圧領域において、1次側ブリッジ回路20に対する位相シフト制御が主制御として行われることにより降圧制御が行われる。これにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ1の体積を小さくすることができる。
Further, in the present embodiment, the reference output voltage (VS (std) ) determined according to the turns ratio of the transformer 10 in the output voltage range of the DC-DC converter 1 is set to the output voltage range of the DC-DC converter 1. Set to be the center of. In the output voltage region higher than the reference output voltage ( VS (std) ), the boost control is performed by performing the PWM control for the secondary side bridge circuit 30 as the main control, and the output voltage range of the DC-DC converter 1 is performed. In the output voltage region below the reference output voltage ( VS (std) ) in the above, the step-down control is performed by performing the phase shift control for the primary side bridge circuit 20 as the main control. Thus, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 1 can be reduced.
また、本実施の形態では、Dutyが0.5を超える動作領域において、2次側ブリッジ回路30に対するPWM制御が主制御として行われ、Dutyが0.5以下の動作領域において、1次側ブリッジ回路20に対する位相シフト制御が主制御として行われる。これにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ1の体積を小さくすることができる。
Further, in the present embodiment, the PWM control for the secondary side bridge circuit 30 is performed as the main control in the operating region where the Duty exceeds 0.5, and the primary side bridge is performed in the operating region where the Duty is 0.5 or less. The phase shift control for the circuit 20 is performed as the main control. Thus, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 1 can be reduced.
また、本実施の形態では、1次側に設けたLC共振回路の共振周波数fRよりも大きな値の固定の駆動周波数fSWで、1次側ブリッジ回路20および2次側ブリッジ回路30のスイッチ素子が制御される。これにより、Duty=0.5においてDC-DCコンバータ1に流れる回路電流は連続モードとなる。この結果、回路電流が小さくなるので、不連続モードのときと比べて、充電効率が高くなる。
Further, in the present embodiment, the switches of the primary side bridge circuit 20 and the secondary side bridge circuit 30 have a fixed drive frequency f SW having a value larger than the resonance frequency f R of the LC resonance circuit provided on the primary side. The element is controlled. As a result, the circuit current flowing through the DC-DC converter 1 at Duty = 0.5 is in continuous mode. As a result, the circuit current becomes small, so that the charging efficiency becomes higher than in the discontinuous mode.
また、本実施の形態では、1次側ブリッジ回路20が、制御回路60によってオン・オフ制御される複数のスイッチ素子QA,QB,QC,QDを含んで構成されたフルブリッジ型の回路となっている。さらに、2次側ブリッジ回路30が、制御回路60によってオン・オフ制御されるローサイドの複数のスイッチ素子QE,QFと、ハイサイドの複数のダイオード素子D1,D2とを含んで構成されたフルブリッジ型の回路となっている。これにより、上述のスイッチ素子の制御を行うことにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ1の体積を小さくすることができる。
Further, in this embodiment, the primary bridge circuit 20, a plurality of switching elements Q A is on-off controlled by the control circuit 60, Q B, Q C, full-bridge, which is configured to include a Q D It is a circuit of. Further, the secondary side bridge circuit 30 includes a plurality of low-side switch elements Q E and Q F controlled on and off by the control circuit 60, and a plurality of high-side diode elements D 1 and D 2. It is a full bridge type circuit. Thus, by controlling the above switching element, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 1 can be reduced.
<2.第2の実施の形態>
[構成]
図11は、本発明の第2の実施の形態に係るDC-DCコンバータ2の回路図を表したものである。DC-DCコンバータ2は、1次側の共振回路として、1つのインダクタLRPと、1つのキャパシタCRPとを備えるとともに、2次側の共振回路として、1つのインダクタLRSと、1つのキャパシタCRSとを備えている。DC-DCコンバータ2は、これらのインダクタLRP,LRSおよびキャパシタCRP,CRSによる共振を利用したCLLC方式のDC-DCコンバータである。DC-DCコンバータ2は、トランス10、1次側ブリッジ回路20、2次側ブリッジ回路70、1次側ドライバ40、2次側ドライバ80および制御回路90を備えている。 <2. Second Embodiment>
[composition]
FIG. 11 shows a circuit diagram of the DC-DC converter 2 according to the second embodiment of the present invention. The DC-DC converter 2 includes one inductor L RP and one capacitor C RP as the resonance circuit on the primary side, and one inductor L RS and one capacitor as the resonance circuit on the secondary side. It is equipped with C RS. The DC-DC converter 2 is a CLLC type DC-DC converter that utilizes resonance caused by these inductors L RP and L RS and capacitors C RP and C RS. The DC-DC converter 2 includes a transformer 10, a primary bridge circuit 20, a secondary bridge circuit 70, a primary driver 40, a secondary driver 80, and a control circuit 90.
[構成]
図11は、本発明の第2の実施の形態に係るDC-DCコンバータ2の回路図を表したものである。DC-DCコンバータ2は、1次側の共振回路として、1つのインダクタLRPと、1つのキャパシタCRPとを備えるとともに、2次側の共振回路として、1つのインダクタLRSと、1つのキャパシタCRSとを備えている。DC-DCコンバータ2は、これらのインダクタLRP,LRSおよびキャパシタCRP,CRSによる共振を利用したCLLC方式のDC-DCコンバータである。DC-DCコンバータ2は、トランス10、1次側ブリッジ回路20、2次側ブリッジ回路70、1次側ドライバ40、2次側ドライバ80および制御回路90を備えている。 <2. Second Embodiment>
[composition]
FIG. 11 shows a circuit diagram of the DC-
1次側ブリッジ回路20は、制御回路90によってオン・オフ制御される4つのスイッチ素子QA,QB,QC,QDを含んで構成されたフルブリッジ型の回路となっている。2次側ブリッジ回路70は、制御回路90によってオン・オフ制御される4つのスイッチ素子を含んで構成されたフルブリッジ型の回路となっている。2次側ブリッジ回路70は、4つのスイッチ素子のうちのローサイドの2つのスイッチ素子に相当する2つのスイッチ素子QE,QFと、4つのスイッチ素子のうちのハイサイドの2つのスイッチ素子に相当する2つのスイッチ素子QG,QHとを有している。
Primary bridge circuit 20 includes four switching elements Q A is on-off controlled by the control circuit 90, Q B, Q C, has a full bridge circuit that is configured to include a Q D. The secondary side bridge circuit 70 is a full bridge type circuit including four switch elements controlled on / off by the control circuit 90. Secondary bridge circuit 70 includes two switching elements Q E which corresponds to the low side of the two switching elements of the four switching elements, and Q F, the two switch elements of the high-side of the four switching elements It has two corresponding switch elements Q G and Q H.
スイッチ素子QA,QB,QC,QD,QE,QF,QG,QHは、MOSFET等のスイッチ素子で構成されている。スイッチ素子QA,QB,QC,QD,QE,QF,QG,QHは、端子T11,T21に対して逆バイアスになるように並列接続されたボディダイオードDQA,DQB,DQC,DQD,DQE,DQF,DQG,DQHを含んで構成されている。1次側ブリッジ回路20は、各スイッチ素子QA,QB,QC,QDに並列接続されたキャパシタCA,CB,CC,CDを有している。2次側ブリッジ回路70は、各スイッチ素子QE,QF,QG,QHに並列接続されたキャパシタCE,CF,CG,CHを有している。
The switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H are composed of switch elements such as MOSFETs. Switching element Q A, Q B, Q C , Q D, Q E, Q F, Q G, Q H , the body diode D QA connected in parallel so as to be biased with respect to the terminal T 11, T 21 , D QB , D QC , D QD , D QE , D QF , D QG , D QH . Primary bridge circuit 20 includes the switching elements Q A, Q B, Q C , the capacitor C A connected in parallel to Q D, C B, C C , the C D. The secondary side bridge circuit 70 has capacitors C E , C F , C G , and C H connected in parallel to each switch element Q E , Q F , Q G , and Q H.
なお、スイッチ素子QA,QB,QC,QD,QE,QF,QG,QHは、例えば、RC-IGBTで構成されていてもよい。この場合、RC-IGBTに内蔵されているFRDが上述のボディダイオードの代わりとなる。スイッチ素子QA,QB,QC,QD,QE,QF,QG,QHは、例えば、ワイドギャップ半導体(SiC,GaN)を含むFETで構成されていてもよい。この場合、スイッチ素子QA,QB,QC,QD,QE,QF,QG,QHには、順方向電圧の高さによる効率の低下を防ぐ目的で、上述のボディダイオードの代わりとなる外付けのダイオードが並列に接続されていてもよい。
The switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H may be composed of, for example, an RC-IGBT. In this case, the FRD built in the RC-IGBT substitutes for the body diode described above. The switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H may be composed of, for example, FETs including a wide-gap semiconductor (SiC, GaN). In this case, the switch elements Q A , Q B , Q C , Q D , Q E , Q F , Q G , and Q H have the above-mentioned body diodes for the purpose of preventing the decrease in efficiency due to the high forward voltage. An external diode that replaces the above may be connected in parallel.
2つのスイッチ素子QA,QBは、接続点P1で互いに直列に接続されている。2つのスイッチ素子QC,QDは、接続点P2で互いに直列に接続されている。接続点P1と接続点P2は、1次側コイルNP、インダクタLRPおよびキャパシタCRPを直列に介して接続されている。
Two switching elements Q A, Q B are connected in series with one another at a connection point P 1. Two switching elements Q C, Q D are connected in series with one another at the connection point P 2. Connection point P 1 and the connection point P 2 is the primary coil N P, and the inductor L RP and capacitor C RP is connected via the series.
2つのスイッチ素子QH,QFは、接続点P3で互いに直列に接続されている。2つのスイッチ素子QG,QEは、接続点P4で互いに直列に接続されている。接続点P3と接続点P4は、2次側コイルNS、インダクタLRSおよびキャパシタCRSを直列に介して接続されている。
Two switching elements Q H, Q F is connected in series with each other at a connection point P 3. Two switching elements Q G, Q E are connected in series with one another at a connection point P 4. Connection point P 4 and the connection point P 3 is the secondary coil N S, and the inductor L RS and capacitor C RS is connected via the series.
1次側ドライバ40は、制御回路90によって生成された位相シフト制御を行う制御信号を、1次側ブリッジ回路20に含まれる4つのスイッチ素子QA,QB,QC,QDに出力する。具体的には、1次側ドライバ40は、制御回路90によって生成されたDutyが0.5以下の範囲においては、固定周波数且つ50%以内のパルス幅の信号をスイッチ素子QA,QBに対して出力し、スイッチ素子QA,QBに対してDutyによって決められる任意の位相をシフトさせた信号をスイッチ素子QC,QDに出力する。一方、1次側ドライバ40は、制御回路90によって生成されたDutyが0.5を超える範囲においては、スイッチ素子QA,QDとスイッチ素子QB,QCとを固定周波数且つ50%以内のパルス幅で交互にオン、オフする信号を出力する。
Primary driver 40 outputs a control signal for performing phase shift control, which is generated by the control circuit 90, the four switching elements Q A included in the primary bridge circuit 20, Q B, Q C, to Q D .. Specifically, the primary driver 40, in the Duty range of 0.5 or less generated by the control circuit 90, a signal of fixed frequency and 50% within the pulse width switching element Q A, the Q B outputs for outputs switching element Q a, a signal obtained by shifting an arbitrary phase that is determined by the Duty respect Q B switching element Q C, to Q D. On the other hand, the primary side driver 40 has a fixed frequency and within 50% of the switch elements Q A , Q D and the switch elements Q B , Q C in the range where the duty generated by the control circuit 90 exceeds 0.5. Outputs a signal that turns on and off alternately with the pulse width of.
2次側ドライバ80は、制御回路90によって生成されたPWM制御を行う制御信号を2次側ブリッジ回路70に含まれる2つのスイッチ素子QE,QFに出力する。具体的には、制御回路90によって生成されたDutyが0.5以下の範囲においては、2次側ドライバ80は、固定周波数且つDutyによって決められる50%以下のパルス幅の信号を2つのスイッチ素子QE,QFに出力する。一方、制御回路60によって生成されたDutyが0.5を超える範囲においては、2次側ドライバ80は、固定周波数で50%を超えるパルス幅の信号を2つのスイッチ素子QE,QFに出力する。ここで、2次側ブリッジ回路70を整流回路として動作させる場合、2つのスイッチ素子QG,QHへ制御信号を出力せず、2つのスイッチ素子QG,QHのボディダイオードもしくは外付けのダイオードを利用して整流を行う。
The secondary driver 80 outputs a control signal for PWM control generated by the control circuit 90 to the two switch elements Q E and Q F included in the secondary bridge circuit 70. Specifically, in the range where the Duty generated by the control circuit 90 is 0.5 or less, the secondary driver 80 outputs a signal having a fixed frequency and a pulse width of 50% or less determined by the Duty to two switch elements. Output to Q E and Q F. On the other hand, in the range where the Duty generated by the control circuit 60 exceeds 0.5, the secondary driver 80 outputs a signal having a pulse width exceeding 50% at a fixed frequency to the two switch elements Q E and Q F. do. Here, in the case of operating the secondary bridge circuit 70 as a rectifier circuit, two switch elements Q G, does not output the control signal to the Q H, two switching elements Q G, the body diode or external Q H Rectification is performed using a diode.
制御回路90は、DSPを用いて構成されており、1次側ドライバ40および2次側ドライバ80を介して、1次側ブリッジ回路20および2次側ブリッジ回路70のスイッチ素子を制御することにより、1次側から2次側の方向(カ行=充電モード)または2次側から1次側の方向(回生=放電モード)の電力変換を行う。つまり、制御回路90は、双方向の電力変換を行う。ここでは、1次側から2次側へ電力変換を行う場合について説明する。制御回路90は、出力電圧(2次側電圧VS)を検出し、この出力電圧(2次側電圧VS)が目標電圧値になるようにDutyを生成する。このとき生成されたDutyが50%以下の場合は、制御回路60は、1次側ドライバ40に対して出力する位相シフト制御信号を主として、DC-DCコンバータ1の出力電圧(2次側電圧VS)を制御する。例えば、生成されたDutyが小さい程、位相シフト量が小さくなり、低い出力電圧を得ることが出来る。一方、生成されたDutyが50%を超える場合は、制御回路60は、2次側ドライバ80に対して出力するPWM制御信号を主として、DC-DCコンバータ2の出力電圧(2次側電圧VS)を制御する。具体的には生成されたDutyが大きい程、2つのスイッチ素子QE,QFが同時オンする時間幅が大きくなり、この時、インダクタLRP,LRSに蓄えられるエネルギーが大きくなるため、高い出力電圧を得ることが出来る。
The control circuit 90 is configured by using a DSP, and controls the switch elements of the primary side bridge circuit 20 and the secondary side bridge circuit 70 via the primary side driver 40 and the secondary side driver 80. Power conversion is performed from the primary side to the secondary side (power row = charge mode) or from the secondary side to the primary side (regeneration = discharge mode). That is, the control circuit 90 performs bidirectional power conversion. Here, a case where power conversion is performed from the primary side to the secondary side will be described. The control circuit 90 detects the output voltage (secondary voltage V S), generates a Duty as the output voltage (secondary voltage V S) becomes the target voltage value. When the duty generated at this time is 50% or less, the control circuit 60 mainly uses the phase shift control signal output to the primary side driver 40 as the output voltage of the DC-DC converter 1 (secondary side voltage V). S ) is controlled. For example, the smaller the generated Duty, the smaller the phase shift amount, and a lower output voltage can be obtained. On the other hand, when the generated duty exceeds 50%, the control circuit 60 mainly uses the PWM control signal output to the secondary side driver 80 as the output voltage of the DC-DC converter 2 (secondary side voltage VS). ) Is controlled. Specifically the larger Duty generated, the two switching elements Q E, the time width Q F is turned on simultaneously increases, at this time, since the inductor L RP, the energy stored in L RS increases, higher The output voltage can be obtained.
図12は、DC-DCコンバータ2の駆動パルスのデューティ比と1次側共振回路を流れる電流のピーク値との関係の一例を表したものである。図12に示したように、DC-DCコンバータ2では、デューティ比と電流ピーク値とが正の相関関係を持っていない。そのため、トランスの偏磁を抑制するためにピーク電流制御を適用することが難しい。そこで、DC-DCコンバータ2は、1次側および2次側の共振回路に対して、キャパシタCRP,CRSを設けることで、キャパシタCRP,CRSがトランス10の偏磁を防ぐ役割を担っている。
FIG. 12 shows an example of the relationship between the duty ratio of the drive pulse of the DC-DC converter 2 and the peak value of the current flowing through the primary resonance circuit. As shown in FIG. 12, in the DC-DC converter 2, the duty ratio and the current peak value do not have a positive correlation. Therefore, it is difficult to apply peak current control in order to suppress the demagnetization of the transformer. Therefore, the DC-DC converter 2 is provided with capacitors C RP and C RS for the resonance circuits on the primary side and the secondary side, so that the capacitors C RP and C RS play a role of preventing demagnetization of the transformer 10. I am in charge.
図13は、DC-DCコンバータ2における1次側および2次側の共振回路の等価回路の一例を表したものである。DC-DCコンバータ2では、1次側の共振回路のインピーダンスZ1(fR)と、2次側の共振回路を1次側にトランス10の巻数比でインピーダンス変換した回路のインビーダンスZ2’(fR)とが以下の式(1),(2)に示したように0Ωになるように、1次側および2次側の共振回路の各定数が設計される。これにより、LRP=LRS’となるため、1次側インダクタLRPと2次側インダクタLRSはトランスの漏れインダクタンスを利用することもできる。
Z1(fR) =j(ωRLRP-1/(ωRCRP)) =0Ω…(1)
Z2’(fR)=j(ωRLRS’-1/(ωRCRS’))=0Ω…(2) FIG. 13 shows an example of an equivalent circuit of the resonance circuit on the primary side and the secondary side in the DC-DC converter 2. In the DC-DC converter 2, the impedance Z 1 of the resonant circuit of the primary side (f R) and, of the circuit impedance conversion by the turns ratio of the transformer 10 the resonant circuit of the secondary side to the primary side in Bee Dance Z 2 Each constant of the resonance circuit on the primary side and the secondary side is designed so that'(f R) becomes 0Ω as shown in the following equations (1) and (2). As a result, L RP = L RS ', so that the primary side inductor L RP and the secondary side inductor L RS can also utilize the leakage inductance of the transformer.
Z 1 (f R ) = j (ω R L RP -1 / (ω R C RP )) = 0 Ω ... (1)
Z 2 '(f R) = j (ω R L RS' -1 / (ω R C RS ')) = 0Ω ... (2)
Z1(fR) =j(ωRLRP-1/(ωRCRP)) =0Ω…(1)
Z2’(fR)=j(ωRLRS’-1/(ωRCRS’))=0Ω…(2) FIG. 13 shows an example of an equivalent circuit of the resonance circuit on the primary side and the secondary side in the DC-
Z 1 (f R ) = j (ω R L RP -1 / (ω R C RP )) = 0 Ω ... (1)
Z 2 '(f R) = j (ω R L RS' -1 / (ω R C RS ')) = 0Ω ... (2)
図14は、DC-DCコンバータ2の充電モード時における共振周波数fRと出力電圧(2次側電圧VS)との関係の一例を表したものである。図15は、DC-DCコンバータ2の放電モード時における共振周波数fRと出力電圧(1次側電圧VP)との関係の一例を表す図である。なお、図15において、Vp(std)は、Dutyが0.5のときに出力される基準出力電圧である。DC-DCコンバータ2において、インピーダンスZ1(fR),Z2’(fR)が上記の式(1),(2)に示したように0Ωになるように、1次側および2次側の共振回路の各定数が設計された場合、DC-DCコンバータ2の充電モード時と放電モード時とで、共振周波数fRと出力電圧との関係が一致することがわかる。
Figure 14 illustrates an example of the relationship between the resonant frequency f R and the output voltage (secondary voltage V S) at the time of the charging mode of the DC-DC converter 2. Figure 15 is a diagram showing an example of the relationship between the resonance frequency f R and the output voltage (primary voltage V P) in the discharge mode of the DC-DC converter 2. In FIG. 15, Vp (std) is a reference output voltage output when the Duty is 0.5. In the DC-DC converter 2, the primary side and the secondary side and the secondary side so that the impedances Z 1 (f R ) and Z 2 '(f R ) become 0 Ω as shown in the above equations (1) and (2). If the constants of the resonance circuit side is designed, in charge mode of the DC-DC converter 2 and the discharge mode, it can be seen that the relationship between the output voltage resonance frequency f R are identical.
[動作]
次に、DC-DCコンバータ2の動作について説明する。なお、DC-DCコンバータ2における降圧モード(Duty≦0.5)時の駆動パルス波形の一例は、図3に示した波形(DC-DCコンバータ1における降圧モード(Duty≦0.5)時の駆動パルス波形の一例)と共通である。また、DC-DCコンバータ2における昇圧モード(Duty>0.5)時の駆動パルス波形の一例は、図6に示した波形(DC-DCコンバータ1における昇圧モード(Duty>0.5)時の駆動パルス波形の一例)と共通である。 [motion]
Next, the operation of the DC-DC converter 2 will be described. An example of the drive pulse waveform in the step-down mode (Duty ≦ 0.5) in the DC-DC converter 2 is the waveform shown in FIG. 3 (Duty ≦ 0.5 in the DC-DC converter 1). It is common with an example of the drive pulse waveform). Further, an example of the drive pulse waveform in the boost mode (Duty> 0.5) in the DC-DC converter 2 is the waveform shown in FIG. 6 (Duty> 0.5 in the DC-DC converter 1). It is common with an example of the drive pulse waveform).
次に、DC-DCコンバータ2の動作について説明する。なお、DC-DCコンバータ2における降圧モード(Duty≦0.5)時の駆動パルス波形の一例は、図3に示した波形(DC-DCコンバータ1における降圧モード(Duty≦0.5)時の駆動パルス波形の一例)と共通である。また、DC-DCコンバータ2における昇圧モード(Duty>0.5)時の駆動パルス波形の一例は、図6に示した波形(DC-DCコンバータ1における昇圧モード(Duty>0.5)時の駆動パルス波形の一例)と共通である。 [motion]
Next, the operation of the DC-
図16は、図3の期間T1(伝送モード)におけるDC-DCコンバータ2の駆動の一例を表したものである。図17は、図3の期間T2(還流モード)におけるDC-DCコンバータ2の駆動の一例を表したものである。図16、図17では、端子T11,T12にキャパシタCPが接続されるとともに、直流電源の一例としてバッテリBT1が接続された電源システムが例示されている。さらに、図16、図17では、端子T21,T22にキャパシタCSが接続されるとともに、直流負荷装置の一例としてバッテリBT2が接続された電源システムが例示されている。本実施の形態では、バッテリBT1,BT2は、ともに、2次電池を想定している。
FIG. 16 shows an example of driving the DC-DC converter 2 in the period T1 (transmission mode) of FIG. FIG. 17 shows an example of driving the DC-DC converter 2 in the period T2 (reflux mode) of FIG. 16, 17, together with the capacitor C P is connected to the terminal T 11, T 12, a power supply system battery BT1 is connected as an example of the DC power supply is illustrated. Further, FIG. 16, 17, together with the capacitor C S is connected to the terminal T 21, T 22, a power supply system battery BT2 is connected as an example of a DC load device is illustrated. In the present embodiment, both the batteries BT1 and BT2 are assumed to be secondary batteries.
制御回路90は、例えば、伝送モードの期間の長さと、還流モードの期間の長さとの割合を制御することにより、降圧動作を行う。制御回路90は、例えば、図3、図16に示したように、スイッチ素子QA,QD,QEをオンさせるとともに、スイッチ素子QB,QC,QFをオフさせる。これにより、例えば、図16に示したように、1次側から2次側に電力を伝送する期間(伝送モード)が生成される。また、制御回路90は、例えば、図3、図17に示したように、スイッチ素子QAをオンさせたまま、スイッチ素子QD,QEをオフさせた後に、スイッチ素子QCをオンさせる。すると、例えば、図17に示したように、1次側および2次側のそれぞれにおいて、還流電流が流れ、還流モードとなる。
The control circuit 90 performs a step-down operation by, for example, controlling the ratio between the length of the transmission mode period and the length of the reflux mode period. For example, as shown in FIGS. 3 and 16, the control circuit 90 turns on the switch elements Q A , Q D , and Q E, and turns off the switch elements Q B , Q C , and Q F. As a result, for example, as shown in FIG. 16, a period (transmission mode) for transmitting electric power from the primary side to the secondary side is generated. Further, the control circuit 90, for example, FIG. 3, as shown in FIG. 17, while to turn on the switching elements Q A, switching element Q D, after turning off the Q E, to turn on the switching element Q C .. Then, for example, as shown in FIG. 17, a reflux current flows on each of the primary side and the secondary side, and the reflux mode is set.
図18は、図6の期間T3(蓄積モード)におけるDC-DCコンバータ2の駆動の一例を表したものである。図19は、図6の期間T4(放出モード)におけるDC-DCコンバータ2の駆動の一例を表したものである。図18、図19では、端子T11,T12にキャパシタCPが接続されるとともに、直流電源の一例としてバッテリBT1が接続されている。さらに、図18、図19では、端子T21,T22にキャパシタCSが接続されるとともに、直流負荷装置の一例としてバッテリBT2が接続されている。本実施の形態では、バッテリBT1,BT2は、ともに、2次電池を想定している。
FIG. 18 shows an example of driving the DC-DC converter 2 in the period T3 (storage mode) of FIG. FIG. 19 shows an example of driving the DC-DC converter 2 in the period T4 (emission mode) of FIG. 18, 19, together with the capacitor C P is connected to the terminal T 11, T 12, battery BT1 is connected as an example of the DC power supply. Further, FIG. 18, 19, together with the capacitor C S is connected to the terminal T 21, T 22, the battery BT2 is connected as an example of a DC load. In the present embodiment, both the batteries BT1 and BT2 are assumed to be secondary batteries.
制御回路90は、例えば、蓄積モードの期間の長さと、放出モードの期間の長さとの割合を制御することにより、昇圧動作を行う。制御回路90は、例えば、図6、図18に示したように、蓄積モードでは、スイッチ素子QA,QD,QE,QFをオンさせるとともに、スイッチ素子QB,QCをオフさせる。これにより、例えば、図18に示したように、インダクタLRP,LRSにエネルギーを蓄積させる(蓄積モード)期間として動作する。また、制御回路60は、例えば、図6、図19に示したように、スイッチ素子QA,QD,QEをオンさせたまま、スイッチ素子QFをオフさせる。すると、例えば、図19に示したように、インダクタLRPに蓄積されたエネルギーが放出する(放出モード)期間として動作する。
The control circuit 90 performs a boosting operation by, for example, controlling the ratio between the length of the period of the storage mode and the length of the period of the emission mode. For example, as shown in FIGS. 6 and 18, the control circuit 90 turns on the switch elements Q A , Q D , Q E , and Q F and turns off the switch elements Q B , Q C in the storage mode. .. As a result, for example, as shown in FIG. 18, it operates as a period for storing energy in the inductors L RP and L RS (storage mode). Further, as shown in FIGS. 6 and 19, for example, the control circuit 60 turns off the switch element Q F while keeping the switch elements Q A , Q D , and Q E on. Then, for example, as shown in FIG. 19, it operates as a period during which the energy stored in the inductor L RP is released (release mode).
[効果]
次に、本実施の形態に係るDC-DCコンバータ2の効果について説明する。 [effect]
Next, the effect of the DC-DC converter 2 according to the present embodiment will be described.
次に、本実施の形態に係るDC-DCコンバータ2の効果について説明する。 [effect]
Next, the effect of the DC-
本実施の形態では、DC-DCコンバータ2の出力電圧範囲における高い出力電圧領域および低い出力電圧領域において、1次側ブリッジ回路20および2次側ブリッジ回路70のスイッチ素子を互いに異なる制御方法で駆動することにより、双方向の電力変換が行われる。これにより、例えば、1次側ブリッジ回路のみにPFM制御を適用して出力電圧を制御(例えば、図9参照)する場合、あるいは2次側ブリッジ回路のみにPWM制御を適用して出力電圧を制御(例えば、図10参照)する場合(以下、「比較例に係る制御方法」と称する。)と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ2の体積を小さくすることができる。
In the present embodiment, the switch elements of the primary side bridge circuit 20 and the secondary side bridge circuit 70 are driven by different control methods in the high output voltage region and the low output voltage region in the output voltage range of the DC-DC converter 2. By doing so, bidirectional power conversion is performed. Thereby, for example, when PFM control is applied only to the primary side bridge circuit to control the output voltage (for example, see FIG. 9), or PWM control is applied only to the secondary side bridge circuit to control the output voltage. (e.g., see FIG. 10) can be the case of (hereinafter referred to as "control method according to a comparative example.") and compared, reduce the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 2 can be reduced.
また、本実施の形態では、DC-DCコンバータ2の出力電圧範囲における高い出力電圧領域において、2次側ブリッジ回路70に対するPWM制御が主制御として行われ、DC-DCコンバータ2の出力電圧範囲における低い出力電圧領域において、1次側ブリッジ回路20に対して位相シフト制御が主制御として行われる。これにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ2の体積を小さくすることができる。
Further, in the present embodiment, in the high output voltage region in the output voltage range of the DC-DC converter 2, PWM control for the secondary bridge circuit 70 is performed as the main control, and in the output voltage range of the DC-DC converter 2. In the low output voltage region, phase shift control is performed as the main control for the primary bridge circuit 20. Thus, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 2 can be reduced.
また、本実施の形態では、トランス10の巻数比に応じて決定される基準出力電圧(VS(std))がDC-DCコンバータ2の出力電圧範囲の中心になるように設定する。これにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ2の体積を小さくすることができる。
Further, in the present embodiment, the reference output voltage (VS (std) ) determined according to the turns ratio of the transformer 10 is set to be the center of the output voltage range of the DC-DC converter 2. Thus, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 2 can be reduced.
また、本実施の形態では、Dutyが0.5を超える動作領域において、2次側ブリッジ回路70に対するPWM制御が主制御として行われ、Dutyが0.5以下の動作領域において、1次側ブリッジ回路20に対する位相シフト制御が主制御として行われる。これにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ2の体積を小さくすることができる。
Further, in the present embodiment, the PWM control for the secondary side bridge circuit 70 is performed as the main control in the operating region where the Duty exceeds 0.5, and the primary side bridge is performed in the operating region where the Duty is 0.5 or less. The phase shift control for the circuit 20 is performed as the main control. Thus, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 2 can be reduced.
また、本実施の形態では、2次側のLC共振回路を1次側に換算することによって得られる共振回路の共振周波数fRよりも大きな値の固定の駆動周波数fSWで、1次側ブリッジ回路20および2次側ブリッジ回路70のスイッチ素子が制御される。これにより、Duty=0.5においてDC-DCコンバータ2に流れる回路電流は連続モードとなる。この結果、回路電流が小さくなるので、不連続モードのときと比べて、充電効率が高くなる。
Further, in the present embodiment, the primary side bridge has a fixed drive frequency f SW having a value larger than the resonance frequency f R of the resonance circuit obtained by converting the LC resonance circuit on the secondary side to the primary side. The switch elements of the circuit 20 and the secondary bridge circuit 70 are controlled. As a result, the circuit current flowing through the DC-DC converter 2 at Duty = 0.5 is in continuous mode. As a result, the circuit current becomes small, so that the charging efficiency becomes higher than in the discontinuous mode.
また、本実施の形態では、トランス10の1次側の共振回路のインピーダンスZ1(fR)、およびトランス10の2次側の共振回路を1次側にインピーダンス変換した回路のインピーダンスZ2’(fR)が上述の式(1),(2)に示したように0Ωになるように、1次側および2次側の共振回路の各定数が設計される。これにより、DC-DCコンバータ2の充電モード時と放電モード時とで、共振周波数fRと出力電圧(2次側電圧VS)との関係を一致させることができる。また、図13においてLRP=LRS’となるため、1次側インダクタLRPと2次側インダクタLRSはトランスの漏れインダクタンスを利用することもできる。
Further, in the present embodiment, the impedance Z 1 of the resonant circuit on the primary side of the transformer 10 (f R), and the impedance Z 2 of the circuit the resonant circuit on the secondary side and impedance conversion on the primary side of the transformer 10 ' Each constant of the resonance circuit on the primary side and the secondary side is designed so that (f R) becomes 0Ω as shown in the above equations (1) and (2). Thus, in charge mode of the DC-DC converter 2 and the discharge mode, it is possible to match the relationship between the resonant frequency f R and the output voltage (secondary voltage V S). Further, since L RP = L RS'in FIG. 13, the primary side inductor L RP and the secondary side inductor L RS can also utilize the leakage inductance of the transformer.
また、本実施の形態では、1次側ブリッジ回路20が、制御回路90によってオン・オフ制御される複数のスイッチ素子QA,QB,QC,QDを含んで構成されたフルブリッジ型の回路となっている。さらに、2次側ブリッジ回路70も、制御回路90によってオン・オフ制御される複数のスイッチ素子QE,QF,QG,QHを含んで構成されたフルブリッジ型の回路となっている。これにより、上述のスイッチ素子の制御を行うことにより、比較例に係る制御方法と比べて、共振インダクタLRに蓄えるエネルギー量を減らすことができる。その結果、磁気部品を小型化することができる。従って、DC-DCコンバータ2の体積を小さくすることができる。
Further, in this embodiment, the primary bridge circuit 20, a plurality of switching elements Q A is on-off controlled by the control circuit 90, Q B, Q C, full-bridge, which is configured to include a Q D It is a circuit of. Further, the secondary side bridge circuit 70 is also a full bridge type circuit composed of a plurality of switch elements Q E , Q F , Q G , and Q H controlled on / off by the control circuit 90. .. Thus, by controlling the above switching element, as compared with the control method of the comparative example, reducing the amount of energy stores in resonant inductor L R. As a result, the magnetic component can be miniaturized. Therefore, the volume of the DC-DC converter 2 can be reduced.
また、本実施の形態では、図12に示したように、デューティ比と1次側共振回路電流IRPのピーク値とが正の相関関係を持っていない。そのため、トランスの偏磁を抑制するためにピーク電流制御を適用することが難しい。そこで、DC-DCコンバータ2は、1次側および2次側の共振回路に対して、キャパシタCRP,CRSを設けることで、キャパシタCRP,CRSがトランス10の偏磁を防ぐ役割を担っている。
Further, in the present embodiment, as shown in FIG. 12, the duty ratio and the peak value of the primary resonance circuit current IRP do not have a positive correlation. Therefore, it is difficult to apply peak current control in order to suppress the demagnetization of the transformer. Therefore, the DC-DC converter 2 is provided with capacitors C RP and C RS for the resonance circuits on the primary side and the secondary side, so that the capacitors C RP and C RS play a role of preventing demagnetization of the transformer 10. I am in charge.
上記第2の実施の形態において、スイッチ素子QG,QHを駆動する場合について考える。スイッチ素子QG,QHに求められるパルス幅の要求は同じであるため、ここでは、スイッチ素子QHの駆動に焦点を当てて説明する。Duty≦0.5(位相シフトモード)においては、制御回路90は、例えば、図20、図21に示したように、Dutyが大きくなるにつれて、整流回路に電流が流れている期間が長くなるため、スイッチ素子QHに印加する駆動パルスの幅(オン幅)も大きくする必要がある。しかし、Duty>0.5(昇圧PWMモード)においては、Dutyが大きくなるにつれて、図22の実線で示した通り、スイッチ素子QHに印加する駆動パルスの幅(オン幅)を小さくする必要がある。スイッチ素子QHの駆動パルスの立ち上がり時(オンタイミング)に着目すると、スイッチ素子QHの駆動パルスの立ち上がり位置を右にシフトしない場合(オンタイミングを遅らせなかった場合)では、破線で示す通りスイッチ素子QFのオンと重なり、キャパシタCSが短絡してしまう。また、スイッチ素子QHの駆動パルスの立ち下がり時(オフタイミング)に着目すると、例えばスイッチ素子QHの立ち下がり位置を左にシフトしない場合(オフタイミングを早めなかった場合)では、スイッチ素子QEのオンと重なってしまうため、図23に示したように、キャパシタCPへ電流が逆流し、損失が発生してしまう。そこで、このようなキャパシタCSの短絡や、キャパシタCPへの電流の逆流を防ぐための方策について説明する。
In the second embodiment, consider the case of driving the switching element Q G, Q H. Since the pulse width requirements required for the switch elements Q G and Q H are the same, the description here focuses on the drive of the switch elements Q H. In the Duty ≦ 0.5 (phase shift mode), for example, as shown in FIGS. 20 and 21, the control circuit 90 increases the period in which the current flows through the rectifier circuit as the Duty increases. , the width of the driving pulse to be applied to the switching element Q H (oN width) must also be increased. However, in the Duty> 0.5 (boost PWM mode), as Duty increases, as shown by the solid line in FIG. 22, is necessary to reduce the width of the drive pulse applied to the switching element Q H (ON width) be. Focusing on the rising edge of the drive pulse of the switching element Q H (ON timing), the case of not shifting the rising position of the driving pulses of the switching element Q H to the right (when not delayed on-timing), as indicated by the broken line switches It overlaps with the on of the element Q F , and the capacitor CS is short-circuited. Mata, in the falling edge of the drive pulse switching element Q H Focusing on (off timing), for example, the falling position of the switch element Q H (Not found advancing the off timing) When not shifted to the left, the switch element Q since overlaps the on the E, as shown in FIG. 23, current is flowing back to the capacitor C P, loss occurs. Therefore, a short circuit and such a capacitor C S, the measures to prevent the reverse flow of current to the capacitor C P is described.
<3.第3の実施の形態>
[構成]
図24は、本発明の第3の実施の形態に係るDC-DCコンバータ3の回路図を表したものである。DC-DCコンバータ3は、1次側の共振回路として、1つのインダクタLRPと、1つのキャパシタCRPとを備えるとともに、2次側の共振回路として、1つのインダクタLRSと、1つのキャパシタCRSとを備えている。DC-DCコンバータ3は、これらのインダクタLRP,LRSおよびキャパシタCRP,CRSによる共振を利用したCLLC方式のDC-DCコンバータである。DC-DCコンバータ3は、トランス10、1次側ブリッジ回路20、2次側ブリッジ回路70、1次側ドライバ40、2次側ドライバ80、電流センサSP,SSおよび制御回路100を備えている。 <3. Third Embodiment>
[composition]
FIG. 24 shows a circuit diagram of the DC-DC converter 3 according to the third embodiment of the present invention. The DC-DC converter 3 includes one inductor L RP and one capacitor C RP as the resonance circuit on the primary side, and one inductor L RS and one capacitor as the resonance circuit on the secondary side. It is equipped with C RS. The DC-DC converter 3 is a CLLC type DC-DC converter that utilizes resonance caused by these inductors L RP and L RS and capacitors C RP and C RS. DC-DC converter 3 comprises atransformer 10, 1-side bridge circuit 20, a secondary- side bridge circuit 70,1 primary driver 40 and a secondary-side driver 80, the current sensor S P, S S and the control circuit 100 There is.
[構成]
図24は、本発明の第3の実施の形態に係るDC-DCコンバータ3の回路図を表したものである。DC-DCコンバータ3は、1次側の共振回路として、1つのインダクタLRPと、1つのキャパシタCRPとを備えるとともに、2次側の共振回路として、1つのインダクタLRSと、1つのキャパシタCRSとを備えている。DC-DCコンバータ3は、これらのインダクタLRP,LRSおよびキャパシタCRP,CRSによる共振を利用したCLLC方式のDC-DCコンバータである。DC-DCコンバータ3は、トランス10、1次側ブリッジ回路20、2次側ブリッジ回路70、1次側ドライバ40、2次側ドライバ80、電流センサSP,SSおよび制御回路100を備えている。 <3. Third Embodiment>
[composition]
FIG. 24 shows a circuit diagram of the DC-DC converter 3 according to the third embodiment of the present invention. The DC-DC converter 3 includes one inductor L RP and one capacitor C RP as the resonance circuit on the primary side, and one inductor L RS and one capacitor as the resonance circuit on the secondary side. It is equipped with C RS. The DC-DC converter 3 is a CLLC type DC-DC converter that utilizes resonance caused by these inductors L RP and L RS and capacitors C RP and C RS. DC-DC converter 3 comprises a
1次側の電流センサSPは、1次側ブリッジ回路20のハイサイドを流れる回路電流IPを検出し、検出した回路電流IPに対応する検出値を制御回路100に出力する。2次側の電流センサSSは、2次側ブリッジ回路70のハイサイドを流れる回路電流ISを検出し、検出した回路電流ISに対応する検出値を制御回路100に出力する。制御回路100は、1次側の電流センサSPおよび2次側の電流センサSSから得られた検出値(IP,IS)と、制御回路100の内部で生成した制御信号とに基づいて、2次側ブリッジ回路70のハイサイド側のスイッチ素子に対して同期整流信号を出力する。
Current sensor S P output primary side detects the circuit current I P flowing through the high side of the primary bridge circuit 20, and outputs a detection value corresponding to the detected circuit current I P to the control circuit 100. Current sensor S S of the secondary side detects the circuit current I S flowing through the high side of the secondary bridge circuit 70, and outputs a detection value corresponding to the detected circuit current I S to the control circuit 100. Control circuit 100, based on the primary side of the current sensor S P and the secondary side of the current sensor S detected values obtained from the S (I P, I S) with a control signal generated within the control circuit 100 Then, a synchronous rectification signal is output to the switch element on the high side of the secondary side bridge circuit 70.
図25は、制御回路100に組み込まれている、充電時において、整流側ブリッジのハイサイド側のスイッチ素子に出力される同期整流パルス生成回路101の回路構成の一例を表したものである。同期整流パルス生成回路101は、例えば、コンパレータと、2つのAND回路とを含んで構成されている。コンパレータは、2次側ブリッジ回路70の回路電流ISを検出する。AND回路は、制御回路100で生成した制御信号とコンパレータの出力信号の合成を行う。これにより、2次側ブリッジのハイサイド側のスイッチ素子を同期整流しつつ、キャパシタCSの短絡や、キャパシタCPへの電流の逆流が防止される。
FIG. 25 shows an example of the circuit configuration of the synchronous rectification pulse generation circuit 101, which is incorporated in the control circuit 100 and is output to the switch element on the high side side of the rectification side bridge during charging. The synchronous rectification pulse generation circuit 101 includes, for example, a comparator and two AND circuits. Comparator detects the circuit current I S of the secondary bridge circuit 70. The AND circuit synthesizes the control signal generated by the control circuit 100 and the output signal of the comparator. Thus, while synchronously rectifying the high-side switching element on the secondary side bridge, short circuit and the capacitor C S, backflow of current to the capacitor C P is prevented.
例として充電動作時における整流側ブリッジのハイサイド側のスイッチ素子の同期整流信号の生成方法について説明する。図25において、一方のAND回路はトランス10に負の電圧が印加されている時にスイッチ素子QGにゲートパルスを出力し、他方のAND回路はトランス10に正の電圧が印加されている時にスイッチ素子QHにゲートパルスを出力するという点以外、制御信号の生成方法は共通であるため、スイッチ素子QHのゲートに接続されたAND回路に焦点を当てて説明を行う。コンパレータには、検出値(IS)と、電流閾値(ITH)が入力され、コンパレータからは、検出値(IS)と電流閾値(ITH)との比較結果がCOMP信号として出力される。AND回路には、(1)スイッチ素子QAへ入力される制御信号、(2)スイッチ素子QDへ入力される制御信号、(3)COMP信号、(4)スイッチ素子QFへ入力される制御信号と、スイッチ素子QF,QH間の短絡防止用として設けたデッドタイムTFHとを加算した信号の反転信号(INV(QF+TFH))の合計4種類の信号が入力され、AND回路の出力信号がスイッチ素子QHへ出力される。ここで、スイッチ素子QA,QDはトランス10に印加される電圧の極性を判別するために用いられており、COMP信号はスイッチ素子に電流が流れている区間を検出するために用いられており、信号(INV(QF+TFH))は上下アームの短絡を防止する目的で用いられている。
As an example, a method of generating a synchronous rectified signal of the switch element on the high side side of the rectified side bridge during the charging operation will be described. In Figure 25, switch when one of the AND circuit outputs a gate pulse to the switch element Q G when a negative voltage is applied to the transformer 10, the other AND circuits which positive voltage is applied to the transformer 10 except that outputs a gate pulse to the element Q H, for the method of generating the control signal are common, the description will focus on aND circuit connected to the gate of the switching element Q H. The detection value ( IS ) and the current threshold value ( ITH ) are input to the comparator, and the comparison result between the detection value (IS ) and the current threshold value ( ITH ) is output from the comparator as a COMP signal. .. In the AND circuit, (1) a control signal input to the switch element Q A , (2) a control signal input to the switch element Q D , (3) a COMP signal, and (4) input to the switch element Q F. a control signal, the switch element Q F, a total of four types of signals of the inverted signal of the dead time T FH and the sum signal provided as a short circuit prevention between the Q H (INV (Q F + T FH)) is input, the output signal of the aND circuit is output to the switch element Q H. Here, the switch elements Q A and Q D are used to determine the polarity of the voltage applied to the transformer 10, and the COMP signal is used to detect the section in which the current is flowing in the switch element. The signal (INV (Q F + TFH )) is used for the purpose of preventing a short circuit between the upper and lower arms.
図26は、Duty≦0.5(降圧モード)における駆動パルス波形の一例を表したものである。図27は、Duty>0.5(昇圧モード)における駆動パルス波形の一例を表したものである。なお、図26、図27の波形計測において、端子T11,T12にキャパシタCPが接続されるとともに、直流電源の一例としてバッテリBT1が接続されている。さらに、図26、図27の波形計測において、端子T21,T22にキャパシタCSが接続されるとともに、直流負荷装置の一例としてバッテリBT2が接続されている。このとき、バッテリBT1,BT2は、ともに、2次電池を想定している。
FIG. 26 shows an example of the drive pulse waveform in Duty ≦ 0.5 (step-down mode). FIG. 27 shows an example of the drive pulse waveform when Duty> 0.5 (boost mode). Incidentally, FIG. 26, the waveform measurement of FIG. 27, with the capacitor C P is connected to the terminal T 11, T 12, battery BT1 is connected as an example of the DC power supply. Further, FIG. 26, the waveform measurement of FIG. 27, with the capacitor C S is connected to the terminal T 21, T 22, the battery BT2 is connected as an example of a DC load. At this time, both the batteries BT1 and BT2 are assumed to be secondary batteries.
充電動作時において、同期整流パルス生成回路101は、制御回路100による制御に従って、2次側ブリッジ回路70のハイサイド側のスイッチ素子に対して同期整流信号を出力する。同期整流パルス生成回路101は、例えば、図26の期間T1(Duty≦0.5(降圧モード))において、スイッチ素子QHに対して、スイッチ素子QHをオンする制御信号を2次側ブリッジ回路70に出力する。このとき、同期整流パルス生成回路101は、Dutyが大きくなると、スイッチ素子QHをオンする制御信号のパルス幅(オン幅)を広くする。同期整流パルス生成回路101は、例えば、図27の期間T1(Duty>0.5(昇圧モード))において、スイッチ素子QHに対して、スイッチ素子QHをオンする制御信号を2次側ブリッジ回路70に出力する。このとき、同期整流パルス生成回路101は、Dutyが大きくなると、スイッチ素子QHをオンする制御信号のパルス幅(オン幅)を狭くする。
During the charging operation, the synchronous rectification pulse generation circuit 101 outputs a synchronous rectification signal to the switch element on the high side side of the secondary side bridge circuit 70 according to the control by the control circuit 100. Synchronous pulse generator 101 is, for example, in the period of FIG. 26 T1 (Duty ≦ 0.5 (Buck Mode)), the switch element Q H, 2-side bridge control signal for turning on the switching element Q H Output to the circuit 70. At this time, synchronous rectification pulse generating circuit 101, the Duty is increased, to increase the pulse width of the control signal for turning on the switching element Q H (ON width). Synchronous pulse generator 101 is, for example, in the period of FIG. 27 T1 (Duty> 0.5 (boost mode)), the switch element Q H, 2-side bridge control signal for turning on the switching element Q H Output to the circuit 70. At this time, synchronous rectification pulse generating circuit 101, the Duty is increased, narrowing the pulse width of the control signal for turning on the switching element Q H (ON width).
[効果]
本実施の形態では、1次側ブリッジ回路20のハイサイドを流れる回路電流IPを検出する電流センサSPと、2次側ブリッジ回路70のハイサイドを流れる回路電流ISを検出する電流センサSSとが設けられている。これらの電流センサSP,SSで検出された回路電流IP,ISに基づいて、2次側ブリッジ回路70の同期整流が行われる。これにより、例えば、Dutyが0.5よりも大きくなったときに、スイッチ素子QH,QGをオンする制御信号のパルス幅(オン幅)を狭くすることにより、キャパシタCSの短絡や、キャパシタCPへの電流の逆流を防止することができる。また、例えば、Dutyが0.5以下の場合、電流が流れている期間に応じてスイッチ素子QH,QGをオンする制御信号のパルス幅(オン幅)を広くすることにより、キャパシタCPへの電流の逆流を防止して効率を改善ことができる。 [effect]
In this embodiment, a current sensor for detecting a current sensor S P for detecting the circuit current I P flowing through the high side of theprimary bridge circuit 20, the circuit current I S flowing through the high side of the secondary bridge circuit 70 and the S S are provided. These current sensors S P, S circuit current detected by the S I P, based on the I S, synchronous rectification on the secondary side bridge circuit 70 is performed. Thus, for example, when the Duty is greater than 0.5, the switch element Q H, by narrowing the pulse width of the control signal for turning on the Q G (ON width), short circuit and the capacitor C S, it is possible to prevent the reverse flow of current to the capacitor C P. For example, when Duty is 0.5 or less, by widening the switching element Q H, pulse width of the control signal for turning on the Q G (ON width) depending on the period in which current is flowing, the capacitor C P Efficiency can be improved by preventing backflow of current to.
本実施の形態では、1次側ブリッジ回路20のハイサイドを流れる回路電流IPを検出する電流センサSPと、2次側ブリッジ回路70のハイサイドを流れる回路電流ISを検出する電流センサSSとが設けられている。これらの電流センサSP,SSで検出された回路電流IP,ISに基づいて、2次側ブリッジ回路70の同期整流が行われる。これにより、例えば、Dutyが0.5よりも大きくなったときに、スイッチ素子QH,QGをオンする制御信号のパルス幅(オン幅)を狭くすることにより、キャパシタCSの短絡や、キャパシタCPへの電流の逆流を防止することができる。また、例えば、Dutyが0.5以下の場合、電流が流れている期間に応じてスイッチ素子QH,QGをオンする制御信号のパルス幅(オン幅)を広くすることにより、キャパシタCPへの電流の逆流を防止して効率を改善ことができる。 [effect]
In this embodiment, a current sensor for detecting a current sensor S P for detecting the circuit current I P flowing through the high side of the
以上、複数の実施の形態を挙げて本開示を説明したが、本開示は上記各実施の形態に限定されるものではなく、種々変形が可能である。上記各実施の形態では、Duty≦0.5の時に1次側ブリッジの制御は位相シフトによってDutyを可変制御する例を記載したが、Dmax=0.5のPWM制御であってもよい。なお、本明細書中に記載された効果は、あくまで例示である。本開示の効果は、本明細書中に記載された効果に限定されるものではない。本開示が、本明細書中に記載された効果以外の効果を持っていてもよい。
Although the present disclosure has been described above with reference to a plurality of embodiments, the present disclosure is not limited to each of the above embodiments and can be modified in various ways. In each of the above embodiments, an example is described in which the primary bridge is variably controlled by phase shift when Duty ≦ 0.5, but PWM control with Dmax = 0.5 may be used. The effects described in this specification are merely examples. The effects of the present disclosure are not limited to the effects described herein. The present disclosure may have effects other than those described herein.
Although the present disclosure has been described above with reference to a plurality of embodiments, the present disclosure is not limited to each of the above embodiments and can be modified in various ways. In each of the above embodiments, an example is described in which the primary bridge is variably controlled by phase shift when Duty ≦ 0.5, but PWM control with Dmax = 0.5 may be used. The effects described in this specification are merely examples. The effects of the present disclosure are not limited to the effects described herein. The present disclosure may have effects other than those described herein.
Claims (11)
- トランスと、
前記トランスの1次側に設けられた1次側ブリッジ回路と、
前記トランスの2次側に設けられた2次側ブリッジ回路と、
前記トランスの1次側および2次側のうち少なくとも一方の側に設けられた共振回路と、
出力電圧範囲によって、前記1次側ブリッジ回路および前記2次側ブリッジ回路のスイッチ素子を互いに異なる制御方法で駆動することにより、一方向または双方向の電力変換を可能にする制御回路と
を備えた
電源装置。 With a transformer
The primary side bridge circuit provided on the primary side of the transformer and
The secondary side bridge circuit provided on the secondary side of the transformer and
A resonance circuit provided on at least one of the primary side and the secondary side of the transformer, and
It is provided with a control circuit that enables unidirectional or bidirectional power conversion by driving the switch elements of the primary side bridge circuit and the secondary side bridge circuit by different control methods depending on the output voltage range. Power supply. - 前記制御回路は、前記出力電圧範囲における高い出力電圧領域において、前記2次側ブリッジ回路に対するPWM制御を主制御として出力電圧の制御を行い、前記出力電圧範囲における低い出力電圧領域において、前記1次側ブリッジ回路に対する位相シフト制御を主制御として出力電圧の制御を行う
請求項1に記載の電源装置。 The control circuit controls the output voltage in the high output voltage region in the output voltage range with the PWM control for the secondary bridge circuit as the main control, and in the low output voltage region in the output voltage range, the primary control circuit controls the output voltage. The power supply device according to claim 1, wherein the output voltage is controlled with the phase shift control for the side bridge circuit as the main control. - 前記トランスの巻数比に応じて決定される基準出力電圧が出力電圧範囲の中心に設定される
請求項1に記載の電源装置。 The power supply device according to claim 1, wherein the reference output voltage determined according to the turns ratio of the transformer is set at the center of the output voltage range. - 前記制御回路は、Dutyが0.5を超える動作領域において、前記2次側ブリッジ回路に対するPWM制御を主制御として行い、Dutyが0.5以下の動作領域において、前記1次側ブリッジ回路に対する位相シフト制御を主制御として行う
請求項1に記載の電源装置。 The control circuit performs PWM control for the secondary bridge circuit as the main control in an operating region where the Duty exceeds 0.5, and in an operating region where the Duty is 0.5 or less, the phase with respect to the primary bridge circuit is performed. The power supply device according to claim 1, wherein shift control is performed as main control. - 前記制御回路は、2次側のLC共振回路を1次側に換算することによって得られる前記共振回路の共振周波数よりも大きな値の固定の駆動周波数で前記スイッチ素子を制御する
請求項1に記載の電源装置。 The first aspect of claim 1, wherein the control circuit controls the switch element with a fixed drive frequency having a value larger than the resonance frequency of the resonance circuit obtained by converting the LC resonance circuit on the secondary side to the primary side. Power supply. - 前記共振回路は、前記トランスの1次側の共振回路のインピーダンス、および前記トランスの2次側の共振回路を1次側にインピーダンス変換した回路のインピーダンスがともに前記共振周波数においてゼロとなるように構成されている
請求項1に記載の電源装置。 The resonance circuit is configured such that the impedance of the resonance circuit on the primary side of the transformer and the impedance of the circuit obtained by impedance-converting the resonance circuit on the secondary side of the transformer to the primary side are both zero at the resonance frequency. The power supply device according to claim 1. - 前記1次側ブリッジ回路は、前記制御回路によってオン・オフ制御される複数のスイッチ素子を含んで構成されたフルブリッジ型の回路であり、
前記2次側ブリッジ回路は、前記制御回路によってオン・オフ制御されるローサイドの複数のスイッチ素子と、ハイサイドの複数のダイオード素子とを含んで構成されたフルブリッジ型の回路である
請求項1に記載の電源装置。 The primary side bridge circuit is a full bridge type circuit including a plurality of switch elements controlled on / off by the control circuit.
The secondary side bridge circuit is a full bridge type circuit including a plurality of low-side switch elements controlled on / off by the control circuit and a plurality of high-side diode elements. The power supply described in. - 前記1次側ブリッジ回路は、前記制御回路によってオン・オフ制御される複数のスイッチ素子を含んで構成されたフルブリッジ型の回路であり、
前記2次側ブリッジ回路は、前記制御回路によってオン・オフ制御される複数のスイッチ素子を含んで構成されたフルブリッジ型の回路である
請求項1に記載の電源装置。 The primary side bridge circuit is a full bridge type circuit including a plurality of switch elements controlled on / off by the control circuit.
The power supply device according to claim 1, wherein the secondary side bridge circuit is a full bridge type circuit including a plurality of switch elements controlled on / off by the control circuit. - 前記トランスの1次側および2次側のうち少なくとも1次側に共振回路を更に備え、
前記トランスの1次側の共振回路、および前記トランスの2次側の共振回路は、ともに、インダクタおよびキャパシタを含んで構成されている
請求項8に記載の電源装置。 A resonance circuit is further provided on at least the primary side of the primary side and the secondary side of the transformer.
The power supply device according to claim 8, wherein both the resonance circuit on the primary side of the transformer and the resonance circuit on the secondary side of the transformer include an inductor and a capacitor. - 前記1次側ブリッジ回路の回路電流パルスを検出する1次側電流センサと、
前記2次側ブリッジ回路の出力電流パルスを検出する2次側電流センサと
を更に備え、
前記制御回路は、カ行時には前記2次側電流センサによって検出された前記出力電流パルスに基づいて、前記2次側ブリッジ回路の同期整流を行い、
前記制御回路は、回生時には前記1次側電流センサによって検出された前記出力電流パルスに基づいて、前記1次側ブリッジ回路の同期整流を行う
請求項1に記載の電源装置。 The primary side current sensor that detects the circuit current pulse of the primary side bridge circuit, and
It is further equipped with a secondary side current sensor that detects the output current pulse of the secondary side bridge circuit.
The control circuit performs synchronous rectification of the secondary side bridge circuit based on the output current pulse detected by the secondary side current sensor at the time of powering.
The power supply device according to claim 1, wherein the control circuit performs synchronous rectification of the primary side bridge circuit based on the output current pulse detected by the primary side current sensor at the time of regeneration. - 直流電力を変換する電源装置と、
前記電源装置の1次側に接続される第1バッテリと、
前記電源装置の2次側に接続される第2バッテリと
を備え、
前記電源装置は、
トランスと、
前記トランスの1次側に設けられた1次側ブリッジ回路と、
前記トランスの2次側に設けられた2次側ブリッジ回路と、
前記トランスの1次側および2次側のうち少なくとも一方の側に設けられた共振回路と、
出力電圧範囲によって、前記1次側ブリッジ回路および前記2次側ブリッジ回路のスイッチ素子を互いに異なる制御方法で駆動することにより、一方向または双方向の電力変換を可能にする制御回路と
を有する
電源システム。 A power supply that converts DC power,
A first battery connected to the primary side of the power supply unit and
A second battery connected to the secondary side of the power supply unit is provided.
The power supply unit
With a transformer
The primary side bridge circuit provided on the primary side of the transformer and
The secondary side bridge circuit provided on the secondary side of the transformer and
A resonance circuit provided on at least one of the primary side and the secondary side of the transformer, and
A power supply having a control circuit that enables unidirectional or bidirectional power conversion by driving the switch elements of the primary side bridge circuit and the secondary side bridge circuit by different control methods depending on the output voltage range. system.
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