WO2022006709A1 - 一种提升选通管器件性能的方法、系统、设备和介质 - Google Patents

一种提升选通管器件性能的方法、系统、设备和介质 Download PDF

Info

Publication number
WO2022006709A1
WO2022006709A1 PCT/CN2020/100437 CN2020100437W WO2022006709A1 WO 2022006709 A1 WO2022006709 A1 WO 2022006709A1 CN 2020100437 W CN2020100437 W CN 2020100437W WO 2022006709 A1 WO2022006709 A1 WO 2022006709A1
Authority
WO
WIPO (PCT)
Prior art keywords
current
operating voltage
gate device
gate
voltage
Prior art date
Application number
PCT/CN2020/100437
Other languages
English (en)
French (fr)
Inventor
罗庆
丁亚欣
余杰
吕杭炳
刘明
Original Assignee
中国科学院微电子研究所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中国科学院微电子研究所 filed Critical 中国科学院微电子研究所
Priority to PCT/CN2020/100437 priority Critical patent/WO2022006709A1/zh
Publication of WO2022006709A1 publication Critical patent/WO2022006709A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

Definitions

  • the present disclosure relates to a method, system, device and medium for improving the performance of a gated tube device.
  • Non Volatile Memory Non Volatile Memory
  • Resistive Random Access Memory (RRAM) in a new type of non-volatile memory has a simple metal-insulator-metal (MIM) structure and is easy to implement in complementary metal-oxide-semiconductor circuits (Complementary Metal Oxide Semiconductor Circuits). Metal Oxide Semiconductor, CMOS) integrated.
  • MIM metal-insulator-metal
  • CMOS Metal Oxide Semiconductor
  • the cross-point RRAM has high storage density and excellent scalability, but the cross-point RRAM has the disadvantage of high leakage current, while the gate device has the advantages of simple structure and large nonlinearity, and is considered to be the A strong candidate for solving the leakage current problem.
  • NbO x gating tube device having a high on-state current, fast switching speed, etc., but the gating circuit comprises NbO x tube devices operate, the need for the strobe tube NbO x multiple switch devices, as With the increase of switching times, the leakage current of the NbO x gate device will increase and the on/off ratio will decrease, which greatly limits the life of the NbO x gate device under DC operation. Therefore, how to improve the performance of NbO x gating tube device, to extend the operational life of the direct current through the tube device selected from NbO x is a matter of concern to researchers currently.
  • one aspect of the present invention provides a method for improving the performance of a gate device, the method comprising:
  • Step S1 determining the operating voltage and limiting current during the direct current operation of the strobe device
  • Step S2 applying the operating voltage and limiting current to the gate device, so that the gate device circulates under the direct current until the off-state leakage current is reduced;
  • Step S3 continue to apply the operating voltage and limit current to the gate device, so that the gate device is cycled under direct current until the off-state leakage current is reduced to a minimum value; corresponding first operating voltage and first limited current, and obtaining the operating voltage interval and limited current interval with the first operating voltage and the first limited current as the center;
  • Step S4 applying a second operating voltage and a second limiting current within the range of the operating voltage interval and the limiting current interval to the gate device to perform DC operation or pulse operation;
  • step S5 the reverse operation voltage of the gate device is determined, and the reverse operation voltage is applied to the gate device, so that the gate device is reset.
  • the step S1 includes: obtaining a minimum operating voltage, a maximum operating voltage, a maximum limiting current, and a minimum limiting current that cause the gate device to have a switching phenomenon under the direct current;
  • the operating voltage is 0.5v-1v greater than the minimum operating voltage, and the limiting current during the DC operation of the gate device is determined to be 2-5 times the minimum limiting current.
  • the off-state leakage current is reduced, which means that the value of the current off-state leakage current is smaller than the value of the initial off-state leakage current.
  • the off-state leakage current is reduced to a minimum value, which means that the values of the off-state leakage current are all smaller than the values of the first N off-state leakage currents, and the off-state leakage current The values of are smaller than the values of the last M off-state leakage currents, where N ⁇ 1 and M ⁇ 1.
  • the determining the reverse operation voltage of the gate device includes: performing an unrestricted operation on the gate device in a voltage direction opposite to that in step S2, and obtaining the The minimum reverse operation voltage and the maximum reverse operation voltage of the tube device when the reset phenomenon occurs; determine that the reverse operation voltage of the gate tube device is 0-1v greater than the minimum reverse operation voltage, and less than the maximum reverse operation voltage Voltage.
  • the gate device is an NbO x gate device.
  • Another aspect of the present invention provides a system for improving the performance of a gate device, the system comprising:
  • an operating voltage and limiting current determining module used for determining the operating voltage and limiting current during the direct current operation of the strobe device
  • a first execution module for applying the operating voltage and limiting current to the gate device, so that the gate device circulates under direct current until the off-state leakage current is reduced;
  • an operating voltage interval and a limiting current interval acquiring module configured to continue applying the operating voltage and limiting current to the gate device, so that the gate device circulates under direct current until the off-state leakage current is reduced to a minimum value; and obtaining a first operating voltage and a first limited current corresponding to the minimum value of the off-state leakage current, and obtaining an operating voltage interval and a limited current interval with the first operating voltage and the first limited current as the center;
  • a second execution module configured to apply a second operating voltage and a second limited current within the range of the operating voltage interval and the limited current interval to the strobe device, so as to perform DC operation or pulse operation;
  • the reset module is used for determining the reverse operation voltage of the gate tube device, and applying the reverse operation voltage to the gate tube device, so that the gate tube device has a reset phenomenon.
  • Yet another aspect of the present invention provides an electronic device, the device comprising: a processor; a memory storing a computer-executable program that, when executed by the processor, causes the processor to execute the above-mentioned The described method for improving the performance of the gate device.
  • Another aspect of the present invention provides a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, the method for improving the performance of a gate device as described above is implemented.
  • the present invention adopts the required target operation after the occurrence of this situation, which can reduce the leakage current generated by the target operation, and then reversely resets the NbO x gate device, and can find the leakage current reduction in the next use.
  • the invention reduces the leakage current of the gate device, adjusts the switching ratio, and improves the gate tube. Device stability, switching life, and performance of the circuit in which the strobe device is placed. And the method provided by the present invention can be executed by a program, so that the whole process is convenient and quick.
  • FIG. 1 is a flowchart of a method for improving the performance of a gate device provided by an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a NbO x gate device provided by an embodiment of the present invention.
  • FIG. 3 is a system block diagram for improving the performance of a gate device provided by an embodiment of the present invention.
  • FIG. 4 is a block diagram of an electronic device provided by an embodiment of the present invention.
  • an embodiment of the present invention provides a method for improving the performance of a gate device, and the method includes the contents of steps S1 to S5:
  • Step S1 determining the operating voltage and limiting current of the strobe device during DC operation.
  • Step S2 applying the operating voltage and limiting current to the gate device, so that the gate device circulates under the direct current until the off-state leakage current is reduced.
  • the judgment basis for the reduction of the off-state leakage current is that the value of the current off-state leakage current is smaller than the value of the initial off-state leakage current, indicating that the off-state leakage current is reduced.
  • Step S3 continue to apply the operating voltage and limit current to the gate device, so that the gate device is cycled under direct current until the off-state leakage current is reduced to a minimum value;
  • the corresponding first operating voltage and the first limited current are obtained, and the operating voltage interval and the limited current interval are obtained with the first operating voltage and the first limited current as the center.
  • the judgment basis for the reduction of the off-state leakage current to the minimum value is that the values of the off-state leakage current are all smaller than the values of the first N off-state leakage currents, and the value of the off-state leakage current is are smaller than the last M off-state leakage currents, where N ⁇ 1 and M ⁇ 1.
  • Step S4 applying a second operating voltage and a second limiting current within the range of the operating voltage interval and the limiting current interval to the gate device to perform DC operation or pulse operation.
  • step S5 the reverse operation voltage of the gate device is determined, and the reverse operation voltage is applied to the gate device, so that the gate device is reset.
  • the determining the reverse operation voltage of the gate device includes: performing a current-limiting operation on the gate device in a voltage direction opposite to that of step S2, and obtaining a reset phenomenon of the gate device.
  • the minimum reverse operation voltage and the maximum reverse operation voltage are determined; the reverse operation voltage of the gate device is determined to be 0-1v greater than the minimum reverse operation voltage and smaller than the maximum reverse operation voltage.
  • the present invention obtains the operating voltage interval and the limiting current interval when the leakage current is reduced to the minimum value after DC circulation of the NbO x gate device, and then performs the required purpose operation in this interval, which can reduce the Leakage current generated by the intended operation. Then perform reverse reset on the NbO x strobe device, and repeat steps S1-S3 next time to find the situation where the leakage current is reduced to the minimum value, so as to update the operating voltage corresponding to the reduction of the leakage current to the minimum value interval and limited current interval.
  • the first execution of the current operation or pulsed operation NbO x gating tube devices it can be sequentially performed steps S1-S4, next execution of the current operation or pulsed operation of the tube NbO x gating means, Step S5 may be performed first, and then steps S1-S4 may be performed in sequence, and the cycle is repeated.
  • the NbO x gate device includes a top electrode 1 , a dielectric layer 2 , a bottom electrode 3 , and a substrate layer 4 in order from top to bottom.
  • the NbOx gate device can be prepared through the following steps:
  • TiN with a thickness of 20 nm was deposited by ion beam sputtering on the SiO 2 /Si substrate.
  • the bottom electrode TiN is obtained by photolithography.
  • the third step is to hit the target with Nb:O 1:1 in Ar and O 2 environment by magnetron sputtering technology, control the oxygen flux to 0.8sccm, and deposit NbOx dielectric layer, NbOx layer on the bottom electrode TiN
  • the thickness is 60nm.
  • a top electrode Pt is deposited on the NbO x layer by magnetron sputtering technology, and the thickness of the top electrode Pt is 40 nm.
  • the system 300 includes: an operating voltage and limiting current determining module 301 for determining the performance of the gate device during DC operation. operating voltage and limiting current; the first execution module 302 is configured to apply the operating voltage and limiting current to the gate device, so that the gate device circulates under direct current until the off-state leakage current is reduced; the operating voltage interval and The current-limiting interval obtaining module 303 is configured to continue applying the operating voltage and limiting current to the gate device, so that the gate device circulates under direct current until the off-state leakage current is reduced to a minimum value; The first operating voltage and the first limited current corresponding to the minimum value of the state leakage current are obtained, and the operating voltage interval and the limited current interval are obtained with the first operating voltage and the first limited current as the center; the second execution module 304 is used for The gating device applies the second operating voltage and the second limiting current within the range of the operating voltage interval and the limiting current interval
  • Any of the modules, sub-modules, units, sub-units, or at least part of the functions of any of them according to embodiments of the present invention may be implemented in one module. Any one or more of the modules, sub-modules, units, and sub-units according to the embodiments of the present invention may be divided into multiple modules for implementation.
  • FIG. 4 schematically shows a block diagram of an electronic device according to an embodiment of the present invention.
  • the electronic device 400 includes a processor 401 and a memory 402 .
  • the electronic device 400 can execute the method according to the embodiment of the present invention.
  • the processor 401 may include, for example, a general-purpose microprocessor, an instruction set processor and/or a related chipset and/or a special-purpose microprocessor (eg, an application specific integrated circuit (ASIC)), and the like.
  • the processor 401 may also include on-board memory for caching purposes.
  • the processor 401 may be a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiment of the present invention.
  • Memory 402 may be any medium that can contain, store, communicate, propagate, or transmit instructions.
  • a readable storage medium may include, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium.
  • Specific examples of readable storage media include: magnetic storage devices, such as magnetic tapes or hard disks (HDDs); optical storage devices, such as compact disks (CD-ROMs); memories, such as random access memory (RAM) or flash memory; and/or wired /Wireless communication link. It stores a computer-executable program which, when executed by the processor, causes the processor to perform the method as described above.
  • the present invention also provides a computer-readable medium, which may be included in the device/apparatus/system described in the above-mentioned embodiments; or may exist alone without being assembled into the apparatus/apparatus/system. in the system.
  • the above-mentioned computer-readable medium carries one or more programs, and when the above-mentioned one or more programs are executed, the above-mentioned method according to the embodiment of the present invention is implemented.
  • the computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof.
  • a computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the above. More specific examples of computer readable storage media may include, but are not limited to, electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read only memory (ROM), erasable Programmable read only memory (EPROM or flash memory), fiber optics, portable compact disk read only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
  • a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.
  • a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code therein. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the foregoing.
  • a computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device .
  • Program code embodied on a computer readable medium may be transmitted using any suitable medium including, but not limited to, wireless, wireline, optical fiber cable, radio frequency signals, etc., or any suitable combination of the foregoing.

Landscapes

  • Power Conversion In General (AREA)

Abstract

本发明提供了一种提升选通管器件性能的方法、系统、设备和介质。所述方法包括:确定选通管器件的直流操作时的操作电压和限制电流;对选通管器件施加操作电压和限制电流,直至关态漏电流减小;继续对选通管器件施加操作电压和限制电流,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间;对选通管器件施加在操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作;确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使选通管器件出现复位现象。

Description

一种提升选通管器件性能的方法、系统、设备和介质 技术领域
本公开涉及一种提升选通管器件性能的方法、系统、设备和介质。
背景技术
随着存储器技术的发展,众多具有优良性能的新型非易失性存储器(NonVolatileMemory,NVM)应用广泛。新型非易失性存储器中的阻变式存储器(Resistive Random Access Memory,RRAM),具有简单的金属-绝缘体-金属(metal-insulator-metal,MIM)结构并且易于在互补金属氧化物半导体电路(Complementary Metal Oxide Semiconductor,CMOS)中集成。其中,交叉点型的RRAM具有高的存储密度以及出色的可微缩性,但交叉点型RRAM具有高的漏电流的缺点,而选通管器件具有结构简单以及非线性大等优点,被认为是解决漏电流问题的有力的候选者。
基于NbO x的选通管器件具有开态电流高、开关速度快等优点,但是对含有NbO x选通管器件的电路进行操作时,需要对NbO x选通管器件进行多次开关,随着开关次数的增加,NbO x选通管器件会出现漏电流增加、开关比降低的问题,大大限制了直流操作下NbO x选通管器件的寿命。因此,如何提升NbO x选通管器件的性能,以延长直流操作下NbO x选通管器件的寿命是目前研发人员关注的问题。
发明内容
(一)要解决的技术问题
如何提升NbO x选通管器件的性能,以延长直流操作下NbO x选通管器件的寿命
(二)技术方案
为了解决上述问题,本发明一方面提供了一种提升选通管器件性能 的方法,所述方法包括:
步骤S1,确定选通管器件的直流操作时的操作电压和限制电流;
步骤S2,对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下循环,直至关态漏电流减小;
步骤S3,继续对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下进行循环,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间;
步骤S4,对选通管器件施加在所述操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作;
步骤S5,确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使所述选通管器件出现复位现象。
可选地,所述步骤S1包括:在直流电流下,获取使选通管器件出现开关现象的最小操作电压、最大操作电压、最高限制电流和最低限制电流;确定选通管器件的直流操作时的操作电压为比最小操作电压大0.5v-1v,确定选通管器件的直流操作时的限制电流为最低限制电流的2-5倍。
可选地,所述步骤S2中,所述关态漏电流减小,为当前关态漏电流的值小于初始关态漏电流的值。
可选地,所述步骤S3中,所述关态漏电流减小到最小值,为所述关态漏电流的值均小于前N个关态漏电流的值,且所述关态漏电流的值均小于后M个关态漏电流的值,其中N≥1,M≥1。
可选地,所述步骤S5中,所述确定选通管器件的反向操作电压,包括:在与步骤S2相反的电压方向下对选通管器件进行不限流的操作,获取使选通管器件出现复位现象的最小反向操作电压和最大反向操作电压;确定选通管器件的反向操作电压为比所述最小反向操作电压大0-1v,且小于所述最大反向操作电压。
可选地,所述选通管器件为NbO x选通管器件。
本发明另一方面提供了一种提升选通管器件性能的系统,所述系统包括:
操作电压和限制电流确定模块,用于确定选通管器件的直流操作时的操作电压和限制电流;
第一执行模块,用于对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下循环,直至关态漏电流减小;
操作电压区间和限制电流区间获取模块,用于继续对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下进行循环,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间;
第二执行模块,用于对选通管器件施加在所述操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作;
复位模块,用于确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使所述选通管器件出现复位现象。
本发明又一方面提供了一种电子设备,所述设备包括:处理器;存储器,其存储有计算机可执行程序,该程序在被所述处理器执行时,使得所述处理器执行如上文所述的提升选通管器件性能的方法。
本发明再一方面提供了一种计算机可读存储介质,其上存储有计算机程序,该程序被处理器执行时实现如上文所述的提升选通管器件性能的方法。
(三)有益效果
由于在直流循环下,NbO x选通管器件会出现漏电流升高、开关比下降等不稳定现象,对NbO x选通管器件进行直流循环后,会出现漏电流减小到最小值的情况,本发明采用在出现此情况后再进行所需的目的操作,可降低目的操作产生的漏电流,然后对NbO x选通管器件进行反向reset,下次使用时可重新找到漏电流减小到最小值的情况,以更新漏电 流减小到最小值所对应的操作电压区间和限制电流区间,本发明,发明降低了选通管器件的漏电流、调节了开关比,提升了选通管器件的稳定性、开关寿命以及选通管器件所在电路的性能。并且本发明提供的方法,可以通过程序来执行,使得整个过程方便快捷。
附图说明
图1是本发明的一个实施例提供的一种提升选通管器件性能的方法流程图;
图2是本发明的一个实施例提供的NbO x选通管器件结构示意图;
图3是本发明的一个实施例提供的一种提升选通管器件性能的系统框图;
图4是本发明一个实施例提供的电子设备的框图。
具体实施方式
以下,将参照附图来描述本发明的实施例。但是应该理解,这些描述只是示例性的,而并非要限制本发明的范围。在下面的详细描述中,为便于解释,阐述了许多具体的细节以提供对本发明实施例的全面理解。然而,明显地,一个或多个实施例在没有这些具体细节的情况下也可以被实施。此外,在以下说明中,省略了对公知结构和技术的描述,以避免不必要地混淆本发明的概念。
在此使用的术语仅仅是为了描述具体实施例,而并非意在限制本发明。在此使用的术语“包括”、“包含”等表明了所述特征、步骤、操作和/或部件的存在,但是并不排除存在或添加一个或多个其他特征、步骤、操作或部件。
参见图1,本发明的一个实施例提供了一种提升选通管器件性能的方法,所述方法包括步骤S1~步骤S5的内容:
步骤S1,确定选通管器件的直流操作时的操作电压和限制电流。
具体地,在直流电流下,获取使选通管器件出现开关现象的最小操作电压、最大操作电压、最高限制电流和最低限制电流;确定选通管器件的直流操作时的操作电压为比最小操作电压大0.5v-1v,确定选通管器件的直流操作时的限制电流为最低限制电流的2-5倍。
步骤S2,对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下循环,直至关态漏电流减小。
在该步骤中,所述关态漏电流减小的判断依据为,当前关态漏电流的值小于初始关态漏电流的值,说明关态漏电流减小。
步骤S3,继续对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下进行循环,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间。
在该步骤中,所述关态漏电流减小到最小值的判断依据为,所述关态漏电流的值均小于前N个关态漏电流的值,且所述关态漏电流的值均小于后M个关态漏电流的值,其中N≥1,M≥1。
步骤S4,对选通管器件施加在所述操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作。
需要说明的是,上述步骤S1-S4中对选通管器件施加的操作电压均为同一个方向的操作电压。
步骤S5,确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使所述选通管器件出现复位现象。
在该步骤中,所述确定选通管器件的反向操作电压,包括:在与步骤S2相反的电压方向下对选通管器件进行不限流的操作,获取使选通管器件出现复位现象的最小反向操作电压和最大反向操作电压;确定选通管器件的反向操作电压为比所述最小反向操作电压大0-1v,且小于所述最大反向操作电压。
由此,本发明通过对NbO x选通管器件进行直流循环后,得到漏电流减小到最小值时的操作电压区间和限制电流区间,然后在该区间内进行所需的目的操作,可降低目的操作产生的漏电流。然后对NbO x选通 管器件进行反向reset,下次使用时可重复步骤S1-S3以重新找到漏电流减小到最小值的情况,从而更新漏电流减小到最小值所对应的操作电压区间和限制电流区间。在实际使用过程中,第一次对NbO x选通管器件执行直流操作或脉冲操作时,可按顺序执行步骤S1-S4,在下一次对NbO x选通管器件执行直流操作或脉冲操作时,可先执行步骤S5,再按顺序执行步骤S1-S4,依此循环。
需要说明的是,上述步骤S1-S5的内容可适用于NbO x选通管器件。如图2所示,该NbO x选通管器件从上到下依次为顶层电极1、介质层2、底层电极3、衬底层4。该NbOx选通管器件可以通过下列步骤制备得到:
第一步,在SiO 2/Si衬底上,通过离子束溅射技术沉积厚度为20nm的TiN。
第二步,通过光刻技术得到底层电极TiN。
第三步,通过磁控溅射技术在Ar和O 2环境中击打Nb∶O为1∶1的靶材,控制通氧量为0.8sccm,在底层电极TiN上沉积NbOx介质层,NbOx层厚度为60nm。
第四步,通过磁控溅射技术在NbO x层上沉积顶层电极Pt,顶层电极Pt厚度为40nm。
本发明另一个实施例提供了一种提升选通管器件性能的系统,参见图3,所述系统300包括:操作电压和限制电流确定模块301,用于确定选通管器件的直流操作时的操作电压和限制电流;第一执行模块302,用于对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下循环,直至关态漏电流减小;操作电压区间和限制电流区间获取模块303,用于继续对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下进行循环,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间;第二执行模块304,用于对选通管器件施加在所述操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作; 复位模块305,用于确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使所述选通管器件出现复位现象。
根据本发明的实施例的模块、子模块、单元、子单元中的任意多个、或其中任意多个的至少部分功能可以在一个模块中实现。根据本发明实施例的模块、子模块、单元、子单元中的任意一个或多个可以被拆分成多个模块来实现。
图4示意性示出了根据本发明实施例的电子设备的框图。
如图4所示,电子设备400包括处理器401和存储器402。该电子设备400可以执行根据本发明实施例的方法。
具体地,处理器401例如可以包括通用微处理器、指令集处理器和/或相关芯片组和/或专用微处理器(例如,专用集成电路(ASIC)),等等。处理器401还可以包括用于缓存用途的板载存储器。处理器401可以是用于执行根据本发明实施例的方法流程的不同动作的单一处理单元或者是多个处理单元。
存储器402,例如可以是能够包含、存储、传送、传播或传输指令的任意介质。例如,可读存储介质可以包括但不限于电、磁、光、电磁、红外或半导体系统、装置、器件或传播介质。可读存储介质的具体示例包括:磁存储装置,如磁带或硬盘(HDD);光存储装置,如光盘(CD-ROM);存储器,如随机存取存储器(RAM)或闪存;和/或有线/无线通信链路。其存储有计算机可执行程序,该程序在被所述处理器执行时,使得所述处理器执行如上文所述的方法。
本发明还提供了一种计算机可读介质,该计算机可读介质可以是上述实施例中描述的设备/装置/系统中所包含的;也可以是单独存在,而未装配入该设备/装置/系统中。上述计算机可读介质承载有一个或者多个程序,当上述一个或者多个程序被执行时,实现根据本发明实施例的上述方法。
根据本发明的实施例,计算机可读介质可以是计算机可读信号介质或者计算机可读存储介质或者是上述两者的任意组合。计算机可读存储介质例如可以是——但不限于——电、磁、光、电磁、红外线、或半导 体的系统、装置或器件,或者任意以上的组合。计算机可读存储介质的更具体的例子可以包括但不限于:具有一个或多个导线的电连接、便携式计算机磁盘、硬盘、随机访问存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑磁盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。在本发明中,计算机可读存储介质可以是任何包含或存储程序的有形介质,该程序可以被指令执行系统、装置或者器件使用或者与其结合使用。而在本发明中,计算机可读的信号介质可以包括在基带中或者作为载波一部分传播的数据信号,其中承载了计算机可读的程序代码。这种传播的数据信号可以采用多种形式,包括但不限于电磁信号、光信号或上述的任意合适的组合。计算机可读的信号介质还可以是计算机可读存储介质以外的任何计算机可读介质,该计算机可读介质可以发送、传播或者传输用于由指令执行系统、装置或者器件使用或者与其结合使用的程序。计算机可读介质上包含的程序代码可以用任何适当的介质传输,包括但不限于:无线、有线、光缆、射频信号等等,或者上述的任意合适的组合。
本领域技术人员可以理解,本发明的各个实施例和/或权利要求中记载的特征可以进行多种组合或/或结合,即使这样的组合或结合没有明确记载于本发明中。特别地,在不脱离本发明精神和教导的情况下,本发明的各个实施例和/或权利要求中记载的特征可以进行多种组合和/或结合。所有这些组合和/或结合均落入本发明的范围。
尽管已经参照本发明的特定示例性实施例示出并描述了本发明,但是本领域技术人员应该理解,在不背离所附权利要求及其等同物限定的本发明的精神和范围的情况下,可以对本发明进行形式和细节上的多种改变。因此,本发明的范围不应该限于上述实施例,而是应该不仅由所附权利要求来进行确定,还由所附权利要求的等同物来进行限定。

Claims (9)

  1. 一种提升选通管器件性能的方法,其特征在于,所述方法包括:
    步骤S1,确定选通管器件的直流操作时的操作电压和限制电流;
    步骤S2,对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下循环,直至关态漏电流减小;
    步骤S3,继续对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下进行循环,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间;
    步骤S4,对选通管器件施加在所述操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作;
    步骤S5,确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使所述选通管器件出现复位现象。
  2. 根据权利要求1所述的方法,其特征在于,所述步骤S1包括:
    在直流电流下,获取使选通管器件出现开关现象的最小操作电压、最大操作电压、最高限制电流和最低限制电流;
    确定选通管器件的直流操作时的操作电压为比最小操作电压大0.5v-1v,确定选通管器件的直流操作时的限制电流为最低限制电流的2-5倍。
  3. 根据权利要求1所述的方法,其特征在于,所述步骤S2中,所述关态漏电流减小,为当前关态漏电流的值小于初始关态漏电流的值。
  4. 根据权利要求1所述的方法,其特征在于,所述步骤S3中,所述关态漏电流减小到最小值,为所述关态漏电流的值均小于前N个关态漏电流的值,且所述关态漏电流的值均小于后M个关态漏电流的值,其中N≥1,M≥1。
  5. 根据权利要求1所述的方法,其特征在于,所述步骤S5中,所述确定选通管器件的反向操作电压,包括:
    在与步骤S2相反的电压方向下对选通管器件进行不限流的操作, 获取使选通管器件出现复位现象的最小反向操作电压和最大反向操作电压;
    确定选通管器件的反向操作电压为比所述最小反向操作电压大0-1v,且小于所述最大反向操作电压。
  6. 根据权利要求1-5任一项所述的方法,其特征在于,所述选通管器件为NbO x选通管器件。
  7. 一种提升选通管器件性能的系统,其特征在于,所述系统包括:
    操作电压和限制电流确定模块,用于确定选通管器件的直流操作时的操作电压和限制电流;
    第一执行模块,用于对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下循环,直至关态漏电流减小;
    操作电压区间和限制电流区间获取模块,用于继续对选通管器件施加所述操作电压和限制电流,使选通管器件在直流下进行循环,直至关态漏电流减小到最小值;并获取与关态漏电流最小值所对应的第一操作电压和第一限制电流,并以该第一操作电压和第一限制电流为中心获取操作电压区间和限制电流区间;
    第二执行模块,用于对选通管器件施加在所述操作电压区间和限制电流区间范围内的第二操作电压和第二限制电流,以进行直流操作或脉冲操作;
    复位模块,用于确定选通管器件的反向操作电压,对选通管器件施加所述反向操作电压,使所述选通管器件出现复位现象。
  8. 一种电子设备,其特征在于,所述设备包括:
    处理器;
    存储器,其存储有计算机可执行程序,该程序在被所述处理器执行时,使得所述处理器执行如权利要求1-6中所述的提升选通管器件性能的方法。
  9. 一种计算机可读存储介质,其上存储有计算机程序,其特征在于,该程序被处理器执行时实现如权利要求1-6中所述的提升选通管器件性能的方法。
PCT/CN2020/100437 2020-07-06 2020-07-06 一种提升选通管器件性能的方法、系统、设备和介质 WO2022006709A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/100437 WO2022006709A1 (zh) 2020-07-06 2020-07-06 一种提升选通管器件性能的方法、系统、设备和介质

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/100437 WO2022006709A1 (zh) 2020-07-06 2020-07-06 一种提升选通管器件性能的方法、系统、设备和介质

Publications (1)

Publication Number Publication Date
WO2022006709A1 true WO2022006709A1 (zh) 2022-01-13

Family

ID=79553677

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/100437 WO2022006709A1 (zh) 2020-07-06 2020-07-06 一种提升选通管器件性能的方法、系统、设备和介质

Country Status (1)

Country Link
WO (1) WO2022006709A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170330948A1 (en) * 2015-10-14 2017-11-16 United Microelectronics Corp. Metal-oxide-semiconductor transistor and method of forming gate layout
CN108074603A (zh) * 2016-11-14 2018-05-25 三星电子株式会社 非易失性存储器装置及其操作方法以及控制逻辑
CN109219884A (zh) * 2018-08-30 2019-01-15 深圳市为通博科技有限责任公司 存储单元、存储器件以及存储单元的操作方法
CN109949836A (zh) * 2019-02-19 2019-06-28 华中科技大学 一种改善选通管器件性能的操作方法
CN110910933A (zh) * 2019-11-18 2020-03-24 华中科技大学 一种三维存储器及其读取方法
CN111129070A (zh) * 2019-11-27 2020-05-08 中国科学院上海微系统与信息技术研究所 一种选通管材料、选通管单元以及其制作方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170330948A1 (en) * 2015-10-14 2017-11-16 United Microelectronics Corp. Metal-oxide-semiconductor transistor and method of forming gate layout
CN108074603A (zh) * 2016-11-14 2018-05-25 三星电子株式会社 非易失性存储器装置及其操作方法以及控制逻辑
CN109219884A (zh) * 2018-08-30 2019-01-15 深圳市为通博科技有限责任公司 存储单元、存储器件以及存储单元的操作方法
CN109949836A (zh) * 2019-02-19 2019-06-28 华中科技大学 一种改善选通管器件性能的操作方法
CN110910933A (zh) * 2019-11-18 2020-03-24 华中科技大学 一种三维存储器及其读取方法
CN111129070A (zh) * 2019-11-27 2020-05-08 中国科学院上海微系统与信息技术研究所 一种选通管材料、选通管单元以及其制作方法

Similar Documents

Publication Publication Date Title
Yang et al. Multifunctional Nanoionic Devices Enabling Simultaneous Heterosynaptic Plasticity and Efficient In‐Memory Boolean Logic
US9741414B2 (en) Spin orbit and spin transfer torque-based spintronics devices
US9666256B1 (en) Spin-orbit torque magnetic random access memory and method of writing the same
CN106098932B (zh) 一种线性缓变忆阻器及其制备方法
Zeng et al. Electric field gradient‐controlled domain switching for size effect‐resistant multilevel operations in HfO2‐based ferroelectric field‐effect transistor
Wang et al. Improved resistive switching properties of Ti/ZrO2/Pt memory devices for RRAM application
WO2015096244A1 (zh) 一种基于相变存储器的非易失性逻辑门电路
US8633465B2 (en) Multilevel resistive memory having large storage capacity
WO2022006709A1 (zh) 一种提升选通管器件性能的方法、系统、设备和介质
US20170222133A1 (en) Electronic device and method for fabricating the same
CN110797371B (zh) 一种磁性存储器、数据存储装置及控制方法
Yan et al. Density effects of graphene oxide quantum dots on characteristics of Zr0. 5Hf0. 5O2 film memristors
CN103698957B (zh) 液晶透镜的变焦驱动方法
US20190221261A1 (en) Hybrid memory devices
Wu et al. First demonstration of RRAM patterned by block copolymer self-assembly
JP2009152351A (ja) ナノギャップスイッチング素子の駆動方法及びナノギャップスイッチング素子を備える記憶装置
Zhang et al. Voltage modulated long-term plasticity in perovskite heterostructured memristive synaptic devices with high-performance neuromorphic computing
Chen et al. Analog synaptic behaviors in carbon-based self-selective RRAM for in-memory supervised learning
CN111769133A (zh) 一种提升选通管器件性能的方法、系统、设备和介质
WO2014150767A1 (en) Methods for designing fin-based field effect transistors (finfets)
WO2023129813A1 (en) Associative computing for error correction
CN112002362B (zh) 对称型存储单元及bnn电路
Tan et al. Implementing Boolean Logic in Ferroelectric Field‐Effect Transistors
CN113451502B (zh) 多功能磁性随机存储单元、方法、存储器及设备
CN104465984A (zh) 磁性隧道结及其形成方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20943887

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20943887

Country of ref document: EP

Kind code of ref document: A1