WO2021256197A1 - Information processing device and method for driving information processing device - Google Patents

Information processing device and method for driving information processing device Download PDF

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Publication number
WO2021256197A1
WO2021256197A1 PCT/JP2021/019882 JP2021019882W WO2021256197A1 WO 2021256197 A1 WO2021256197 A1 WO 2021256197A1 JP 2021019882 W JP2021019882 W JP 2021019882W WO 2021256197 A1 WO2021256197 A1 WO 2021256197A1
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Prior art keywords
voltage
information processing
drive
fluctuation
changing element
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PCT/JP2021/019882
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French (fr)
Japanese (ja)
Inventor
広幸 秋永
久 島
泰久 内藤
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国立研究開発法人産業技術総合研究所
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Priority to JP2022532437A priority Critical patent/JP7398841B2/en
Publication of WO2021256197A1 publication Critical patent/WO2021256197A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/48Analogue computers for specific processes, systems or devices, e.g. simulators
    • G06G7/60Analogue computers for specific processes, systems or devices, e.g. simulators for living beings, e.g. their nervous systems ; for problems in the medical field
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to an information processing apparatus and a method for driving the information processing apparatus.
  • the present invention relates to a brain-type information processing apparatus using an analog resistance changing element and a method for driving the brain-type information processing apparatus.
  • IoT Internet of Things
  • a nerve cell is modeled as a multi-input 1-output element, and an input pattern is learned or inferred by a perceptron.
  • an analog resistance changing element is used for the perceptron, and an array structure in which crossbars are connected by word lines and bit lines is used for the product-sum operation.
  • the analog resistance changing element is also called a memristor or RAND (Resistive Analog Neuro Device).
  • the analog resistance changing element has a resistance switch effect in which the current value changes non-linearly when a voltage is applied to the insulating oxide film, and the resistance value changes in an analog manner due to the redox reaction induced by the current.
  • the process of lowering the resistance (SET) and the process of increasing the resistance (RESET) of the analog resistance changing element can be brought about by applying a drive pulse of a predetermined voltage.
  • flattening means that an event that high resistance occurs when a pulse is applied in the low resistance process or low resistance occurs when a pulse is applied in the high resistance process does not occur. In general, it may be included in a technique for reducing noise or increasing resistance to noise.
  • the first value is set.
  • the stored state the state in which the second value is stored when only one cell unit of the column cell is in the second state
  • the third value when both cell units of the column cell are in the second state.
  • Disclosed is a technique having non-volatility with good retention characteristics by setting a voltage that does not cause a disturbance that causes a state transition in a column cell so as to be in a memorized state (see, for example, Patent Document 3 below).
  • Patent Documents 1 to 3 the prior art only suppresses the generation of external noise and disturbance. Even if these conventional techniques for external noise countermeasures are simply applied to a brain-type information processing system, it is not possible to reduce the power required for pulse application and flatten the change in analog resistance.
  • SET low resistance
  • RESET high resistance
  • an object of the present invention to obtain an information processing apparatus and a driving method of an information processing apparatus capable of suppressing power consumption reduction and resistance change flattening of an analog resistance changing element with a simple configuration. do.
  • the information processing apparatus of the present invention comprises an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes, and driving the analog resistance changing element. It is characterized by being provided with a drive circuit that superimposes and supplies voltage fluctuations having a fluctuation component on a signal.
  • the drive circuit is characterized in that it generates a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of a predetermined voltage required for the analog resistance change.
  • the drive pulse is a constant voltage of about several V, and the fluctuation is a voltage of about 1/10 of the drive pulse.
  • the drive pulse is more preferably characterized in that the voltage fluctuation is about 1/10 of the drive pulse of about 0.3 V to 5 V used in the electronic device for IoT.
  • the drive pulse has a voltage of about several V, and the voltage is variable from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation is about 1/1000 of the drive pulse. do.
  • the voltage fluctuation is characterized by being any of white noise, Gaussian noise, which is easily generated by an electronic circuit, a sine wave, a triangular wave, and a square wave. Further, this does not apply as long as it gives fluctuations to the drive pulse of the voltage that drives the resistance change. Further, it is desirable that the frequency of the voltage fluctuation has a time determined as the reciprocal thereof equal to or less than the drive pulse width.
  • analog resistance changing element is connected to a selection transistor in memory cell units, and the drive circuit supplies the selection transistor with the drive signal superimposed with the voltage fluctuation.
  • the analog resistance changing element is arranged at a plurality of cross points where the word line and the bit line intersect, and the analog resistance changing element is driven and selected by the word line decoder and the bit line decoder, and the drive circuit is the drive circuit. It is characterized in that the drive signal in which the voltage fluctuation is superimposed is supplied to either the word line decoder or the bit line decoder.
  • a voltage having a fluctuation component is applied to a driving signal for driving an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes. It is characterized by overlapping.
  • the drive signal is characterized in that it is a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of the voltage required for the analog resistance change.
  • the drive pulse is a constant voltage of about several V, and the voltage fluctuation is a voltage of about 1/10 of the drive pulse.
  • the drive pulse has a voltage of about several V, and the voltage is variable from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation is characterized by a voltage of about 1/1000 of the drive pulse. And.
  • a larger resistance change is realized by superimposing a voltage having a fluctuation component on the drive signal that drives the analog resistance change element. That is, the resistance can be changed by the drive pulse of a lower voltage, so that the power consumption can be reduced.
  • the flattening of the low resistance (SET) process and the high resistance (RESET) process is realized. Smooth resistance changes improve controllability, improve the efficiency of correction processing in the brain-type information processing process, for example, correction of various errors for elements and circuits, and as a result, reduce the power consumption of the brain-type information processing circuit. And high speed can be realized.
  • the drive signal in addition to the method of continuously applying a drive pulse of a constant voltage, the voltage of the drive pulse can be variably applied for each step voltage.
  • FIG. 1 is a diagram showing a structural example of a resistance changing element according to an embodiment.
  • FIG. 2 is a plan view showing a structural example of an analog resistance changing element included in the information processing apparatus according to the embodiment.
  • FIG. 3 is a cross-sectional view of a contact hole portion located at the C point portion of FIG.
  • FIG. 4 is a diagram showing an enlarged cross-sectional TEM image of the oxide layer portion shown in FIG.
  • FIG. 5 is a chart showing a characteristic measurement result when voltage fluctuation is superimposed on the drive signal of the analog resistance changing element according to the embodiment.
  • FIG. 6 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment. (Part 1)
  • FIG. 1 is a diagram showing a structural example of a resistance changing element according to an embodiment.
  • FIG. 2 is a plan view showing a structural example of an analog resistance changing element included in the information processing apparatus according to the embodiment.
  • FIG. 3 is a cross-sectional view of
  • FIG. 7 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment.
  • FIG. 8 is a diagram showing a mounting example of the analog resistance changing element of the embodiment.
  • FIG. 9 is a diagram showing a mounting example of the analog resistance changing element of the embodiment.
  • Part 2 FIG. 10 is a chart showing characteristic measurement results when the analog resistance changing element according to another embodiment is driven by another driving method.
  • FIG. 1 is a diagram showing an example of the structure of RAND according to the embodiment.
  • RAND101 has a structure in which an insulating oxide layer is sandwiched between electrodes.
  • the upper electrode (TE) 111 and the lower electrode (BE) 112 are titanium nitride TiN, respectively, and the oxide layer (MO) 113 is TaOx (tantalum pentoxide).
  • the oxide layer (MO) 113 has one layer or a plurality of layers of two or more.
  • the MO 113 is composed of two layers, MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2.
  • TaOx-L and TaOx-H are Ta oxide films having different resistivityes, and the resistivity is TaOx-L ⁇ TaOx-H.
  • oxide layer (MO) 113 By forming the oxide layer (MO) 113 as a layer having a plurality of resistivity, more desired resistance change characteristics can be obtained.
  • the resistance change in RAND101 is based on the redox reaction induced by the current.
  • the conductance increases in the process of lowering the resistance (Set), and the conductance decreases in the process of increasing the resistance (Reset).
  • FIG. 2 is a plan view showing a structural example of an analog resistance changing element included in the information processing apparatus according to the embodiment.
  • the RAND 101 is arranged on the Si substrate 200.
  • a Drive voltage is applied to TE111 of RAND101.
  • MO oxide layer
  • FIG. 3 is a cross-sectional view of a contact hole portion located at point C in FIG. 2.
  • a 100 nm thermal oxide film (SiO 2 ) 300 is formed on the Si substrate 200.
  • a Si substrate 200 with a thermal oxide film of 100 nm can be used.
  • BE112 of RAND101 is provided on the Si substrate 200 with a thermal oxide film.
  • Two layers of MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2 having different resistivity as shown in FIG. 1 are provided on the BE 112 as the oxide layer (MO) 113.
  • An insulating film 305 such as silicon oxide (SiO 2 ) is provided on the Si substrate 200, and the insulating film 305 is provided between the BE 112 and the MO 113 and covers the TE 111.
  • a part of TE111 and a part of BE112 are derived to the front surface of the insulating film 305, respectively.
  • MO113 shown in FIG. 3 is composed of two layers of MO113-1 and 113-2, has a recess (contact hole) at point C, and is joined to BE112.
  • RAND101 forms one circuit system from point A to point E in FIG.
  • FIG. 4 is a diagram showing an enlarged cross-sectional TEM image of the oxide layer portion shown in FIG. An image taken by a transmission electron microscope TEM (Transmission Electron Microscope) is shown, and the oxide layer 113 at the point C portion in FIG. 3 is enlarged.
  • Two layers of MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2 are laminated as an oxide layer (MO) 113 on a TiN layer corresponding to BE1 and BE2 (112). ..
  • the oxide layer (MO) 113 can be appropriately selected so as to obtain a desired resistance value.
  • a TiN layer corresponding to TE111 is laminated on the MO 113, and an insulating film 405 (SiO 2 ) and a protective carbon film (C film) are formed on the TiN layer.
  • the layer thickness of TE111 is 60 nm
  • the layer thickness of two layers MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2 is 30 nm, respectively
  • the layer thickness of BE112 is 20 nm.
  • the concave portion point C in FIG. 2, contact hole
  • the concave portion is 100 nm ⁇ 100 nm when viewed in a plane.
  • the oxide layer (MO) 113 is a Ta oxide film on the lower electrode (BE) 112 side. Set a large resistivity.
  • the oxide layer (MO) 113 has an upper electrode TE (111) and a lower electrode (BE). It has the same structure as the area of the interface with 112.
  • one of the oxide layer MO1 (113-1) and the oxide layer MO2 (113-2) is 1000 mOhm ( Set m ⁇ ) cm or more and the other to less than 1000 mOhm (m ⁇ ) cm. Further, the oxide layer MO1 (113-1) and the oxide layer MO2 (113-2) may be arranged on either the upper or lower layer.
  • the resistivity of the oxide layer (MO) 113 has a positive correlation with x of TaOx, and the film thickness can be reduced.
  • MO1 (113-1) and MO2 (113-2) the oxide layer (TaOx-H) having a high resistivity has a film thickness of 20 to 20 when the x of TaOx is 2 or more and 2.2 or less.
  • x of 40 nm and TaOx exceeds 2.2, it can be set to 3 to 10 nm.
  • x of TaOx is less than 2.
  • the oxide layer (MO) 113 has two layers of MO1 (113-1) and MO2 under different conditions for the amount of oxygen in the reactive sputtering gas between MO1 (113-1) and MO2 (113-2). (113-2) and (113-2) are continuously formed into a film.
  • an annealing treatment may be performed in which the substrate is heated to 100 to 300 ° C. in a state of being assisted by radicals generated by applying RF power to argon gas containing oxygen.
  • x may be set to be larger than 2 on the side of MO1 (113-1) and MO2 (113-2) having a large amount of oxygen.
  • the pair of electrodes TE (111) and BE (112) are TiN, and the oxide layer (MO) 113 is TaOx, but the present invention is not limited to this.
  • the electrodes TE and BE can be appropriately selected from the metals of Pt, Au, Cu, TiAlN, TaN, W, Ir, and Ru, and the oxide layer MO can be HfOx, AlOx, SiOx, WOx, ZrOx in addition to TiOx.
  • These dielectrics and their compounds, or oxides and oxynitrides of electrodes can be selected.
  • the analog resistance changing element 100 forms a RAND 101 on a Si substrate 200.
  • a Drive voltage is applied to TE111 of RAND101, and BE112 is grounded.
  • the TiN film as the lower electrode (BE) 112 can be formed, for example, by reactive sputtering with Ar / N 2 gas using a Ti target. In addition, it can be formed by sputtering using a TiN ceramic target, chemical vapor deposition (CVD), and atomic layer deposition (ALD).
  • the lower electrode (BE) 112 is not limited to TiN, and TaN, W, Pt, and Ir may be used.
  • the lower electrode (BE) 112 is patterned by photolithography and reactive ion etching.
  • the entire front surface including the pattern of the lower electrode (BE) 112 is coated with the insulating film 305 of SiO 2 by CVD.
  • a hole structure (contact hole) C to be an element is formed on the insulating film (SiO 2) 305 on the lower electrode (BE) 112.
  • This hole structure C can be formed by lithography and etching on the insulating film 305.
  • the oxide layer (MO) 113 and the upper electrode 111 are patterned by lithography and reactive ion etching.
  • the entire front surface including the oxide layer (MO) 113 and the upper electrode 111 is coated with the insulating film 305 of SiO 2.
  • contact electrodes that are part of the upper electrode (TE) and the lower electrode (BE) are formed on the front surface, respectively.
  • the contact electrode has a Ti adhesion layer on the substrate side and an Au / Ti laminated structure in which Au is laminated on the Ti adhesion layer.
  • it can also be formed by a mixture of Au and Ti, Al or the like.
  • pattern drawing may be performed using a method such as electron beam lithography or nanoimprinting.
  • polishing processing by ion milling may be performed.
  • the element structure may be formed by lift-off, not limited to simply scraping.
  • a voltage fluctuation having a minute voltage height is superimposed on the drive voltage (Set / Reset pulse) for driving the analog resistance changing element 100 with respect to the voltage value of the drive voltage.
  • the voltage fluctuation can be sufficiently effective at a voltage sufficiently lower than the drive voltage, for example, a voltage value less than 1/10 of the drive voltage.
  • the voltage fluctuation superimposed on the drive signal is, for example, white noise or Gaussian noise that can be easily generated in an electronic circuit.
  • the frequency band (Bandwidth) is 30 MHz and the voltage amplitude (Amplitude) is 100 mVpp. (Peek to peak).
  • the type of voltage fluctuation may be, in addition to white noise, various waveforms such as repetition of a predetermined waveform, for example, a sine wave (sine wave), a triangular wave, or a square wave.
  • the voltage fluctuation is not limited as long as it gives a fluctuation to the drive pulse of the voltage that drives the resistance change. Further, it is desirable that the frequency of the voltage fluctuation has a time determined as the reciprocal thereof equal to or less than the drive pulse width.
  • FIG. 5 is a diagram showing a characteristic measurement result when voltage fluctuation is superimposed on the drive signal for the analog resistance changing element according to the embodiment.
  • the horizontal axis is time (number of pulses), and the vertical axis is current value ( ⁇ A).
  • the drive signal (pulse condition) supplied to the analog resistance changing element 100 was 1.95 V for Set, ⁇ 2.05 V for Set, and a cycle of 100 ns.
  • the voltage fluctuation superimposed on the drive signal is Gaussian Noise
  • the frequency band is 30 MHz
  • the voltage amplitude is 100 mVpp.
  • FIG. 5A shows a state in which only the drive signal is supplied to the analog resistance changing element 100 (that is, an existing drive state), and shows a state in which the drive voltage (Set / Reset) for three cycles is applied.
  • FIG. 5A shows a characteristic that the resistance is lowered by the Set pulse in one cycle and the current value is continuously increased correspondingly. Further, the resistance is increased by the Reset pulse, and the current value is continuously decreased.
  • This state is measured as a phenomenon in which the current value changes in a sawtooth shape with respect to the number of pulses on the horizontal axis.
  • the current change amount iOFF in the Set process and the Reset process is 1 ⁇ A or less. Further, it is shown that the amount of change in current, that is, the magnitude of change in analog resistance tends to increase as the pulsed voltage value increases as long as the element is not destroyed.
  • the current waveform for each of the applied pulses P1 to Pn is not continuous. High resistance may occur when a pulse is applied in the process of low resistance.
  • the current value repeatedly rises and falls each time a pulse is applied. For example, it is a disordered (irregular) waveform in which the current value rises in the pulse P2 after the pulse P1, the current value falls in the pulse P3, and then the current value rises in the pulse P4.
  • the current value does not rise (increase) smoothly in the Set process, but shows a discontinuous (irregular) change.
  • the current value does not smoothly decrease (decrease) and shows irregular changes as in the Set process.
  • FIG. 5B shows the characteristics when the voltage fluctuation is superimposed (ON) on the drive signal. It is shown that even in the drive signal (pulse condition) in which the current change amount iOFF is only 1 ⁇ A or less, the current change amount iON is increased by superimposing the voltage fluctuation with a slight fluctuation width of 100 mVpp.
  • the voltage (100 mVpp) applied as the voltage fluctuation is a voltage sufficiently lower than the drive voltage (Set: 1.95 V, Reset: -2.05 V), for example, a voltage value less than 1/10 of the drive voltage. Sufficient effect has been obtained.
  • the change state of the current value becomes smoother (continuous, one side of the serrated waveform) as shown in FIGS. 5 (b) and 5 (c) each time the measurement is repeated. Was observed to become flat).
  • the fluctuation width of the voltage fluctuation is larger than, for example, the current fluctuation value in the discontinuous waveform shown in the partial enlargement of FIG. 5 (a) (for example, the current fluctuation value when a pair of drive pulses P1-P2 is applied).
  • the current change in the Set process and the Reset process can be continuously performed. That is, the voltage fluctuation may be a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of the voltage required for the analog resistance change.
  • the resistance value of the analog resistance changing element 100 appears as the reciprocal of the change in the current value. Therefore, according to the embodiment, the change in the resistance value of the analog resistance changing element 100 can be smoothed by superimposing the voltage fluctuation on the drive signal. At the same time, the amount of current change can be increased.
  • a smooth resistance change can be obtained by removing noise of the resistance change component in the analog resistance change element 100, and the power consumption and speed of the product-sum circuit can be reduced and increased. Become.
  • FIG. 6 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment.
  • the voltage fluctuation application conditions were Gaussian Noise
  • the frequency band (Bandwidth) was 30 MHz
  • the voltage amplitude (Amplitude) was 100 mVpp.
  • the drive voltage (Set / Reset voltage) of the analog resistance changing element 100 is set to a lower voltage condition than the example (optimal condition) of FIG. 5, Set is 1.85 V, Set is -1. The cycle is .95V and 100ns.
  • FIG. 6A is a state in which the voltage fluctuation is superimposed on the drive signal (ON)
  • FIG. 6B is a state in which the voltage fluctuation is not superimposed on the drive signal (OFF).
  • the application of the drive voltage (Set / Reset) shows the state of 3 cycles (measured 13 times).
  • FIGS. 6 (c) to 6 (e) show a state in which the superimposition (ON) of the high voltage fluctuation is continued.
  • FIG. 6D shows a state in which the drive voltage is applied for 3 cycles (measured 15 times)
  • FIG. 6 (e) shows a state in which the drive voltage is applied for 8 cycles (measured 8 times).
  • FIG. 7 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment.
  • the conditions for applying the voltage fluctuation were a sine wave (Sin Noise), a frequency band (Bandwidth) of 30 MHz, and a voltage amplitude (Amplitude) of 100 mVpp.
  • FIG. 7 shows a state in which the superimposition of the voltage fluctuation shown in FIG. 7A is ON, and thereafter, FIG. 7B shows a state in which the superimposition of the voltage fluctuation is OFF and the superimposition is repeatedly turned ON / OFF. It should be noted that FIGS. 7 (f) and 7 (g) show a state in which ON is continued.
  • the drive voltage (Set / Reset voltage) of the analog resistance changing element 100 is set to a lower voltage condition than in the example of FIG. 6, Set is 1.80 V, Set is -1. The cycle is .85V and 200ns.
  • the analog resistance changing element 100 is used during the period when the voltage fluctuation superimposition is ON, regardless of whether the voltage fluctuation superimposition is continuously turned ON or ON / OFF is repeated. It has been shown that the change in the current value of can be a smooth and stable sawtooth waveform.
  • FIG. 8 and 9 are diagrams showing a mounting example of the analog resistance changing element of the embodiment.
  • FIG. 8 is a configuration example using the selection transistor 802, which is a typical circuit configuration used for a product-sum circuit or the like.
  • An analog resistance changing element 100 constituting a memory cell and a selection transistor 802 are connected between the bit line (BL) and the source line (SL).
  • the source of the selection transistor 802 is connected to the source line (SL), the drain is connected to one end of the analog resistance changing element 100, and the other end of the analog resistance changing element 100 is connected to the bit line (BL).
  • a drive driver (WL Driver) 801 is connected to the gate of the selection transistor 802 via a word line (WL).
  • the drive driver 801 superimposes and supplies a drive signal (Set / Reset pulse) and a voltage fluctuation to the selection transistor 802. That is, the drive driver can be configured by adding a function of generating the above-mentioned voltage fluctuation and superimposing it on the drive signal to the existing drive signal (Set / Reset pulse) generation function of 801.
  • the present invention does not depend on whether the resistance change is an analog type or a digital type. Therefore, even for a normal non-volatile memory, the voltage fluctuation is superimposed on the drive signal to make it non-volatile. It is effective in reducing the operating voltage of the non-volatile memory.
  • FIG. 9 is an example of a crosspoint type cell configuration, in which analog resistance changing elements 100 are arranged in a matrix at each crosspoint of a plurality of word lines (WL) and a plurality of bit lines (BL) intersecting each other.
  • the bit line decoder 902 selects one bit line (BL) corresponding to the supplied address
  • the word line decoder 903 selects one word line (WL).
  • the voltage pulse / fluctuation generation circuit 901 superimposes and supplies a drive signal (Set / Reset pulse) and a voltage fluctuation to the analog resistance changing element 100 selected on the cross point. That is, the voltage pulse / fluctuation generation circuit 901 can be configured by adding a function of generating the voltage fluctuation described above and superimposing it on the drive signal to the existing drive signal (Set / Reset pulse) generation function. Here, the voltage pulse / fluctuation generation circuit 901 may superimpose the voltage fluctuation on either the word line (WL) or the bit line (BL), or one of them.
  • a plurality of analog resistance changing elements are formed in RAND units, and an arbitrary analog resistance changing element 100 is selected for each cross point. And can be operated.
  • the present invention can be applied to various drive circuits having a function of superimposing voltage fluctuations on drive signals.
  • the voltage fluctuation is a voltage sufficiently lower than the drive voltage, for example, a voltage value less than 1/10 of the drive voltage, the power required to drive the analog resistance changing element 100 is reached.
  • the increase can be suppressed, and the increase in the power consumption of the drive circuit and the information processing device can be suppressed.
  • a drive method is used in which a drive pulse having a constant voltage is continuously applied to the analog resistance changing element 100 at a predetermined cycle.
  • the driving method of the analog resistance changing element 100 is different.
  • the applied voltage having a predetermined pulse width is varied from the initial value to the ending voltage for each predetermined step voltage.
  • the conditions for applying the drive pulse in the Set process are an initial value (Initial Voltage) of 1 V, a step voltage (Voltage Step) of 0.05 V, a supply pulse number (No. of Pulse) of 13, and an end voltage (Finish). Voltage) is 1.6 V, and the pulse width (Pulse Wid) is 5 ⁇ s.
  • initial value Initial Voltage
  • step voltage Voltage Step
  • supply pulse number No. of Pulse
  • Finish end voltage
  • Voltage is 1.6 V
  • the pulse width (Pulse Wid) is 5 ⁇ s.
  • the drive pulse in the Set process is 1 V for the analog resistance changing element 100 in the Reset state
  • the second pulse is 1.05 V, 1.1 V, ..., 1.55 V.
  • increases by 0.05V and the final pulse becomes 1.6V.
  • the voltage may be applied under the conditions for applying the drive pulse opposite to that in the Set process.
  • FIG. 10 is a chart showing the characteristic measurement results when the analog resistance changing element according to another embodiment is driven by another driving method.
  • the horizontal axis is the resistance value of the analog resistance changing element 100 under the application condition of the drive pulse (Resistance [k ⁇ ], and the vertical axis is the Weibull plot (Ln [Ln (1 / (1-F (R_i))). ]).
  • the analog resistance changing element 100 is in the low resistance state.
  • the measurement was repeated under the condition of the presence or absence of high frequency noise.
  • the resistance value at the time when the drive voltage was 1.3 V was weibull plotted, and the variation in the resistance value was evaluated.
  • Measurement is 1. No high frequency noise 50 times, 2. With high frequency noise (Gaussian noise 1 mV, 20 MHz) 55 times, 3. No high frequency noise 50 times, 4. It was set to 50 times with high frequency noise (Gaussian noise 1 mV, 2 MHz). 1.2.3.4. The reproducibility of the measurement was made by alternately performing the measurement in the order of, that is, the measurement without high frequency noise and with high frequency noise.
  • the driving condition is the condition with noise 2.4.
  • the condition without noise 1.3 It was clarified that the resistance distribution became smaller as the resistance became lower than that. As described above, the small resistance distribution makes it possible for the analog resistance changing element 100 of the other embodiment to suppress the current variation.
  • the voltage of the high frequency noise can be made lower than that of the above-described embodiment.
  • the drive pulse is about several V (for example, ⁇ 2 V), and the voltage fluctuation (high frequency noise) is about 1/10 of the drive pulse (for example, ⁇ 100 mV).
  • the drive pulse is several V (for example, ⁇ 1 V to ⁇ 1.6 V), while the voltage fluctuation (high frequency noise) is 1/1000 of the drive pulse (for example, ⁇ 1 mV), which is much lower. can do.
  • the resistance value corresponding to each step voltage is changed. Can be obtained with good reproducibility. For example, even if Set / Reset is repeated, when the drive pulse is 1.2V, a predetermined resistance value corresponding to this 1.2V can always be obtained.
  • the information processing apparatus includes an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes, and an analog resistance changing element. It is provided with a drive circuit that superimposes and supplies a voltage fluctuation having a fluctuation component on the drive signal. According to such a configuration, it becomes possible to suppress a sudden resistance change in the process of lowering the resistance (SET) and the process of increasing the resistance (RESET) when the analog resistance changing element is driven.
  • the drive circuit generates a drive pulse having a predetermined voltage as a drive signal, and as a voltage fluctuation, from the current fluctuation value in a discontinuous waveform generated when the resistance value of the analog resistance changing element changes based on the drive pulse.
  • the drive pulse has a constant voltage of about several V, and the voltage fluctuation can be a voltage of about 1/10 of the drive pulse.
  • the drive pulse may be about ⁇ 2 V, and the voltage fluctuation may be about ⁇ 100 mV at a frequency of 30 MHz, and the drive voltage can be suppressed.
  • the drive pulse is a voltage of about several V
  • the voltage can be varied from the initial voltage to the end voltage at a predetermined step voltage
  • the voltage fluctuation can be a voltage of about 1/1000 of the drive pulse.
  • the high frequency noise can be any of Gaussian noise, white noise, sine wave, triangular wave, and square wave. As described above, various general-purpose noises can be used as the voltage fluctuation.
  • the analog resistance changing element can be connected to the selection transistor in memory cell units, and the drive circuit can be configured to supply the drive signal in which the voltage fluctuation is superimposed to the selection transistor.
  • the analog resistance changing element is arranged at a plurality of cross points where the word line and the bit line intersect, the analog resistance changing element is driven and selected by the word line decoder and the bit line decoder, and the drive circuit is the word line decoder.
  • it can be configured to supply a drive signal in which voltage fluctuations are superimposed to one of the bit line decoders.
  • a plurality of analog resistance changing elements can be easily selectively driven by using a general-purpose circuit configuration.
  • the drive signal for driving the analog resistance change element is superposed with the voltage fluctuation and supplied, and the power consumption at the time of driving is reduced and the resistance change process is achieved.
  • Flattening can be achieved.
  • the noise of the resistance change component can be removed, the resistance change becomes smooth, and the power consumption and the speed of the product-sum circuit can be reduced and increased. Further, it becomes possible to simultaneously obtain low power consumption and high reliability of the analog resistance changing element.
  • the present invention can be applied to electronic devices and information processing devices equipped with artificial intelligence, particularly brain-type information processing devices used in the field of edge computing.

Abstract

This brain-type information processing device has an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes, and a drive circuit that superimposes and supplies voltage fluctuations that have fluctuation components on/to drive signals of the analog resistance changing element. By superimposing voltage fluctuations that cause current fluctuations in the drive signals, it is possible to minimize irregular resistance changes in a resistance-lowering (SET) process and in a resistance-raising (RESET) process during the driving of the analog resistance changing element. Due to the minimizing of the irregular resistance change characteristic, noise of the resistance change component can be removed, the resistance change becomes smooth, the power consumption of the brain-type information processing device can be reduced, and the speed of the device can be increased.

Description

情報処理装置および情報処理装置の駆動方法Information processing device and driving method of information processing device
 本発明は、情報処理装置および情報処理装置の駆動方法に関する。特に、アナログ抵抗変化素子を用いた脳型情報処理装置および脳型情報処理装置の駆動方法に関する。 The present invention relates to an information processing apparatus and a method for driving the information processing apparatus. In particular, the present invention relates to a brain-type information processing apparatus using an analog resistance changing element and a method for driving the brain-type information processing apparatus.
 IoT(Internet of Things)技術は、各種分野に適用されてきており、インターネットに流入するデータ量が加速度的に増大している。これにより、情報の収集および蓄積、解析、通信などのあらゆるプロセスにおいて消費される電力が大幅に増大する。 IoT (Internet of Things) technology has been applied to various fields, and the amount of data flowing into the Internet is increasing at an accelerating rate. This significantly increases the power consumed in all processes such as information collection and storage, analysis, and communication.
 従来のコンピュータのように、CPU(Central Prоcessing Unit)が都度メモリにアクセスして演算処理する場合、データ転送が律速となって消費電力の増大を抑制できない。近年のニューロコンピュータ(脳型情報処理装置、脳型回路)では、例えば、プロセッサとメモリが一体化されたインメモリ・コンピューティングにより、脳内の情報処理を模倣することで、演算効率が高く、消費電力を低減化できる。 When the CPU (Central Processing Unit) accesses the memory and performs arithmetic processing each time as in a conventional computer, the data transfer becomes rate-determining and the increase in power consumption cannot be suppressed. In recent neurocomputers (brain-type information processing devices, brain-type circuits), for example, in-memory computing in which a processor and memory are integrated is used to imitate information processing in the brain, resulting in high calculation efficiency. Power consumption can be reduced.
 脳型の情報処理では、例えば、神経細胞をモデル化し多入力1出力の素子とし、パーセプトロンにより入力のパターンを学習、あるいは推論する。脳型情報処理装置では、例えば、パーセプトロンにアナログ抵抗変化素子を用い、ワード線およびビット線でクロスバー接続させたアレイ構造を積和演算に用いる。アナログ抵抗変化素子は、メモリスタ、RAND(Resistive Analog Neuro Device)とも呼ばれる。 In brain-type information processing, for example, a nerve cell is modeled as a multi-input 1-output element, and an input pattern is learned or inferred by a perceptron. In the brain-type information processing apparatus, for example, an analog resistance changing element is used for the perceptron, and an array structure in which crossbars are connected by word lines and bit lines is used for the product-sum operation. The analog resistance changing element is also called a memristor or RAND (Resistive Analog Neuro Device).
 アナログ抵抗変化素子は、絶縁性の酸化物被膜への電圧印加で電流値が非線形に変化する抵抗スイッチ効果を有し、電流によって誘起される酸化還元反応により抵抗値がアナログ的に変化する。アナログ抵抗変化素子の低抵抗化(SET)過程、高抵抗化(RESET)過程は、所定電圧の駆動パルス印加によってもたらせる。 The analog resistance changing element has a resistance switch effect in which the current value changes non-linearly when a voltage is applied to the insulating oxide film, and the resistance value changes in an analog manner due to the redox reaction induced by the current. The process of lowering the resistance (SET) and the process of increasing the resistance (RESET) of the analog resistance changing element can be brought about by applying a drive pulse of a predetermined voltage.
 脳型情報処理システムの消費電力を低減するためには、パルス印加に必要な電力の低減や、アナログ抵抗変化を平坦化して、学習結果を反映する処理における修正回数の低減が求められている。ここにおいて平坦化とは、低抵抗化過程のパルス印加時に高抵抗化が起きてしまう、あるいは高抵抗化過程のパルス印加時に低抵抗化が起きてしまう事象が起きないことを意味する。一般的には、ノイズを低減する、あるいは、ノイズに対する耐性を高度化するという技術に包含されることもある。 In order to reduce the power consumption of the brain-type information processing system, it is required to reduce the power required for pulse application and to reduce the number of corrections in the process of reflecting the learning result by flattening the analog resistance change. Here, flattening means that an event that high resistance occurs when a pulse is applied in the low resistance process or low resistance occurs when a pulse is applied in the high resistance process does not occur. In general, it may be included in a technique for reducing noise or increasing resistance to noise.
 現在、アナログ抵抗変化素子の抵抗変化を平坦化、すなわち滑らかにする有効な技術は開示されていない。このため、本願発明には直接関連しないが、電子機器や情報処理装置における入力信号や電源出力のゆらぎ、あるいはノイズに対する耐性の強化により、データの信頼性を確保する技術を挙げておく。 Currently, no effective technique for flattening, that is, smoothing the resistance change of the analog resistance changing element is disclosed. Therefore, although not directly related to the present invention, a technique for ensuring data reliability by strengthening resistance to fluctuations in input signals and power output in electronic devices and information processing devices or noise will be mentioned.
 例えば、不揮発性メモリに対し、アドレスが連続する2つのページに割り当てられた異なるメモリセルに同一のデータを書き込むことで、隣接メモリセル相互間で発生するカップリングノイズ、およびこのカップリングノイズによるしきい値電圧の変動を抑える技術が開示されている(例えば、下記特許文献1参照。)。 For example, by writing the same data to different memory cells assigned to two pages with consecutive addresses for non-volatile memory, the coupling noise generated between adjacent memory cells and this coupling noise are used. A technique for suppressing fluctuations in the threshold voltage is disclosed (see, for example, Patent Document 1 below).
 また、外来ノイズに対する耐性が異なる不揮発性メモリセルおよび揮発性メモリセルに同じデータを書き込み、データの整合性を判断することで、セル領域の増大を伴うことなく、データの信頼性を向上させる技術が開示されている(例えば、下記特許文献2参照。)。 In addition, a technology that improves the reliability of data without increasing the cell area by writing the same data to non-volatile memory cells and volatile memory cells with different immunity to external noise and judging the integrity of the data. Is disclosed (see, for example, Patent Document 2 below).
 また、配線の交差部にメモリセルを設けたメモリセルアレイにおいて、メモリセルが縦列接続された2つのセルユニットを含み、縦列セルの両方のセルユニットが第2の状態でないときに第1の値を記憶した状態、縦列セルの一方のセルユニットのみが第2の状態であるときに第2の値を記憶した状態、縦列セルの両方のセルユニットが第2の状態であるときに第3の値を記憶した状態、となるよう縦列セルに状態遷移を生じる擾乱が発生しない電圧設定により、リテンション特性が良好な不揮発性を備えた技術が開示されている(例えば、下記特許文献3参照。)。 Further, in a memory cell array provided with memory cells at the intersection of wiring, when the memory cells include two cell units connected in columns and both cell units of the column cells are not in the second state, the first value is set. The stored state, the state in which the second value is stored when only one cell unit of the column cell is in the second state, and the third value when both cell units of the column cell are in the second state. Disclosed is a technique having non-volatility with good retention characteristics by setting a voltage that does not cause a disturbance that causes a state transition in a column cell so as to be in a memorized state (see, for example, Patent Document 3 below).
特開2008-234714号公報Japanese Unexamined Patent Publication No. 2008-234714 特開2009-217875号公報Japanese Unexamined Patent Publication No. 2009-217875 特開1113-161486号公報Japanese Unexamined Patent Publication No. 1113-161486
 特許文献1~3等に開示されているように、従来技術は、外来のノイズや擾乱の発生を抑制するにとどまっている。これら従来技術による外来のノイズ対策等を単に脳型情報処理システムに適用しても、パルス印加に必要な電力の低減、アナログ抵抗変化の平坦化を実現することはできない。 As disclosed in Patent Documents 1 to 3, etc., the prior art only suppresses the generation of external noise and disturbance. Even if these conventional techniques for external noise countermeasures are simply applied to a brain-type information processing system, it is not possible to reduce the power required for pulse application and flatten the change in analog resistance.
 脳型情報処理装置に用いるアナログ抵抗変化素子では、低抵抗化(SET)過程、および高抵抗化(RESET)過程をより省電力で行い、さらに抵抗変化を滑らかに平坦化する手段が望まれている。これらが実現できれば、例えば、脳型情報処理の基本的な構成要素である積和回路の低消費電力化や高速化が期待できる。 In an analog resistance changing element used in a brain-type information processing apparatus, a means for performing a low resistance (SET) process and a high resistance (RESET) process with higher power saving and further smoothing the resistance change is desired. There is. If these can be realized, for example, low power consumption and high speed of the product-sum circuit, which is a basic component of brain-type information processing, can be expected.
 本発明は、上記課題を解決するため、アナログ抵抗変化素子の低消費電力化と抵抗変化の平坦化を、簡単な構成で抑制できる情報処理装置および情報処理装置の駆動方法を得ることを目的とする。 In order to solve the above problems, it is an object of the present invention to obtain an information processing apparatus and a driving method of an information processing apparatus capable of suppressing power consumption reduction and resistance change flattening of an analog resistance changing element with a simple configuration. do.
 上記の課題を解決するために、本発明の情報処理装置は、一対の電極と、前記一対の電極間に設けられる酸化物層と、からなるアナログ抵抗変化素子と、前記アナログ抵抗変化素子の駆動信号にゆらぎ成分を有する電圧ゆらぎを重畳して供給する駆動回路と、を備えたことを特徴とする。 In order to solve the above problems, the information processing apparatus of the present invention comprises an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes, and driving the analog resistance changing element. It is characterized by being provided with a drive circuit that superimposes and supplies voltage fluctuations having a fluctuation component on a signal.
 また、前記駆動回路は、アナログ抵抗変化に必要な所定電圧の駆動パルスによってもたらされる素子の電流変化に比して、十分に小さな電流ゆらぎを生じさせる電圧ゆらぎを生成する、ことを特徴とする。 Further, the drive circuit is characterized in that it generates a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of a predetermined voltage required for the analog resistance change.
 また、前記駆動パルスは数V程度の一定電圧であり、前記ゆらぎは前記駆動パルスの1/10程度の電圧であることを特徴とする。 Further, the drive pulse is a constant voltage of about several V, and the fluctuation is a voltage of about 1/10 of the drive pulse.
 また、前記駆動パルスは、より好ましくは、IoT用電子デバイスに用いられる0.3V~5V程度の前記駆動パルスに対し、前記電圧ゆらぎはその1/10程度の電圧であることを特徴とする。 Further, the drive pulse is more preferably characterized in that the voltage fluctuation is about 1/10 of the drive pulse of about 0.3 V to 5 V used in the electronic device for IoT.
 また、前記駆動パルスは、数V程度の電圧であり、初期電圧から所定のステップ電圧で終了電圧まで電圧可変させ、前記電圧ゆらぎは前記駆動パルスの1/1000程度の電圧であることを特徴とする。 Further, the drive pulse has a voltage of about several V, and the voltage is variable from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation is about 1/1000 of the drive pulse. do.
 また、前記電圧ゆらぎは、ホワイトノイズや電子回路で発生させることが容易であるところのガウシアンノイズ、正弦波、三角波、矩形波、のいずれかであることを特徴とする。また、抵抗変化を駆動する電圧の駆動パルスに対してゆらぎをあたえるものであれば、この限りではない。また、電圧ゆらぎの周波数は、その逆数として定められる時間が、駆動パルス幅と同程度、あるいはそれ以下であることが望ましい。 Further, the voltage fluctuation is characterized by being any of white noise, Gaussian noise, which is easily generated by an electronic circuit, a sine wave, a triangular wave, and a square wave. Further, this does not apply as long as it gives fluctuations to the drive pulse of the voltage that drives the resistance change. Further, it is desirable that the frequency of the voltage fluctuation has a time determined as the reciprocal thereof equal to or less than the drive pulse width.
 また、前記アナログ抵抗変化素子は、メモリセル単位で選択トランジスタに接続され、前記駆動回路は、前記選択トランジスタに対し、前記電圧ゆらぎを重畳した前記駆動信号を供給する、ことを特徴とする。 Further, the analog resistance changing element is connected to a selection transistor in memory cell units, and the drive circuit supplies the selection transistor with the drive signal superimposed with the voltage fluctuation.
 また、前記アナログ抵抗変化素子は、ワード線およびビット線が交差する複数のクロスポイントにそれぞれ配置され、ワード線デコーダおよびビット線デコーダにより前記アナログ抵抗変化素子が駆動選択され、前記駆動回路は、前記ワード線デコーダあるいは前記ビット線デコーダのうち一方に対し、前記電圧ゆらぎを重畳した前記駆動信号を供給する、ことを特徴とする。 Further, the analog resistance changing element is arranged at a plurality of cross points where the word line and the bit line intersect, and the analog resistance changing element is driven and selected by the word line decoder and the bit line decoder, and the drive circuit is the drive circuit. It is characterized in that the drive signal in which the voltage fluctuation is superimposed is supplied to either the word line decoder or the bit line decoder.
 また、本発明の情報処理装置の駆動方法は、一対の電極と、前記一対の電極間に設けられる酸化物層と、からなるアナログ抵抗変化素子を駆動する駆動信号に、ゆらぎ成分を有する電圧を重畳する、ことを特徴とする。 Further, in the driving method of the information processing apparatus of the present invention, a voltage having a fluctuation component is applied to a driving signal for driving an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes. It is characterized by overlapping.
 また、前記駆動信号は、アナログ抵抗変化に必要な電圧の駆動パルスによってもたらされる素子の電流変化に比して、十分に小さな電流ゆらぎを生じさせる電圧ゆらぎであることを特徴とする。 Further, the drive signal is characterized in that it is a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of the voltage required for the analog resistance change.
 また、前記駆動パルスは数V程度の一定電圧であり、前記電圧ゆらぎは前記駆動パルスの1/10程度の電圧であることを特徴とする。 Further, the drive pulse is a constant voltage of about several V, and the voltage fluctuation is a voltage of about 1/10 of the drive pulse.
 また、前記駆動パルスは、数V程度の電圧であり、初期電圧から所定のステップ電圧で終了電圧まで電圧可変させ、前記電圧ゆらぎは、前記駆動パルスの1/1000程度の電圧であることを特徴とする。 Further, the drive pulse has a voltage of about several V, and the voltage is variable from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation is characterized by a voltage of about 1/1000 of the drive pulse. And.
 上記のように、アナログ抵抗変化素子を駆動する駆動信号にゆらぎ成分を有する電圧を重畳して供給することで、より大きな抵抗変化を実現する。すなわち、より低い電圧の駆動パルスで抵抗変化を生じさせることができるので、低消費電力化が実現される。また、低抵抗化(SET)過程、および高抵抗化(RESET)過程の平坦化を実現する。抵抗変化が滑らかになることで制御性が高まり、脳型情報処理過程における修正処理、例えば、素子や回路に対する各種エラー訂正の効率化が図られ、結果として脳型情報処理回路の低消費電力化と高速化を実現することができる。駆動信号は、一定電圧の駆動パルスを連続的に印加する方法のほか、駆動パルスの電圧をステップ電圧ごとに可変して印加することができる。 As described above, a larger resistance change is realized by superimposing a voltage having a fluctuation component on the drive signal that drives the analog resistance change element. That is, the resistance can be changed by the drive pulse of a lower voltage, so that the power consumption can be reduced. In addition, the flattening of the low resistance (SET) process and the high resistance (RESET) process is realized. Smooth resistance changes improve controllability, improve the efficiency of correction processing in the brain-type information processing process, for example, correction of various errors for elements and circuits, and as a result, reduce the power consumption of the brain-type information processing circuit. And high speed can be realized. As the drive signal, in addition to the method of continuously applying a drive pulse of a constant voltage, the voltage of the drive pulse can be variably applied for each step voltage.
 本発明によれば、アナログ抵抗変化素子の低消費電力化と、抵抗変化の平坦化を、簡単な構造で実現できるという効果を奏する。 According to the present invention, it is possible to reduce the power consumption of the analog resistance changing element and to flatten the resistance change with a simple structure.
図1は、実施の形態にかかる抵抗変化素子の構造例を示す図である。FIG. 1 is a diagram showing a structural example of a resistance changing element according to an embodiment. 図2は、実施の形態にかかる情報処理装置が有するアナログ抵抗変化素子の構造例を示す平面図である。FIG. 2 is a plan view showing a structural example of an analog resistance changing element included in the information processing apparatus according to the embodiment. 図3は、図2のC点部分に位置するコンタクトホール部分の断面図である。FIG. 3 is a cross-sectional view of a contact hole portion located at the C point portion of FIG. 図4は、図3に示す酸化物層部分を拡大した断面TEM像を示す図である。FIG. 4 is a diagram showing an enlarged cross-sectional TEM image of the oxide layer portion shown in FIG. 図5は、実施の形態にかかるアナログ抵抗変化素子の駆動信号に電圧ゆらぎを重畳した場合の特性測定結果を示す図表である。FIG. 5 is a chart showing a characteristic measurement result when voltage fluctuation is superimposed on the drive signal of the analog resistance changing element according to the embodiment. 図6は、実施の形態にかかる電圧ゆらぎの重畳効果の再現性を説明する図表である。(その1)FIG. 6 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment. (Part 1) 図7は、実施の形態にかかる電圧ゆらぎの重畳効果の再現性を説明する図表である。(その2)FIG. 7 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment. (Part 2) 図8は、実施の形態のアナログ抵抗変化素子の実装例を示す図である。(その1)FIG. 8 is a diagram showing a mounting example of the analog resistance changing element of the embodiment. (Part 1) 図9は、実施の形態のアナログ抵抗変化素子の実装例を示す図である。(その2)FIG. 9 is a diagram showing a mounting example of the analog resistance changing element of the embodiment. (Part 2) 図10は、他の実施の形態にかかるアナログ抵抗変化素子を他の駆動方法で駆動した場合の特性測定結果を示す図表である。FIG. 10 is a chart showing characteristic measurement results when the analog resistance changing element according to another embodiment is driven by another driving method.
 図1は、実施の形態にかかるRANDの構造例を示す図である。RAND101は、絶縁性の酸化物層を電極で挟んだ構造からなる。例えば、上部電極(TE)111と、下部電極(BE)112は、それぞれ窒化チタンTiNであり、酸化物層(MO)113は、TaOx(酸化タンタル)である。 FIG. 1 is a diagram showing an example of the structure of RAND according to the embodiment. RAND101 has a structure in which an insulating oxide layer is sandwiched between electrodes. For example, the upper electrode (TE) 111 and the lower electrode (BE) 112 are titanium nitride TiN, respectively, and the oxide layer (MO) 113 is TaOx (tantalum pentoxide).
 酸化物層(MO)113は、1層あるいは2層以上の複数の層を有する。図2の例では、MO113は、MO1(TaOx-L)113-1と、MO2(TaOx-H)113-2の2層で構成している。TaOx-L、TaOx-Hは抵抗率が異なるTa酸化膜であり、抵抗率は、TaOx-L<TaOx-Hである。 The oxide layer (MO) 113 has one layer or a plurality of layers of two or more. In the example of FIG. 2, the MO 113 is composed of two layers, MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2. TaOx-L and TaOx-H are Ta oxide films having different resistivityes, and the resistivity is TaOx-L <TaOx-H.
 酸化物層(MO)113を複数の抵抗率の層とすることで、より所望する抵抗変化特性を得ることができるようになる。 By forming the oxide layer (MO) 113 as a layer having a plurality of resistivity, more desired resistance change characteristics can be obtained.
 RAND101における抵抗変化は、電流によって誘起される酸化還元反応に基づく。RANDは、低抵抗化(Set)の過程でコンダクタンスが増加し、高抵抗化(Reset)の過程でコンダクタンスが減少する。 The resistance change in RAND101 is based on the redox reaction induced by the current. In RAND, the conductance increases in the process of lowering the resistance (Set), and the conductance decreases in the process of increasing the resistance (Reset).
 例えば、低抵抗化したRAND101の下部電極(BE)112に正電圧を印加すると、酸化物層MO113内で酸素イオンが移動し、酸化が進むことでMO2層が高抵抗化し、RAND101全体ではコンダクタンスが減少する。 For example, when a positive voltage is applied to the lower electrode (BE) 112 of the RAND 101 having a low resistance, oxygen ions move in the oxide layer MO 113, and oxidation progresses to increase the resistance of the MO2 layer, resulting in increased conductance in the entire RAND 101. Decrease.
 図2は、実施の形態にかかる情報処理装置が有するアナログ抵抗変化素子の構造例を示す平面図である。アナログ抵抗変化素子100は、Si基板200上にRAND101が配置される。RAND101のTE111にはDrive電圧が印加される。 FIG. 2 is a plan view showing a structural example of an analog resistance changing element included in the information processing apparatus according to the embodiment. In the analog resistance changing element 100, the RAND 101 is arranged on the Si substrate 200. A Drive voltage is applied to TE111 of RAND101.
 RAND101のTE111とBE112との間には酸化物層(MO)113が設けられる。MO113は、図2のB点-C点間に位置する。RAND101のBE112は、接地(GND)に接続される。 An oxide layer (MO) 113 is provided between TE111 and BE112 of RAND101. MO113 is located between points B and C in FIG. BE112 of RAND101 is connected to ground (GND).
 図3は、図2のC点部分に位置するコンタクトホール部分の断面図である。 FIG. 3 is a cross-sectional view of a contact hole portion located at point C in FIG. 2.
 図3の断面図において、Si基板200上には、100nmの熱酸化膜(SiO2)300が形成されている。例えば、100nmの熱酸化膜付きSi基板200を用いることができる。熱酸化膜付きSi基板200上には、RAND101のBE112が設けられる。このBE112上には、酸化物層(MO)113として図1に示した抵抗率が異なる2層のMO1(TaOx-L)113-1と、MO2(TaOx-H)113-2が設けられる。Si基板200上には、酸化シリコン(SiO2)等の絶縁膜305が設けられ、この絶縁膜305は、BE112とMO113の間に設けられ、また、TE111上を被覆する。なお、不図示であるが、TE111の一部、およびBE112の一部は、それぞれ絶縁膜305のおもて面上まで導出されている。 In the cross-sectional view of FIG. 3, a 100 nm thermal oxide film (SiO 2 ) 300 is formed on the Si substrate 200. For example, a Si substrate 200 with a thermal oxide film of 100 nm can be used. BE112 of RAND101 is provided on the Si substrate 200 with a thermal oxide film. Two layers of MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2 having different resistivity as shown in FIG. 1 are provided on the BE 112 as the oxide layer (MO) 113. An insulating film 305 such as silicon oxide (SiO 2 ) is provided on the Si substrate 200, and the insulating film 305 is provided between the BE 112 and the MO 113 and covers the TE 111. Although not shown, a part of TE111 and a part of BE112 are derived to the front surface of the insulating film 305, respectively.
 図3に示すMO113は、2層のMO113-1,113-2からなり、C点に凹部(コンタクトホール)を有し、BE112に接合されている。RAND101は、図2のA点~E点にわたる1つの回路系を形成する。 MO113 shown in FIG. 3 is composed of two layers of MO113-1 and 113-2, has a recess (contact hole) at point C, and is joined to BE112. RAND101 forms one circuit system from point A to point E in FIG.
 図4は、図3に示す酸化物層部分を拡大した断面TEM像を示す図である。透過型電子顕微鏡TEM(Transmission Electron Microscope)の撮像画像を示し、図3のC点部分の酸化物層113を拡大した状態である。BE1,BE2(112)に相当するTiN層上に、酸化物層(MO)113として2層のMO1(TaOx-L)113-1と、MO2(TaOx-H)113-2が積層されている。 FIG. 4 is a diagram showing an enlarged cross-sectional TEM image of the oxide layer portion shown in FIG. An image taken by a transmission electron microscope TEM (Transmission Electron Microscope) is shown, and the oxide layer 113 at the point C portion in FIG. 3 is enlarged. Two layers of MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2 are laminated as an oxide layer (MO) 113 on a TiN layer corresponding to BE1 and BE2 (112). ..
 酸化物層(MO)113は、所望の抵抗値が得られるように適宜選択することができる。このMO113上には、TE111に相当するTiN層が積層され、この上に絶縁膜405(SiO2)と、保護用のカーボン膜(C膜)が形成される。 The oxide layer (MO) 113 can be appropriately selected so as to obtain a desired resistance value. A TiN layer corresponding to TE111 is laminated on the MO 113, and an insulating film 405 (SiO 2 ) and a protective carbon film (C film) are formed on the TiN layer.
 例えば、TE111の層厚は60nm、2層のMO1(TaOx-L)113-1と、MO2(TaOx-H)113-2の層厚はそれぞれ30nm、BE112の層厚は20nmである。また、例えば、凹部(図2のC点、コンタクトホール)は平面でみて100nm×100nmである。 For example, the layer thickness of TE111 is 60 nm, the layer thickness of two layers MO1 (TaOx-L) 113-1 and MO2 (TaOx-H) 113-2 is 30 nm, respectively, and the layer thickness of BE112 is 20 nm. Further, for example, the concave portion (point C in FIG. 2, contact hole) is 100 nm × 100 nm when viewed in a plane.
 アナログ抵抗変化素子100を上述したホール構造(コンタクトホール)Cで下部電極BE(112)に接合形成した場合、例えば、酸化物層(MO)113は、下部電極(BE)112側のTa酸化膜の抵抗率を大きく設定する。 When the analog resistivity changing element 100 is bonded to the lower electrode BE (112) with the hole structure (contact hole) C described above, for example, the oxide layer (MO) 113 is a Ta oxide film on the lower electrode (BE) 112 side. Set a large resistivity.
 一方、ホール構造Cを有さない酸化物層(MO)113の構造、たとえば、図2に記載した構造では、酸化物層(MO)113は、上部電極TE(111)および下部電極(BE)112との界面の面積が同じ構造である。 On the other hand, in the structure of the oxide layer (MO) 113 having no hole structure C, for example, in the structure shown in FIG. 2, the oxide layer (MO) 113 has an upper electrode TE (111) and a lower electrode (BE). It has the same structure as the area of the interface with 112.
 図1に記載したホール構造Cを有さない酸化物層(MO)113の構造では、例えば、酸化物層MO1(113-1)と、酸化物層MO2(113-2)の一方を1000mOhm(mΩ)cm以上、他方を1000mOhm(mΩ)cm未満に設定する。また、酸化物層MO1(113-1)と、酸化物層MO2(113-2)は上下層のいずれに配置してもよい。 In the structure of the oxide layer (MO) 113 having no hole structure C described in FIG. 1, for example, one of the oxide layer MO1 (113-1) and the oxide layer MO2 (113-2) is 1000 mOhm ( Set mΩ) cm or more and the other to less than 1000 mOhm (mΩ) cm. Further, the oxide layer MO1 (113-1) and the oxide layer MO2 (113-2) may be arranged on either the upper or lower layer.
 酸化物層(MO)113の抵抗率は、TaOxのxと正の相関があり、膜厚を薄くすることができる。例えば、MO1(113-1)、MO2(113-2)のうち、抵抗率が高い酸化物層(TaOx-H)は、TaOxのxが2以上2.2以下の場合、膜厚を20~40nm、TaOxのxが2.2を超える場合は、3~10nmに設定することができる。一方、抵抗率が低い酸化物層(TaOx-L)は、TaOxのxが2未満となる。 The resistivity of the oxide layer (MO) 113 has a positive correlation with x of TaOx, and the film thickness can be reduced. For example, among MO1 (113-1) and MO2 (113-2), the oxide layer (TaOx-H) having a high resistivity has a film thickness of 20 to 20 when the x of TaOx is 2 or more and 2.2 or less. When x of 40 nm and TaOx exceeds 2.2, it can be set to 3 to 10 nm. On the other hand, in the oxide layer (TaOx-L) having a low resistivity, x of TaOx is less than 2.
 酸化物層(MO)113は、反応性スパッタリングガス中の酸素の量をMO1(113-1)と、MO2(113-2)とで異なる条件とし、2層のMO1(113-1)とMO2(113-2)とを連続して成膜する。このほか、酸素を含むアルゴンガスにRF電力を印加して発生したラジカルによりアシストされた状態で、基板を100~300℃に加熱するアニール処理をおこなってもよい。また、酸化物層(MO)113は、MO1(113-1)、MO2(113-2)のうち酸素が多い側はxを2より大きく設定すればよい。 The oxide layer (MO) 113 has two layers of MO1 (113-1) and MO2 under different conditions for the amount of oxygen in the reactive sputtering gas between MO1 (113-1) and MO2 (113-2). (113-2) and (113-2) are continuously formed into a film. In addition, an annealing treatment may be performed in which the substrate is heated to 100 to 300 ° C. in a state of being assisted by radicals generated by applying RF power to argon gas containing oxygen. Further, in the oxide layer (MO) 113, x may be set to be larger than 2 on the side of MO1 (113-1) and MO2 (113-2) having a large amount of oxygen.
 上記の構成例では、一対の電極TE(111),BE(112)をTiNとし、酸化物層(MO)113をTaOxとしたが、これに限らない。例えば、電極TE,BEは、Pt、Au、Cu、TiAlN、TaN、W、Ir、Ruの金属から適宜選定でき、酸化物層MOについてもTiOxのほかに、HfOx、AlOx、SiOx、WOx、ZrOxらの誘電体とこれらの化合物、あるいは電極の酸化物や酸窒化物を選定できる。 In the above configuration example, the pair of electrodes TE (111) and BE (112) are TiN, and the oxide layer (MO) 113 is TaOx, but the present invention is not limited to this. For example, the electrodes TE and BE can be appropriately selected from the metals of Pt, Au, Cu, TiAlN, TaN, W, Ir, and Ru, and the oxide layer MO can be HfOx, AlOx, SiOx, WOx, ZrOx in addition to TiOx. These dielectrics and their compounds, or oxides and oxynitrides of electrodes can be selected.
 次に、アナログ抵抗変化素子100(RAND101)の製造方法を簡単に説明しておく。アナログ抵抗変化素子100は、Si基板200上にRAND101を形成する。RAND101のTE111にはDrive電圧が印加され、BE112は接地される。 Next, the manufacturing method of the analog resistance changing element 100 (RAND101) will be briefly described. The analog resistance changing element 100 forms a RAND 101 on a Si substrate 200. A Drive voltage is applied to TE111 of RAND101, and BE112 is grounded.
 下部電極(BE)112としてのTiN膜は、例えば、Tiターゲットを使用してAr/N2ガスによる反応性スパッタリングで形成できる。このほか、TiNセラミックスターゲットを使用したスパッタリング、化学気相成長(CVD:Chemical Vapor Deposition)、原子層堆積(ALD:Atomic Layer Deposition)で形成することもできる。下部電極(BE)112は、TiNに限らず、TaNや、W、Pt、Irを用いてもよい。 The TiN film as the lower electrode (BE) 112 can be formed, for example, by reactive sputtering with Ar / N 2 gas using a Ti target. In addition, it can be formed by sputtering using a TiN ceramic target, chemical vapor deposition (CVD), and atomic layer deposition (ALD). The lower electrode (BE) 112 is not limited to TiN, and TaN, W, Pt, and Ir may be used.
 つぎに、フォトリソグラフィと反応性イオンエッチングにより下部電極(BE)112をパターン形成する。つぎに、例えば、CVDにより下部電極(BE)112のパターンを含むおもて面全面をSiO2の絶縁膜305で被膜する。 Next, the lower electrode (BE) 112 is patterned by photolithography and reactive ion etching. Next, for example, the entire front surface including the pattern of the lower electrode (BE) 112 is coated with the insulating film 305 of SiO 2 by CVD.
 つぎに、下部電極(BE)112上の絶縁膜(SiO2)305上に、素子となるホール構造(コンタクトホール)Cを形成する。このホール構造Cは、絶縁膜305に対するリソグラフィとエッチングにより形成できる。 Next, a hole structure (contact hole) C to be an element is formed on the insulating film (SiO 2) 305 on the lower electrode (BE) 112. This hole structure C can be formed by lithography and etching on the insulating film 305.
 つぎに、ホール構造(コンタクトホール)Cが形成された絶縁膜305上に酸化物層(MO)113として抵抗率の異なる2層のMO1(113-1)と、MO2(113-2)を膜形成し、その上に上部電極(TE)111の一部となる上部電極層111を成膜する。 Next, two layers of MO1 (113-1) and MO2 (113-2) having different resistivity as an oxide layer (MO) 113 are formed on the insulating film 305 in which the hole structure (contact hole) C is formed. An upper electrode layer 111 that is formed and becomes a part of the upper electrode (TE) 111 is formed on the upper electrode layer 111.
 つぎに、酸化物層(MO)113および上部電極111をリソグラフィと反応性イオンエッチングによりパターン形成する。つぎに、酸化物層(MO)113および上部電極111を含むおもて面全面をSiO2の絶縁膜305で被膜する。 Next, the oxide layer (MO) 113 and the upper electrode 111 are patterned by lithography and reactive ion etching. Next, the entire front surface including the oxide layer (MO) 113 and the upper electrode 111 is coated with the insulating film 305 of SiO 2.
 つぎに、絶縁膜305に対するエッチング加工後、上部電極(TE)および下部電極(BE)の一部となるコンタクト電極をおもて面にそれぞれ形成する。コンタクト電極は、基板側にTi密着層、このTi密着層上にAuを積層したAu/Ti積層構造を有する。このほか、AuとTiの混合物、あるいはAl等でも形成できる。 Next, after etching the insulating film 305, contact electrodes that are part of the upper electrode (TE) and the lower electrode (BE) are formed on the front surface, respectively. The contact electrode has a Ti adhesion layer on the substrate side and an Au / Ti laminated structure in which Au is laminated on the Ti adhesion layer. In addition, it can also be formed by a mixture of Au and Ti, Al or the like.
 上記の製造方法では、フォトリソグラフィを用いる例を説明した。これに限らず、電子ビームリソグラフィやナノインプリンティング等の手法を用いたパターン描画を行ってもよい。また、反応性イオンエッチング過程における化学反応によるダメージを防ぐ必要がある場合には、イオンミリングによる研磨加工を行ってもよい。さらには、単に削るに限らず、リフトオフで素子構造を形成してもよい。 In the above manufacturing method, an example using photolithography was described. Not limited to this, pattern drawing may be performed using a method such as electron beam lithography or nanoimprinting. Further, when it is necessary to prevent damage due to a chemical reaction in the reactive ion etching process, polishing processing by ion milling may be performed. Further, the element structure may be formed by lift-off, not limited to simply scraping.
(アナログ抵抗変化素子に対する駆動信号への電圧ゆらぎの重畳について)
 実施の形態では、アナログ抵抗変化素子100を駆動する駆動電圧(Set/Resetパルス)に対し、この駆動電圧の電圧値に対し微小な電圧高さを持つ電圧ゆらぎを重畳する。電圧ゆらぎは、駆動電圧よりも十分に低い電圧、例えば、駆動電圧の1/10に満たない電圧値で十分な効果を得ることができる。
(About the superimposition of voltage fluctuation on the drive signal for the analog resistance changing element)
In the embodiment, a voltage fluctuation having a minute voltage height is superimposed on the drive voltage (Set / Reset pulse) for driving the analog resistance changing element 100 with respect to the voltage value of the drive voltage. The voltage fluctuation can be sufficiently effective at a voltage sufficiently lower than the drive voltage, for example, a voltage value less than 1/10 of the drive voltage.
 従来技術で説明したように、電子機器、情報処理装置に関して、入力信号や電源出力のゆらぎ、あるいはノイズに対する耐性を強化するための技術は数多く開示されている。これら従来技術は、ノイズ等の外乱の影響を除去する技術である。これに対し、発明者らはアナログ抵抗変化素子100の駆動信号に対し、積極的に電圧ゆらぎを重畳することで、低消費電力化と、抵抗変化過程の平坦化が実現されることを見出した。 As explained in the prior art, many technologies for enhancing the resistance to fluctuations in input signals and power output or noise have been disclosed for electronic devices and information processing devices. These conventional techniques are techniques for removing the influence of disturbance such as noise. On the other hand, the inventors have found that power consumption can be reduced and the resistance change process can be flattened by positively superimposing voltage fluctuations on the drive signal of the analog resistance change element 100. ..
 駆動信号に重畳する電圧ゆらぎは、例えば、ホワイトノイズや電子回路で発生させることが容易であるガウシアンノイズ(Gaussian Noise)であり、例えば、周波数帯域(Bandwidth)が30MHz、電圧振幅(Amplitude)が100mVpp(peak to peak)である。電圧ゆらぎの種別としては、ホワイトノイズの他、所定波形の繰り返し、例えば、正弦波(サイン波)、三角波、矩形波等各種波形であってもよい。電圧ゆらぎは、抵抗変化を駆動する電圧の駆動パルスに対してゆらぎをあたえるものであれば、この限りではない。また、電圧ゆらぎの周波数は、その逆数として定められる時間が、駆動パルス幅と同程度、あるいはそれ以下であることが望ましい。 The voltage fluctuation superimposed on the drive signal is, for example, white noise or Gaussian noise that can be easily generated in an electronic circuit. For example, the frequency band (Bandwidth) is 30 MHz and the voltage amplitude (Amplitude) is 100 mVpp. (Peek to peak). The type of voltage fluctuation may be, in addition to white noise, various waveforms such as repetition of a predetermined waveform, for example, a sine wave (sine wave), a triangular wave, or a square wave. The voltage fluctuation is not limited as long as it gives a fluctuation to the drive pulse of the voltage that drives the resistance change. Further, it is desirable that the frequency of the voltage fluctuation has a time determined as the reciprocal thereof equal to or less than the drive pulse width.
(電圧ゆらぎ重畳による特性測定結果)
 つぎに、アナログ抵抗変化素子100に対し駆動信号に電圧ゆらぎを重畳した場合の特性測定結果について説明する。
(Characteristic measurement results due to voltage fluctuation superimposition)
Next, the characteristic measurement result when the voltage fluctuation is superimposed on the drive signal for the analog resistance changing element 100 will be described.
 図5は、実施の形態にかかるアナログ抵抗変化素子に対する駆動信号に電圧ゆらぎを重畳した場合の特性測定結果を示す図表である。横軸は時間(パルス数)、縦軸は電流値(μA)である。アナログ抵抗変化素子100に供給する駆動信号(パルス条件)は、Setが1.95V、Resetが-2.05V、100ns周期とした。この図5において、駆動信号に重畳する電圧ゆらぎは、Gaussian Noiseであり、周波数帯域は30MHz、電圧振幅は100mVppとした。 FIG. 5 is a diagram showing a characteristic measurement result when voltage fluctuation is superimposed on the drive signal for the analog resistance changing element according to the embodiment. The horizontal axis is time (number of pulses), and the vertical axis is current value (μA). The drive signal (pulse condition) supplied to the analog resistance changing element 100 was 1.95 V for Set, −2.05 V for Set, and a cycle of 100 ns. In FIG. 5, the voltage fluctuation superimposed on the drive signal is Gaussian Noise, the frequency band is 30 MHz, and the voltage amplitude is 100 mVpp.
 図5(a)は、アナログ抵抗変化素子100に駆動信号のみを供給した状態(すなわち、既存の駆動状態)であり、3周期分の駆動電圧(Set/Reset)の印加状態を示している。図5(a)に示すように、1周期中のSetパルスによって低抵抗化が進み、対応して電流値が連続的に上昇する特性を示す。また、Resetパルスによって高抵抗化が進み、電流値が連続的に減少する。この様子は、電流値を横軸としたパルス回数に対して、鋸歯状に変化するという現象として測定される。Set過程およびReset過程での電流変化量iOFFは1μA以下である。また、この電流変化量、即ちアナログ抵抗変化の大きさは、素子が破壊されない範囲であれば、パルス状の電圧値が大きいほどに大きくなる傾向が示されている。 FIG. 5A shows a state in which only the drive signal is supplied to the analog resistance changing element 100 (that is, an existing drive state), and shows a state in which the drive voltage (Set / Reset) for three cycles is applied. As shown in FIG. 5A, it shows a characteristic that the resistance is lowered by the Set pulse in one cycle and the current value is continuously increased correspondingly. Further, the resistance is increased by the Reset pulse, and the current value is continuously decreased. This state is measured as a phenomenon in which the current value changes in a sawtooth shape with respect to the number of pulses on the horizontal axis. The current change amount iOFF in the Set process and the Reset process is 1 μA or less. Further, it is shown that the amount of change in current, that is, the magnitude of change in analog resistance tends to increase as the pulsed voltage value increases as long as the element is not destroyed.
 図5(a)に示した既存の駆動状態の波形を部分拡大してみると、印加するパルスP1~Pn毎の電流波形は連続的になっていない。低抵抗化過程のパルス印加時に高抵抗化が起きてしまう場合がある。部分拡大したSet過程においては、パルス印加ごとに電流値が上昇及び下降を繰り返している。例えば、パルスP1後のパルスP2で電流値が上昇した後、パルスP3で電流値が下降し、その後、パルスP4で電流値が上昇する、という乱れた(不規則な)波形となっている。 When the waveform of the existing drive state shown in FIG. 5A is partially enlarged, the current waveform for each of the applied pulses P1 to Pn is not continuous. High resistance may occur when a pulse is applied in the process of low resistance. In the partially expanded Set process, the current value repeatedly rises and falls each time a pulse is applied. For example, it is a disordered (irregular) waveform in which the current value rises in the pulse P2 after the pulse P1, the current value falls in the pulse P3, and then the current value rises in the pulse P4.
 このように、Set過程で電流値は滑らかには上昇(増加)せずに非連続的な(不規則な)変化を示している。Reset過程においても、Set過程と同様に、電流値は滑らかには下降(減少)せず不規則な変化を示している。 In this way, the current value does not rise (increase) smoothly in the Set process, but shows a discontinuous (irregular) change. In the Reset process as well, the current value does not smoothly decrease (decrease) and shows irregular changes as in the Set process.
 図5(b)には、駆動信号に電圧ゆらぎを重畳(ON)した場合の特性を示す。電流変化量iOFFが1μA以下にしかならない駆動信号(パルス条件)においても、100mVppというわずかな振れ幅の電圧ゆらぎを重畳することで電流変化量iONが大きくなったことが示されている。この場合、電圧ゆらぎとして印加する電圧(100mVpp)は、駆動電圧(Setが1.95V、Resetが-2.05V)よりも十分に低い電圧、例えば、駆動電圧の1/10に満たない電圧値で十分な効果が得られている。そして、図5に示すパルス条件では、測定を重ねるたびに、図5(b)、図5(c)に示すように、電流値の変化状態がより滑らか(連続的で、鋸歯状波形の一辺が平坦に)になっていく様子が観察された。 FIG. 5B shows the characteristics when the voltage fluctuation is superimposed (ON) on the drive signal. It is shown that even in the drive signal (pulse condition) in which the current change amount iOFF is only 1 μA or less, the current change amount iON is increased by superimposing the voltage fluctuation with a slight fluctuation width of 100 mVpp. In this case, the voltage (100 mVpp) applied as the voltage fluctuation is a voltage sufficiently lower than the drive voltage (Set: 1.95 V, Reset: -2.05 V), for example, a voltage value less than 1/10 of the drive voltage. Sufficient effect has been obtained. Then, under the pulse conditions shown in FIG. 5, the change state of the current value becomes smoother (continuous, one side of the serrated waveform) as shown in FIGS. 5 (b) and 5 (c) each time the measurement is repeated. Was observed to become flat).
 電圧ゆらぎの振れ幅は、例えば、図5(a)の部分拡大に示した非連続的な波形での電流変動値(例えば、一対の駆動パルスP1-P2印加時の電流変動値)よりも大きく設定することで、Set過程およびReset過程での電流変化を連続的にできるようになる。すなわち、電圧ゆらぎは、アナログ抵抗変化に必要な電圧の駆動パルスによってもたらされる素子の電流変化に比して、十分に小さな電流ゆらぎを生じさせる電圧ゆらぎであればよい。 The fluctuation width of the voltage fluctuation is larger than, for example, the current fluctuation value in the discontinuous waveform shown in the partial enlargement of FIG. 5 (a) (for example, the current fluctuation value when a pair of drive pulses P1-P2 is applied). By setting, the current change in the Set process and the Reset process can be continuously performed. That is, the voltage fluctuation may be a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of the voltage required for the analog resistance change.
 アナログ抵抗変化素子100の抵抗値は、電流値の変化の逆数として表れる。したがって、実施の形態によれば、駆動信号に電圧ゆらぎを重畳することにより、アナログ抵抗変化素子100の抵抗値の変化を滑らかにすることができる。同時に電流変化量を大きくすることができる。 The resistance value of the analog resistance changing element 100 appears as the reciprocal of the change in the current value. Therefore, according to the embodiment, the change in the resistance value of the analog resistance changing element 100 can be smoothed by superimposing the voltage fluctuation on the drive signal. At the same time, the amount of current change can be increased.
 これにより、実施の形態によれば、アナログ抵抗変化素子100における抵抗変化成分のノイズの除去による滑らかな抵抗変化が得られ、積和回路の低消費電力化と高速化を図ることができるようになる。 As a result, according to the embodiment, a smooth resistance change can be obtained by removing noise of the resistance change component in the analog resistance change element 100, and the power consumption and speed of the product-sum circuit can be reduced and increased. Become.
 図6は、実施の形態にかかる電圧ゆらぎの重畳効果の再現性を説明する図表である。電圧ゆらぎの印加条件は、図5同様にGaussian Noiseで周波数帯域(Bandwidth)が30MHz、電圧振幅(Amplitude)が100mVppとした。 FIG. 6 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment. As in FIG. 5, the voltage fluctuation application conditions were Gaussian Noise, the frequency band (Bandwidth) was 30 MHz, and the voltage amplitude (Amplitude) was 100 mVpp.
 図6では、アナログ抵抗変化素子100の駆動電圧(Set/Reset電圧)は、図5の例(最適条件)よりも低電圧の条件に設定しており、Setが1.85V、Resetが-1.95V、100ns周期としている。 In FIG. 6, the drive voltage (Set / Reset voltage) of the analog resistance changing element 100 is set to a lower voltage condition than the example (optimal condition) of FIG. 5, Set is 1.85 V, Set is -1. The cycle is .95V and 100ns.
 ここで、図6(a)は駆動信号に電圧ゆらぎを重畳した状態(ON)、図6(b)は駆動信号に電圧ゆらぎを重畳しない状態(OFF)である。駆動電圧(Set/Reset)の印加は3周期分(13回測定)の状態を示している。以降の図6(c)~図6(e)では高電圧ゆらぎの重畳(ON)を継続した状態を示す。図6(d)は駆動電圧の印加を3周期分(15回測定)の状態、図6(e)は駆動電圧の印加を8周期分(8回測定)の状態を示している。 Here, FIG. 6A is a state in which the voltage fluctuation is superimposed on the drive signal (ON), and FIG. 6B is a state in which the voltage fluctuation is not superimposed on the drive signal (OFF). The application of the drive voltage (Set / Reset) shows the state of 3 cycles (measured 13 times). Subsequent FIGS. 6 (c) to 6 (e) show a state in which the superimposition (ON) of the high voltage fluctuation is continued. FIG. 6D shows a state in which the drive voltage is applied for 3 cycles (measured 15 times), and FIG. 6 (e) shows a state in which the drive voltage is applied for 8 cycles (measured 8 times).
 図6(a)に示す電圧ゆらぎの重畳がONの状態から、図6(b)に示す電圧ゆらぎの重畳をOFFに切り替えた場合、この図6(b)に示すように、駆動電圧が図5の条件より低いことに対応して電流変化量iOFFは図5(a)に示した電流変化量iOFFよりもさらに小さくなる。 When the superimposition of the voltage fluctuation shown in FIG. 6A is switched from the state where the superimposition of the voltage fluctuation shown in FIG. 6B is ON to the superimposition of the voltage fluctuation shown in FIG. The current change amount iOFF becomes smaller than the current change amount iOFF shown in FIG. 5A corresponding to the condition lower than the condition 5.
 しかし、図6(c)に示すように、再度、電圧ゆらぎを重畳(ON)し、この後、図6(d)、図6(e)に示すように、電圧ゆらぎの重畳(ON)を継続することで、アナログ抵抗変化素子100の電流値の変化が次第に滑らかで安定した鋸状の波形になっていくことが示されている。そして、図6に示したように、アナログ抵抗変化素子100の駆動電圧(Set/Reset電圧)を図5の例(最適条件)よりも低電圧に設定した場合においても、電圧ゆらぎの重畳(ON)を継続することで、アナログ抵抗変化素子100の電流値の変化が滑らかで安定した鋸状の波形にでき、電流変化量を大きくできることが示されている。 However, as shown in FIG. 6 (c), the voltage fluctuation is superimposed (ON) again, and then, as shown in FIGS. 6 (d) and 6 (e), the voltage fluctuation is superimposed (ON). It has been shown that by continuing, the change in the current value of the analog resistance changing element 100 gradually becomes a smooth and stable sawtooth waveform. Then, as shown in FIG. 6, even when the drive voltage (Set / Reset voltage) of the analog resistance changing element 100 is set to a lower voltage than the example of FIG. 5 (optimal conditions), the voltage fluctuation is superimposed (ON). ) Is continued, it is shown that the change of the current value of the analog resistance changing element 100 can be made into a smooth and stable saw-like waveform, and the amount of the current change can be increased.
 図7は、実施の形態にかかる電圧ゆらぎの重畳効果の再現性を説明する図表である。電圧ゆらぎの印加条件は、正弦波(Sin Noise)で周波数帯域(Bandwidth)が30MHz、電圧振幅(Amplitude)が100mVppとした。 FIG. 7 is a chart illustrating the reproducibility of the superimposition effect of the voltage fluctuation applied to the embodiment. The conditions for applying the voltage fluctuation were a sine wave (Sin Noise), a frequency band (Bandwidth) of 30 MHz, and a voltage amplitude (Amplitude) of 100 mVpp.
 図7では、図7(a)に示す電圧ゆらぎの重畳がONの状態とし、以降、図7(b)が電圧ゆらぎの重畳をOFFとして、重畳のON/OFFを繰り返した状態を示す。なお、図7(f)と図7(g)は、ONを継続した状態である。 FIG. 7 shows a state in which the superimposition of the voltage fluctuation shown in FIG. 7A is ON, and thereafter, FIG. 7B shows a state in which the superimposition of the voltage fluctuation is OFF and the superimposition is repeatedly turned ON / OFF. It should be noted that FIGS. 7 (f) and 7 (g) show a state in which ON is continued.
 加えて、図7では、アナログ抵抗変化素子100の駆動電圧(Set/Reset電圧)は、図6の例よりもさらに低電圧の条件に設定しており、Setが1.80V、Resetが-1.85V、200ns周期としている。 In addition, in FIG. 7, the drive voltage (Set / Reset voltage) of the analog resistance changing element 100 is set to a lower voltage condition than in the example of FIG. 6, Set is 1.80 V, Set is -1. The cycle is .85V and 200ns.
 図7に示すように、電圧ゆらぎの重畳のON/OFFを繰り返した場合においても、電圧ゆらぎの重畳をONにする毎に、このONの期間中は、アナログ抵抗変化素子100の電流値の変化が滑らかで安定した鋸状の波形にできることが示されている。そして、図7に示したように、アナログ抵抗変化素子100の駆動電圧(Set/Reset電圧)を図6の例よりもさらに低電圧に設定した場合においても、電圧ゆらぎを重畳(ON)している期間は、アナログ抵抗変化素子100の電流値の変化が滑らかで安定した鋸状の波形にでき、電流変化量を大きくできることが示されている。 As shown in FIG. 7, even when the voltage fluctuation superimposition is repeatedly turned ON / OFF, every time the voltage fluctuation superimposition is turned ON, the current value of the analog resistance changing element 100 changes during this ON period. Has been shown to produce a smooth, stable sawtooth waveform. Then, as shown in FIG. 7, even when the drive voltage (Set / Reset voltage) of the analog resistance changing element 100 is set to a lower voltage than the example of FIG. 6, the voltage fluctuation is superimposed (ON). It has been shown that during this period, the change in the current value of the analog resistance changing element 100 can be made into a smooth and stable saw-like waveform, and the amount of change in the current can be increased.
 図6および図7の測定結果から、電圧ゆらぎの重畳のONを継続した場合、およびON/OFFを繰り返した場合のいずれにおいても、電圧ゆらぎの重畳がONの期間中は、アナログ抵抗変化素子100の電流値の変化が滑らかで安定した鋸状の波形にできることが示されている。 From the measurement results of FIGS. 6 and 7, the analog resistance changing element 100 is used during the period when the voltage fluctuation superimposition is ON, regardless of whether the voltage fluctuation superimposition is continuously turned ON or ON / OFF is repeated. It has been shown that the change in the current value of can be a smooth and stable sawtooth waveform.
 図8、図9は、実施の形態のアナログ抵抗変化素子の実装例を示す図である。図8は、選択トランジスタ802を用いる構成例であり、積和回路等に用いられる典型的な回路構成になっている。ビット線(BL)とソース線(SL)間に、メモリセルを構成するアナログ抵抗変化素子100と選択トランジスタ802を接続する。ソース線(SL)に選択トランジスタ802のソースを接続し、ドレインをアナログ抵抗変化素子100の一端に接続し、アナログ抵抗変化素子100の他端をビット線(BL)に接続する。選択トランジスタ802のゲートにワード線(WL)を介して駆動ドライバ(WL Driver)801を接続する。 8 and 9 are diagrams showing a mounting example of the analog resistance changing element of the embodiment. FIG. 8 is a configuration example using the selection transistor 802, which is a typical circuit configuration used for a product-sum circuit or the like. An analog resistance changing element 100 constituting a memory cell and a selection transistor 802 are connected between the bit line (BL) and the source line (SL). The source of the selection transistor 802 is connected to the source line (SL), the drain is connected to one end of the analog resistance changing element 100, and the other end of the analog resistance changing element 100 is connected to the bit line (BL). A drive driver (WL Driver) 801 is connected to the gate of the selection transistor 802 via a word line (WL).
 駆動ドライバ801は、選択トランジスタ802に対し、駆動信号(Set/Resetパルス)と電圧ゆらぎを重畳して供給する。すなわち、駆動ドライバは801、既存の駆動信号(Set/Resetパルス)の生成機能に、上述した電圧ゆらぎを発生し駆動信号に重畳する機能を追加して構成できる。 The drive driver 801 superimposes and supplies a drive signal (Set / Reset pulse) and a voltage fluctuation to the selection transistor 802. That is, the drive driver can be configured by adding a function of generating the above-mentioned voltage fluctuation and superimposing it on the drive signal to the existing drive signal (Set / Reset pulse) generation function of 801.
 上述した実施の形態では、アナログ抵抗変化素子100のアナログ抵抗変化動作に関する実証結果を記載した。しかしながら、本発明は、抵抗変化がアナログ式であるか、デジタル式であるかに依存しないので、通常の不揮発性メモリに対しても、駆動信号に電圧ゆらぎを重畳する構成とすることで、不揮発性メモリの動作電圧の低減化に有効である。 In the above-described embodiment, the empirical results regarding the analog resistance changing operation of the analog resistance changing element 100 are described. However, the present invention does not depend on whether the resistance change is an analog type or a digital type. Therefore, even for a normal non-volatile memory, the voltage fluctuation is superimposed on the drive signal to make it non-volatile. It is effective in reducing the operating voltage of the non-volatile memory.
 また、図9は、クロスポイント型のセル構成例であり、互いに交差する複数のワード線(WL)と複数のビット線(BL)の各クロスポイントにアナログ抵抗変化素子100がマトリクス状に配置される。供給されるアドレスに対応してビット線デコーダ902は、一つのビット線(BL)を選択し、ワード線デコーダ903は一つのワード線(WL)を選択する。 Further, FIG. 9 is an example of a crosspoint type cell configuration, in which analog resistance changing elements 100 are arranged in a matrix at each crosspoint of a plurality of word lines (WL) and a plurality of bit lines (BL) intersecting each other. To. The bit line decoder 902 selects one bit line (BL) corresponding to the supplied address, and the word line decoder 903 selects one word line (WL).
 電圧パルス・ゆらぎ発生回路901は、クロスポイント上で選択されたアナログ抵抗変化素子100に対し、駆動信号(Set/Resetパルス)と電圧ゆらぎを重畳して供給する。すなわち、電圧パルス・ゆらぎ発生回路901は、既存の駆動信号(Set/Resetパルス)の生成機能に、上述した電圧ゆらぎを発生し駆動信号に重畳する機能を追加して構成できる。ここで、電圧パルス・ゆらぎ発生回路901は、ワード線(WL)あるいはビット線(BL)の両方、あるいはいずれか一方に電圧ゆらぎを重畳させればよい。例えば、ビット線(BL)側に電圧ゆらぎを重畳させることによって、アドレス指定したアナログ抵抗変化素子100に対し、駆動信号に電圧ゆらぎを重畳して供給でき、このアナログ抵抗変化素子100の抵抗を変化させることができる。 The voltage pulse / fluctuation generation circuit 901 superimposes and supplies a drive signal (Set / Reset pulse) and a voltage fluctuation to the analog resistance changing element 100 selected on the cross point. That is, the voltage pulse / fluctuation generation circuit 901 can be configured by adding a function of generating the voltage fluctuation described above and superimposing it on the drive signal to the existing drive signal (Set / Reset pulse) generation function. Here, the voltage pulse / fluctuation generation circuit 901 may superimpose the voltage fluctuation on either the word line (WL) or the bit line (BL), or one of them. For example, by superimposing a voltage fluctuation on the bit line (BL) side, it is possible to superimpose the voltage fluctuation on the drive signal and supply it to the analog resistance changing element 100 whose address is specified, and change the resistance of the analog resistance changing element 100. Can be made to.
 例えば、基板上に複数のRANDが隣接して配置されている既存のメモリスタの構造を用いてRAND単位で複数のアナログ抵抗変化素子を形成し、クロスポイントごとに任意のアナログ抵抗変化素子100を選択および動作させることができる。 For example, using the structure of an existing memristor in which a plurality of RANDs are arranged adjacent to each other on a substrate, a plurality of analog resistance changing elements are formed in RAND units, and an arbitrary analog resistance changing element 100 is selected for each cross point. And can be operated.
 なお、図8、図9の実装例に限らず、本願発明は、駆動信号に電圧ゆらぎを重畳する機能を有する各種の駆動回路に適用することができる。ここで、上述したように、電圧ゆらぎは、駆動電圧よりも十分に低い電圧、例えば、駆動電圧の1/10に満たない電圧値であるため、アナログ抵抗変化素子100の駆動に必要な電力の増大を抑制できるものであり、駆動回路さらには情報処理装置の消費電力の増加を抑制できる。 Not limited to the mounting examples of FIGS. 8 and 9, the present invention can be applied to various drive circuits having a function of superimposing voltage fluctuations on drive signals. Here, as described above, since the voltage fluctuation is a voltage sufficiently lower than the drive voltage, for example, a voltage value less than 1/10 of the drive voltage, the power required to drive the analog resistance changing element 100 is reached. The increase can be suppressed, and the increase in the power consumption of the drive circuit and the information processing device can be suppressed.
(他の実施の形態)
 以上説明した実施の形態では、アナログ抵抗変化素子100に対し、所定周期で一定電圧の駆動パルスを連続して印加する駆動方法とした。これに対し、以下に説明する他の実施の形態では、アナログ抵抗変化素子100の駆動方法が異なる。他の実施の形態の駆動方法では、アナログ抵抗変化素子100に対する駆動パルスの印加条件として、所定パルス幅の印加電圧を初期値から所定のステップ電圧ごとに終了電圧まで可変させる。
(Other embodiments)
In the embodiment described above, a drive method is used in which a drive pulse having a constant voltage is continuously applied to the analog resistance changing element 100 at a predetermined cycle. On the other hand, in another embodiment described below, the driving method of the analog resistance changing element 100 is different. In the driving method of another embodiment, as a condition for applying the driving pulse to the analog resistance changing element 100, the applied voltage having a predetermined pulse width is varied from the initial value to the ending voltage for each predetermined step voltage.
 例えば、Set過程での駆動パルスの印加条件は、初期値(Initial Voltage)が1V、ステップ電圧(Voltage Step)が0.05V、供給パルス数(No.of Pulse)が13個、終了電圧(Finish Voltage)が1.6V、パルス幅(Pulse Width)が5μs、である。ところで、この他の実施の形態においても上記の実施の形態と同様、駆動信号に高周波ノイズ等の電圧ゆらぎを重畳する。 For example, the conditions for applying the drive pulse in the Set process are an initial value (Initial Voltage) of 1 V, a step voltage (Voltage Step) of 0.05 V, a supply pulse number (No. of Pulse) of 13, and an end voltage (Finish). Voltage) is 1.6 V, and the pulse width (Pulse Wid) is 5 μs. By the way, also in other embodiments, voltage fluctuations such as high frequency noise are superimposed on the drive signal as in the above embodiment.
 他の実施の形態では、例えば、Set過程の駆動パルスは、Reset状態のアナログ抵抗変化素子100に対し、初めのパルスは1V,次のパルスは1.05V、1.1V、…、1.55Vと0.05Vずつ上昇し、最後のパルスは1.6Vとなる。なお、Reset過程では、Set過程とは逆の駆動パルスの印加条件で電圧を印加すればよい。 In another embodiment, for example, the drive pulse in the Set process is 1 V for the analog resistance changing element 100 in the Reset state, the second pulse is 1.05 V, 1.1 V, ..., 1.55 V. And increases by 0.05V, and the final pulse becomes 1.6V. In the Reset process, the voltage may be applied under the conditions for applying the drive pulse opposite to that in the Set process.
 図10は、他の実施の形態にかかるアナログ抵抗変化素子を他の駆動方法で駆動した場合の特性測定結果を示す図表である。横軸は、上記駆動パルスの印加条件としたときのアナログ抵抗変化素子100の抵抗値(Resistance[kΩ]、縦軸は、ワイブルプロット(Ln [Ln(1/(1-F(R_i)))])である。 FIG. 10 is a chart showing the characteristic measurement results when the analog resistance changing element according to another embodiment is driven by another driving method. The horizontal axis is the resistance value of the analog resistance changing element 100 under the application condition of the drive pulse (Resistance [kΩ], and the vertical axis is the Weibull plot (Ln [Ln (1 / (1-F (R_i))). ]).
 そして、高抵抗状態のアナログ抵抗変化素子100に対し駆動パルスを0.05Vステップで1Vから1.6Vまで印加することで、アナログ抵抗変化素子100は低抵抗状態となった。ここで、高周波ノイズの有り、無しの条件で繰り返し測定を行った。図10には、その後、駆動電圧が1.3V時点の抵抗値をワイブルプロットし、抵抗値のばらつきを評価した。 Then, by applying a drive pulse from 1V to 1.6V in 0.05V steps to the analog resistance changing element 100 in the high resistance state, the analog resistance changing element 100 is in the low resistance state. Here, the measurement was repeated under the condition of the presence or absence of high frequency noise. In FIG. 10, after that, the resistance value at the time when the drive voltage was 1.3 V was weibull plotted, and the variation in the resistance value was evaluated.
 測定は、1.高周波ノイズ無し50回、2.高周波ノイズ(ガウシアンノイズ1mV,20MHz)有り55回、3.高周波ノイズ無し50回、4.高周波ノイズ(ガウシアンノイズ1mV,2MHz)有り50回とした。1.2.3.4.の順番の測定、すなわち、高周波ノイズ無し、高周波ノイズ有りの測定を交互に行うことで、測定の再現性を持たせた。 Measurement is 1. No high frequency noise 50 times, 2. With high frequency noise (Gaussian noise 1 mV, 20 MHz) 55 times, 3. No high frequency noise 50 times, 4. It was set to 50 times with high frequency noise (Gaussian noise 1 mV, 2 MHz). 1.2.3.4. The reproducibility of the measurement was made by alternately performing the measurement in the order of, that is, the measurement without high frequency noise and with high frequency noise.
 図10に示す測定結果について、1.高周波ノイズ無し(図中■印)と、2.高周波ノイズ有り(図中□)とを対比すると、実施の形態に相当する2.高周波ノイズ有り(□)の方が、1.高周波ノイズ無し(■)よりも抵抗値の分布が狭くなっている。同様に、3.高周波ノイズ無し(図中●印)と、4.高周波ノイズ有り(図中〇印)とを対比すると、実施の形態に相当する4.高周波ノイズ有り(〇)の方が、3.高周波ノイズ無し(●)よりも抵抗値の分布が狭くなっている。 Regarding the measurement results shown in FIG. 10, 1. No high frequency noise (marked with ■ in the figure) and 2. Compared with the presence of high frequency noise (□ in the figure), it corresponds to the embodiment. The one with high frequency noise (□) is 1. The distribution of resistance values is narrower than that without high-frequency noise (■). Similarly, 3. No high frequency noise (● mark in the figure) and 4. Compared with the presence of high frequency noise (marked with ◯ in the figure), it corresponds to the embodiment. Those with high frequency noise (○) are 3. The distribution of resistance values is narrower than that without high-frequency noise (●).
 このように、他の実施の形態のアナログ抵抗変化素子100では、駆動条件がノイズ有りの条件2.4.の場合には、ノイズ無しの条件1.3.よりも低抵抗化が進むとともに、抵抗分布が小さくなることが明らかになった。このように、抵抗分布が小さいことにより、他の実施の形態のアナログ抵抗変化素子100は、電流ばらつきを抑えることができるようになる。 As described above, in the analog resistance changing element 100 of the other embodiment, the driving condition is the condition with noise 2.4. In the case of, the condition without noise 1.3. It was clarified that the resistance distribution became smaller as the resistance became lower than that. As described above, the small resistance distribution makes it possible for the analog resistance changing element 100 of the other embodiment to suppress the current variation.
 加えて、図10に示した他の実施の形態の駆動方式では、上述した実施の形態よりも高周波ノイズの電圧をより低電圧化できる。上述した実施の形態では、駆動パルスは数V程度(例えば±2V)、電圧ゆらぎ(高周波ノイズ)は駆動パルスの1/10程度(例えば±100mV)とした。これに対し、図10では駆動パルスが数V(例えば±1V~±1.6V)であるのに対し、電圧ゆらぎ(高周波ノイズ)は駆動パルスの1/1000(例えば±1mV)とはるかに低くすることができる。 In addition, in the drive method of the other embodiment shown in FIG. 10, the voltage of the high frequency noise can be made lower than that of the above-described embodiment. In the above-described embodiment, the drive pulse is about several V (for example, ± 2 V), and the voltage fluctuation (high frequency noise) is about 1/10 of the drive pulse (for example, ± 100 mV). On the other hand, in FIG. 10, the drive pulse is several V (for example, ± 1 V to ± 1.6 V), while the voltage fluctuation (high frequency noise) is 1/1000 of the drive pulse (for example, ± 1 mV), which is much lower. can do.
 また、図10のワイブルプロットに示すように、他の実施の形態の駆動方式によりアナログ抵抗変化素子100の駆動パルスの印加電圧をステップ電圧ごとに可変することで、ステップ電圧それぞれに対応する抵抗値を再現性良く得ることができるようになる。例えば、Set/Resetを繰り返しても、駆動パルスが1.2Vのときには、この1.2Vに対応する所定の抵抗値を常に得ることができるようになる。 Further, as shown in the Weibull plot of FIG. 10, by varying the applied voltage of the drive pulse of the analog resistance changing element 100 for each step voltage by the drive method of another embodiment, the resistance value corresponding to each step voltage is changed. Can be obtained with good reproducibility. For example, even if Set / Reset is repeated, when the drive pulse is 1.2V, a predetermined resistance value corresponding to this 1.2V can always be obtained.
 以上説明したように、本実施の形態によれば、情報処理装置は、一対の電極と、前記一対の電極間に設けられる酸化物層と、からなるアナログ抵抗変化素子と、アナログ抵抗変化素子の駆動信号にゆらぎ成分を有する電圧ゆらぎを重畳して供給する駆動回路と、を備えてなる。このような構成によれば、アナログ抵抗変化素子の駆動時における低抵抗化(SET)過程、および高抵抗化(RESET)過程での急激な抵抗変化を抑制できるようになる。 As described above, according to the present embodiment, the information processing apparatus includes an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes, and an analog resistance changing element. It is provided with a drive circuit that superimposes and supplies a voltage fluctuation having a fluctuation component on the drive signal. According to such a configuration, it becomes possible to suppress a sudden resistance change in the process of lowering the resistance (SET) and the process of increasing the resistance (RESET) when the analog resistance changing element is driven.
 また、駆動回路は、駆動信号として所定電圧を有する駆動パルスを生成し、電圧ゆらぎとして、駆動パルスに基づきアナログ抵抗変化素子の抵抗値が変化した際に生じる非連続な波形での電流変動値よりも大きな振れ幅に相当する電圧値を生成する構成とすることができる。これにより、抵抗変化素子駆動時の低消費電力化と、抵抗変化過程の平坦化を達成できるようになる。 Further, the drive circuit generates a drive pulse having a predetermined voltage as a drive signal, and as a voltage fluctuation, from the current fluctuation value in a discontinuous waveform generated when the resistance value of the analog resistance changing element changes based on the drive pulse. Can also be configured to generate a voltage value corresponding to a large swing width. This makes it possible to achieve low power consumption when driving the resistance changing element and flattening the resistance changing process.
 また、駆動パルスは数V程度の一定電圧であり、電圧ゆらぎは駆動パルスの1/10程度の電圧とすることができる。例えば、上述のように、駆動パルスは±2V程度、電圧ゆらぎは30MHzの周波数で±100mV程度でよく、駆動電圧を抑制することができる。 Further, the drive pulse has a constant voltage of about several V, and the voltage fluctuation can be a voltage of about 1/10 of the drive pulse. For example, as described above, the drive pulse may be about ± 2 V, and the voltage fluctuation may be about ± 100 mV at a frequency of 30 MHz, and the drive voltage can be suppressed.
 また、駆動パルスは、数V程度の電圧であり、初期電圧から所定のステップ電圧で終了電圧まで電圧可変させ、電圧ゆらぎは前記駆動パルスの1/1000程度の電圧とすることができる。 Further, the drive pulse is a voltage of about several V, the voltage can be varied from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation can be a voltage of about 1/1000 of the drive pulse.
 また、高周波ノイズは、ガウシアンノイズ、ホワイトノイズ、正弦波、三角波、矩形波、のいずれかとすることができる。このように、電圧ゆらぎとしては、汎用の各種ノイズを用いることができる。 Further, the high frequency noise can be any of Gaussian noise, white noise, sine wave, triangular wave, and square wave. As described above, various general-purpose noises can be used as the voltage fluctuation.
 また、アナログ抵抗変化素子は、メモリセル単位で選択トランジスタに接続され、駆動回路は、選択トランジスタに対し、電圧ゆらぎを重畳した駆動信号を供給する、構成とすることができる。このほか、アナログ抵抗変化素子は、ワード線およびビット線が交差する複数のクロスポイントにそれぞれ配置され、ワード線デコーダおよびビット線デコーダによりアナログ抵抗変化素子が駆動選択され、駆動回路は、ワード線デコーダあるいはビット線デコーダのうち一方に対し、電圧ゆらぎを重畳した駆動信号を供給する、構成とすることができる。これらのように、汎用の回路構成を用いて簡単に複数のアナログ抵抗変化素子を選択駆動することができる。 Further, the analog resistance changing element can be connected to the selection transistor in memory cell units, and the drive circuit can be configured to supply the drive signal in which the voltage fluctuation is superimposed to the selection transistor. In addition, the analog resistance changing element is arranged at a plurality of cross points where the word line and the bit line intersect, the analog resistance changing element is driven and selected by the word line decoder and the bit line decoder, and the drive circuit is the word line decoder. Alternatively, it can be configured to supply a drive signal in which voltage fluctuations are superimposed to one of the bit line decoders. As described above, a plurality of analog resistance changing elements can be easily selectively driven by using a general-purpose circuit configuration.
 以上のことから、本実施の形態によれば、アナログ抵抗変化素子を駆動する駆動信号に電圧ゆらぎを重畳して供給するだけの簡単な構成で、駆動時における低消費電力化と抵抗変化過程の平坦化が実現できる。不規則な抵抗変化特性の抑制により、抵抗変化成分のノイズが除去でき、滑らかな抵抗変化となり、積和回路の低消費電力化と高速化を図ることができるようになる。また、アナログ抵抗変化素子の低消費電力性と高信頼性を同時に得ることができるようになる。 From the above, according to the present embodiment, the drive signal for driving the analog resistance change element is superposed with the voltage fluctuation and supplied, and the power consumption at the time of driving is reduced and the resistance change process is achieved. Flattening can be achieved. By suppressing the irregular resistance change characteristic, the noise of the resistance change component can be removed, the resistance change becomes smooth, and the power consumption and the speed of the product-sum circuit can be reduced and increased. Further, it becomes possible to simultaneously obtain low power consumption and high reliability of the analog resistance changing element.
 本発明は、人工知能を備えた電子機器や情報処理装置、特に、エッジコンピューティング分野で用いられる脳型情報処理装置に適用することができる。 The present invention can be applied to electronic devices and information processing devices equipped with artificial intelligence, particularly brain-type information processing devices used in the field of edge computing.
 100 アナログ抵抗変化素子
 101 RAND
 111 上部電極(TE)
 112 下部電極(BE)
 113 酸化物層(MO,MO1,MO2)
 200 Si基板
 305 絶縁膜
 801 駆動ドライバ
 901 電圧パルス・ゆらぎ発生回路
100 Analog resistance change element 101 RAND
111 Upper electrode (TE)
112 Lower electrode (BE)
113 Oxide layer (MO, MO1, MO2)
200 Si substrate 305 Insulation film 801 Drive driver 901 Voltage pulse / fluctuation generation circuit

Claims (12)

  1.  一対の電極と、前記一対の電極間に設けられる酸化物層と、からなるアナログ抵抗変化素子と、
     前記アナログ抵抗変化素子の駆動信号にゆらぎ成分を有する電圧ゆらぎを重畳して供給する駆動回路と、
     を備えたことを特徴とする情報処理装置。
    An analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes.
    A drive circuit that superimposes and supplies a voltage fluctuation having a fluctuation component on the drive signal of the analog resistance changing element, and
    An information processing device characterized by being equipped with.
  2.  前記駆動回路は、アナログ抵抗変化に必要な電圧の駆動パルスによってもたらされる素子の電流変化に比して、十分に小さな電流ゆらぎを生じさせる電圧ゆらぎを生成する、ことを特徴とする請求項1に記載の情報処理装置。 The first aspect of the present invention is characterized in that the drive circuit generates a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of the voltage required for the analog resistance change. The information processing device described.
  3.  前記駆動パルスは数V程度の一定電圧であり、前記電圧ゆらぎは前記駆動パルスの1/10程度の電圧であることを特徴とする請求項2に記載の情報処理装置。 The information processing apparatus according to claim 2, wherein the drive pulse has a constant voltage of about several V, and the voltage fluctuation has a voltage of about 1/10 of the drive pulse.
  4.  前記駆動パルスは、より好ましくは、IoT用電子デバイスに用いられる0.3V~5V程度の前記駆動パルスに対し、前記電圧ゆらぎはその1/10程度の電圧であることを特徴とする請求項3に記載の情報処理装置。 Claim 3 is characterized in that the drive pulse is more preferably a voltage of about 1/10 of the drive pulse of about 0.3 V to 5 V used in an electronic device for IoT. The information processing device described in.
  5.  前記駆動パルスは、数V程度の電圧であり、初期電圧から所定のステップ電圧で終了電圧まで電圧可変させ、前記電圧ゆらぎは前記駆動パルスの1/1000程度の電圧であることを特徴とする請求項2に記載の情報処理装置。 The drive pulse has a voltage of about several V, the voltage is variable from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation is about 1/1000 of the drive pulse. Item 2. The information processing apparatus according to Item 2.
  6.  前記電圧ゆらぎは、ガウシアンノイズ、ホワイトノイズ、正弦波、三角波、矩形波、のいずれかであることを特徴とする請求項1に記載の情報処理装置。 The information processing apparatus according to claim 1, wherein the voltage fluctuation is any one of Gaussian noise, white noise, sine wave, triangular wave, and square wave.
  7.  前記アナログ抵抗変化素子は、メモリセル単位で選択トランジスタに接続され、
     前記駆動回路は、前記選択トランジスタに対し、前記電圧ゆらぎを重畳した前記駆動信号を供給する、ことを特徴とする請求項1に記載の情報処理装置。
    The analog resistance changing element is connected to a selection transistor in memory cell units.
    The information processing apparatus according to claim 1, wherein the drive circuit supplies the drive signal in which the voltage fluctuation is superimposed to the selection transistor.
  8.  前記アナログ抵抗変化素子は、ワード線およびビット線が交差する複数のクロスポイントにそれぞれ配置され、ワード線デコーダおよびビット線デコーダにより前記アナログ抵抗変化素子が駆動選択され、
     前記駆動回路は、前記ワード線デコーダあるいは前記ビット線デコーダのうち一方に対し、前記電圧ゆらぎを重畳した前記駆動信号を供給する、
     ことを特徴とする請求項1~7のいずれか一つに記載の情報処理装置。
    The analog resistance changing element is arranged at a plurality of cross points where the word line and the bit line intersect, respectively, and the analog resistance changing element is driven and selected by the word line decoder and the bit line decoder.
    The drive circuit supplies the drive signal in which the voltage fluctuation is superimposed to either the word line decoder or the bit line decoder.
    The information processing apparatus according to any one of claims 1 to 7.
  9.  一対の電極と、前記一対の電極間に設けられる酸化物層と、からなるアナログ抵抗変化素子を駆動する駆動信号に、電圧ゆらぎを重畳する、
     ことを特徴とする情報処理装置の駆動方法。
    A voltage fluctuation is superimposed on a drive signal for driving an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes.
    A method of driving an information processing device, which is characterized in that.
  10.  前記駆動信号は、アナログ抵抗変化に必要な電圧の駆動パルスによってもたらされる素子の電流変化に比して、十分に小さな電流ゆらぎを生じさせる電圧ゆらぎであることを特徴とする請求項9に記載の情報処理装置の駆動方法。 The ninth aspect of claim 9, wherein the drive signal is a voltage fluctuation that causes a sufficiently small current fluctuation as compared with the current change of the element caused by the drive pulse of the voltage required for the analog resistance change. How to drive an information processing device.
  11.  前記駆動パルスは数V程度の一定電圧であり、前記電圧ゆらぎは前記駆動パルスの1/10程度の電圧であることを特徴とする請求項10に記載の情報処理装置の駆動方法。 The driving method for an information processing apparatus according to claim 10, wherein the driving pulse has a constant voltage of about several V, and the voltage fluctuation has a voltage of about 1/10 of the driving pulse.
  12.  前記駆動パルスは、数V程度の電圧であり、初期電圧から所定のステップ電圧で終了電圧まで電圧可変させ、前記電圧ゆらぎは、前記駆動パルスの1/1000程度の電圧であることを特徴とする請求項10に記載の情報処理装置の駆動方法。 The drive pulse has a voltage of about several V, and the voltage is variable from the initial voltage to the end voltage at a predetermined step voltage, and the voltage fluctuation is a voltage of about 1/1000 of the drive pulse. The driving method of the information processing apparatus according to claim 10.
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