WO2021246527A1

WO2021246527A1 - Production method for semiconductor device

Info

Publication number: WO2021246527A1
Application number: PCT/JP2021/021439
Authority: WO
Inventors: 孝仁大島; 安史樋口
Original assignee: 株式会社Flosfia
Priority date: 2020-06-05
Filing date: 2021-06-04
Publication date: 2021-12-09

Abstract

The present invention provides a production method for a semiconductor device containing a semiconductor film having an inclined surface on the edge thereof. This production method for a semiconductor device comprises causing the epitaxial growth of a semiconductor film upon a substrate on which a mask having an inclined surface is disposed, and thereby forming a semiconductor film having an inclined surface on the edge thereof.

Description

Manufacturing method of semiconductor device

The present invention relates to a method for manufacturing a semiconductor device.

When a reverse voltage is applied to the rectified junction (Schottky junction or pn junction) of a semiconductor device, dielectric breakdown occurs when a certain voltage (withstand voltage) is exceeded. The voltage at which this breakdown occurs differs between the interior of the semiconductor and the surface where the pn junction and / or Schottky junction terminates, and generally before the breakdown voltage inside the semiconductor is reached, breakdown occurs at the junction termination of the semiconductor. It will occur. Since the withstand voltage of the semiconductor device becomes the dielectric breakdown voltage at the junction end portion, the maximum value of the reverse voltage that can be applied to the semiconductor device becomes low, and there is a problem that the semiconductor device has a low withstand voltage. Further, there is a problem that the dielectric breakdown that occurs at the end of the junction is unstable and adversely affects the characteristics of the semiconductor device. Therefore, in order to improve the dielectric breakdown strength of the junction end portion, it is known that the junction end portion of the semiconductor is exposed and the shape of the surface thereof is processed diagonally. For example, in Patent Document 1, bevel processing is performed by pressing an edge portion of a semiconductor wafer against a grindstone surface to grind it. Further, in Patent Document 2, since the process of processing the pn junction surface into a bevel structure is technically difficult and there is a problem that the yield is deteriorated, the place where the bevel structure is applied is limited. Further, in Patent Document 3, after forming a groove by sandblasting or the like, an etching solution containing hydrofluoric acid and nitric acid is sprayed into the groove to form a bevel structure. However, when a method such as grinding in which a part of a semiconductor is removed to provide a bevel structure is used, there is a problem that the process becomes complicated. Further, even if etching is performed using an acid to form the bevel structure, there is a problem that the surface is roughened. Further, with these methods, it is difficult to create a bevel structure having a desired structure and angle.

Examples of semiconductors include silicon carbide, gallium nitride, gallium nitride, gallium nitride, and gallium nitride nitride semiconductors including mixed crystals thereof. It is known and is used in various semiconductor devices such as blue LEDs and power semiconductors. In recent years, gallium oxide (Ga ₂ O ₃ ) has been attracting attention as a new semiconductor.

As a next-generation switching element capable of achieving high withstand voltage, low loss, and high heat resistance, _{semiconductor devices using gallium oxide (Ga 2} O ₃ ) having a large bandgap are attracting attention, and are used for power semiconductor devices such as inverters. Expected to be applied. Further, it is expected to be widely applied as a light receiving / receiving device such as an LED or a sensor due to a wide band gap. In particular, among gallium oxide, α-Ga ₂ O _{3 and the} like having a corundum structure can control the band gap by mixing indium and aluminum with each other or in combination, which is extremely attractive as an InAlGaO-based semiconductor. It constitutes a material system. Here _In the InAlGaO based semiconductor _{_{_{X Al Y Ga Z O 3 (}}} 0 ≦ X ≦ 2,0 ≦ Y ≦ 2,0 ≦ Z ≦ 2, X + Y + Z = 1.5 ~ 2.5) indicates (Patent Document 4 Etc.), it can be overlooked as the same material system containing gallium oxide.

Further, Patent Document 5 describes an avalanche photodiode having a single crystal of _{gallium oxide (Ga 2} O ₃ _{), and the avalanche photodiode is a laminated structure of a single crystal of Ga 2} O ₃ and a dielectric layer on a side surface. Has a mesa shape that is inclined in a reverse taper shape. However, a manufacturing method for obtaining such a mesa shape is not disclosed.

On the other hand, since gallium oxide (Ga ₂ O ₃ ) has a β-gallia structure as the most stable phase, it is possible to form a crystal film having a corundum structure, which is a metastable phase, unless a special film forming method is used. Have difficulty. In addition to the crystal film having a corundum structure, there are still many problems in improving the film formation rate and crystal quality, suppressing cracks and abnormal growth, suppressing twins, and cracking the substrate due to warpage.

Semiconductor devices with a bevel structure have been studied for the above-mentioned semiconductor materials, but there are problems such as difficulty in forming a bevel structure by removing a part of the semiconductor by grinding and the like, and the process becomes complicated. It was difficult to obtain the desired angle and shape of the bevel structure, and the level was not industrially advantageous.

Patent No. 2588326 Patent Announcement No. 57 (1982) -23435 Patent Announcement No. 5 (1993) -43288 International Publication No. 2014/050793 JP-A-2017-220550

One of the objects of the present invention is to provide a manufacturing method capable of obtaining a semiconductor device including at least a semiconductor film having an inclined surface at an end portion in an industrially advantageous manner.

As a result of diligent studies to achieve the above object, the present inventors have determined that a semiconductor film having an inclined surface is formed in a method for manufacturing a semiconductor device including at least a semiconductor film having an inclined surface at an end thereof. When the semiconductor film is grown on the first surface of a substrate on which a mask having an oppositely inclined surface that engages with the inclined surface of the film is placed, surprisingly, a semiconductor having a bevel structure at an end thereof. It was found that the film can be obtained in an industrially advantageous manner, and it has been found that the above-mentioned conventional problems can be solved at once by such a method.

In addition, the present inventors have completed the present invention by further studying after obtaining the above findings.

That is, the present invention relates to the following invention.
[1] A method for manufacturing a semiconductor device including at least a semiconductor film having an inclined surface at an end, wherein the semiconductor film having the inclined surface is formed by forming an inclined surface of the semiconductor film in the direction opposite to the inclined surface. A method for manufacturing a semiconductor device, which is performed by epitaxially growing the semiconductor film on the first surface of a substrate on which a mask is arranged.
[2] The manufacturing method according to the above [1], wherein the mask is made of a material having a higher insulating property than the semiconductor film.
[3] The production method according to the above [1] or [2], wherein the mask contains an insulating material.
[4] The production method according to any one of [1] to [3] above, wherein the mask _{contains at least one material selected from silicon dioxide (SiO 2} ) and silicon nitride (Si ₃ N _4). ..
[5] The production method according to the above [1] or [2], wherein the mask contains a semi-insulator material.
[6] The production method according to any one of [1] to [5] above, wherein the thickness of the mask is at least 1 μm or more.
[7] The production method according to any one of [1] to [6] above, wherein the substrate contains a crystal substrate.
[8] The production method according to any one of [1] to [7] above, wherein the substrate contains a crystal layer.
[9] The production method according to the above [8], wherein the crystal layer includes a semiconductor layer.
[10] The production method according to the above [8] or [9], wherein the crystal layer is epitaxially grown including lateral growth.
[11] The manufacturing method according to the above [9], wherein the semiconductor film is an n-type semiconductor film and the semiconductor layer is an n + type semiconductor film.
[12] The production method according to any one of [1] to [11] above, wherein the semiconductor film is epitaxially grown including lateral growth.
[13] The mask has a first surface and a second surface on the opposite side of the first surface, which is in direct contact with the first surface of the substrate or through another layer. The manufacturing method according to any one of [1] to [12], wherein the inclined surface has a tapered shape in which the thickness decreases from the first surface of the mask toward the second surface of the mask. ..
[14] The manufacturing method according to the above [13], wherein the inclination angle formed by the second surface of the mask and the inclined surface of the mask is 20 ° or more and 70 ° or less.
[15]
Further, any of the above [1] to [14], which comprises forming an electrode by covering at least a part of the semiconductor film and at least a part of the mask and arranging the end portion of the electrode on the mask. The manufacturing method described in Crab.
[16] The production method according to any one of [1] to [15], wherein the mask is used as a field insulating film.
[17] The production method according to any one of the above [1] to [16], further comprising forming a protective film of a material different from that of the mask on the mask.
[18] Any of the above [1] to [17], wherein the semiconductor film is formed by at least one method selected from a spray method, a mist CVD method, an HVPE method, an MBE method, a MOCVD method and a sputtering method. The manufacturing method described in.
[19] The semiconductor film has a first surface, a second surface opposite to the first surface, and an end portion located between the first surface and the second surface, and the mask. A side surface including the first surface, a second surface on the opposite side of the first surface, which is in contact with the first surface of the substrate, and the inclined surface located between the first surface and the second surface. [1] to [18], further comprising forming the first surface of the semiconductor film and the first surface of the mask so as to be flush with each other. The manufacturing method according to any one.
[20] The semiconductor film has a first surface, a second surface opposite to the first surface, and an end portion located between the first surface and the second surface, and the mask. A side surface including the first surface, a second surface on the opposite side of the first surface, which is in contact with the first surface of the substrate, and the inclined surface located between the first surface and the second surface. [1] to [18], further comprising forming the first surface of the semiconductor film at a position lower than the first surface of the mask. The manufacturing method according to any one of.
[21] The semiconductor film has a first surface, a second surface opposite to the first surface, and an end portion located between the first surface and the second surface, and the mask. A side surface including the first surface, a second surface on the opposite side of the first surface, which is in contact with the first surface of the substrate, and the inclined surface located between the first surface and the second surface. [1] to [18], further comprising forming the first surface of the semiconductor film at a position higher than the first surface of the mask. The manufacturing method according to any one of.
[22] The invention according to any one of [19] to [21], wherein the semiconductor film is formed so that at least a part of the second surface of the semiconductor film and the second surface of the mask are flush with each other. Production method.
[23] The crystal layer is located on the first surface side of the substrate, the mask is placed on the crystal layer, and then the semiconductor film is epitaxially grown on the crystal layer. 10] The manufacturing method according to any one of.
[24] The above-mentioned [1] to [23], wherein the mask is used as a first mask, and a second mask having a thickness thinner than that of the first mask is arranged on the first surface of the substrate. The manufacturing method according to any one.
[25] The mask is used as a first mask, and a second mask which is arranged on the first surface of the substrate and has a thickness thinner than the thickness of the first mask is arranged. The second mask comprises the epitaxial growth of the semiconductor film on the first surface of the substrate on which the mask and the second mask are arranged to form a semiconductor film having an inclined surface at the end, wherein the second mask is the second. The manufacturing method according to any one of [19] to [21] above, which is located in the opening of the mask of 1.
[26] The manufacturing method according to any one of [1] to [25], wherein the inclined surface of the semiconductor film is formed so as to engage with the inclined surface of the mask in the opposite direction.

According to the manufacturing method of the present invention, a semiconductor device including a semiconductor film having an inclined surface at an end and / or a laminated structure having an inclined surface at an end can be obtained industrially advantageous.

It is a schematic diagram which shows a part of one aspect of the mask arranged on the surface of the substrate which is preferably used in embodiment of this invention. It is a schematic diagram which shows a part of one aspect of the mask arranged on the surface of the substrate which is preferably used in embodiment of this invention. FIG. 3 is a partial cross-sectional view of a substrate and a mask schematically showing a method of forming a mask as shown in FIGS. 1 and / or 2. FIG. 3A is a partial cross-sectional view of a substrate having a mask layer formed on the first surface of the substrate. FIG. 3B is a partial cross-sectional view of the substrate and the mask in which an opening having an inclined surface is formed in the mask layer by etching, and shows, for example, a cross section of the portion IIIb-IIIb of FIG. FIG. 3C shows, as another embodiment, a substrate and a mask on which a thinner second mask is formed on the first surface of the substrate in the opening of the mask layer (first mask). It is a partial sectional view. As one of the embodiments of the present invention, it is a figure which shows typically the cross section of the opening of the mask when the protective film is arranged on the mask. It is a figure explaining the halide vapor deposition (HVPE) apparatus used as one of the embodiments of this invention. As one of the embodiments, it is sectional drawing schematically showing the laminated structure grown on the 1st surface of a substrate and on the inclined surface of a mask in the opening of the mask shown in FIG. As one of the embodiments, it is sectional drawing schematically showing the laminated structure in which the semiconductor film having different conductivity is grown on the semiconductor film shown in FIG. As one of the embodiments, it is sectional drawing which shows typically the semiconductor film grown on the protective film shown in FIG. It is a figure explaining the mist CVD apparatus used in embodiment of this invention. It is a photograph which shows the semiconductor film which has the inclined surface at the end part obtained in the Example of this invention. As one of the embodiments of the present invention, the figure in which electrodes are formed on the first surface of a semiconductor film having the same height and the first surface of a mask is shown. As one of the embodiments of the present invention, a figure showing an electrode formed on a first surface of a semiconductor film and a first surface of a mask located at a position higher than the first surface of the semiconductor film is shown. As one of the embodiments of the present invention, a figure showing an electrode formed on a first surface of a semiconductor film and a first surface of a mask located at a position lower than the first surface of the semiconductor film is shown. An example of a substrate used in one of the embodiments of the present invention is shown. An example of a substrate used in one of the embodiments of the present invention is shown. As one of the embodiments of the present invention, it is a figure which shows the manufacturing method of the semiconductor device using the substrate shown in FIG. In one of the embodiments of the present invention, it is a schematic diagram showing one aspect of the uneven portion formed on the surface of the substrate which is preferably used when preparing the substrate. In one of the embodiments of the present invention, it is a schematic diagram showing one aspect of the uneven portion formed and arranged on the surface of the substrate which is preferably used when preparing the substrate. In one of the embodiments of the present invention, it is a schematic diagram showing one aspect of the uneven portion formed on the surface of the substrate which is preferably used when preparing the substrate. In one of the embodiments of the present invention, it is a schematic diagram showing one aspect of the uneven portion formed and arranged on the surface of the substrate which is preferably used when preparing the substrate. In one of the embodiments of the present invention, it is a schematic diagram showing one aspect of the uneven portion formed on the surface of the substrate which is preferably used when preparing the substrate. (A) is a schematic perspective view of the uneven portion, and (b) is a schematic surface view of the uneven portion. In one of the embodiments of the present invention, it is a schematic diagram showing one aspect of the uneven portion formed and arranged on the surface of the substrate which is preferably used when preparing the substrate. (A) is a schematic perspective view of the uneven portion, and (b) is a schematic surface view of the uneven portion. A cross-sectional view of a semiconductor device is shown as one of the embodiments of the present invention. A cross-sectional view of a semiconductor device is shown as one of the embodiments of the present invention. As a comparative example, in the semiconductor device without a bevel structure, the semiconductor device (a) in which the end of the first electrode is located on the semiconductor film and the semiconductor device with a bevel structure obtained by the embodiment of the present invention are the first. The electric field distributions of the semiconductor devices (b) to (d) in which the ends of the electrodes are located on the insulator are shown graphically. The semiconductor device having a bevel structure obtained by the embodiment of the present invention, the semiconductor devices (b) to (d) having a bevel structure shown in FIG. 25, and the bevel structure of Comparative Example (a) shown in FIG. 25. The semiconductor device without and the electric field strength distribution of 10 nm (near the surface of the semiconductor film) under the first electrode of each semiconductor device are shown.

One of the embodiments of the present invention is a method of manufacturing a semiconductor device including at least a semiconductor film having an inclined surface at an end, wherein the inclined surface is formed on a substrate on which a mask having an inclined surface is arranged. In addition, it is characterized in that it is carried out by epitaxially growing the semiconductor film. In the embodiment of the present invention, the semiconductor film is not particularly limited as long as it can be epitaxially grown, and is at least selected from, for example, a spray method, a mist CVD method, an HVPE method, an MBE method, a MOCVD method and a sputtering method. It can be formed by one method.
As an example, a case where a semiconductor film is formed by using the HVPE method shown in FIG. 5 will be described. For example, a metal source containing a metal is gasified to obtain a metal-containing raw material gas, and then the metal-containing raw material gas and the oxygen-containing raw material gas are supplied onto a substrate in a reaction chamber on which a mask having an inclined surface is arranged. A semiconductor film can be formed. Further, when the semiconductor film is formed, the metal-containing raw material gas, the oxygen-containing raw material gas, and the reactive gas are supplied onto the substrate on which the mask having the inclined surface is arranged to perform the film formation. be able to. The HVPE apparatus 50 includes, for example, a reaction chamber 51, a heater 52a for heating the metal source 57, and a heater 52b for heating the substrate fixed to the substrate holder 56. Further, the reaction chamber 51 may include an oxygen-containing raw material gas supply pipe 55b, a reactive gas supply pipe 54b, and a base holder 56 on which a base is placed. A metal-containing raw material gas supply pipe 53b is provided in the reactive gas supply pipe 54b to form a double pipe structure. The oxygen-containing raw material gas supply pipe 55b is connected to the oxygen-containing raw material gas supply source 55a, and the oxygen-containing raw material gas is a substrate holder from the oxygen-containing raw material gas supply source 55a via the oxygen-containing raw material gas supply pipe 55b. The flow path of the oxygen-containing raw material gas is configured so that it can be supplied to the substrate fixed to 56. Further, the reactive gas supply pipe 54b is connected to the reactive gas supply source 54a, and the reactive gas is fixed to the substrate holder 56 from the reactive gas supply source 54a via the reactive gas supply pipe 54b. The flow path of the reactive gas is configured so that it can be supplied to the substrate. The metal-containing raw material gas supply pipe 53b is connected to the halogen-containing raw material gas supply source 53a, and the halogen-containing raw material gas is supplied to the metal source to become the metal-containing raw material gas, and the metal-containing raw material gas is fixed to the substrate holder 56. It is supplied to the board. The reaction chamber 51 is provided with a gas discharge unit 59 for exhausting used gas, and further, a protective sheet 58 for preventing the precipitate of reactants is provided on the inner wall of the reaction chamber 51.

(Metal source)
The metal source is not particularly limited as long as it contains a metal and can be gasified, and may be a simple substance of a metal or a metal compound. Examples of the metal include one or more metals selected from gallium, aluminum, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, iridium and the like. In the present invention, the metal is preferably one or more metals selected from gallium, aluminum and indium, more preferably gallium, and the metal source is gallium alone. Most preferred. Further, the metal source may be a gas, a liquid, or a solid, but in the present invention, for example, when gallium is used as the metal, the metal is used. The source is preferably a liquid.

The gasification means is not particularly limited and may be a known means as long as the object of the present invention is not impaired. In the embodiment of the present invention, it is preferable that the gasification means is carried out by halogenating the metal source. The halogenating agent used for the halogenation is not particularly limited as long as the metal source can be halogenated, and may be a known halogenating agent. Examples of the halogenating agent include halogens and hydrogen halides. Examples of the halogen include fluorine, chlorine, bromine, iodine and the like. Examples of the hydrogen halide include hydrogen fluoride, hydrogen chloride, hydrogen bromide, hydrogen iodide and the like. In the present invention, it is preferable to use hydrogen halide for the halogenation, and it is more preferable to use hydrogen chloride. In the present invention, the gasification is carried out by supplying halogen or hydrogen halide as a halogenating agent to the metal source, and reacting the metal source with halogen or hydrogen halide at a temperature equal to or higher than the vaporization temperature of the metal halide. It is preferable to carry out the process by forming a halogenated metal. The halogenation reaction temperature is not particularly limited, but in the present invention, for example, when the metal source is gallium and the halogenating agent is HCl, 900 ° C. or lower is preferable, and 700 ° C. or lower is preferable. More preferably, it is most preferably 400 ° C. to 700 ° C. The metal-containing raw material gas is not particularly limited as long as it is a gas containing the metal of the metal source. Examples of the metal-containing raw material gas include halides (fluoride, chloride, bromide, iodide, etc.) of the metal.

In the embodiment of the present invention, the metal source containing a metal is gasified into a metal-containing raw material gas, and then the metal-containing raw material gas and the oxygen-containing raw material gas are supplied onto the substrate in the reaction chamber. Further, in the present invention, the reactive gas is supplied onto the substrate. Examples of the oxygen-containing raw material gas include O ₂ gas, CO ₂ gas, NO gas, NO ₂ gas, N ₂ O gas, H ₂ O gas, O ₃ gas and the like. In the present invention, the oxygen-containing feed gas, O _{2, H} and even preferably one or more kinds of gas selected from 2 _O and N _{2 O} consisting of the group, and more preferably comprises an O ₂ .. As one of the embodiments of the present invention, the oxygen-containing raw material gas may contain _{CO 2.} The reactive gas is usually a reactive gas different from the metal-containing raw material gas and the oxygen-containing raw material gas, and does not contain the inert gas. The reactive gas is not particularly limited, and examples thereof include an etching gas and the like. The etching gas is not particularly limited and may be a known etching gas as long as the object of the present invention is not impaired. In the present invention, the reactive gas is a halogen gas (for example, fluorine gas, chlorine gas, bromine gas, iodine gas, etc.), hydrogen halide gas (for example, hydrofluoric acid gas, hydrochloric acid gas, hydrogen bromide gas, iodine gas, etc.). Hydrogen acid gas or the like), hydrogen gas or a mixed gas of two or more of these is preferable, hydrogen halide gas is preferably contained, and hydrogen chloride is most preferable. The metal-containing raw material gas, the oxygen-containing raw material gas, or the reactive gas may contain a carrier gas. Examples of the carrier gas include an inert gas such as nitrogen and argon. The partial pressure of the metal-containing raw material gas is not particularly limited, but in the present invention, it is preferably 0.5 Pa to 1 kPa, more preferably 5 Pa to 0.5 kPa. The partial pressure of the oxygen-containing raw material gas is not particularly limited, but in the present invention, it is preferably 0.5 to 100 times the partial pressure of the metal-containing raw material gas, and is 1 to 20 times. Is more preferable. The partial pressure of the reactive gas is also not particularly limited, but in the present invention, it is preferably 0.1 to 5 times, preferably 0.2 to 3 times, the partial pressure of the metal-containing raw material gas. Is more preferable.

In the embodiment of the present invention, it is also preferable to supply the dopant-containing gas to the substrate. The dopant-containing gas is not particularly limited as long as it contains a dopant. The dopant is also not particularly limited, but in the present invention, the dopant preferably contains one or more elements selected from germanium, silicon, titanium, zirconium, vanadium, niobium and tin, preferably germanium. It is more preferably containing silicon or tin, and most preferably it contains germanium. By using the dopant-containing gas in this way, the conductivity of the obtained film can be easily controlled. The dopant-containing gas preferably has the dopant in the form of a compound (for example, a halide, an oxide, etc.), and more preferably in the form of a halide. The partial pressure of the dopant-containing raw material gas is not particularly limited, but in the present invention, it is preferably 1 × 10 ^-7 times to 0.1 times the partial pressure of the metal-containing raw material gas, and 2.5 ×. It is more preferably ^10-6 times to 7.5 × ^{10-2 times.} In the present invention, it is preferable to supply the dopant-containing gas onto the substrate together with the reactive gas.

As will be described later, as another example, at least a part of the semiconductor film and / or the substrate in the embodiment of the present invention can be formed by using the mist CVD apparatus as shown in FIG.

(Hypokeimenon)
The substrate is not particularly limited as long as it can support the mask and / or the semiconductor film. The material of the substrate is not particularly limited as long as it does not impair the object of the present invention, and may be a known substrate, an organic compound, or an inorganic compound. The shape of the substrate may be any shape, and is effective for any shape. For example, a plate-like, fibrous, rod-like, columnar, or prismatic shape such as a flat plate or a disk Cylindrical, spiral, spherical, ring-shaped and the like can be mentioned, but in one of the embodiments of the present invention, a substrate is preferable. Further, in another embodiment of the present invention, it is also preferable that the substrate contains a crystal layer. The crystal layer may be a semiconductor layer. For example, as shown in FIG. 14, the substrate 11 may have a substrate 16 and a crystal layer (including a semiconductor layer) 17 formed on the substrate 16. The thickness of the substrate is not particularly limited in the present invention. Further, as the substrate, another layer such as a buffer layer may be laminated on the substrate as described later. A semiconductor layer having different electrical conductivity may be included as a substrate, or the substrate itself may be a semiconductor layer. For example, as shown in FIG. 15, the substrate 11 is a substrate 16, a crystal layer 17 arranged on the substrate 16 (for example, a semiconductor layer such as an n + type semiconductor layer), and the crystal layer 17. It may include yet another crystal layer 18 arranged above (for example, it may be a semiconductor layer such as an n-type semiconductor layer). In this case, as shown in FIG. 16, after the semiconductor layer 18 is formed as a part of the substrate 11, the mask layer is arranged on the semiconductor layer 18 which is the first surface 11a of the substrate 11. Next, a part of the mask layer is removed by etching to form an opening 12d having an inclined surface 12c, and the semiconductor layer 18 to be the first surface 11a of the substrate 11 is exposed in the opening 12d. The semiconductor film 14 can be continuously grown with the same semiconductor material as the semiconductor layer 18. In this way, by epitaxially growing the semiconductor film 14 from the semiconductor layer 18 which is a part of the substrate 11 using the same material, a mask having an inclined surface at least partially embedded in the semiconductor film is arranged. Moreover, it is possible to easily obtain a semiconductor device including a semiconductor film having a bevel structure that engages with the inclined surface of the mask in at least a part of the semiconductor film. As in this embodiment, the layer located on the first surface 11a of the substrate 11 and the layer located on the second surface 11b on the opposite side of the first surface 11a are crystal layers and / or semiconductor layers having different compositions from each other. You may. As one embodiment of the present invention, the opening may be formed so that the inclined surface is arranged at least a part of the side surface of the opening 12, or another embodiment is the opening of the mask layer. The opening may be formed so that the annular inclined surface is arranged on the entire side surface of the.

(Crystal substrate)
When the substrate contains a crystal substrate or the substrate is a crystal substrate, the crystal substrate is not particularly limited as long as it is a substrate containing a crystal as a main component, and may be a known substrate. It may be an insulator substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. Examples of the crystal substrate include a SiC substrate, a GaN substrate, a substrate containing a crystal having a corundum structure as a main component, a substrate containing a crystal having a β-gallium structure as a main component, and a substrate having a hexagonal structure. Can be mentioned. The "main component" refers to a composition ratio in the substrate containing 50% or more of the crystals, preferably 70% or more, and more preferably 90% or more.

Examples of the substrate containing the crystal having a corundum structure as a main component include a sapphire substrate and an α-type gallium oxide substrate. Examples of the substrate containing the crystal having a β-Galia structure as a main component include a β-Ga ₂ O ₃ substrate or a mixed crystal substrate containing β-Ga ₂ O ₃ and Al ₂ O _3. .. As the mixed crystal substrate containing β-Ga ₂ O ₃ and Al ₂ O ₃ , for example, a mixed crystal substrate containing Al ₂ O ₃ in an atomic ratio of more than 0% and 60% or less is preferable. Is mentioned as. Examples of the substrate having the hexagonal structure include a SiC substrate, a ZnO substrate, and a GaN substrate. Examples of other crystal substrates include Si substrates.

As one of the embodiments of the present invention, it is preferable that the crystal substrate is a sapphire substrate. Examples of the sapphire substrate include a c-plane sapphire substrate, an m-plane sapphire substrate, and an a-plane sapphire substrate. Further, the sapphire substrate may have an off angle. The off angle is not particularly limited, but is preferably 0 ° to 15 °. The thickness of the crystal substrate is not particularly limited, but is preferably 50 to 2000 μm, and more preferably 200 to 800 μm.

As one of the embodiments of the present invention, FIG. 1 schematically shows a part of one aspect of a mask arranged on the surface of the substrate 11. Specifically, as shown in FIG. 3A, a mask layer is formed as a mask 12 on the first surface 11a of the substrate 11. The mask material can be formed of a material having higher electrical insulation than the semiconductor film, and for example, the mask material is preferably a semi-insulator material or an insulator material. Examples of the semi-insulating material include polysilicon (polycrystalline silicon), amorphous silicon, diamond-like carbon (DLC) and an undoped crystal layer, magnesium (Mg), ruthenium (Ru), and iron (Fe). , Crystal layers containing semi-insulating dopants such as berylium (Be), cesium (Cs), strontium (Sr), barium (Ba) and the like. Examples of the insulator material include silicon dioxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ), silicon (Si), germanium (Ge), titanium (Ti), zirconium (Zr), and Hf (Huff II). Oxides such as um), Ta (tantal) and tin (Sn), nitrides or carbides and the like can be mentioned. In the embodiment of the present invention, it is more preferable that the mask layer is made of an insulator. The substrate 11 has a first surface 11a and a second surface 11b on the opposite side of the first surface 11a. A mask layer 12 (hereinafter, also referred to as a mask and / or a first mask) is formed on the first surface 11a of the substrate 11, and for example, a resist layer is arranged on at least a part of the mask layer 12, and an etching gas and / or Alternatively, by etching the mask layer 12 with an etching solution, as shown in FIG. 3B, an annular inclined surface 12c can be formed on the side surface of the opening 12d of the mask layer. In the embodiment of the present invention, the etching may be dry etching or wet etching, but isotropic etching is preferable because an inclined surface is formed on the mask layer. Further, as another embodiment of the present invention, anisotropic etching and isotropic etching may be combined. For example, the mask layer may be provided with an opening by anisotropic etching, and isotropic etching may be additionally performed to adjust the inclination angle of the inclined surface. FIG. 3B shows, for example, a cross section of the portion IIIb-IIIb of FIG. The opening 12d of the mask 12 penetrates from the first surface 12a of the mask 12 to the second surface 12b on the opposite side, and the second surface of the mask 12 is more than the first surface 12a of the mask 12. 12b is located near the first surface 11a of the substrate 11. Compared with processing such as grinding of a semiconductor film, the thick film formation and processing of the mask layer can be easily performed in a short time, and it is also easy to obtain a smooth inclined surface on the mask. Since the mask having an inclined surface in the embodiment of the present invention is used for one purpose of forming a bevel structure at the end of the semiconductor film and / or the laminated structure, the thickness is the same as the thickness of the semiconductor film. It has a thicker thickness. Therefore, the thickness of the mask on which the inclined surface is formed is preferably at least 1 μm or more, and preferably 1 μm or more and 100 μm or less. As yet another embodiment, a mask layer is formed as the mask 12 on the first surface 11a of the substrate 11, an opening 12d having the inclined surface 12c is formed, and then as shown in FIG. 3 (c). In addition, using the mask 12 as the first mask, a convex second mask 12'that has a height of less than half the height of the first mask and a surface area smaller than the size of the opening is placed in the opening 12d. It can also be arranged on the first surface 11a of the substrate 11 of the above. In this way, the semiconductor film 14 is epitaxially grown from the first surface 11a of the substrate 11 onto the second mask 12'including the lateral growth, and further laterally on the inclined surface 12c of the first mask 12. By epitaxially growing the semiconductor film 14 including growth, it is also possible to obtain a semiconductor film 14 having an inclined surface at an end portion and having less dislocations. Since the inclined surface can be formed in an annular shape at the peripheral end of the semiconductor film, a semiconductor device having a bevel structure can be easily manufactured. In the embodiment of the present invention, the shape of the opening 12d is preferably a shape having no corners in a plan view. As shown in FIG. 2, the shape of the opening 12d may be a square with rounded corners in a plan view. In this embodiment, the opening 12d of the mask 12 is circular in a plan view, and the side surface of the mask 12 in the opening 12d is toward the first surface 11a of the substrate 11 in a plan view. The inclined surface 12c is inclined in a direction approaching the center of the opening 12d. In the cross-sectional view of the opening 12d, the inclined surface 12c of the mask 12 has a tapered shape in which the thickness decreases from the first surface of the mask toward the second surface of the mask. The first surface 12a of the mask 12 and the second surface 12b are parallel to each other, and the second surface 12b of the mask 12 has a larger area than the first surface 12a of the mask 12. By growing the semiconductor film 14 on the substrate 11 on which the mask 12 having the inclined surface 12c is arranged, the semiconductor film 14 having an annular inclined surface at the peripheral end is formed, for example, in a circular shape in a plan view. can do. According to the manufacturing method according to the embodiment of the present invention, for example, the semiconductor device 100 as shown in FIG. 23 can be easily obtained. The semiconductor device 100 includes a first surface 64a, a second surface 64b located on the opposite side of the first surface 64a, a side surface located between the first surface 64a and the second surface 64b, and the side surface. 64c, a first region 64f located adjacent to the inclined surface 64c, and a position distant from the inclined surface 64c in a plan view from the first region 64f. It has a semiconductor film 64 including two regions of 64 g. The first region 64f is located near the side surface of the semiconductor film 64, and the second region 64g is located at a position including the central portion of the semiconductor film 64. In the present embodiment, the first region 64f near the end of the semiconductor film where the electric field tends to concentrate contains crystals grown in the lateral direction, and the dislocation density of the first region 64f is the first. Since it is lower than the dislocation density of 64 g in two regions, it leads to improvement of semiconductor characteristics. It has a semiconductor layer 64 and a non-conductive layer 62 in which at least a part of the side surface of the semiconductor layer 64 is in contact with each other. The non-conductive layer 62 is preferably an insulator layer, the side surface of the insulator layer 62 has a first inclined surface 62c, and the side surface of the semiconductor layer 64 has the first inclined surface 62c. It has a second inclined surface 64c inclined in the opposite direction to the above, and the first inclined surface 62c of the insulator layer 62 and the second inclined surface 64c of the semiconductor layer 64 are engaged with each other. .. The first inclined surface 62c of the insulator layer 62 and the second inclined surface 64c of the semiconductor layer 64 are in close contact with each other. In this embodiment, the angle formed by the first surface 64a of the semiconductor layer 64 and the inclined surface 64c of the semiconductor layer 64 is less than 90 °. That is, the inclined surface 64c of the semiconductor layer 64 is an inclined surface whose film thickness increases in the direction from the first surface 64a of the semiconductor layer toward the second surface 64b. Further, the semiconductor device 100 in the present embodiment has a rectifying junction interface 90, and has a first electrode 65 (here, a Schottky electrode) bonded to the semiconductor film 64 at the rectifying junction interface 90. The first electrode 65 is arranged on the first surface 64a of the semiconductor layer 64 and the first surface 62a of the insulator layer 62. The end portion 65c (also referred to as a terminal portion) of the Schottky electrode 65 is located on the insulator layer 62. With the above structure, the leak current can be suppressed in the positive bevel structure, and the electric field concentration at the terminal portion of the Schottky electrode can be effectively suppressed. Further, in the present embodiment, the second surface 64b of the semiconductor layer 64 and the second surface 62b of the insulator layer 62 are flush with each other. Further, the first surface 64a of the semiconductor layer 64 and the first surface 62a of the insulator layer 62 are flush with each other, and the Schottky electrode 65 can be arranged on a flat surface, so that the Schottky electrode can be arranged. It has a structure that suppresses electric field concentration at the end of the semiconductor device and leads to a thinner semiconductor device. Further, in the present embodiment, since the second surface 62b of the insulator layer is located closer to the Schottky electrode than the second surface 64b of the semiconductor layer, a semiconductor device having higher pressure resistance can be obtained. be able to. In the present embodiment, the semiconductor layer 64 is, for example, an n-type semiconductor layer, and the semiconductor device 100 is further arranged in contact with the second surface 64b of the n-type semiconductor layer 64. It has a 61 and a second electrode 66 (here, an ohmic electrode) arranged in contact with the n + type semiconductor layer 61. The semiconductor device in the embodiment of the present invention is a vertical Schottky barrier diode (SBD). The "rectifying interface" is not particularly limited as long as it is a bonding interface having a rectifying action. In the embodiment of the present invention, the rectifying junction is preferably a Schottky junction or a PN junction.
Further, in the method for manufacturing a semiconductor device according to the embodiment of the present invention, a mask may be placed on the crystal layer 61 to epitaxially grow a semiconductor layer having an inclined surface at an end (for example, an n + type semiconductor layer). .. If a semiconductor film 64 (for example, an n-type semiconductor layer) having an inclined surface continuous with the inclined surface of the n + type semiconductor layer is epitaxially grown on the n + semiconductor layer, a positive bevel structure is formed at the end of the laminated structure. A Schottky barrier diode (SBD), which is a semiconductor device having the above, can be easily obtained. Further, according to the manufacturing method according to the embodiment of the present invention, for example, the semiconductor device 200 as shown in FIG. 24 can be easily obtained. The semiconductor device 200 includes a first surface 64a, a second surface 64b on the opposite side of the first surface 64a and a smaller area than the first surface 64a, and the first surface 64a and the second surface 64b. The semiconductor film 64 as a first semiconductor film having an inclined surface 64c at an end located between the semiconductor film 64 and the first semiconductor film 64 arranged on the first surface 64a of the first semiconductor film 64 It has at least a second semiconductor film 67 having different electrical conductivity. The second semiconductor film 67 has a first surface 67a, a second surface 67b arranged in contact with the first surface 64a of the first semiconductor film 64, the first surface 67a, and the second surface. It has an inclined surface 67c located between it and 67b. The inclination angle 64e formed by the first surface 64a of the first semiconductor film 64 and the inclined surface 64c is preferably in the range of 10 ° <inclination angle 64e <90 °, and the inclination angle 12e is 70 ° or less. Is more preferable, and most preferably 20 ° or more and 70 ° or less. The inclination angle 67e formed by the first surface 67a of the second semiconductor film 67 and the inclined surface 67c is equal to the inclination angle 64e formed by the first surface 64a of the first semiconductor film 64 and the inclined surface 64c. A continuous inclined surface is formed from the inclined surface 64c of the first semiconductor film 64 to the inclined surface 67c of the second semiconductor film 67, and a positive bevel structure is formed at the end portions (including the peripheral end surface) of the plurality of semiconductor layers. It is also possible to obtain a semiconductor device having the above. Here, in the semiconductor device having the "positive bevel structure", the cross-sectional area at the end of the semiconductor film and / or the laminated structure including two or more semiconductor films becomes smaller toward the side where the depletion layer spreads. It refers to the structure that goes on. Further, it refers to a structure in which the angle formed by the rectifying junction interface and the end face of the low impurity concentration layer is an acute angle. For example, when the semiconductor device is a vertical SBD as shown in FIG. 23, the rectifying junction interface 90 serves as a junction (Schottky junction) interface between the Schottky electrode and the n-semiconductor layer, and is a low impurity layer. The end face becomes the end face of the n-semiconductor layer. In this case, the structure includes a structure in which the cross-sectional area of the semiconductor film parallel to the Schottky electrode becomes smaller in the direction from the Schottky electrode side to the ohmic electrode side. This also includes the case where the semiconductor film and / or the laminated structure of two or more semiconductor films has a shape like an inverted circular stand. Further, when the semiconductor device including the pn junction as shown in FIG. 24 has a "positive bevel structure", the rectified junction interface 90 becomes a pn junction interface, and the angle between the pn junction interface and the end face of the low impurity layer is 90. In the embodiment of the present invention, the angle between the pn junction interface and the end face of the low impurity layer is preferably in the range of 20 ° or more and 70 ° or less. As one of the embodiments of the present invention, the semiconductor device may include a p-type semiconductor layer as a high impurity layer and an n-type semiconductor layer as a low impurity layer laminated on the p-type semiconductor layer. Further, as another embodiment of the present invention, the semiconductor device may include an n-type semiconductor layer as a high impurity layer and a p-type semiconductor layer as a low impurity layer laminated on the n-type semiconductor layer. ..

Further, the mask 12 can also be used as the insulator layer 62 of the semiconductor device 100 shown in FIG. 23. Since the thickness of the mask 12 can be appropriately set and can be arranged as an insulator layer so as to embed at least a part of the mask 12 in the semiconductor film (layer), the mask 12 can be field-insulated in the semiconductor device. It can also be used as a film. Further, as another embodiment, by making the thickness of the mask 12 the same as that of the semiconductor film or larger than the thickness of the semiconductor film, an inclined surface can be formed at least a part of the end portion of the semiconductor film. When an inclined surface is formed on at least a part of the end portion of the laminated structure of two or more semiconductor films, the thickness of the mask 12 may be the same as or larger than the thickness of the laminated structure. , An inclined surface can be formed on at least a part of the end portion of the laminated structure. According to the embodiment of the present invention, not only the bevel structure can be easily formed, but also the field insulating film can be easily formed. The inclined surface 64c may be provided on at least a part of an end portion located between the first surface 64a and the second surface 64b, but in the present embodiment, the entire end portion may be provided. That is, it is preferable that the inclined surface 64c is provided on the entire peripheral end portion of the semiconductor film 64. By arranging the Schottky electrode on the first surface 64a side of the semiconductor film 64, a Schottky barrier diode having a positive bevel structure in which the inclination angle formed by the first surface 64a and the inclined surface 64c is less than 90 ° can be obtained. Can be done. Further, in the present embodiment, the inclination angle 64e formed by the first surface 64a of the semiconductor film 64 and the inclined surface 64c is preferably in the range of 10 ° <inclined angle 64e <90 °, and the inclined angle 64e. Is more preferably 70 ° or less, and most preferably 20 ° or more and 70 ° or less.

FIG. 4 is a diagram schematically showing a cross section of the opening of the mask shown in FIG. In the opening 12d of the mask 12 arranged on the first surface 11a of the substrate 11, the angle 12e (of the mask) formed by the second surface 12b of the mask 12 in contact with the first surface 11a of the substrate 11 and the inclined surface 12c. The tilt angle) is in the range of 10 ° <tilt 12e <90 °. Further, in the present embodiment, the inclination angle 12e formed by the second surface 12b of the mask 12 and the inclined surface 12c is preferably in the range of 10 ° <inclined angle 64e <90 °, and the inclined angle 12e is set. It is more preferably 70 ° or less, and most preferably 20 ° or more and 70 ° or less. As shown in FIG. 6, by growing the semiconductor film 14 on the substrate 11 on which the mask 12 having the inclined surface 12c is arranged, the first surface 14a and the second surface having a smaller area than the first surface 14a are formed. A semiconductor film 14 having an inclined surface 14c can be formed between the 14b and the first surface 14a and the second surface 14b, and the first surface 14a and the second surface 14b of the semiconductor film 14 are parallel to each other and parallel to each other. Can be a face. In the embodiment of the present invention, the mask can be formed of a material having higher electrical insulation than the semiconductor film 14. For example, as a mask material, _{an insulator such as silicon dioxide (SiO 2} ) or silicon nitride (Si ₃ N ₄ ) can be used. Further, as shown in FIG. 4, the protective film 13 may be arranged on the first surface 12a and the inclined surface 12c of the mask 12. By arranging the protective film 13, it can be expected to prevent the diffusion of impurities such as silicon contained in the mask material.

As shown in FIG. 6, the semiconductor film 14 can be formed at a position where the first surface 14a of the semiconductor film 14 is lower than the first surface 12a of the mask 12.
The semiconductor film has a first surface 14a, a second surface 14b opposite to the first surface 14a, and an inclined surface 14c located between the first surface 14a and the second surface 14b. The mask 12 has a first surface 12a, a second surface 12b opposite to the first surface 12a, and a side surface including an inclined surface 12c located between the first surface 12a and the second surface 12b. Further, the first surface 14a of the semiconductor film 14 can be formed at a position lower than the first surface 12a of the mask 12. As shown in FIG. 7, after the semiconductor film 14 is epitaxially grown as an n-type semiconductor, the p-type semiconductor film 9 can be epitaxially grown on the first surface 14a of the semiconductor film 14. The p-type semiconductor film 9 can also be formed so that the first surface 9a of the p-type semiconductor film 9 and the first surface 12a of the mask 12 have the same height. As described above, according to the manufacturing method according to the embodiment of the present invention, as shown in FIG. 24, a semiconductor device having a bevel structure is easily formed at the peripheral end of a laminated structure of semiconductor layers having different conductive types. be able to. Further, according to the embodiment of the present invention, a bevel structure can be usually obtained at the end of the semiconductor film where the electric field tends to concentrate, and further, in the vicinity of the end having the bevel structure rather than the center of the semiconductor film. Since a semiconductor crystal with fewer dislocations can be obtained by lateral growth, it leads to improvement of semiconductor characteristics. As will be described later, when the substrate 11 is prepared, the substrate 1 is provided with irregularities to form a crystal layer such as a buffer layer, whereby a semiconductor film is formed using the substrate containing the crystals grown in the lateral direction. You can also do it. By incorporating a crystal forming step including two or more lateral growths into the formation of the semiconductor film, a semiconductor film having as few dislocations as the vicinity of the end having a bevel structure can be formed even in the center of the semiconductor film. It is possible to obtain a semiconductor device having higher dielectric breakdown strength.

Further, as another embodiment of the present invention, the semiconductor film 14 is formed so that the first surface 14a of the semiconductor film 14 and the first surface 12a of the mask 12 are at the same height position as shown in FIG. You can also do it. The semiconductor film 14 has a first surface 14a, a second surface 14b on the opposite side of the first surface 14a, and an end portion located between the first surface 14a and the second surface 14b. The mask 12 has a first surface 12a, a second surface 12b opposite the first surface 12a, and a side surface including the inclined surface 12c located between the first surface 12a and the second surface 12b. Have. In the present embodiment, the inclined surface 14a of the semiconductor film 14 and the inclined surface 12c of the mask 12 in the opposite direction are engaged with each other, and the first surface 14a of the semiconductor film 14 and the mask 12 of the insulator are the first. One surface 12a is flush with each other. After the semiconductor film 14 is epitaxially grown, the first surface 14a of the semiconductor film 14 and / or the first surface 14a of the mask 14 is polished to be flush with each other by, for example, CMP (chemical mechanical polishing) or the like. May be good.
In this embodiment, the semiconductor film 14a and the inclined surface of the mask 12 are in close contact with each other. In this case, as shown in FIG. 11, the electrode 15 is formed by covering at least a part of the first surface 14a of the semiconductor film 14 and at least a part of the first surface 12a of the mask 12, but the semiconductor film 14 is formed. The electrode 15 can be formed on a flat surface composed of the first surface 14a of the above and the first surface 12a of the mask 12, which not only facilitates the formation of the electrode but also has a bevel structure at the end of the semiconductor film. At the same time, the semiconductor device can be flattened and thinned. By forming the end portion 15c of the electrode so as to be located on the mask 12 having higher electrical insulation than the semiconductor film, it is possible to avoid electric field concentration at the end portion of the electrode.

Further, as shown in FIG. 12, the first surface 14a of the semiconductor film 14 can be formed so as to be at a position higher than the first surface 12a of the mask 12. The semiconductor film 14 has a first surface 14a, a second surface 14b on the opposite side of the first surface 14a, and an inclined surface 14c at an end located between the first surface 14a and the second surface 14b. The mask 12 has a first surface 12a, a second surface 12b that contacts the first surface 11a of the substrate 11 on the opposite side of the first surface 12a, and the first surface 12a and the second surface. It has a side surface including the inclined surface 12c located between the surface 12b, and further, the first surface 14a of the semiconductor film 14 is located at a position lower than the first surface 12a of the mask 12. It is formed to be. In this embodiment, the annular inclined surface 14a of the semiconductor film 14 and the annular inclined surface 12c of the mask 12 in the opposite direction are engaged with each other. In this embodiment, the semiconductor film 14a and the inclined surface of the mask 12 are in close contact with each other. Further, as shown in FIG. 12, the electrode 15 is formed by covering at least a part of the first surface 14a of the semiconductor film 14 and at least a part of the first surface 12a of the mask 12, but the end of the electrode 15 is formed. By forming the portion 15c so as to be located on the mask 12 having higher electrical insulation than the semiconductor film 14, it is possible to avoid electric field concentration at the electrode end portion. In the present embodiment, as shown in FIG. 12, the electrode 15 is formed from the first surface 14a of the semiconductor film 14 beyond the inclined surface 14c at the end, and the end 15c of the electrode 15 is formed. It is located on the first surface 12a of the mask 12.

Further, as shown in FIG. 13, the first surface 14a of the semiconductor film 14 can be formed so as to be at a position lower than the first surface 12a of the mask 12. The semiconductor film 14 has a first surface 14a, a second surface 14b on the opposite side of the first surface 14a, and an inclined surface 14c at an end located between the first surface 14a and the second surface 14b. The mask 12 has a first surface 12a, a second surface 12b that contacts the first surface 11a of the substrate 11 on the opposite side of the first surface 12a, and the first surface 12a and the second surface. It has a side surface including the inclined surface 12c located between the surface 12b, and further, the first surface 14a of the semiconductor film 14 is located higher than the first surface 12a of the mask 12. It is formed to be. In the present embodiment, the annular inclined surface 14a of the semiconductor film 14 and the annular inclined surface 12c of the mask 12 in the opposite direction are engaged with each other, and the inclined surface 14a of the semiconductor film 14a and the mask 12 are engaged with each other. The inclined surface 12c is in close contact with the protective film 13 arranged on the mask 12. Further, as shown in FIG. 13, the electrode 15 is formed by covering at least a part of the first surface 14a of the semiconductor film 14 and at least a part of the first surface 12a of the mask 12, but the end of the electrode 15 is formed. By forming the portion 15c so as to be located on the mask 12 having higher electrical insulation than the semiconductor film 14, it is possible to avoid electric field concentration at the electrode end portion.

FIG. 25 shows, as a comparative example, a semiconductor device without a bevel structure, a semiconductor device (a) in which the end of the first electrode is located on the semiconductor film, and a semiconductor device with a bevel structure obtained by the embodiment of the present invention. , The electric field distributions of the semiconductor devices (b) to (d) in which the end of the first electrode 85 is located on the insulator 82 are shown graphically. The semiconductor device (b) is a semiconductor device having a bevel structure as shown in FIG. 11 as one of the embodiments of the present invention, and has a bevel structure at the end of the semiconductor film 84. The first surface of the semiconductor film 84 and the first surface of the insulator 82 of the semiconductor device (b) are flush with each other, and are arranged on the first surface of the flush semiconductor film 84 and the first surface of the insulator 82. The end of the first electrode 85 is located on the insulator 82. Further, a second electrode 86 is arranged on the opposite side of the first electrode 85. The semiconductor device (c) is a semiconductor device having a bevel structure as shown in FIG. 12 as one of the embodiments of the present invention, and has a bevel structure at the end of the semiconductor film. The first surface of the semiconductor film 84 of the semiconductor device (c) is located higher than the first surface of the insulator 82, and the first electrode 85 forms an inclined surface at the end from the first surface of the semiconductor film 84. It is formed beyond and the end of the first electrode 85 is located on the first surface of the insulator 82. The semiconductor device (d) is a semiconductor device having a bevel structure as shown in FIG. 13 as one of the embodiments of the present invention, and has a bevel structure at the end of the semiconductor film. The first surface of the semiconductor film 84 of the semiconductor device (d) is located at a position lower than the first surface of the insulator 92, and the first electrode 85 forms an inclined surface at the end from the first surface of the semiconductor film 84. It is formed beyond and the end of the first electrode 85 is located on the first surface of the insulator 82. In the semiconductor device (a) without the bevel structure, the electric field is concentrated at the end of the electrode 85 located on the semiconductor film 84, but in the semiconductor devices (b) to (d) with the bevel structure, the electric field is concentrated. No concentration was seen. FIG. 26 is a semiconductor device having a bevel structure obtained by an embodiment of the present invention, and is a semiconductor device (b) to (d) having a bevel structure shown in FIG. 25, and a comparative example (a) shown in FIG. 25. ), And the electric field strength distribution of 10 nm below the first electrode (near the surface of the semiconductor film) of each semiconductor device. It has been found that the structure is such that dielectric breakdown is unlikely to occur near the surface of the semiconductor having the bevel structure obtained in the embodiment of the present invention, that is, at the rectifying junction interface between the semiconductor and the electrode. Further, also in the semiconductor device as shown in FIG. 24, by forming the end surface of the pn junction of the semiconductor into a bevel structure, dielectric breakdown occurs in the vicinity of the end of the pn junction of the semiconductor, that is, on the surface of the semiconductor. It was found that a difficult structure can be obtained.

Further, as another embodiment of the present invention, the semiconductor film 14 is formed so that the first surface 14a of the semiconductor film 14 is located higher than the first surface 12a of the mask 12, as shown in FIG. You can also do it. Since the thickness of the mask 12 can be appropriately set, according to the embodiment of the present invention, the thickness of the semiconductor film having a bevel structure can also be appropriately set, and the end portion within the opening 12d of the mask 12 can be appropriately set. It is also easy to obtain a laminated structure having a plurality of semiconductor layers having a continuous bevel structure. Further, in FIG. 26, similarly to the semiconductor device shown in FIG. 13, the semiconductor film 84 has a bevel structure, and the first surface 84a of the semiconductor film is higher than the first surface 82a of the insulator 82 (c). As with the semiconductor device shown in FIG. 12, a semiconductor device (d) is added in which the semiconductor film 84 has a bevel structure and the first surface 84a of the semiconductor film 84 is lower than the first surface 82a of the insulator 82. The simulation result is shown. It was found that the semiconductor device (c) and the semiconductor device (d) also have a structure in which dielectric breakdown does not easily occur on the surface of the semiconductor, similar to the semiconductor device (b).

Further, as another embodiment of the present invention, when preparing the substrate 11, a substrate as exemplified by any of FIGS. 17 to 22 can be used. When the substrate 11 contains a crystal film, for example, the uneven portion formed of concave portions or convex portions is formed on the surface of the substrate, so that the crystal film of higher quality can be obtained more efficiently. Therefore, it is preferable. The uneven portion is not particularly limited as long as it is composed of a convex portion or a concave portion, and may be an uneven portion composed of a convex portion, an uneven portion composed of a concave portion, or from the convex portion and the concave portion. It may be an uneven portion. Further, the uneven portion may be formed from a regular convex portion or a concave portion, or may be formed from an irregular convex portion or a concave portion. In the present invention, it is preferable that the uneven portion is formed periodically, and it is more preferable that the uneven portion is periodically and regularly patterned. The shape of the uneven portion is not particularly limited, and examples thereof include a striped shape, a dot shape, a mesh shape, and a random shape. In the present invention, the dot shape or the striped shape is preferable, and the dot shape is more preferable. .. Further, when the uneven portion is patterned periodically and regularly, the pattern shape of the uneven portion is a polygonal shape such as a triangle, a quadrangle (for example, a square, a rectangle or a trapezoid), a pentagon or a hexagon. The shape is preferably circular or elliptical. When forming the uneven portion in a dot shape, it is preferable that the grid shape of the dots is a grid shape such as a square lattice, an orthorhombic lattice, a triangular lattice, or a hexagonal lattice, and the lattice shape of the triangular lattice is used. Is more preferable. The cross-sectional shape of the concave portion or the convex portion of the uneven portion is not particularly limited, and is, for example, U-shaped, U-shaped, inverted U-shaped, corrugated, or triangular, quadrangular (for example, square, rectangular, trapezoidal, etc.). ), Polygons such as pentagons or hexagons, etc.

The constituent material of the convex portion is not particularly limited and may be a known material. It may be an insulator material, a conductor material, or a semiconductor material. Further, the constituent material may be amorphous, single crystal, or polycrystal. Examples of the constituent material of the convex portion include oxides such as Si, Ge, Ti, Zr, Hf, Ta, Sn, nitrides or carbides, carbon, diamond, metal, and mixtures thereof. More specifically, _{a Si-containing compound containing SiO 2} , SiN or polycrystalline silicon as a main component, and a metal having a melting point higher than the crystal growth temperature of the crystalline oxide semiconductor (for example, platinum, gold, silver, palladium). , Rhodium, iridium, ruthenium and other precious metals, etc.). The content of the constituent material is preferably 50% or more, more preferably 70% or more, and most preferably 90% or more in the convex portion in terms of composition ratio.

The means for forming the convex portion may be a known means, for example, a known patterning processing means such as photolithography, electron beam lithography, laser patterning, and subsequent etching (for example, dry etching or wet etching). Can be mentioned. In the present invention, the convex portion is preferably striped or dot-shaped, and more preferably dot-shaped. Further, in the present invention, it is also preferable that the crystal substrate is a PSS (Patterned Sapphire Substrate) substrate. The pattern shape of the PSS substrate is not particularly limited and may be a known pattern shape. Examples of the pattern shape include a cone shape, a bell shape, a dome shape, a hemispherical shape, a square or a triangular pyramid shape, and the like, but in the present invention, the pattern shape is preferably a cone shape. The pitch interval of the pattern shape is also not particularly limited, but in the present invention, it is preferably 5 μm or less, and more preferably 1 μm to 3 μm.

The concave portion is not particularly limited, but may be the same as the constituent material of the convex portion, or may be a substrate. In the present invention, it is preferable that the recess is a void layer provided on the surface of the substrate. As the means for forming the concave portion, the same means as the means for forming the convex portion can be used. The void layer can be formed on the surface of the substrate by providing a groove on the substrate by a known groove processing means. The groove width, groove depth, terrace width, etc. of the void layer are not particularly limited and can be appropriately set as long as the object of the present invention is not impaired. Further, the void layer may contain air or may contain an inert gas or the like.

Hereinafter, preferred embodiments of the substrate according to the embodiment of the present invention will be described with reference to the drawings.
FIG. 17 shows, for example, one aspect of a dot-shaped uneven portion provided on the surface of a substrate in an embodiment of the present invention. The uneven portion of FIG. 17 is formed of a substrate main body 1 and a plurality of convex portions 2a provided on the surface 1a of the substrate. When the substrate is used as a substrate, the convex portion provided on the first surface of the substrate may be used as the second mask 12'shown in FIG. 3C. In this case, it is preferable that a plurality of convex portions are arranged in the opening portion 12d of the first mask 12, and the height of the convex portions of the second mask 12'is less than half the height of the opening portion of the mask. It is preferably the thickness of. It is also preferable that a plurality of second masks 12'are arranged at regular intervals. FIG. 18 shows the surface of the uneven portion shown in FIG. 17 when viewed from the zenith direction. As can be seen from FIGS. 17 and 18, the uneven portion has a configuration in which a conical convex portion 2a is formed on a triangular lattice on the surface 1a of the substrate. The convex portion 2a can be formed by a known processing means such as photolithography. The grid points of the triangular lattice are provided at regular intervals a. The period a is not particularly limited, but in the present invention, it is preferably 0.5 μm to 10 μm, more preferably 1 μm to 5 μm, and most preferably 1 μm to 3 μm. Here, the period a refers to the distance between the peak positions (that is, the grid points) of the heights in the adjacent convex portions 2a.

FIG. 19 shows one aspect of the dot-shaped uneven portion provided on the surface of the substrate in the present invention, and shows another aspect from FIG. The uneven portion of FIG. 19 is formed of a substrate main body 1 and a convex portion 2a provided on the surface 1a of the substrate. FIG. 20 shows the surface of the uneven portion shown in FIG. 4 as viewed from the zenith direction. As can be seen from FIGS. 19 and 20, the uneven portion has a configuration in which a triangular pyramid-shaped convex portion 2a is formed on a triangular lattice on the surface 1a of the substrate. The convex portion 2a can be formed by a known processing means such as photolithography. The grid points of the triangular lattice are provided at regular intervals a. The period a is not particularly limited, but in the embodiment of the present invention, it is preferably 0.5 μm to 10 μm, more preferably 1 μm to 5 μm, and most preferably 1 μm to 3 μm. When the substrate is used as a substrate, the convex portion provided on the first surface of the substrate may be used as the second mask 12'shown in FIG. 3C. In this case, it is preferable that a plurality of convex portions are arranged in the opening portion 12d of the first mask 12. The height of the protrusions is not more than half the height of the opening of the mask, and it is also preferable that the protrusions are arranged at regular intervals.

21 (a) shows one aspect of the uneven portion which may be provided on the surface of a substrate as at least a part of the substrate in embodiment of this invention, and FIG. 21 (b) shows FIG. 21 (a). ) Is schematically shown on the surface of the uneven portion. The uneven portion of FIG. 21 is formed of a substrate main body 1 and a convex portion 2a having a triangular pattern shape provided on the surface 1a of the substrate. The convex portion 2a is made of the material of the substrate or _{a silicon-containing compound such as SiO 2, and} can be formed by using a known means such as photolithography. The period a between the intersections of the triangular pattern shapes is not particularly limited, but in the embodiment of the present invention, it is preferably 0.5 μm to 10 μm, and more preferably 1 μm to 5 μm.

22 (a) shows one aspect of the uneven portion provided on the surface of the substrate as at least a part of the substrate in the embodiment of the present invention, similarly to FIG. 21 (a), and FIG. 22 (b) shows. 2 schematically shows the surface of the uneven portion shown in FIG. 22 (a). The uneven portion of FIG. 22A is formed of the substrate main body 1 and the void layer having a triangular pattern shape. The recess 2b can be formed by a known groove processing means such as laser dicing. The period a between the intersections of the triangular pattern shapes is not particularly limited, but in the embodiment of the present invention, it is preferably 0.5 μm to 10 μm, and more preferably 1 μm to 5 μm. When the substrate is used as a substrate, the convex portion provided on the first surface of the substrate may be used as the second mask 12'shown in FIG. 3C. In this case, it is preferable that a plurality of convex portions are arranged in the opening portion 12d of the first mask 12. The height of the protrusions is not more than half the height of the opening of the mask, and it is also preferable that the protrusions are arranged at regular intervals.

The width and height of the convex portion of the uneven portion, the width and depth of the concave portion, the spacing, and the like are not particularly limited, but in the embodiment of the present invention, each is preferably in the range of, for example, about 10 nm to about 1 mm. It is about 10 nm to about 300 μm, more preferably about 10 nm to about 1 μm, and most preferably about 100 nm to about 1 μm.

In the embodiment of the present invention, a buffer layer including a stress relaxation layer or the like may be provided on the substrate as at least a part of the substrate, and when the buffer layer is provided, the uneven portion is formed on the buffer layer as well. You may. Further, in the embodiment of the present invention, it is preferable that the substrate has a buffer layer on a part or all of the surface. The means for forming the buffer layer is not particularly limited and may be a known means. Examples of the forming means include a spray method, a mist CVD method, an HVPE method, an MBE method, a MOCVD method, a sputtering method and the like. In the present invention, the buffer layer formed by the mist CVD method can improve the film quality of the crystal film formed on the buffer layer, and in particular, causes crystal defects such as tilt. It is preferable because it can be suppressed. Hereinafter, a preferred embodiment of forming the buffer layer by the mist CVD method will be described in more detail.

The buffer layer preferably, for example, atomizes the raw material solution to obtain atomized droplets (atomization step), and conveys the obtained atomized droplets to the substrate using a carrier gas ( It can be formed by subjecting the mist or droplets to a thermal reaction (buffer layer forming step) on a part or all of the substrate and / or the surface of the substrate.

(Atomization process)
The atomization step atomizes the raw material solution to obtain atomized droplets. The method for atomizing the raw material solution is not particularly limited as long as the raw material solution can be atomized, and may be a known means, but in the present invention, the atomization method using ultrasonic waves is preferable. Atomized droplets obtained using ultrasonic waves have a zero initial velocity and are preferable because they float in the air. For example, instead of spraying them like a spray, they float in space and are transported as gas. Since it is a possible mist, it is not damaged by collision energy, so it is very suitable. The droplet size is not particularly limited and may be a droplet of about several mm, but is preferably 50 μm or less, and more preferably 0.1 to 10 μm.

(Raw material solution)
The raw material solution is not particularly limited as long as it is a solution in which the buffer layer, the crystal layer, and / or the semiconductor layer can be obtained by mist CVD. Examples of the raw material solution include an organic metal complex of an atomizing metal (for example, an acetylacetonate complex) and an aqueous solution of a halide (for example, fluoride, chloride, bromide, iodide, etc.). The atomizing metal is not particularly limited, and examples of such atomizing metal are selected from, for example, aluminum, gallium, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, and iridium. Seeds or two or more kinds of metals and the like can be mentioned. In the present invention, the atomizing metal preferably contains at least gallium, indium or aluminum, and more preferably at least gallium. The content of the atomizing metal in the raw material solution is not particularly limited as long as the object of the present invention is not impaired, but is preferably 0.001 mol% to 50 mol%, and more preferably 0.01 mol% to 0.01 mol%. It is 50 mol%.

It is also preferable that the raw material solution contains a dopant. By including the dopant in the raw material solution, the conductivity of the buffer layer, the crystal layer, and / or the semiconductor layer can be easily controlled without implanting ions or the like and without destroying the crystal structure. In the present invention, the dopant is preferably tin, germanium, or silicon, more preferably tin or germanium, and most preferably tin. The concentration of the dopant may be usually about 1 × 10 ¹⁶ / cm ³ to 1 × 10 ²² / cm ³ , and the concentration of the dopant may be as ^{low as about 1 × 10 17} / cm ³ or less, for example. Alternatively, the dopant may be contained in a high concentration of ^{about 1 × 10 20} / cm ^{3 or more.} In the present invention, the concentration of the dopant ^{is preferably 1 × 10 20} / cm ³ or less, and more preferably 5 × 10 ¹⁹ / cm ³ or less.

The solvent of the raw material solution is not particularly limited, and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In the present invention, the solvent preferably contains water, more preferably water or a mixed solvent of water and alcohol, and most preferably water. More specific examples of the water include pure water, ultrapure water, tap water, well water, mineral spring water, mineral water, hot spring water, spring water, fresh water, seawater, and the like. Ultrapure water is preferred.

(Transport process)
In the transport step, the atomized droplets are transported to the film forming chamber by the carrier gas. The carrier gas is not particularly limited as long as the object of the present invention is not impaired, and examples thereof include an inert gas such as oxygen, ozone, nitrogen and argon, and a reducing gas such as hydrogen gas and forming gas. .. Further, the type of the carrier gas may be one type, but may be two or more types, and a diluted gas having a reduced flow rate (for example, a 10-fold diluted gas) or the like is further used as the second carrier gas. May be good. Further, the carrier gas may be supplied not only at one place but also at two or more places. The flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 L / min, and more preferably 1 to 10 L / min. In the case of the diluted gas, the flow rate of the diluted gas is preferably 0.001 to 2 L / min, more preferably 0.1 to 1 L / min.

(Step of forming buffer layer, crystal layer and / or semiconductor layer)
In the step of forming the buffer layer, the crystal layer and / or the semiconductor layer (hereinafter, also referred to as the crystal layer), the crystal layer is formed on the substrate by thermally reacting the mist or the droplet in the film forming chamber. The thermal reaction may be any effect as long as the mist or droplet reacts with heat, and the reaction conditions and the like are not particularly limited as long as the object of the present invention is not impaired. In this step, the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent, but is preferably not too high (for example, 1000 ° C.) or lower, more preferably 650 ° C. or lower, and most preferably 400 ° C. to 650 ° C. preferable. Further, the thermal reaction may be carried out under any atmosphere of vacuum, non-oxygen atmosphere, reducing gas atmosphere and oxygen atmosphere as long as the object of the present invention is not impaired, and the thermal reaction may be carried out under atmospheric pressure or pressure. It may be carried out under either reduced pressure or reduced pressure, but in the present invention, it is preferably carried out under atmospheric pressure. The thickness of the crystal layer can be set by adjusting the formation time.

As described above, a crystal layer is formed as a buffer layer on a part or all of the surface on the substrate to form a substrate, and the above-mentioned mask is placed on the crystal layer of the substrate to epitaxially grow a semiconductor film. be able to. When the substrate is prepared, the uneven portion is provided on the substrate to form a crystal layer, so that a crystal layer containing lateral growth can be obtained. By forming the crystal film, the buffer layer is formed. Defects such as tilt in the crystal layer can be further reduced, and the film quality can be improved. Further, as described above, the crystal layer can also be used as a semiconductor layer of a semiconductor device, and by forming a semiconductor film having a bevel structure on the semiconductor layer, the film quality of the semiconductor film is further improved. Can be.

The crystal layer is not particularly limited, but in one of the embodiments of the present invention, it is preferable that the crystal layer contains a metal oxide as a main component. Examples of the metal oxide include metal oxides containing one or more metals selected from aluminum, gallium, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, iridium and the like. Be done. In the present invention, the metal oxide preferably contains one or more elements selected from indium, aluminum and gallium, more preferably at least indium and / and gallium. Most preferably it contains gallium. As one of the embodiments of the film forming method of the present invention, the buffer layer may contain a metal oxide as a main component, and the metal oxide contained in the buffer layer may contain gallium and a smaller amount of aluminum than gallium. .. Further, as one of the embodiments of the film forming method of the present invention, the buffer layer may include a superlattice structure. In the present invention, the "main component" means that the metal oxide has an atomic ratio of preferably 50% or more, more preferably 70% or more, still more preferably 90% with respect to all the components of the buffer layer. It means that the above is included, and it means that it may be 100%. The crystal structure of the crystalline oxide semiconductor is not particularly limited, but in the present invention, it is preferably a corundum structure or a β-gallia structure, and more preferably a corundum structure. Further, the crystal film and the buffer layer may have the same main component or different components as long as the object of the present invention is not impaired, but in the present invention, they are the same. Is preferable.

In the present invention, a metal-containing raw material gas, an oxygen-containing raw material gas, a reactive gas and, if desired, a dopant-containing gas are supplied onto the substrate on which the buffer layer may be provided, and the reaction gas is circulated. Membrane. In the present invention, it is preferable that the film formation is performed on a heated substrate. The film formation temperature is not particularly limited as long as it does not impair the object of the present invention, but is preferably 900 ° C. or lower, more preferably 700 ° C. or lower, and most preferably 400 ° C. to 700 ° C. Further, the film formation may be performed under any atmosphere of vacuum, non-vacuum, reducing gas atmosphere, inert gas atmosphere and oxidizing gas atmosphere as long as the object of the present invention is not impaired. Further, it may be carried out under any conditions of normal pressure, atmospheric pressure, pressure and reduced pressure, but in the present invention, it is preferably carried out under normal pressure or atmospheric pressure. The film thickness can be set by adjusting the film formation time.

The semiconductor film according to the embodiment of the present invention is formed by at least one method selected from a spray method, a mist CVD method, an HVPE method, an MBE method, a MOCVD method and a sputtering method. The main component of the semiconductor is, for example, a gallium nitride nitride semiconductor including silicon carbide, gallium nitride, gallium nitride, aluminum nitride and a mixture thereof. It may be contained as a main component, or it may contain a crystalline metal oxide as a main component. Examples of the crystalline metal oxide include metal oxides containing one or more metals selected from aluminum, gallium, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, iridium and the like. Can be mentioned. In the present invention, the crystalline metal oxide preferably contains one or more elements selected from indium, aluminum and gallium, more preferably at least indium and / and gallium. , Gallium or a mixed crystal thereof is most preferable. As one of the embodiments of the present invention, when the semiconductor film contains a crystalline metal oxide as a main component, the "main component" means that the crystalline metal oxide is an atomic ratio of the crystalline metal oxide. It means that it is preferably contained in an amount of 50% or more, more preferably 70% or more, still more preferably 90% or more, and may be 100% or more with respect to all the components. The crystal structure of the crystalline metal oxide is not particularly limited, but as one of the embodiments of the present invention, a corundum structure or a β-gallia structure is preferable, a corundum structure is more preferable, and the semiconductor film is more preferable. However, it is most preferable that the crystal growth film has a corundum structure. As one of the embodiments of the present invention, when the semiconductor film to be obtained contains the crystalline metal oxide as a main component, the buffer layer uses a substrate containing a corundum structure as at least a part of the substrate. , A crystal layer, and / or a semiconductor layer can be formed to obtain a crystal growth film having a corundum structure. The crystalline metal oxide may be a single crystal or a polycrystal, but in the embodiment of the present invention, it is preferably a single crystal. The film thickness of the semiconductor film is not particularly limited, but is preferably 3 μm or more, more preferably 10 μm or more, and most preferably 20 μm or more.

The semiconductor film obtained by the manufacturing method of the present invention can be particularly suitably used for semiconductor devices, and is particularly useful for power devices. Semiconductor devices formed using the crystal film include transistors and TFTs such as MIS and HEMT, Schottky barrier diodes using semiconductor-metal junctions, PN or PIN diodes combined with other P layers, and light receiving / receiving elements. Can be mentioned. In the embodiment of the present invention, there is an advantage that the semiconductor film can be used as it is in a semiconductor device or the like by epitaxially growing the semiconductor film on the substrate on which the mask is formed. Further, it may be applied to a semiconductor device or the like after using a known means such as peeling from the substrate or the like.

Hereinafter, examples of the present invention will be described, but the present invention is not limited thereto.

(Example)
1. 1. Preparation of substrate (formation of buffer layer)
1-1. Mist CVD device The mist CVD device 19 used in this embodiment will be described with reference to FIG. The mist CVD apparatus 19 includes a carrier gas supply source 22a for supplying a carrier gas, a flow control valve 23a for adjusting the flow rate of the carrier gas sent out from the carrier gas supply source 22a, and a carrier for supplying the carrier gas (diluted). A gas (diluted) source 22b, a flow control valve 23b for adjusting the flow rate of the carrier gas (diluted) sent out from the carrier gas (diluted) source 22b, a mist generation source 24 containing the raw material solution 24a, and water. A container 25 in which the 25a is placed, an ultrasonic transducer 26 attached to the bottom surface of the container 25, a film forming chamber 30, and a quartz supply pipe 27 connecting the mist generation source 24 to the film forming chamber 30. It includes a hot plate 28 installed in the membrane chamber 30 and an exhaust port 29. An object to be filmed (object to be filmed) 20 is installed on the hot plate 28.

1-2. Preparation of raw material solution (formation of buffer layer)
Gallium acetylacetonate is mixed with ultrapure water, and the aqueous solution is adjusted to 0.05 mol / L of gallium acetylacetonate. At this time, hydrobromic acid is contained in a volume ratio of 5%, and this is used as a raw material. It was made into a solution.

1-3. Preparation for film formation (formation of buffer layer)
1-2. The raw material solution 24a obtained in 1) was housed in the mist generation source 24. Next, a sapphire substrate was placed on the hot plate 28 as the object to be filmed 20, and the hot plate 28 was operated to raise the temperature of the object to be filmed to 550 ° C. Next, the

flow control valves

23a and 23b are opened to supply the carrier gas into the film forming chamber 30 from the carrier gas source 22a and the carrier gas (dilution) source 22b, and the atmosphere of the film forming chamber 30 is sufficiently replaced with the carrier gas. After that, the flow rate of the carrier gas was adjusted to 0.8 L / min, and the flow rate of the carrier gas (diluted) was adjusted to 0.2 L / min. Oxygen was used as the carrier gas.

1-4. Film formation (formation of buffer layer)
Next, the ultrasonic vibrator 26 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 24a through the water 25a to atomize the raw material solution 24a to generate raw material fine particles. The raw material fine particles are introduced into the film forming chamber 30 by the carrier gas and react in the film forming chamber 30 at 550 ° C. to form a buffer layer (Ga ₂ O ₃ buffer layer having a corundum structure) on the substrate 20. Was formed into a substrate. The film formation time was 10 minutes and the film thickness was 0.1 μm.

2. 2. Mask formation 2-1. Formation of mask layer 1-4. A mask layer of _{silicon oxide (SiO 2} ) was formed on the buffer layer obtained in 1) by plasma-enhanced CVD method using liquid tetraethyl orthosilicate. The film thickness of the mask layer was 1.3 μm.
2-2. Formation of photoresist layer 2-1. A photoresist layer was formed on at least a part of the mask layer obtained in 1) by photolithography.
2-3. Formation of a mask with an inclined surface 2-2. _{An opening was formed in the SiO 2} mask layer having the photoresist layer obtained in 1 above using buffered hydrofluoric acid (BHF) at room temperature. The isotropic wet etching undercut formed an opening in the mask layer with an inclined surface at the end. An angle (tilt angle) formed by the surface of the mask layer in contact with the substrate and the inclined surface was formed at 29 ° to obtain a substrate on which the mask having the inclined surface was arranged.

3. 3. Formation of semiconductor film 3-1. Film forming apparatus As the film forming apparatus according to the embodiment of the present invention, an apparatus capable of epitaxial growth can be used, and as an example of such an apparatus, the mist CVD apparatus shown in FIG. 9 was used.

3-2. Preparation of raw material solution (formation of semiconductor film)
Gallium bromide is mixed with ultrapure water, and the aqueous solution is adjusted to 0.05 mol / L of gallium. At this time, hydrobromic acid is further contained so as to be 20% by volume, and this is used as a raw material. It was made into a solution.

3-3. Preparation for film formation (formation of semiconductor film)
3-2. The raw material solution 24a obtained in 1) was housed in the mist generation source 24. Next, 2-3. The substrate on which the mask having the inclined surface obtained in the above step was arranged was placed on the hot plate 28 as the object to be filmed 20, and the temperature of the substrate was raised to 630 ° C. Next, the

flow control valves

23a and 23b are opened to supply the carrier gas into the film forming chamber 30 from the carrier gas source 22a and the carrier gas (dilution) source 22b, and the atmosphere of the film forming chamber 30 is sufficiently replaced with the carrier gas. After that, the flow rate of the carrier gas was adjusted to 0.8 L / min, and the flow rate of the carrier gas (diluted) was adjusted to 0.2 L / min. Nitrogen was used as the carrier gas.

3-4. Film formation (formation of semiconductor film)
Next, the ultrasonic vibrator 26 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 24a through the water 25a to atomize the raw material solution 24a to generate raw material fine particles. The raw material fine particles were introduced into the film forming chamber 30 by a carrier gas and reacted in the film forming chamber 30 at 630 ° C., and the mask having an inclined surface obtained in the above 2-3 was arranged. A semiconductor film was formed on the substrate 20. The film formation time was 3.5 hours.

3-5. Evaluation 3-4. The semiconductor film obtained in 1 was a clean film without cracks or abnormal growth. The obtained film was identified by performing a 2θ / ω scan at an angle of 15 to 95 degrees using an XRD diffractometer for thin films. The measurement was performed using CuKα ray. As a result, the obtained film was α-Ga ₂ O ₃ . Further, as shown in FIG. 10, an inclined surface is formed at the end of the semiconductor film of _{α-Ga 2} O _3. The SiO ₂ and the Pt film on the semiconductor film are provided for the purpose of facilitating observation. By _{forming a Schottky electrode on the SiO 2} and the semiconductor film, a Schottky contact having a positive bevel structure as a terminal structure can be obtained. It was also found that the region near the end of the semiconductor film contained crystals grown in the lateral direction, and a semiconductor film with less dislocations could be obtained near the end of the positive bevel structure.

The manufacturing method of the present invention can be used in all fields such as semiconductors (for example, compound semiconductor electronic devices, etc.), electronic parts / electrical equipment parts, optical / electrophotographic related devices, industrial parts, etc., but in particular, semiconductors having a pn junction. It is useful for manufacturing semiconductor devices including power semiconductors used for devices, power supplies, and the like.

a Period 1 Substrate 1a Substrate surface 2a Convex 2b Concave 9 p-type semiconductor film 9a First surface of p-type semiconductor film 9b Second surface of p-type semiconductor film 11 Substrate 11a First surface of substrate 11b Second surface of substrate 12 Mask 12a First surface of mask 12b Second surface of mask 12c Inclined surface of mask 12d Opening of mask 12e Inclined angle of mask 12'Second mask 13 Protective film 14 Semiconductor film 14a First surface of semiconductor film 14b Semiconductor Second surface of the film 14c Inclined surface of the semiconductor film 15 Electrode 16 Substrate 17 Crystal layer 18 Crystal layer 19 Mist CVD device 20 Object to be deposited 21 Sample stand 22a Carrier gas source 22b Carrier gas (diluted) source 23a Flow control valve 23b Flow control valve 24 Mist generator 24a Raw material solution 25 Container 25a Water 26 Ultrasonic transducer 27 Supply pipe 28 Hot plate 30 Formation chamber 50 Halide vapor phase growth (HVPE) device 51 Reaction chamber 52a Heater 52b Heater 53a Metal-containing raw material gas Supply source 53b Metal-containing raw material gas supply pipe 54a Reactive gas supply source 54b Reactive gas supply pipe 55a Oxygen-containing raw material gas supply source 55b Oxygen-containing raw material gas supply pipe 56 Substrate holder 57 Metal source 58 Protective sheet 59 Gas discharge part 61 Crystal Layer 62 Insulation layer 64 Semiconductor film 64a First surface of semiconductor film 64b Second surface of semiconductor film 64c Inclined surface of semiconductor film 64e Inclined angle between the first surface of semiconductor film and inclined surface 65 First electrode (shot key) electrode)
66 Second electrode (ohmic electrode)
67 Second semiconductor film 67a First surface of the second semiconductor film 67b Second surface of the second semiconductor film 67c Inclined surface located between the first surface and the second surface of the second semiconductor film 67e Second Inclined angle between the first surface and the inclined surface of the semiconductor film of 2 82 Insulator 84 Semiconductor film 85 First electrode 86 Second electrode 90 Rectification junction interface 100 Semiconductor device 200 Semiconductor device

Claims

A method for manufacturing a semiconductor device including at least a semiconductor film having an inclined surface at an end, wherein the semiconductor film having the inclined surface is formed by a mask having an inclined surface opposite to the inclined surface of the semiconductor film. A method for manufacturing a semiconductor device, which is performed by epitaxially growing the semiconductor film on the first surface of the arranged substrate.
The manufacturing method according to claim 1, wherein the mask is made of a material having a higher insulating property than the semiconductor film.
The manufacturing method according to claim 1 or 2, wherein the mask contains an insulating material.
The production method according to any one of claims 1 to 3, wherein the mask contains at least one material selected from silicon dioxide (SiO 2 ) and silicon nitride (Si 3 N 4).
The manufacturing method according to claim 1 or 2, wherein the mask contains a semi-insulator material.
The manufacturing method according to any one of claims 1 to 5, wherein the thickness of the mask is at least 1 μm or more.
The production method according to any one of claims 1 to 6, wherein the substrate includes a crystal substrate.
The production method according to any one of claims 1 to 7, wherein the substrate contains a crystal layer.
The manufacturing method according to claim 8, wherein the crystal layer includes a semiconductor layer.
The production method according to claim 8 or 9, wherein the crystal layer is epitaxially grown including lateral growth.
The manufacturing method according to claim 9, wherein the semiconductor film is an n-type semiconductor film, and the semiconductor layer is an n + type semiconductor film.
The manufacturing method according to any one of claims 1 to 11, wherein the semiconductor film is epitaxially grown including lateral growth.
The mask has a first surface and a second surface on the opposite side of the first surface that comes into contact with the first surface of the substrate directly or via another layer, the inclined surface of the mask. The manufacturing method according to any one of claims 1 to 12, wherein the mask has a tapered shape whose thickness decreases from the first surface of the mask toward the second surface of the mask.
The manufacturing method according to claim 13, wherein the inclination angle, which is an angle formed by the second surface of the mask and the inclined surface of the mask, is 20 ° or more and 70 ° or less.
The invention according to any one of claims 1 to 14, further comprising forming an electrode by covering at least a part of the semiconductor film and at least a part of the mask and arranging an end portion of the electrode on the mask. Manufacturing method.
The manufacturing method according to any one of claims 1 to 15, wherein the mask is used as a field insulating film.
The production method according to any one of claims 1 to 16, further comprising forming a protective film of a material different from that of the mask on the mask.
The manufacturing method according to any one of claims 1 to 17, wherein the semiconductor film is formed by at least one method selected from a spray method, a mist CVD method, an HVPE method, an MBE method, a MOCVD method and a sputtering method.
The semiconductor film has a first surface, a second surface opposite to the first surface, and an end portion located between the first surface and the second surface, and the mask is a first surface. A surface, a second surface on the opposite side of the first surface that contacts the first surface of the substrate, and a side surface including the inclined surface located between the first surface and the second surface. The production according to any one of claims 1 to 18, further comprising forming the first surface of the semiconductor film and the first surface of the mask so as to be flush with each other. Method.
The semiconductor film has a first surface, a second surface opposite to the first surface, and an end portion located between the first surface and the second surface, and the mask is a first surface. A surface, a second surface on the opposite side of the first surface that contacts the first surface of the substrate, and a side surface including the inclined surface located between the first surface and the second surface. The invention according to any one of claims 1 to 18, further comprising forming the first surface of the semiconductor film at a position lower than the first surface of the mask. Production method.
The semiconductor film has a first surface, a second surface on the opposite side of the first surface, and an end portion located between the first surface and the second surface, and the mask is a first surface. A surface, a second surface on the opposite side of the first surface that contacts the first surface of the substrate, and a side surface including the inclined surface located between the first surface and the second surface. The invention according to any one of claims 1 to 18, further comprising forming the first surface of the semiconductor film at a position higher than the first surface of the mask. Method. The manufacturing method described.
The manufacturing method according to any one of claims 19 to 21, wherein the semiconductor film is formed so that at least a part of the second surface of the semiconductor film and the second surface of the mask are flush with each other.
The method according to any one of claims 8 to 10, wherein the crystal layer is located on the first surface side of the substrate, the mask is placed on the crystal layer, and then the semiconductor film is epitaxially grown on the crystal layer. The manufacturing method described.
The production according to any one of claims 1 to 23, wherein the mask is used as a first mask, and a second mask having a thickness thinner than that of the first mask is arranged on the first surface of the substrate. Method.
Using the mask as a first mask, a second mask arranged on the first surface of the substrate and having a thickness thinner than the thickness of the first mask is arranged, the first mask and the first mask. The second mask comprises the epitaxial growth of the semiconductor film on the first surface of the substrate on which the mask 2 is arranged to form a semiconductor film having an inclined surface at an end, wherein the second mask is the first mask. The manufacturing method according to any one of claims 19 to 21, which is located in the opening of the above.
The manufacturing method according to any one of claims 1 to 25, wherein the inclined surface of the semiconductor film is formed so as to engage with the inclined surface in the opposite direction of the mask.