WO2021239984A1 - Method of assembling a semiconductor component - Google Patents

Method of assembling a semiconductor component Download PDF

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Publication number
WO2021239984A1
WO2021239984A1 PCT/EP2021/064423 EP2021064423W WO2021239984A1 WO 2021239984 A1 WO2021239984 A1 WO 2021239984A1 EP 2021064423 W EP2021064423 W EP 2021064423W WO 2021239984 A1 WO2021239984 A1 WO 2021239984A1
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WO
WIPO (PCT)
Prior art keywords
substrate
semiconductor component
components
electrical connection
molding
Prior art date
Application number
PCT/EP2021/064423
Other languages
French (fr)
Inventor
Aylin BICAKCI
Martin Becker
Zeno MÜLLER
Original Assignee
Danfoss Silicon Power Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danfoss Silicon Power Gmbh filed Critical Danfoss Silicon Power Gmbh
Publication of WO2021239984A1 publication Critical patent/WO2021239984A1/en

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    • H—ELECTRICITY
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Definitions

  • the present specification relates to assembling a semiconductor component, such as a power module.
  • a number of techniques are known for assembling semiconductor components, such as power modules.
  • a semiconductor power module may be comprise a number of elements mounted to a substrate.
  • the substrate provides mechanical support for the power module and can also provide other functions, such as heat transfer and electrical connections.
  • Circuit elements, such as power module components may be connected to the substrate using soldering or sintering techniques. Such techniques can be time consuming. There remains a need for further developments in this field.
  • this specification describes a method of assembling a semiconductor component, wherein the semiconductor component comprises a substrate (such as a direct bonded copper substrate) and one or more components (such as power module components) mounted on the substrate, the method comprising: placing an electrical connection structure (such as a leadframe) on the substrate of the semiconductor component and/or on one or more of the one or more components of the semiconductor component; using a molding press to apply pressure (and possibly also heat) to the electrical connection structure, the substrate and the one or more components of the semiconductor component; and introducing a molding compound into the molding press, thereby encapsulating the semiconductor component.
  • the semiconductor component may be a semiconductor power module.
  • the method may also be executed in a manner wherein the pressure from the molding press on the electrical connection structure, the substrate and the one or more components of the semiconductor component is applied via the molding compound.
  • the force applied through the components to be assembled is derived from the pressure of the molding compound acting upon those components in opposition to the force provided by the sides of the inner cavity of the molding press.
  • the method may further comprise a post-molding curing process.
  • the post-molding curing process may comprise maintaining the semiconductor component at a defined temperature range (such as a range between 150 and 300 degrees centigrade or some other range, such as between 170 and 190 degree centigrade) or at a (relatively) constant temperature (such as 180 degrees centigrade).
  • the post-molding curing process may comprise maintaining the semiconductor component within a set temperature range (e.g. at a (broadly) constant temperature) for a time period of up to to hours (such as 6 hours, although shorter or longer times are possible).
  • the pressure applied by the molding press may be up to tiMPa, such as io.4MPa.
  • the temperature during molding may be with a defined temperature (such as a range between 150 and 300 degrees centigrade or some other range, such as between 170 and 190 degree centigrade) or at a (relatively) constant temperature (such as 180 degrees centigrade).
  • the pressure may be applied by the molding press for a period between 90 and 600 seconds.
  • the electrical connection structure may include a sintering compound.
  • the substrate and/ or one or more components of the semiconductor component may comprise a sintering compound that makes contact with the electrical connection structure when the electrical connection structure is placed on the substrate and / or said one or more components.
  • the electrical connection structure may be sintered to the substrate and/ or to the one or more components of the semiconductor component in response to the molding press applying said pressure.
  • the method may further comprise mounting the one or more components of the semiconductor component on the substrate prior to placing the electrical connection structure on the substrate.
  • placing is meant the positioning of the electrical connection structure in the required orientation on the substrate.
  • the method may further comprise sintering said one or more component to the substrate.
  • this specification describes a semiconductor component assembled using any method as described with reference to the first embodiment.
  • this specification describes computer-readable instructions which, when executed by computing apparatus, cause the computing apparatus to perform (at least) any method as described with reference to the first embodiment.
  • this specification describes a computer-readable medium (such as a non-transitoiy computer-readable medium) comprising program instructions stored thereon for performing (at least) any method as described with reference to the first embodiment.
  • this specification describes an apparatus comprising: at least one processor; and at least one memory including computer program code which, when executed by the at least one processor, causes the apparatus to perform (at least) any method as described with reference to the first embodiment.
  • FIG. 1 is a cross-section of an example semiconductor component
  • FIG. 2 is a circuit diagram of an example inverter
  • FIGS. 3 to 5 are cross-sections of semiconductor components in accordance with example embodiments.
  • FIG. 6 is a flow chart showing an algorithm in accordance with an example embodiment
  • FIG. 7 is a block diagram of a molding press in accordance with an example embodiment
  • FIG. 8 is a flow chart showing an algorithm in accordance with an example embodiment
  • FIG. 9 is a plot showing a curing process in accordance with an example embodiment
  • FIG. to is a flow chart showing an algorithm in accordance with an example embodiment
  • FIG. 11 is a cross-section of a semiconductor component in accordance with an example embodiment
  • FIG. 12 is a cross-section of a semiconductor component in accordance with an example embodiment.
  • FIG. l is a cross-section of an example semiconductor component, indicated generally by the reference numeral to.
  • the semiconductor component to comprises a substrate it and one or more components 12 (e.g. power module components or some other circuit elements).
  • the substrate 11 is a direct bonded copper (DBC) or an active metal braze (AMB) substrate comprising two conducting layers with an insulating layer sandwiched in between.
  • the substrate 11 comprises an upper metal layer 14 and lower metal layer 16 and an insulating layer 18.
  • the substrate may be referred to as a direct copper bonded (DCB) substrate - the terms DBC and DCB are generally interchangeable.
  • the substrate 11 may be a DBC substrate comprising a ceramic electrical insulator with copper layers on either side.
  • the upper metal layer 14 e.g. upper copper layer
  • the metal layers 14 and 16 can be formed from copper, aluminium, or other alloys commonly used in the field.
  • the insulation layer 18 may be of any insulating material. Example ceramic layers that may be used as the insulation layer 18 are listed below, but the skilled person will be aware of alternatives:
  • Alumina Al 2 0 3
  • AIN Aluminium nitride
  • the components 12 mounted on the substrate 11 may include semiconductor components such as transistors, IGBTs, MOSFETs and other components such as resistors, capacitors, inductors and sensors which together form the circuitry of a semiconductor module for switching electrical currents.
  • semiconductor components such as transistors, IGBTs, MOSFETs and other components such as resistors, capacitors, inductors and sensors which together form the circuitry of a semiconductor module for switching electrical currents.
  • FIG. 2 is a circuit diagram of an example inverter circuit, indicated generally by the reference numeral 20, that may be used to provide the switching circuitry of the semiconductor power module.
  • inverter circuit indicated generally by the reference numeral 20
  • the skilled person will be aware of many alternative circuits that could be used.
  • the upper metal layer 14 (onto which the semiconductor components are mounted) may be used for the conduction of currents to and from the components (e.g. component 12) which are mounted on it. Processes such as etching may be used to form the layer 14 into multiple conductors for connecting the semiconductor components.
  • the lower metal layer 16 may be cooled, enabling the heat generated by the semiconductor components to be conducted away from the semiconductor component to.
  • a number of options for cooling the lower metal layer 16, such as the use of cooling channels, heat sinks and/or heat pipes will be readily apparent to the skilled person.
  • FIGS. 3 to 5 are cross-sections showing, in highly schematic form, the construction of a semiconductor component in accordance with an example embodiment.
  • FIG. 3 is a cross-section of an example semiconductor component, indicated generally by the reference numeral 30a.
  • the semiconductor component 30a comprises a substrate 31, a first power module component 32a and a second power module component 32b.
  • the substrate 31 may be a direct bonded copper (DBC) or an AMB substrate similar to the substrate 11 described above.
  • DBC direct bonded copper
  • the semiconductor component 30a is therefore similar to the semiconductor component to described above.
  • the substrate 31 may be a solid baseplate, such as a metal baseplate or a ceramic baseplate.
  • the power module components 32a and 32b may be mounted on the substrate 31 using soldering techniques, but superior reliability can often be obtained by using sintering techniques where a sintering paste (for example, comprising finely divided silver or copper and organic carriers) is spread on the substrate, the components are placed on the sintering paste and pressed down under high temperature. This drives off the organic carrier from the paste and forms the highly reliable sintered connection between the compound and the substrate. In one example, the temperature is maintained at a constant high temperature, with little increase during the soldering.
  • a sintering paste for example, comprising finely divided silver or copper and organic carriers
  • FIG. 4 is a cross-section of an example semiconductor component, indicated generally by the reference numeral 30b.
  • the semiconductor component 30b comprises the substrate 31 and the first and second power module components 32a and 32b described above.
  • the semiconductor component 30b also comprises a first contact pad 34a and a second contact pad 34b.
  • the contact pads 34a and 34b may be soldered or sintered to the substrate 31. Connections (not shown) may be provided between the power module components 32a and 32b and the contact pads 34a and 34b. The connections may take the form of metallisation tracks in an upper (conducting) layer of the substrate 31 and/ or wire bonds.
  • the contact pads 34a and 34b may be part of a metallisation layer that forms the metallisation tracks.
  • the contact pad 34a may be connected to the power module component 32a with a bond wire 35.
  • the substrate 31 comprises a conducting material such as a metal baseplate, then there may be an electrically insulating layer (such as an organic foil) between the contact pads 34a and 34b and the substrate.
  • FIG. 5 is a cross-section of a semiconductor component, indicated generally by the reference numeral 30c.
  • the semiconductor component 30c comprises the substrate 31, the first and second power module components 32a and 32b, the first and second contact pads 34a and 34b, and the bond wire 35 described above.
  • the semiconductor component 30c also comprises a first electrical connection structure 36a and a second electrical connection structure 36b, which electrical connection structures may form part of a lead frame (note that the semiconductor component 30c may comprise more than two electrical connection structures, not shown in the figure for simplicity).
  • the lead frame may be provided to form external connections for electrical signals in the final semiconductor component (e.g. a power module), with the lead frame having “feet” on the substrate.
  • the electrical connection structures 36a and 36b may be fixed to the substrate 31 (or, more specifically, to the contact pads 34a and 34b) by soldering.
  • FIG. 6 is a flow chart showing an algorithm, indicated generally by the reference numeral 60, in accordance with an example embodiment.
  • the algorithm 60 provides a method of assembling a semiconductor component, such as a semiconductor power module, wherein the semiconductor component comprises a substrate and one or more components mounted on the substrate (for example, as discussed above with reference to FIGS. 3 to 5).
  • the algorithm 60 starts at operation 62, where an electrical connection structure or lead frame (e.g. electrical connection structures 36a and 36b) is placed on a substrate of the semiconductor component and/or on one or more of the components (e.g. power module components or some other circuit elements) of the semiconductor component.
  • an electrical connection structure or lead frame e.g. electrical connection structures 36a and 36b
  • the electrical connection structures 36a and 36b may be placed on the substrate 31 (e.g. on the contact pads 34a and 34b respectively).
  • one or both of the electrical connection structures 36a or 36b may be placed on power module components 32a or 32b, as discussed below with reference to FIG. 11.
  • a molding press is used to apply pressure to the electrical connection structure 36a or 36b, the substrate 31 and the one or more components 32a or 32b of the semiconductor component. Heat may also be applied as part of the operation 64.
  • a pressure of up to about tiMPa is applied for a period between 90 and 600 seconds.
  • other pressures and time periods are possible.
  • a molding compound is introduced (e.g. injected) into the molding press, thereby encapsulating the semiconductor component (the semiconductor component includes the substrate, although it should be noted that in some embodiments, the base of the substrate may be exposed, for example for mounting to a heat sink or similar device).
  • the molding compound itself introduced into the molding press at great pressure, is sufficient to apply the forces required to the electrical connection structure 36a or 36b, the substrate 31 and the one or more components 32a or 32b of the semiconductor component to cause them to be permanently connected together through a sintering process.
  • FIG. 7 is a block diagram of a molding press, indicated generally by the reference numeral 70, in accordance with an example embodiment.
  • the molding press 70 may be used to implement the algorithm 60 described above.
  • the molding press 70 comprises an upper die 71, a lower die 72 and an internal cavity 73.
  • the semiconductor component 30c described above with reference to FIG. 5 (including the substrate 31, the first and second power module components 32a and 32b, the first and second contact pads 34a and 34b and the first and second electrical connection structures 36a and 36b) has been placed in the internal cavity 73 of the molding press 70.
  • the electrical connection structures 36a and 36b may take the form of a single piece of metal formed from all the electrical connectors (temporarily) connected together so that it can be handled as a single item. Such a single piece of metal is known as a lead frame.
  • connection structures 36a and 36b are placed on the substrate/contact pads (without securing the connection structures in place) and the semiconductor component 30c placed between the upper and lower dies of the molding press. The press in then closed (the configuration shown in FIG. 7).
  • the electrical connection structure(s) may be sintered to the substrate.
  • a sintering compound is provided as part of the electrical connection structure itself.
  • the substrate comprises a sintering compound that makes contact with the electrical connection structure when the electrical connection structure is placed on the substrate and/or the one or more components on the substrate.
  • mold material can be injected into the internal space between the dies (see the operation 66 described above).
  • a pressure in the mold cavity e.g. internal cavity 73
  • This may assist with pushing the molding compound through a narrow gate into the molding cavity.
  • the pressure may be raised, perhaps to tiMPa as suggested above, but perhaps higher, for example up to 3oMpa.
  • the electrical connection structures 36a and 36b may be positioned such that the die 71 may apply pressure on the electrical connection structures 36a and 36b to be pressed onto the substrate 31. In one embodiment, this is achieved by forming the electrical connection structures 36a and 36b so that they elastically deform as the upper die 71 and lower die 72 of the molding press are brought together and the press is closed. The force required to elastically deform the electrical connection structures 36a and 36b may be applied from the upper die 71, through each electrical connection structures to the section of electrical connection structures which is placed on the substrate. Thus some of the force used to close the die may be applied across the section of the electrical connection structures 36a and 36b which are in contact with the first and second contact pads 34a and 34b.
  • the applied pressure may be independent of the molding pressure.
  • the method may also be executed in a manner wherein the pressure from the molding press 70 on the electrical connection structures 36a and 36b, the substrate 31 and the first and second power module components 32a and 32b is applied via the molding compound.
  • the force applied through the components to be assembled is derived from the pressure of the molding compound acting upon those components in opposition to the force provided by the sides of the inner cavity of the molding press.
  • the semiconductor module comprises the lead frame-substrate-component unit enclosed in a protective molded body, as is illustrated in FIG. 12.
  • the lead frame extends outside the molded body and when the connections between the various external connections are removed, the semiconductor component (e.g. a semiconductor power module) is complete.
  • the lead frame need not be fixed to the substrate before being placed in the mold press.
  • the lead frame can therefore be sintered to the substrate at the same time as the mold compound is injected into the mold press.
  • the process may be as follows (using the reference numbers of FIGS. 3 to 5): - to -
  • the sintering paste may be applied to the underside of the leadframe feet ⁇ Place the lead frame (e.g. electrical connection structures 36a and 36b) on the substrate
  • the method therefore does not require a soldering step, and since the sintering of the lead frame takes place at the same time as another one of the steps, no additional steps are needed, and the equipment, tools, materials, time etc. required for such additional steps are saved.
  • the substrate may be pre-applied with a sintering paste before being placed in the molding press.
  • the sintering paste may be a wet paste or a dry paste or a pre-form.
  • all of the connections may be made by sintering simultaneously with the process of encapsulating the assembly in molding compound.
  • the electrical connection structure(s) e.g. leadframes
  • the electrical connection structure(s) may be placed into the molding press and the molding press then closed.
  • a pressure of up to tMPa may be applied on the feet of the electrical connection structure (e.g. the feet may be where the leadframe is attached to the substrate).
  • the pressure of up to tMPA may be applied, for example, for up to 60 seconds.
  • a molding compound may be pre-heated during these 60 seconds.
  • the leadframe may distort elastically as the mold closes and the leadframe in turn may create pressure on the substrate/ contact pads.
  • the electrical connection structure(s) e.g. leadframes
  • the molding press may be placed into the molding press and the molding press then closed.
  • the wet paste may provide a softer shape, no pressure may need to be applied onto the substrate.
  • the leadframe and wet paste may dry together within the molding press.
  • vacuum may be applied in the molding press in order to eliminate voids and/ or to remove organics. Up to 6o seconds (e.g. the time taken to pre-heat a molding compound) may be allowed for drying.
  • a molding temperature is maintained in the range of 150 degrees centigrade and 300 degrees centigrade.
  • the molding temperature may be maintained in the rage of 170 degrees centigrade and 190 degrees centigrade.
  • the molding temperature may be based, at least partially, on the molding material being used. For example, in case of using molding materials with higher glass transition temperature, the temperature range may be higher (e.g. up to 300 degrees centigrade.
  • FIG. 8 is a flow chart showing an algorithm, indicated generally by the reference numeral 80, in accordance with an example embodiment.
  • the algorithm 80 includes the operations 62, 64 and 66 of the algorithm 60 described above. Following the introduction of the molding compound into the molding press (operation 66), the mold is cured in a post-molding curing process 82.
  • the post molding curing process 82 may be performed on the semiconductor module within the molding press; alternatively, the semiconductor module may first be removed from the molding press, and then the post-molding curing process 82 may be performed.
  • the temperature of the module is kept within a predefined temperature range for a defined period of time.
  • the post-molding curing process may keep the semiconductor component at a temperature of between 150 and 300 degrees centigrade for a period of up to to hours.
  • FIG. 9 is a plot, indicated generally by the reference numeral 90, showing a curing process in accordance with an example embodiment. As shown in the plot 90, the post molding curing process starts at a temperature of 150 degrees centigrade, increases to about 300 degrees centigrade and is then reduced to about 150 degrees centigrade. The temperature is maintained between 150 and 300 degrees centigrade for the duration of the curing process (to hours in this example).
  • the temperature for the post-molding process may have many possible ranges within the window of 150 to 300 degrees centigrade. In one example, the temperature for the post-molding curing process may range from 170 degrees centigrade to 190 degrees centigrade.
  • the temperature for the post-molding curing process may be approximately constant (e.g. at a temperature within the range of 150 to 300 degrees centigrade) throughout the curing process.
  • FIG. to is a flow chart showing an algorithm, indicated generally by the reference numeral too, in accordance with an example embodiment.
  • the algorithm too starts at operation 102, where components are mounted on a substrate.
  • the components 32a and 32b may be power module components, as discussed above, and the operation 102 may involve mounting (e.g. placing) the components 32a and 32b on the substrate 11.
  • the components mounted on the substrate may not be power module components (e.g. if the semiconductor module is not a power module).
  • some other circuit elements may be mounted on the substrate.
  • the power module (or other) components mounted in the operation 102 are sintered to the substrate.
  • the operation 104 may include the provision of sintering material (e.g. paste), as is known in the art. In other arrangements, suitable sintering material may already be present (e.g. as part of the components mounted in the operation 102).
  • an electrical connection structure e.g. a leadframe
  • the substrate i.e. after the power module (or other) components have been mounted and sintered.
  • FIG. 12 is a cross-section of a semiconductor component, indicated generally by the reference numeral 120, in accordance with an example embodiment.
  • the embodiment shown corresponds to the embodiment shown in FIG.7, but in a more finished state.
  • the molding process is completed, and the semiconductor component has been removed from the molding press 70 shown in FIG. 7.
  • the semiconductor component 30c described above with reference to FIG. 5 (including the substrate 31, the first and second power module components 32a and 32b, the first and second contact pads 34a and 34b and the first and second electrical connection structures 36a and 36b) has been encapsulated by the molding compound 130.
  • FIG. 11 is a cross-section of a semiconductor component, indicated generally by the reference numeral 110, in accordance with an example embodiment.
  • the semiconductor component 110 comprises the substrate 31, the first and second power module components 32a and 32b and the first and second contact pads 34a and
  • the semiconductor component 110 also comprises a first electrical connection structure 102a and a second electrical connection structure 102b, which electrical connection structures may form part of a single lead frame.
  • the electrical connection structure 102b differs from the corresponding electrical connection structure of the semiconductor component described above with reference to FIG. 5 is that the structure 102b is mounted to the semiconductor component 32b rather than to a contact pad.
  • the component 110 may be used in algorithms 60, 80 and too described above. The skilled person will be aware of many further variants. The claims of the present application are intended to call all such modifications, changes and substitutions as fall within the spirit and scope of the invention. For example, the principles described herein are applicable to a wide variety of semiconductor components (not just power modules and power module components).

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Abstract

A method of assembling a semiconductor component is described, wherein the semiconductor component comprises a substrate and one or more components mounted on the substrate, the method comprising: placing an electrical connection structure on the substrate of the semiconductor component and/or on one or more of the one or more components of the semiconductor component; using a molding press to apply pressure to the electrical connection structure, the substrate and the one or more components of the semiconductor component; and introducing a molding compound into the molding press, thereby encapsulating the semiconductor component.

Description

METHOD OF ASSEMBLING A SEMICONDUCTOR COMPONENT
Field
The present specification relates to assembling a semiconductor component, such as a power module.
Background
A number of techniques are known for assembling semiconductor components, such as power modules. A semiconductor power module may be comprise a number of elements mounted to a substrate. The substrate provides mechanical support for the power module and can also provide other functions, such as heat transfer and electrical connections. Circuit elements, such as power module components may be connected to the substrate using soldering or sintering techniques. Such techniques can be time consuming. There remains a need for further developments in this field.
Summary
In a first embodiment, this specification describes a method of assembling a semiconductor component, wherein the semiconductor component comprises a substrate (such as a direct bonded copper substrate) and one or more components (such as power module components) mounted on the substrate, the method comprising: placing an electrical connection structure (such as a leadframe) on the substrate of the semiconductor component and/or on one or more of the one or more components of the semiconductor component; using a molding press to apply pressure (and possibly also heat) to the electrical connection structure, the substrate and the one or more components of the semiconductor component; and introducing a molding compound into the molding press, thereby encapsulating the semiconductor component. The semiconductor component may be a semiconductor power module.
The method may also be executed in a manner wherein the pressure from the molding press on the electrical connection structure, the substrate and the one or more components of the semiconductor component is applied via the molding compound. Thus the force applied through the components to be assembled is derived from the pressure of the molding compound acting upon those components in opposition to the force provided by the sides of the inner cavity of the molding press. The method may further comprise a post-molding curing process. The post-molding curing process may comprise maintaining the semiconductor component at a defined temperature range (such as a range between 150 and 300 degrees centigrade or some other range, such as between 170 and 190 degree centigrade) or at a (relatively) constant temperature (such as 180 degrees centigrade). The post-molding curing process may comprise maintaining the semiconductor component within a set temperature range (e.g. at a (broadly) constant temperature) for a time period of up to to hours (such as 6 hours, although shorter or longer times are possible). The pressure applied by the molding press may be up to tiMPa, such as io.4MPa. The temperature during molding may be with a defined temperature (such as a range between 150 and 300 degrees centigrade or some other range, such as between 170 and 190 degree centigrade) or at a (relatively) constant temperature (such as 180 degrees centigrade).
The pressure may be applied by the molding press for a period between 90 and 600 seconds.
The electrical connection structure may include a sintering compound. Alternatively, or in addition, the substrate and/ or one or more components of the semiconductor component may comprise a sintering compound that makes contact with the electrical connection structure when the electrical connection structure is placed on the substrate and / or said one or more components. The electrical connection structure may be sintered to the substrate and/ or to the one or more components of the semiconductor component in response to the molding press applying said pressure.
The method may further comprise mounting the one or more components of the semiconductor component on the substrate prior to placing the electrical connection structure on the substrate. By placing is meant the positioning of the electrical connection structure in the required orientation on the substrate. The method may further comprise sintering said one or more component to the substrate. In a second embodiment, this specification describes a semiconductor component assembled using any method as described with reference to the first embodiment. In a third embodiment, this specification describes computer-readable instructions which, when executed by computing apparatus, cause the computing apparatus to perform (at least) any method as described with reference to the first embodiment.
In a fourth embodiment, this specification describes a computer-readable medium (such as a non-transitoiy computer-readable medium) comprising program instructions stored thereon for performing (at least) any method as described with reference to the first embodiment.
In a fifth embodiment, this specification describes an apparatus comprising: at least one processor; and at least one memory including computer program code which, when executed by the at least one processor, causes the apparatus to perform (at least) any method as described with reference to the first embodiment.
Brief description of the drawings
Example embodiments will now be described, by way of example only, with reference to the following schematic drawings, in which: FIG. 1 is a cross-section of an example semiconductor component;
FIG. 2 is a circuit diagram of an example inverter;
FIGS. 3 to 5 are cross-sections of semiconductor components in accordance with example embodiments;
FIG. 6 is a flow chart showing an algorithm in accordance with an example embodiment;
FIG. 7 is a block diagram of a molding press in accordance with an example embodiment;
FIG. 8 is a flow chart showing an algorithm in accordance with an example embodiment; FIG. 9 is a plot showing a curing process in accordance with an example embodiment; FIG. to is a flow chart showing an algorithm in accordance with an example embodiment;
FIG. 11 is a cross-section of a semiconductor component in accordance with an example embodiment; and FIG. 12 is a cross-section of a semiconductor component in accordance with an example embodiment. Detailed description
The scope of protection sought for various embodiments of the invention is set out by the independent claims. The embodiments and features, if any, described in the specification that do not fall under the scope of the independent claims are to be interpreted as examples useful for understanding various embodiments of the invention.
In the description and drawings, like reference numerals refer to like elements throughout.
FIG. l is a cross-section of an example semiconductor component, indicated generally by the reference numeral to. The semiconductor component to comprises a substrate it and one or more components 12 (e.g. power module components or some other circuit elements).
In the example semiconductor component to, the substrate 11 is a direct bonded copper (DBC) or an active metal braze (AMB) substrate comprising two conducting layers with an insulating layer sandwiched in between. By way of example, the substrate 11 comprises an upper metal layer 14 and lower metal layer 16 and an insulating layer 18. (Note that the substrate may be referred to as a direct copper bonded (DCB) substrate - the terms DBC and DCB are generally interchangeable.)
The substrate 11 may be a DBC substrate comprising a ceramic electrical insulator with copper layers on either side. The upper metal layer 14 (e.g. upper copper layer) in the semiconductor component to may form the circuitry required for the semiconductor module, as discussed further below. Other possible substrates include DBA (direct bonded aluminium) or AMB substrate. The metal layers 14 and 16 can be formed from copper, aluminium, or other alloys commonly used in the field. The insulation layer 18 may be of any insulating material. Example ceramic layers that may be used as the insulation layer 18 are listed below, but the skilled person will be aware of alternatives:
• Alumina (Al203), which is widely used because of its low cost. It is however not a really good thermal conductor (24-28 W/mK) and is brittle. • Aluminium nitride (AIN), which is more expensive, but has far better thermal performance (> 150 W/mK).
• Silicon nitride S13N4
• Beryllium oxide (BeO),
The components 12 mounted on the substrate 11 may include semiconductor components such as transistors, IGBTs, MOSFETs and other components such as resistors, capacitors, inductors and sensors which together form the circuitry of a semiconductor module for switching electrical currents.
By way of example, FIG. 2 is a circuit diagram of an example inverter circuit, indicated generally by the reference numeral 20, that may be used to provide the switching circuitry of the semiconductor power module. The skilled person will be aware of many alternative circuits that could be used.
The upper metal layer 14 (onto which the semiconductor components are mounted) may be used for the conduction of currents to and from the components (e.g. component 12) which are mounted on it. Processes such as etching may be used to form the layer 14 into multiple conductors for connecting the semiconductor components.
The lower metal layer 16 may be cooled, enabling the heat generated by the semiconductor components to be conducted away from the semiconductor component to. A number of options for cooling the lower metal layer 16, such as the use of cooling channels, heat sinks and/or heat pipes will be readily apparent to the skilled person.
FIGS. 3 to 5 are cross-sections showing, in highly schematic form, the construction of a semiconductor component in accordance with an example embodiment.
FIG. 3 is a cross-section of an example semiconductor component, indicated generally by the reference numeral 30a. The semiconductor component 30a comprises a substrate 31, a first power module component 32a and a second power module component 32b. The substrate 31 may be a direct bonded copper (DBC) or an AMB substrate similar to the substrate 11 described above. The semiconductor component 30a is therefore similar to the semiconductor component to described above. Alternatively, the substrate 31 may be a solid baseplate, such as a metal baseplate or a ceramic baseplate. The power module components 32a and 32b may be mounted on the substrate 31 using soldering techniques, but superior reliability can often be obtained by using sintering techniques where a sintering paste (for example, comprising finely divided silver or copper and organic carriers) is spread on the substrate, the components are placed on the sintering paste and pressed down under high temperature. This drives off the organic carrier from the paste and forms the highly reliable sintered connection between the compound and the substrate. In one example, the temperature is maintained at a constant high temperature, with little increase during the soldering.
FIG. 4 is a cross-section of an example semiconductor component, indicated generally by the reference numeral 30b. The semiconductor component 30b comprises the substrate 31 and the first and second power module components 32a and 32b described above. The semiconductor component 30b also comprises a first contact pad 34a and a second contact pad 34b.
The contact pads 34a and 34b may be soldered or sintered to the substrate 31. Connections (not shown) may be provided between the power module components 32a and 32b and the contact pads 34a and 34b. The connections may take the form of metallisation tracks in an upper (conducting) layer of the substrate 31 and/ or wire bonds. For example, the contact pads 34a and 34b may be part of a metallisation layer that forms the metallisation tracks. The contact pad 34a, for example, may be connected to the power module component 32a with a bond wire 35. If the substrate 31 comprises a conducting material such as a metal baseplate, then there may be an electrically insulating layer (such as an organic foil) between the contact pads 34a and 34b and the substrate.
FIG. 5 is a cross-section of a semiconductor component, indicated generally by the reference numeral 30c. The semiconductor component 30c comprises the substrate 31, the first and second power module components 32a and 32b, the first and second contact pads 34a and 34b, and the bond wire 35 described above. The semiconductor component 30c also comprises a first electrical connection structure 36a and a second electrical connection structure 36b, which electrical connection structures may form part of a lead frame (note that the semiconductor component 30c may comprise more than two electrical connection structures, not shown in the figure for simplicity). The lead frame may be provided to form external connections for electrical signals in the final semiconductor component (e.g. a power module), with the lead frame having “feet” on the substrate.
Traditionally, the electrical connection structures 36a and 36b may be fixed to the substrate 31 (or, more specifically, to the contact pads 34a and 34b) by soldering.
FIG. 6 is a flow chart showing an algorithm, indicated generally by the reference numeral 60, in accordance with an example embodiment. The algorithm 60 provides a method of assembling a semiconductor component, such as a semiconductor power module, wherein the semiconductor component comprises a substrate and one or more components mounted on the substrate (for example, as discussed above with reference to FIGS. 3 to 5).
The algorithm 60 starts at operation 62, where an electrical connection structure or lead frame (e.g. electrical connection structures 36a and 36b) is placed on a substrate of the semiconductor component and/or on one or more of the components (e.g. power module components or some other circuit elements) of the semiconductor component. For example, as shown in FIGS. 3 to 5, the electrical connection structures 36a and 36b may be placed on the substrate 31 (e.g. on the contact pads 34a and 34b respectively). Alternatively, one or both of the electrical connection structures 36a or 36b may be placed on power module components 32a or 32b, as discussed below with reference to FIG. 11.
Next, at operation 64, a molding press is used to apply pressure to the electrical connection structure 36a or 36b, the substrate 31 and the one or more components 32a or 32b of the semiconductor component. Heat may also be applied as part of the operation 64.
In one example embodiment, a pressure of up to about tiMPa is applied for a period between 90 and 600 seconds. Of course, other pressures and time periods are possible.
Finally, at operation 66, a molding compound is introduced (e.g. injected) into the molding press, thereby encapsulating the semiconductor component (the semiconductor component includes the substrate, although it should be noted that in some embodiments, the base of the substrate may be exposed, for example for mounting to a heat sink or similar device). In some embodiments of the inventive method, the molding compound itself, introduced into the molding press at great pressure, is sufficient to apply the forces required to the electrical connection structure 36a or 36b, the substrate 31 and the one or more components 32a or 32b of the semiconductor component to cause them to be permanently connected together through a sintering process.
FIG. 7 is a block diagram of a molding press, indicated generally by the reference numeral 70, in accordance with an example embodiment. The molding press 70 may be used to implement the algorithm 60 described above.
The molding press 70 comprises an upper die 71, a lower die 72 and an internal cavity 73. As shown in FIG. 7, the semiconductor component 30c described above with reference to FIG. 5 (including the substrate 31, the first and second power module components 32a and 32b, the first and second contact pads 34a and 34b and the first and second electrical connection structures 36a and 36b) has been placed in the internal cavity 73 of the molding press 70. The electrical connection structures 36a and 36b may take the form of a single piece of metal formed from all the electrical connectors (temporarily) connected together so that it can be handled as a single item. Such a single piece of metal is known as a lead frame.
The electrical connection structures 36a and 36b are placed on the substrate/contact pads (without securing the connection structures in place) and the semiconductor component 30c placed between the upper and lower dies of the molding press. The press in then closed (the configuration shown in FIG. 7).
In response to the application of pressure by the molding press (as indicated by the arrow 74), the electrical connection structure(s) may be sintered to the substrate. In one example embodiment, a sintering compound is provided as part of the electrical connection structure itself. In an alternative embodiment, the substrate comprises a sintering compound that makes contact with the electrical connection structure when the electrical connection structure is placed on the substrate and/or the one or more components on the substrate.
At this stage, mold material can be injected into the internal space between the dies (see the operation 66 described above). There may be a pressure in the mold cavity (e.g. internal cavity 73) of the order of 1 to 5MPa during the introduction of the mold compound. This may assist with pushing the molding compound through a narrow gate into the molding cavity. With the molding compound introduced, the pressure may be raised, perhaps to tiMPa as suggested above, but perhaps higher, for example up to 3oMpa.
In an example embodiment, the electrical connection structures 36a and 36b may be positioned such that the die 71 may apply pressure on the electrical connection structures 36a and 36b to be pressed onto the substrate 31. In one embodiment, this is achieved by forming the electrical connection structures 36a and 36b so that they elastically deform as the upper die 71 and lower die 72 of the molding press are brought together and the press is closed. The force required to elastically deform the electrical connection structures 36a and 36b may be applied from the upper die 71, through each electrical connection structures to the section of electrical connection structures which is placed on the substrate. Thus some of the force used to close the die may be applied across the section of the electrical connection structures 36a and 36b which are in contact with the first and second contact pads 34a and 34b. The applied pressure may be independent of the molding pressure. The method may also be executed in a manner wherein the pressure from the molding press 70 on the electrical connection structures 36a and 36b, the substrate 31 and the first and second power module components 32a and 32b is applied via the molding compound. Thus the force applied through the components to be assembled is derived from the pressure of the molding compound acting upon those components in opposition to the force provided by the sides of the inner cavity of the molding press.
When the dies 71 and 72 are pulled apart, the semiconductor module comprises the lead frame-substrate-component unit enclosed in a protective molded body, as is illustrated in FIG. 12. The lead frame extends outside the molded body and when the connections between the various external connections are removed, the semiconductor component (e.g. a semiconductor power module) is complete.
In the algorithm 60, the lead frame need not be fixed to the substrate before being placed in the mold press. The lead frame can therefore be sintered to the substrate at the same time as the mold compound is injected into the mold press. Thus the process may be as follows (using the reference numbers of FIGS. 3 to 5): - to -
• Provide sintering paste on selected areas of the substrate. In one embodiment, this may be provided by a printing process,
• Place components (e.g. the power module components 32a and 32b) on areas of the substrate (e.g. the substrate 31) provided with sintering paste
• Sinter the components on the substrate
• Provide sintering paste on selected areas of the substrate to provide the sintering paste for the leadframe feet. Alternatively, the sintering paste may be applied to the underside of the leadframe feet · Place the lead frame (e.g. electrical connection structures 36a and 36b) on the substrate
• Place the assembly in the molding press 70
• Close the hot molding press 70 to exert initial pressure on the feet
• Apply the molding compound to the press. This may result in a further pressure increase on the feet.
The method therefore does not require a soldering step, and since the sintering of the lead frame takes place at the same time as another one of the steps, no additional steps are needed, and the equipment, tools, materials, time etc. required for such additional steps are saved.
In an example embodiment, the substrate may be pre-applied with a sintering paste before being placed in the molding press. The sintering paste may be a wet paste or a dry paste or a pre-form.
In one embodiment, all of the connections may be made by sintering simultaneously with the process of encapsulating the assembly in molding compound.
For example, when the sintering paste is a dry paste, the electrical connection structure(s) (e.g. leadframes) may be placed into the molding press and the molding press then closed. A pressure of up to tMPa may be applied on the feet of the electrical connection structure (e.g. the feet may be where the leadframe is attached to the substrate). The pressure of up to tMPA may be applied, for example, for up to 60 seconds. In one example, a molding compound may be pre-heated during these 60 seconds. In one example, the leadframe may distort elastically as the mold closes and the leadframe in turn may create pressure on the substrate/ contact pads.
In another example, when the sintering paste is a wet paste, the electrical connection structure(s) (e.g. leadframes) may be placed into the molding press and the molding press then closed. As the wet paste may provide a softer shape, no pressure may need to be applied onto the substrate. When the leadframe is placed on the wet paste, the leadframe and wet paste may dry together within the molding press. In one example, vacuum may be applied in the molding press in order to eliminate voids and/ or to remove organics. Up to 6o seconds (e.g. the time taken to pre-heat a molding compound) may be allowed for drying.
In an example embodiment, during the molding, a molding temperature is maintained in the range of 150 degrees centigrade and 300 degrees centigrade. In another example, the molding temperature may be maintained in the rage of 170 degrees centigrade and 190 degrees centigrade. The molding temperature may be based, at least partially, on the molding material being used. For example, in case of using molding materials with higher glass transition temperature, the temperature range may be higher (e.g. up to 300 degrees centigrade.
FIG. 8 is a flow chart showing an algorithm, indicated generally by the reference numeral 80, in accordance with an example embodiment.
The algorithm 80 includes the operations 62, 64 and 66 of the algorithm 60 described above. Following the introduction of the molding compound into the molding press (operation 66), the mold is cured in a post-molding curing process 82. The post molding curing process 82 may be performed on the semiconductor module within the molding press; alternatively, the semiconductor module may first be removed from the molding press, and then the post-molding curing process 82 may be performed.
During the post-molding curing process 82, the temperature of the module is kept within a predefined temperature range for a defined period of time. For example, the post-molding curing process may keep the semiconductor component at a temperature of between 150 and 300 degrees centigrade for a period of up to to hours. FIG. 9 is a plot, indicated generally by the reference numeral 90, showing a curing process in accordance with an example embodiment. As shown in the plot 90, the post molding curing process starts at a temperature of 150 degrees centigrade, increases to about 300 degrees centigrade and is then reduced to about 150 degrees centigrade. The temperature is maintained between 150 and 300 degrees centigrade for the duration of the curing process (to hours in this example).
Those skilled in the art may appreciate that the temperature for the post-molding process may have many possible ranges within the window of 150 to 300 degrees centigrade. In one example, the temperature for the post-molding curing process may range from 170 degrees centigrade to 190 degrees centigrade.
In one example, the temperature for the post-molding curing process may be approximately constant (e.g. at a temperature within the range of 150 to 300 degrees centigrade) throughout the curing process.
FIG. to is a flow chart showing an algorithm, indicated generally by the reference numeral too, in accordance with an example embodiment. The algorithm too starts at operation 102, where components are mounted on a substrate. By way of example, the components 32a and 32b may be power module components, as discussed above, and the operation 102 may involve mounting (e.g. placing) the components 32a and 32b on the substrate 11. It should be noted that, in some example embodiments, the components mounted on the substrate may not be power module components (e.g. if the semiconductor module is not a power module). For example, some other circuit elements may be mounted on the substrate.
At operation 104, the power module (or other) components mounted in the operation 102 are sintered to the substrate. The operation 104 may include the provision of sintering material (e.g. paste), as is known in the art. In other arrangements, suitable sintering material may already be present (e.g. as part of the components mounted in the operation 102).
Next, at operation 106, an electrical connection structure (e.g. a leadframe) is placed on the substrate (i.e. after the power module (or other) components have been mounted and sintered). Following the placement of the electrical connection structure of the substrate, some or all of the operations 64, 66 and 82 described above may be carried out.
FIG. 12 is a cross-section of a semiconductor component, indicated generally by the reference numeral 120, in accordance with an example embodiment. The embodiment shown corresponds to the embodiment shown in FIG.7, but in a more finished state. Here, the molding process is completed, and the semiconductor component has been removed from the molding press 70 shown in FIG. 7. As shown in FIG. 7, the semiconductor component 30c described above with reference to FIG. 5 (including the substrate 31, the first and second power module components 32a and 32b, the first and second contact pads 34a and 34b and the first and second electrical connection structures 36a and 36b) has been encapsulated by the molding compound 130.
The embodiments of the invention described above are provided by way of example only. The skilled person will be aware of many modifications, changes and substitutions that could be made without departing from the scope of the present invention. By way of example, FIG. 11 is a cross-section of a semiconductor component, indicated generally by the reference numeral 110, in accordance with an example embodiment. The semiconductor component 110 comprises the substrate 31, the first and second power module components 32a and 32b and the first and second contact pads 34a and
34b described above. The semiconductor component 110 also comprises a first electrical connection structure 102a and a second electrical connection structure 102b, which electrical connection structures may form part of a single lead frame. The electrical connection structure 102b differs from the corresponding electrical connection structure of the semiconductor component described above with reference to FIG. 5 is that the structure 102b is mounted to the semiconductor component 32b rather than to a contact pad. The component 110 may be used in algorithms 60, 80 and too described above. The skilled person will be aware of many further variants. The claims of the present application are intended to call all such modifications, changes and substitutions as fall within the spirit and scope of the invention. For example, the principles described herein are applicable to a wide variety of semiconductor components (not just power modules and power module components).

Claims

Claims
1. A method of assembling a semiconductor component, wherein the semiconductor component comprises a substrate and one or more components mounted on the substrate, the method comprising: placing an electrical connection structure on the substrate of the semiconductor component and/or on one or more of the one or more components of the semiconductor component; using a molding press to apply pressure to the electrical connection structure, the substrate and the one or more components of the semiconductor component; and introducing a molding compound into the molding press, thereby encapsulating the semiconductor component.
2. A method as claimed in claim l, wherein the pressure from the form press on the electrical connection structure, the substrate and the one or more components of the semiconductor component is applied via the molding compound.
3. A method as claimed in claim 1 or 2, further comprising a post-molding curing process.
4. A method as claimed in claim 3, wherein the post-molding curing process comprises maintaining the semiconductor component at a temperature in a range between 150 and 300 degrees centigrade. 5. A method as claimed in claim 3 or claim 4, wherein the post-molding curing process comprises maintaining the semiconductor component within a set temperature range for a time period of up to to hours.
6. A method as claimed in any one of the preceding claims, wherein the pressure applied by the molding press is up to tiMPa.
7. A method as claimed in any one of the preceding claims, wherein the pressure is applied by the molding press for a period between 90 and 600 seconds. 8. A method as claimed in any one of the preceding claims, wherein the electrical connection structure includes a sintering compound. 9. A method as claimed in any one of the preceding claims, wherein the substrate and/ or one or more components of the semiconductor component comprise a sintering compound that makes contact with the electrical connection structure when the electrical connection structure is placed on the substrate and/ or said one or more components. to. A method as claimed in any one of the preceding claims, wherein the electrical connection structure is sintered to the substrate and/or to the one or more components of the semiconductor component in response to the molding press applying said pressure.
11. A method as claimed in any one of the preceding claims, further comprising mounting the one or more components of the semiconductor component on the substrate prior to placing the electrical connection structure on the substrate.
12. A method as claimed in any one of the preceding claims, wherein the one or more components comprise power module components. 13. A method as claimed in any one of the preceding claims, wherein the substrate is a direct bonded copper substrate.
14. A method as claimed in any one of the preceding claims, wherein the electrical connection structure is a lead frame.
15. A method as claimed in any one of claims 1 to 14, wherein the semiconductor component is a semiconductor power module.
16. A semiconductor component assembled using the method of any one of the preceding claims.
PCT/EP2021/064423 2020-05-29 2021-05-28 Method of assembling a semiconductor component WO2021239984A1 (en)

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US20050161782A1 (en) * 2003-12-24 2005-07-28 Sanyo Electric Co., Ltd. Hybrid integrated circuit device and manufacturing method of the same
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