WO2021237615A1 - 充电器驱动电路、集成电路、充电器、充电控制方法及充电控制系统 - Google Patents

充电器驱动电路、集成电路、充电器、充电控制方法及充电控制系统 Download PDF

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Publication number
WO2021237615A1
WO2021237615A1 PCT/CN2020/093027 CN2020093027W WO2021237615A1 WO 2021237615 A1 WO2021237615 A1 WO 2021237615A1 CN 2020093027 W CN2020093027 W CN 2020093027W WO 2021237615 A1 WO2021237615 A1 WO 2021237615A1
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Prior art keywords
terminal
switch
control
nmos
tube
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PCT/CN2020/093027
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English (en)
French (fr)
Inventor
林宋荣
张彩辉
金军骞
Original Assignee
深圳市大疆创新科技有限公司
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Application filed by 深圳市大疆创新科技有限公司 filed Critical 深圳市大疆创新科技有限公司
Priority to CN202080024163.7A priority Critical patent/CN113661626A/zh
Priority to PCT/CN2020/093027 priority patent/WO2021237615A1/zh
Publication of WO2021237615A1 publication Critical patent/WO2021237615A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J2207/20—Charging or discharging characterised by the power electronics converter

Definitions

  • the embodiment of the present invention relates to the technical field of battery charging, in particular to a charger drive circuit, an integrated circuit, a charger, a charging control method, and a charging control system.
  • the invention provides a charger drive circuit, an integrated circuit, a charger, a charging control method and a charging control system, aiming to save material costs.
  • a charger driving circuit includes an isolated power supply module, a control switch and a charging channel switch.
  • the isolated power module has a power input and a power output, the isolated power module includes a charge pump circuit, the power input is connected to the power output through the charge pump circuit, and the power input is connected to a voltage
  • the power source is used to receive an input voltage
  • the power supply output terminal is used to output an output voltage
  • the charge pump circuit is used to isolate the output voltage from the input voltage.
  • the control switch is electrically connected to the power output end of the isolated power supply module.
  • the charging channel switch is used to connect the control switch and the rechargeable battery, and the charging channel switch is used to turn on and off under the control of the control switch to control whether to charge the rechargeable battery. Wherein, when the control switch is closed based on the charging control signal, the charging channel switch is turned on under the trigger of the output voltage, so as to charge the rechargeable battery.
  • a charger is provided.
  • the charger includes the charger drive circuit as described above.
  • an integrated circuit has a plurality of pins, and the plurality of pins include a power input pin for connecting a voltage source to receive an input voltage, a charging control signal pin for receiving a charging control signal, and a driving signal outputting pin.
  • the driving signal pin is used to connect to the charging channel switch, and is used to control the on and off of the charging channel switch.
  • the integrated circuit has a power output terminal for outputting an output voltage isolated from the input voltage.
  • the integrated circuit integrates a control switch electrically coupled to the charging control signal pin, and the control switch is electrically connected to the power output terminal. When the control switch is closed based on the charging control signal, the driving signal pin outputs a driving signal for turning on the charging channel switch under the trigger of the output voltage output from the power supply output terminal.
  • a charger includes an integrated circuit, a pumping capacitor, an output capacitor, and a charging channel switch.
  • the integrated circuit has a plurality of pins, and the plurality of pins include a power input pin for connecting a voltage source to receive an input voltage, a charging control signal pin for receiving a charging control signal, and a driving signal outputting pin.
  • the driving signal pin is used to connect to the charging channel switch to control the on and off of the charging channel switch.
  • the inside of the integrated circuit has a power output terminal for outputting an output voltage isolated from the input voltage.
  • the integrated circuit integrates a control switch electrically coupled to the charging control signal pin, and the control switch is electrically connected to the power output terminal.
  • the driving signal pin When the control switch is closed based on the charging control signal, the driving signal pin outputs a driving signal for turning on the charging channel switch under the trigger of the output voltage output from the power supply output terminal.
  • the plurality of pins further include a pumping capacitor positive pin for connecting to the positive electrode of the pumping capacitor, a pumping capacitor negative pin for connecting to the negative electrode of the pumping capacitor, a ground pin, and a ground pin for connecting to the output capacitor.
  • the positive terminal of the output terminal of the power supply is electrically coupled to the positive pin of the output capacitor, and the negative terminal of the output terminal of the power supply is electrically coupled to the negative pin of the output capacitor.
  • the integrated circuit integrates a first switch module and a second switch module.
  • the power input pin is coupled to the positive pin of the pumping capacitor
  • the negative pin of the pumping capacitor is coupled to the ground pin
  • the input voltage is The pumping capacitor is charged.
  • the positive pin of the pumping capacitor is coupled with the positive pin of the output capacitor
  • the negative pin of the pumping capacitor is coupled with the output capacitor
  • the pumping capacitor is connected in parallel with the output capacitor, and the pumping capacitor charges the output capacitor.
  • the pumping capacitor is connected between the positive pin of the pumping capacitor and the negative pin of the pumping capacitor of the integrated circuit.
  • the output capacitor is connected between the positive pin of the output capacitor and the negative pin of the output capacitor of the integrated circuit.
  • the charging channel switch is connected to the driving signal pin of the integrated circuit.
  • a charging control method is provided.
  • the method is applied to the above-mentioned charger driving circuit.
  • the method includes: controlling the charging channel switch to turn on and off based on a charging control signal; and when the charging control signal makes the control switch close, the output voltage triggers the charging channel switch to turn on, To charge the rechargeable battery.
  • a charging control system includes one or more processors.
  • the processors work individually or collectively to execute the charging control method as described above.
  • the charger drive circuit of the embodiment of the present invention and the charger with the charger drive circuit use a charge pump circuit to form an isolated power supply module, thereby saving the cost of purchasing an isolated power supply, and has low product cost, small size, and simple structure , Can be applied to high-end MOS tube drive.
  • the integrated circuit of the embodiment of the present invention can be suitable for high-end MOS tube driving, and the chip cost is low.
  • the charger with the integrated circuit according to the embodiment of the present invention can save the cost of purchasing an isolated power supply, has low product cost, small volume, simple structure, and can be applied to high-end MOS tube driving.
  • the charging control method of the embodiment of the present invention is simple and easy to implement.
  • the charging control system of the embodiment of the present invention has the advantages of low cost and small size.
  • Figure 1 is a circuit diagram of a MOS drive circuit used in an agricultural machine charger
  • FIG. 2 is a structural block diagram of an application scenario of a charger according to an embodiment of the present invention.
  • Fig. 3 is a structural block diagram of a charger driving circuit according to an embodiment of the present invention.
  • Figure 4 is a working principle diagram of a charge pump circuit
  • FIG. 5 is a structural block diagram of a charge pump circuit according to an embodiment of the present invention.
  • Fig. 6 is a circuit diagram of a charger driving circuit according to the first embodiment of the present invention.
  • Fig. 7 is a circuit diagram of a charger driving circuit according to a second embodiment of the present invention.
  • Fig. 8 is a circuit diagram of a charger driving circuit according to a third embodiment of the present invention.
  • FIG. 9 is a schematic diagram of the integrated circuit of the first embodiment of the present invention.
  • Fig. 10 is a schematic diagram of an integrated circuit according to a second embodiment of the present invention.
  • FIG. 11 is a structural block diagram of a charger according to another embodiment of the present invention.
  • Figure 12 is a structural block diagram of a charger according to another embodiment of the present invention.
  • FIG. 13 is a schematic flowchart of a charging control method according to an embodiment of the present invention.
  • Fig. 14 is a schematic block diagram of a charging control system according to an embodiment of the present invention.
  • FIG. 1 discloses a circuit diagram of a MOS driving circuit 800 used in an agricultural machine charger.
  • the charging channel switch circuit uses an NMOS tube.
  • the charging channel switch circuit shown in FIG. 1 includes two MOS transistor switch units, each of which includes two NMOS transistors electrically coupled back to back.
  • the first MOS transistor switch unit 801 includes an NMOS transistor.
  • the second MOS transistor switch unit 802 includes NMOS transistors Q3 and Q4.
  • a 12V+ isolated power supply is required.
  • the output voltage of the 12V+ isolated power supply is superimposed on the charging bus 59V+ to form a voltage of about 72V+.
  • the charging control signal Driver_A2 received by the negative electrode of the light-emitting diode of the optocoupler U is set to low level, the optocoupler U is turned on, and the voltage of 72V+ is connected to the four NMOS tubes through the optocoupler U.
  • a voltage Vgs of 12V is formed between the gate G and the source S of Q1, Q2, Q3, and Q4, so that the NMOS transistors Q1, Q2, Q3, and Q4 are turned on to charge the rechargeable battery.
  • the charging control signal Driver_A2 signal received by the negative electrode of the light-emitting diode of the optocoupler U is set to a high level, the optocoupler U is turned off, and the gates G and G of the four NMOS transistors Q1, Q2, Q3, and Q4
  • the 12V voltage Vgs between the source S consumes charge through the resistor Rgs between the gate G and the source S, and the four NMOS transistors Q1, Q2, Q3, Q4 are slowly turned off, and the turn-off time is 500 ⁇ s.
  • the embodiment of the present invention proposes an alternative solution.
  • FIG. 2 discloses a structural block diagram of an application scenario of the charger 10 according to an embodiment of the present invention.
  • the charger 10 may include a battery interface 13, a charging power supply interface 12, a charger driving circuit 100 and a controller 14.
  • the battery interface 13 is used to detachably connect to the rechargeable battery 70
  • the charging power interface 12 is used to detachably connect to the charging power source 60
  • the charger drive circuit 100 is connected between the battery interface 13 and the charging power interface 12 for control
  • the charging power source 60 charges the rechargeable battery 70.
  • the controller 14 is in communication connection with the charger driving circuit 100 for controlling the charger driving circuit 100.
  • the charger driving circuit 100 drives the charging power source 60 to charge the rechargeable battery 70.
  • FIG. 3 discloses a structural block diagram of a charger driving circuit 100 according to an embodiment of the present invention.
  • the charger driving circuit 100 includes an isolated power supply module 110, a control switch 130 and a charging channel switch 140.
  • the isolated power module 110 has a power input terminal Vin and a power output terminal Vout.
  • the isolated power module 110 includes a charge pump circuit 111, and the power input terminal Vin is connected to the power output terminal Vout through the charge pump circuit 111.
  • the power input terminal Vin is connected to a voltage source VCC for receiving an input voltage, and the input voltage provided by the voltage source VCC is, for example, a 12V voltage.
  • the power output terminal Vout is used to output an output voltage, and the charge pump circuit 111 is used to isolate the output voltage from the input voltage.
  • the so-called "isolation" means that there is no direct electrical connection between the input circuit and the output circuit of the power supply, and the input and output are in an insulated high-impedance state, and there is no current loop.
  • FIG 4 reveals a working principle diagram of a charge pump circuit.
  • the charge pump circuit includes a pumping capacitor Cp and an output capacitor Cout.
  • the pumping capacitor Cp is used as an intermediate transfer station for charge.
  • the input voltage Uin can feed the pumping capacitor Cp. Charge.
  • the pumping capacitor Cp is connected in parallel with the output capacitor Cout, the pumping capacitor Cp is discharged, and the charge of the pumping capacitor Cp is transferred to the output capacitor Cout, thereby outputting an output Voltage Uout.
  • the charge pump circuit also includes an input capacitor Cin.
  • the embodiment of the present invention uses the charge transfer principle of the pumping capacitor Cp of the charge pump circuit 111 to design the isolated power supply module 110, which can be suitable for high-end MOS driving circuits.
  • control switch 130 is electrically connected to the power output terminal Vout of the isolated power module 110, and receives the charging control signal S3.
  • the charging channel switch 140 is connected to the control switch 130, and the charging channel switch 140 is connected to the rechargeable battery 70.
  • the charging channel switch 140 is used to turn on and off under the control of the control switch 130 to control whether to charge the rechargeable battery 70 .
  • the charging channel switch 140 is turned on under the trigger of the output voltage output by the isolated power supply module 110, so as to charge the rechargeable battery 70.
  • the charger driving circuit 100 of the embodiment of the present invention uses the charge pump circuit 111 to design the isolated power supply module 110 to output an isolated output voltage, so that the high material cost of purchasing an isolated power supply can be saved.
  • the charging channel switch 140 has a control terminal T.
  • the control switch 130 is electrically coupled with the control terminal T of the charging channel switch 140 to control the isolation between the power output terminal Vout of the power supply module 110 and the control terminal T of the charging channel switch 140. connect.
  • the output voltage may be equal to the input voltage.
  • the output voltage may also be greater than the input voltage, and the charge pump circuit 111 may provide a multiplied output voltage.
  • FIG. 5 discloses a structural block diagram of the charge pump circuit 111 according to an embodiment of the present invention.
  • the charge pump circuit 111 of an embodiment of the present invention includes a pumping capacitor Cp, an output capacitor Cout connected to the power output terminal Vout, a first switch module 112 and a second switch module 113.
  • the voltage source VCC is connected to both ends of the pumping capacitor Cp, and the input voltage charges the pumping capacitor Cp.
  • the pumping capacitor Cp is connected in parallel with the output capacitor Cout, and the pumping capacitor Cp charges the output capacitor Cout.
  • the charge pump circuit 111 further includes an input capacitor Cin connected to the power input terminal Vin.
  • the input capacitor Cin and the pumping capacitor Cp are connected in parallel.
  • the input capacitor Cin can be used to stabilize the input voltage.
  • the voltage across the input capacitor Cin cannot change suddenly, thus ensuring the stability of the input voltage.
  • the pumping capacitor Cp, the output capacitor Cout, and the input capacitor Cin may include ceramic capacitors.
  • the pumping capacitor Cp, the output capacitor Cout and/or the input capacitor Cin are chip ceramic capacitors, and the capacitance of the ceramic capacitor does not need to be large.
  • the capacitance of a ceramic capacitor can be 100NF (nanofarad)-1 ⁇ F (microfarad).
  • the isolated power module 110 using the charge pump circuit 111 is small in size and occupies a small PCB area, which is convenient for PCB layout and component placement.
  • FIG. 6 discloses a circuit diagram of the charger driving circuit 100 according to the first embodiment of the present invention.
  • the first switch module 112 includes a first diode D1.
  • the anode of the first diode D1 is connected to the voltage source VCC, and the cathode of the first diode D1 is connected to the pumping capacitor Cp.
  • the second switch module 113 includes a second diode D2, the anode of the second diode D2 is connected to the positive terminal of the pumping capacitor Cp, and the cathode of the second diode D2 is connected to the positive terminal of the output capacitor Cout.
  • the first diode D1 and the second diode D2 can function as switches.
  • the first diode D1 and the second diode D2 can function as switches K1 and K2 in the working principle diagram of the charge pump circuit shown in FIG. 4.
  • the isolated power module 110 of the embodiment of the present invention cleverly uses the first diode D1 and the second diode D2 in the charge pump circuit 111 to act as a switch, so that the trigger operation of the switch can be omitted, and the structure very simple.
  • the first switch module 112 has a first control terminal T1, and the first control terminal T1 is used to receive the first control signal S1, and control the opening and closing of the first switch module 112 through the first control signal S1.
  • the first switching module 112 may include a first switching tube, and the first switching tube is controlled to be turned on and off by the first control signal S1 to control the opening and closing of the first switching module 112.
  • the first switch tube includes a first NMOS tube Q50.
  • the gate G of the first NMOS is connected to the first control terminal T1 of the first switch module 112 for receiving the first control signal S1.
  • the drain D of the first NMOS is connected to the negative terminal of the pumping capacitor Cp, and the source S of the first NMOS is grounded to GND.
  • a first resistor R1 is provided between the gate G and the source S of the first NMOS transistor Q50, and the first resistor R1 is a voltage dividing resistor, which can function as a voltage dividing resistor.
  • the gate G of the first NMOS transistor Q50 is connected to the first control terminal T1 of the first switch module 112 through the second resistor R2.
  • the drain D of the first NMOS transistor Q50 is connected to the negative terminal of the pumping capacitor Cp through the third resistor R3.
  • the second resistor R2 and the third resistor R3 are current-limiting resistors, which can function as current-limiting resistors.
  • the second switch module 113 has a second control terminal T2, and the second control terminal T2 is used to receive the second control signal S2, and the second control signal S2 is used to control the opening and closing of the second switch module 113.
  • the second switch module 113 may include a second switch tube and a third switch tube. The second switch tube is connected between the negative terminal of the pumping capacitor Cp and the negative terminal of the output capacitor Cout, and the third switch is controlled by the second control signal S2. The turn-on and turn-off of the tube control the second switch tube.
  • the second switching tube includes a PMOS tube Q51
  • the third switching tube includes a second NMOS tube Q52.
  • the drain D of the PMOS tube Q51 is connected to the negative terminal of the pumping capacitor Cp
  • the source S of the PMOS tube Q51 is connected to the negative terminal of the output capacitor Cout
  • the gate G of the PMOS tube Q51 is connected to the drain D of the second NMOS tube Q52.
  • the source S of the second NMOS transistor Q52 is grounded to GND
  • the gate G of the second NMOS transistor Q52 is connected to the second control terminal T2 of the second switch module 113 for receiving the second control signal S2.
  • the first control signal S1 received by the first control terminal T1 of the first switch module 112 and the second control signal S2 received by the second control terminal T2 of the second switch module 113 are inverted complementary signals.
  • the first control signal S1 and the second control signal S2 are both PWM ((Pulse Width Modulation, pulse width modulation) signals with a 50% duty cycle and a frequency of 100 KHz to 1 MHz.
  • the first control signal S1 When the first control signal S1 is at a high level, the first NMOS transistor Q50 is turned on, and the input voltage of, for example, 12V provided by the voltage source VCC charges the pumping capacitor Cp, and the pumping capacitor Cp is charged to 12V. Since the first control signal S1 and the second control signal S2 are in antiphase and complementary, at this time, the second control signal S2 is at a low level, and the second NMOS transistor Q52 is turned off.
  • the first NMOS transistor Q50 When the first control signal S1 is at a low level, the first NMOS transistor Q50 is turned off. Since the first control signal S1 and the second control signal S2 are in antiphase and complementary, the second control signal S2 is high at this time and the second NMOS transistor Q52 is turned on. Therefore, the gate G of the PMOS transistor Q51 is low. Then, the PMOS transistor Q51 is also turned on, the pumping capacitor Cp is connected in parallel with the output capacitor Cout, the pumping capacitor Cp charges the output capacitor Cout, and the output capacitor Cout is charged to 12V. Therefore, an output voltage of 12V can be output.
  • a fourth resistor R4 is provided between the gate G and the source S of the PMOS transistor Q51, and a fifth resistor R5 is provided between the gate G and the source S of the second NMOS transistor Q52.
  • the fourth resistor R4 and the fifth resistor R5 are voltage divider resistors, which can function as voltage dividers.
  • the gate G of the second NMOS transistor Q52 is connected to the second control terminal T2 through the sixth resistor R6.
  • the gate G of the PMOS transistor Q51 is connected to the drain D of the second NMOS transistor Q52 through a seventh resistor R7.
  • the sixth resistor R6 and the seventh resistor R7 are current-limiting resistors, which can function as current-limiting resistors.
  • a 12V voltage source VCC is used to supply power to the isolated power supply module 110.
  • a voltage source VCC that provides a lower voltage may also be used for power supply. Therefore, in this case, the isolated power supply module 110 of the embodiment of the present invention may further include a boost circuit (not shown). The voltage circuit can be used to boost the voltage of the voltage source VCC.
  • the power input terminal Vin of the isolated power module 110 is connected to the voltage source VCC through a boost circuit, and the boost circuit provides the boosted voltage to the power input terminal Vin of the isolated power module 110.
  • control switch 130 may include an optocoupler U, and the optocoupler U may control the charging channel switch 140 to be turned on and off based on the charging control signal S3.
  • the optical coupler U includes a light-emitting diode and a photosensitive triode.
  • the anode of the light-emitting diode is connected to the DC power supply terminal VCC1, for example, a voltage of 3.3V, and the cathode of the light-emitting diode receives the charging control signal S3.
  • the collector C of the phototransistor is connected to the positive terminal Vout+ of the power output terminal of the isolated power module 110 to receive the output voltage output by the isolated power module 110, and the emitter E of the phototransistor is connected to the control terminal T of the charging channel switch 140.
  • the anode of the light emitting diode is connected to the DC power supply terminal VCC1 through the eleventh resistor R11.
  • the emitter E of the phototransistor is connected to the control terminal T of the charging channel switch 140 through the twelfth resistor R12.
  • the eleventh resistor R11 and the twelfth resistor R12 are current-limiting resistors, which can function as current-limiting resistors.
  • the charging channel switch 140 includes one or more MOS transistor switch units 141 connected in parallel. In the illustration of the present invention, only one MOS switch unit 141 is schematically shown. In the actual application of the charger 10, the number of the MOS transistor switch unit 141 may depend on the charging current for charging the rechargeable battery 70.
  • the MOS transistor switch unit 141 includes two NMOS transistors Q1, Q2 electrically coupled back to back, wherein the gates G of the two NMOS transistors Q1, Q2 are connected, and the gates of the two NMOS transistors Q1, Q2 are connected to each other.
  • the connection terminal connected to the electrode G serves as the control terminal T of the charging channel switch 140, the sources S of the two NMOS transistors Q1 and Q2 are connected, and the drain D of one of the two NMOS transistors Q1 and Q2 is used to connect to
  • the charging power terminal VCC2 and the drain D of the other NMOS transistor Q2 are used to connect to the positive terminal BAT+ of the rechargeable battery 70.
  • the connecting end after the gates G of the two NMOS transistors are connected is electrically coupled to the connecting end after the source S of the two NMOS transistors are connected through a thirteenth resistor R13.
  • the thirteenth resistor R13 is a voltage divider resistor, which can function as a voltage divider.
  • the negative terminal Vout- of the power output terminal of the isolated power module 110 is connected to the drain D of the NMOS transistor Q1 in the MOS transistor switch unit 141 for connecting to the charging power terminal VCC2.
  • the charger driving circuit 100 of the embodiment of the present invention and the charger 10 having the charger driving circuit 100 use a charge pump circuit 111 to form an isolated power supply module 110, thereby eliminating the cost of purchasing an isolated power supply, and has low product cost and small size. And, the structure is simple.
  • FIG. 7 discloses a circuit diagram of the charger driving circuit 200 according to the second embodiment of the present invention.
  • the charger driving circuit 200 of the second embodiment is the same as the charger driving circuit 100 of the first embodiment shown in FIG. 6, and the charger driving circuit 200 of the second embodiment also includes an isolated power supply.
  • Module 110, control switch 130 and charging channel switch 140, the isolated power module 110 includes a charge pump circuit 111, and the charge pump circuit 111 includes a pumping capacitor Cp, an output capacitor Cout, a first switch module 112 and a second switch module 113.
  • the first switch module 112 has a first control terminal T1, and the first control terminal T1 is used for receiving a first control signal S1, and controls the opening and closing of the first switch module 112 through the first control signal S1.
  • the second switch module 113 has a second control terminal T2, and the second control terminal T2 is used for receiving a second control signal S2, and controls the opening and closing of the second switch module 113 through the second control signal S2.
  • the first switch module 112 may include a first switch tube, and the first switch tube includes a first NMOS tube Q50.
  • the second switch module 113 may include a second switch tube and a third switch tube.
  • the charger driving circuit 200 of the second embodiment shown in FIG. 7 is different from the charger driving circuit 100 of the first embodiment shown in FIG. 6 in that the second switch module 113 shown in FIG. 7 is
  • the switching tube includes a third NMOS tube Q53, and the third switching tube includes a second NMOS tube Q52.
  • the source S of the third NMOS transistor Q53 is connected to the negative terminal of the pumping capacitor Cp, the negative terminal of the pumping capacitor Cp is connected to the ground GND, the drain D of the third NMOS transistor Q53 is connected to the negative terminal of the output capacitor Cout, and the third NMOS
  • the gate G of the transistor Q53 is connected to the drain D of the second NMOS transistor Q52, the drain D of the second NMOS transistor Q52 is connected to the voltage source VCC, the source S of the second NMOS transistor Q52 is grounded to GND, and the second NMOS transistor Q52
  • the gate G of the second switch module 113 is connected to the second control terminal T2.
  • the first control signal S1 received by the first control terminal T1 of the first switch module 112 and the second control signal S2 received by the second control terminal T2 of the second switch module 113 are the same signal.
  • the first control signal S1 and the second control signal S2 are the same PWM signal.
  • the first control signal S1 When the first control signal S1 is at a high level, the first NMOS transistor Q50 is turned on, and the input voltage of, for example, 12V provided by the voltage source VCC charges the pumping capacitor Cp, and the pumping capacitor Cp is charged to 12V. Since the first control signal S1 and the second control signal S2 are the same, at this time, the second control signal S2 is also at a high level, and the second NMOS transistor Q52 is turned on. Therefore, the gate G of the third NMOS transistor Q53 is at a low level, and the third NMOS transistor Q53 is turned off.
  • the first NMOS transistor Q50 When the first control signal S1 is at a low level, the first NMOS transistor Q50 is turned off. Since the first control signal S1 and the second control signal S2 are the same, the second control signal S2 is also low at this time, and the second NMOS transistor Q52 is turned off. Therefore, the gate G of the third NMOS transistor Q53 is high Level, the third NMOS transistor Q53 is turned on, the pumping capacitor Cp is connected in parallel with the output capacitor Cout, the pumping capacitor Cp charges the output capacitor Cout, and the output capacitor Cout is charged to 12V. Therefore, an output voltage of 12V can be output.
  • the negative terminal Vout- of the power output terminal of the isolated power module 110 is connected to the drain D of the NMOS transistor Q1 in the MOS transistor switch unit 141 for connecting to the charging power terminal VCC2.
  • a fifth resistor R5 is provided between the gate G and the source S of the second NMOS transistor Q52, and an eighth resistor R8 is provided between the gate G and the source S of the third NMOS transistor Q53.
  • the fifth resistor R5 and the eighth resistor R8 are voltage dividing resistors, which can function as voltage dividing resistors.
  • the gate G of the second NMOS transistor Q52 is connected to the second control terminal T2 of the second switch module 113 through the sixth resistor R6.
  • the sixth resistor R6 is a current-limiting resistor, which can function as a current-limiting resistor.
  • the drain D of the second NMOS transistor Q52 is connected to the voltage source VCC through the ninth resistor R9, and the negative terminal of the pumping capacitor Cp is connected to the ground GND through the tenth resistor R10.
  • the ninth resistor R9 and the tenth resistor R10 are current-limiting resistors, which can function as current-limiting resistors.
  • the charger 10 shown in FIG. 2 of the embodiment of the present invention may also include the charger driving circuit 200 of the second embodiment shown in FIG. 7.
  • the charger drive circuit 200 of the second embodiment and the charger 10 with the charger drive circuit 200 use a charge pump circuit 111 to form an isolated power supply module 110, thereby saving the cost of purchasing an isolated power supply, and has low product cost and small size. And, the structure is simple.
  • the first control signal S1 and the second control signal S2 used by the charger drive circuit 200 of the second embodiment and the charger 10 having the charger drive circuit 200 are the same, therefore, the drive control of the circuit is further simplified.
  • the control method is simpler.
  • FIG. 8 discloses a circuit diagram of a charger driving circuit 300 according to the third embodiment of the present invention.
  • the charger driving circuit 300 of the third embodiment further includes a push-pull circuit 150 on the basis of the charger driving circuit 200 shown in FIG. 7.
  • the push-pull circuit 150 is connected between the positive terminal Vout+ and the negative terminal Vout- of the output terminal of the power supply, the input terminal of the push-pull circuit 150 is connected to the control switch 130, and the output terminal of the push-pull circuit 150 is connected to the charging channel switch 140.
  • the connection terminal connecting the gates G of the two NMOS transistors Q1 and Q2 of the MOS transistor switch unit 141 is connected to the output terminal of the push-pull circuit 150 as the control terminal T of the charging channel switch 140.
  • the negative terminal Vout- of the power output terminal of the isolated power module 110 is connected to the source S of the two NMOS transistors Q1 and Q2 in the MOS transistor switch unit 141.
  • the push-pull circuit 150 includes an N-type transistor Q54 and a P-type transistor Q55.
  • the connection end after the base B of the N-type transistor Q54 is connected to the base B of the P-type transistor Q55 is used as the input end of the push-pull circuit 150, and the emitter E of the N-type transistor Q54 is connected to the emitter E of the P-type transistor Q55.
  • the connection terminal of the N-type transistor Q54 is connected to the positive terminal Vout+ of the power supply output terminal, and the collector C of the P-type transistor Q55 is connected to the negative terminal Vout- of the power output terminal.
  • the optocoupler U When the charging control signal S3 is at a low level, the optocoupler U is turned on, and the voltage across the output capacitor Cout is the output voltage of the isolated power supply module 110, for example, 12V is formed at both ends of the thirteenth resistor R13 through the N-type transistor Q54 The voltage of 12V turns on the two NMOS transistors Q1 and Q2.
  • the optocoupler U When the charge control signal S3 is at a high level, the optocoupler U is turned off, and the voltage across the thirteenth resistor R13 is quickly discharged to 0V through the P-type transistor Q55. Therefore, the two NMOS transistors Q1 and Q2 can be quickly turned off.
  • the connecting end of the base B of the N-type transistor Q54 and the base B of the P-type transistor Q55 is connected to the control switch 130 through the fourteenth resistor R14.
  • the fourteenth resistor R14 is a current-limiting resistor, which can function as a current-limiting resistor.
  • a fifteenth resistor R15 is provided between the base B and the collector C of the P-type transistor Q55.
  • the fifteenth resistor R15 is a voltage divider resistor, which can function as a voltage divider.
  • the charger drive circuit 300 of the third embodiment shown in FIG. 8 has advantages similar to those of the charger drive circuit 200 of the second embodiment. In addition to the technical effects, the charger driving circuit 300 of the third embodiment shown in FIG. 8 can also achieve the purpose of quickly turning off the charging channel MOS tube.
  • a push-pull circuit 150 is added to the charger driving circuit 200 shown in FIG. 7.
  • the embodiment of the present invention is not limited to this.
  • the push-pull circuit 150 of the embodiment of the present invention can also be similarly added to the charger driving circuit 100 shown in FIG. 6, which can also achieve the purpose of quickly turning off the charging channel MOS tube.
  • the simple transformation of the above-mentioned embodiments does not change the creative essence of the present invention, and all of them will fall within the protection scope of the present invention.
  • the charger 10 shown in FIG. 2 of the embodiment of the present invention may also include the charger driving circuit 300 of the third embodiment shown in FIG. 8.
  • the charger drive circuit 300 of the third embodiment and the charger 10 with the charger drive circuit 300 use a charge pump circuit 111 to form an isolated power supply module 110, thereby eliminating the cost of purchasing an isolated power supply, and has low product cost and small size. And, the structure and control method are simple. Moreover, the purpose of quickly turning off the charging channel MOS tube can be achieved.
  • the charger driving circuits 100, 200, and 300 of the various embodiments described above are designed with individual component solutions. In other embodiments of the present invention, at least a part of the charger driving circuit 100, 200, 300 may also exist in the form of an integrated circuit (IC) solution.
  • IC integrated circuit
  • FIG. 9 shows a schematic diagram of the integrated circuit 400 according to the first embodiment of the present invention.
  • the integrated circuit 400 has a plurality of pins, and the plurality of pins include a power input pin Vin for connecting a voltage source VCC to receive an input voltage, and a charging control signal tube for receiving a charging control signal S3.
  • the pin Driver_Charge and the drive signal pin Driver_OUT for outputting the drive signal S4.
  • the driving signal pin Driver_OUT is used to connect to the charging channel switch 140 to control the charging channel switch 140 to be turned on and off.
  • the integrated circuit 400 has a power output terminal Vout for outputting an output voltage isolated from the input voltage.
  • the integrated circuit 400 has a control switch 130 electrically coupled to the charging control signal pin Driver_Charge, and the control switch 130 is connected to the power supply.
  • the output terminal Vout is electrically connected.
  • the driving signal pin Driver_OUT When the control switch 130 is closed based on the charging control signal S3, the driving signal pin Driver_OUT outputs a driving signal S4 for turning on the charging channel switch 140 under the trigger of the output voltage output from the power output terminal Vout.
  • the plurality of pins further include a pumping capacitor positive pin Cp+ for connecting to the positive electrode of the pumping capacitor Cp, a pumping capacitor negative pin Cp- for connecting to the negative electrode of the pumping capacitor Cp, and ground.
  • the positive terminal Vout+ of the power supply output terminal is electrically coupled to the output capacitor positive pin Cout+, and the negative terminal Vout- of the power supply output terminal is electrically coupled to the output capacitor negative pin Cout-, inside the integrated circuit 400
  • the first switch module 112 and the second switch module 113 are integrated (as shown in FIG. 5).
  • the power input pin Vin is coupled to the positive pin Cp+ of the pumping capacitor
  • the negative pin Cp- of the pumping capacitor is coupled to the ground pin GND
  • the input voltage charges the pumping capacitor Cp.
  • the positive pin Cp+ of the pumping capacitor is coupled with the positive pin Cout+ of the output capacitor
  • the negative pin Cp- of the pumping capacitor is coupled with the negative pin Cout- of the output capacitor.
  • the pumping capacitor Cp is connected in parallel with the output capacitor Cout, and the pumping capacitor Cp charges the output capacitor Cout.
  • the first switch module 112 includes a first diode D1, the power input pin Vin is coupled to the pumping capacitor anode pin Cp+ through the first diode D1, and the anode of the first diode D1 is coupled To the power input pin Vin, the cathode of the first diode D1 is coupled to the positive pin Cp+ of the pumping capacitor.
  • the second switch module 113 includes a second diode D2, the pumping capacitor anode pin Cp+ is coupled to the output capacitor anode pin Cout+ through the second diode D2, and the anode of the second diode D2 is coupled to the pumping capacitor anode Pin Cp+, the cathode of the second diode D2 is coupled to the output capacitor anode pin Cout+.
  • the integrated circuit 400 includes an internal oscillator (not shown).
  • the first switch module 112 has a first control terminal T1, and the first control terminal T1 is used to receive the first control signal S1 generated by the internal oscillator, and the first control signal S1 is used to control the operation of the first switch module 112. Opening and closing.
  • the first switching module 112 includes a first switching tube, and the first switching tube is controlled to be turned on and off by the first control signal S1 to control the opening and closing of the first switching module 112.
  • the first switch tube includes a first NMOS tube Q50, the gate G of the first NMOS tube Q50 is connected to the first control terminal T1, and the drain D of the first NMOS tube Q50 is coupled to the negative pin Cp of the pumping capacitor. -, the source S of the first NMOS transistor Q50 is coupled to the ground pin GND.
  • the second switch module 113 has a second control terminal T2, and the second control terminal T2 is used to receive the second control signal S2 generated by the internal oscillator, and control the operation of the second switch module 113 through the second control signal S2. Opening and closing.
  • the second switch module 113 includes a second switch tube and a third switch tube. The second switch tube is coupled between the negative pin Cp- of the pumping capacitor and the negative pin Cout- of the output capacitor. The control signal S2 controls the on and off of the third switching tube to control the second switching tube.
  • the second switch module 113 includes a PMOS tube Q51
  • the third switch tube includes a second NMOS tube Q52.
  • the drain D of the PMOS tube Q51 is coupled to the negative pin Cp- of the pumping capacitor, and the PMOS tube
  • the source S of Q51 is coupled to the negative pin Cout- of the output capacitor
  • the gate G of the PMOS transistor Q51 is coupled to the drain D of the second NMOS transistor Q52
  • the source S of the second NMOS transistor Q52 is coupled to the ground pin GND
  • the gate G of the second NMOS transistor Q52 is coupled to the second control terminal T2.
  • the first control signal S1 received by the first control terminal T1 of the first switch module 112 and the second control signal S2 received by the second control terminal T2 of the second switch module 113 are inverted complementary signals.
  • the second switch tube includes a third NMOS tube Q53
  • the third switch tube includes a second NMOS tube Q52.
  • the source of the third NMOS tube Q53 The pole S is coupled to the negative pin Cp- of the pumping capacitor, the negative pin Cp- of the pumping capacitor is coupled to the ground pin GND, the drain D of the third NMOS transistor Q53 is coupled to the negative pin Cout- of the output capacitor, and the third NMOS transistor
  • the gate G of Q53 is connected to the drain D of the second NMOS transistor Q52, the drain D of the second NMOS transistor Q52 is coupled to the power input pin Vin, and the source S of the second NMOS transistor Q52 is coupled to the ground pin GND.
  • the gate G of the two NMOS transistor Q52 is coupled to the second control terminal T2.
  • the first control signal S1 received by the first control terminal T1 of the first switch module 112 and the second control signal S2 received by the second control terminal T2 of the second switch module 113 are the same signal.
  • control switch 130 includes an optocoupler U, which is used to control the charging channel switch 140 to turn on and off based on the charging control signal S3. open.
  • the optical coupler U includes a light-emitting diode and a photosensitive triode.
  • the anode of the light-emitting diode is coupled to the DC power supply terminal VCC1, and the cathode of the light-emitting diode is coupled to the charge control signal pin Driver_Charge.
  • the collector C of the phototransistor is coupled to the positive terminal Vout+ of the power supply output terminal, and the emitter E of the phototransistor is coupled to the drive signal pin Driver_OUT.
  • the integrated circuit 400 of the first embodiment of the present invention may be suitable for driving high-end MOS transistors, and the chip cost is low.
  • FIG. 10 shows a schematic diagram of an integrated circuit 500 according to the second embodiment of the present invention.
  • the integrated circuit 500 of the second embodiment shown in FIG. 10 is different from the integrated circuit 400 of the first embodiment shown in FIG. 9 in that the integrated circuit 500 of the second embodiment has A push-pull circuit 150 is also integrated inside.
  • the push-pull circuit 150 is connected between the positive terminal Vout+ and the negative terminal Vout- of the power output terminal, the input terminal of the push-pull circuit 150 is connected to the control switch 130, and the output terminal of the push-pull circuit 150 is connected to the driving signal pin Driver_OUT.
  • the push-pull circuit 150 includes an N-type transistor Q54 and a P-type transistor Q55.
  • the connecting end after the base B of the N-type transistor Q54 is connected to the base B of the P-type transistor Q55 is coupled to the control switch 130, and the connecting end after the emitter E of the N-type transistor Q54 and the emitter E of the P-type transistor Q55 are connected Coupled to the drive signal pin Driver_OUT, the collector C of the N-type transistor Q54 is coupled to the positive terminal Vout+ of the power supply output terminal, and the collector C of the P-type transistor Q55 is connected to the negative terminal Vout- of the power output terminal.
  • the integrated circuit 500 of the second embodiment of the present invention can also be applied to high-end MOS tube driving, and the chip cost is low. Moreover, the purpose of quickly turning off the MOS tube can also be achieved.
  • FIG. 11 discloses a structural block diagram of a charger 20 according to another embodiment of the present invention.
  • the charger 20 includes the integrated circuit 400, the pumping capacitor Cp, the output capacitor Cout, and the charging channel switch 140 as described in the above embodiments.
  • the pumping capacitor Cp is connected between the pumping capacitor positive pin Cp+ and the pumping capacitor negative pin Cp- of the integrated circuit 400.
  • the output capacitor Cout is connected between the output capacitor positive pin Cout+ and the output capacitor negative pin Cout- of the integrated circuit 400.
  • the charging channel switch 140 is connected to the driving signal pin Driver_OUT of the integrated circuit 400.
  • the pumping capacitor Cp and the output capacitor Cout may include ceramic capacitors, for example, so that the overall volume of the charger 10 can be reduced.
  • the charging channel switch 140 includes one or more MOS transistor switch units 141 connected in parallel, and each MOS transistor switch unit 141 includes two NMOS transistors Q1, Q2 electrically coupled back to back.
  • the gates G of the two NMOS transistors Q1 and Q2 are connected, and the connection terminal where the gates G of the two NMOS transistors Q1 and Q2 are connected is used as the control terminal T of the charging channel switch 140, and the source of the two NMOS transistors Q1, Q2 S is connected, the drain D of one NMOS transistor Q1 of the two NMOS transistors is used to connect to the charging power supply terminal VCC2, and the drain D of the other NMOS transistor Q2 is used to connect to the positive terminal BAT+ of the rechargeable battery 70.
  • the output capacitor negative pin Cout- of the integrated circuit 400 is connected to the drain D of the NMOS transistor Q1 in the MOS transistor switch unit 141 for connecting to the charging power terminal VCC2.
  • the charger 20 of the embodiment of the present invention has the advantages of small size and low cost.
  • FIG. 12 discloses a structural block diagram of a charger 30 according to another embodiment of the present invention.
  • the charger 30 includes an integrated circuit 500, a pumping capacitor Cp, an output capacitor Cout, and a charging channel switch 140 as described above.
  • the push-pull circuit 150 is also integrated inside the integrated circuit 500.
  • the output capacitor negative pin Cout of the integrated circuit 500 is connected to the source of the two NMOS transistors Q1 and Q2 in the MOS transistor switch unit 141. ⁇ S.
  • the charger 30 of the embodiment of the present invention not only has the advantages of small size and low cost, but also can realize the purpose of quickly turning off the charging channel switch 140.
  • FIG. 13 discloses a schematic flowchart of a charging control method according to an embodiment of the present invention.
  • the charging control method is applied to the charger driving circuits 100, 200, and 300 provided in the above embodiments.
  • the electric appliance driving circuits 100, 200, and 300 control the charging of the rechargeable battery 70 by running the charging control method.
  • the charging control method includes steps S11 and S12.
  • step S11 the charging channel switch 140 is controlled to be turned on and off based on the charging control signal S3.
  • step S12 when the control switch 130 is closed by the charging control signal S3, the output voltage can trigger the charging channel switch 140 to be turned on, so as to charge the rechargeable battery 70.
  • the charging control method of the embodiment of the present invention is simple and easy to implement.
  • FIG. 14 discloses a schematic block diagram of a charging control system 40 according to an embodiment of the present invention.
  • the charging control system 40 includes one or more processors 41.
  • the processor 41 may be, for example, a micro-controller unit (MCU), a central processing unit (CPU), a digital signal processor (Digital Signal Procesor, DSP), or the like.
  • the processors 41 work individually or collectively to execute the charging control method as described above.
  • the charging control system 40 of the embodiment of the present invention has beneficial technical effects similar to those of the chargers 10, 20, and 30 of the above-mentioned various embodiments, so the details are not repeated here.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

一种充电器驱动电路（100）、集成电路（400）、充电器（20）、充电控制方法及充电控制系统（40）。该充电器驱动电路包括隔离电源模块（110）、控制开关（130）及充电通道开关（140）。隔离电源模块具有电源输入端（Vin）和电源输出端（Vout），并包括电荷泵电路（111），电源输入端通过电荷泵电路连接到电源输出端，电源输入端连接电压源（VCC）。控制开关与电源输出端电连接。充电通道开关用于连接控制开关以及充电电池（70），充电通道开关用于在控制开关的控制下导通与断开，以控制是否对充电电池充电。该充电器利用电荷泵电路来构成隔离电源模块，省去了购买隔离电源的成本，体积小，结构简单，适用于高端MOS管驱动。

Description

充电器驱动电路、集成电路、充电器、充电控制方法及充电控制系统 技术领域
本发明实施例涉及电池充电技术领域，尤其涉及一种充电器驱动电路、集成电路、充电器、充电控制方法及充电控制系统。
背景技术
在高电压、大电流的充电领域，目前大部分采用继电器作为切换开关。但是继电器寿命短，耐瞬间冲击电流小，功耗大，通流能力小，无法满足高端大功率充电器的要求。继电器的关断需要先关充电电流再关继电器，反应速度远低于MOS管。
由于目前P-MOS工艺无法做到大电流，高耐压，因而无法应用于大功率充电器输出控制。而使用N-MOS作为开关管，则出现高端驱动难的问题。目前使用的方案通常是使用隔离电源叠加在高压母线上。然而，由于隔离电源的采购价格高，随着充电器的充电输出通道增加，隔离电源已经成为最贵的物料成本。
发明内容
本发明提供一种充电器驱动电路、集成电路、充电器、充电控制方法及充电控制系统，旨在节省物料成本。
根据本发明实施例的一个方面，提供一种充电器驱动电路。所述充电器驱动电路包括隔离电源模块、控制开关及充电通道开关。所述隔离电源 模块具有电源输入端和电源输出端，所述隔离电源模块包括电荷泵电路，所述电源输入端通过所述电荷泵电路连接到所述电源输出端，所述电源输入端连接电压源，用于接收一输入电压，所述电源输出端用于输出一输出电压，所述电荷泵电路用于将所述输出电压与所述输入电压隔离。所述控制开关与所述隔离电源模块的所述电源输出端电连接。所述充电通道开关用于连接所述控制开关以及充电电池，所述充电通道开关用于在所述控制开关的控制下导通与断开，以控制是否对所述充电电池的充电。其中，当所述控制开关基于充电控制信号闭合时，所述充电通道开关在所述输出电压的触发下导通，从而对所述充电电池进行充电。
根据本发明实施例的另一个方面，提供一种充电器。所述充电器包括如上所述的充电器驱动电路。
根据本发明实施例的另一个方面，提供一种集成电路。所述集成电路具有多个管脚，所述多个管脚包括用于连接电压源以接收输入电压的电源输入管脚、用于接收充电控制信号的充电控制信号管脚以及用于输出驱动信号的驱动信号管脚。所述驱动信号管脚用于连接到充电通道开关，用以控制所述充电通道开关导通与断开。其中，所述集成电路的内部具有用于输出与所述输入电压隔离的输出电压的电源输出端。所述集成电路的内部集成有与所述充电控制信号管脚电耦合的控制开关，并且，所述控制开关与所述电源输出端电连接。当所述控制开关基于所述充电控制信号闭合时，在所述电源输出端输出的输出电压的触发下，所述驱动信号管脚输出用于导通所述充电通道开关的驱动信号。
根据本发明实施例的另一个方面，提供一种充电器。所述充电器包括集成电路、泵送电容、输出电容及充电通道开关。所述集成电路具有多个管脚，所述多个管脚包括用于连接电压源以接收输入电压的电源输入管脚、用于接收充电控制信号的充电控制信号管脚以及用于输出驱动信号的驱动信号管脚。所述驱动信号管脚用于连接到充电通道开关，用以控制所 述充电通道开关导通与断开。所述集成电路的内部具有用于输出与所述输入电压隔离的输出电压的电源输出端。所述集成电路的内部集成有与所述充电控制信号管脚电耦合的控制开关，并且，所述控制开关与所述电源输出端电连接。当所述控制开关基于所述充电控制信号闭合时，在所述电源输出端输出的输出电压的触发下，所述驱动信号管脚输出用于导通所述充电通道开关的驱动信号。所述多个管脚还包括用于连接泵送电容的正极的泵送电容正极管脚、用于连接泵送电容的负极的泵送电容负极管脚、地管脚、用于连接输出电容的正极的输出电容正极管脚、用于连接输出电容的负极的输出电容负极管脚。所述电源输出端的正极端电耦合于所述输出电容正极管脚，所述电源输出端的负极端电耦合于所述输出电容负极管脚。所述集成电路的内部集成有第一开关模块和第二开关模块。在所述第一开关模块闭合时，所述电源输入管脚与所述泵送电容正极管脚耦合，所述泵送电容负极管脚与所述地管脚耦合，所述输入电压对所述泵送电容充电。在所述第一开关模块断开，所述第二开关模块闭合时，所述泵送电容正极管脚与所述输出电容正极管脚耦合，所述泵送电容负极管脚与所述输出电容负极管脚耦合，所述泵送电容与所述输出电容并联，所述泵送电容对所述输出电容充电。其中，所述泵送电容连接于所述集成电路的所述泵送电容正极管脚与所述泵送电容负极管脚之间。所述输出电容连接于所述集成电路的所述输出电容正极管脚与所述输出电容负极管脚之间。所述充电通道开关连接所述集成电路的所述驱动信号管脚。
根据本发明实施例的另一个方面，提供一种充电控制方法。所述方法应用于如上所述的充电器驱动电路。所述方法包括：基于充电控制信号来控制所述充电通道开关导通与断开；及在所述充电控制信号使得所述控制开关闭合时，所述输出电压触发所述充电通道开关导通，以对所述充电电池进行充电。
根据本发明实施例的另一个方面，提供一种充电控制系统。所述充 电控制系统包括一个或多个处理器。所述处理器单独地或共同地工作，用于执行如上所述的充电控制方法。
本发明实施例的充电器驱动电路及具有该充电器驱动电路的充电器利用电荷泵电路来构成隔离电源模块，从而省去了购买隔离电源的成本，产品成本低，体积小，并且，结构简单，可以适用于高端MOS管驱动。
本发明实施例的集成电路可以适用于高端MOS管驱动，并且，芯片成本低。
本发明实施例的具有该集成电路的充电器可以省去购买隔离电源的成本，产品成本低，体积小，并且，结构简单，可以适用于高端MOS管驱动。
本发明实施例的充电控制方法简单易行。
本发明实施例的充电控制系统具有成本低、体积小等优势。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为一种农机充电器使用的MOS驱动电路的电路图；
图2为本发明一个实施例的充电器的应用场景的结构框图；
图3为本发明一个实施例的充电器驱动电路的结构框图；
图4为一种电荷泵电路的工作原理图；
图5为本发明一个实施例的电荷泵电路的结构框图；
图6为本发明第一实施例的充电器驱动电路的电路图；
图7为本发明第二实施例的充电器驱动电路的电路图；
图8为本发明第三实施例的充电器驱动电路的电路图；
图9为本发明第一实施例的集成电路的示意图；
图10为本发明第二实施例的集成电路的示意图；
图11为本发明另一个实施例的充电器的结构框图；
图12为本发明又一个实施例的充电器的结构框图；
图13为本发明一个实施例的充电控制方法的示意流程图；
图14为本发明一个实施例的充电控制系统的示意性框图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本发明相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本发明的一些方面相一致的装置和方法的例子。
在本发明使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本发明。在本发明和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出 项目的任何或所有可能组合。除非另行指出，“前部”、“后部”、“下部”和/或“上部”等类似词语只是为了便于说明，而并非限于一个位置或者一种空间定向。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而且可以包括电性的连接，不管是直接的还是间接的。在本发明中“能够”可以表示具有能力。
下面结合附图，对本发明的各个实施例进行详细说明。在不冲突的情况下，下述的实施例及实施方式中的特征可以相互组合。
对于大功率植保机充电器，每个充电输出通道的输出电流高达100A。目前高压P-MOS没有大电流输出能力，只能选用高压大电流的N-MOS。例如，图1揭示了一种农机充电器使用的MOS驱动电路800的电路图。如图1所示，在该MOS驱动电路中，充电通道开关电路使用NMOS管。为了承受大电流，图1所示的充电通道开关电路包括两个MOS管开关单元，每个MOS管开关单元包括背靠背电耦合的两个NMOS管，例如第一个MOS管开关单元801包括NMOS管Q1和Q2，第二个MOS管开关单元802包括NMOS管Q3和Q4。为了实现高端MOS的开关驱动，需要使用12V+的隔离电源，12V+的隔离电源的输出电压叠加在充电母线59V+上面，形成大约72V+的电压。当该充电通道需要充电时，将光耦合器U的发光二极管的负极接收的充电控制信号Driver_A2置为低电平，光耦合器U导通，72V+的电压通过光耦合器U在四个NMOS管Q1、Q2、Q3、Q4的栅极G和源极S之间形成12V的电压Vgs，从而开通NMOS管Q1、Q2、Q3、Q4，可以对充电电池进行充电。当充电结束，将光耦合器U的发光二极管的负极接收的充电控制信号Driver_A2信号置为高电平，光耦合器U关断，四个NMOS管Q1、Q2、Q3、Q4的栅极G和源极S之间的12V电压Vgs通过栅极G和源极S之间的电阻Rgs消耗电荷，四个NMOS管Q1、Q2、Q3、Q4慢慢关闭，关闭时间为500μs。
然而，由于隔离电源的价格高、采购周期长，而且，隔离电源的体 积大，需要占用较大PCB面积；高度空间有限制，不方便PCB布局和元件摆放。
有鉴于此，本发明实施例提出了一种替代的解决方案。
图2揭示了本发明一个实施例的充电器10的应用场景的结构框图。如图2所示，该充电器10可包括电池接口13、充电电源接口12、充电器驱动电路100及控制器14。其中，电池接口13用于可拆卸地连接充电电池70，充电电源接口12用于可拆卸地连接充电电源60，充电器驱动电路100连接在电池接口13与充电电源接口12之间，用于控制充电电源60对充电电池70的充电。控制器14与充电器驱动电路100通讯连接，用于对充电器驱动电路100进行控制。
当需要对充电电池70进行充电时，在控制器14的控制下，充电器驱动电路100驱动充电电源60对充电电池70进行充电。
图3揭示了本发明一个实施例的充电器驱动电路100的结构框图。如图3所示，该充电器驱动电路100包括隔离电源模块110、控制开关130及充电通道开关140。隔离电源模块110具有电源输入端Vin和电源输出端Vout，隔离电源模块110包括电荷泵电路111，电源输入端Vin通过电荷泵电路111连接到电源输出端Vout。电源输入端Vin连接电压源VCC，用于接收一输入电压，电压源VCC提供的输入电压例如为12V电压。电源输出端Vout用于输出一输出电压，电荷泵电路111用于将输出电压与输入电压隔离。所谓“隔离”是指电源的输入回路和输出回路之间没有直接的电气连接，输入和输出之间是绝缘的高阻态，没有电流回路。
图4揭示了一种电荷泵电路的工作原理图。如图4所示，电荷泵电路包括泵送电容Cp和输出电容Cout，通过泵送电容Cp作为电荷的中间转移站，在开关K1、K3同时接通时，输入电压Uin可以给泵送电容Cp充电。当开关K1、K3断开，同时开关K2、K4开通时，泵送电容Cp与输出 电容Cout并联，泵送电容Cp放电，泵送电容Cp的电荷转移到输出电容Cout上面，从而，输出一输出电压Uout。为了稳定输入电压Uin，电荷泵电路还包括输入电容Cin。
本发明实施例利用电荷泵电路111的泵送电容Cp电荷迁移原理设计出了隔离电源模块110，从而可以适合高端MOS驱动电路。
继续参照图3所示，控制开关130与隔离电源模块110的电源输出端Vout电连接，并接收充电控制信号S3。充电通道开关140与控制开关130连接，并且，充电通道开关140连接到充电电池70，充电通道开关140用于在控制开关130的控制下导通与断开，以控制是否对充电电池70的充电。
当控制开关130基于充电控制信号S3闭合时，充电通道开关140在隔离电源模块110输出的输出电压的触发下导通，从而对充电电池70进行充电。
本发明实施例的充电器驱动电路100利用电荷泵电路111设计出隔离电源模块110，实现输出隔离的输出电压，从而可以省去购买隔离电源的高昂的物料成本。
如图3所示，充电通道开关140具有控制端T，控制开关130与充电通道开关140的控制端T电耦合以控制隔离电源模块110的电源输出端Vout与充电通道开关140的控制端T的连接。
在一个实施例中，输出电压可以等于输入电压。当然，在其他实施例中，输出电压也可以大于输入电压，电荷泵电路111可以提供倍增的输出电压。
图5揭示了本发明一个实施例的电荷泵电路111的结构框图。如图5所示，本发明一个实施例的电荷泵电路111包括泵送电容Cp、连接电源输出端Vout的输出电容Cout、第一开关模块112和第二开关模块113。
在第一开关模块112闭合时，电压源VCC连接到泵送电容Cp的两端，输入电压对泵送电容Cp充电。在第一开关模块112断开，第二开关模块113闭合时，泵送电容Cp与输出电容Cout并联，泵送电容Cp对输出电容Cout充电。
在一些实施例中，电荷泵电路111还包括连接电源输入端Vin的输入电容Cin。在第一开关模块112闭合时，输入电容Cin与泵送电容Cp并联。输入电容Cin可以用来稳定输入电压。当电压交变时，由于输入电容Cin的充电作用，输入电容Cin两端的电压不能突变，因此保证了输入电压的平稳性。
在一些实施例中，泵送电容Cp、输出电容Cout及输入电容Cin可以包括陶瓷电容。在本发明实施例的电荷泵电路111中，泵送电容Cp、输出电容Cout和/或输入电容Cin选用贴片陶瓷电容，陶瓷电容的容值不需要很大。例如，陶瓷电容的容值可以为100NF(纳法)-1μF(微法)。
因此，采用这种电荷泵电路111的隔离电源模块110体积小，占用PCB面积小，便于PCB布局和元件摆放。
图6揭示了本发明第一实施例的充电器驱动电路100的电路图。如图6并配合参照图5所示，第一开关模块112包括第一二极管D1，第一二极管D1的阳极连接电压源VCC，第一二极管D1的阴极连接泵送电容Cp的正极端。第二开关模块113包括第二二极管D2，第二二极管D2的阳极连接泵送电容Cp的正极端，第二二极管D2的阴极连接输出电容Cout的正极端。
由于二极管的单向导通性，正向导通，反向截止，因此，第一二极管D1和第二二极管D2可以起到开关的作用。例如，第一二极管D1和第二二极管D2可以起到图4所示的电荷泵电路的工作原理图中的开关K1和K2的作用。
本发明实施例的隔离电源模块110巧妙地在电荷泵电路111中采用第一二极管D1和第二二极管D2来充当开关的作用，因而可以省去对开关的触发操作，而且，结构非常简单。
在一些实施例中，第一开关模块112具有第一控制端T1，第一控制端T1用于接收第一控制信号S1，通过第一控制信号S1控制第一开关模块112的开闭。第一开关模块112可以包括第一开关管，通过第一控制信号S1控制第一开关管的导通和截止来控制第一开关模块112的开闭。
在一个实施例中，第一开关管包括第一NMOS管Q50。第一NMOS的栅极G连接到第一开关模块112的第一控制端T1，用以接收第一控制信号S1。第一NMOS的漏极D连接泵送电容Cp的负极端，第一NMOS的源极S接地GND。
可选地，在第一NMOS管Q50的栅极G和源极S之间设置第一电阻R1，第一电阻R1为分压电阻，可以起到分压的作用。
可选地，第一NMOS管Q50的栅极G通过第二电阻R2连接到第一开关模块112的第一控制端T1。可选地，第一NMOS管Q50的漏极D通过第三电阻R3连接到泵送电容Cp的负极端。第二电阻R2和第三电阻R3为限流电阻，可以起到限流的作用。
在一些实施例中，第二开关模块113具有第二控制端T2，第二控制端T2用于接收第二控制信号S2，通过第二控制信号S2控制第二开关模块113的开闭。第二开关模块113可以包括第二开关管及第三开关管，第二开关管连接于泵送电容Cp的负极端与输出电容Cout的负极端之间，通过第二控制信号S2控制第三开关管的导通和截止来控制第二开关管。
在一个实施例中，第二开关管包括PMOS管Q51，第三开关管包括第二NMOS管Q52。PMOS管Q51的漏极D连接泵送电容Cp的负极端，PMOS管Q51的源极S连接输出电容Cout的负极端，PMOS管Q51的栅 极G连接到第二NMOS管Q52的漏极D，第二NMOS管Q52的源极S接地GND，第二NMOS管Q52的栅极G连接到第二开关模块113的第二控制端T2，用以接收第二控制信号S2。
在一个实施例中，第一开关模块112的第一控制端T1接收的第一控制信号S1和第二开关模块113的第二控制端T2接收的第二控制信号S2为反相互补的信号。例如，第一控制信号S1和第二控制信号S2均为50％占空比，频率为100KHz～1MHz的PWM((Pulse Width Modulation，脉宽调制)信号。
当第一控制信号S1为高电平时，第一NMOS管Q50导通，电压源VCC提供的例如12V的输入电压对泵送电容Cp充电，泵送电容Cp被充电到12V。由于第一控制信号S1和第二控制信号S2反相互补，因此，此时，第二控制信号S2为低电平，第二NMOS管Q52关断。
当第一控制信号S1为低电平时，第一NMOS管Q50关断。由于第一控制信号S1和第二控制信号S2反相互补，因此，第二控制信号S2此时为高电平，第二NMOS管Q52导通，故，PMOS管Q51的栅极G为低电平，继而PMOS管Q51也导通，泵送电容Cp与输出电容Cout并联，泵送电容Cp对输出电容Cout充电，输出电容Cout被充电到12V。因此，可以输出12V的输出电压。
可选地，在PMOS管Q51的栅极G和源极S之间设置第四电阻R4，在第二NMOS管Q52的栅极G和源极S之间设置第五电阻R5。第四电阻R4和第五电阻R5为分压电阻，可以起到分压的作用。
可选地，第二NMOS管Q52的栅极G通过第六电阻R6连接到第二控制端T2。可选地，PMOS管Q51的栅极G通过第七电阻R7连接到第二NMOS管Q52的漏极D。第六电阻R6和第七电阻R7为限流电阻，可以起到限流的作用。
在上面所述的实施例中，采用12V的电压源VCC来给隔离电源模块110供电。在其他实施例中，也可以采用提供更低电压的电压源VCC来供电，因此，在这种情况下，本发明实施例的隔离电源模块110还可以包括升压电路(未图示)，升压电路可以用来对电压源VCC的电压进行升压。
在一个实施例中，隔离电源模块110的电源输入端Vin通过升压电路连接到电压源VCC，升压电路将升压后的电压提供给隔离电源模块110的电源输入端Vin。
继续参照图6所示，在一些实施例中，控制开关130可以包括光耦合器U，光耦合器U可以基于充电控制信号S3来控制充电通道开关140导通与断开。
光耦合器U包括发光二极管和光敏三极管。发光二极管的阳极连接直流供电端VCC1，例如可以为3.3V电压，发光二极管的阴极接收充电控制信号S3。光敏三极管的集电极C连接到隔离电源模块110的电源输出端的正极端Vout+以接收隔离电源模块110输出的输出电压，光敏三极管的发射极E连接到充电通道开关140的控制端T。
可选地，发光二极管的阳极通过第十一电阻R11连接到直流供电端VCC1。可选地，光敏三极管的发射极E通过第十二电阻R12连接到充电通道开关140的控制端T。第十一电阻R11和第十二电阻R12为限流电阻，可以起到限流的作用。
在一些实施例中，充电通道开关140包括一个或多个并联连接的MOS管开关单元141。在本发明的图示中仅示意性地示出一个MOS管开关单元141。在充电器10的实际应用中，MOS管开关单元141的数量可以取决于给充电电池70充电的充电电流大小。
在一个实施例中，MOS管开关单元141包括背靠背电耦合的两个 NMOS管Q1、Q2，其中，两个NMOS管Q1、Q2的栅极G相连，并且，两个NMOS管Q1、Q2的栅极G相连的连接端作为充电通道开关140的控制端T，两个NMOS管Q1、Q2的源极S相连，两个NMOS管Q1、Q2中的一个NMOS管Q1的漏极D用于连接到充电电源端VCC2，另一个NMOS管Q2的漏极D用于连接到充电电池70的正极端BAT+。
可选地，两个NMOS管的栅极G相连后的连接端通过第十三电阻R13电耦合连接两个NMOS管的源极S相连后的连接端。第十三电阻R13为分压电阻，可以起到分压的作用。
在一个实施例中，隔离电源模块110的电源输出端的负极端Vout-连接到MOS管开关单元141中的用于连接到充电电源端VCC2的NMOS管Q1的漏极D。
本发明实施例的充电器驱动电路100及具有该充电器驱动电路100的充电器10利用电荷泵电路111来构成隔离电源模块110，从而省去了购买隔离电源的成本，产品成本低，体积小，并且，结构简单。
图7揭示了本发明第二实施例的充电器驱动电路200的电路图。如图7所示，第二实施例的充电器驱动电路200与图6所示的第一实施例的充电器驱动电路100相同的是，第二实施例的充电器驱动电路200同样包括隔离电源模块110、控制开关130及充电通道开关140，隔离电源模块110包括电荷泵电路111，电荷泵电路111包括泵送电容Cp、输出电容Cout、第一开关模块112和第二开关模块113。第一开关模块112具有第一控制端T1，第一控制端T1用于接收第一控制信号S1，通过第一控制信号S1控制第一开关模块112的开闭。第二开关模块113具有第二控制端T2，第二控制端T2用于接收第二控制信号S2，通过第二控制信号S2控制第二开关模块113的开闭。第一开关模块112可以包括第一开关管，第一开关管包括第一NMOS管Q50。第二开关模块113可以包括第二开关管及第三开关管。
图7所示的第二实施例的充电器驱动电路200与图6所示的第一实施例的充电器驱动电路100所不同的是，图7所示的第二开关模块113中的第二开关管包括第三NMOS管Q53，第三开关管包括第二NMOS管Q52。第三NMOS管Q53的源极S连接泵送电容Cp的负极端，泵送电容Cp的负极端连接到地GND，第三NMOS管Q53的漏极D连接输出电容Cout的负极端，第三NMOS管Q53的栅极G连接到第二NMOS管Q52的漏极D，第二NMOS管Q52的漏极D连接到电压源VCC，第二NMOS管Q52的源极S接地GND，第二NMOS管Q52的栅极G连接到第二开关模块113的第二控制端T2。
在一个实施例中，第一开关模块112的第一控制端T1接收的第一控制信号S1和第二开关模块113的第二控制端T2接收的第二控制信号S2为相同的信号。例如，第一控制信号S1和第二控制信号S2为相同的PWM信号。
当第一控制信号S1为高电平时，第一NMOS管Q50导通，电压源VCC提供的例如12V的输入电压对泵送电容Cp充电，泵送电容Cp被充电到12V。由于第一控制信号S1和第二控制信号S2相同，因此，此时，第二控制信号S2也为高电平，第二NMOS管Q52导通。故，第三NMOS管Q53的栅极G为低电平，第三NMOS管Q53关断。
当第一控制信号S1为低电平时，第一NMOS管Q50关断。由于第一控制信号S1和第二控制信号S2相同，因此，第二控制信号S2此时也为低电平，第二NMOS管Q52关断，故，第三NMOS管Q53的栅极G为高电平，第三NMOS管Q53导通，泵送电容Cp与输出电容Cout并联，泵送电容Cp对输出电容Cout充电，输出电容Cout被充电到12V。因此，可以输出12V的输出电压。
在一个实施例中，隔离电源模块110的电源输出端的负极端Vout-连接到MOS管开关单元141中的用于连接到充电电源端VCC2的NMOS 管Q1的漏极D。
可选地，在第二NMOS管Q52的栅极G和源极S之间设置第五电阻R5，在第三NMOS管Q53的栅极G和源极S之间设置第八电阻R8。第五电阻R5和第八电阻R8为分压电阻，可以起到分压的作用。
可选地，第二NMOS管Q52的栅极G通过第六电阻R6连接到第二开关模块113的第二控制端T2。第六电阻R6为限流电阻，可以起到限流的作用。
可选地，第二NMOS管Q52的漏极D通过第九电阻R9连接到电压源VCC，泵送电容Cp的负极端通过第十电阻R10连接到地GND。第九电阻R9和第十电阻R10为限流电阻，可以起到限流的作用。
本发明实施例的图2所示的充电器10也可以包括图7所示的第二实施例的充电器驱动电路200。
第二实施例的充电器驱动电路200及具有该充电器驱动电路200的充电器10利用电荷泵电路111来构成隔离电源模块110，从而省去了购买隔离电源的成本，产品成本低，体积小，并且，结构简单。
而且，第二实施例的充电器驱动电路200及具有该充电器驱动电路200的充电器10所使用的第一控制信号S1和第二控制信号S2相同，因此，进一步简化了电路的驱动控制，控制方式更为简单。
图8揭示了本发明第三实施例的充电器驱动电路300的电路图。如图8所示，第三实施例的充电器驱动电路300在图7所示的充电器驱动电路200的基础上，进一步包括推挽电路150。推挽电路150连接于电源输出端的正极端Vout+和负极端Vout-之间，推挽电路150的输入端连接到控制开关130，推挽电路150的输出端连接到充电通道开关140。具体地，MOS管开关单元141的两个NMOS管Q1、Q2的栅极G相连的连接端作为充电通道开关140的控制端T连接到推挽电路150的输出端。
在一个实施例中，隔离电源模块110的电源输出端的负极端Vout-连接到MOS管开关单元141中的两个NMOS管Q1、Q2的源极S。
在一些实施例中，推挽电路150包括N型三极管Q54和P型三极管Q55。N型三极管Q54的基极B和P型三极管Q55的基极B相连后的连接端作为推挽电路150的输入端，N型三极管Q54的发射极E和P型三极管Q55的发射极E相连后的连接端作为推挽电路150的输出端，N型三极管Q54的集电极C连接到电源输出端的正极端Vout+，P型三极管Q55的集电极C连接到电源输出端的负极端Vout-。
当充电控制信号S3为低电平时，光耦合器U导通，输出电容Cout两端的电压，即隔离电源模块110的输出电压，例如12V通过N型三极管Q54在第十三电阻R13的两端形成12V电压，从而开通两个NMOS管Q1、Q2。
当充电控制信号S3为高电平时，光耦合器U关闭，第十三电阻R13两端的电压通过P型三极管Q55快速放电到0V，因此，可以实现快速关断两个NMOS管Q1、Q2。
可选地，N型三极管Q54的基极B和P型三极管Q55的基极B相连后的连接端通过第十四电阻R14连接到控制开关130。第十四电阻R14为限流电阻，可以起到限流的作用。
可选地，在P型三极管Q55的基极B与集电极C之间设置第十五电阻R15。第十五电阻R15为分压电阻，可以起到分压的作用。
相对于图7所示的第二实施例的充电器驱动电路200，图8所示的第三实施例的充电器驱动电路300除了具有与第二实施例的充电器驱动电路200相类似的有益技术效果之外，图8所示的第三实施例的充电器驱动电路300还可以实现快速关断充电通道MOS管的目的。
以上所述的实施例是在图7所示的充电器驱动电路200中增加推挽 电路150。然而，本发明实施例并不局限于此。在其他实施例中，本发明实施例的推挽电路150也可以类似地加入到图6所示的充电器驱动电路100中，其同样能够实现快速关断充电通道MOS管的目的。上述实施例的简单变换，并不改变本发明的创作实质，其均将在本发明的保护范围之内。
本发明实施例的图2所示的充电器10也可以包括图8所示的第三实施例的充电器驱动电路300。
第三实施例的充电器驱动电路300及具有该充电器驱动电路300的充电器10利用电荷泵电路111来构成隔离电源模块110，从而省去了购买隔离电源的成本，产品成本低，体积小，并且，结构和控制方式简单。而且，能够实现快速关断充电通道MOS管的目的。
以上所述的各个实施例的充电器驱动电路100、200、300是以单独元件方案设计的。在本发明的其他实施方式中，充电器驱动电路100、200、300的至少一部分还可以集成电路(IC)的方案形式存在。
图9揭示了本发明第一实施例的集成电路400的示意图。如图9所示，该集成电路400具有多个管脚，多个管脚包括用于连接电压源VCC以接收输入电压的电源输入管脚Vin、用于接收充电控制信号S3的充电控制信号管脚Driver_Charge以及用于输出驱动信号S4的驱动信号管脚Driver_OUT。驱动信号管脚Driver_OUT用于连接到充电通道开关140，用以控制充电通道开关140导通与断开。
集成电路400的内部具有用于输出与输入电压隔离的输出电压的电源输出端Vout，集成电路400的内部集成有与充电控制信号管脚Driver_Charge电耦合的控制开关130，并且，控制开关130与电源输出端Vout电连接。
当控制开关130基于充电控制信号S3闭合时，在电源输出端Vout输出的输出电压的触发下，驱动信号管脚Driver_OUT输出用于导通充电 通道开关140的驱动信号S4。
在一些实施例中，多个管脚还包括用于连接泵送电容Cp的正极的泵送电容正极管脚Cp+、用于连接泵送电容Cp的负极的泵送电容负极管脚Cp-、地管脚GND、用于连接输出电容Cout的正极的输出电容正极管脚Cout+、用于连接输出电容Cout的负极的输出电容负极管脚Cout-。
如图9并配合参照图6所示，电源输出端的正极端Vout+电耦合于输出电容正极管脚Cout+，电源输出端的负极端Vout-电耦合于输出电容负极管脚Cout-，集成电路400的内部集成有第一开关模块112和第二开关模块113(如图5所示)。
在第一开关模块112闭合时，电源输入管脚Vin与泵送电容正极管脚Cp+耦合，泵送电容负极管脚Cp-与地管脚GND耦合，输入电压对泵送电容Cp充电。在第一开关模块112断开，第二开关模块113闭合时，泵送电容正极管脚Cp+与输出电容正极管脚Cout+耦合，泵送电容负极管脚Cp-与输出电容负极管脚Cout-耦合，泵送电容Cp与输出电容Cout并联，泵送电容Cp对输出电容Cout充电。
在一些实施例中，第一开关模块112包括第一二极管D1，电源输入管脚Vin通过第一二极管D1耦合到泵送电容正极管脚Cp+，第一二极管D1的阳极耦合到电源输入管脚Vin，第一二极管D1的阴极耦合到泵送电容正极管脚Cp+。
第二开关模块113包括第二二极管D2，泵送电容正极管脚Cp+通过第二二极管D2耦合到输出电容正极管脚Cout+，第二二极管D2的阳极耦合到泵送电容正极管脚Cp+，第二二极管D2的阴极耦合到输出电容正极管脚Cout+。
集成电路400包括内部振荡器(未图示)。在一些实施例中，第一开关模块112具有第一控制端T1，第一控制端T1用于接收内部振荡器产 生的第一控制信号S1，通过第一控制信号S1控制第一开关模块112的开闭。在一个实施例中，第一开关模块112包括第一开关管，通过第一控制信号S1控制第一开关管的导通和截止来控制第一开关模块112的开闭。
可选地，第一开关管包括第一NMOS管Q50，第一NMOS管Q50的栅极G连接到第一控制端T1，第一NMOS管Q50的漏极D耦合到泵送电容负极管脚Cp-，第一NMOS管Q50的源极S耦合到地管脚GND。
在一些实施例中，第二开关模块113具有第二控制端T2，第二控制端T2用于接收内部振荡器产生的第二控制信号S2，通过第二控制信号S2控制第二开关模块113的开闭。在一个实施例中，第二开关模块113包括第二开关管及第三开关管，第二开关管耦合于泵送电容负极管脚Cp-与输出电容负极管脚Cout-之间，通过第二控制信号S2控制第三开关管的导通和截止来控制第二开关管。
在一个可选的实施方式中，第二开关模块113包括PMOS管Q51，第三开关管包括第二NMOS管Q52，PMOS管Q51的漏极D耦合到泵送电容负极管脚Cp-，PMOS管Q51的源极S耦合到输出电容负极管脚Cout-，PMOS管Q51的栅极G耦合到第二NMOS管Q52的漏极D，第二NMOS管Q52的源极S耦合到地管脚GND，第二NMOS管Q52的栅极G耦合到第二控制端T2。
第一开关模块112的第一控制端T1接收的第一控制信号S1和第二开关模块113的第二控制端T2接收的第二控制信号S2为反相互补的信号。
如图9并配合参照图7所示，在另一个可选的实施方式中，第二开关管包括第三NMOS管Q53，第三开关管包括第二NMOS管Q52，第三NMOS管Q53的源极S耦合到泵送电容负极管脚Cp-，泵送电容负极管脚Cp-耦合到地管脚GND，第三NMOS管Q53的漏极D耦合输出电容负极管脚Cout-，第三NMOS管Q53的栅极G连接到第二NMOS管Q52的漏 极D，第二NMOS管Q52的漏极D耦合到电源输入管脚Vin，第二NMOS管Q52的源极S耦合地管脚GND，第二NMOS管Q52的栅极G耦合到第二控制端T2。
第一开关模块112的第一控制端T1接收的第一控制信号S1和第二开关模块113的第二控制端T2接收的第二控制信号S2为相同的信号。
如图9并配合参照图6和图7所示，在一些实施例中，控制开关130包括光耦合器U，光耦合器U用于基于充电控制信号S3来控制充电通道开关140导通与断开。
光耦合器U包括发光二极管和光敏三极管。发光二极管的阳极耦合到直流供电端VCC1，发光二极管的阴极耦合到充电控制信号管脚Driver_Charge。光敏三极管的集电极C耦合到电源输出端的正极端Vout+，光敏三极管的发射极E耦合到驱动信号管脚Driver_OUT。
本发明第一实施例的集成电路400可以适用于高端MOS管驱动，并且，芯片成本低。
图10揭示了本发明第二实施例的集成电路500的示意图。如图10并配合参照图8所示，图10所示的第二实施例的集成电路500与图9所示的第一实施例集成电路400所不同是，第二实施例的集成电路500的内部还集成有推挽电路150。推挽电路150连接于电源输出端的正极端Vout+和负极端Vout-之间，推挽电路150的输入端连接到控制开关130，推挽电路150的输出端连接到驱动信号管脚Driver_OUT。
在一些实施例中，推挽电路150包括N型三极管Q54和P型三极管Q55。N型三极管Q54的基极B和P型三极管Q55的基极B相连后的连接端耦合到控制开关130，N型三极管Q54的发射极E和P型三极管Q55的发射极E相连后的连接端耦合到驱动信号管脚Driver_OUT，N型三极管Q54的集电极C耦合到电源输出端的正极端Vout+，P型三极管Q55的集 电极C连接到电源输出端的负极端Vout-。
本发明第二实施例的集成电路500同样可以适用于高端MOS管驱动，并且，芯片成本低。而且，还能够实现快速关断MOS管的目的。
图11揭示了本发明另一个实施例的充电器20的结构框图。如图11所示，该充电器20包括如上各个实施例所述的集成电路400、泵送电容Cp、输出电容Cout及充电通道开关140。
泵送电容Cp连接于集成电路400的泵送电容正极管脚Cp+与泵送电容负极管脚Cp-之间。输出电容Cout连接于集成电路400的输出电容正极管脚Cout+与输出电容负极管脚Cout-之间。充电通道开关140连接集成电路400的驱动信号管脚Driver_OUT。
泵送电容Cp和输出电容Cout例如可以包括陶瓷电容，从而可以减小充电器10的整体体积。
在一些实施例中，充电通道开关140包括一个或多个并联连接的MOS管开关单元141，每个MOS管开关单元141包括背靠背电耦合的两个NMOS管Q1、Q2。两个NMOS管Q1、Q2的栅极G相连，并且，两个NMOS管Q1、Q2的栅极G相连的连接端作为充电通道开关140的控制端T，两个NMOS管Q1、Q2的源极S相连，两个NMOS管中的一个NMOS管Q1的漏极D用于连接到充电电源端VCC2，另一个NMOS管Q2的漏极D用于连接到充电电池70的正极端BAT+。
在一个实施例中，集成电路400的输出电容负极管脚Cout-连接到MOS管开关单元141中的用于连接到充电电源端VCC2的NMOS管Q1的漏极D。
本发明实施例的充电器20具有体积小、成本低等优势。
图12揭示了本发明又一个实施例的充电器30的结构框图。如图12所示，该充电器30包括如上所述的集成电路500、泵送电容Cp、输出电 容Cout及充电通道开关140。
如上所述，集成电路500的内部还集成有推挽电路150。在包括集成有推挽电路150的集成电路500的充电器30的实施例中，集成电路500的输出电容负极管脚Cout-连接到MOS管开关单元141中的两个NMOS管Q1、Q2的源极S。
本发明实施例的充电器30不仅具有体积小、成本低等优势，而且还能够实现快速关断充电通道开关140的目的。
图13揭示了本发明一个实施例的充电控制方法的示意流程图。该充电控制方法应用于上述各个实施例所提供的充电器驱动电路100、200、300，该充当电器驱动电路100、200、300通过运行该充电控制方法来完成对充电电池70充电的控制。如图13所示，该充电控制方法包括步骤S11和S12。
在步骤S11中，基于充电控制信号S3来控制充电通道开关140导通与断开。
在步骤S12中，在充电控制信号S3使得控制开关130闭合时，输出电压能够触发充电通道开关140导通，以对充电电池70进行充电。
本发明实施例的充电控制方法简单易行。
图14揭示了本发明一个实施例的充电控制系统40的示意性框图。如图14所示，该充电控制系统40包括一个或多个处理器41。处理器41例如可以是微控制单元(Micro-controller Unit，MCU)、中央处理单元(Central Processing Unit，CPU)或数字信号处理器(Digital Signal Procesor，DSP)等。处理器41单独地或共同地工作，用于执行如上所述的充电控制方法。
本发明实施例的充电控制系统40具有与上面所述各个实施例的充电器10、20、30相类似的有益技术效果，故，在此不再赘述。
需要说明的是，在本文中，诸如“第一”和“第二”等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上对本发明实施例所提供的充电器驱动电路、集成电路、充电器、充电控制方法及充电控制系统进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想，本说明书内容不应理解为对本发明的限制。同时，对于本领域的一般技术人员，依据本发明的思想，可以在具体实施方式及应用范围上做出任何修改、等同替换或改进等，其均应包含在本发明的权利要求书的范围之内。

Claims (70)

  1. 一种充电器驱动电路，其特征在于：其包括：
    隔离电源模块，具有电源输入端和电源输出端，所述隔离电源模块包括电荷泵电路，所述电源输入端通过所述电荷泵电路连接到所述电源输出端，所述电源输入端连接电压源，用于接收一输入电压，所述电源输出端用于输出一输出电压，所述电荷泵电路用于将所述输出电压与所述输入电压隔离；
    控制开关，其与所述隔离电源模块的所述电源输出端电连接；以及
    充电通道开关，用于连接所述控制开关以及充电电池，所述充电通道开关用于在所述控制开关的控制下导通与断开，以控制是否对所述充电电池的充电，
    其中，当所述控制开关基于充电控制信号闭合时，所述充电通道开关在所述输出电压的触发下导通，从而对所述充电电池进行充电。
  2. 如权利要求1所述的充电器驱动电路，其特征在于：所述充电通道开关具有控制端，所述控制开关与所述充电通道开关的所述控制端电耦合以控制所述电源输出端与所述充电通道开关的所述控制端的连接。
  3. 如权利要求1所述的充电器驱动电路，其特征在于：所述输出电压等于所述输入电压。
  4. 如权利要求1所述的充电器驱动电路，其特征在于：所述电荷泵电路包括泵送电容、连接所述电源输出端的输出电容、第一开关模块和第二开关模块，
    其中，在所述第一开关模块闭合时，所述电压源连接到所述泵送电容的两端，所述输入电压对所述泵送电容充电；
    在所述第一开关模块断开，所述第二开关模块闭合时，所述泵送电容与所述输出电容并联，所述泵送电容对所述输出电容充电。
  5. 如权利要求4所述的充电器驱动电路，其特征在于：所述电荷泵电 路还包括连接所述电源输入端的输入电容，其中，在所述第一开关模块闭合时，所述输入电容与所述泵送电容并联。
  6. 如权利要求5所述的充电器驱动电路，其特征在于：所述泵送电容、所述输出电容及所述输入电容包括：陶瓷电容。
  7. 如权利要求4所述的充电器驱动电路，其特征在于：所述第一开关模块包括第一二极管，所述第一二极管的阳极连接所述电压源，所述第一二极管的阴极连接所述泵送电容的正极端。
  8. 如权利要求4或7所述的充电器驱动电路，其特征在于：所述第二开关模块包括第二二极管，所述第二二极管的阳极连接所述泵送电容的正极端，所述第二二极管的阴极连接所述输出电容的正极端。
  9. 如权利要求4所述的充电器驱动电路，其特征在于：所述第一开关模块具有第一控制端，所述第一控制端用于接收第一控制信号，通过所述第一控制信号控制所述第一开关模块的开闭。
  10. 如权利要求9所述的充电器驱动电路，其特征在于：所述第一开关模块包括第一开关管，通过所述第一控制信号控制所述第一开关管的导通和截止来控制所述第一开关模块的开闭。
  11. 如权利要求10所述的充电器驱动电路，其特征在于：所述第一开关管包括第一NMOS管，所述第一NMOS的栅极连接到所述第一控制端，所述第一NMOS的漏极连接所述泵送电容的负极端，所述第一NMOS的源极接地。
  12. 如权利要求11所述的充电器驱动电路，其特征在于：在所述第一NMOS管的栅极和源极之间设置第一电阻。
  13. 如权利要求11所述的充电器驱动电路，其特征在于：所述第一NMOS管的栅极通过第二电阻连接到所述第一控制端。
  14. 如权利要求11所述的充电器驱动电路，其特征在于：所述第一NMOS管的漏极通过第三电阻连接到所述泵送电容的负极端。
  15. 如权利要求4所述的充电器驱动电路，其特征在于：所述第二开 关模块具有第二控制端，所述第二控制端用于接收第二控制信号，通过所述第二控制信号控制所述第二开关模块的开闭。
  16. 如权利要求15所述的充电器驱动电路，其特征在于：所述第二开关模块包括第二开关管及第三开关管，所述第二开关管连接于所述泵送电容的负极端与所述输出电容的负极端之间，通过所述第二控制信号控制所述第三开关管的导通和截止来控制所述第二开关管。
  17. 如权利要求16所述的充电器驱动电路，其特征在于：所述第二开关管包括PMOS管，所述第三开关管包括第二NMOS管，所述PMOS管的漏极连接所述泵送电容的负极端，所述PMOS管的源极连接所述输出电容的负极端，所述PMOS管的栅极连接到所述第二NMOS管的漏极，所述第二NMOS管的源极接地，所述第二NMOS管的栅极连接到所述第二控制端。
  18. 如权利要求17所述的充电器驱动电路，其特征在于：在所述PMOS管的栅极和源极之间设置第四电阻，在所述第二NMOS管的栅极和源极之间设置第五电阻。
  19. 如权利要求17所述的充电器驱动电路，其特征在于：所述第二NMOS管的栅极通过第六电阻连接到所述第二控制端。
  20. 如权利要求17所述的充电器驱动电路，其特征在于：所述PMOS管的栅极通过第七电阻连接到所述第二NMOS管的漏极。
  21. 如权利要求16所述的充电器驱动电路，其特征在于：所述第二开关管包括第三NMOS管，所述第三开关管包括第二NMOS管，所述第三NMOS管的源极连接所述泵送电容的负极端，所述泵送电容的负极端连接到地，所述第三NMOS管的漏极连接所述输出电容的负极端，所述第三NMOS管的栅极连接到所述第二NMOS管的漏极，所述第二NMOS管的漏极连接到所述电压源，所述第二NMOS管的源极接地，所述第二NMOS管的栅极连接到所述第二控制端。
  22. 如权利要求21所述的充电器驱动电路，其特征在于：在所述第二 NMOS管的栅极和源极之间设置第五电阻，在所述第三NMOS管的栅极和源极之间设置第八电阻。
  23. 如权利要求21所述的充电器驱动电路，其特征在于：所述第二NMOS管的栅极通过第六电阻连接到所述第二控制端。
  24. 如权利要求21所述的充电器驱动电路，其特征在于：所述第二NMOS管的漏极通过第九电阻连接到所述电压源，所述泵送电容的负极端通过第十电阻连接到地。
  25. 如权利要求4所述的充电器驱动电路，其特征在于：所述第一开关模块具有第一控制端，所述第一控制端用于接收第一控制信号，通过所述第一控制信号控制所述第一开关模块的开闭；
    所述第二开关模块具有第二控制端，所述第二控制端用于接收第二控制信号，通过所述第二控制信号控制所述第二开关模块的开闭，
    其中，所述第一控制信号和所述第二控制信号为反相互补的信号。
  26. 如权利要求25所述的充电器驱动电路，其特征在于：所述第一开关模块包括第一NMOS管，所述第一NMOS的栅极连接到所述第一控制端以接收所述第一控制信号，所述第一NMOS的漏极连接所述泵送电容的负极端，所述第一NMOS的源极接地；和/或，
    所述第二开关模块包括PMOS管和第二NMOS管，所述PMOS管的漏极连接所述泵送电容的负极端，所述PMOS管的源极连接所述输出电容的负极端，所述PMOS管的栅极连接到所述第二NMOS管的漏极，所述第二NMOS管的源极接地，所述第二NMOS管的栅极连接到所述第二控制端以接收所述第二控制信号。
  27. 如权利要求4所述的充电器驱动电路，其特征在于：所述第一开关模块具有第一控制端，所述第一控制端用于接收第一控制信号，通过所述第一控制信号控制所述第一开关模块的开闭；
    所述第二开关模块具有第二控制端，所述第二控制端用于接收第二控制信号，通过所述第二控制信号控制所述第二开关模块的开闭，
    其中，所述第一控制信号和所述第二控制信号为相同的信号。
  28. 如权利要求27所述的充电器驱动电路，其特征在于：所述第一开关模块包括第一NMOS管，所述第一NMOS的栅极连接到所述第一控制端以接收所述第一控制信号，所述第一NMOS的漏极连接所述泵送电容的负极端，所述第一NMOS的源极接地；和/或，
    所述第二开关模块包括第二NMOS管和第三NMOS管，所述第三NMOS管的源极连接所述泵送电容的负极端，所述泵送电容的负极端连接到地，所述第三NMOS管的漏极连接所述输出电容的负极端，所述第三NMOS管的栅极连接到所述第二NMOS管的漏极，所述第二NMOS管的漏极连接到所述电压源，所述第二NMOS管的源极接地，所述第二NMOS管的栅极连接到所述第二控制端以接收所述第二控制信号。
  29. 如权利要求1所述的充电器驱动电路，其特征在于：所述隔离电源模块还包括升压电路，所述升压电路用于对所述电压源的电压进行升压。
  30. 如权利要求29所述的充电器驱动电路，其特征在于：所述电源输入端通过所述升压电路连接到所述电压源，所述升压电路将升压后的电压提供给所述电源输入端。
  31. 如权利要求1所述的充电器驱动电路，其特征在于：所述控制开关包括光耦合器，所述光耦合器用于基于所述充电控制信号来控制所述充电通道开关导通与断开。
  32. 如权利要求31所述的充电器驱动电路，其特征在于：所述光耦合器包括发光二极管和光敏三极管，
    所述发光二极管的阳极连接直流供电端，所述发光二极管的阴极接收所述充电控制信号，所述光敏三极管的集电极连接到所述隔离电源模块的正极端以接收所述输出电压，所述光敏三极管的发射极连接到所述充电通道开关的控制端。
  33. 如权利要求32所述的充电器驱动电路，其特征在于：所述发光二极管的阳极通过第十一电阻连接到所述直流供电端。
  34. 如权利要求32所述的充电器驱动电路，其特征在于：所述光敏三极管的发射极通过第十二电阻连接到所述充电通道开关的控制端。
  35. 如权利要求1所述的充电器驱动电路，其特征在于：所述充电通道开关包括MOS管开关单元，所述MOS管开关单元包括背靠背电耦合的两个NMOS管，
    其中，所述两个NMOS管的栅极相连，并且，所述两个NMOS管的栅极相连的连接端作为所述充电通道开关的控制端，所述两个NMOS管的源极相连，所述两个NMOS管中的一个NMOS管的漏极用于连接到充电电源端，另一个NMOS管的漏极用于连接到所述充电电池的正极端。
  36. 如权利要求35所述的充电器驱动电路，其特征在于：所述两个NMOS管的栅极相连后的连接端通过第十三电阻电耦合连接所述两个NMOS管的源极相连后的连接端。
  37. 如权利要求35所述的充电器驱动电路，其特征在于：所述充电通道开关包括一个或多个并联连接的所述MOS管开关单元。
  38. 如权利要求37所述的充电器驱动电路，其特征在于：所述MOS管开关单元的数量取决于给所述充电电池充电的充电电流大小。
  39. 如权利要求35所述的充电器驱动电路，其特征在于：所述隔离电源模块的所述电源输出端的负极端连接到所述MOS管开关单元中的用于连接到充电电源端的NMOS管的漏极。
  40. 如权利要求1所述的充电器驱动电路，其特征在于：其还包括推挽电路，所述推挽电路连接于所述电源输出端的正极端和负极端之间，所述推挽电路的输入端连接到所述控制开关，所述推挽电路的输出端连接到所述充电通道开关。
  41. 如权利要求40所述的充电器驱动电路，其特征在于：所述充电通道开关包括MOS管开关单元，所述MOS管开关单元包括背靠背电耦合的两个NMOS管，
    其中，所述两个NMOS管的栅极相连，并且，所述两个NMOS管的 栅极相连的连接端作为所述充电通道开关的控制端连接到所述推挽电路的输出端，所述两个NMOS管的源极相连，所述两个NMOS管中的一个NMOS管的漏极用于连接到充电电源端，另一个NMOS管的漏极用于连接到所述充电电池的正极端。
  42. 如权利要求41所述的充电器驱动电路，其特征在于：所述隔离电源模块的所述电源输出端的负极端连接到所述MOS管开关单元中的两个NMOS管的源极。
  43. 如权利要求40所述的充电器驱动电路，其特征在于：所述推挽电路包括N型三极管和P型三极管，
    所述N型三极管的基极和所述P型三极管的基极相连后的连接端作为所述推挽电路的输入端，所述N型三极管的发射极和所述P型三极管的发射极相连后的连接端作为所述推挽电路的输出端，所述N型三极管的集电极连接到所述电源输出端的正极端，所述P型三极管的集电极连接到所述电源输出端的负极端。
  44. 如权利要求43所述的充电器驱动电路，其特征在于：所述N型三极管的基极和所述P型三极管的基极相连后的连接端通过第十四电阻连接到所述控制开关。
  45. 如权利要求43所述的充电器驱动电路，其特征在于：在所述P型三极管的基极与集电极之间设置第十五电阻。
  46. 一种充电器，其特征在于：其包括如权利要求1至45中任一项所述的充电器驱动电路。
  47. 一种集成电路，其特征在于：其具有多个管脚，所述多个管脚包括用于连接电压源以接收输入电压的电源输入管脚、用于接收充电控制信号的充电控制信号管脚以及用于输出驱动信号的驱动信号管脚；
    所述驱动信号管脚用于连接到充电通道开关，用以控制所述充电通道开关导通与断开，
    其中，所述集成电路的内部具有用于输出与所述输入电压隔离的输出 电压的电源输出端，
    所述集成电路的内部集成有与所述充电控制信号管脚电耦合的控制开关，并且，所述控制开关与所述电源输出端电连接，
    当所述控制开关基于所述充电控制信号闭合时，在所述电源输出端输出的输出电压的触发下，所述驱动信号管脚输出用于导通所述充电通道开关的驱动信号。
  48. 如权利要求47所述的集成电路，其特征在于：所述多个管脚还包括用于连接泵送电容的正极的泵送电容正极管脚、用于连接泵送电容的负极的泵送电容负极管脚、地管脚、用于连接输出电容的正极的输出电容正极管脚、用于连接输出电容的负极的输出电容负极管脚；
    所述电源输出端的正极端电耦合于所述输出电容正极管脚，所述电源输出端的负极端电耦合于所述输出电容负极管脚，所述集成电路的内部集成有第一开关模块和第二开关模块；
    其中，在所述第一开关模块闭合时，所述电源输入管脚与所述泵送电容正极管脚耦合，所述泵送电容负极管脚与所述地管脚耦合，所述输入电压对所述泵送电容充电；
    在所述第一开关模块断开，所述第二开关模块闭合时，所述泵送电容正极管脚与所述输出电容正极管脚耦合，所述泵送电容负极管脚与所述输出电容负极管脚耦合，所述泵送电容与所述输出电容并联，所述泵送电容对所述输出电容充电。
  49. 如权利要求48所述的集成电路，其特征在于：所述第一开关模块包括第一二极管，所述电源输入管脚通过所述第一二极管耦合到所述泵送电容正极管脚，所述第一二极管的阳极耦合到所述电源输入管脚，所述第一二极管的阴极耦合到所述泵送电容正极管脚。
  50. 如权利要求48所述的集成电路，其特征在于：所述第二开关模块包括第二二极管，所述泵送电容正极管脚通过所述第二二极管耦合到所述输出电容正极管脚，所述第二二极管的阳极耦合到所述泵送电容正极管 脚，所述第二二极管的阴极耦合到所述输出电容正极管脚。
  51. 如权利要求48所述的集成电路，其特征在于：所述集成电路包括内部振荡器，所述第一开关模块具有第一控制端，所述第一控制端用于接收所述内部振荡器产生的第一控制信号，通过所述第一控制信号控制所述第一开关模块的开闭。
  52. 如权利要求51所述的集成电路，其特征在于：所述第一开关模块包括第一开关管，通过所述第一控制信号控制所述第一开关管的导通和截止来控制所述第一开关模块的开闭。
  53. 如权利要求52所述的集成电路，其特征在于：所述第一开关管包括第一NMOS管，所述第一NMOS管的栅极连接到所述第一控制端，所述第一NMOS管的漏极耦合到所述泵送电容负极管脚，所述第一NMOS管的源极耦合到所述地管脚。
  54. 如权利要求48所述的集成电路，其特征在于：所述集成电路包括内部振荡器，所述第二开关模块具有第二控制端，所述第二控制端用于接收所述内部振荡器产生的第二控制信号，通过所述第二控制信号控制所述第二开关模块的开闭。
  55. 如权利要求54所述的集成电路，其特征在于：所述第二开关模块包括第二开关管及第三开关管，所述第二开关管耦合于所述泵送电容负极管脚与所述输出电容负极管脚之间，通过所述第二控制信号控制所述第三开关管的导通和截止来控制所述第二开关管。
  56. 如权利要求55所述的集成电路，其特征在于：所述第二开关模块包括PMOS管，所述第三开关管包括第二NMOS管，所述PMOS管的漏极耦合到所述泵送电容负极管脚，所述PMOS管的源极耦合到所述输出电容负极管脚，所述PMOS管的栅极耦合到所述第二NMOS管的漏极，所述第二NMOS管的源极耦合到所述地管脚，所述第二NMOS管的栅极耦合到所述第二控制端。
  57. 如权利要求55所述的集成电路，其特征在于：所述第二开关管 包括第三NMOS管，所述第三开关管包括第二NMOS管，所述第三NMOS管的源极耦合到所述泵送电容负极管脚，所述泵送电容负极管脚耦合到所述地管脚，所述第三NMOS管的漏极耦合所述输出电容负极管脚，所述第三NMOS管的栅极连接到所述第二NMOS管的漏极，所述第二NMOS管的漏极耦合到所述电源输入管脚，所述第二NMOS管的源极耦合所述地管脚，所述第二NMOS管的栅极耦合到所述第二控制端。
  58. 如权利要求48所述的集成电路，其特征在于：所述集成电路包括内部振荡器，所述第一开关模块具有第一控制端，所述第一控制端用于接收所述内部振荡器产生的第一控制信号，通过所述第一控制信号控制所述第一开关模块的开闭；
    所述第二开关模块具有第二控制端，所述第二控制端用于接收所述内部振荡器产生的第二控制信号，通过所述第二控制信号控制所述第二开关模块的开闭，
    其中，所述第一控制信号和所述第二控制信号为反相互补的信号。
  59. 如权利要求58所述的集成电路，其特征在于：所述第一开关模块包括第一NMOS管，所述第一NMOS的栅极耦合到所述第一控制端，所述第一NMOS的漏极连接所述泵送电容负极管脚，所述第一NMOS的源极耦合到所述地管脚；和/或
    所述第二开关模块包括PMOS管和第二NMOS管，所述PMOS管的漏极耦合所述泵送电容负极管脚，所述PMOS管的源极耦合所述输出电容负极管脚，所述PMOS管的栅极连接到所述第二NMOS管的漏极，所述第二NMOS管的源极耦合所述地管脚，所述第二NMOS管的栅极耦合到所述第二控制端。
  60. 如权利要求48所述的集成电路，其特征在于：所述集成电路包括内部振荡器，所述第一开关模块具有第一控制端，所述第一控制端用于接收所述内部振荡器产生的第一控制信号，通过所述第一控制信号控制所述第一开关模块的开闭；
    所述第二开关模块具有第二控制端，所述第二控制端用于接收所述内部振荡器产生的第二控制信号，通过所述第二控制信号控制所述第二开关模块的开闭，
    其中，所述第一控制信号和所述第二控制信号为相同的信号。
  61. 如权利要求60所述的集成电路，其特征在于：所述第一开关模块包括第一NMOS管，所述第一NMOS管的栅极耦合到所述第一控制端，所述第一NMOS管的漏极耦合到所述泵送电容负极管脚，所述第一NMOS管的源极耦合到所述地管脚；和/或
    所述第二开关模块包括第二NMOS管和第三NMOS管，所述第三NMOS管的源极耦合到所述泵送电容负极管脚，所述泵送电容负极管脚与所述地管脚耦合，所述第三NMOS管的漏极耦合到所述输出电容负极管脚，所述第三NMOS管的栅极耦合到所述第二NMOS管的漏极，所述第二NMOS管的漏极耦合到所述电源输入管脚，所述第二NMOS管的源极耦合到所述地管脚，所述第二NMOS管的栅极耦合到所述第二控制端。
  62. 如权利要求47所述的集成电路，其特征在于：所述控制开关包括光耦合器，所述光耦合器用于基于所述充电控制信号来控制所述充电通道开关导通与断开。
  63. 如权利要求62所述的集成电路，其特征在于：所述光耦合器包括发光二极管和光敏三极管，
    所述发光二极管的阳极耦合到直流供电端，所述发光二极管的阴极耦合到所述充电控制信号管脚，
    所述光敏三极管的集电极耦合到所述电源输出端的正极端，所述光敏三极管的发射极耦合到所述驱动信号管脚。
  64. 如权利要求47所述的集成电路，其特征在于：所述集成电路的内部还集成有推挽电路，所述推挽电路连接于所述电源输出端的正极端和负极端之间，所述推挽电路的输入端连接到所述控制开关，所述推挽电路的输出端连接到所述驱动信号管脚。
  65. 如权利要求64所述的集成电路，其特征在于：所述推挽电路包括N型三极管和P型三极管，所述N型三极管的基极和所述P型三极管的基极相连后的连接端耦合到所述控制开关，所述N型三极管的发射极和所述P型三极管的发射极相连后的连接端耦合到所述驱动信号管脚，所述N型三极管的集电极耦合到所述电源输出端的正极端，所述P型三极管的集电极连接到所述电源输出端的负极端。
  66. 一种充电器，其特征在于：其包括如权利要求48至65中任一项所述的集成电路，泵送电容、输出电容及充电通道开关，
    其中，所述泵送电容连接于所述集成电路的所述泵送电容正极管脚与所述泵送电容负极管脚之间，
    所述输出电容连接于所述集成电路的所述输出电容正极管脚与所述输出电容负极管脚之间，
    所述充电通道开关连接所述集成电路的所述驱动信号管脚。
  67. 如权利要求66所述的充电器，其特征在于：所述泵送电容和所述输出电容包括：陶瓷电容。
  68. 如权利要求66所述的充电器，其特征在于：所述充电通道开关包括一个或多个并联连接的MOS管开关单元，每个MOS管开关单元包括背靠背电耦合的两个NMOS管，
    其中，所述两个NMOS管的栅极相连，并且，所述两个NMOS管的栅极相连的连接端作为所述充电通道开关的控制端，所述两个NMOS管的源极相连，所述两个NMOS管中的一个NMOS管的漏极用于连接到充电电源端，另一个NMOS管的漏极用于连接到充电电池的正极端。
  69. 一种充电控制方法，其特征在于，所述方法应用于如权利要求1所述的充电器驱动电路，所述方法包括：
    基于充电控制信号来控制所述充电通道开关导通与断开；
    在所述充电控制信号使得所述控制开关闭合时，所述输出电压触发所述充电通道开关导通，以对所述充电电池进行充电。
  70. 一种充电控制系统，其特征在于，包括：一个或多个处理器，所述处理器单独地或共同地工作，用于执行如权利要求69所述的充电控制方法。
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