WO2021227890A1

WO2021227890A1 - Computing system, server, and signal transmission method

Info

Publication number: WO2021227890A1
Application number: PCT/CN2021/091219
Authority: WO
Inventors: 尹文
Original assignee: 华为技术有限公司
Priority date: 2020-05-13
Filing date: 2021-04-29
Publication date: 2021-11-18
Also published as: CN113672550A

Abstract

Disclosed are a computing system (10), a server (20), and a signal transmission method, which are used to improve the speed and data volume of data transmission between chips. The computing system (10) comprises a first chip (100), a first transceiver (200), a second chip (300) and a second transceiver (400), wherein the first transceiver (200) is connected to the first chip (100), and the second transceiver (400) is connected to the second chip (300). The signal transmission method comprises: the first chip (100) sending a parallel signal; the first transceiver (200) receiving the parallel signal, converting the parallel signal into an optical signal, and sending the optical signal to the second transceiver (400); the second transceiver (400) receiving the optical signal, converting the optical signal into a parallel signal, and transmitting the parallel signal to the second chip (300); and then, the second chip (300) receiving the parallel signal, wherein data exchange between the first chip (100) and the second chip (300) is based on the optical signal. Compared with an electrical signal, the optical signal has a stronger anti-interference performance, a fast transmission speed, a better data integrity and a higher data transmission efficiency. The optical signal can have more data loaded thereon, thereby increasing the data volume of data transmission between chips.

Description

Computing system, server and signal transmission method

This application requires the priority/priority of a Chinese patent application filed with the Chinese Patent Office, the application number is 202010402044.2, and the invention title is "a computing system, server and signal transmission method" on May 13, 2020, the entire content of which is by reference Incorporated in this application.

Technical field

This application relates to the field of communication technology, and in particular to a computing system, a server, and a signal transmission method.

Background technique

With the rapid development of artificial intelligence and big data, in order to respond to the needs of diversified computing, in addition to the central processing unit (CPU), other hardware, such as graphics processing unit (graphics processing unit), will also be introduced into the computing system. , GPU), application specific integrated circuit (ASIC), programmable gate array (field programmable gate array, FPGA) and other accelerators (accelerator, ACC), these newly introduced hardware and CPU can achieve a variety of different Computing tasks. Based on this, a new type of computing system—heterogeneous computing system was formed.

The so-called heterogeneous computing system refers to the various hardware in the system, such as CPU, GPU, ASIC, FPGA, etc., using different types of instruction sets. However, the core of a heterogeneous computing system is still the CPU. As a scheduler, the CPU needs to exchange a lot of data with other hardware. At present, the electrical interface is usually used for data interaction in heterogeneous computing systems, that is, the use of high-speed serial deserializers (high-speed serial deserializers). Speed serializer deserializer (HSS) sends and receives electrical signals.

However, as the performance of the CPU improves, the data processing capability of the CPU is also significantly improved, and the amount of data interaction between CPUs and between CPUs and other hardware will increase, and the shortcomings of electrical interfaces in terms of bandwidth, anti-interference and signal loss are also increasing. Highlight.

Summary of the invention

This application provides a computing system, a server, and a signal transmission method to improve the data transmission speed and data volume between chips.

In the first aspect, an embodiment of the present application provides a computing system. The computing system includes a first chip, a first transceiver, a second chip, and a second transceiver. The first transceiver is connected to the first chip, and the second The transceiver is connected to the second chip; in this computing system, the first chip can send parallel signals. The first transceiver receives the parallel signal, converts the parallel signal into an optical signal, and then sends an optical signal to the second transceiver. For example, the first transceiver may send an optical signal to the second transceiver through an optical switching network. The second transceiver receives the optical signal, converts the optical signal into a parallel signal, and transmits the parallel signal to the second chip; after that, the second chip receives the parallel signal and can perform subsequent data processing operations.

Through the foregoing computing system, the data interaction between the first chip and the second chip is no longer based on electrical signals, but on optical signals. Compared with electrical signals, optical signals have stronger anti-interference, faster transmission speed, better data integrity, and higher data transmission efficiency. In addition, optical signals can load more data, which also increases the amount of data transmitted between chips.

In a possible design, the first transceiver is built in the first chip, and the second transceiver is built in the second chip.

Through the above computing system, the first chip and the second chip have the photoelectric conversion function, the conversion between the parallel signal and the optical signal is more efficient, the construction process of the computing system is simplified, and the structure of the computing system is simpler.

In a possible design, the first transceiver includes a transmitter, and the transmitter includes a first serial deserializer, a modulator, and a first optical waveguide; wherein, the first serial deserializer can perform serial-to-parallel conversion, The parallel signal is converted into a serial signal; the modulator can perform signal adjustment, and the serial signal can be modulated on the original optical signal to generate an optical signal; the first optical waveguide is used to send the optical signal. The first transceiver may further include a receiver, the structure of the receiver is similar to that of the receiver in the second transceiver, and the receiver can convert the received optical signal into a parallel signal.

Through the foregoing computing system, the transmitter and receiver included in the first transceiver can realize photoelectric conversion and serial-parallel conversion, and has a simple structure and is relatively easy to implement.

In a possible design, if the modulator generates multiple optical signals, the first transceiver may also include a first wavelength division multiplexer; the first wavelength division multiplexer can modulate multiple optical signals on the first optical signal. On the waveguide, a transmission channel on the first optical waveguide is selected for a plurality of optical signals.

Through the above calculation system, the first wavelength division multiplexer can process multiple optical signals, which further increases the amount of data that can be transmitted at one time during the data transmission process, and at the same time ensures the data transmission efficiency.

In a possible design, the second transceiver includes a receiver, the receiver includes a second serial deserializer, a demodulator, and a second optical waveguide; the second optical waveguide can receive optical signals; the demodulator can perform Signal demodulation is to demodulate the optical signal into a serial signal; after that, the second serial deserializer can perform serial-to-parallel conversion to convert the serial signal into a parallel signal. The second transceiver may further include a transmitter, the structure of the transmitter is similar to that of the transmitter in the first transceiver, and the transmitter can convert the received parallel signal into an optical signal.

Through the foregoing computing system, the transmitter and receiver in the second transceiver can realize photoelectric conversion and serial-parallel conversion, and has a simple structure and is relatively easy to implement.

In a possible design, if the second optical waveguide receives multiple optical signals, the receiver further includes a second wavelength division multiplexer; the second wavelength division multiplexer can obtain multiple optical signals from the second optical waveguide. Signal.

Through the foregoing computing system, the second wavelength division multiplexer can process multiple optical signals, which further increases the amount of data that can be transmitted at one time during the data transmission process, and the data transmission efficiency is also higher.

In the second aspect, an embodiment of the present application provides a server, which includes the computing system provided in the first aspect and any possible design in the first aspect.

In the third aspect, the present application provides a signal transmission method. For beneficial effects, please refer to the related description of the first aspect, which will not be repeated here. The method is executed by a computing system. The computing system includes a first chip, a first transceiver, a second chip, and a second transceiver. The first transceiver is connected to the first chip, and the second transceiver is connected to the second transceiver. Chip connection, a first chip sends a signal, a second chip receives a signal as an example, the method of signal transmission in the computing system is described, and the method includes:

The first chip can send parallel signals to the first transceiver; after receiving the parallel signals, the first transceiver converts the parallel signals into optical signals, and sends the optical signals to the second transceiver through the optical switching network; the second transceiver receives After the optical signal is received, the optical signal can be converted into a parallel signal, and the parallel signal can be transmitted to the second chip; after that, the second chip can receive the parallel signal.

In a possible design, the first transceiver includes a transmitter, and the transmitter includes a first serial deserializer, a modulator, and a first optical waveguide. After receiving the parallel signal, the first transceiver converts the parallel signal As an optical signal, when the optical signal is sent to the second transceiver through the optical switching network, the first serial deserializer in the transmitter converts the parallel signal into a serial signal; after that, the modulator modulates the serial signal on the original optical signal. On the signal, an optical signal is generated; the first optical waveguide sends the optical signal again.

In a possible design, if the modulator generates multiple optical signals, the first transceiver also includes a first wavelength division multiplexer, and the first wavelength division multiplexer can modulate the multiple optical signals on the first optical waveguide. superior.

In a possible design, the second transceiver includes a receiver, and the receiver includes a second serial deserializer, a demodulator, and a second optical waveguide. After receiving the optical signal, the second transceiver transmits the optical signal Converted into a parallel signal, when the parallel signal is transmitted to the second chip, the second optical waveguide in the receiver receives the optical signal; after that, the demodulator demodulates the optical signal into a serial signal; the second serial deserializer then The serial signal is converted to a parallel signal.

In a possible design, the second optical waveguide receives multiple optical signals, and the receiver further includes a second wavelength division multiplexer, and the second wavelength division multiplexer can obtain multiple optical signals from the second optical waveguide.

Description of the drawings

Figure 1A is a schematic structural diagram of a computing system provided by this application;

FIG. 1B is a schematic diagram of signal transmission in a computing system provided by this application;

FIG. 2 is a schematic structural diagram of a first chip provided by this application;

3A to 3B are schematic structural diagrams of a computing system provided by this application;

FIG. 4 is a schematic structural diagram of a first transceiver provided by this application;

FIG. 5 is a schematic structural diagram of a second transceiver provided by this application;

6A to 6C are schematic structural diagrams of a first transmitter provided by this application;

7A to 7C are schematic structural diagrams of a first transmitter provided by this application;

FIG. 8 is a schematic structural diagram of a server provided by this application;

FIG. 9 is a schematic diagram of a signal transmission method provided by this application.

Detailed ways

This application provides a computing system, a server, and a signal transmission method. The computing system may include multiple chips. For convenience of description, here only two chips are included in the computing system, the first chip and the second chip respectively. Be explained.

1A, the computing system 10 includes a first chip 100, a first transceiver 200, a second chip 300, and a second transceiver 400. The first chip 100 is connected to the first transceiver 200, the first chip 100 and the first transceiver 200 can perform signal transmission, the second chip 300 and the second transceiver 400 are connected, and the second chip 300 and the second transceiver are connected. Signal transmission can be carried out between 400. It should be noted that the signal here usually refers to an electrical signal loaded with data. The electrical signal may be a parallel signal or a serial signal. In the embodiment of the present application, the signal transmitted between the first chip 100 and the first transceiver 200, and between the second chip 300 and the second transceiver 400 Take the parallel signal as an example.

1B, FIG. 1B is a schematic diagram of the signal transmission process in the computing system 10. Parallel solid lines indicate parallel signals, dotted lines indicate optical signals, and arrows indicate the direction of signal transmission. The first chip 100 can generate parallel signals, and can The generated parallel signal is sent to the first transceiver 200. After receiving the parallel signal, the first transceiver 200 may further process the parallel signal, convert the parallel signal into an optical signal, and send the optical signal to the second transceiver 400 through the optical switching network.

Wherein, the optical switching network is a communication network including multiple optical fibers. Optionally, the optical switching network may also include an optical switch, and the optical switch is used to select a transmission path for optical signals transmitted in the optical switching network.

The optical switching network can transmit the optical signal from the first transceiver 200 to the second transceiver 400. After receiving the optical signal, the second transceiver 400 can further process the optical signal and convert the optical signal into The parallel signal is transmitted to the second chip 300, and the second chip 300 receives the parallel signal, and can obtain the data loaded on the parallel signal for data processing.

In the above description, only the first chip 100 is used as the sender of the parallel signal, and the second chip 300 is used as the receiver of the parallel signal. In fact, in the signal transmission process, the second chip 300 and the second chip 300 The signal transmission process of one chip 100 is mutual, that is, the second chip 300 can also send parallel signals. The parallel signals are transmitted to the first chip 100 after passing through the second transceiver 400, the optical switching network, and the first transceiver 200. In the embodiments of the present application, only the first chip 100 transmits signals to the second chip 300 as an example for description. The second chip 300 transmits signals to the first chip 100 in the same manner as the first chip 100 to the second chip 300. The signal transmission manner is similar. For details, please refer to the related description of the signal transmission from the first chip 100 to the second chip 300, which will not be repeated in the embodiment of the present application.

In the computing system 10 as shown in FIG. 1B, the data interaction between the first chip 100 and the second chip 300 is no longer based on electrical signals, but based on optical signals. Compared with electrical signals, optical signals have stronger anti-interference and fast transmission speed, which can ensure the integrity of data and the high efficiency of data transmission during data transmission between chips. In addition, the optical signal can load more data, which also increases the amount of data transmitted between chips.

The embodiments of the present application do not limit the types of chips (the first chip 100 and the second chip 300). The chips may be CPUs or other accelerators, such as GPUs, ASICs, and FPGAs. The embodiment itself does not limit the specific structure of the chip, and it may be a 2D chip, a 3D chip, or a neural network processing unit (NPU). Among them, the 2D chip refers to the processing module in the chip, such as the die of the CPU, which is placed on the same plane as the in output (IO) module, and the 3D chip refers to the processing module in the chip, such as the CPU die, It is placed on a different plane from the in output (IO) module.

From the above description, it can be seen that the transceivers (first transceiver 200 and second transceiver 400) involved in the embodiments of the present application have a signal conversion function and a signal transmission function. The signal conversion function includes but is not limited to: parallel signal conversion to light The signal and optical signal are converted into parallel signals.

The embodiment of the present application does not limit the connection relationship between the transceiver and the chip. For example, the first transceiver 200 may be externally installed on the periphery of the first chip 100. The first transceiver 200 may also be built in the first chip 100, that is, the first transceiver 200 may be used as a component of the IO module for signal transmission in the first chip 100 and built in the first chip 100 . The connection relationship between the second transceiver 400 and the second chip 300 is similar to the connection relationship between the first transceiver 200 and the first chip 100, and will not be repeated here.

In the following, the first chip 100 is used as the CPU, and the manner in which the first transceiver 200 is built in the first chip 100 will be described. As shown in FIG. 2, it is a schematic diagram of the structure of the first chip 100.

The first chip 100 is based on a silicon chip. The first transceiver 200 and multiple CPU dies are arranged on the silicon chip. The multiple CPU dies are connected to form the core of the CPU, which can also be regarded as the processing module of the CPU. The multiple CPU dies are used to implement the data processing function of the CPU. The first transceiver 200 is connected to the CPU die. The first transceiver 200 may receive a signal from the CPU die, transmit the signal to the outside, and may also send a signal received from the outside (such as an optical switching network) to the CPU die. The first transceiver 200 can perform data transmission and can be regarded as an IO module or a component part of the IO module of the CPU. The embodiment of the present application does not limit the number of the first transceiver 200 in the first chip 100, and it may be one or more.

In the computing system 10 provided by the embodiment of the present application, due to the photoelectric conversion, the first transceiver 200 needs to load the data carried by the parallel signal to the original optical signal to generate the optical signal, that is, the light source is required to generate the original optical signal. The light source can be externally installed outside the computing system 10. If the first chip 100 and the first transceiver 200 can be integrated as a system-on-chip, the light source can be an off-chip light source that is coupled with the computing system 10 to combine the original optical signal It is transmitted to the first transceiver 200 in the computing system 10 through an optical waveguide.

As shown in FIG. 3A, in addition to the computing system 10, an off-chip light source 500 may also be provided. The off-chip light source 500 is used to generate the original optical signal. The first transceiver 200 receives the original optical signal and transfers the parallel signal to the The data is loaded on the original optical signal to generate the optical signal.

The light source can be built into the computing system 10. If the first chip 100 and the first transceiver 200 can be integrated as a system-on-chip, the light source can also be integrated on a chip, that is, the light source can be an on-chip light source.

As shown in FIG. 3B, the computing system 10 may also include an on-chip light source 600. The on-chip light source 600 functions similarly to the off-chip light source 500. The difference between the off-chip light source 500 and the on-chip light source 600 lies in the setting position. For details, please refer to the foregoing description.

In the description of FIGS. 3A and 3B, only the first chip 100 sends a parallel signal and an additional light source is provided as an example. If the second chip 300 also needs to send a parallel signal, a light source (such as an on-chip light source 600 or an off-chip light source) is also needed. 500) Generate an original optical signal, and send the original optical signal to the second transceiver 400.

The structure of the transceivers (the first transceiver 200 and the second transceiver 400) involved in the embodiments of the present application will be described below. For convenience of description, the parallel signal sent by the first chip 100 is referred to as the first parallel signal, the optical signal sent by the first transceiver 200 is the first optical signal, and the parallel signal sent by the second chip 300 is referred to as the second parallel signal. (The second parallel signal can also be understood as the parallel signal that the first chip 100 needs to receive), the optical signal sent by the second transceiver 400 is the second optical signal.

As shown in FIG. 4, a schematic structural diagram of a first transceiver 200 provided by an embodiment of this application. The first transceiver 200 includes a first transmitter 210 and a first receiver 220.

The first transmitter 210 is configured to convert the first parallel signal into a first optical signal, and send the first optical signal to the second transceiver 400 through the optical switching network.

The first receiver 220 is configured to receive the second optical signal from the second transceiver 400 through the optical switching network, convert the second optical signal into a second parallel signal, and send the second parallel signal to the first chip 100.

When the first transmitter 210 converts the first parallel signal into the first optical signal, it may perform serial-parallel conversion first, convert the first parallel signal into the first serial signal, and then modulate the first serial signal to the original On the optical signal, the first optical signal is generated.

When the first receiver 220 converts the second optical signal into a second parallel signal, it may first demodulate the second optical signal into a second serial signal, and then perform serial-to-parallel conversion to convert the second serial signal into The second parallel signal.

As shown in FIG. 5, a schematic structural diagram of a second transceiver 400 provided by an embodiment of this application. The second transceiver 400 includes a second transmitter 410 and a second receiver 420.

The second receiver 420 is configured to receive the first optical signal from the first transceiver 200 through the optical switching network, convert the first optical signal into a first parallel signal, and send the first parallel signal to the second chip 300.

The second transmitter 410 is configured to convert the second parallel signal into a second optical signal, and send the second optical signal to the first transceiver 200 through the optical switching network.

When the second receiver 420 converts the first optical signal into the first parallel signal, it may first demodulate the first optical signal into the first serial signal, and then perform serial-to-parallel conversion to convert the first serial signal into The first parallel signal.

When the second transmitter 410 converts the second parallel signal into the second optical signal, it may first perform serial-to-parallel conversion, convert the second parallel signal into a second serial signal, and then modulate the second serial signal to the original On the optical signal, a second optical signal is generated.

The following respectively takes the first transmitter 210 as an example to describe the transmitters (the first transmitter 210 and the second transmitter 410) involved in the present application:

As shown in FIG. 6A, there is a first transmitter 210 provided in this embodiment of the application. The first transmitter 210 includes a first serial deserializer 211, a modulator 212, and a first optical waveguide 213.

The first serial deserializer 211 can perform serial-to-parallel conversion and can convert the first parallel signal into a first serial signal; the modulator 212 can modulate the first serial signal on the original optical signal to generate the first optical signal ; Afterwards, the first optical waveguide 213 may send the first optical signal to the optical switching network.

If the modulator 212 generates multiple first optical signals, the first transmitter 210 may also include a first wavelength division multiplexer 214. As shown in FIG. 6B, the first wavelength division multiplexer 214 may combine multiple first optical signals. The optical signal is modulated on the first optical waveguide 213, and each first optical signal can be transmitted on a transmission channel of the first optical waveguide 213, and the transmission channel of each first optical signal is different, so that multiple first optical signals can be transmitted in The same first optical waveguide 213 propagates.

After the first serial deserializer 211 performs serial-parallel processing, the generated first serial signal may be mixed with noise data, and the signal strength may be reduced. As shown in FIG. 6C, the first transmitter 210 may further include a preprocessing module 215, which is located between the first serial deserializer 211 and the modulator 212, and can calibrate the first serial signal. The calibration operations performed by the preprocessing module 215 include but are not limited to: denoising, signal enhancement, and signal equalization.

The embodiment of the present application does not limit the connection mode between the first serializer 211 and the modulator 212. For example, when the first serializer 211 and the modulator 212 are integrated on the same silicon chip, silicon can be used. The interconnection in the silicon interposer in the chip. For another example, when the first serializer 211 and the modulator 212 are integrated on the same substrate, the transmission line in the package substrate can be directly interconnected. For another example, the first serializer 211 and the modulator 212 may be interconnected by a high-density cable.

The embodiment of the present application does not limit the connection modes between the modulator 212 and the first optical waveguide 213, the modulator 212 and the first wavelength division multiplexer 214, and the first wavelength division multiplexer 214 and the first optical waveguide 213 Since the modulator 212 and the first optical waveguide 213, the modulator 212 and the first wavelength division multiplexer 214, and the first wavelength division multiplexer 214 and the first optical waveguide 213 need to transmit optical signals, the modulator 212 The optical fiber may be directly connected to the first optical waveguide 213, the modulator 212 and the first wavelength division multiplexer 214, and the first wavelength division multiplexer 214 and the first optical waveguide 213.

The following respectively takes the second receiver 420 as an example to describe the receivers (the first receiver 220 and the second receiver 420) involved in the present application:

As shown in FIG. 7A, a second receiver 420 provided by this embodiment of the present application includes a second serial deserializer 421, a demodulator 422, and a second optical waveguide 423;

The second optical waveguide 423 can receive the first optical signal from the optical switching network; after that, the demodulator 422 can demodulate the first optical signal into a first serial signal; the second serial deserializer 421 can convert the first optical signal The serial signal is converted into a first parallel signal, and the first parallel signal is transmitted to the second chip 300.

If the second optical waveguide 423 receives multiple first optical signals, if there are multiple second optical signals, the receiver further includes a second wavelength division multiplexer 424; as shown in FIG. 7B, the second wavelength division multiplexer 424 can obtain multiple first optical signals from the second optical waveguide 423, that is, the second wavelength division multiplexer 424 can obtain multiple first optical signals from multiple transmission channels of the second optical waveguide 423, and the second The wavelength division multiplexer 424 can obtain a first optical signal from a transmission channel.

During the transmission of the first optical signal, there may be signal attenuation, or noise data may be introduced, resulting in the subsequent serial-parallel processing of the second serial deserializer 421 and the generated first parallel signal will be mixed with noise Data and signal strength become smaller; during the serial-parallel processing of the second serial deserializer 421, there may also be signal attenuation or noise data introduced. As shown in FIG. 7C, the second receiver can also A post-processing module 425 is included. The post-processing module 425 is located at the output side of the second serial deserializer 421 and can calibrate the second parallel signal. The calibration operations performed by the post-processing module 425 include but are not limited to: denoising , Signal enhancement, signal equalization.

The connection manner between the second serializer 421 and the demodulator 422 is similar to the connection manner between the first serializer 211 and the modulator 212. For details, please refer to the foregoing content, which is not repeated here.

The connection mode between the demodulator 422 and the second optical waveguide 423 is similar to the connection mode between the modulator 212 and the first optical waveguide 213, and the connection mode between the demodulator 422 and the second wavelength division multiplexer 424 is similar to that of the modulation The connection between the first wavelength division multiplexer 212 and the first wavelength division multiplexer 214 is similar. The connection between the second wavelength division multiplexer 424 and the second optical waveguide 423 is the same as that between the first wavelength division multiplexer 214 and the first optical waveguide. The connection between the waveguides 213 is similar. For details, please refer to the foregoing content, which will not be repeated here.

As shown in FIG. 8, an embodiment of the present application also provides a server, and the server 20 includes the computing system 10 in any of the foregoing embodiments.

In order to make the description of the solution clearer, the following will combine the previous embodiments, taking the computing system shown in FIG. 1A and the signal transmission method shown in FIG. Give a general introduction. As shown in FIG. 9, in the computing system 10, the first chip 100 can send a parallel signal to the first transceiver 200 (step 1); after receiving the parallel signal, the first transceiver 200 can convert the parallel signal into light. Signal (step 2), send an optical signal to the second transceiver 400 through the optical switching network (step 3); after receiving the optical signal, the second transceiver 400 can convert the optical signal into a parallel signal (step 4), and send it to the second transceiver 400 The two chips 300 transmit parallel signals (step 5); after that, the second chip 300 can receive parallel signals.

The information processing process of the transmitter 210 in the first transceiver 200 and the signal processing process of the receiver 420 in the second transceiver 400 can be referred to the foregoing description and will not be repeated here.

It should be noted that the embodiments provided in this application are merely illustrative. Those skilled in the art can clearly understand that for the convenience and conciseness of description, in the above-mentioned embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in an embodiment, reference may be made to other implementations. The description of the case. The features disclosed in the embodiments, claims, and drawings of the present invention may exist independently or in combination. The features described in the form of hardware in the embodiments of the present invention can be executed by software, and vice versa. There is no limitation here.

Claims

A computing system, wherein the computing system includes a first chip, a first transceiver, a second chip, and a second transceiver, wherein the first transceiver is connected to the first chip, and the The second transceiver is connected to the second chip;

The first chip is used to send parallel signals;

The first transceiver is configured to receive the parallel signal, convert the parallel signal into an optical signal, and send the optical signal to the second transceiver through an optical switching network;

The second transceiver is configured to receive the optical signal, convert the optical signal into the parallel signal, and transmit the parallel signal to the second chip;

The second chip is used to receive the parallel signal.
8. The computing system of claim 1, wherein the first transceiver is built in the first chip, and the second transceiver is built in the second chip.
The computing system according to claim 1 or 2, wherein the first transceiver includes a transmitter, and the transmitter includes a first serial deserializer, a modulator, and a first optical waveguide;

The first serial deserializer is used to convert the parallel signal into a serial signal;

The modulator is configured to modulate the serial signal on the original optical signal to generate the optical signal;

The first optical waveguide is used to transmit the optical signal.
5. The computing system of claim 3, wherein if the modulator generates a plurality of the optical signals, the first transceiver further comprises a first wavelength division multiplexer;

The first wavelength division multiplexer is used to modulate a plurality of the optical signals on the first optical waveguide.
3. The computing system of claim 1 or 2, wherein the second transceiver includes a receiver, and the receiver includes a second serializer, a demodulator, and a second optical waveguide;

The second optical waveguide is used to receive the optical signal;

The demodulator is used to demodulate the optical signal into a serial signal;

The second serial deserializer is used to convert the serial signal into the parallel signal.
8. The computing system of claim 5, wherein the second optical waveguide receives a plurality of the optical signals, and the receiver further comprises a second wavelength division multiplexer;

The second wavelength division multiplexer is used to obtain a plurality of the optical signals from the second optical waveguide.
A server, wherein the server includes the computing system according to any one of claims 1 to 6.
A signal transmission method, characterized in that the method is executed by a computing system, the computing system includes a first chip, a first transceiver, a second chip, and a second transceiver, wherein the first transceiver and the The first chip is connected, and the second transceiver is connected to the second chip. The method includes;

The first chip sends a parallel signal to the first transceiver;

After receiving the parallel signal, the first transceiver converts the parallel signal into an optical signal, and sends the optical signal to the second transceiver through an optical switching network;

After receiving the optical signal, the second transceiver converts the optical signal into the parallel signal, and transmits the parallel signal to the second chip;

The second chip receives the parallel signal.
The method according to claim 8, wherein the first transceiver comprises a transmitter, the transmitter comprises a first serial deserializer, a modulator, and a first optical waveguide, and the first transceiver After receiving the parallel signal, converting the parallel signal into an optical signal, and sending the optical signal to the second transceiver through an optical switching network, specifically including;

The first serial deserializer converts the parallel signal into a serial signal;

The modulator modulates the serial signal on the original optical signal to generate the optical signal;

The first optical waveguide transmits the optical signal.
9. The method of claim 9, wherein if the modulator generates a plurality of the optical signals, the first transceiver further comprises a first wavelength division multiplexer, and the method further comprises;

The first wavelength division multiplexer modulates a plurality of the optical signals on the first optical waveguide.
The method according to claim 8, wherein the second transceiver comprises a receiver, the receiver comprises a second serial deserializer, a demodulator, and a second optical waveguide, and the second transceiver After receiving the optical signal, the device converts the optical signal into the parallel signal, and transmits the parallel signal to the second chip, which specifically includes:

The second optical waveguide receives the optical signal;

The demodulator demodulates the optical signal into a serial signal;

The second serial deserializer converts the serial signal into the parallel signal.
The method according to claim 11, wherein the second optical waveguide receives a plurality of the optical signals, the receiver further comprises a second wavelength division multiplexer, and the method further comprises:

The second wavelength division multiplexer obtains a plurality of the optical signals from the second optical waveguide.