WO2021210733A1 - Memristor element, manufacturing method therefor, and information storage device comprising same - Google Patents

Abstract

A memristor element is disclosed. The memristor element comprises: a first electrode and a second electrode provided to face each other; and a resistance change layer provided between the first electrode and the second electrode, and formed of an organic-inorganic halogen compound represented by chemical formula 1 and having a layered structure. The memristor element can implement performance such as low driving voltage, a high on/off ratio, and long durability.

Description

Memristor device, manufacturing method thereof, and information storage device including same

The present invention relates to a memristor device capable of non-volatile storage of information through resistance change, a method for manufacturing the same, and an information storage device including the same.

A memristor is a nano-scale passive device that connects magnetic flux and electric charge. Even when the power supply is cut off, the current amount and direction can be memorized immediately before power supply, so that the original state can be restored when power is supplied. Such a memristor is one of the basic components of an electric circuit together with a resistor, a capacitor, and an inductor.

Oxides, nitrides, and organic materials have been studied as memristor materials that have been mainly used, but recently, a memrist using organic/inorganic perovskite materials with a ^{low driving voltage and a relatively high ON/OFF ratio of 10 5 or more.} Lister studies are ongoing. In particular, organic-inorganic lead halide perovskite exhibiting excellent photoelectric properties has multilevel data storage capability, millivolt scale operating voltage, forming-free properties and bendable properties, and zero-dimensional structure due to the high ON/OFF ratio of ^{about 10 7} It is receiving a lot of attention because of its structural diversity from to three-dimensional structures.

It is known that the composition of lead (Pb)-based perovskite affects the switching properties, for example, in methylammonium lead halide perovskite, as the halide ion is changed from iodine to bromine, the SET voltage decreases. The yellow delta phase biperovskite formamidinium lead aodide showed better switching properties than the black alpha perovskite phase.

Ion migration is argued to be the most probable bipolar switching mechanism. Flexible memory devices may also be possible because organic-inorganic halide perovskites are highly resistant to bending. For example, in the formula (R) _{2 (MA) n-1} Pb _n I _3n+1 (MA=methylammonium, R is a cation greater than MA), a 2D layered perovskite with n=1 ^{It showed an ON/OFF ratio of about 10 7} or more with a low operating voltage and better durability than 3D perovskite (n=∞).

For quasi-2D perovskite (PEA) ₂ Cs ₃ Pb ₄ I ₁₃ (PEA=phenylethylammonium), an ^{ON/OFF ratio as high as about 10 9} has recently been reported, which results in a wider bandgap in the 2D structure and thus improved Schottky barrier properties.

Although lead (Pb)-based perovskite has shown promising resistance-switching properties, there are problems related to lead toxicity. Therefore, efforts are being made to replace Pb(II) with less toxic or non-toxic elements such as tin(II), bismuth(III) or antimony(III). However, the resistive switching properties of the reported materials were mostly inferior to those of lead (Pb)-based perovskite.

In the case of tin(II), CsSnI ₃ showed an ON/OFF ratio of about 10 ³ _{, and (CH 3} NH ₃ ) ₃ Bi ₂ I ₉ had an ^{ON/OFF ratio smaller than about 10 3} and a low of about 300 cycles. Durability was shown, and CsBi ₂ I ₉ nanosheets were applied to a flexible memory device to exhibit an ON/OFF ratio of ^{10 3} _{, and CsBi 3} I ₁₀ exhibited durability of 150 cycles and an ON/OFF ratio of ^{10 3 ,} (CH ₃ NH ₃ ) ₃ Sb ₂ Br ₉ showed synaptic characteristics, but showed a low ON/OFF ratio of ^{10 2} _{, and CsPb 1-x} Bi _x I ₃ showed an ^{ON/OFF ratio lower than 10 2} and an ON/OFF ratio of 500 cycles. showed durability. And A ₃ Bi _1.8 Na _0.2 I _8.6 (A=Rb and Cs) ^{showed an ON/OFF ratio as high as about 107} at an operating voltage lower than 0.1V, but exhibited durability of less than 100 cycles.

On the other hand, in the case of tin(II), the chemical stability of divalent tin (Sn) was a problem because of oxidation of unstable tin(II) to more stable tin(IV).

In the case of trivalent cations such as bismuth (III) and antimony (III), it is difficult to form a stable 2D structure.

Therefore, novel cations that can be formed into 2D layered perovskite are required for resistive switching memories with high ON/OFF ratio and long durability.

SUMMARY OF THE INVENTION One object of the present invention is to provide a memristor device having a high ON/OFF ratio, a low driving voltage, and long durability.

Another object of the present invention is to provide a method for manufacturing the memristor device.

Another object of the present invention is to provide an information storage device including the memristor element.

A memristor device according to an embodiment of the present invention includes a first electrode and a second electrode disposed to face each other; and a resistance change layer disposed between the first electrode and the second electrode and formed of a crystalline organic-inorganic halogen compound represented by the following Chemical Formula 1 and having a layered structure, wherein one of the first electrode and the second electrode is an active electrode including copper (Cu), silver (Ag), or aluminum (Al), and the other one may be an inactive electrode formed of a conductive material having a higher ionization energy than a material forming the active electrode.

[Formula 1]

In Formula 1, R represents a +1 valent organic cation, and X represents a halogen anion.

In an embodiment, R may include C ₆ H ₅ (CH ₂ ) _n NH ₃ (n=1, 2 or 3).

In an embodiment, the resistance change layer may be formed _{of (BzA) 2} CuBr ₄ (BZA=C ₆ H ₅ CH ₂ NH _{3 ).}

In an embodiment, the crystalline organic-inorganic halogen compound may _{have a layered structure in which an inorganic anion layer of CuX 4} ^2- is separated by an organic cation layer, and the organic cation may have a double layer structure.

In one embodiment, the inorganic anion layer may have a structure in which Cu ions are coordinated by 6 X ions, and CuX ₆ octahedrons are arranged in a single layer.

In an embodiment, a plurality of ring-shaped first protrusions or first depressions each forming a plurality of closed curves may be formed on a first surface of the resistance variable layer facing the active electrode.

In an embodiment, the first surface has a second protrusion or a second recess formed inside or outside the first protrusion or the first recess and having a shape different from the first protrusion or the first recess. can be formed.

In an embodiment, the first surface may have an RMS roughness of 100 nm to 140 nm.

A method of manufacturing a memristor device according to an embodiment of the present invention comprises: a first step _{of spin-coating a precursor solution in which CuBr 2} and BzABr are dissolved on a surface of a substrate on which an inert electrode is formed (BzA) ₂ to form a CuBr _{4 layer;} a second step of annealing the (BzA) ₂ CuBr ₄ layer at 70 to 80°C; and forming an active electrode on top of the annealed (BzA) ₂ CuBr ₄ layer, wherein diethyl ether antisolvent is dripped onto the substrate during spin coating of the precursor solution in the first step. and a plurality of ring-shaped first protrusions or first depressions respectively forming a plurality of closed curves are formed on the surface of _{the (BzA) 2} CuBr ₄ layer formed in the first step.

In one embodiment, in the first step, the (BzA) ₂ CuBr ₄ layer is formed in or outside the first protrusion or the first concavity on the surface of the layer and has a different shape from the first protrusion or the first concavity. A second protrusion or a second depression having a may be further formed.

In an embodiment, the surface of the heat-treated (BzA) ₂ CuBr ₄ layer may have an RMS roughness of 100 nm to 140 nm.

An information storage device according to an embodiment of the present invention includes: a first signal line and a second signal line extending in a direction crossing each other; and a memory cell and a selection element disposed between the first signal line and the second signal line in an overlapping region and connected in series with each other, wherein the memory cell includes the first signal line and the second signal line. A first electrode electrically connected to one of the lines, a second electrode electrically connected to the selection element, and a resistance change layer disposed between the first electrode and the second electrode, wherein the resistance change layer includes the following Chemical Formula 1 and is formed of a crystalline organic-inorganic halogen compound having a layered structure.

[Formula 1]

In Formula 1, R represents a +1 valent organic cation, and X represents a halogen anion.

In an embodiment, the memory cell may have a bipolar switching characteristic.

In one embodiment, the memory cell may have multilevel storage capability.

According to the memristor device and information storage device of the present invention, the resistance change layer is an organic-inorganic halogen compound having a layered structure.

and has a morphology in which a ring-shaped protrusion or depression is formed on the surface of the resistance change layer, so it has a ^{high ON/OFF ratio of about 10 8} or more, and has a multi-level information storage ability, about 0.2 to 0.5 V It may have a low driving voltage of

1 is a view for explaining a memristor device according to an embodiment of the present invention.

2 is a perspective view illustrating an information storage device according to an embodiment of the present invention.

3 is a cross-sectional SEM image of a PMMA/(BzA) ₂ CuBr ₄ /Pt/Ti/SiO _{2 /Si device manufactured according to an embodiment.}

4 is a graph showing an XRD pattern of the (BzA) ₂ CuBr _{4 layer.}

5 shows an SEM image ('a'), an AFM image ('b'), and a line profile ('c') for the AFM image showing the surface morphology of the deposited (BzA) ₂ CuBr _{4 layer.}

Figure 6a shows (a) and after (b) annealing _{of a (BzA) 2} CuBr ₄ layer formed on a Pt substrate under conditions of dripping diethyl ether antisolvent during spin coating of a precursor solution. optical microscope images, and FIG. 6b is an optical microscope image after annealing _{of a (BzA) 2} CuBr ₄ layer formed on a Pt substrate under conditions of no dripping of diethyl ether antisolvent during spin coating of the precursor solution. _{6c shows (BzA) 2} CuBr ₄ layers formed on the ITO substrate (d) and the FTO substrate (e) under conditions of dripping diethyl ether antisolvent during spin coating of the precursor solution. light microscopy images for

7 is a graph illustrating a current-voltage relationship measured for a memristor device according to an embodiment.

8 is a result of measuring resistance changes in HRS and LRS with respect to the area of the Ag upper electrode in the “Ag/PMMA/(BzA) ₂ CuBr _{4 /Pt” device.}

9 shows the IV curve (a) measured by changing the maximum applied current at intervals of 10 ^{-1 A from 10 -5} A to 10 ^-1 A in a positive voltage sweep and the results of measuring the durability of LRS and HRS .

10 is a cycle-dependent resistance change (a) and retention time (b) of resistance values in HRS and LRS measured for the “Ag/PMMA/(BzA) ₂ CuBr _{4 /Pt” device manufactured according to the embodiment;} is the measurement result.

11A is a surface SEM image (a), IV curve (b) and durability test result (c _{) of a (BzA) 2} CuBr ₄ layer formed through annealing at 100° C. for 30 minutes using the same precursor solution as in Example; ), and FIG. 11b is a surface SEM image (a), IV curve (b) of _{a (BzA) 2} CuBr ₄ layer formed by dripping toluene as an antisolvent during spin coating but using the same precursor solution as in Example (a), IV curve (b) and durability test results (c).

12 shows durability and ON/OFF ratios for Pb-free organic or inorganic halide perovskite materials.

13 is a result of measuring the influence of the Au electrode on the IV characteristics of the (BzA) ₂ CuBr _{4 based memristor device.}

14 is a log scale IV characteristic in HRS and LRS (a), IV characteristic in LRS (b) and HRS for a memristor device according to the embodiment;

In accordance

shows the change characteristics of

15 is IV characteristic (a) of the memristor element (Ag / PMMA / (BzA) 2 CuBr 4 / Pt) according to the embodiment measured at around the SET process HRS 298, 313, 323, 333 and 343 K, and at HRS

These are graphs showing the relationship (b).

16 is a memristor device (Ag/PMMA) according to an embodiment stored for 14 days in a glove box in a nitrogen environment (a), under 50% relative conditions at 22° C. (b) and under conditions at 85° C. (c). IV properties for /(BzA) ₂ CuBr ₄ /Pt) are shown.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Since the present invention can have various changes and can have various forms, specific embodiments are illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents and substitutes included in the spirit and scope of the present invention.

The terminology used in the present application is only used to describe specific embodiments and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In the present application, terms such as “comprise” or “have” are intended to designate that a feature, step, operation, component, part, or combination thereof described in the specification is present, and includes one or more other features or steps. , it should be understood that it does not preclude the possibility of the existence or addition of , operation, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present application. does not

1 is a view for explaining a memristor device according to an embodiment of the present invention.

Referring to FIG. 1 , a memristor device 100 according to an embodiment of the present invention includes a first electrode 110 , a second electrode 120 , and a resistance change layer 130 .

The first electrode 110 and the second electrode 120 may be disposed to face each other while being spaced apart from each other, and may be formed of an electrically conductive material. For example, each of the first electrode 110 and the second electrode 120 may be formed of a conductive oxide, a conductive metal, a conductive nitride, a conductive polymer, a conductive carbon-based material, or the like. The conductive oxide may include at least one selected from indium tin oxide (ITO), fluorine tin oxide (FTO), ZnO-Ga ₂ O ₃ , ZnO-Al ₂ O ₃ , tin-based oxide, zinc oxide, and the like. The conductive metal is aluminum (Al), molybdenum (Mo), tungsten (W), titanium (Ti), platinum (Pt), chromium (Cr), silicon (Si), gold (Au), nickel (Ni), copper It may include at least one selected from (Cu), silver (Ag), indium (In), ruthenium (Ru), palladium (Pd), rhodium (Rh), iridium (Ir), osmium (Os), and the like.

In an embodiment, one of the first electrode 110 and the second electrode 120 is an active electrode formed of a metal material having a low ionization energy, such as copper (Cu), silver (Ag), or aluminum (Al). and the other one may be an inactive electrode formed of a conductive material having a higher ionization energy than a material forming the active electrode. For example, the inactive electrode may be formed of one or more metals selected from platinum (Pt), gold (Au), palladium (Pd), and the like.

The resistance change layer 130 is disposed between the first electrode 110 and the second electrode 120 , and increases according to the voltage applied to the first electrode 110 and the second electrode 120 . Resistance may be reversibly changed from a high resistance state to a low resistance state and from a low resistance state to a high resistance state.

In an embodiment, the resistance change layer 130 may be formed of an organic-inorganic halogen compound represented by the following Chemical Formula 1. For example, the organic-inorganic halogen compound of the resistance change layer 130 may have a perovskite or similar crystal structure.

[Formula 1]

In Formula 1, R may represent a +1 valent organic cation, and X may represent a halogen anion. In one embodiment, R may include C ₆ H ₅ (CH ₂ ) _n NH ₃ (n=1, 2 or 3), and X may include Br. For example, the resistance change layer 130 may be formed of (BzA) ₂ CuBr ₄ (BZA=C ₆ H ₅ CH ₂ NH ₃ ).

In an embodiment, the organic-inorganic halogen compound of the resistance change layer 130 may have a crystal structure having a layered structure in which an inorganic anion layer _{of CuX 4} ^{2- is separated by an organic cation layer.} In this case, the organic cation layer may have a double layer structure. On the other hand, in the _{case of the inorganic anion layer of CuX 4} ^2- _{, CuX 6} octahedron in which Cu ions are coordinated by 6 X ions may have a structure in which a single layer is arranged between adjacent organic cation layers, in this case, Jahn-Teller distortion may occur in the CuX _{6 octahedron.} Compared to the case in which the organic-inorganic halogen compound of the resistance change layer 130 has a 3D crystal structure, when it has a 2D layered structure, a structurally lower order is more suitable for forming a conductive filament due to anisotropic defect migration, so ON/OFF Ratio and durability can be improved.

In an embodiment, a ring-shaped first protrusion or a first depression forming a plurality of closed curves may be formed on a surface of the resistance variable layer 130 facing the active electrode. In addition, a second protrusion or a second concave portion having a different shape formed inside or outside the first protrusion or the first concavity may be further included on a surface of the resistance variable layer 130 facing the active electrode.

In one embodiment, due to the first and second protrusions or the first and second depressions, the surface facing the active electrode among the surfaces of the resistance change layer 130 is about 100 nm or more, for example, about It may have an RMS roughness of 100 nm to 140 nm. In addition, each of the first and second protrusions may have a plane width of about 700 nm to 1.2 μm. The surface morphology of the resistance change layer 130 may significantly improve I-V characteristics and durability of the memristor device.

The memristor device 100 according to an embodiment of the present invention may further include a PMMA thin film 140 positioned between the resistance change layer 130 and the active electrode and coating the surface of the resistance change layer 130 . have.

In one embodiment, the PMMA thin film 140 is caused by the process of forming the upper electrode on the resistance change layer 130 or the resistance change layer 130 caused by a chemical reaction between oxygen and moisture in the atmosphere. ) to prevent damage to organic/inorganic halogen compounds. In one embodiment, the PMMA thin film 140 may have a thickness of about 2 to 10 nm.

2 is a perspective view illustrating an information storage device according to an embodiment of the present invention.

Referring to FIG. 2 , the information storage device 1000 according to an embodiment of the present invention includes a memory cell 1100 , a selection element 1200 , a first signal line 1300 , and a second signal line 1400 . .

The memory cell 1100 may be disposed between the first signal line 1300 and the second signal line 1400 , and may be one of the first signal line 1300 and the second signal line 1400 . can be electrically connected to.

The memory cell 1100 may include a first electrode 1110 , a second electrode 1120 , and a resistance change layer 1130 . Since the memory cell 1100 is the same as the memristor device 100 described with reference to FIG. 1 , a redundant detailed description thereof will be omitted.

Meanwhile, in FIG. 2 , it is illustrated that the second electrode 1120 is electrically connected to the fourth signal line 1400 and the first electrode 1110 is electrically connected to the selection element 1200 . A first electrode 1110 may be electrically connected to the first signal line 1300 , and the second electrode 1120 may be electrically connected to the selection element 1200 .

The selection element 1200 is connected in series with one of the first signal line 1300 and the second signal line 1400 and the memory cell 1100, and is leaked from another adjacent memory cell. Suppressing a snag current prevents an effect on the sensing current of the memory cell 1100 from being affected. The selection element 1200 has a small resistance value at a sensing voltage such as read or write applied to a selected memory cell, and has a very large resistance value at a low voltage applied to an unselected memory cell. It is not particularly limited as long as it has an element, and a known selection element can be applied without limitation.

The first signal line 1300 and the second signal line 1400 may extend in a direction crossing each other. For example, the first signal line 1300 may extend in a first direction X, and the second signal line 1400 may extend in a second direction Y orthogonal to the first direction. can

Meanwhile, in FIG. 2 , the first signal line 1300 and the second signal line 1400 are electrically connected to one memory cell 1100 , but the first signal line 1300 is connected to the first signal line 1300 . It may be electrically connected to a plurality of memory cells arranged in a line along the second direction (Y), and the second signal line 1400 is connected to a plurality of other memory cells arranged in a line along the first direction (X). can be electrically connected.

According to the memristor device and information storage device of the present invention, the resistance change layer is an organic-inorganic halogen compound having a layered structure.

and has a morphology in which a ring-shaped protrusion or depression is formed on the surface of the resistance change layer, so it has a ^{high ON/OFF ratio of about 10 8} or more, and has a multi-level information storage ability, about 0.2 to 0.5 V It may have a low driving voltage of

Hereinafter, some embodiments and comparative examples will be described in detail to help the understanding of the present invention. However, the following examples are only some embodiments of the present invention, and the scope of the present invention is not limited to the following examples.

<Example>

A memristor device according to the embodiment was manufactured through the following process.

Specifically, _{after depositing a Ti layer on a Si wafer substrate having a SiO 2} film formed on the surface, a Pt electrode having a thickness of 100 nm was deposited (Pt/Ti/SiO ₂ /Si), and then, it was mixed with detergent, ethanol, acetone and ethanol. They were washed successively with deionized water.

Before deposition of (BzA) ₂ CuBr ₄ , the cleaned substrate was further treated with UV-ozone for 30 min, followed _{by formation of a (BzA) 2} CuBr ₄ layer on the Pt electrode. To form the (BzA) ₂ CuBr _{4 layer, CuBr 2} and BzABr were dissolved in 0.2 mL of DMF and filtered using a syringe filter PTFE-H having a pore size of 0.20 μm to prepare a 0.5M precursor solution did. Then, the precursor solution was spin-coated on the substrate on which the Pt electrode was formed at 4000 rpm for 20 seconds with an acceleration of 1200 rpm/s. During the spin coating, 0.3 mL of diethyl ether was dripped into the center of the substrate within 10 seconds after spinning.

The spin coated film was annealed on a hot plate at 75° C. for 30 minutes.

Then, a PMMA solution (5 mg/mL) _{was spin-coated (4000 rpm) on the (BzA) 2} CuBr ₄ layer and annealed at 50° C. for 5 minutes to form a PMMA layer.

Then, an upper electrode (Ag or Au) having a thickness of 150 nm was formed by thermal evaporation at a deposition rate of 0.2 to 0.3 Å/s using a dot-patterned shadow mask having a diameter of 100 μm.

[Experimental example]

3 is a cross-sectional SEM image of a PMMA/(BzA) ₂ CuBr ₄ /Pt/Ti/SiO ₂ /Si device prepared according to an embodiment, and FIG. 4 is an XRD pattern for _{the (BzA) 2} CuBr _{4 layer} It is a graph, and Table 1 below is XRD data for _{the (BzA) 2} CuBr _{4 layer.}

Planes	2 theta (degree)	I/I 0	d 00l [Å]
(004)	5.71	100	15.46
(008)	11.41	5.7	7.75
(0012)	17.14	3.3	5.17
(0016)	22.91	0.1	3.88
(0020)	28.76	2.4	3.10
(0024)	34.68	1.9	2.58

Referring to FIG. 3 , the (BzA) ₂ CuBr ₄ layer was formed to a thickness of about 250 nm, and the PMMA layer is not clearly visible because it is a thin layer of several nm. _{The PMMA layer may prevent the (BzA) 2} CuBr ₄ layer from being damaged during the process of forming the upper electrode. As a result of investigating the effect of the PMMA concentration (2.5 to 10 mg/mL) on the switching characteristics and stability of the memristor device, when the PMMA film is formed using a PMMA solution having a concentration of about 4.0 to 6.0 mg/mL, It was found to show the most reliable switching behavior.

4 and Table 1, it is clearly shown that the _{deposited (BzA) 2} CuBr ₄ layer has a layered structure because of the well developed (00l) peak indicating preferential growth along the (110) plane. In order to investigate the remaining peaks except for the highest intensity peak, the expanded data is inserted in the inset of FIG. 1 . The XRD peak for the ((BzA) ₂ CuBr ₄ layer did not show overlapping of the XRD peaks of the starting materials CuBr ₂ and BzABr, indicating that the (BzA) ₂ CuBr ₄ layer had a pure (BzA) ₂ CuBr ₄ phase. .

The crystal structure of the (BzA) ₂ CuBr ₄ layer was reported to be a monoclinic structure with lattice constants of a=10.558 Å, b=10.486 Å, c=63.473 Å, α=γ=90°β=98.08°, where Layers of flat CuBr ₄ ^2- anions are separated by a bilayer of (BzA) ⁺ cations, and due to the bond distance difference between the axial and equatorial Cu-Br caused by Jahn-Teller distortion of ^{Cu 2+ -Cu-Br-} The in-plane arrangement of Cu- networks differed from the corner-sharing octahedral structures found in lead (Pb)-based perovskite.

On the other hand, the number of inorganic layers in the unit cell depends on the chain length of the organic layer _{in [C 6} H ₅ (CH2) _n NH ₃ ] ₂ CuBr _{4 .} For example, when n = 2, c = 38.042 Å and when n = 3, it has a monoclinic crystal structure of c = 39.350 Å. In particular, when n = 2, the crystal structure is (C ₂ H ₅ reported to be the same as NH ₃ )CuCl _{4 .}

Considering the c-axis lattice parameters in the XRD data listed in Table 1, the first peak with the highest intensity can be denoted by the (004) plane, and the calculated c-axis lattice parameter is about 62 Å, as previously reported value matched. Since CuBr ₄ is known to have a monoclinic structure and structural distortion is accompanied within the inorganic sheet, (BzA) ₂ CuBr ₄ cannot be simply explained by the intercalation of the host CuBr ₂ , but nevertheless, the shift of the XRD peak An intercalation process can be expected because of the lattice expansion from

In Figure 4, _{the XRD peaks of the starting material CuBr 2} powder showed only (00l) peaks at 14.32° in the case of the (001) plane and at 29.08° in the case of the (002) plane, which was 6.19 Å. The c-axis represents the lattice parameters. Since ^{the lattice expansion due to the introduction of BzA +} cations is 9.27Å (=15.46-6.19Å), and the interlayer distance is larger ^{than the molecular dimension of BzA +} cations, the organic cations located between adjacent inorganic layers are located in a double layer structure. it can be seen that

5 shows an SEM image ('a'), an AFM image ('b'), and a line profile ('c') for the AFM image showing the surface morphology of the deposited (BzA) ₂ CuBr _{4 layer.}

Referring to FIG. 5 , _{on the surface of the (BzA) 2} CuBr ₄ layer, a unique ring-shaped protrusion or depression was formed on the surface, unlike the conventionally known organic-inorganic perovskite layer having a layered structure. The RMS roughness measured from the line profile shown in Fig. 5(c) was about 120 nm. These ring morphologies are formed during crystal growth of _{the (BzA) 2} CuBr _{4 layer on the substrate.}

Figure 6a shows (a) and after (b) annealing _{of a (BzA) 2} CuBr ₄ layer formed on a Pt substrate under conditions of dripping diethyl ether antisolvent during spin coating of a precursor solution. optical microscope images, and FIG. 6b is an optical microscope image after annealing _{of a (BzA) 2} CuBr ₄ layer formed on a Pt substrate under conditions of no dripping of diethyl ether antisolvent during spin coating of the precursor solution. _{6c shows (BzA) 2} CuBr ₄ layers formed on the ITO substrate (d) and the FTO substrate (e) under conditions of dripping diethyl ether antisolvent during spin coating of the precursor solution. light microscopy images for

6A to 6C, _{except for the (BzA) 2} CuBr ₄ layer of FIG. 5B without diethyl ether antisolvent dripping, diethyl ether antisolvent dripping applied (BzA) _{In all of the 2} CuBr ₄ layers, a ring-shaped morphology was formed on the surface. From this, it was found that the application of diethyl ether antisolvent during spin coating plays an important role in forming a ring-shaped morphology on the surface of the _{(BzA) 2} CuBr _{4 layer regardless of the substrate shape.}

And referring to FIG. 6a , it can be seen that the ring shape formed on the surface of the _{(BzA) 2} CuBr ₄ layer before and after annealing under the same conditions is somewhat different. From this, it can be seen that the annealing of the (BzA) ₂ CuBr _{4 layer also slightly affects the ring shape.}

7 is a graph illustrating a current-voltage relationship measured for a memristor device according to an embodiment. 7, (a) is a current-voltage relationship during the voltage sweep of the first cycle for forming, (b) is a current-voltage relationship during the voltage sweep of 5 cycles performed after forming, (c) is the current-voltage relationship during voltage sweeps performed for 10 different devices manufactured through the same process, (d) represents the statistical resistance values of HRS and LRS obtained from the result of (c), ( e) shows HRS and LRS measured for 10 devices in (c), and (f) shows SET and RESET voltages obtained from 50 cells in one parent device.

Referring to FIG. 7 , it can be confirmed that the memristor device (Ag/PMMA/(BzA) ₂ CuBr ₄ /Pt) manufactured according to the embodiment as a whole exhibits a bipolar resistance switching behavior, from a high resistance state to a low resistance state. The change in resistance occurred in the SET process, and the opposite change occurred in the RESET process.

For the bipolar nature, the (BzA) ₂ CuBr ₄ device requires an electrical forming process during the first voltage sweep to enable stable resistive switching. ^{With a maximum applied current of 10 -3} A at an applied voltage between +0.7V and -0.7V, the electrical forming process was observed to occur at +0.5V (Fig. 7a). The same maximum applied current after the forming step. The voltage was swept by applying 0V->+0.7V->0V->-0.7V->0V with (b of FIG. 7) In addition, in the memristor device manufactured according to the embodiment, an ON/OFF ratio of ^{about 10 8 was observed.}

To investigate the reproducibility, IV curves measured for 10 different devices (same fabrication process but in different batches) showed that the resistance switching was fairly reproducible. Statistical analysis was performed using the data in (c) of FIG. 7 , where the mean HRS and LRS were evaluated to be ^{1.1×10 11} Ω and 2.2×10 ^{2 Ω, respectively.} The dots shown in (d) of FIG. 7 represent resistance values obtained from cells of each of the 10 different devices.

In addition, to prove the reproducibility of multiple cells in one device with dot-shaped Ag electrodes (see Fig. 1a) with a diameter of 100 μm, IV characteristics were measured for 50 different cells in one device. did. The average LRS and HRS values were ^{determined to be 171 Ω and 5.8×10 10} Ω, respectively ( FIG. 7 e ), indicating an average ON/OFF ratio of ^{10 8 or more.} This high ON/OFF ratio may confer multi-level storage capability for _{(BzA) 2} CuBr _{4 based memristors.}

The average SET voltage and RESET voltage were shown to be 0.21V and -0.27V, respectively (FIG. 7f), where the dots in the data represent the SET and RESET voltages of 50 cells in one device. In the reproducibility test, the resistances at HRS and LRS were read at 0.05V.

8 is a result of measuring resistance changes in HRS and LRS with respect to the area of the Ag upper electrode in the “Ag/PMMA/(BzA) ₂ CuBr _{4 /Pt” device.}

Referring to FIG. 8 , it is widely known that resistance can be changed by an electrochemical metallization mechanism (ECM) or a valence change mechanism (VCM) through a filament conduction path or an interfacial conduction path. where the filamentous conduction path defines repetitive ON/OFF switching through the formation and destruction of filaments between the electrodes, and the interfacial conduction path is associated with a change in resistance at the electrode/active material interface.

Since the resistance change was hardly observed according to the change in the diameter of the Ag electrode from 50 µm to 200 µm, it was determined that the (BzA) ₂ CuBr ₄ material mainly suffered resistance change due to filamentary conduction.

Since the multi-level storage characteristics due to the high ON/OFF ratio can improve the storage capacity, we investigated the multi-level storage capacity of _{(BzA) 2} CuBr _{4 based memristors by changing the maximum applied current.} Since the maximum applied current plays an important role in protecting the device from destruction and in controlling the growth and size of the filament in the SET process, an appropriate maximum applied current is important for stable filament formation and operation of the device. one of the elements.

9 shows the IV curve (a) measured by changing the maximum applied current at intervals of 10 ^{-1 A from 10 -5} A to 10 ^-1 A in a positive voltage sweep and the results of measuring the durability of LRS and HRS .

Referring to FIG. 9 , bipolar switching behavior was obtained at each maximum applied current, and the RESET voltages were found to gradually increase as the maximum applied current increased due to the extended filament.

And HRS and LRS were extremely stable for 20 cycles at their respective maximum applied currents except for the low maximum applied current of ^{10 −5 A.} When ^{a low maximum applied current of 10 -5} A was applied, it is judged that the HRS level appeared relatively unstable due to the presence of the unstable formed filaments and/or the incompletely broken filaments.

10 is a cycle-dependent resistance change (a) and retention time (b) of resistance values in HRS and LRS measured for an “Ag/PMMA/(BzA) ₂ CuBr _{4 /Pt” device manufactured according to an embodiment} is the measurement result.

Referring to FIG. 10 , an ON/OFF ratio of ^{about 10 8} was maintained during 2000 cycles of the switching endurance test. And while the HRS resistance of ^{10 10 Ω and the resistance of the LRS of 10 2} Ω were largely maintained during the switching cycle, there was a slight change in the resistance value of HRS, which is thought to be due to the formation of multiple filaments and/or incompletely broken filaments. do.

As a durability measurement, the retention time was measured under the same applied voltage and read voltage conditions, and as a result, HRS and LRS were ^{maintained for 10 3} s while maintaining an ON/OFF ratio of ^{10 8 .}

11A is a surface SEM image (a), IV curve (b) and durability test result (c _{) of a (BzA) 2} CuBr ₄ layer formed through annealing at 100° C. for 30 minutes using the same precursor solution as in Example; ), and FIG. 11b is a surface SEM image (a), IV curve (b) of _{a (BzA) 2} CuBr ₄ layer formed by dripping toluene as an antisolvent during spin coating but using the same precursor solution as in Example (a), IV curve (b) and durability test results (c).

Referring to FIGS. 11A and 11B together with FIGS. 5, 6A, 6B, and 6C, _{the ring shape of the (BzA) 2} CuBr ₄ layer surface is highly influenced by the formation process conditions such as anti-solvent and annealing temperature. appear.

_{The ring morphology formed on the surface of the (BzA) 2} CuBr ₄ layer formed through annealing at 100° C. for 30 minutes _{is the surface of the (BzA) 2} CuBr ₄ layer formed through annealing at 75° C. for 30 minutes shown in FIG. 5 . Although there was a slight difference from the ring shape formed in the , it was found that the IV properties and durability were significantly deteriorated.

And when the dripping anti-solvent was changed from diethyl ether to toluene, the surface morphology was further changed along with the change in the ring morphology, which further deteriorated I-V properties and durability.

From these results, it can be seen that the surface morphology of the (BzA) ₂ CuBr _{4 layer greatly affects the performance of the memrist device.}

12 shows durability and ON/OFF ratios for Pb-free organic or inorganic halide perovskite materials.

Referring to FIG. 12 , it can be seen that (BzA) ₂ CuBr ₄ according to the present invention has both ON/OFF ratio and durability higher than that of other materials.

13 is a result of measuring the influence of the Au electrode on the IV characteristics of the (BzA) ₂ CuBr _{4 based memristor device.}

Referring to FIG. 13 , IV analysis was performed to understand the resistance switching mechanism of _{(BzA) 2} CuBr _{4 .} As previously described, there are typically two types of conduction mechanisms for bipolar switching modes: an electrochemical metallization mechanism (ECM) and a valence change mechanism (VCM).

In the case of ECM, the resistance change is caused by conductive filaments formed by electrochemically active metal electrodes such as Ag and Cu. When an electric field is applied to the cell, the electrochemically active metal on the top electrode is oxidized, which migrates toward the bottom inert electrode (Pt, Au, etc.), where the metal cations are reduced to form conductive filaments in the active layer. VCM is defined as a conduction mechanism operated by migration of voids or defects such as halide voids in the active layer. In this respect, the switching operation is influenced not only by the insulating material but also by the electrode material.

To analyze the dominant switching mode in (BzA) ₂ CuBr ₄ based memristor devices, since ECM is generally not favored within Au electrodes, the influence of the electrodes (Ag and Au) was first investigated, resulting in ±4.0 V No resistance switching properties were observed for the electrochemically inert Au electrode even at high applied voltages, indicating that the conductive filaments are predominantly formed by ECM in the presence of active Ag electrodes. That is, oxidation of Ag from the Ag electrode and formation of metallic filaments at the opposite electrode occur when a positive voltage is applied.

14 is a log scale IV characteristic in HRS and LRS (a), IV characteristic in LRS (b) and HRS for a memristor device according to the embodiment;

In accordance

shows the change characteristics of

Referring to a of FIG. 14 , it can be seen that current and voltage in LRS and HRS are related.

Referring to FIG. 14B , the data fitted from the LRS shows that the current and the voltage have a linear relationship with a slope of 0.98 (close to 1). This clearly shows ohmic conduction because the current is proportional to the voltage due to the metallic Ag filament formed by the applied electric field. Before the abrupt SET process, a small dependence of current on voltage was observed in HRS (OFF state) (Fig. 14a), suggesting a non-flow of internal electrical charge, such as a Schottky conduction mechanism. For clarity, in FIG. 14 c

About

, where the data were linearly fitted with a slope of 2.07, which is

go

Since it is proportional to , it represents a Schottky emission.

[Formula 1]

In Equation 1, I is the current, T is the absolute temperature,

is the effective Richardson constant, h is the Planck constant, q is the charge of the electron, k is the Boltzmann constant,

is the effective electron mass in the dielectric,

is the free electron mass,

is the Schottky barrier height,

is the optical dielectric constant,

is the magnetic permeability in vacuum, and V is the external applied voltage.

15 is IV characteristic (a) of the memristor element (Ag / PMMA / (BzA) 2 CuBr 4 / Pt) according to the embodiment measured at around the SET process HRS 298, 313, 323, 333 and 343 K, and at HRS

These are graphs showing the relationship (b).

Referring to FIG. 15 , as the temperature increased from 298K to 343K, it was shown that the resistance value in HRS decreased, which is in good agreement with the Schottky emission.

In addition, at a different bias voltage in FIG. 15B

for

The change of , from 0.05V to 0.15V at different voltages, was shown to show a linear relationship. These HRS data clearly elucidate the Schottky conduction mechanism in HRS in _{(BzA) 2} CuBr _{4 based devices.}

16 is a memristor device (Ag/PMMA) according to an embodiment stored for 14 days in a glove box in a nitrogen environment (a), under 50% relative conditions at 22° C. (b) and under conditions at 85° C. (c). IV properties for /(BzA) ₂ CuBr ₄ /Pt) are shown.

Referring to (a) of Figure 16, got a result, IV curves appear substantially similar to the initial data was measured after holding for two weeks, the memristor device according to an embodiment in a glove box filled with nitrogen, 10 ⁷ or more ON The /OFF ratio was maintained.

Referring to FIG. 16 (b), as a result of measurement after maintaining the memristor device according to the embodiment under 22° C. and 50% relative humidity conditions for 2 weeks, stability of the device in atmospheric conditions under relatively high humidity has confirmed It is determined that the slight difference in SET and RESET voltages according to aging is caused by a change in the effective electric field.

Referring to (c) of FIG. 16 , as a result of measurement after maintaining the memristor device according to the embodiment at 85° C. for 2 weeks, it was confirmed that the memristor device according to the embodiment can operate at a high temperature.

Although the above has been described with reference to the preferred embodiments of the present invention, those skilled in the art can variously modify and change the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. You will understand that you can.

[Explanation of code]

100: memristor element 110: first electrode

120: second electrode 130: resistance change layer

140: PMMA thin film

Claims (14)

1. a first electrode and a second electrode disposed to face each other; and

   and a resistance change layer disposed between the first electrode and the second electrode and formed of a crystalline organic-inorganic halogen compound represented by the following Chemical Formula 1 and having a layered structure,

   One of the first electrode and the second electrode is an active electrode including copper (Cu), silver (Ag) or aluminum (Al), and the other one is a conductive material having higher ionization energy than a material forming the active electrode. A memristor device, characterized in that it is an inactive electrode formed of:

   [Formula 1]

   

   In Formula 1, R represents a +1 valent organic cation, and X represents a halogen anion.
2. According to claim 1,

   Wherein R is C ₆ H ₅ (CH ₂ ) _n NH ₃ (n=1, 2 or 3), characterized in that it comprises a memristor device.
3. According to claim 1,

   The resistance change layer is (BzA) ₂ CuBr ₄ (BZA=C ₆ H ₅ CH ₂ NH ₃ ) A memristor device, characterized in that formed of.
4. According to claim 1,

   The crystalline organic-inorganic halogen compound has a layered structure in which an inorganic anion layer _{of CuX 4} ^{2- is separated by an organic cation layer,}

   The organic cation is characterized in that it has a double layer structure, a memristor device.
5. 5. The method of claim 4,

   The inorganic anion layer is a memristor device, characterized in that it has a structure in which Cu ions are coordinated by 6 X ions and CuX _{6 octahedrons are arranged in a single layer.}
6. According to claim 1,

   A memristor device, characterized in that a plurality of ring-shaped first protrusions or first depressions respectively forming a plurality of closed curves are formed on a first surface facing the active electrode among the surfaces of the resistance change layer.
7. According to claim 1,

   A second protrusion or a second depression formed inside or outside the first protrusion or the first depression and having a shape different from that of the first protrusion or the first depression is further formed on the first surface, memristor element.
8. 8. The method of claim 7,

   wherein the first surface has an RMS roughness of 100 nm to 140 nm.
9. A first step of forming a _{(BzA) 2} CuBr ₄ layer by spin-coating a precursor solution in which CuBr ₂ and BzABr are dissolved on a surface of a substrate on which an inert electrode is formed;

   a second step of annealing the (BzA) ₂ CuBr ₄ layer at 70 to 80°C; and

   forming an active electrode over the annealed (BzA) ₂ CuBr _{4 layer;}

   dripping diethyl ether anti-solvent onto the substrate while spin-coating the precursor solution in the first step;

   A method of manufacturing a memristor device, characterized in that a plurality of ring-shaped first protrusions or first depressions respectively forming a plurality of closed curves are formed on the surface of _{the (BzA) 2} CuBr ₄ layer formed in the first step.
10. 10. The method of claim 9,

    In the first step, on the _{surface of the (BzA) 2} CuBr ₄ layer, the first protrusion or a second protrusion formed inside or outside the first concavity and having a shape different from the first protrusion or the first concavity; or A method of manufacturing a memristor device, characterized in that a second depression is further formed.
11. 11. The method of claim 10,

    The heat-treated (BzA) ₂ CuBr ₄ surface of the layer has an RMS roughness of 100 nm to 140 nm, Method of manufacturing a memristor device.
12. a first signal line and a second signal line extending in a direction crossing each other; and

    a memory cell and a selection element disposed between the first signal line and the second signal line in an overlapping region and connected in series with each other;

    The memory cell includes a first electrode electrically connected to one of the first signal line and the second signal line, a second electrode electrically connected to the selection element, and a resistor disposed between the first electrode and the second electrode. including a layer of change,

    The resistance change layer is an information storage device, characterized in that it is formed of a crystalline organic-inorganic halogen compound represented by the following formula (1) and having a layered structure:

    [Formula 1]

    

    In Formula 1, R represents a +1 valent organic cation, and X represents a halogen anion.
13. 13. The method of claim 12,

    wherein the memory cell has a bipolar switching characteristic.
14. 13. The method of claim 12,

    and the memory cell has multilevel storage capability.

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