WO2021204749A1 - Procédé de fabrication d'une couche mixte comportant un guide d'onde en silicium et un guide d'onde en nitrure de silicium - Google Patents

Procédé de fabrication d'une couche mixte comportant un guide d'onde en silicium et un guide d'onde en nitrure de silicium Download PDF

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Publication number
WO2021204749A1
WO2021204749A1 PCT/EP2021/058847 EP2021058847W WO2021204749A1 WO 2021204749 A1 WO2021204749 A1 WO 2021204749A1 EP 2021058847 W EP2021058847 W EP 2021058847W WO 2021204749 A1 WO2021204749 A1 WO 2021204749A1
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WIPO (PCT)
Prior art keywords
silicon
waveguide
layer
silicon nitride
core
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PCT/EP2021/058847
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English (en)
French (fr)
Inventor
Stéphane MALHOUITRE
David BITAULD
Karim HASSAN
Joan RAMIREZ
Alexandre Shen
Original Assignee
Commissariat à l'Energie Atomique et aux Energies Alternatives
Thales
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Application filed by Commissariat à l'Energie Atomique et aux Energies Alternatives, Thales filed Critical Commissariat à l'Energie Atomique et aux Energies Alternatives
Priority to US17/995,875 priority Critical patent/US20230168429A1/en
Priority to EP21716431.8A priority patent/EP4133317B1/de
Publication of WO2021204749A1 publication Critical patent/WO2021204749A1/fr

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/14External cavity lasers
    • H01S5/141External cavity lasers using a wavelength selective device, e.g. a grating or etalon
    • H01S5/142External cavity lasers using a wavelength selective device, e.g. a grating or etalon which comprises an additional resonator
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13Integrated optical circuits characterised by the manufacturing method
    • G02B6/136Integrated optical circuits characterised by the manufacturing method by etching
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13Integrated optical circuits characterised by the manufacturing method
    • G02B6/132Integrated optical circuits characterised by the manufacturing method by deposition of thin films
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0206Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/021Silicon based substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0206Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0215Bonding to the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/026Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/1028Coupling to elements in the cavity, e.g. coupling to waveguides adjacent the active region, e.g. forward coupled [DFC] structures
    • H01S5/1032Coupling to elements comprising an optical axis that is not aligned with the optical axis of the active region
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035Materials
    • G02B2006/12061Silicon
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/14Mode converters

Definitions

  • a method of manufacturing a mixed layer comprising a silicon waveguide and a silicon nitride waveguide
  • the invention relates to a method of manufacturing a mixed layer comprising a first waveguide whose core is made of silicon and a second waveguide whose core is made of silicon nitride.
  • the invention also relates to:
  • silicon waveguide and "silicon nitride waveguide” denote waveguides whose cores are made, respectively, of silicon and silicon nitride.
  • the three different waveguides are made in respective layers stacked one above the other. So, to make these photonic components, you have to make a stack of at least three different layers.
  • the invention therefore aims to overcome this lack. It therefore relates to a process for manufacturing a mixed layer according to claim 1.
  • the subject of the invention is also a method of manufacturing a photonic semiconductor component III-V by implementing the above method of manufacturing a mixed layer.
  • the invention also relates to a photonic component III-V semiconductor manufactured by the above process.
  • FIG. 1 is a schematic illustration of the architecture of a semiconductor laser source
  • FIG. 2 is a schematic illustration, in top view, of an example of a filter that can be implemented in the laser source of Figure 1;
  • FIG. 3 is a schematic illustration, in vertical section, of a possible embodiment of the laser source of Figure 1;
  • FIG. 4 is a schematic illustration, in top view, of optical couplings between different waveguides of the laser source of Figure 3;
  • FIGS. 5 to 10 are schematic illustrations, according to different cross-sectional planes, of the optical couplings of Figure 4;
  • FIG. 11 is a flowchart of a manufacturing process of the laser source of Figure 3;
  • FIGS. 12 to 26 are schematic illustrations, in vertical section, of different states of manufacture obtained when the method of Figure 11 is implemented;
  • FIG. 27 is a flowchart of a method of manufacturing a mixed layer that can be implemented to make the laser source of Figure 3;
  • Figures 28 and 29 are schematic representations, in vertical section, of two manufacturing states obtained when the method of Figure 27 is implemented;
  • FIG. 30 is a flowchart of another method of manufacturing a mixed layer that can be implemented to manufacture the laser source of Figure 3;
  • FIGS. 31 to 33 are schematic illustrations, in vertical section, of different states of manufacture obtained when the method of Figure 30 is implemented;
  • FIG. 34 is a schematic illustration, in top view, of another embodiment of an optical coupler between a silicon waveguide and a silicon nitride waveguide;
  • FIG. 35 is a schematic illustration, in vertical section, of the optical coupler of Figure 34.
  • the effective propagation index of a waveguide depends on the dimensions of the core of this waveguide and on the materials forming this core and the cladding of this waveguide. It can be determined experimentally or by numerical simulation.
  • the sheath of a waveguide is generally made of dielectric material.
  • the dielectric material is a dielectric material whose index n md of refraction is smaller than the index n Si if the core of the waveguide is made of silicon and the index n SiN if the core is in silicon nitride, where n Si and n SiN are the refractive indices, respectively, of silicon and silicon nitride.
  • the index n md is less than or equal to 0.85 xn c or less than or equal to 0.75 xn c , where n c is the refractive index of the waveguide core.
  • solvent is meant the action of an operation of etching a material by wet or dry etching.
  • FIG 1 schematically shows the general architecture of a laser source 10 monochromatic semiconductor which emits at the wavelength A u .
  • a laser source 10 monochromatic semiconductor which emits at the wavelength A u .
  • the reader may consult patent US10270222B1 and application WO2019002763A1.
  • the laser source 10 differs from known laser sources. mainly by the arrangement of its silicon and silicon nitride waveguides.
  • the laser source 10 comprises a rear reflector 12 and a front reflector 14 which define the ends of a Fabry-Pérot cavity within which the optical signal resonates.
  • the reflector 12 has a reflectance strictly greater than that of the reflector 14.
  • the reflectors 12 and 14 are, for example, broadband reflectors.
  • reflectors 12 and 14 are reflectors such as Bragg gratings.
  • the laser source successively comprises the following photonic components going from the reflector 12 to the reflector 14:
  • a band-pass filter 22 able to select the operating wavelength A u of the laser source 10 from among different wavelengths ⁇ Rj possible inside the Fabry-Pérot cavity, this filter 22 being produced in the silicon nitride waveguide 15,
  • a coupler 24 at an inverted tip ("reverse taper" in English) which optically connects a first region of the waveguide 15 to a first region of a waveguide 25 made of silicon
  • this tuning device 16 being able to move the wavelengths ⁇ Rj as a function of an electrical control signal and by using the properties of silicon of the waveguide 25,
  • an adiabatic or evanescent coupler 26 which optically connects a second region of waveguide 25 to a first region opposite a waveguide 28 made of III-V gain material
  • a semiconductor optical amplifier 30 better known by the acronym SOA (“Semiconductor Optical Amplifier”) produced in the waveguide 28 and capable of generating and amplifying the optical signal resonant inside the cavity of Fabry- Pérot at each wavelength ⁇ Rj ,
  • an adiabatic or evanescent coupler 32 which optically connects a second region of waveguide 28 to a third region opposite waveguide 25,
  • an inverted tip coupler 34 which optically connects a fourth region of waveguide 25 to a first region of a waveguide 36 made of silicon nitride (S13N4), and
  • an adiabatic coupler is able to transfer almost all of the optical signal present in a first waveguide to a second waveguide located above or below, without reflection.
  • Such an adiabatic coupler is, for example, obtained by modifying the width of the first waveguide relative to the width of the second waveguide.
  • the width of the silicon waveguide is progressively reduced as the III-material waveguide approaches. -V.
  • the width of the silicon waveguide is for example gradually increased.
  • the waveguides made of silicon and of III-V material generally have a width such that there are areas of these waveguides facing each other where their respective effective propagation indices are equal.
  • the filter 22 is a resonant ring filter, the ring of which is formed in a waveguide 50 (FIG. 2) of Si 3 N 4 .
  • the waveguide 50 in which the ring is made is directly optically connected to two ends of the waveguide 15 by evanescent coupling. Evanescent coupling is obtained by bringing the two waveguides closer to each other.
  • the filter 22 is identical to that described in patent US10270222B1 and in application WO2019002763A1.
  • the laser source 10 also comprises a sensor 40 and an electronic circuit 42 capable of generating the electric control signal of the tuning device 16 so as to maintain in permanently a wavelength ⁇ Rj at the center of the pass band of the filter 22.
  • the sensor 40 and the circuit 42 are, for example, identical to those described in patent US10270222B1 and application WO2019002763A1.
  • the light which emerges through the reflectors 12 and 14 is then guided, for example, to a photodiode or an optical fiber.
  • a photodiode or an optical fiber For this additional optical components are used. Since these additional optical components are conventional, they are not described here in detail and, for simplicity of the figures, they are not shown either.
  • Figure 3 shows a first embodiment of the laser source 10.
  • the laser source 10 is fabricated on a silicon substrate 60, for example crystalline, which extends mainly in a horizontal plane corresponding to the plane of the substrate.
  • the laser source 10 comprises successively stacked above the substrate 60 going from bottom to top:
  • a mixed layer 66 which contains the waveguides 15 and 36 in silicon nitride and the waveguide 25 in silicon, and a layer 68 of encapsulated III-V material comprising the waveguide 28 inside which the amplifier 30 is made in this exemplary embodiment.
  • the thickness of the substrate 60 is important, that is to say greater than 100 ⁇ m or 300 ⁇ m.
  • the dielectric material of the layer 64 is typically an oxide.
  • the buried oxide is silicon oxide, with a thickness greater than 720nm, and preferably greater than 1.5pm.
  • the thickness of the layer 64 is equal to 2 ⁇ m.
  • the adiabatic couplers 26 and 32 are produced in part in the waveguide 25 and in the waveguide 28.
  • Amplifier 30 is for example identical to the amplifier described in patent US10270222B1 and application WO2019002763A1.
  • the waveguide 28 and the amplifier 30 are in the form of a stack of alternating sub-layers of wells and barriers made of ternary and / or quaternary materials.
  • the waveguide 28 and the amplifier 30 are in the form of a stack of alternating sub-layers of wells and barriers made of ternary and / or quaternary materials.
  • the waveguide 28 and the amplifier 30 are in the form of a stack of alternating sub-layers of wells and barriers made of ternary and / or quaternary materials.
  • the sublayer 70 is a sublayer of III-V doping material opposite to the upper sublayer. For example, here, it is a sub-layer doped N in InP or GaAs respectively.
  • Amplifier 30 comprises a tap 74 directly in mechanical and electrical contact with the sublayer 70.
  • the P-doped sublayer (InP or GaAs) is in mechanical and electrical contact with a tap 76. When a current greater than the Threshold current from the laser source is applied between taps 74 and 76, amplifier 30 generates and amplifies the optical signal which resonates inside the Fabry-Perot cavity.
  • the tuning device 16 is here a heater capable of heating the waveguide 25 to move the wavelengths A Rj .
  • the tuning device 16 comprises a resistor 80 electrically connected to two electrical contact sockets 82 and 84.
  • resistor 80 is separated from waveguide 25 by a distance greater than 500nm or 600nm.
  • These sockets 82 and 84 are electrically connected to a current or voltage source controlled by the electronic circuit 42 as a function of the measurements of the sensor 40.
  • the tuning device 16, the waveguide 28 and the amplifier 30 are covered with a protective envelope 90 which isolates them mechanically from the outside. Only the sockets 74, 76, 82, 84 protrude beyond the casing 90.
  • the casing 90 is made of silicon nitride or of silicon oxide or of BenzoCycloButene (BGB).
  • the path of the resonant optical signal in the laser source 10 is shown in Figure 3 by a double arrow in bold.
  • Figures 4 to 10 show the adiabatic coupling 32 and the coupling 34 in reverse tip.
  • the couplings 26 and 24 are, for example, made in the same way as, respectively, the couplings 32 and 34.
  • Figure 4 shows a top view of a portion of the waveguides 28, 25 and 36.
  • FIG 4 only the heart of the guides 25, 28 and 36 and the layer 64 on which these hearts are based are shown .
  • the sheaths of the guides 25, 28 and 36 are not shown.
  • the core boundaries of guide 25 are shown in dotted lines when obscured by guide 28 or 36.
  • FIG 4 the dotted lines A to F represent the positions, respectively, of cross sections A to F.
  • the cross sections A to F are shown, respectively, in Figures 5 to 10. More specifically, in going from left to right:
  • the cross section A is located under the guide 28 and between the couplers 26 and 32,
  • the cross section B is located substantially in the middle of the coupler 32
  • the cross section F is located between the couplers 34 and the reflector 14.
  • the silicon core of the guide 25 comprises a horizontal strip 100 and a ridge 102 superimposed on this strip 100.
  • a conformation of the guide 25 is called a “ridge waveguide” (“rib waveguide ”in English). This ridge conformation is shown in Figures 5 to 8.
  • the cross section of the strip 100 is rectangular.
  • the strip 100 therefore has a horizontal lower face directly in contact with the upper face of the layer 64 and, on the opposite side, a horizontal upper face. It also has side flanks 100g and 100d ( Figure 5). The 100g and 100d sides extend vertically.
  • the cross section of the ridge 102 is also rectangular. It has a horizontal lower face which is flush with the upper face of the strip 100 and, on the opposite side, a horizontal upper face. It also has side flanks 102g and 102d ( Figure 5) which extend vertically.
  • the side flanks 100g, 100d, 102g and 102d and the upper face of the edge 102 are encapsulated in a block 104 of silicon nitride.
  • This block 104 completely covers the lateral flanks 100g, 100d, 102g, 102d and the upper face of the ridge 102 at the locations of the cross sections A to D.
  • the cladding of the waveguide 25 is here made of silicon nitride. at least along its lateral flanks and its upper face.
  • the thin thickness of silicon nitride which covers the upper face of the guide 25 is not visible.
  • the block 104 is separated from the waveguide 28 by a thin layer 106 of dielectric material.
  • the waveguide 28 is separated from the waveguide 25 by the layer 106 and by the silicon nitride which covers the upper face of the guide 25.
  • the cross section of the edge 102 gradually widens from left to right so as to form facing areas in the guides of wave 25 and 28 whose effective propagation indices are equal.
  • the cross section of the strip 100 remains constant.
  • the waveguide 28 ends with an absorption zone 110.
  • This zone 110 is located after the coupler 32 and shaped to remove the residual fraction of the optical signal which has not been transferred, by the coupler 32, into the waveguide 25.
  • the cross section of the strip 100 gradually tapers, going from left to right, until it disappears (Figure 9: section E).
  • the lateral flanks 100g and 100d gradually approach each other until one end of the strip 100 beyond which the waveguide 25 no longer exists. and from which the guide 36 begins.
  • This narrowing in the cross section of the strip 100 forms a second pointed termination.
  • the guide 36 (Figure 10: section F) is located in the same layer 66 as the waveguide 25 and in the extension of the waveguide 25.
  • the cross section of the waveguide 36 is here rectangular. It therefore has a horizontal lower face directly in mechanical support on the upper face of the layer 64 and, on the opposite side, a horizontal upper face. This waveguide 36 is therefore located at the same level as the waveguide 25. In fact, the horizontal lower faces of the waveguides 25 and 36 are located in the same horizontal plane. Beyond the end of the strip 100, most of the optical signal has been transferred from the waveguide 25 to the waveguide 36.
  • the method begins with a phase 118 of manufacturing the mixed layer 66 on the layer 64.
  • This phase 118 begins with a step 120 of providing a stack comprising, immediately stacked on top of each other, the substrate 60, the buried oxide layer 64 and a layer 122 (FIG. 20) of monocrystalline silicon.
  • a stack is known by the acronym SOI ("Silicon On Insulator").
  • SOI Silicon On Insulator
  • the thickness of the layer 64 is generally greater than 1 ⁇ m.
  • the thickness of the layer 64 is equal to 2 ⁇ m or 3 ⁇ m.
  • the thickness of the layer 122 is smaller and generally less than 1pm.
  • the thickness of the layer 122 is equal to 500 nm.
  • the layer 122 is structured to produce the silicon core of the waveguide 25.
  • photolithography, etching and resin mask removal operations are implemented.
  • partial etching operations are implemented to thin the silicon layer 122 and leave in places only a thickness of 300 nm or 150 nm of monocrystalline silicon.
  • a total etching operation of the layer 122 makes it possible to separate the various photonic components made of monocrystalline silicon from this layer 122.
  • a sublayer 126 (Figure 21) of silicon oxide is deposited on the top of the guide. wave 25.
  • a mask 128 (FIGS. 22 and 23), for example made of hard silicon nitride or of resin, is deposited above the areas of the layer 122 which must not be etched.
  • the mask 128 is removed (FIG. 24). The state shown in FIG. 12 is then obtained.
  • a thin coating 132 ( Figures 13 and 25) of etching stop is deposited over the entire upper face.
  • the coating 132 is made of silicon nitride.
  • the thickness of the coating 132 is typically between 20 nm and 100 nm or between 20 nm and 50 nm.
  • This coating 130 covers in particular the upper face of the layer 64 exposed by the total etching carried out during step 124. It also covers the upper face of the heart of the waveguide 25.
  • Such a coating is known as English term of "liner”.
  • the state obtained after the deposition of the coating 132 is shown in FIGS. 13 and 25. To simplify FIGS. 13 to 19, the residual portions of the oxide sublayer 126 which is located under the coating 132 do not have been shown in these figures.
  • the coating 132 is deposited by plasma-assisted chemical vapor deposition, that is, by a process known by the acronym PECVD ("Plasma Enhanced Chemical Vapor Deposition").
  • PECVD Plasma-assisted Chemical Vapor Deposition
  • a step 136 of encapsulating the silicon core and then planarization is carried out.
  • a dielectric material 138 ( Figure 14) is deposited to encapsulate the silicon core.
  • this dielectric material is silicon oxide.
  • it is a silicon oxide of HDP ("high density plasma") type, or else a silicon oxide based on TEOS ("Tetraethylorthosilicate").
  • the deposited thickness of this dielectric material is greater than the maximum thickness of the structured silicon core in the previous steps. Typically this thickness is more than 1.5 times the maximum thickness of the silicon core. In addition, this thickness can be increased as a function of the thickness of dielectric material that it is desired to obtain above the silicon core.
  • the upper face is planarized by implementing a chemical mechanical polishing better known by the acronym CMP ("Chemical Mechanical Planarization").
  • CMP Chemical Mechanical Planarization
  • This planarization operation is stopped when the coating 132 located above the portions of the waveguide 25 whose thickness is equal to 500 nm are exposed.
  • the etchant used during this chemical-mechanical polishing operation is a selective etchant which dissolves the dielectric material 138 at least two or four times faster than silicon nitride.
  • a new sublayer 140 (FIGS. 14 and 26) of silicon oxide is deposited in order to obtain an upper face entirely of silicon oxide.
  • the thickness of the sub-layer 140 is chosen so as to adjust the thickness of the silicon nitride core of the waveguide 36 and the thickness of the block 104.
  • the thickness of the sub-layer. -layer 140 is chosen equal to 40 nm.
  • the encapsulated silicon layer shown in FIG. 14 is obtained.
  • it is proceeded to the production of a trench 146 ( Figure 15) at the location where the silicon nitride core of the guide 36 must be made.
  • this trench comprises an extension 148 (FIG. 15) along the heart of the waveguide 25 at the location where the block 104 of silicon nitride is to be formed. To this end, this extension 148 lays bare the lateral flanks of the heart of the waveguide 25.
  • the trench 146 and its extension 148 are produced by dry etching, through a mask, of the underlayer 140 and of the material 138.
  • the dry etching is stopped when the coating 132, located at the location of trench 146 is laid bare.
  • the etchant used is a selective etchant which dissolves silicon oxide two or four times faster than silicon nitride.
  • a layer 152 (FIG. 16) of silicon nitride is deposited over the entire outer face.
  • the thickness of the layer 152 is sufficient to completely fill the trench 146 and its extension 148.
  • the thickness of the layer 152 is greater than 600 nm.
  • the layer 152 is deposited by the PECVD process.
  • a step 160 the portions of the layer 152 deposited outside the trench 146 and its extension 148 are removed.
  • a layer 164 (FIG. 17) of silicon oxide is deposited over the entire upper face of the layer 152.
  • the thickness of the layer 164 is sufficient for completely fill in the hollows formed in the layer 152 directly above the trench 146 and its extension 148.
  • the thickness of the layer 164 is greater than 100 nm or 150 nm.
  • the layer 164 is planarized by mechanical-chemical polishing.
  • the polishing is stopped when the top face of the layer 152 is reached.
  • operation 166 is carried out like the planarization operation described with reference to step 136.
  • an outer face is obtained essentially consisting of silicon nitride and a little bit of silicon nitride.
  • silicon oxide in line with trench 146 and extension 148 is then obtained.
  • the black dots in line with trench 146 and its extension 148 represent silicon oxide residues directly above these elements.
  • a non-selective etching operation 168 is performed.
  • the etchant used dissolves silicon oxide as quickly as silicon nitride.
  • the etching speed of element B is between 0.8v A and 1.2v A and, preferably, between 0.9V and A, A lv, where v is the etch rate of the element A.
  • the operation 168 is stopped when the silicon oxide located under the layer 152 is reached. For this, the end of this non-selective etching is detected by species detection. Detection by "species detection” is better known under the English expression of “optical emission spectroscopy”.
  • This process makes it possible to identify the material present on the outer face during etching. As soon as the material identified is the dielectric material under the layer 152, the non-selective etching is stopped. However, in practice, a small thickness, of the order of 20 nm, of dielectric material located under the layer 152 is still consumed. The non-selective etching applied to the planarized face of the layer 164 makes it possible to maintain the initial flatness. Thus, at the end of the operation 168, a planar outer face on which the upper faces of the block 104 and the core of the waveguide 36 are flush with is obtained. Step 160 of removing the silicon nitride layer 152 is then completed.
  • step 160 and during a step 169 localized etching operations of the upper face of the waveguide 36 are performed. These operations are, for example, implemented to structure the reflector 14 in the waveguide 36.
  • step 170 the sublayer 106 of dielectric material is deposited on the outer face.
  • the dielectric material deposited in step 170 is silicon oxide.
  • step 170 is followed by a step 172 of planarization of the sublayer 106.
  • the thickness of the sublayer 106 is equal to 20 nm.
  • the phase 118 of manufacturing the mixed layer 66 is then completed.
  • a sticker or a substrate made of III-V gain material is directly bonded to the mixed layer 66.
  • This sticker or this substrate comprises, for example,:
  • the sticker or the substrate is structured by etching to form the heart of the waveguide 28.
  • the upper sublayers of the sticker are etched. to structure the amplifier 30.
  • the sublayer 70 is etched to finalize the structuring of the amplifier 30.
  • the resistor 80 is also manufactured.
  • FIG. 27 represents a second method of manufacturing the mixed layer 66 capable of being implemented in place of phase 118. This second method is identical to phase 118 of FIG. 11, except that:
  • step 124 is replaced by a step 200
  • Steps 160, 169, 170 and 172 are replaced by, respectively, steps 202, 215, 216 and 218.
  • Step 200 is identical to step 124, except that the thickness of the sub-layer 126 is greater than 20 nm so as to obtain a greater safety margin during the removal of the coating 132.
  • the thickness of the sublayer 126 is greater than 30 nm or 40 nm.
  • the thickness of the sublayer 126 is 40nm.
  • Step 202 begins with an operation 204 of forming a mask 206 (FIG. 28) for protection directly above the trench 146 and its extension 148.
  • This mask 206 is designed to prevent etching of the nitride. of silicon located under this mask.
  • the mask 206 is made of resin. We then obtain the state shown in Figure 28.
  • an operation 208 of non-selective etching of the silicon nitride is performed. This operation 208 is stopped when the silicon oxide located under the layer 152 is exposed. For example, this operation is performed as described in operation 168.
  • the mask 206 is removed.
  • the state shown in FIG. 29 is then obtained.
  • This protrusion 212 protrudes beyond the outer face. in silicon oxide.
  • the outer face is essentially silicon oxide, that is, the protrusion 212 covers less than 75% and typically less than 50% or less than 25% of the outer face. The rest of the outer face is silicon oxide.
  • the outer face is planarized by implementing chemical mechanical polishing to eliminate the protuberance 212.
  • the operation 214 is stopped when the underlayer 126 is reached. Operation 214 still reduces the thickness of the sublayer 126 by 20 nm. The step 202 of removing the layer 152 is then complete.
  • the sublayer 106 is deposited. This operation is for example identical to operation 170.
  • a possible operation 218 of planarization of the sub-layer 106 is carried out. Operation 218 is identical to operation 172.
  • the thickness of the deposited sublayer 106 is greater than 50 nm or 80 nm. For example, the thickness of the deposited sublayer 106 is equal to 80 nm.
  • FIG. 30 represents a third method of manufacturing the mixed layer 66 capable of being implemented in place of phase 118 in the method of FIG. 11.
  • This third method is identical to phase 118, except that it comprises, between steps 130 and 136, an additional step 230 of making a cavity under the waveguide 36.
  • the coating 132 is etched to form openings 234 ( Figure 31) in this coating 132.
  • These openings 234 extend along the location where the guide is to be made. 36.
  • these openings 234 also extend along the location where the block 104 is to be made.
  • trenches 238 passing right through the thickness of the layer 64 are made using the coating 132 as an etching mask. These trenches 238 each open onto the substrate 60. The state shown in FIG. 31 is then obtained.
  • an etching of the substrate 60 is carried out to form a cavity 242 inside the substrate 60.
  • a selective etching agent is introduced into the trenches 238.
  • This dissolving etching agent silicon two or four times faster than silicon oxide.
  • this is an anisotropic etchant, that is, an etchant which dissolves silicon at the same rate in both vertical and horizontal direction.
  • the cavity 242 extends under the location where the guide 36 and the block 104 must be made.
  • the cavity 242 also extends under the location where the guide must be made. made the coupler 34.
  • step 136 the deposition of the dielectric material 138 during step 136 covers the trenches 238.
  • step 136 the method of manufacturing the mixed layer 66 is for example identical to what has already been described with reference to FIG. 11 or 27.
  • the dotted lines in FIG. 30 indicate that the steps which follow step 136 have not been shown.
  • the cavity 242 makes it possible to move the guide 36 away from the substrate 60 and to better isolate this guide 36 from the substrate 60. This improvement in the insulation between the waveguide 36 and the substrate 60 reduces optical losses, in particular when the transverse dimensions of the guide 36 are small.
  • Figures 34 and 35 show a coupler 250 with an inverted tip capable of being used in place of the coupler 34.
  • the dotted line G on the Figure 34 shows the location of the cross section G of the coupler 250.
  • Figure 35 shows the cross section G.
  • the coupler 250 is identical to the coupler 34, except that the tip termination of the strip 100 of the waveguide 25 is replaced by a subwavelength patterned tip termination.
  • the coupler 250 comprises patterns 252 aligned one behind the other in the direction 260 of propagation of the optical signal at the wavelength A u .
  • Each pattern 252 is made of silicon and entirely encapsulated in block 104 of silicon nitride. The horizontal dimensions of these patterns are less than the wavelength Au.
  • the length of patterns 252 in direction 260 decreases as one moves away from the tip termination.
  • the cross section of each pattern 252 is for example rectangular.
  • the coupler 250 has three patterns 252.
  • the waveguide 15 can be made of silicon.
  • the waveguide 25 is possible.
  • edge 102 is omitted.
  • the conformation of the waveguide 25 is called a "slab waveguide".
  • the coupler 34 has a single point termination, that is to say that made by narrowing the cross section of the strip 100.
  • the upper face of the ridge 102 is flush with the upper face of the block 104.
  • the sheath of the waveguide 25 is not necessarily made of silicon nitride. It can also be made of silicon oxide, for example. In this case, the block 104 of silicon nitride is omitted in the portion of the guide 25 located before the coupler 34. The dielectric material located between the waveguides 28 and 25 then has no thickness of silicon nitride.
  • the couplers 26 and 32 can be made differently.
  • the tip termination can be produced in the guide 25 and / or in the guide 28.
  • Other embodiments of the couplers 24 and 34 are possible.
  • these couplers are not necessarily made using an inverted tip transition.
  • the cross section of the waveguide 25 is small, i.e. typically less than 100nm x 100nm, then optical coupling known by the term "butt coupling" can be used. be implemented.
  • the cladding of the waveguide 25 is generally made entirely from a dielectric material other than silicon nitride, such as silicon oxide.
  • the filter 22 is produced in the waveguide 25 of silicon.
  • the laser source has been described in the particular case where it is a DBR ("Distributed Bragg Reflector") laser source.
  • a mixed layer such as mixed layer 66 can also be used to produce a DFB (“Distributed FeedBack”) laser source.
  • the silicon nitride waveguide is also located in the extension of the silicon waveguide produced under the waveguide of III-V material.
  • the Bragg grating is produced in the silicon waveguide or in a silicon nitride sublayer interposed between the silicon waveguide and the III-V material waveguide.
  • the layer 122 can also be made of amorphous silicon.
  • Other embodiments of step 124 of structuring the silicon core are possible.
  • the silicon oxide sublayer 126 can be omitted.
  • the structuring of the silicon core can also include operations of localized increase or by growth of monocrystalline silicon or by deposition of amorphous silicon, or by deposition of amorphous silicon followed by recrystallization by heat treatment to locally increase the thickness of the silicon core.
  • the initial thickness of the single crystal silicon layer 122 can be reduced.
  • the initial thickness of the layer 122 is then 300 nm.
  • the etching stop coating 132 can be made from materials other than silicon nitride.
  • it can be made from Al 2 0 3 or Hf0 2 .
  • the lower face of the guide 36 is located at a level slightly above the lower face of the guide 25. Typically, the height difference between these two lower faces remains less than 100 nm and, generally, less than. 50 nm.
  • a material other than silicon oxide can be used from the moment when this material can be planarized and then etched as described during operations 166 and 168.
  • the chemical-mechanical polishing of the silicon oxide layer can also be stopped before reaching the silicon nitride layer 152.
  • a residual layer of silicon oxide which completely covers the layer 152 of nitride. silicon. Then, this residual layer is completely removed during the non-selective etching operation 168.
  • the non-selective etching operation 168 is continued until the coating 132 or the sub-layer 126 is reached. In this case, at least part or all of the coating 132 of silicon nitride is also eliminated.
  • a dielectric material other than silicon oxide can be deposited to form the sublayer 106.
  • this other material is then chosen to allow good direct bonding of the sticker or of the substrate in III-V material.
  • step 176 instead of gluing a sticker or a substrate made of III-V gain material, it is possible to deposit this material on the mixed layer 66.
  • operation 208 The non-selective etching of the silicon nitride is stopped before reaching the sublayer 126. For example, it is stopped when the sublayer 140 is reached.
  • the phase of manufacturing a mixed layer can be implemented in methods other than a method of manufacturing a laser source.
  • the method described is also suitable for the manufacture of a mixed layer in which the silicon and silicon nitride waveguides contained in this mixed layer are not optically coupled to one another by a optical coupler such as couplers 24 and 34.
  • the optical coupling between these two waveguides can be achieved using an optical coupler, at least part of which is produced in a layer located above or below the mixed layer.
  • the methods described here also provide a mixed layer in which the silicon and silicon nitride waveguides are not optically coupled to each other. In this case, the realization of an optical coupler such as couplers 24 and 34 is omitted.
  • the method of manufacturing a mixed layer described here can be used to manufacture a mixed layer of other photonic components than a laser source.
  • this method can be used to manufacture a mixed layer comprising the electrodes of an optical modulator. It can also be used to manufacture the mixed layer of any photonic component comprising a layer of III-V material stacked on the mixed layer.
  • the methods described here can be implemented when manufacturing the following photonic components: a semiconductor optical amplifier known by the acronym SOA (Semiconductor Optical Amplifier), an electro absorption modulator known by the acronym EAM (Electro-Absorption Modulator), a photodiode.
  • SOA semiconductor optical amplifier
  • EAM Electro-Absorption Modulator
  • an SOA can be obtained from the photonic component of Figure 1 by omitting reflectors 12 and 14 and filter 22.
  • An EAM can be obtained from the component of Figure 1 by omitting reflectors 12 and 14, filter 22 and shortening the length of component 30.
  • the methods described here to manufacture the mixed layer can also be implemented for the manufacture of the following photonic components:
  • AWG Arrayed Waveguide Gratings
  • AWG multiplexer / demultiplexer which separates the amplified optical signals at different wavelengths, the AWG multiplexer / demultiplexer being produced in the silicon nitride waveguide,
  • thermo-optical coefficient (Wavemeter” in English) using the thermo-optical coefficient different from silicon nitride
  • the mixed layer may include additional waveguides made of silicon or of silicon nitride.
  • additional waveguides made of silicon or of silicon nitride.
  • one of these additional waveguides is optically connected to the output of reflector 12 or 14.
  • these photonic components and in particular the photonic components comprising a layer of III-V material stacked on the mixed layer such as the laser source 10, can be manufactured using another method of manufacturing the mixed layer 66 than those described here.
  • the embodiments of the laser source described here can be implemented independently of the methods which have been described to manufacture this mixed layer.
  • the methods of manufacturing a mixed layer described here also make it possible to obtain a greater integration density than the known methods.
  • known methods implement the transfer of a silicon nitride sticker and / or a monocrystalline silicon sticker on the layer 64.
  • a space of several hundred micrometers must necessarily exist between these.
  • the use of a stop coating makes it possible to precisely position the bottom of the trench 146 less than 100 nm from the upper face of the layer 64.
  • the coating 132 is made of silicon nitride
  • the lower faces of the silicon and silicon nitride cores are located in the same horizontal plane.

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PCT/EP2021/058847 2020-04-10 2021-04-06 Procédé de fabrication d'une couche mixte comportant un guide d'onde en silicium et un guide d'onde en nitrure de silicium WO2021204749A1 (fr)

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EP21716431.8A EP4133317B1 (de) 2020-04-10 2021-04-06 Verfahren zur herstellung einer mischschicht mit einem siliziumwellenleiter und einem siliziumnitridwellenleiter

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FR3109242A1 (fr) 2021-10-15
EP4133317A1 (de) 2023-02-15
EP4133317B1 (de) 2024-06-05
US20230168429A1 (en) 2023-06-01
FR3109242B1 (fr) 2022-03-18

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