WO2021196016A1 - Capacitor, capacitor structure, and method for fabricating capacitor - Google Patents

Capacitor, capacitor structure, and method for fabricating capacitor Download PDF

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Publication number
WO2021196016A1
WO2021196016A1 PCT/CN2020/082571 CN2020082571W WO2021196016A1 WO 2021196016 A1 WO2021196016 A1 WO 2021196016A1 CN 2020082571 W CN2020082571 W CN 2020082571W WO 2021196016 A1 WO2021196016 A1 WO 2021196016A1
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WIPO (PCT)
Prior art keywords
external electrode
conductive
layer
capacitor
wing
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PCT/CN2020/082571
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French (fr)
Chinese (zh)
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陆斌
沈健
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深圳市汇顶科技股份有限公司
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Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2020/082571 priority Critical patent/WO2021196016A1/en
Priority to CN202080001581.4A priority patent/CN113748508B/en
Publication of WO2021196016A1 publication Critical patent/WO2021196016A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

Definitions

  • This application relates to the field of capacitors, and more specifically, to a capacitor, a capacitor structure, and a manufacturing method of the capacitor.
  • Capacitors can play the role of bypassing, filtering, decoupling, etc. in the circuit, and are an indispensable part of ensuring the normal operation of the circuit.
  • MLCC Multi-layer Ceramic Capacitors
  • the present application provides a capacitor, a capacitor structure, and a method for manufacturing a capacitor.
  • a plurality of electrodes of the capacitor are arranged on the front and back sides of the capacitor, and a small-volume, high-capacitance-density double-sided capacitor can be prepared based on a multi-wing structure.
  • a capacitor including:
  • a laminated structure comprising at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer conductive layer form a structure in which the conductive layer and the dielectric layer alternate with each other;
  • At least one first external electrode and at least one second external electrode wherein the first external electrode and the second external electrode are located above the laminated structure, and the first external electrode is electrically connected to the multiple Part or all of the odd-numbered conductive layers in the conductive layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
  • At least one third external electrode and at least one fourth external electrode wherein the third external electrode and the fourth external electrode are located below the laminated structure, and the third external electrode is electrically connected to the multiple Part or all of the odd-numbered conductive layers in the conductive layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
  • the capacitor further includes:
  • a multi-wing structure wherein the laminated structure covers the multi-wing structure.
  • the multi-wing structure includes multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, the supporting structure is a hollow structure, and the wing-like structure
  • the structure is a convex structure formed by extending the outer side wall of the supporting structure along a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure.
  • part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure.
  • a part of the conductive layer in the multilayer conductive layer is conformal to the multi-wing structure, and the other part of the conductive layer is complementary in shape to the multi-wing structure.
  • a single wing-like structure in the plurality of groups of wing-like structures includes a plurality of wings extending along the first direction.
  • the support structure of the plurality of support structures is provided with at least one shaft in the hollow area thereof, and the shaft is parallel to the side wall of the support structure.
  • the capacitor further includes:
  • the isolation ring is located above the outer side of the plurality of support structures, and the isolation ring is used to separate the laminated structure into two parts, an inner side and an outer side.
  • the first external electrode and the second external electrode are only Are electrically connected to the part of the laminated structure located inside the isolation ring, and the third external electrode and the fourth external electrode are only electrically connected to the part of the laminated structure located inside the isolation ring .
  • the capacitor further includes:
  • At least one first conductive via structure and at least one second conductive via structure wherein
  • the first conductive via structure is located in the isolation ring, and the second conductive via structure is located outside the isolation ring near the center of the capacitor; or, the first conductive via structure and/ Or the second conductive via structure is located outside the isolation ring near the center of the capacitor;
  • the first external electrode is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure
  • the second external electrode is electrically connected to the at least one second conductive layer through the at least one second conductive layer. Part or all of the even-numbered conductive layers in the multilayer conductive layers to which the via structure is electrically connected.
  • the capacitor further includes a ring structure located outside the plurality of support structures and the plurality of sets of wing-shaped structures.
  • the ring structure is formed by alternately stacking multiple layers of the first material and multiple layers of the second material.
  • the plurality of wing-shaped structures and the plurality of supporting structures are formed of the first material.
  • the multi-wing structure is made of a conductive material, and the second external electrode is electrically connected to the multi-wing structure.
  • the multi-wing structure includes a main body material and a conductive layer or area on the surface of the main body material, and the second external electrode is electrically connected to the main body material and the conductive layer or area on the surface of the main body material. The electrical connection of the multi-wing structure.
  • the multi-wing structure is formed of a material with a resistivity less than a threshold value, or a heavily doped conductive layer or a heavily doped conductive region is formed on the surface of the multi-wing structure.
  • the capacitor further includes a filling structure that covers the laminated structure and fills the gap formed by the laminated structure.
  • the capacitor further includes: a substrate disposed under the multi-wing structure.
  • the wing-shaped structure in contact with the substrate in the plurality of groups of wing-shaped structures has a discontinuous area between different support structures.
  • the substrate forms a substrate trench at the discontinuous region, and the stacked structure is further disposed in the substrate trench.
  • the support structure penetrates the substrate, so that the lower surface of the substrate exposes the laminated structure.
  • the third external electrode and/or the fourth external electrode are electrically connected to a region of the multilayer conductive layer located in the support structure.
  • the substrate is made of a conductive material
  • the third external electrode is electrically connected to a conductive layer of the multilayer conductive layer that is in contact with the substrate through the substrate.
  • the first external electrode and/or the second external electrode are electrically connected to the conductive layer in the multilayer conductive layer through a first interconnection structure located above the multi-wing structure.
  • the first interconnection structure includes at least one first insulating layer, at least one first conductive via structure, and at least one second conductive via structure, wherein the at least one first insulating layer Located above the multi-wing structure, the first conductive via structure and the second conductive via structure penetrate the at least one first insulating layer, and the first external electrode passes through the at least one first conductive
  • the via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to the multilayer conductive layer through the at least one second conductive via structure Part or all of the even-numbered conductive layers.
  • the third external electrode and/or the fourth external electrode are electrically connected to the conductive layer in the multilayer conductive layer through a second interconnection structure located under the multi-wing structure.
  • the second interconnection structure includes at least one second insulating layer, at least one third conductive via structure, and at least one fourth conductive via structure, wherein the at least one second insulating layer Located below the multi-wing structure, the third conductive via structure and the fourth conductive via structure penetrate the at least one second insulating layer, and the third external electrode passes through the at least one third conductive
  • the via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to the multilayer conductive layer through the at least one fourth conductive via structure Part or all of the even-numbered conductive layers.
  • the capacitor further includes: a first electrode layer disposed above the laminated structure, and the first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other. A conductive region, the first conductive region forms the first external electrode, and the second conductive region forms the second external electrode.
  • the capacitor further includes: a second electrode layer disposed below the laminated structure, and the second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other.
  • the conductive layer in the multilayer conductive layer includes at least one of the following:
  • the dielectric layer in the at least one dielectric layer includes at least one of the following:
  • Silicon oxide layer silicon nitride layer, silicon oxynitride layer, metal oxide layer, metal nitride layer and metal oxynitride layer.
  • a capacitor structure including:
  • the first capacitor and the second capacitor wherein the first capacitor and the second capacitor are the capacitors in the above-mentioned first aspect and any possible implementation manner thereof, and the second capacitor is located in the first capacitor And the first external electrode of the first capacitor is electrically connected to the third external electrode of the second capacitor, and the second external electrode of the first capacitor is electrically connected to the fourth external electrode of the second capacitor. connect.
  • the capacitor structure further includes: a third capacitor, the third capacitor being the capacitor in the above-mentioned first aspect and any one of its possible implementation manners, and the third capacitor is located in the Below the first capacitor, and the third external electrode of the first capacitor is electrically connected to the first external electrode of the third capacitor, and the fourth external electrode of the first capacitor is connected to the second external electrode of the third capacitor.
  • the external electrodes are electrically connected.
  • a method for manufacturing a capacitor including:
  • a laminated structure is prepared over the substrate, the laminated structure includes at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer conductive layer form a structure in which the conductive layer and the dielectric layer alternate with each other ;
  • At least one first external electrode and at least one second external electrode are prepared, wherein the first external electrode and the second external electrode are located above the laminated structure, and the first external electrode is electrically connected to the Part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
  • At least one third external electrode and at least one fourth external electrode are prepared, wherein the third external electrode and the fourth external electrode are located below the laminated structure, and the third external electrode is electrically connected to the Part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
  • the method further includes:
  • a multi-wing structure is prepared above the substrate, and the laminated structure covers the multi-wing structure.
  • the multi-wing structure includes multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, the supporting structure is a hollow structure, and the wing-like structure
  • the structure is a convex structure formed by extending the outer side wall of the supporting structure along a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure.
  • the preparing a multi-wing structure above the substrate includes:
  • a multi-layer structure is prepared over the substrate, the multi-layer structure includes a multi-layer first material layer and a multi-layer second material layer, the multi-layer first material layer and the multi-layer second material layer form a first material layer A structure in which a material layer and a second material layer alternate with each other, the first material and the second material are different, and the first material layer is in direct contact with the substrate;
  • the first material is deposited on the upper surface of the multilayer structure, the bottoms and inner side walls of the plurality of trenches to form a plurality of hollow columnar first structures made of the first material, as the formation of the The foundation of multiple supporting structures;
  • the substrate is thinned to form the multi-wing structure.
  • part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure.
  • a part of the conductive layer in the multilayer conductive layer is conformal to the multi-wing structure, and the other part of the conductive layer is complementary in shape to the multi-wing structure.
  • a single wing-like structure in the plurality of groups of wing-like structures includes a plurality of wings extending along the first direction.
  • the support structure of the plurality of support structures is provided with at least one shaft in the hollow area thereof, and the shaft is parallel to the side wall of the support structure.
  • the method further includes:
  • the isolation ring is located above the outer side of the plurality of support structures, and the isolation ring is used to separate the laminated structure into two parts, an inner side and an outer side, the first external electrode and the The second external electrode is only electrically connected to the part of the laminated structure located on the inner side of the isolation ring, and the third external electrode and the fourth external electrode are only electrically connected to the laminated structure located on the inner side of the isolation ring.
  • the inner part is electrically connected.
  • the method further includes:
  • At least one first conductive via structure and at least one second conductive via structure are prepared, wherein,
  • the first conductive via structure is located in the isolation ring, and the second conductive via structure is located outside the isolation ring near the center of the capacitor; or, the first conductive via structure and/ Or the second conductive via structure is located outside the isolation ring near the center of the capacitor;
  • the first external electrode is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure
  • the second external electrode is electrically connected to the at least one second conductive layer through the at least one second conductive layer. Part or all of the even-numbered conductive layers in the multilayer conductive layers to which the via structure is electrically connected.
  • the capacitor further includes a ring structure located outside the plurality of support structures and the plurality of sets of wing-shaped structures.
  • the ring structure is formed by alternately stacking multiple layers of the first material and multiple layers of the second material.
  • the multiple sets of wing-shaped structures and the multiple supporting structures are formed of the first material.
  • the multi-wing structure is made of a conductive material, and the second external electrode is electrically connected to the multi-wing structure.
  • the multi-wing structure includes a main body material and a conductive layer or area on the surface of the main body material, and the second external electrode is electrically connected to the main body material and the conductive layer or area on the surface of the main body material. The electrical connection of the multi-wing structure.
  • the multi-wing structure is formed of a material with a resistivity less than a threshold value, or a heavily doped conductive layer or a heavily doped conductive region is formed on the surface of the multi-wing structure.
  • the method further includes:
  • a filling structure is prepared, and the filling structure covers the laminated structure and fills the voids formed by the laminated structure.
  • the wing-shaped structure in contact with the substrate in the plurality of groups of wing-shaped structures has a discontinuous area between different support structures.
  • the substrate forms a substrate trench at the discontinuous region, and the stacked structure is further disposed in the substrate trench.
  • the support structure penetrates the substrate, so that the lower surface of the substrate exposes the laminated structure.
  • the third external electrode and/or the fourth external electrode are electrically connected to a region of the multilayer conductive layer located in the support structure.
  • the substrate is made of a conductive material
  • the third external electrode is electrically connected to the conductive layer in contact with the substrate in the multilayer conductive layer through the substrate.
  • the method further includes:
  • a first interconnection structure is prepared, wherein the first interconnection structure is located above the multi-wing structure, and the first external electrode and/or the second external electrode are electrically connected to the multi-wing structure through the first interconnection structure.
  • the conductive layer in the conductive layer is prepared, wherein the first interconnection structure is located above the multi-wing structure, and the first external electrode and/or the second external electrode are electrically connected to the multi-wing structure through the first interconnection structure.
  • the first interconnection structure includes at least one first insulating layer, at least one first conductive via structure, and at least one second conductive via structure, wherein the at least one first insulating layer Located above the multi-wing structure, the first conductive via structure and the second conductive via structure penetrate the at least one first insulating layer, and the first external electrode passes through the at least one first conductive
  • the via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to the multilayer conductive layer through the at least one second conductive via structure Part or all of the even-numbered conductive layers.
  • the method further includes:
  • a second interconnection structure is prepared, wherein the second interconnection structure is located below the multi-wing structure, and the third external electrode and/or the fourth external electrode are electrically connected to the multi-wing structure through the second interconnection structure.
  • the conductive layer in the conductive layer is prepared, wherein the second interconnection structure is located below the multi-wing structure, and the third external electrode and/or the fourth external electrode are electrically connected to the multi-wing structure through the second interconnection structure.
  • the second interconnection structure includes at least one second insulating layer, at least one third conductive via structure, and at least one fourth conductive via structure, wherein the at least one second insulating layer Located below the multi-wing structure, the third conductive via structure and the fourth conductive via structure penetrate the at least one second insulating layer, and the third external electrode passes through the at least one third conductive
  • the via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to the multilayer conductive layer through the at least one fourth conductive via structure Part or all of the even-numbered conductive layers.
  • the preparing at least one first external electrode and at least one second external electrode includes:
  • a first electrode layer is prepared above the laminated structure.
  • the first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other, and the first conductive region forms the first external circumstance.
  • An electrode, and the second conductive area forms the second external electrode.
  • the preparing at least one third external electrode and at least one fourth external electrode includes:
  • a second electrode layer is prepared under the multi-wing structure.
  • the second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other, and the third conductive region forms the third external circumstance.
  • An electrode, the fourth conductive area forms the fourth external electrode.
  • the multi-wing structure is used as the skeleton, and the laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and the result can be obtained with a smaller device size (capacitor chip size).
  • Capacitor chip size Larger capacitance value increases the capacitance value density of the capacitor, and multiple electrodes of the capacitor are arranged on the front and back sides of the capacitor, so that the double-sided capacitor can be prepared based on the multi-wing structure, which is convenient for the capacitors to be stacked in parallel in a vertical manner.
  • the supporting structure in the present application is a hollow structure, which can have a larger surface area
  • the wing-shaped structure in the present application is on the outer side wall of the supporting structure.
  • the formed convex structure that is, the outer side wall of the support structure is formed with wing-like supports, so as to increase the surface area of the multi-wing structure
  • the laminated structure covers the multi-wing structure, while the surface area of the multi-wing structure is increased.
  • the surface area of the laminated structure will also increase accordingly, which can further increase the capacitance density of the capacitor.
  • Fig. 1 is a schematic structural diagram of a capacitor according to an embodiment of the present application.
  • FIGS. 2 to 6 are schematic structural diagrams of the multi-wing structure included in the capacitor according to the embodiment of the present application.
  • Fig. 7 is a schematic structural diagram of another capacitor according to an embodiment of the present application.
  • Fig. 8 is a schematic structural diagram of a vertical stack of capacitors according to an embodiment of the present application.
  • Fig. 9 is a schematic structural diagram of a capacitor structure according to an embodiment of the present application.
  • Fig. 10 is a schematic flowchart of a method for manufacturing a capacitor according to an embodiment of the present application.
  • FIG. 11a to 11o are schematic diagrams of a manufacturing method of a capacitor according to an embodiment of the present application.
  • capacitors in the embodiments of the present application can perform functions such as bypassing, filtering, and decoupling in the circuit.
  • the capacitor described in the embodiment of the present application may be a 3D silicon capacitor, which is a new type of capacitor based on semiconductor wafer processing technology. Compared with traditional MLCC (multilayer ceramic capacitors), 3D silicon capacitors have the advantages of small size, high precision, high stability, and long life.
  • the basic processing flow requires processing high-aspect-ratio deep holes (Via), trenches (Trench), pillars (Pillar), wall (Wall) and other 3D structures on the wafer or substrate first, and then in the 3D structure An insulating film and a low-resistivity conductive material are deposited on the surface to make the lower electrode, the dielectric layer and the upper electrode of the capacitor in sequence.
  • this application proposes a new type of capacitor structure and manufacturing method, which can increase the capacitance density of the capacitor.
  • the capacitors in FIGS. 1 and 8 are only examples, and the multi-wing structure included in the capacitor is not limited to those shown in FIGS. 1 to 8 and can be flexibly adjusted according to actual needs.
  • the number of wing-like structures and the number of supporting structures included in the multi-wing structure are only examples, and are not limited to those shown in FIGS. 1 to 8, and can be flexibly set according to actual needs.
  • FIG. 1 is a possible structural diagram of a capacitor 100 according to an embodiment of the present application.
  • the capacitor 100 includes a laminated structure 120, at least one first external electrode 130, at least one second external electrode 140, at least one third external electrode 150 and at least one fourth external electrode 160.
  • the laminated structure 120 includes at least one dielectric layer and multiple conductive layers.
  • the at least one dielectric layer and the multiple conductive layers form a conductive layer and a dielectric layer.
  • Structures adjacent to each other; the first external electrode 130 and the second external electrode 140 are located above the laminated structure 120, and the first external electrode 130 is electrically connected to some or all of the odd-numbered layers of the multilayer conductive layer Layer, the second external electrode 140 is electrically connected to some or all of the even-numbered conductive layers in the multilayer conductive layer; the third external electrode 150 and the fourth external electrode 160 are located under the laminated structure 120, and the second external electrode 140 is The three external electrodes 150 are electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode 160 is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
  • two adjacent conductive layers in the multilayer conductive layer are electrically isolated by a dielectric layer.
  • the specific number of layers of the conductive layer and the dielectric layer can be flexibly configured according to actual needs, and only needs to satisfy the electrical isolation between two adjacent conductive layers in the multilayer conductive layer.
  • the capacitor 100 further includes a multi-wing structure 110, and the laminated structure 120 covers the multi-wing structure 110.
  • the multi-wing structure 110 includes a plurality of groups of wing-shaped structures 111 and a plurality of supporting structures 112, wherein each wing-shaped structure 111 in each group of wing-shaped structures 111 is arranged in parallel, and the
  • the supporting structure 112 is a hollow structure, and the wing-shaped structure 111 is a convex structure formed by extending the outer side wall of the supporting structure 112 in a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure 112, where the wing-shaped structure
  • the structure 111 and the supporting structure 112 are connected to each other as a whole.
  • the multiple wing-like structures 111 arranged in parallel on the outer side wall of one supporting structure 112 belong to the same group.
  • the wing-like structures 111 in each group are correspondingly arranged, and the correspondingly arranged wing-like structures 111 are located on the same horizontal plane.
  • the multi-wing structure is used as the skeleton, and the laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and it can be used in a smaller device size (capacitor chip size).
  • a larger capacitance value is obtained, the capacitance density of the capacitor is improved, and multiple electrodes of the capacitor are set on the front and back sides of the capacitor, so that the double-sided capacitor can be prepared based on the multi-wing structure, which facilitates the vertical stacking of the capacitor It is connected in parallel with other capacitors to meet different application requirements.
  • the support structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar support structure, the wing-shaped structure in the present application It is the convex structure formed on the outer side wall of the support structure, that is, the wing-like support is formed on the outer side wall of the support structure, so that the surface area of the multi-wing structure can be increased.
  • the laminated structure covers the multi-wing structure. As the surface area of the wing structure increases, the surface area of the laminated structure also increases correspondingly, which can further increase the capacitance density of the capacitor.
  • the surface area of the multi-wing structure can be understood as the area of the inner side wall of the support structure, the upper and lower surfaces and sides of the wing-like structure that can be used to attach the laminated structure.
  • the multi-wing structure 110 is a skeleton, which may not be used as a part of the capacitor itself, that is, the multi-wing structure 110 may not be limited to the material selection of the capacitor electrode material, that is, the material selection of the multi-wing structure 110 It can be more flexible, so that the preparation process of the multi-wing structure 110 can be simplified.
  • the external electrode in the embodiment of the present application may also be referred to as a pad or an external pad.
  • the supporting structure 112 of the plurality of hollow supporting structures 112 may have an annular side wall.
  • the supporting structure 112 of the plurality of hollow supporting structures 112 may have two oppositely distributed side walls.
  • the sidewall of the supporting structure 112 may form a hollow area. Since the laminated structure 120 covers the supporting structure, that is, the laminated structure 120 may be disposed in this hollow area.
  • the material of the first external electrode 130 and the second external electrode 140 may be metal, such as copper, aluminum, or the like.
  • the surfaces of the first external electrode 130 and the second external electrode 140 may be provided with low resistivity Ti, TiN, Ta, TaN layers as an adhesion layer and/or barrier layer to facilitate the first external electrode 130 And the second external electrode 140 to adhere to other structures of the capacitor, or to facilitate blocking between the first external electrode 130 and the second external electrode 140 and other structures of the capacitor; in addition, the first external electrode 140
  • the surface of the electrode 130 and the second external electrode 140 may also be provided with some metal layers, such as Ni, Pd (palladium), Au, Sn (tin), and Ag for subsequent wire bonding or welding processes.
  • the material of the third external electrode 150 and the fourth external electrode 160 may be metal, such as copper, aluminum, or the like.
  • the surface of the third external electrode 150 and the fourth external electrode 160 may be provided with low resistivity Ti, TiN, Ta, TaN layers as an adhesion layer and/or barrier layer to facilitate the third external electrode 150 And the fourth external electrode 160 are adhered to other structures of the capacitor, or to facilitate blocking between the third external electrode 150 and the fourth external electrode 160 and other structures of the capacitor; in addition, the third external electrode
  • the surface of the electrode 150 and the fourth external electrode 160 may also be provided with some metal layers, such as Ni, Pd (palladium), Au, Sn (tin), and Ag for subsequent wire bonding or welding processes.
  • the conductive layer in the multilayer conductive layer includes at least one of the following:
  • the material of the conductive layer in the multilayer conductive layer may be heavily doped polysilicon, metal silicide (silicide), carbon, conductive polymer, Al, Cu, Ni, etc.
  • Metal tantalum nitride (TaN), titanium nitride (TiN), titanium aluminum nitride (TiAlN), tantalum silicon nitride (TaSiN), tantalum carbon nitride (TaCN) and other low-resistivity compounds, or the multilayer conductive
  • the conductive layer in the layer is a combination, laminate, and composite structure of the above-mentioned materials.
  • a conductive layer in the multilayer conductive layer may be one layer or multiple stacked layers, and a certain conductive layer in the multilayer conductive layer may be a single layer formed of a single material, or it may be A composite layer formed by a variety of materials.
  • the materials and thicknesses of different conductive layers in the multilayer conductive layer may be the same or different.
  • the specific conductive material and layer thickness of the conductive layer in the multilayer conductive layer can be adjusted according to the capacitance, frequency characteristics, loss and other requirements of the capacitor.
  • the conductive layer in the multilayer conductive layer may also include some other conductive materials, which is not limited in the embodiment of the present application.
  • the dielectric layer in the at least one dielectric layer includes at least one of the following:
  • Silicon oxide layer silicon nitride layer, silicon oxynitride layer, metal oxide layer, metal nitride layer and metal oxynitride layer.
  • the material of the dielectric layer in the at least one dielectric layer may be silicon oxide, silicon nitride, silicon oxynitride, metal oxide, or metal nitrogen.
  • Compounds, metal oxynitrides For example, SiO 2 , SiN, SiON, or high-k materials, including Al 2 O 3 , HfO 2 , ZrO 2 , TiO 2 , Y 2 O 3 , La 2 O 3 , HfSiO 4 , LaAlO 3 , SrTiO 3 , LaLuO 3 and so on.
  • One dielectric layer in the at least one dielectric layer may be one layer or a plurality of stacked layers, and one dielectric layer in the at least one dielectric layer may be one material or a combination or mixture of multiple materials.
  • the materials and thicknesses of different dielectric layers in the at least one dielectric layer may be the same or different.
  • the specific insulating material and layer thickness of the dielectric layer in the at least one dielectric layer can be adjusted according to the capacitance, frequency characteristics, loss and other requirements of the capacitor.
  • the dielectric layer in the at least one dielectric layer may also include some other insulating materials, which is not limited in the embodiment of the present application.
  • the order of the at least one dielectric layer may be as follows: on the multi-wing structure 110, the distance from the multi-wing structure 110 is ascending or descending.
  • the order of the multilayer conductive layers can also be: on the multi-wing structure 110, the distance from the multi-wing structure 110 is from small to large or from large to small.
  • the sequence of the at least one dielectric layer and the multi-layer conductive layer is described by taking the order of the distance from the multi-wing structure 110 to the multi-wing structure 110 from small to large as an example.
  • the capacitor 100 further includes a substrate 170, and the substrate 170 is disposed under the multi-wing structure 110, as shown in FIG. 1.
  • the first direction may be a direction parallel to the substrate 170, or the first direction may be a direction perpendicular to the normal line of the substrate 170. That is, the support structure 112 of the plurality of support structures 112 may extend along the direction of the normal line of the substrate 170.
  • the thickness of the substrate 170 can also be flexibly set according to actual needs. For example, when the thickness of the substrate 170 is too thick to meet the requirements, the substrate 170 can be Perform thinning treatment. It is even possible to completely remove the substrate 170.
  • Fig. 1 is a cross section along the longitudinal direction of the substrate.
  • the substrate 170 may be a silicon wafer, including monocrystalline silicon, polycrystalline silicon, and amorphous silicon.
  • the substrate 170 may also be other semiconductor substrates, including silicon-on-insulator (SOI) wafers, silicon carbide (SiC), gallium nitride (GaN), and gallium arsenide (GaAs). ) And other compound semiconductor wafers of group III-V elements.
  • the substrate 170 may also be a metal plate, glass, ceramic, organic polymer, or other rigid substrate.
  • the surface of the substrate 170 may include a bonding layer, an epitaxial layer, an oxide layer, a doped layer, and the like.
  • the wing-shaped structure 111 between the different support structures 112 that is in contact with the substrate 170 is continuous, and the substrate 170 has a flat surface in the area between the different support structures 112.
  • other wing-like structures 111 between different support structures 112 may also be continuous.
  • the different support structures 112 are interrupted by an annular groove, all the wing-like structures 111 between the support structures 112 are continuous. of.
  • the wing-shaped structure 111 between the different support structures 112 that is in contact with the substrate 170 is discontinuous, and the substrate 170 is formed with a substrate trench 171 in the region between the different support structures 112 .
  • the support structure 112 may also extend into the substrate 170.
  • a single wing-like structure 111 in the plurality of groups of wing-like structures 111 may have multiple wings (also referred to as branches) extending in the first direction.
  • the support structure 112 of the plurality of support structures 112 may be provided with (have) at least one axis extending in a direction parallel to the support structure 112 in the hollow area thereof.
  • the capacitor 100 further includes an isolation ring 180, the isolation ring 180 is located above the outer side of the plurality of support structures 112, and the isolation ring 180 is used to separate the laminated structure 120
  • the first external electrode 130 and the second external electrode 140 are only electrically connected to the part of the laminated structure 120 located on the inner side of the isolation ring 180, and the third external electrode 150 and the fourth external electrode.
  • the external electrode 160 is only electrically connected to the part of the laminated structure 120 located inside the isolation ring 180, as shown in FIG. 1.
  • the isolation ring 180 is located above the ring structure 113, as shown in FIG. 1.
  • the supporting structure 112 of the plurality of supporting structures 112 penetrates the substrate 170, so that the lower surface of the substrate 170 can expose the laminated structure 120, and the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the region of the multi-layer conductive layer in the support structure 112.
  • the third external electrode 150 and the fourth external electrode 160 are electrically connected to regions of the multi-layer conductive layer respectively located in different supporting structures 112.
  • the capacitor 100 further includes: at least one first conductive via structure 201 and at least one second conductive via structure 202, wherein the first external electrode 130 passes through the at least one first conductive via structure.
  • a conductive via structure 201 is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer
  • the second external electrode 140 is electrically connected to the multilayer conductive layer through the at least one second conductive via structure 202
  • the first conductive via structure 201 is located in the isolation ring 180, and the second conductive via structure 202 is located outside the isolation ring 180 near the center of the capacitor 100.
  • the first conductive via structure 201 and/or the second conductive via structure 202 are located outside the isolation ring 180 near the center of the capacitor 100.
  • the first conductive via structure 201 and the second conductive via structure 202 are both located outside the isolation ring 180 near the center of the capacitor 100, and the first conductive via structure 201 Set in the conducting structure 181.
  • the arrangement of the isolation ring 180 can make the area of the laminated structure 120 located outside the isolation ring 180 not constitute the electrode plate of the capacitor 100, thereby avoiding the occurrence between the laminated structure 120 and the ring structure 113 at the edge of the capacitor 100. The problem of air breakdown.
  • the conductive structure 181 and the isolation ring 180 can be prepared and formed simultaneously.
  • part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure 110.
  • a part of the conductive layer in the multilayer conductive layer is conformal to the multi-wing structure 110, and the other part of the conductive layer conforms to the multi-wing structure in appearance. 110 complementary.
  • the multi-wing structure 110 includes three groups of wing-like structures 111 and three supporting structures 112.
  • the three groups of wing-like structures 111 are denoted as group 1, group 2, and group 3 from left to right.
  • Each includes 4 wing-like structures 111, among which the wing-like structure 111 in group 1 is only arranged on the outer side wall of the corresponding support structure 112, the wing-like structure 111 in group 2 is arranged around the outer side wall of the corresponding support structure 112, and in group 3
  • the wing-like structure 111 is only arranged on the outer sidewall of the corresponding support structure 112 near the left side.
  • the laminated structure 120 includes two conductive layers and one dielectric layer, such as the conductive layer 21 and the conductive layer 22 as shown in FIG. 1, and the dielectric layer 23.
  • the conductive layer 21 is in direct contact with the multi-wing structure 110, that is, the conductive layer 21 is disposed on the surface of the multi-wing structure 110 and covers the multi-wing structure 110, and the conductive layer 21 shares the same with the multi-wing structure 110.
  • the conductive layer 22 is arranged above the conductive layer 21, and the conductive layer 22 is complementary to the multi-wing structure 110 in shape; the dielectric layer 23 is arranged between the conductive layer 21 and the conductive layer 22 to connect the conductive layer 21 and the conductive layer 22 Electrically isolated, the dielectric layer 23 is also conformal to the multi-wing structure 110.
  • the conductive layer 21 in the laminated structure 120 is conformal to the multi-wing structure 110. It can be understood that the conductive layer 21 and the multi-wing structure 110 may have the same or substantially the same outline, so that the conductive layer 21 The area in contact with the multi-wing structure 110 can be covered, so that the conductive layer 21 can obtain a larger surface area based on the multi-wing structure 110, thereby increasing the capacitance density of the capacitor.
  • the dielectric layer 23 is also conformal to the multi-wing structure 110, and the dielectric layer 23 may also have the same or substantially the same contour as the multi-wing structure 110.
  • the conductive layer 22 is complementary to the multi-wing structure 110 in appearance. It can be understood that the combination of the conductive layer 22 and the multi-wing structure 110 can form a structure without internal voids or cavities, which improves the structural integrity and mechanical stability of the capacitor. .
  • the multi-wing structure 110 is made of a conductive material, and the second external electrode 140 is electrically connected to the multi-wing structure 110. That is, when the multi-wing structure 110 is conductive, the multi-wing structure 110 can also be used as an electrode plate of the capacitor 100.
  • the multi-wing structure 110 includes a main body material and a conductive layer or area on the surface of the main body material, and the second external electrode 140 passes through the conductive layer or area on the surface of the main body material and the main body material.
  • the electrical connection is with the electrical connection of the multi-wing structure 110.
  • the second external electrode 140 is also electrically connected to the multi-wing structure 110, the multi-wing structure 110 and the laminated structure 120 need to be electrically isolated, for example, the multi-wing structure 110 A dielectric layer is provided between the laminated structure 120 and the laminated structure 120.
  • the multi-wing structure 110 is conductive. It can be understood that the multi-wing structure 110 is formed of a material with a resistivity less than a threshold value, or the surface of the multi-wing structure 110 is formed with a highly doped conductive material with a resistivity less than the threshold value. Layer or conductive area.
  • the multi-wing structure 110 may be doped to form a p++-type or n++-type low-resistivity conductive layer or conductive region.
  • a low-resistivity conductive material is deposited on the surface of the multi-wing structure 110, such as using a PVD or ALD process to deposit TiN and/or TaN and/or Pt and other metals, or using a CVD process to deposit heavily doped polysilicon, metal tungsten , Carbon materials.
  • a material with a resistivity less than the threshold value can be regarded as a conductive material.
  • the multi-wing structure 110 is formed of a material with a resistivity less than a threshold, which can ensure that the multi-wing structure 110 is conductive, that is, it can be used as an electrode plate of the capacitor 100.
  • the capacitor 100 further includes: a filling structure 190 that covers the laminated structure 120 and fills the cavity or gap formed by the laminated structure 120, as shown in FIG. 1 Shown.
  • a filling structure 190 that covers the laminated structure 120 and fills the cavity or gap formed by the laminated structure 120, as shown in FIG. 1 Shown.
  • the filling structure 190 is complementary to the laminated structure 120 in shape.
  • the filling structure 190 can be structurally complementary to the laminated structure 120, and the combination of the two can form a structure with no internal voids or cavities, which improves the structural integrity and mechanical stability of the capacitor.
  • the material of the filling structure 190 may be a conductive material, such as metal tungsten, or some other materials, which is not limited in this application.
  • the filling structure 190 may also be used as an electrode plate of the capacitor 100.
  • the first external electrode 130 and/or the second external electrode 140 are electrically connected to the multi-layer conductive layer through the first interconnection structure 200 located above the multi-wing structure 110 Conductive layer.
  • the first interconnection structure 200 includes at least one first conductive via structure 201, at least one second conductive via structure 202, and at least one first insulating layer 203, wherein the first conductive via structure 201 and The second conductive via structure 202 penetrates the at least one first insulating layer 203, and the first external electrode 130 is electrically connected to some or all of the odd-numbered layers of the multilayer conductive layer through the at least one first conductive via structure 201 A conductive layer, the second external electrode 140 is electrically connected to some or all of the even-numbered conductive layers in the multilayer conductive layer through the at least one second conductive via structure 202.
  • the first interconnect structure 200 is disposed above the filling structure 190.
  • the at least one first insulating layer 203 may also be referred to as an intermetal dielectric layer (IMD) or an interlayer dielectric layer (ILD).
  • IMD intermetal dielectric layer
  • ILD interlayer dielectric layer
  • the at least one first insulating layer 203 and the isolation ring 180 have The same material, in other words, the at least one first insulating layer 203 and the isolation ring 180 can be formed in the same step.
  • the material of the at least one first insulating layer 203 may be an organic polymer material, including polyimide, Parylene, benzocyclobutene (BCB), etc.; or It is some inorganic materials, including spin-on glass (SOG), undoped silicon glass (USG), boro-silicate glass (BSG), and phospho-silicate glass (phospho-silicate glass). glass, PSG), boro-phospho-silicate glass (BPSG), Tetraethyl Orthosilicate (TEOS), silicon oxide, nitride, carbide, ceramic; it can also be the above materials A combination or stack of layers.
  • organic polymer material including polyimide, Parylene, benzocyclobutene (BCB), etc.
  • the materials of the first conductive via structure 201 and the second conductive via structure 202 can be made of low-resistivity conductive materials, such as heavily doped polysilicon, tungsten, Ti, TiN, Ta, TaN, and the like.
  • first conductive via structure 201 and the second conductive via structure 202 may be specifically determined according to the manufacturing process of the capacitor 100, which is not limited in the embodiment of the present application.
  • the at least one first external electrode 130 and the at least one second external electrode 140 are disposed above the multi-wing structure 110.
  • the capacitor 100 further includes: a first electrode layer disposed above the laminated structure 120, and the first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other.
  • the first conductive area forms the first external electrode 130
  • the second conductive area forms the second external electrode 140, as specifically shown in FIG. 1. That is, the at least one first external electrode 130 and the at least one second external electrode 140 can be formed by one etching, which reduces the etching steps.
  • the first electrode layer is disposed above the first interconnect structure 200
  • the first external electrode 130 is electrically connected to the conductive layer 21 through the first conductive via structure 201
  • the second external The electrode 140 is electrically connected to the conductive layer 22 through the second conductive via structure 202.
  • the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the multi-layer conductive layer through the second interconnection structure 210 located under the multi-wing structure 110 Conductive layer.
  • the second interconnection structure 210 includes at least one third conductive via structure 211, at least one fourth conductive via structure 212, and at least one second insulating layer 213, wherein the third conductive via structure 211 and The fourth conductive via structure 212 penetrates the at least one second insulating layer 213, and the third external electrode 150 is electrically connected to some or all of the odd-numbered layers of the multilayer conductive layer through the at least one third conductive via structure 211 A conductive layer, the fourth external electrode 160 is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer through the at least one fourth conductive via structure 212.
  • the second interconnection structure 210 is disposed under the substrate 170.
  • the at least one second insulating layer 213 may also be referred to as an intermetal dielectric layer (IMD) or an interlayer dielectric layer (ILD).
  • IMD intermetal dielectric layer
  • ILD interlayer dielectric layer
  • the material of the at least one second insulating layer 213 may be an organic polymer material, including polyimide, Parylene, benzocyclobutene (BCB), etc.; or It is some inorganic materials, including SOG, USG, BSG, PSG, BPSG, TEOS, silicon oxides, nitrides, carbides, and ceramics; it can also be a combination or laminate of the above materials.
  • the materials of the third conductive via structure 211 and the fourth conductive via structure 212 may be made of low-resistivity conductive materials, such as heavily doped polysilicon, tungsten, Ti, TiN, Ta, TaN, and the like.
  • the shape and quantity of the third conductive via structure 211 and the fourth conductive via structure 212 may be specifically determined according to the manufacturing process of the capacitor 100, which is not limited in the embodiment of the present application.
  • the at least one third external electrode 150 and the at least one fourth external electrode 160 are disposed under the multi-wing structure 110.
  • the capacitor 100 further includes: a second electrode layer disposed under the multi-wing structure 110, and the second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other.
  • the third conductive area forms the third external electrode 150
  • the fourth conductive area forms the fourth external electrode 160, as specifically shown in FIG. 1. That is, the at least one third external electrode 150 and the at least one fourth external electrode 160 can be formed by one etching, which reduces the number of etching steps.
  • the second electrode layer is disposed under the second interconnection structure 210
  • the third external electrode 150 is electrically connected to the conductive layer 21 through the third conductive via structure 211
  • the fourth external connection electrode 150 is electrically connected to the conductive layer 21 through the third conductive via structure 211
  • the electrode 160 is electrically connected to the conductive layer 22 through the fourth conductive via structure 212.
  • the multi-wing structure 110 is disposed above the substrate 170, and the multi-wing structure 110 includes three groups of wing-shaped structures 111 and three supporting structures 112, and three groups of wing-shaped structures.
  • the structure 111 is marked as group 1, group 2 and group 3 from left to right. Each group includes 4 wing-like structures 111.
  • the wing-like structure 111 in group 1 is only arranged on the outer side wall of the corresponding support structure 112 near the right side.
  • the wing-like structure 111 in the group 2 is arranged around the outer side wall of the corresponding support structure 112, and the wing-like structure 111 in the group 3 is only arranged on the outer side wall of the corresponding support structure 112 near the left side.
  • the supporting structure 112 of the three supporting structures 112 penetrates the substrate 170 so that the lower surface of the substrate 170 can expose the laminated structure 120. Thereby, the sidewall area of the supporting structure 112 can be increased, the surface area of the laminated structure 120 can be increased, and the capacitance density can be increased. At the same time, the mechanical stability of the multi-wing structure 110 can be improved.
  • the multi-wing structure 110 is disposed above the substrate 170. Similar to the embodiment shown in FIG. 2, the multi-wing structure 110 includes three groups of wing-like structures 111 And 3 supporting structures 112, the 3 groups of wing-like structures 111 are marked as group 1, group 2 and group 3 from left to right. Each group includes 4 wing-like structures 111.
  • the wing-like structures 111 in group 1 are only arranged in Corresponding to the outer side wall of the support structure 112 on the right side, the wing-like structure 111 in group 2 is arranged around the outer side wall of the corresponding support structure 112, and the wing-like structure 111 in the group 3 is only arranged on the outer side wall of the corresponding support structure 112 on the left side.
  • the main difference from the embodiment in FIG. 2 is that the wing-shaped structure 111 (that is, the bottom wing-shaped structure) in contact with the substrate 170 in different groups has a discontinuous area between the different support structures 112, and the substrate 170 forms a substrate trench 171 at the discontinuous area.
  • the laminated structure 120 can be disposed in the substrate trench 171, so that the surface area of the laminated structure 120 can be increased, the capacitance density can be increased, and the mechanical stability of the multi-wing structure 110 can be improved.
  • the capacitor 100 further includes a ring structure 113, which is located outside the plurality of support structures 112 and the plurality of sets of wing-shaped structures 111, as shown in FIGS. 1 to 3
  • the top view of the ring structure 113 may be as shown in FIG. 4.
  • the ring structure 113 can support and protect the support structure 112 to a certain extent.
  • the ring structure 113 can also form the edge area of the capacitor chip to facilitate subsequent preparation of the capacitor 100.
  • the ring structure 113 is formed by alternately stacking multiple first material layers 10 and multiple second material layers 20.
  • the ring structure 113 is formed by alternately stacking 4 layers of first material 10 and 3 layers of second material 20.
  • the multi-wing structure 110 is formed of the first material, that is, the multi-wing structure may use the same material as a certain layer of the ring structure.
  • the multi-wing structure 110 may also be formed of other materials, which is not limited in this application.
  • the first material or the second material may be silicon (including single crystal silicon, polycrystalline silicon, amorphous silicon), silicon oxide, nitride or carbide, silicon-containing glass (including undoped silicon glass) (Undoped Silicon Glass, USG), boro-silicate glass (BSG), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), aluminum ( Al), copper (Cu), nickel (Ni) and other metals, or metal nitrides, carbides, carbon, organic polymers, or a combination or laminated structure of the above materials.
  • silicon-containing glass including undoped silicon glass
  • USG boro-silicate glass
  • PSG phospho-silicate glass
  • BPSG boro-phospho-silicate glass
  • Al aluminum
  • Cu copper
  • Ni nickel
  • metal nitrides carbides, carbon, organic polymers, or a combination or laminated structure of the above materials.
  • first material and the second material are a combination of two types of materials.
  • the second material can be selectively removed.
  • the difference in the corrosion (or etching) rate of the first material and the second material is greater than 5 times. That is, in some specific environments, compared to the first material, the second material is more likely to be corroded (or etched) away.
  • the first material may be silicon
  • the second material may be silicon oxide.
  • the silicon oxide can be removed with a hydrofluoric acid solution or gas and the silicon can be retained.
  • the material of the support structure 112 and the wing-like structure 111 may be silicon, and the material between the different wing-like structures 111 in the same group may be silicon oxide, so that hydrofluoric acid solution or The gas selectively removes silicon oxide and retains silicon to form groups of wing-like structures 111.
  • the first material may be silicon oxide
  • the second material may be silicon, using KOH or NaOH or Tetra methyl ammonium Hydroxide (TMAH) solution, or xenon difluoride (XeF 2 ) gas
  • TMAH Tetra methyl ammonium Hydroxide
  • XeF 2 xenon difluoride
  • the silicon can be removed while the silicon oxide remains.
  • the material of the supporting structure 112 and the wing-like structure 111 may be silicon oxide, and the material between different wing-like structures 111 in the same group may be silicon, so that KOH or NaOH or TMAH is used.
  • the solution or xenon difluoride (XeF 2 ) gas selectively removes silicon and retains silicon oxide to form groups of wing-like structures 111.
  • the first material may be silicon oxide and the second material is silicon nitride.
  • silicon nitride can be removed relatively quickly, while silicon oxide is retained.
  • the material of the support structure 112 and the wing-like structure 111 may be silicon oxide, and the material between different wing-like structures 111 in the same group may be silicon nitride, so that hot phosphoric acid is used.
  • the solution selectively removes silicon nitride and retains silicon oxide to form groups of wing-like structures 111.
  • the stacked structure 120 may form a step structure in the upper region of the ring structure 113, so as to expose different conductive layers in the multi-layer conductive layer through different step surfaces of the step structure. . Therefore, the first external electrode 130 can be electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the step structure, and the second external electrode 140 can also be electrically connected to the multilayer conductive layer through the step structure. Part or all of the even-numbered conductive layers in the layers. In this structure, a plurality of "conductive-dielectric-conductive" basic capacitance units formed by the laminated structure 120 can be connected in parallel to form a large-capacity capacitor.
  • a single wing-like structure 111 in the plurality of groups of wing-like structures 111 includes a plurality of wings 11 (also referred to as branches) extending along the first direction.
  • the multi-wing structure 110 includes two groups of wing-like structures 111 and two supporting structures 112.
  • the supporting structure 112 is hollow columnar.
  • the two groups of wing-like structures 111 are marked as group 1 and group from left to right. 2.
  • Each group includes four wing-like structures 111 arranged in parallel along the first direction at intervals, wherein the wing-like structures 111 in group 1 and group 2 are arranged around the outer side wall of the corresponding support structure 112.
  • each of the four wing-like structures 111 in the group 1 and the group 2 includes two wings 11. That is, the arrangement of the wings 11 can further increase the surface area of the wing-like structure 111, and the laminated structure covers the multi-wing structure 110, thereby increasing the capacitance density of the capacitor.
  • the support structure 112 of the plurality of support structures 112 is provided with at least one shaft 12 in its hollow area.
  • the multi-wing structure 110 includes two groups of wing-like structures 111 and two supporting structures 112.
  • the supporting structure 112 is hollow columnar.
  • the two groups of wing-like structures 111 are denoted as group 1 and group from left to right. 2.
  • Each group includes four wing-like structures 111 arranged in parallel along the first direction at intervals, wherein the wing-like structures 111 in group 1 and group 2 are arranged around the outer side wall of the corresponding support structure 112.
  • the hollow area of each of the two supporting structures 112 is provided with two shafts 12 connecting the bottom of the supporting structure 112. That is, the arrangement of the shaft 12 can further increase the surface area of the support structure 112, and the laminated structure covers the multi-wing structure 110, thereby increasing the capacitance density of the capacitor.
  • an axial structure may also be provided on the outer side of the support structure 112, which is not limited in the present application.
  • the first external electrode 130 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer; the second external electrode 140 is electrically connected to part or all of the multilayer conductive layer Even number of conductive layers.
  • the third external electrode 150 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode 160 is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
  • the laminated structure 120 can form capacitors with different capacitances.
  • the laminated structure 120 can form capacitors with different capacitances.
  • the following takes the first external electrode 130 and the second external electrode 140 as an example for description.
  • the third external electrode 150 and the fourth external electrode 160 are equally applicable, and for the sake of brevity, details are not described herein again.
  • the capacitor 100 includes two first external electrodes and two second external electrodes
  • the two first external electrodes are respectively denoted as the first external electrode A and the first external electrode B
  • the two second external electrodes Denoted as the second external electrode C and the second external electrode D
  • the laminated structure includes 5 conductive layers and 4 dielectric layers.
  • the 5 conductive layers are respectively denoted as conductive layer 1, conductive layer 2, and conductive layer 3.
  • Conductive layer 4 and conductive layer 5 the four dielectric layers are denoted as dielectric layer 1, dielectric layer 2, dielectric layer 3, and dielectric layer 4, respectively.
  • first external electrode A is electrically connected to the conductive layer 1 and the conductive layer 3
  • first external electrode B is electrically connected to the conductive layer 1
  • second external electrode C is electrically connected
  • the second external electrode D is also electrically connected to the conductive layer 2 and the conductive layer 4.
  • the conductive Layer 1 and the conductive layer 2 form a capacitor 1
  • the capacitance value is denoted as C1
  • the conductive layer 2 and the conductive layer 3 form a capacitor 2
  • the capacitance value is denoted as C2
  • the conductive layer 3 and the conductive layer 4 form a capacitor 3
  • the capacitance The value is denoted as C3, capacitor 1
  • capacitor 2 and capacitor 3 are connected in parallel
  • the capacitor corresponding to D, the conductive layer 1 and the conductive layer 2 form a capacitor 1, the capacitance value is denoted as C1, the conductive layer 2 and the conductive layer 3 form a capacitor 2, the capacitance value is denoted as C2, the conductive layer 3 and the conductive layer Layer 4 forms a capacitor 3, the capacitance value is denoted as C3, the conductive layer 4 and the
  • the capacitors corresponding to the first external electrode A and the second external electrode D can also be formed in a similar series-parallel structure, and the capacitors corresponding to the first external electrode B and the second external electrode C can also be formed similarly.
  • the series-parallel structure will not be repeated here. Therefore, the stacked structure 120 can form capacitors with different capacitances.
  • first external electrode A is electrically connected to the conductive layer 1 and the conductive layer 5
  • first external electrode B is electrically connected to the conductive layer 3 and the conductive layer 5
  • second external electrode C is electrically connected to the conductive layer 2 and
  • the conductive layer 4 and the second external electrode D are also electrically connected to the conductive layer 4.
  • the conductive layer 1 and the conductive layer 2 form a capacitor 1
  • the capacitance value is denoted as C1
  • the conductive layer 2 and the conductive layer 4 form a capacitor 2
  • the capacitance value is denoted as C2
  • the capacitor 1 and the capacitor 2 are in parallel
  • the conductive layer 3 and the conductive layer 4 form a capacitor 3
  • the capacitance value is denoted as C3
  • the conductive layer 4 and the conductive layer 5 form
  • the first external electrode 130 is electrically connected to all odd-numbered conductive layers in the multilayer conductive layer; the second external electrode 140 is electrically connected to all even-numbered conductive layers in the multilayer conductive layer.
  • the effect of the laminated structure of increasing the capacitance density of the capacitor can be fully exerted.
  • the capacitor 100 includes two first external electrodes and two second external electrodes
  • the two first external electrodes are respectively denoted as the first external electrode A and the first external electrode B
  • the two second external electrodes Denoted as the second external electrode C and the second external electrode D
  • the laminated structure includes 5 conductive layers and 4 dielectric layers.
  • the 5 conductive layers are respectively denoted as conductive layer 1, conductive layer 2, and conductive layer 3.
  • Conductive layer 4 and conductive layer 5 the four dielectric layers are denoted as dielectric layer 1, dielectric layer 2, dielectric layer 3, and dielectric layer 4, respectively.
  • the first external electrode A is electrically connected to the conductive layer 1, the conductive layer 3 and the conductive layer 5, and the first external electrode B is electrically connected to the conductive layer 1, the conductive layer 3 and the conductive layer 5, the second The external electrode C is electrically connected to the conductive layer 2 and the conductive layer 4, and the second external electrode D is also electrically connected to the conductive layer 2 and the conductive layer 4, so the first external electrode A corresponds to the second external electrode C
  • the conductive layer 1 and the conductive layer 2 form a capacitor 1, the capacitance value is denoted as C1, the conductive layer 2 and the conductive layer 3 form a capacitor 2, the capacitance value is denoted as C2, the conductive layer 3 and the conductive layer 4 A capacitor 3 is formed, the capacitance value is denoted as C3, the conductive layer 4 and the conductive layer 5 form a capacitor 4, the capacitance value is denoted as C4, the capacitor 1, the capacitor 2, the capacitor 3 and the capacitor 4 are connected in parallel, and the equivalent capacitance i is
  • the substrate 170 is made of a conductive material
  • the third external electrode 150 is electrically connected to the conductive layer of the multilayer conductive layer that is in contact with the substrate 170 through the substrate 170 .
  • the third external electrode 150 is electrically connected to the conductive layer 21 through the substrate 170
  • the fourth external electrode 160 is electrically connected to the conductive layer 22 through the fourth conductive via structure 212.
  • the capacitor P and the capacitor Q have the same structure as the capacitor 100 shown in FIG. 1, and the capacitor P and the capacitor Q are stacked vertically, and the capacitor Q is located above the capacitor P, The external electrode located on the upper surface of the capacitor P is electrically connected to the external electrode located on the lower surface of the capacitor Q.
  • the capacitance value of the capacitor P is recorded as Cp
  • the capacitance value of the capacitor Q is recorded as Cq
  • the capacitor P and the capacitor Q are connected in parallel.
  • Figure 8 is a use method after the capacitor chip (capacitor) is prepared. It can be understood that the purpose of preparing four external electrodes is to retain the interface that can be directly combined with other independent capacitor chips to form a larger capacitance. If there are not two more external electrodes, then you need to make additional connection lines on the circuit board to connect the two capacitor chips in parallel, so that the horizontal direction occupies the area (that is, the printed circuit board (Printed Circuit Board, PCB) area) Large, vertical stacking can save PCB board area.
  • PCB printed Circuit Board
  • the multi-wing structure is used as the skeleton, and the laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and the result can be obtained with a smaller device size (capacitor chip size).
  • Capacitor chip size Larger capacitance value increases the capacitance value density of the capacitor, and multiple electrodes of the capacitor are arranged on the front and back sides of the capacitor, so that a double-sided capacitor can be prepared based on a multi-wing structure, which facilitates the vertical stacking of the capacitor with Other capacitors are connected in parallel to meet different application requirements.
  • the support structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar support structure, the wing-shaped structure in the present application It is the convex structure formed on the outer side wall of the support structure, that is, the wing-like support is formed on the outer side wall of the support structure, so that the surface area of the multi-wing structure can be increased.
  • the laminated structure covers the multi-wing structure. As the surface area of the wing structure increases, the surface area of the laminated structure also increases correspondingly, which can further increase the capacitance density of the capacitor.
  • an embodiment of the present application further provides a capacitor structure 300, the capacitor structure 300 includes: a first capacitor 310 and a second capacitor 320, the first capacitor 310 and the second capacitor 320 have the same as the above-mentioned capacitor 100 Structure, the second capacitor 320 is located above the first capacitor 310.
  • the first capacitor 310 includes an external electrode 311, an external electrode 312, an external electrode 313, and an external electrode 314, and the external electrode 311 and the external electrode 312 are located on the upper surface of the first capacitor 310, the external electrode 313 and the external electrode 313
  • the external electrode 314 is located on the bottom surface of the first capacitor 310.
  • the second capacitor 320 includes an external electrode 321, an external electrode 322, an external electrode 323, and an external electrode 324, and the external electrode 321 and the external electrode 322 are located on the upper surface of the second capacitor 320, the external electrode 323 and the external electrode 324 is located on the bottom surface of the second capacitor 320.
  • the external electrode 311 of the first capacitor 310 is electrically connected to the external electrode 323 of the second capacitor 320, and the external electrode 312 of the first capacitor 310 is electrically connected to the external electrode 324 of the second capacitor 320, as shown in FIG. 9 Shown.
  • the external electrode 311, the external electrode 312, the external electrode 313, and the external electrode 314 of the first capacitor 310 are respectively the first external electrode 130, the second external electrode 140, and the third external electrode of the capacitor 100 in FIG. 150 and the fourth external electrode 160.
  • the external electrode 321, the external electrode 322, the external electrode 323 and the external electrode 324 of the second capacitor 320 are respectively the first external electrode 130, the second external electrode 140, the third external electrode 150 and the external electrode 324 of the capacitor 100 shown in FIG. The fourth external electrode 160.
  • the capacitor structure 300 further includes: a third capacitor 330 having the same structure as the capacitor 100 described above, and the third capacitor 330 is located below the first capacitor 310.
  • the third capacitor 330 includes an external electrode 331, an external electrode 332, an external electrode 333, and an external electrode 334, and the external electrode 331 and the external electrode 332 are located on the upper surface of the third capacitor 330, the external electrode 333 and the external electrode
  • the external electrode 334 is located on the lower surface of the third capacitor 330.
  • the external electrode 313 of the first capacitor 310 is electrically connected to the external electrode 331 of the third capacitor 330
  • the external electrode 314 of the first capacitor 310 is electrically connected to the external electrode 332 of the third capacitor 330.
  • the external electrode 331, the external electrode 332, the external electrode 333, and the external electrode 334 of the third capacitor 330 are respectively the first external electrode 130, the second external electrode 140, and the third external electrode of the capacitor 100 in FIG. 150 and the fourth external electrode 160.
  • the third capacitor 330 is not shown in the figure, it can refer to the layout of the first capacitor 310 and the second capacitor 320 in FIG. 9, that is, on the basis of FIG.
  • the third capacitor 330 is also arranged under 310.
  • the capacitor structure in this application is a method of use after the capacitor chip (capacitor) is prepared. It can be understood that the purpose of preparing four external electrodes is to retain the direct combination with other independent capacitor chips to form a larger If there are no more two external electrodes for the capacitor interface, then you need to make another connection line on the circuit board to connect the two capacitor chips in parallel, so that the horizontal direction (that is, the PCB area) is large, and the vertical direction is stacked. In this case, PCB board area can be saved.
  • the capacitors according to the embodiments of the present application are described above, and the method for preparing the capacitors according to the embodiments of the present application is described below.
  • the method for preparing a capacitor of the embodiment of the present application can prepare the capacitor of the foregoing embodiment of the present application, and the following embodiment and the related description in the foregoing embodiment can be referred to each other.
  • FIG. 10 is a schematic flowchart of a method for manufacturing a capacitor in an embodiment of the present application, but these steps or operations are only examples, and the embodiment of the present application may also perform other operations or variations of each operation in FIG. 10.
  • FIG. 10 shows a schematic flowchart of a method 400 for manufacturing a capacitor according to an embodiment of the present application.
  • the manufacturing method 400 of the capacitor includes:
  • the multi-wing structure including multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, the supporting structure is a hollow structure, and the wing-like structure
  • the structure is a convex structure formed by extending the outer side wall of the supporting structure in a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure;
  • a laminated structure on the surface of the multi-wing structure the laminated structure covering the multi-wing structure, the laminated structure including at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer
  • the conductive layer forms a structure in which the conductive layer and the dielectric layer alternate with each other;
  • a capacitor as shown in FIG. 1 can be prepared, a capacitor based on a multi-wing structure as shown in FIG. 2 to FIG. 6 can also be prepared, and a capacitor as shown in FIG. The capacitor P and the capacitor Q shown in FIG. 8.
  • the capacitor structure shown in FIG. 9 can also be prepared, which is not limited in this application.
  • each material layer described in steps 410-440 refers to the surface of the material layer that is substantially parallel to the upper surface of the substrate.
  • first direction may be a direction parallel to the substrate 170, or the first direction may be a direction perpendicular to the normal line of the substrate 170.
  • the foregoing step 410 may specifically be:
  • a multi-layer structure is prepared over the substrate 170.
  • the multi-layer structure includes a multi-layer first material layer 10 and a multi-layer second material layer 20.
  • the multi-layer first material layer 10 and the multi-layer second material layer 20 form a first material layer.
  • a plurality of trenches that is, the multi-layer structure at the position of the trench is removed
  • deposit the second layer on the upper surface of the multi-layer structure, the bottom of the plurality of trenches, and the inner sidewalls.
  • a material that is, a continuous first material layer is formed on a multi-layered structure with grooves
  • a plurality of hollow columnar first structures 31 made of the first material, as the support structure 112 Basically, in this step, a plurality of first structures 31 are connected to each other, and the first structures 31 extend in a direction perpendicular to the substrate 170 and enter the substrate 170;
  • a plurality of second structures 32 in a groove shape extending in a direction perpendicular to the substrate 170 are prepared, that is, the multi-layer structure where the second structures 32 are located, including the multi-layer structure.
  • the first material deposited on the structure is removed.
  • the plurality of first structures 31 are separated by the plurality of second structures, and the second structures 32 extend to the substrate 170 along a direction perpendicular to the substrate 170.
  • the substrate 170 is thinned to form the multi-wing structure 110.
  • the deposition method of the first material and the second material mentioned above is preferably chemical vapor deposition (CVD), or spin coating, spray coating, thermal oxidation, epitaxy, physical vapor deposition (PVD), atomic layer deposition (ALD), epitaxial growth And many other processes.
  • CVD chemical vapor deposition
  • PVD physical vapor deposition
  • ALD atomic layer deposition
  • the stacked structure 120 may be formed on the multi-wing structure 110 using various processes such as thermal oxidation, atomic layer deposition (ALD), chemical vapor deposition (Chemical Vapor Deposition, CVD).
  • ALD atomic layer deposition
  • CVD chemical vapor deposition
  • the second material can be selectively removed.
  • the difference in the corrosion (or etching) rate of the first material and the second material is greater than 5 times. That is, in the same corrosion or etching environment, the corrosion (or etching) rate of the second material is at least 5 times the corrosion (or etching) rate of the first material, so it can be achieved by controlling the choice of etching material and time The second material is removed and the first material is retained.
  • part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure 110.
  • a part of the conductive layer of the multilayer conductive layer is conformal to the multi-wing structure 110, and another part of the conductive layer is complementary to the multi-wing structure 110 in shape.
  • a single wing-like structure 111 in the plurality of groups of wing-like structures 111 includes a plurality of wings 11 extending along the first direction.
  • the support structure 112 of the plurality of support structures 112 is provided with at least one shaft 12 in the hollow area thereof, and the shaft 12 is parallel to the side wall of the support structure 112.
  • the capacitor further includes: a ring structure 113 located outside the plurality of support structures 112 and the plurality of sets of wing-like structures 111.
  • the ring structure 113 is formed by alternately stacking multiple first material layers 10 and multiple second material layers 20.
  • the thickness of the first material layer 10 and the second material layer 20 can be adjusted according to the capacitance, frequency characteristics, loss and other requirements of the capacitor.
  • the multiple sets of wing-shaped structures 111 and the multiple supporting structures 112 are formed of the first material.
  • the multi-wing structure 110 is made of a conductive material, and the second external electrode 140 is electrically connected to the multi-wing structure 110.
  • the multi-wing structure 110 is formed of a material with a resistivity less than a threshold value, or a heavily doped conductive layer or a heavily doped conductive region is formed on the surface of the multi-wing structure 110.
  • the multi-wing structure 110 includes a main body material and a conductive layer or conductive area on the surface of the main body material, and the second external electrode 140 is electrically connected to the multi-wing structure 110 by being electrically connected to the conductive layer or conductive area.
  • the method 400 further includes:
  • the isolation ring 180 is prepared, wherein the isolation ring 180 is located above the outer side of the plurality of support structures 112, and the isolation ring 180 is used to separate the laminated structure 120 into two parts, an inner side and an outer side, and the first external electrode 130
  • the second external electrode 140 is only electrically connected to the part of the laminated structure 120 located inside the isolation ring 180, and the third external electrode 150 and the fourth external electrode 160 are only electrically connected to the laminated structure 120 located in the isolation ring.
  • the inner part of 180 is electrically connected.
  • the isolation ring 180 is located above the ring structure 113.
  • the method 400 further includes:
  • first conductive via structure 201 is located in the isolation ring 180, and the second conductive via structure 202 is located outside the isolation ring 180 near the center of the capacitor 100, or the first conductive via structure 201 And/or the second conductive via structure 202 is located outside the isolation ring 180 near the center of the capacitor 100;
  • the first external electrode 130 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure 201
  • the second external electrode 140 is electrically connected to the at least one second conductive via through the at least one second conductive via.
  • the method 400 further includes:
  • a filling structure 190 is prepared.
  • the filling structure 190 covers the laminated structure 120 and fills the voids formed by the laminated structure 120.
  • the wing-shaped structure 111 of the plurality of groups of wing-shaped structures 111 that is in contact with the substrate 170 has a discontinuous area between different supporting structures 112.
  • the wing-shaped structure 111 of the plurality of groups of wing-shaped structures 111 that is in contact with the substrate 170 has a discontinuous area between different support structures 112, and the substrate 170 is located at the discontinuous area.
  • a substrate trench 171 is formed, and the stacked structure 120 is further disposed in the substrate trench 171.
  • the supporting structure 112 penetrates the substrate 170 so that the lower surface of the substrate 170 exposes the laminated structure 120.
  • the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to a region of the multilayer conductive layer located in the support structure 112.
  • the substrate 170 is made of a conductive material
  • the third external electrode 150 is electrically connected to the conductive layer of the multilayer conductive layer that is in contact with the substrate 170 through the substrate 170.
  • the method 400 further includes:
  • a first interconnection structure 200 is prepared, wherein the first interconnection structure 200 is located above the multi-wing structure 110, and the first external electrode 130 and/or the second external electrode 140 are electrically connected to the multi-wing structure through the first interconnection structure 200.
  • the conductive layer in the conductive layer is prepared, wherein the first interconnection structure 200 is located above the multi-wing structure 110, and the first external electrode 130 and/or the second external electrode 140 are electrically connected to the multi-wing structure through the first interconnection structure 200.
  • the first interconnect structure 200 includes at least one first insulating layer 203, at least one first conductive via structure 201, and at least one second conductive via structure 202, wherein the at least one first insulating layer 203 is located Above the multi-wing structure 110, the first conductive via structure 201 and the second conductive via structure 202 penetrate the at least one first insulating layer 203, and the first external electrode 130 passes through the at least one first conductive via
  • the structure 201 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode 140 is electrically connected to a part or part of the multilayer conductive layer through the at least one second conductive via structure 202. All even-numbered conductive layers.
  • the at least one first insulating layer 203 may be formed by spin coating, spray coating, physical vapor deposition (PVD), chemical vapor deposition (CVD), or other processes.
  • first conductive via structure 201 and the second conductive via structure 202 can be formed by processes such as PVD, Metal-organic Chemical Vapor Deposition (MOCVD), ALD, etc. in the via.
  • processes such as PVD, Metal-organic Chemical Vapor Deposition (MOCVD), ALD, etc. in the via.
  • the method 400 further includes:
  • a second interconnection structure 210 is prepared, wherein the second interconnection structure 210 is located under the multi-wing structure 110, and the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the multi-wing structure through the second interconnection structure 210.
  • the conductive layer in the conductive layer is prepared, wherein the second interconnection structure 210 is located under the multi-wing structure 110, and the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the multi-wing structure through the second interconnection structure 210.
  • the second interconnection structure 210 includes at least one second insulating layer 213, at least one third conductive via structure 211, and at least one fourth conductive via structure 212, wherein the at least one second insulating layer 213 is located at Below the multi-wing structure 110, the third conductive via structure 211 and the fourth conductive via structure 212 penetrate the at least one second insulating layer 213, and the third external electrode 150 passes through the at least one third conductive via
  • the structure 211 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode 160 is electrically connected to a part or part of the multilayer conductive layer through the at least one fourth conductive via structure 212. All even-numbered conductive layers.
  • the at least one second insulating layer 213 may be formed by spin coating, spray coating, physical vapor deposition (PVD), chemical vapor deposition (CVD), or other processes.
  • the third conductive via structure 211 and the fourth conductive via structure 212 may be formed by using PVD, Metal-organic Chemical Vapor Deposition (MOCVD), ALD, and other processes in the via.
  • MOCVD Metal-organic Chemical Vapor Deposition
  • ALD Advanced Deposition
  • the foregoing step 430 may specifically be:
  • a first electrode layer is prepared above the laminated structure 120.
  • the first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other.
  • the first conductive region forms the first external electrode 130,
  • the second conductive area forms the second external electrode 140.
  • the first external electrode 130 and/or the second external electrode 140 may be formed by PVD, electroplating, electroless plating, and other processes.
  • the foregoing step 440 may specifically be:
  • a second electrode layer is prepared under the multi-wing structure 110.
  • the second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other.
  • the third conductive region forms the third external electrode 150
  • the fourth conductive area forms the fourth external electrode 160.
  • the third external electrode 150 and/or the fourth external electrode 160 may be formed by PVD, electroplating, electroless plating, and other processes.
  • the stacked structure 120 includes two conductive layers and one dielectric layer.
  • the above steps 410 to 440 may specifically be the preparation process shown in step a to step o (FIGS. 11a-11o), and the capacitor 100 shown in FIG. 1 may be prepared.
  • the capacitor 100 prepared based on the multi-wing structure shown in FIGS. 2 to 6 can also be prepared, and the capacitor shown in FIG. 7 and the capacitor P and the capacitor Q shown in FIG. 8 can also be prepared.
  • Step a a silicon wafer is selected as the substrate 170, and 3 layers of the first material layer 10 and 3 layers of the second material layer 20 are alternately deposited on the upper surface of the substrate 170 using a CVD process to form a multilayer structure, the first material layer 10 In direct contact with the substrate 170, as shown in FIG. 11a, for example, the first material is silicon oxide, and the second material is silicon nitride;
  • Step b spin-coating a layer of photoresist on the surface of the multilayer structure, open several gaps in the photoresist after exposure and development, and then use the photoresist as a mask, and use a dry etching process to remove uncovered photoresist
  • the film structure (the first material layer 10 and the second material layer 20), forming three first structures 31 extending along the direction perpendicular to the substrate 170 and entering the hollow columnar and/or grooved shapes of the substrate 170 , And finally remove the photoresist, as shown in Figure 11b;
  • Step c using a CVD process to deposit a first material on the upper surface of the multilayer structure, the bottom and inner sidewalls of the three first structures 31, as shown in FIG. 11c;
  • Step d using photolithography combined with a dry etching process, in the gap of the first structure 31, a hollow columnar shape and/or a groove shape extending along a direction perpendicular to the substrate 170 and extending to the upper surface of the substrate 170 are formed in the gaps of the first structure 31
  • the 2 second structures 32 as shown in Figure 11d;
  • Step e using two second structures 32 as release holes, and using a hot phosphoric acid solution as an etchant to remove the second material layer (silicon nitride) in contact with the release holes, as shown in FIG. 11e;
  • Step f using the ALD process, deposit a layer of TiN as the conductive layer 21 on the surface of the multi-wing structure 110, then deposit a layer of aluminum oxide as the dielectric layer 23, and finally deposit a layer of TiN as the conductive layer 22, as shown in FIG. 11f;
  • Step g using a CVD process to deposit silicon oxide as the filling structure 190, filling and covering the entire multi-wing structure 110, as shown in FIG. 11g; alternatively, the MOCVD process can also be used to deposit metal tungsten as the filling structure 190; of course , Step g may not be present, and directly use the conductive layer 22 in step f to fill all the gaps;
  • Step h spin-coating a layer of photoresist on the surface of the filling structure 190, open a closed ring-shaped notch of the photoresist after exposure and development, and then use a dry etching process to remove the filling material and the conductive layer 22 in the notch to expose
  • the dielectric layer 23 forms a ring-shaped trench 30 and a number of conductive trenches 35, as shown in FIG. 11h; of course, while preparing the ring-shaped trench 30, the conductive trench 35 may not be prepared;
  • Step i using a plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) process to deposit a layer of insulating material USG as the first insulating layer 203, and fill the annular trench 30 and the conduction trench 35 Full, the isolation ring 180 and the conducting structure 181 are formed respectively, as shown in FIG. 11i;
  • PECVD plasma enhanced chemical vapor deposition
  • Step j using photolithography combined with a dry etching process to prepare a plurality of first vias 40 located in the inner region of the isolation ring 180, some of the first vias 40 are located in the via structure 181 and penetrate the first insulation
  • the conductive layer 21 is exposed at the bottom of the layer 203 and the dielectric layer 23; the other first via holes 40 penetrate the first insulating layer 203 and the filling structure 170, and the conductive layer 22 is exposed at the bottom, as shown in FIG. 11j;
  • Step k using a physical vapor deposition (Physical Vapor Deposition, PVD) process to deposit a layer of TiN as a barrier layer and adhesion layer on the inner walls of the plurality of first via holes 40, and then use the MOCVD process to connect the plurality of first via holes 40 Fill metal tungsten to form a first conductive via structure 201 and a second conductive via structure 202; then, a chemical mechanical polishing (CMP) process is used to remove the excess conductive material on the surface of the first insulating layer 203; , Using the PVD process to deposit a layer of Ti/TiN and a layer of metal aluminum on the surface of the ground first insulating layer 203; finally, using photolithography combined with an etching process to pattern the Ti/TiN/Al to obtain a capacitor One first external electrode 130 and one second external electrode 140, as shown in FIG. 11k;
  • PVD Physical Vapor Deposition
  • Step 1 Turn the silicon wafer (substrate 170) over, first use a grinding wheel to thin the substrate 170 to be close to the first structure 31, and then use a plasma dry etching process to selectively remove silicon to expose the first structure The bottom of 31, as shown in Figure 11l;
  • Step m using a plasma dry etching process to selectively remove the silicon oxide at the bottom of the first structure 31 to expose the conductive layer 21, as shown in FIG. 11m;
  • Step n coating a layer of photoresist on the back of the substrate 170, after exposing and developing, opening several photoresist windows to expose part of the conductive layer 21, and using a wet etching process to remove the exposed conductive layer of the photoresist window 21. Expose the dielectric layer 23, as shown in FIG. 11n;
  • Step o depositing a layer of insulating material USG as the second insulating layer 213 on the back of the substrate 170 by using a PECVD process, and using photolithography combined with an etching process to prepare a plurality of second via holes 50, and some second via holes 50
  • the conductive layer 21 is exposed, and some of the second vias 50 expose the conductive layer 22; the plurality of second vias 50 are filled with conductive material to form a third conductive via structure 211 and a fourth conductive via
  • the structure 212 is shown in FIG.
  • a layer of Ti/TiN and a layer of metal aluminum are deposited on the surface of the second insulating layer 213 using the PVD process, and the Ti/TiN/Al is patterned using photolithography combined with an etching process , A third external electrode 150 and a fourth external electrode 160 of the capacitor are obtained, and the capacitor 100 as shown in FIG. 1 is obtained.
  • shapes of the different first structures 31 among the above three first structures 31 may be the same or different, which is not limited in this application.
  • the shapes of the different second structures 32 in the above two second structures 32 may be the same or different, which is not limited in the present application.
  • a laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and the surface area of the laminated structure can be increased.
  • a smaller device size capacitor chip size
  • a larger capacitance value can be obtained, and the capacitance density of the capacitor can be improved
  • multiple electrodes of the capacitor are set on the front and back sides of the capacitor, so that it can be prepared based on a multi-wing structure
  • Double-sided capacitors are convenient to vertically stack capacitors in parallel with other capacitors to meet different application requirements.
  • the support structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar support structure, the wing-shaped structure in the present application It is the convex structure formed on the outer side wall of the support structure, that is, the wing-like support is formed on the outer side wall of the support structure, so that the surface area of the multi-wing structure can be increased.
  • the laminated structure covers the multi-wing structure. As the surface area of the wing structure increases, the surface area of the laminated structure also increases correspondingly, which can further increase the capacitance density of the capacitor.

Abstract

A capacitor, a capacitor structure, and a method for fabricating the capacitor, which is able to prepare a capacitor that has a small volume and a high capacitance value density. The capacitor comprises: a laminated structure (120), comprising at least one dielectric layer (23) and multiple conductive layers (21/22), wherein the at least one dielectric layer (23) and the multiple conductive layers (21/22) form a structure in which the conductive layers and dielectric layers alternate with each other; at least one first external electrode (130) and at least one second external electrode (140), which are located above the laminated structure (120); and at least one third external electrode (150) and at least one fourth external electrode (160), which are located below the laminated structure (120), wherein the first external electrode (130) and the third external electrode (150) are electrically connected to part or all of odd-numbered conductive layers among the multiple conductive layers, and the second external electrode (140) and the fourth external electrode (160) are electrically connected to part or all of even-numbered conductive layers among the multiple conductive layers.

Description

电容器、电容结构、电容器的制作方法Capacitor, capacitor structure, capacitor manufacturing method 技术领域Technical field
本申请涉及电容器领域,并且更具体地,涉及一种电容器、电容结构、电容器的制作方法。This application relates to the field of capacitors, and more specifically, to a capacitor, a capacitor structure, and a manufacturing method of the capacitor.
背景技术Background technique
电容器在电路中可以起到旁路、滤波、去耦等作用,是保证电路正常运转的不可或缺的一部分。随着现代电子系统不断向多功能、高集成、低功耗、微型化发展,传统的多层陶瓷电容(Multi-layer Ceramic Capacitors,MLCC)已经难以满足应用端日益严苛的小体积、高容量的需求。如何制备小体积、高容量的电容器,成为一个亟待解决的技术问题。Capacitors can play the role of bypassing, filtering, decoupling, etc. in the circuit, and are an indispensable part of ensuring the normal operation of the circuit. With the continuous development of modern electronic systems to multi-function, high integration, low power consumption, and miniaturization, traditional Multi-layer Ceramic Capacitors (MLCC) have been unable to meet the increasingly demanding applications of small size and high capacity. Demand. How to prepare small-volume, high-capacity capacitors has become an urgent technical problem to be solved.
发明内容Summary of the invention
本申请提供一种电容器、电容结构、电容器的制作方法,在电容器的正、反两面都设置了电容器的多个电极,同时能够基于多翼结构制备小体积、高容值密度的双面电容器。The present application provides a capacitor, a capacitor structure, and a method for manufacturing a capacitor. A plurality of electrodes of the capacitor are arranged on the front and back sides of the capacitor, and a small-volume, high-capacitance-density double-sided capacitor can be prepared based on a multi-wing structure.
第一方面,提供了一种电容器,包括:In the first aspect, a capacitor is provided, including:
叠层结构,所述叠层结构包括至少一层电介质层和多层导电层,所述至少一层电介质层和所述多层导电层形成导电层与电介质层彼此交替的结构;A laminated structure, the laminated structure comprising at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer conductive layer form a structure in which the conductive layer and the dielectric layer alternate with each other;
至少一个第一外接电极和至少一个第二外接电极,其中,所述第一外接电极和所述第二外接电极位于所述叠层结构的上方,所述第一外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层;At least one first external electrode and at least one second external electrode, wherein the first external electrode and the second external electrode are located above the laminated structure, and the first external electrode is electrically connected to the multiple Part or all of the odd-numbered conductive layers in the conductive layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
至少一个第三外接电极和至少一个第四外接电极,其中,所述第三外接电极和所述第四外接电极位于所述叠层结构的下方,所述第三外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层。At least one third external electrode and at least one fourth external electrode, wherein the third external electrode and the fourth external electrode are located below the laminated structure, and the third external electrode is electrically connected to the multiple Part or all of the odd-numbered conductive layers in the conductive layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
在一些可能的实现方式中,所述电容器还包括:In some possible implementation manners, the capacitor further includes:
多翼结构,所述叠层结构包覆所述多翼结构。A multi-wing structure, wherein the laminated structure covers the multi-wing structure.
在一些可能的实现方式中,所述多翼结构包括多组翼状结构和多个支撑 结构,其中,每组翼状结构中的各个翼状结构平行设置,所述支撑结构为中空的结构,所述翼状结构为所述支撑结构的外侧壁沿第一方向延伸形成的凸起结构,所述第一方向为垂直于所述支撑结构的侧壁的方向。In some possible implementations, the multi-wing structure includes multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, the supporting structure is a hollow structure, and the wing-like structure The structure is a convex structure formed by extending the outer side wall of the supporting structure along a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure.
在一些可能的实现方式中,所述多层导电层中的部分或者全部导电层与所述多翼结构共形。In some possible implementations, part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure.
在一些可能的实现方式中,所述多层导电层中的一部分导电层与所述多翼结构共形,另一部分导电层在外形上与所述多翼结构互补。In some possible implementation manners, a part of the conductive layer in the multilayer conductive layer is conformal to the multi-wing structure, and the other part of the conductive layer is complementary in shape to the multi-wing structure.
在一些可能的实现方式中,所述多组翼状结构中的单个翼状结构包括沿着所述第一方向延伸的多个翼。In some possible implementations, a single wing-like structure in the plurality of groups of wing-like structures includes a plurality of wings extending along the first direction.
在一些可能的实现方式中,所述多个支撑结构中的支撑结构在其中空区域设置有至少一个轴,所述轴与所述支撑结构的侧壁平行。In some possible implementation manners, the support structure of the plurality of support structures is provided with at least one shaft in the hollow area thereof, and the shaft is parallel to the side wall of the support structure.
在一些可能的实现方式中,所述电容器还包括:In some possible implementation manners, the capacitor further includes:
隔离环,位于所述多个支撑结构的外侧的上方,且所述隔离环用于将所述叠层结构分隔为内侧和外侧两部分,所述第一外接电极和所述第二外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接,以及所述第三外接电极和所述第四外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接。The isolation ring is located above the outer side of the plurality of support structures, and the isolation ring is used to separate the laminated structure into two parts, an inner side and an outer side. The first external electrode and the second external electrode are only Are electrically connected to the part of the laminated structure located inside the isolation ring, and the third external electrode and the fourth external electrode are only electrically connected to the part of the laminated structure located inside the isolation ring .
在一些可能的实现方式中,所述电容器还包括:In some possible implementation manners, the capacitor further includes:
至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,At least one first conductive via structure and at least one second conductive via structure, wherein
所述第一导电通孔结构位于所述隔离环中,所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;或者,所述第一导电通孔结构和/或所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;The first conductive via structure is located in the isolation ring, and the second conductive via structure is located outside the isolation ring near the center of the capacitor; or, the first conductive via structure and/ Or the second conductive via structure is located outside the isolation ring near the center of the capacitor;
所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The first external electrode is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure, and the second external electrode is electrically connected to the at least one second conductive layer through the at least one second conductive layer. Part or all of the even-numbered conductive layers in the multilayer conductive layers to which the via structure is electrically connected.
在一些可能的实现方式中,所述电容器还包括:环状结构,所述环状结构位于所述多个支撑结构和所述多组翼状结构的外侧。In some possible implementation manners, the capacitor further includes a ring structure located outside the plurality of support structures and the plurality of sets of wing-shaped structures.
在一些可能的实现方式中,所述环状结构由多层第一材料层和多层第二材料层交替堆叠形成。In some possible implementation manners, the ring structure is formed by alternately stacking multiple layers of the first material and multiple layers of the second material.
在一些可能的实现方式中,所述多个翼状结构和所述多个支撑结构由所述第一材料形成。In some possible implementations, the plurality of wing-shaped structures and the plurality of supporting structures are formed of the first material.
在一些可能的实现方式中,所述多翼结构由导电材料制成,所述第二外接电极电连接至所述多翼结构。In some possible implementations, the multi-wing structure is made of a conductive material, and the second external electrode is electrically connected to the multi-wing structure.
在一些可能的实现方式中,所述多翼结构包括主体材料和主体材料表面的导电层或导电区域,所述第二外接电极通过与主体材料和主体材料表面的导电层或导电区域电连接与所述多翼结构的电连接。In some possible implementations, the multi-wing structure includes a main body material and a conductive layer or area on the surface of the main body material, and the second external electrode is electrically connected to the main body material and the conductive layer or area on the surface of the main body material. The electrical connection of the multi-wing structure.
在一些可能的实现方式中,所述多翼结构由电阻率小于阈值的材料形成,或者,所述多翼结构的表面形成有重掺杂的导电层或者重掺杂的导电区域。In some possible implementation manners, the multi-wing structure is formed of a material with a resistivity less than a threshold value, or a heavily doped conductive layer or a heavily doped conductive region is formed on the surface of the multi-wing structure.
在一些可能的实现方式中,所述电容器还包括:填充结构,所述填充结构包覆所述叠层结构,并填充所述叠层结构形成的空隙。In some possible implementation manners, the capacitor further includes a filling structure that covers the laminated structure and fills the gap formed by the laminated structure.
在一些可能的实现方式中,所述电容器还包括:衬底,设置于所述多翼结构的下方。In some possible implementation manners, the capacitor further includes: a substrate disposed under the multi-wing structure.
在一些可能的实现方式中,所述多组翼状结构中与所述衬底接触的翼状结构在不同的支撑结构之间存在非连续区域。In some possible implementations, the wing-shaped structure in contact with the substrate in the plurality of groups of wing-shaped structures has a discontinuous area between different support structures.
在一些可能的实现方式中,所述衬底在所述非连续区域处形成衬底沟槽,所述叠层结构进一步设置于所述衬底沟槽内。In some possible implementation manners, the substrate forms a substrate trench at the discontinuous region, and the stacked structure is further disposed in the substrate trench.
在一些可能的实现方式中,所述支撑结构贯穿所述衬底,以使所述衬底的下表面露出所述叠层结构。In some possible implementation manners, the support structure penetrates the substrate, so that the lower surface of the substrate exposes the laminated structure.
在一些可能的实现方式中,所述第三外接电极和/或所述第四外接电极电连接至所述多层导电层位于所述支撑结构中的区域。In some possible implementations, the third external electrode and/or the fourth external electrode are electrically connected to a region of the multilayer conductive layer located in the support structure.
在一些可能的实现方式中,所述衬底由导电材料制成,所述第三外接电极通过所述衬底电连接至所述多层导电层中与所述衬底接触的导电层。In some possible implementation manners, the substrate is made of a conductive material, and the third external electrode is electrically connected to a conductive layer of the multilayer conductive layer that is in contact with the substrate through the substrate.
在一些可能的实现方式中,所述第一外接电极和/或所述第二外接电极通过位于所述多翼结构上方的第一互联结构电连接至所述多层导电层中的导电层。In some possible implementations, the first external electrode and/or the second external electrode are electrically connected to the conductive layer in the multilayer conductive layer through a first interconnection structure located above the multi-wing structure.
在一些可能的实现方式中,所述第一互联结构包括至少一个第一绝缘层、至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,所述至少一个第一绝缘层位于所述多翼结构的上方,所述第一导电通孔结构和所述第二导电通孔结构贯穿所述至少一个第一绝缘层,所述第一外接电极通过 所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。In some possible implementations, the first interconnection structure includes at least one first insulating layer, at least one first conductive via structure, and at least one second conductive via structure, wherein the at least one first insulating layer Located above the multi-wing structure, the first conductive via structure and the second conductive via structure penetrate the at least one first insulating layer, and the first external electrode passes through the at least one first conductive The via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to the multilayer conductive layer through the at least one second conductive via structure Part or all of the even-numbered conductive layers.
在一些可能的实现方式中,所述第三外接电极和/或所述第四外接电极通过位于所述多翼结构下方的第二互联结构电连接至所述多层导电层中的导电层。In some possible implementation manners, the third external electrode and/or the fourth external electrode are electrically connected to the conductive layer in the multilayer conductive layer through a second interconnection structure located under the multi-wing structure.
在一些可能的实现方式中,所述第二互联结构包括至少一个第二绝缘层、至少一个第三导电通孔结构和至少一个第四导电通孔结构,其中,所述至少一个第二绝缘层位于所述多翼结构的下方,所述第三导电通孔结构和所述第四导电通孔结构贯穿所述至少一个第二绝缘层,所述第三外接电极通过所述至少一个第三导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极通过所述至少一个第四导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。In some possible implementations, the second interconnection structure includes at least one second insulating layer, at least one third conductive via structure, and at least one fourth conductive via structure, wherein the at least one second insulating layer Located below the multi-wing structure, the third conductive via structure and the fourth conductive via structure penetrate the at least one second insulating layer, and the third external electrode passes through the at least one third conductive The via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to the multilayer conductive layer through the at least one fourth conductive via structure Part or all of the even-numbered conductive layers.
在一些可能的实现方式中,所述电容器还包括:第一电极层,设置于所述叠层结构的上方,所述第一电极层包括相互分离的至少一个第一导电区域和至少一个第二导电区域,所述第一导电区域形成所述第一外接电极,所述第二导电区域形成所述第二外接电极。In some possible implementation manners, the capacitor further includes: a first electrode layer disposed above the laminated structure, and the first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other. A conductive region, the first conductive region forms the first external electrode, and the second conductive region forms the second external electrode.
在一些可能的实现方式中,所述电容器还包括:第二电极层,设置于所述叠层结构的下方,所述第二电极层包括相互分离的至少一个第三导电区域和至少一个第四导电区域,所述第三导电区域形成所述第三外接电极,所述第四导电区域形成所述第四外接电极。In some possible implementation manners, the capacitor further includes: a second electrode layer disposed below the laminated structure, and the second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other. A conductive region, the third conductive region forms the third external electrode, and the fourth conductive region forms the fourth external electrode.
在一些可能的实现方式中,所述多层导电层中的导电层包括以下中的至少一层:In some possible implementation manners, the conductive layer in the multilayer conductive layer includes at least one of the following:
重掺杂多晶硅层,金属硅化物层,碳层,导电聚合物层,铝层,铜层,镍层,氮化钽层,氮化钛层,氮化铝钛层,氮化硅钽层,氮化碳钽层。Heavily doped polysilicon layer, metal silicide layer, carbon layer, conductive polymer layer, aluminum layer, copper layer, nickel layer, tantalum nitride layer, titanium nitride layer, aluminum titanium nitride layer, tantalum silicon nitride layer, Tantalum carbon nitride layer.
在一些可能的实现方式中,所述至少一层电介质层中的电介质层包括以下中的至少一层:In some possible implementation manners, the dielectric layer in the at least one dielectric layer includes at least one of the following:
硅的氧化物层,硅的氮化物层,硅的氮氧化物层,金属的氧化物层,金属的氮化物层和金属的氮氧化物层。Silicon oxide layer, silicon nitride layer, silicon oxynitride layer, metal oxide layer, metal nitride layer and metal oxynitride layer.
第二方面,提供了一种电容结构,包括:In the second aspect, a capacitor structure is provided, including:
第一电容器和第二电容器,其中,所述第一电容器和所述第二电容器为 如上述第一方面及其任一可能的实现方式中的电容器,所述第二电容器位于所述第一电容器的上方,且所述第一电容器的第一外接电极与所述第二电容器的第三外接电极电连接,所述第一电容器的第二外接电极与所述第二电容器的第四外接电极电连接。The first capacitor and the second capacitor, wherein the first capacitor and the second capacitor are the capacitors in the above-mentioned first aspect and any possible implementation manner thereof, and the second capacitor is located in the first capacitor And the first external electrode of the first capacitor is electrically connected to the third external electrode of the second capacitor, and the second external electrode of the first capacitor is electrically connected to the fourth external electrode of the second capacitor. connect.
在一些可能的实现方式中,所述电容结构还包括:第三电容器,所述第三电容器为如上述第一方面及其任一可能的实现方式中的电容器,所述第三电容器位于所述第一电容器的下方,且所述第一电容器的第三外接电极与所述第三电容器的第一外接电极电连接,所述第一电容器的第四外接电极与所述第三电容器的第二外接电极电连接。In some possible implementation manners, the capacitor structure further includes: a third capacitor, the third capacitor being the capacitor in the above-mentioned first aspect and any one of its possible implementation manners, and the third capacitor is located in the Below the first capacitor, and the third external electrode of the first capacitor is electrically connected to the first external electrode of the third capacitor, and the fourth external electrode of the first capacitor is connected to the second external electrode of the third capacitor. The external electrodes are electrically connected.
第三方面,提供了一种电容器的制作方法,包括:In the third aspect, a method for manufacturing a capacitor is provided, including:
在衬底上方制备叠层结构,所述叠层结构包括至少一层电介质层和多层导电层,所述至少一层电介质层和所述多层导电层形成导电层与电介质层彼此交替的结构;A laminated structure is prepared over the substrate, the laminated structure includes at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer conductive layer form a structure in which the conductive layer and the dielectric layer alternate with each other ;
制备至少一个第一外接电极和至少一个第二外接电极,其中,所述第一外接电极和所述第二外接电极位于所述叠层结构的上方,所述第一外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层;At least one first external electrode and at least one second external electrode are prepared, wherein the first external electrode and the second external electrode are located above the laminated structure, and the first external electrode is electrically connected to the Part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
制备至少一个第三外接电极和至少一个第四外接电极,其中,所述第三外接电极和所述第四外接电极位于所述叠层结构的下方,所述第三外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层。At least one third external electrode and at least one fourth external electrode are prepared, wherein the third external electrode and the fourth external electrode are located below the laminated structure, and the third external electrode is electrically connected to the Part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
在一些可能的实现方式中,所述方法还包括:In some possible implementation manners, the method further includes:
在所述衬底上方制备多翼结构,所述叠层结构包覆所述多翼结构。A multi-wing structure is prepared above the substrate, and the laminated structure covers the multi-wing structure.
在一些可能的实现方式中,所述多翼结构包括多组翼状结构和多个支撑结构,其中,每组翼状结构中的各个翼状结构平行设置,所述支撑结构为中空的结构,所述翼状结构为所述支撑结构的外侧壁沿第一方向延伸形成的凸起结构,所述第一方向为垂直于所述支撑结构的侧壁的方向。In some possible implementations, the multi-wing structure includes multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, the supporting structure is a hollow structure, and the wing-like structure The structure is a convex structure formed by extending the outer side wall of the supporting structure along a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure.
在一些可能的实现方式中,所述在衬底上方制备多翼结构,包括:In some possible implementation manners, the preparing a multi-wing structure above the substrate includes:
在所述衬底上方制备多层结构,所述多层结构包括多层第一材料层和多层第二材料层,所述多层第一材料层和所述多层第二材料层形成第一材料层与第二材料层彼此交替的结构,所述第一材料与所述第二材料不同,以及所 述第一材料层与所述衬底直接接触;A multi-layer structure is prepared over the substrate, the multi-layer structure includes a multi-layer first material layer and a multi-layer second material layer, the multi-layer first material layer and the multi-layer second material layer form a first material layer A structure in which a material layer and a second material layer alternate with each other, the first material and the second material are different, and the first material layer is in direct contact with the substrate;
以所述多层结构为基础,制备多个沟槽,所述沟槽沿着垂直于所述衬底的方向延伸且进入所述衬底;Preparing a plurality of trenches on the basis of the multilayer structure, the trenches extending in a direction perpendicular to the substrate and entering the substrate;
在所述多层结构上表面、所述多个沟槽的底部和内侧壁沉积所述第一材料,以形成所述第一材料制成的多个中空柱状的第一结构,作为形成所述多个支撑结构的基础;The first material is deposited on the upper surface of the multilayer structure, the bottoms and inner side walls of the plurality of trenches to form a plurality of hollow columnar first structures made of the first material, as the formation of the The foundation of multiple supporting structures;
在余留的所述多层结构内制备沟槽状的多个第二结构,所述第二结构沿着垂直于所述衬底的方向延伸至所述衬底的上表面;Preparing a plurality of trench-shaped second structures in the remaining multilayer structure, the second structures extending to the upper surface of the substrate in a direction perpendicular to the substrate;
去除所述多个第二结构中露出的第二材料层;Removing the second material layer exposed in the plurality of second structures;
对所述衬底进行减薄处理,以形成所述多翼结构。The substrate is thinned to form the multi-wing structure.
在一些可能的实现方式中,所述多层导电层中的部分或者全部导电层与所述多翼结构共形。In some possible implementations, part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure.
在一些可能的实现方式中,所述多层导电层中的一部分导电层与所述多翼结构共形,另一部分导电层在外形上与所述多翼结构互补。In some possible implementation manners, a part of the conductive layer in the multilayer conductive layer is conformal to the multi-wing structure, and the other part of the conductive layer is complementary in shape to the multi-wing structure.
在一些可能的实现方式中,所述多组翼状结构中的单个翼状结构包括沿着所述第一方向延伸的多个翼。In some possible implementations, a single wing-like structure in the plurality of groups of wing-like structures includes a plurality of wings extending along the first direction.
在一些可能的实现方式中,所述多个支撑结构中的支撑结构在其中空区域设置有至少一个轴,所述轴与所述支撑结构的侧壁平行。In some possible implementation manners, the support structure of the plurality of support structures is provided with at least one shaft in the hollow area thereof, and the shaft is parallel to the side wall of the support structure.
在一些可能的实现方式中,所述方法还包括:In some possible implementation manners, the method further includes:
制备隔离环,所述隔离环位于所述多个支撑结构的外侧的上方,且所述隔离环用于将所述叠层结构分隔为内侧和外侧两部分,所述第一外接电极和所述第二外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接,以及所述第三外接电极和所述第四外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接。Prepare an isolation ring, the isolation ring is located above the outer side of the plurality of support structures, and the isolation ring is used to separate the laminated structure into two parts, an inner side and an outer side, the first external electrode and the The second external electrode is only electrically connected to the part of the laminated structure located on the inner side of the isolation ring, and the third external electrode and the fourth external electrode are only electrically connected to the laminated structure located on the inner side of the isolation ring. The inner part is electrically connected.
在一些可能的实现方式中,所述方法还包括:In some possible implementation manners, the method further includes:
制备至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,At least one first conductive via structure and at least one second conductive via structure are prepared, wherein,
所述第一导电通孔结构位于所述隔离环中,所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;或者,所述第一导电通孔结构和/或所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;The first conductive via structure is located in the isolation ring, and the second conductive via structure is located outside the isolation ring near the center of the capacitor; or, the first conductive via structure and/ Or the second conductive via structure is located outside the isolation ring near the center of the capacitor;
所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述 多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The first external electrode is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure, and the second external electrode is electrically connected to the at least one second conductive layer through the at least one second conductive layer. Part or all of the even-numbered conductive layers in the multilayer conductive layers to which the via structure is electrically connected.
在一些可能的实现方式中,所述电容器还包括:环状结构,所述环状结构位于所述多个支撑结构和所述多组翼状结构的外侧。In some possible implementation manners, the capacitor further includes a ring structure located outside the plurality of support structures and the plurality of sets of wing-shaped structures.
在一些可能的实现方式中,所述环状结构由多层第一材料层和多层第二材料层交替堆叠形成。In some possible implementation manners, the ring structure is formed by alternately stacking multiple layers of the first material and multiple layers of the second material.
在一些可能的实现方式中,所述多组翼状结构和所述多个支撑结构由所述第一材料形成。In some possible implementations, the multiple sets of wing-shaped structures and the multiple supporting structures are formed of the first material.
在一些可能的实现方式中,所述多翼结构由导电材料制成,所述第二外接电极电连接至所述多翼结构。In some possible implementations, the multi-wing structure is made of a conductive material, and the second external electrode is electrically connected to the multi-wing structure.
在一些可能的实现方式中,所述多翼结构包括主体材料和主体材料表面的导电层或导电区域,所述第二外接电极通过与主体材料和主体材料表面的导电层或导电区域电连接与所述多翼结构的电连接。In some possible implementations, the multi-wing structure includes a main body material and a conductive layer or area on the surface of the main body material, and the second external electrode is electrically connected to the main body material and the conductive layer or area on the surface of the main body material. The electrical connection of the multi-wing structure.
在一些可能的实现方式中,所述多翼结构由电阻率小于阈值的材料形成,或者,所述多翼结构的表面形成有重掺杂的导电层或者重掺杂的导电区域。In some possible implementation manners, the multi-wing structure is formed of a material with a resistivity less than a threshold value, or a heavily doped conductive layer or a heavily doped conductive region is formed on the surface of the multi-wing structure.
在一些可能的实现方式中,所述方法还包括:In some possible implementation manners, the method further includes:
制备填充结构,所述填充结构包覆所述叠层结构,并填充所述叠层结构形成的空隙。A filling structure is prepared, and the filling structure covers the laminated structure and fills the voids formed by the laminated structure.
在一些可能的实现方式中,所述多组翼状结构中与所述衬底接触的翼状结构在不同的支撑结构之间存在非连续区域。In some possible implementations, the wing-shaped structure in contact with the substrate in the plurality of groups of wing-shaped structures has a discontinuous area between different support structures.
在一些可能的实现方式中,所述衬底在所述非连续区域处形成衬底沟槽,所述叠层结构进一步设置于所述衬底沟槽内。In some possible implementation manners, the substrate forms a substrate trench at the discontinuous region, and the stacked structure is further disposed in the substrate trench.
在一些可能的实现方式中,所述支撑结构贯穿所述衬底,以使所述衬底的下表面露出所述叠层结构。In some possible implementation manners, the support structure penetrates the substrate, so that the lower surface of the substrate exposes the laminated structure.
在一些可能的实现方式中,所述第三外接电极和/或所述第四外接电极电连接至所述多层导电层位于所述支撑结构中的区域。In some possible implementations, the third external electrode and/or the fourth external electrode are electrically connected to a region of the multilayer conductive layer located in the support structure.
在一些可能的实现方式中,在所述衬底由导电材料制成,所述第三外接电极通过所述衬底电连接至所述多层导电层中与所述衬底接触的导电层。In some possible implementation manners, the substrate is made of a conductive material, and the third external electrode is electrically connected to the conductive layer in contact with the substrate in the multilayer conductive layer through the substrate.
在一些可能的实现方式中,所述方法还包括:In some possible implementation manners, the method further includes:
制备第一互联结构,其中,所述第一互联结构位于所述多翼结构上方,所述第一外接电极和/或所述第二外接电极通过所述第一互联结构电连接至所述多层导电层中的导电层。A first interconnection structure is prepared, wherein the first interconnection structure is located above the multi-wing structure, and the first external electrode and/or the second external electrode are electrically connected to the multi-wing structure through the first interconnection structure. The conductive layer in the conductive layer.
在一些可能的实现方式中,所述第一互联结构包括至少一个第一绝缘层、至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,所述至少一个第一绝缘层位于所述多翼结构的上方,所述第一导电通孔结构和所述第二导电通孔结构贯穿所述至少一个第一绝缘层,所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。In some possible implementations, the first interconnection structure includes at least one first insulating layer, at least one first conductive via structure, and at least one second conductive via structure, wherein the at least one first insulating layer Located above the multi-wing structure, the first conductive via structure and the second conductive via structure penetrate the at least one first insulating layer, and the first external electrode passes through the at least one first conductive The via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to the multilayer conductive layer through the at least one second conductive via structure Part or all of the even-numbered conductive layers.
在一些可能的实现方式中,所述方法还包括:In some possible implementation manners, the method further includes:
制备第二互联结构,其中,所述第二互联结构位于所述多翼结构下方,所述第三外接电极和/或所述第四外接电极通过所述第二互联结构电连接至所述多层导电层中的导电层。A second interconnection structure is prepared, wherein the second interconnection structure is located below the multi-wing structure, and the third external electrode and/or the fourth external electrode are electrically connected to the multi-wing structure through the second interconnection structure. The conductive layer in the conductive layer.
在一些可能的实现方式中,所述第二互联结构包括至少一个第二绝缘层、至少一个第三导电通孔结构和至少一个第四导电通孔结构,其中,所述至少一个第二绝缘层位于所述多翼结构的下方,所述第三导电通孔结构和所述第四导电通孔结构贯穿所述至少一个第二绝缘层,所述第三外接电极通过所述至少一个第三导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极通过所述至少一个第四导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。In some possible implementations, the second interconnection structure includes at least one second insulating layer, at least one third conductive via structure, and at least one fourth conductive via structure, wherein the at least one second insulating layer Located below the multi-wing structure, the third conductive via structure and the fourth conductive via structure penetrate the at least one second insulating layer, and the third external electrode passes through the at least one third conductive The via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to the multilayer conductive layer through the at least one fourth conductive via structure Part or all of the even-numbered conductive layers.
在一些可能的实现方式中,所述制备至少一个第一外接电极和至少一个第二外接电极,包括:In some possible implementation manners, the preparing at least one first external electrode and at least one second external electrode includes:
在所述叠层结构的上方制备第一电极层,所述第一电极层包括相互分离的至少一个第一导电区域和至少一个第二导电区域,所述第一导电区域形成所述第一外接电极,所述第二导电区域形成所述第二外接电极。A first electrode layer is prepared above the laminated structure. The first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other, and the first conductive region forms the first external circumstance. An electrode, and the second conductive area forms the second external electrode.
在一些可能的实现方式中,所述制备至少一个第三外接电极和至少一个第四外接电极,包括:In some possible implementation manners, the preparing at least one third external electrode and at least one fourth external electrode includes:
在所述多翼结构的下方制备第二电极层,所述第二电极层包括相互分离的至少一个第三导电区域和至少一个第四导电区域,所述第三导电区域形成所述第三外接电极,所述第四导电区域形成所述第四外接电极。A second electrode layer is prepared under the multi-wing structure. The second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other, and the third conductive region forms the third external circumstance. An electrode, the fourth conductive area forms the fourth external electrode.
因此,在本申请实施例中,以多翼结构为骨架,在多翼结构上设置叠层结构,从而可以增加叠层结构的表面积,能够在较小器件尺寸(电容芯片尺寸)的情况下得到较大的电容值,提高电容器的容值密度,并在电容器的正、反两面都设置了电容器的多个电极,从而可以基于多翼结构制备双面电容器,便于将电容器以垂直堆叠的方式并联,满足不同的应用需求。进一步地,相对于实心的支撑结构,本申请中的支撑结构为中空的结构,其可以具有更大的表面积,并且相对于柱状的支撑结构,本申请中的翼状结构为支撑结构的外侧壁上形成的凸起结构,即支撑结构的外侧壁上形成有翼状支撑,从而可以增加多翼结构的表面积,并且在本申请中叠层结构包覆多翼结构,在多翼结构的表面积增加的同时,叠层结构的表面积也会相应增加,进而能够进一步提高电容器的容值密度。Therefore, in the embodiments of the present application, the multi-wing structure is used as the skeleton, and the laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and the result can be obtained with a smaller device size (capacitor chip size). Larger capacitance value increases the capacitance value density of the capacitor, and multiple electrodes of the capacitor are arranged on the front and back sides of the capacitor, so that the double-sided capacitor can be prepared based on the multi-wing structure, which is convenient for the capacitors to be stacked in parallel in a vertical manner. , To meet different application requirements. Further, compared to a solid supporting structure, the supporting structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar supporting structure, the wing-shaped structure in the present application is on the outer side wall of the supporting structure. The formed convex structure, that is, the outer side wall of the support structure is formed with wing-like supports, so as to increase the surface area of the multi-wing structure, and in the present application, the laminated structure covers the multi-wing structure, while the surface area of the multi-wing structure is increased. , The surface area of the laminated structure will also increase accordingly, which can further increase the capacitance density of the capacitor.
附图说明Description of the drawings
图1是根据本申请实施例的一种电容器的示意性结构图。Fig. 1 is a schematic structural diagram of a capacitor according to an embodiment of the present application.
图2至图6是根据本申请实施例的电容器所包含的多翼结构的示意性结构图。2 to 6 are schematic structural diagrams of the multi-wing structure included in the capacitor according to the embodiment of the present application.
图7是根据本申请实施例的另一种电容器的示意性结构图。Fig. 7 is a schematic structural diagram of another capacitor according to an embodiment of the present application.
图8是根据本申请实施例的电容器垂直堆叠的示意性结构图。Fig. 8 is a schematic structural diagram of a vertical stack of capacitors according to an embodiment of the present application.
图9是根据本申请实施例的一种电容结构的示意性结构图。Fig. 9 is a schematic structural diagram of a capacitor structure according to an embodiment of the present application.
图10是根据本申请实施例的一种电容器的制作方法的示意性流程图。Fig. 10 is a schematic flowchart of a method for manufacturing a capacitor according to an embodiment of the present application.
图11a至图11o是本申请实施例的一种电容器的制作方法的示意图。11a to 11o are schematic diagrams of a manufacturing method of a capacitor according to an embodiment of the present application.
具体实施方式Detailed ways
下面将结合附图,对本申请实施例中的技术方案进行描述。The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings.
应理解,本申请实施例的电容器在电路中可以起到旁路、滤波、去耦等作用。It should be understood that the capacitors in the embodiments of the present application can perform functions such as bypassing, filtering, and decoupling in the circuit.
本申请实施例所述的电容器可以是3D硅电容器,3D硅电容器是一种基于半导体晶圆加工技术的新型电容器。与传统的MLCC(多层陶瓷电容)相比,3D硅电容器具有小尺寸、高精度、高稳定性、长寿命等优点。其基本的加工流程需要先在晶圆或衬底上加工出高深宽比的深孔(Via)、沟槽(Trench)、柱状(Pillar)、墙状(Wall)等3D结构,接着在3D结构表面沉 积绝缘薄膜和低电阻率导电材料依次制作电容的下电极、电介质层和上电极。The capacitor described in the embodiment of the present application may be a 3D silicon capacitor, which is a new type of capacitor based on semiconductor wafer processing technology. Compared with traditional MLCC (multilayer ceramic capacitors), 3D silicon capacitors have the advantages of small size, high precision, high stability, and long life. The basic processing flow requires processing high-aspect-ratio deep holes (Via), trenches (Trench), pillars (Pillar), wall (Wall) and other 3D structures on the wafer or substrate first, and then in the 3D structure An insulating film and a low-resistivity conductive material are deposited on the surface to make the lower electrode, the dielectric layer and the upper electrode of the capacitor in sequence.
在此背景下,本申请提出了一种新型的电容器的结构和制作方法,可以提高电容器的容值密度。In this context, this application proposes a new type of capacitor structure and manufacturing method, which can increase the capacitance density of the capacitor.
以下,结合图1至图8,详细介绍本申请实施例的电容器。Hereinafter, the capacitor of the embodiment of the present application will be described in detail with reference to FIGS. 1 to 8.
应理解,图1和图8中的电容器仅仅只是示例,电容器所包括的多翼结构并不局限于图1至图8所示,可以根据实际需要灵活调整。同时多翼结构所包括的翼状结构的数量以及支撑结构的数量仅仅只是示例,并不局限于图1至图8所示,可以根据实际需要灵活设置。It should be understood that the capacitors in FIGS. 1 and 8 are only examples, and the multi-wing structure included in the capacitor is not limited to those shown in FIGS. 1 to 8 and can be flexibly adjusted according to actual needs. At the same time, the number of wing-like structures and the number of supporting structures included in the multi-wing structure are only examples, and are not limited to those shown in FIGS. 1 to 8, and can be flexibly set according to actual needs.
需要说明的是,为便于理解,在以下示出的实施例中,对于不同实施例中示出的结构中,相同的结构采用相同的附图标记,并且为了简洁,省略对相同结构的详细说明。It should be noted that, for ease of understanding, in the embodiments shown below, for the structures shown in different embodiments, the same structures are given the same reference numerals, and for the sake of brevity, detailed descriptions of the same structures are omitted. .
图1是本申请一个实施例的电容器100的一种可能的结构图。如图1所示,该电容器100包括叠层结构120、至少一个第一外接电极130、至少一个第二外接电极140、至少一个第三外接电极150和至少一个第四外接电极160。FIG. 1 is a possible structural diagram of a capacitor 100 according to an embodiment of the present application. As shown in FIG. 1, the capacitor 100 includes a laminated structure 120, at least one first external electrode 130, at least one second external electrode 140, at least one third external electrode 150 and at least one fourth external electrode 160.
具体地,如图1所示,在该电容器100中,该叠层结构120包括至少一层电介质层和多层导电层,该至少一层电介质层和该多层导电层形成导电层与电介质层彼此相邻的结构;该第一外接电极130和该第二外接电极140位于该叠层结构120的上方,该第一外接电极130电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极140电连接至该多层导电层中的部分或者全部偶数层导电层;该第三外接电极150和该第四外接电极160位于该叠层结构120的下方,该第三外接电极150电连接至该多层导电层中的部分或者全部奇数层导电层,该第四外接电极160电连接至该多层导电层中的部分或者全部偶数层导电层。Specifically, as shown in FIG. 1, in the capacitor 100, the laminated structure 120 includes at least one dielectric layer and multiple conductive layers. The at least one dielectric layer and the multiple conductive layers form a conductive layer and a dielectric layer. Structures adjacent to each other; the first external electrode 130 and the second external electrode 140 are located above the laminated structure 120, and the first external electrode 130 is electrically connected to some or all of the odd-numbered layers of the multilayer conductive layer Layer, the second external electrode 140 is electrically connected to some or all of the even-numbered conductive layers in the multilayer conductive layer; the third external electrode 150 and the fourth external electrode 160 are located under the laminated structure 120, and the second external electrode 140 is The three external electrodes 150 are electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode 160 is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
在本申请实施例中,该多层导电层中相邻的两层导电层之间通过电介质层电隔离。导电层和电介质层的具体层数可以根据实际需要灵活配置,只需满足该多层导电层中相邻的两层导电层之间电隔离。In the embodiment of the present application, two adjacent conductive layers in the multilayer conductive layer are electrically isolated by a dielectric layer. The specific number of layers of the conductive layer and the dielectric layer can be flexibly configured according to actual needs, and only needs to satisfy the electrical isolation between two adjacent conductive layers in the multilayer conductive layer.
可选地,在本申请实施例中,该电容器100还包括:多翼结构110,该叠层结构120包覆该多翼结构110。Optionally, in the embodiment of the present application, the capacitor 100 further includes a multi-wing structure 110, and the laminated structure 120 covers the multi-wing structure 110.
具体地,如图1所示,在该电容器100中,该多翼结构110包括多组翼 状结构111和多个支撑结构112,其中,每组翼状结构111中的各个翼状结构111平行设置,该支撑结构112为中空的结构,该翼状结构111为该支撑结构112的外侧壁沿第一方向延伸形成的凸起结构,该第一方向为垂直于该支撑结构112的侧壁的方向,这里翼状结构111与支撑结构112相互连接成一个整体。Specifically, as shown in FIG. 1, in the capacitor 100, the multi-wing structure 110 includes a plurality of groups of wing-shaped structures 111 and a plurality of supporting structures 112, wherein each wing-shaped structure 111 in each group of wing-shaped structures 111 is arranged in parallel, and the The supporting structure 112 is a hollow structure, and the wing-shaped structure 111 is a convex structure formed by extending the outer side wall of the supporting structure 112 in a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure 112, where the wing-shaped structure The structure 111 and the supporting structure 112 are connected to each other as a whole.
需要说明的是,位于一个支撑结构112的外侧壁上的多个平行设置的翼状结构111属于同一组。另外,各组中的翼状结构111对应设置,且对应设置的翼状结构111位于同一水平面。It should be noted that the multiple wing-like structures 111 arranged in parallel on the outer side wall of one supporting structure 112 belong to the same group. In addition, the wing-like structures 111 in each group are correspondingly arranged, and the correspondingly arranged wing-like structures 111 are located on the same horizontal plane.
需要说明的是,在本申请实施例中,以多翼结构为骨架,在多翼结构上设置叠层结构,从而可以增加叠层结构的表面积,能够在较小器件尺寸(电容芯片尺寸)的情况下得到较大的电容值,提高电容器的容值密度,并在电容器的正、反两面都设置了电容器的多个电极,从而可以基于多翼结构制备双面电容器,便于将电容器以垂直堆叠的方式与其他电容器并联,满足不同的应用需求。进一步地,在本申请实施例中,相对于实心的支撑结构,本申请中的支撑结构为中空的结构,其可以具有更大的表面积,并且相对于柱状的支撑结构,本申请中的翼状结构为支撑结构的外侧壁上形成的凸起结构,即支撑结构的外侧壁上形成有翼状支撑,从而可以增加多翼结构的表面积,并且在本申请中叠层结构包覆多翼结构,在多翼结构的表面积增加的同时,叠层结构的表面积也会相应增加,进而能够进一步提高电容器的容值密度。It should be noted that, in the embodiments of the present application, the multi-wing structure is used as the skeleton, and the laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and it can be used in a smaller device size (capacitor chip size). In this case, a larger capacitance value is obtained, the capacitance density of the capacitor is improved, and multiple electrodes of the capacitor are set on the front and back sides of the capacitor, so that the double-sided capacitor can be prepared based on the multi-wing structure, which facilitates the vertical stacking of the capacitor It is connected in parallel with other capacitors to meet different application requirements. Further, in the embodiments of the present application, compared to a solid support structure, the support structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar support structure, the wing-shaped structure in the present application It is the convex structure formed on the outer side wall of the support structure, that is, the wing-like support is formed on the outer side wall of the support structure, so that the surface area of the multi-wing structure can be increased. In this application, the laminated structure covers the multi-wing structure. As the surface area of the wing structure increases, the surface area of the laminated structure also increases correspondingly, which can further increase the capacitance density of the capacitor.
应理解,多翼结构的表面积可以理解为支撑结构的内侧壁、翼状结构的上下表面和侧面等所有可以用于附着叠层结构的表面的面积。It should be understood that the surface area of the multi-wing structure can be understood as the area of the inner side wall of the support structure, the upper and lower surfaces and sides of the wing-like structure that can be used to attach the laminated structure.
在本申请实施例中,多翼结构110为骨架,其可以不作为电容器本身的一部分,即多翼结构110可以不受限于电容电极材料的选材限制,也就是说多翼结构110的材料选择可以更为灵活,从而可以简化多翼结构110的制备流程。In the embodiment of the present application, the multi-wing structure 110 is a skeleton, which may not be used as a part of the capacitor itself, that is, the multi-wing structure 110 may not be limited to the material selection of the capacitor electrode material, that is, the material selection of the multi-wing structure 110 It can be more flexible, so that the preparation process of the multi-wing structure 110 can be simplified.
应理解,本申请实施例中外接电极也可以称之为焊盘或者外接焊盘。It should be understood that the external electrode in the embodiment of the present application may also be referred to as a pad or an external pad.
可选地,在一些实施例中,中空的多个支撑结构112中的支撑结构112可以具有环状侧壁。Optionally, in some embodiments, the supporting structure 112 of the plurality of hollow supporting structures 112 may have an annular side wall.
可选地,在另一些实施例中,中空的多个支撑结构112中的支撑结构112可以具有两个相对分布的侧壁。Optionally, in other embodiments, the supporting structure 112 of the plurality of hollow supporting structures 112 may have two oppositely distributed side walls.
也即,该支撑结构112的侧壁可以形成一个中空区域,由于叠层结构120 包覆该支撑结构,也就是说叠层结构120可以设置有这一中空区域中。That is, the sidewall of the supporting structure 112 may form a hollow area. Since the laminated structure 120 covers the supporting structure, that is, the laminated structure 120 may be disposed in this hollow area.
可选地,该第一外接电极130和该第二外接电极140的材料可以是金属,例如铜、铝等。可选地,该第一外接电极130和该第二外接电极140表面可以设置有低电阻率的Ti,TiN,Ta,TaN层作为黏附层和/或阻挡层,以便于该第一外接电极130和该第二外接电极140黏附至电容器的其他结构,或者,以便于在该第一外接电极130和该第二外接电极140与电容器的其他结构之间起到阻挡作用;另外,该第一外接电极130和该第二外接电极140的表面还可以设置有一些金属层,例如Ni、Pd(钯)、Au、Sn(锡)、Ag,用于后续打线或焊接工艺。Optionally, the material of the first external electrode 130 and the second external electrode 140 may be metal, such as copper, aluminum, or the like. Optionally, the surfaces of the first external electrode 130 and the second external electrode 140 may be provided with low resistivity Ti, TiN, Ta, TaN layers as an adhesion layer and/or barrier layer to facilitate the first external electrode 130 And the second external electrode 140 to adhere to other structures of the capacitor, or to facilitate blocking between the first external electrode 130 and the second external electrode 140 and other structures of the capacitor; in addition, the first external electrode 140 The surface of the electrode 130 and the second external electrode 140 may also be provided with some metal layers, such as Ni, Pd (palladium), Au, Sn (tin), and Ag for subsequent wire bonding or welding processes.
可选地,该第三外接电极150和该第四外接电极160的材料可以是金属,例如铜、铝等。可选地,该第三外接电极150和该第四外接电极160表面可以设置有低电阻率的Ti,TiN,Ta,TaN层作为黏附层和/或阻挡层,以便于该第三外接电极150和该第四外接电极160黏附至电容器的其他结构,或者,以便于在该第三外接电极150和该第四外接电极160与电容器的其他结构之间起到阻挡作用;另外,该第三外接电极150和该第四外接电极160的表面还可以设置有一些金属层,例如Ni、Pd(钯)、Au、Sn(锡)、Ag,用于后续打线或焊接工艺。Optionally, the material of the third external electrode 150 and the fourth external electrode 160 may be metal, such as copper, aluminum, or the like. Optionally, the surface of the third external electrode 150 and the fourth external electrode 160 may be provided with low resistivity Ti, TiN, Ta, TaN layers as an adhesion layer and/or barrier layer to facilitate the third external electrode 150 And the fourth external electrode 160 are adhered to other structures of the capacitor, or to facilitate blocking between the third external electrode 150 and the fourth external electrode 160 and other structures of the capacitor; in addition, the third external electrode The surface of the electrode 150 and the fourth external electrode 160 may also be provided with some metal layers, such as Ni, Pd (palladium), Au, Sn (tin), and Ag for subsequent wire bonding or welding processes.
可选地,该多层导电层中的导电层包括以下中的至少一层:Optionally, the conductive layer in the multilayer conductive layer includes at least one of the following:
重掺杂多晶硅层,金属硅化物层,碳层,导电聚合物层,铝层,铜层,镍层,氮化钽层,氮化钛层,氮化铝钛层,氮化硅钽层,氮化碳钽层。Heavily doped polysilicon layer, metal silicide layer, carbon layer, conductive polymer layer, aluminum layer, copper layer, nickel layer, tantalum nitride layer, titanium nitride layer, aluminum titanium nitride layer, tantalum silicon nitride layer, Tantalum carbon nitride layer.
也就是说,在该叠层结构120中,该多层导电层中的导电层的材料可以是重掺杂多晶硅,金属硅化物(silicide),碳,导电的聚合物,Al、Cu、Ni等金属,氮化钽(TaN)、氮化钛(TiN)、氮化铝钛(TiAlN)、氮化硅钽(TaSiN)、氮化碳钽(TaCN)等低电阻率化合物,或者该多层导电层中的导电层为上述材料的组合、叠层、复合结构。也就是说,该多层导电层中的一层导电层可以是一层或包含多个叠层,该多层导电层中的某一层导电层可以是单一材料形成的单层,也可以是多种材料形成的复合层。That is, in the laminated structure 120, the material of the conductive layer in the multilayer conductive layer may be heavily doped polysilicon, metal silicide (silicide), carbon, conductive polymer, Al, Cu, Ni, etc. Metal, tantalum nitride (TaN), titanium nitride (TiN), titanium aluminum nitride (TiAlN), tantalum silicon nitride (TaSiN), tantalum carbon nitride (TaCN) and other low-resistivity compounds, or the multilayer conductive The conductive layer in the layer is a combination, laminate, and composite structure of the above-mentioned materials. That is to say, a conductive layer in the multilayer conductive layer may be one layer or multiple stacked layers, and a certain conductive layer in the multilayer conductive layer may be a single layer formed of a single material, or it may be A composite layer formed by a variety of materials.
需要注意的是,该多层导电层中的不同导电层的材料、厚度等可以相同,也可以不同。该多层导电层中的导电层的具体导电材料和层厚可根据电容器的容值、频率特性、损耗等需求来调整。当然,该多层导电层中的导电层的还可以包括一些其他的导电材料,本申请实施例对此不作限定。It should be noted that the materials and thicknesses of different conductive layers in the multilayer conductive layer may be the same or different. The specific conductive material and layer thickness of the conductive layer in the multilayer conductive layer can be adjusted according to the capacitance, frequency characteristics, loss and other requirements of the capacitor. Of course, the conductive layer in the multilayer conductive layer may also include some other conductive materials, which is not limited in the embodiment of the present application.
可选地,该至少一层电介质层中的电介质层包括以下中的至少一层:Optionally, the dielectric layer in the at least one dielectric layer includes at least one of the following:
硅的氧化物层,硅的氮化物层,硅的氮氧化物层,金属的氧化物层,金属的氮化物层和金属的氮氧化物层。Silicon oxide layer, silicon nitride layer, silicon oxynitride layer, metal oxide layer, metal nitride layer and metal oxynitride layer.
也就是说,在该叠层结构120中,该至少一层电介质层中的电介质层的材料可以是硅的氧化物,硅的氮化物,硅的氮氧化物,金属的氧化物,金属的氮化物,金属的氮氧化物。例如SiO 2,SiN,SiON,或者高介电常数(high-k)材料,包括Al 2O 3,HfO 2,ZrO 2,TiO 2,Y 2O 3,La 2O 3,HfSiO 4,LaAlO 3,SrTiO 3,LaLuO 3等。该至少一层电介质层中的一个电介质层可以是一层或包含多个叠层,该至少一层电介质层中的一个电介质层可以是一种材料或多种材料的组合、混合。 That is, in the laminated structure 120, the material of the dielectric layer in the at least one dielectric layer may be silicon oxide, silicon nitride, silicon oxynitride, metal oxide, or metal nitrogen. Compounds, metal oxynitrides. For example, SiO 2 , SiN, SiON, or high-k materials, including Al 2 O 3 , HfO 2 , ZrO 2 , TiO 2 , Y 2 O 3 , La 2 O 3 , HfSiO 4 , LaAlO 3 , SrTiO 3 , LaLuO 3 and so on. One dielectric layer in the at least one dielectric layer may be one layer or a plurality of stacked layers, and one dielectric layer in the at least one dielectric layer may be one material or a combination or mixture of multiple materials.
需要注意的是,该至少一层电介质层中的不同电介质层的材料、厚度等可以相同,也可以不同。该至少一层电介质层中的电介质层的具体绝缘材料和层厚可根据电容器的容值、频率特性、损耗等需求来调整。当然,该至少一层电介质层中的电介质层还可以包括一些其他的绝缘材料,本申请实施例对此不作限定。It should be noted that the materials and thicknesses of different dielectric layers in the at least one dielectric layer may be the same or different. The specific insulating material and layer thickness of the dielectric layer in the at least one dielectric layer can be adjusted according to the capacitance, frequency characteristics, loss and other requirements of the capacitor. Of course, the dielectric layer in the at least one dielectric layer may also include some other insulating materials, which is not limited in the embodiment of the present application.
在本申请实施例中,在叠层结构120中,该至少一层电介质层的顺序可以是:在多翼结构110上,与多翼结构110的距离从小到大或者从大到小的顺序。同理,该多层导电层的顺序也可以是:在多翼结构110上,与多翼结构110的距离从小到大或者从大到小的顺序。为了便于描述,在本申请实施例中,该至少一层电介质层和该多层导电层的顺序以在多翼结构110上与多翼结构110的距离从小到大的顺序为例进行说明。In the embodiment of the present application, in the laminated structure 120, the order of the at least one dielectric layer may be as follows: on the multi-wing structure 110, the distance from the multi-wing structure 110 is ascending or descending. In the same way, the order of the multilayer conductive layers can also be: on the multi-wing structure 110, the distance from the multi-wing structure 110 is from small to large or from large to small. For ease of description, in the embodiment of the present application, the sequence of the at least one dielectric layer and the multi-layer conductive layer is described by taking the order of the distance from the multi-wing structure 110 to the multi-wing structure 110 from small to large as an example.
可选地,在本申请实施例中,该电容器100还包括:衬底170,该衬底170设置于该多翼结构110的下方,如图1所示。Optionally, in the embodiment of the present application, the capacitor 100 further includes a substrate 170, and the substrate 170 is disposed under the multi-wing structure 110, as shown in FIG. 1.
需要说明的是,该第一方向可以是平行于该衬底170的方向,或者,该第一方向可以是垂直于该衬底170法线的方向。也即,该多个支撑结构112中的支撑结构112可以沿着该衬底170法线的方向延伸。It should be noted that the first direction may be a direction parallel to the substrate 170, or the first direction may be a direction perpendicular to the normal line of the substrate 170. That is, the support structure 112 of the plurality of support structures 112 may extend along the direction of the normal line of the substrate 170.
需要注意的是,在本申请实施例中,该衬底170的厚度也可以根据实际需要灵活设置,例如,在该衬底170的厚度因太厚而不能满足需求时,可以对该衬底170进行减薄处理。甚至可以将该衬底170完全去除。It should be noted that in the embodiment of the present application, the thickness of the substrate 170 can also be flexibly set according to actual needs. For example, when the thickness of the substrate 170 is too thick to meet the requirements, the substrate 170 can be Perform thinning treatment. It is even possible to completely remove the substrate 170.
需要说明的是,上述图1是沿着衬底纵向的截面。It should be noted that the above-mentioned Fig. 1 is a cross section along the longitudinal direction of the substrate.
可选地,在本申请实施例中,该衬底170可以是硅晶圆,包括单晶硅、 多晶硅、不定形硅。该衬底170也可以是别的半导体衬底,包括绝缘衬底上的硅(Silicon-On-Insulator,SOI)晶圆,碳化硅(SiC)、氮化镓(GaN)、砷化镓(GaAs)等III-V族元素的化合物半导体晶圆。该衬底170也可以是金属板,玻璃,陶瓷,有机聚合物,或其它刚性衬底。另外,该衬底170的表面可以包含键合层、外延层、氧化层、掺杂层等。Optionally, in the embodiment of the present application, the substrate 170 may be a silicon wafer, including monocrystalline silicon, polycrystalline silicon, and amorphous silicon. The substrate 170 may also be other semiconductor substrates, including silicon-on-insulator (SOI) wafers, silicon carbide (SiC), gallium nitride (GaN), and gallium arsenide (GaAs). ) And other compound semiconductor wafers of group III-V elements. The substrate 170 may also be a metal plate, glass, ceramic, organic polymer, or other rigid substrate. In addition, the surface of the substrate 170 may include a bonding layer, an epitaxial layer, an oxide layer, a doped layer, and the like.
可选地,在一些实施例中,不同支撑结构112之间与衬底170接触的翼状结构111为连续的,衬底170在不同支撑结构112之间的区域具有平坦表面。另外,不同支撑结构112之间的其他翼状结构111也可以是连续的,例如,在不同支撑结构112之间通过环状沟槽中断的情况下,支撑结构112之间的所有翼状结构111是连续的。Optionally, in some embodiments, the wing-shaped structure 111 between the different support structures 112 that is in contact with the substrate 170 is continuous, and the substrate 170 has a flat surface in the area between the different support structures 112. In addition, other wing-like structures 111 between different support structures 112 may also be continuous. For example, when the different support structures 112 are interrupted by an annular groove, all the wing-like structures 111 between the support structures 112 are continuous. of.
可选地,在另一些实施例中,不同支撑结构112之间与衬底170接触的翼状结构111为非连续的,衬底170在不同支撑结构112之间的区域形成有衬底沟槽171。Optionally, in other embodiments, the wing-shaped structure 111 between the different support structures 112 that is in contact with the substrate 170 is discontinuous, and the substrate 170 is formed with a substrate trench 171 in the region between the different support structures 112 .
可选地,在一些实施例中,支撑结构112也可以延伸进入衬底170。Optionally, in some embodiments, the support structure 112 may also extend into the substrate 170.
可选地,在一些实施例中,多组翼状结构111中的单个翼状结构111可以具有向第一方向延伸的多个翼(也可以称之为分支)。另外,在一些实施例中,该多个支撑结构112中的支撑结构112在其中空区域可以设置有(具有)沿着平行于支撑结构112的方向延伸的至少一个轴。Optionally, in some embodiments, a single wing-like structure 111 in the plurality of groups of wing-like structures 111 may have multiple wings (also referred to as branches) extending in the first direction. In addition, in some embodiments, the support structure 112 of the plurality of support structures 112 may be provided with (have) at least one axis extending in a direction parallel to the support structure 112 in the hollow area thereof.
可选地,在本申请实施例中,该电容器100还包括隔离环180,该隔离环180位于该多个支撑结构112的外侧的上方,且该隔离环180用于将该叠层结构120分隔为内侧和外侧两部分,该第一外接电极130和该第二外接电极140仅与该叠层结构120位于该隔离环180的内侧的部分电连接,以及该第三外接电极150和该第四外接电极160仅与该叠层结构120位于该隔离环180的内侧的部分电连接,如图1所示。Optionally, in the embodiment of the present application, the capacitor 100 further includes an isolation ring 180, the isolation ring 180 is located above the outer side of the plurality of support structures 112, and the isolation ring 180 is used to separate the laminated structure 120 The first external electrode 130 and the second external electrode 140 are only electrically connected to the part of the laminated structure 120 located on the inner side of the isolation ring 180, and the third external electrode 150 and the fourth external electrode. The external electrode 160 is only electrically connected to the part of the laminated structure 120 located inside the isolation ring 180, as shown in FIG. 1.
可选地,该隔离环180位于该环状结构113的上方,如图1所示。Optionally, the isolation ring 180 is located above the ring structure 113, as shown in FIG. 1.
可选地,在本申请实施例中,该多个支撑结构112中的支撑结构112贯穿该衬底170,以使该衬底170的下表面能够露出叠层结构120,并且该第三外接电极150和/或该第四外接电极160电连接至该多层导电层位于该支撑结构112中的区域。例如,如图1所示,该第三外接电极150和该第四外接电极160电连接至该多层导电层分别位于不同支撑结构112中的区域。Optionally, in the embodiment of the present application, the supporting structure 112 of the plurality of supporting structures 112 penetrates the substrate 170, so that the lower surface of the substrate 170 can expose the laminated structure 120, and the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the region of the multi-layer conductive layer in the support structure 112. For example, as shown in FIG. 1, the third external electrode 150 and the fourth external electrode 160 are electrically connected to regions of the multi-layer conductive layer respectively located in different supporting structures 112.
可选地,在本申请实施例中,该电容器100还包括:至少一个第一导电 通孔结构201和至少一个第二导电通孔结构202,其中,该第一外接电极130通过该至少一个第一导电通孔结构201电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极140通过该至少一个第二导电通孔结构202电连接至的该多层导电层中的部分或者全部偶数层导电层,如图1所示。Optionally, in the embodiment of the present application, the capacitor 100 further includes: at least one first conductive via structure 201 and at least one second conductive via structure 202, wherein the first external electrode 130 passes through the at least one first conductive via structure. A conductive via structure 201 is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode 140 is electrically connected to the multilayer conductive layer through the at least one second conductive via structure 202 Some or all of the even-numbered conductive layers are as shown in Figure 1.
在一些实施例中,该第一导电通孔结构201位于该隔离环180中,该第二导电通孔结构202位于该隔离环180之外靠近该电容器100中心的区域。In some embodiments, the first conductive via structure 201 is located in the isolation ring 180, and the second conductive via structure 202 is located outside the isolation ring 180 near the center of the capacitor 100.
在另一些实施例中,该第一导电通孔结构201和/或该第二导电通孔结构202位于该隔离环180之外靠近该电容器100中心的区域。例如,如图1所示,该第一导电通孔结构201和该第二导电通孔结构202都位于该隔离环180之外靠近该电容器100中心的区域,且该第一导电通孔结构201设置于导通结构181中。In other embodiments, the first conductive via structure 201 and/or the second conductive via structure 202 are located outside the isolation ring 180 near the center of the capacitor 100. For example, as shown in FIG. 1, the first conductive via structure 201 and the second conductive via structure 202 are both located outside the isolation ring 180 near the center of the capacitor 100, and the first conductive via structure 201 Set in the conducting structure 181.
需要说明的是,在电容器100或者电容芯片的边缘位置,由于空气的绝缘能力不足,叠层结构120与环状结构113之间极易发生空气击穿,从而导致电容器的性能下降。隔离环180的设置,可以使得叠层结构120位于隔离环180外侧的区域不构成电容器100的电极板,从而,避免了电容器100的边缘位置处的叠层结构120与环状结构113之间发生空气击穿的问题。It should be noted that at the edge position of the capacitor 100 or the capacitor chip, due to the insufficient insulation capability of air, air breakdown is prone to occur between the laminated structure 120 and the ring structure 113, which results in a decrease in the performance of the capacitor. The arrangement of the isolation ring 180 can make the area of the laminated structure 120 located outside the isolation ring 180 not constitute the electrode plate of the capacitor 100, thereby avoiding the occurrence between the laminated structure 120 and the ring structure 113 at the edge of the capacitor 100. The problem of air breakdown.
还需要说明的是,导通结构181与隔离环180可以同步制备形成。It should also be noted that the conductive structure 181 and the isolation ring 180 can be prepared and formed simultaneously.
可选地,在一些实施例中,在该叠层结构120中,该多层导电层中的部分或者全部导电层与该多翼结构110共形。Optionally, in some embodiments, in the laminated structure 120, part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure 110.
可选地,在另一些实施例中,在该叠层结构120中,该多层导电层中的一部分导电层与该多翼结构110共形,另一部分导电层在外形上与该多翼结构110互补。Optionally, in other embodiments, in the laminated structure 120, a part of the conductive layer in the multilayer conductive layer is conformal to the multi-wing structure 110, and the other part of the conductive layer conforms to the multi-wing structure in appearance. 110 complementary.
例如,如图1所示,该多翼结构110包括3组翼状结构111和3个支撑结构112,3组翼状结构111从左到右依次记为组1、组2和组3,每个组都包括4个翼状结构111,其中,组1中翼状结构111仅设置于对应支撑结构112靠近右侧的外侧壁上,组2中翼状结构111围绕对应支撑结构112的外侧壁设置,组3中翼状结构111仅设置于对应支撑结构112靠近左侧的外侧壁上。该叠层结构120包括2层导电层和1层电介质层,如图1中示出的导电层21和导电层22,以及电介质层23。具体地,如图1所示,导电层21与多翼结构110直接接触,即导电层21设置于多翼结构110的表面,并且包覆多翼结构110,导电层21与多翼结构110共形;导电层22设置于导电 层21的上方,导电层22在外形上与多翼结构110互补;电介质层23设置于导电层21与导电层22之间,以将导电层21与导电层22电隔离,电介质层23也与多翼结构110共形。For example, as shown in Figure 1, the multi-wing structure 110 includes three groups of wing-like structures 111 and three supporting structures 112. The three groups of wing-like structures 111 are denoted as group 1, group 2, and group 3 from left to right. Each includes 4 wing-like structures 111, among which the wing-like structure 111 in group 1 is only arranged on the outer side wall of the corresponding support structure 112, the wing-like structure 111 in group 2 is arranged around the outer side wall of the corresponding support structure 112, and in group 3 The wing-like structure 111 is only arranged on the outer sidewall of the corresponding support structure 112 near the left side. The laminated structure 120 includes two conductive layers and one dielectric layer, such as the conductive layer 21 and the conductive layer 22 as shown in FIG. 1, and the dielectric layer 23. Specifically, as shown in FIG. 1, the conductive layer 21 is in direct contact with the multi-wing structure 110, that is, the conductive layer 21 is disposed on the surface of the multi-wing structure 110 and covers the multi-wing structure 110, and the conductive layer 21 shares the same with the multi-wing structure 110. The conductive layer 22 is arranged above the conductive layer 21, and the conductive layer 22 is complementary to the multi-wing structure 110 in shape; the dielectric layer 23 is arranged between the conductive layer 21 and the conductive layer 22 to connect the conductive layer 21 and the conductive layer 22 Electrically isolated, the dielectric layer 23 is also conformal to the multi-wing structure 110.
需要说明的是,该叠层结构120中的导电层21与多翼结构110共形,可以理解为,导电层21可以与多翼结构110具有相同或者大致相同的外形轮廓,以使导电层21可以包覆多翼结构110上与其接触的区域,从而,导电层21可以基于多翼结构110得到更大的表面积,进而提高电容器的容值密度。同理,电介质层23也与多翼结构110共形,电介质层23也可以与多翼结构110具有相同或者大致相同的外形轮廓。导电层22在外形上与多翼结构110互补,可以理解为,导电层22与多翼结构110两者组合可以形成一个内部无空隙或者空腔的结构,提升电容器的结构完整性和机械稳定性。It should be noted that the conductive layer 21 in the laminated structure 120 is conformal to the multi-wing structure 110. It can be understood that the conductive layer 21 and the multi-wing structure 110 may have the same or substantially the same outline, so that the conductive layer 21 The area in contact with the multi-wing structure 110 can be covered, so that the conductive layer 21 can obtain a larger surface area based on the multi-wing structure 110, thereby increasing the capacitance density of the capacitor. Similarly, the dielectric layer 23 is also conformal to the multi-wing structure 110, and the dielectric layer 23 may also have the same or substantially the same contour as the multi-wing structure 110. The conductive layer 22 is complementary to the multi-wing structure 110 in appearance. It can be understood that the combination of the conductive layer 22 and the multi-wing structure 110 can form a structure without internal voids or cavities, which improves the structural integrity and mechanical stability of the capacitor. .
可选地,在一些实施例中,该多翼结构110由导电材料制成,该第二外接电极140电连接至该多翼结构110。也即,在该多翼结构110导电的情况下,该多翼结构110也可以作为该电容器100的一个电极板。Optionally, in some embodiments, the multi-wing structure 110 is made of a conductive material, and the second external electrode 140 is electrically connected to the multi-wing structure 110. That is, when the multi-wing structure 110 is conductive, the multi-wing structure 110 can also be used as an electrode plate of the capacitor 100.
可选地,在另一些实施例中,该多翼结构110包括主体材料和主体材料表面的导电层或导电区域,该第二外接电极140通过与主体材料和主体材料表面的导电层或导电区域电连接与该多翼结构110的电连接。Optionally, in other embodiments, the multi-wing structure 110 includes a main body material and a conductive layer or area on the surface of the main body material, and the second external electrode 140 passes through the conductive layer or area on the surface of the main body material and the main body material. The electrical connection is with the electrical connection of the multi-wing structure 110.
需要说明的是,在该第二外接电极140还电连接至该多翼结构110的情况下,该多翼结构110与该叠层结构120之间需要进行电隔离,例如,该多翼结构110与该叠层结构120之间设置有一层电介质层。It should be noted that when the second external electrode 140 is also electrically connected to the multi-wing structure 110, the multi-wing structure 110 and the laminated structure 120 need to be electrically isolated, for example, the multi-wing structure 110 A dielectric layer is provided between the laminated structure 120 and the laminated structure 120.
可选地,该多翼结构110导电,可以理解为,该多翼结构110由电阻率小于阈值的材料形成,或者,该多翼结构110的表面形成有重掺杂的电阻率小于阈值的导电层或者导电区域。Optionally, the multi-wing structure 110 is conductive. It can be understood that the multi-wing structure 110 is formed of a material with a resistivity less than a threshold value, or the surface of the multi-wing structure 110 is formed with a highly doped conductive material with a resistivity less than the threshold value. Layer or conductive area.
例如,可以对该多翼结构110进行掺杂,形成p++型或n++型的低电阻率导电层或导电区域。For example, the multi-wing structure 110 may be doped to form a p++-type or n++-type low-resistivity conductive layer or conductive region.
又例如,在该多翼结构110的表面沉积低电阻率导电材料,如用PVD或ALD工艺沉积TiN和/或TaN和/或Pt等金属,或者用CVD工艺,沉积重掺杂多晶硅、金属钨、碳材料。For another example, a low-resistivity conductive material is deposited on the surface of the multi-wing structure 110, such as using a PVD or ALD process to deposit TiN and/or TaN and/or Pt and other metals, or using a CVD process to deposit heavily doped polysilicon, metal tungsten , Carbon materials.
应理解,电阻率小于阈值的材料即可认为是导电材料。It should be understood that a material with a resistivity less than the threshold value can be regarded as a conductive material.
需要说明的是,该多翼结构110由电阻率小于阈值的材料形成,可以保证该多翼结构110导电,即可以作为电容器100的一个电极板。It should be noted that the multi-wing structure 110 is formed of a material with a resistivity less than a threshold, which can ensure that the multi-wing structure 110 is conductive, that is, it can be used as an electrode plate of the capacitor 100.
可选地,在本申请实施例中,该电容器100还包括:填充结构190,该填充结构190包覆该叠层结构120,并填充该叠层结构120形成的空腔或者空隙,如图1所示。从而可以提升电容器的结构完整性和机械稳定性。Optionally, in the embodiment of the present application, the capacitor 100 further includes: a filling structure 190 that covers the laminated structure 120 and fills the cavity or gap formed by the laminated structure 120, as shown in FIG. 1 Shown. Thereby, the structural integrity and mechanical stability of the capacitor can be improved.
可选地,在一些实施例中,该填充结构190在外形上与该叠层结构120互补。例如,该填充结构190可以与该叠层结构120在结构上互补,两者组合可以形成一个内部无空隙或者空腔的结构,提升电容器的结构完整性和机械稳定性。Optionally, in some embodiments, the filling structure 190 is complementary to the laminated structure 120 in shape. For example, the filling structure 190 can be structurally complementary to the laminated structure 120, and the combination of the two can form a structure with no internal voids or cavities, which improves the structural integrity and mechanical stability of the capacitor.
需要说明的是,该填充结构190的材料可以是导电材料,例如金属钨,也可以是一些其他的材料,本申请对此并不限定。It should be noted that the material of the filling structure 190 may be a conductive material, such as metal tungsten, or some other materials, which is not limited in this application.
可选地,在该填充结构190的材料为导电材料的情况下,该填充结构190也可以作为该电容器100的一个电极板。Optionally, when the material of the filling structure 190 is a conductive material, the filling structure 190 may also be used as an electrode plate of the capacitor 100.
可选地,在本申请实施例中,该第一外接电极130和/或该第二外接电极140通过位于该多翼结构110上方的第一互联结构200电连接至该多层导电层中的导电层。Optionally, in the embodiment of the present application, the first external electrode 130 and/or the second external electrode 140 are electrically connected to the multi-layer conductive layer through the first interconnection structure 200 located above the multi-wing structure 110 Conductive layer.
可选地,该第一互联结构200包括至少一个第一导电通孔结构201、至少一个第二导电通孔结构202和至少一个第一绝缘层203,其中,该第一导电通孔结构201和该第二导电通孔结构202贯穿该至少一个第一绝缘层203,该第一外接电极130通过该至少一个第一导电通孔结构201电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极140通过该至少一个第二导电通孔结构202电连接至的该多层导电层中的部分或者全部偶数层导电层。具体如图1所示,该第一互联结构200设置于填充结构190的上方。Optionally, the first interconnection structure 200 includes at least one first conductive via structure 201, at least one second conductive via structure 202, and at least one first insulating layer 203, wherein the first conductive via structure 201 and The second conductive via structure 202 penetrates the at least one first insulating layer 203, and the first external electrode 130 is electrically connected to some or all of the odd-numbered layers of the multilayer conductive layer through the at least one first conductive via structure 201 A conductive layer, the second external electrode 140 is electrically connected to some or all of the even-numbered conductive layers in the multilayer conductive layer through the at least one second conductive via structure 202. Specifically, as shown in FIG. 1, the first interconnect structure 200 is disposed above the filling structure 190.
需要说明的是,该至少一个第一绝缘层203也可以称之为金属间介质层(IMD)或者层间介质层(ILD),另外,该至少一个第一绝缘层203与该隔离环180具有相同的材料,换句话说,该至少一个第一绝缘层203与该隔离环180可以在相同的步骤中形成。It should be noted that the at least one first insulating layer 203 may also be referred to as an intermetal dielectric layer (IMD) or an interlayer dielectric layer (ILD). In addition, the at least one first insulating layer 203 and the isolation ring 180 have The same material, in other words, the at least one first insulating layer 203 and the isolation ring 180 can be formed in the same step.
可选地,该至少一个第一绝缘层203的材料可以是有机的聚合物材料,包括聚酰亚胺(Polyimide),帕里纶(Parylene),苯并环丁烯(BCB)等;也可以是一些无机材料,包括旋转涂布玻璃(Spin on glass,SOG),未掺杂硅玻璃(Undoped Silicon Glass,USG),硼硅玻璃(boro-silicate glass,BSG),磷硅玻璃(phospho-silicate glass,PSG),硼磷硅玻璃(boro-phospho-silicate glass,BPSG),四乙氧基硅烷(Tetraethyl Orthosilicate,TEOS),硅的氧化 物、氮化物、碳化物、陶瓷;还可以是上述材料的组合或者叠层。Optionally, the material of the at least one first insulating layer 203 may be an organic polymer material, including polyimide, Parylene, benzocyclobutene (BCB), etc.; or It is some inorganic materials, including spin-on glass (SOG), undoped silicon glass (USG), boro-silicate glass (BSG), and phospho-silicate glass (phospho-silicate glass). glass, PSG), boro-phospho-silicate glass (BPSG), Tetraethyl Orthosilicate (TEOS), silicon oxide, nitride, carbide, ceramic; it can also be the above materials A combination or stack of layers.
可选地,该第一导电通孔结构201和该第二导电通孔结构202的材料可以由低电阻率导电材料构成,如重掺杂多晶硅,钨,Ti,TiN,Ta,TaN等。Optionally, the materials of the first conductive via structure 201 and the second conductive via structure 202 can be made of low-resistivity conductive materials, such as heavily doped polysilicon, tungsten, Ti, TiN, Ta, TaN, and the like.
应理解,第一导电通孔结构201和第二导电通孔结构202的形状和数量可以根据该电容器100的制作工艺具体确定,本申请实施例对此不作限定。It should be understood that the shape and number of the first conductive via structure 201 and the second conductive via structure 202 may be specifically determined according to the manufacturing process of the capacitor 100, which is not limited in the embodiment of the present application.
可选地,在一些实施例中,该至少一个第一外接电极130和该至少一个第二外接电极140设置于该多翼结构110的上方。可选地,该电容器100还包括:第一电极层,设置于该叠层结构120的上方,且该第一电极层包括相互分离的至少一个第一导电区域和至少一个第二导电区域,该第一导电区域形成该第一外接电极130,该第二导电区域形成该第二外接电极140,具体如图1所示。也即,该至少一个第一外接电极130和该至少一个第二外接电极140可以通过一次刻蚀形成,减少了刻蚀步骤。Optionally, in some embodiments, the at least one first external electrode 130 and the at least one second external electrode 140 are disposed above the multi-wing structure 110. Optionally, the capacitor 100 further includes: a first electrode layer disposed above the laminated structure 120, and the first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other. The first conductive area forms the first external electrode 130, and the second conductive area forms the second external electrode 140, as specifically shown in FIG. 1. That is, the at least one first external electrode 130 and the at least one second external electrode 140 can be formed by one etching, which reduces the etching steps.
具体地,如图1所示,该第一电极层设置于该第一互联结构200的上方,该第一外接电极130通过第一导电通孔结构201电连接至导电层21,该第二外接电极140通过第二导电通孔结构202电连接至导电层22。Specifically, as shown in FIG. 1, the first electrode layer is disposed above the first interconnect structure 200, the first external electrode 130 is electrically connected to the conductive layer 21 through the first conductive via structure 201, and the second external The electrode 140 is electrically connected to the conductive layer 22 through the second conductive via structure 202.
可选地,在本申请实施例中,该第三外接电极150和/或该第四外接电极160通过位于该多翼结构110下方的第二互联结构210电连接至该多层导电层中的导电层。Optionally, in the embodiment of the present application, the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the multi-layer conductive layer through the second interconnection structure 210 located under the multi-wing structure 110 Conductive layer.
可选地,该第二互联结构210包括至少一个第三导电通孔结构211、至少一个第四导电通孔结构212和至少一个第二绝缘层213,其中,该第三导电通孔结构211和该第四导电通孔结构212贯穿该至少一个第二绝缘层213,该第三外接电极150通过该至少一个第三导电通孔结构211电连接至该多层导电层中的部分或者全部奇数层导电层,该第四外接电极160通过该至少一个第四导电通孔结构212电连接至的该多层导电层中的部分或者全部偶数层导电层。具体如图1所示,该第二互联结构210设置于衬底170的下方。Optionally, the second interconnection structure 210 includes at least one third conductive via structure 211, at least one fourth conductive via structure 212, and at least one second insulating layer 213, wherein the third conductive via structure 211 and The fourth conductive via structure 212 penetrates the at least one second insulating layer 213, and the third external electrode 150 is electrically connected to some or all of the odd-numbered layers of the multilayer conductive layer through the at least one third conductive via structure 211 A conductive layer, the fourth external electrode 160 is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer through the at least one fourth conductive via structure 212. Specifically, as shown in FIG. 1, the second interconnection structure 210 is disposed under the substrate 170.
需要说明的是,该至少一个第二绝缘层213也可以称之为金属间介质层(IMD)或者层间介质层(ILD)。It should be noted that the at least one second insulating layer 213 may also be referred to as an intermetal dielectric layer (IMD) or an interlayer dielectric layer (ILD).
可选地,该至少一个第二绝缘层213的材料可以是有机的聚合物材料,包括聚酰亚胺(Polyimide),帕里纶(Parylene),苯并环丁烯(BCB)等;也可以是一些无机材料,包括SOG,USG,BSG,PSG,BPSG,TEOS,硅的氧化物、氮化物、碳化物、陶瓷;还可以是上述材料的组合或者叠层。Optionally, the material of the at least one second insulating layer 213 may be an organic polymer material, including polyimide, Parylene, benzocyclobutene (BCB), etc.; or It is some inorganic materials, including SOG, USG, BSG, PSG, BPSG, TEOS, silicon oxides, nitrides, carbides, and ceramics; it can also be a combination or laminate of the above materials.
可选地,该第三导电通孔结构211和该第四导电通孔结构212的材料可以由低电阻率导电材料构成,如重掺杂多晶硅,钨,Ti,TiN,Ta,TaN等。Optionally, the materials of the third conductive via structure 211 and the fourth conductive via structure 212 may be made of low-resistivity conductive materials, such as heavily doped polysilicon, tungsten, Ti, TiN, Ta, TaN, and the like.
应理解,第三导电通孔结构211和第四导电通孔结构212的形状和数量可以根据该电容器100的制作工艺具体确定,本申请实施例对此不作限定。It should be understood that the shape and quantity of the third conductive via structure 211 and the fourth conductive via structure 212 may be specifically determined according to the manufacturing process of the capacitor 100, which is not limited in the embodiment of the present application.
可选地,在一些实施例中,该至少一个第三外接电极150和该至少一个第四外接电极160设置于该多翼结构110的下方。可选地,该电容器100还包括:第二电极层,设置于该多翼结构110的下方,且该第二电极层包括相互分离的至少一个第三导电区域和至少一个第四导电区域,该第三导电区域形成该第三外接电极150,该第四导电区域形成该第四外接电极160,具体如图1所示。也即,该至少一个第三外接电极150和该至少一个第四外接电极160可以通过一次刻蚀形成,减少了刻蚀步骤。Optionally, in some embodiments, the at least one third external electrode 150 and the at least one fourth external electrode 160 are disposed under the multi-wing structure 110. Optionally, the capacitor 100 further includes: a second electrode layer disposed under the multi-wing structure 110, and the second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other. The third conductive area forms the third external electrode 150, and the fourth conductive area forms the fourth external electrode 160, as specifically shown in FIG. 1. That is, the at least one third external electrode 150 and the at least one fourth external electrode 160 can be formed by one etching, which reduces the number of etching steps.
具体地,如图1所示,该第二电极层设置于该第二互联结构210的下方,该第三外接电极150通过第三导电通孔结构211电连接至导电层21,该第四外接电极160通过第四导电通孔结构212电连接至导电层22。Specifically, as shown in FIG. 1, the second electrode layer is disposed under the second interconnection structure 210, the third external electrode 150 is electrically connected to the conductive layer 21 through the third conductive via structure 211, and the fourth external connection electrode 150 is electrically connected to the conductive layer 21 through the third conductive via structure 211. The electrode 160 is electrically connected to the conductive layer 22 through the fourth conductive via structure 212.
可选地,在一个实施例中,如图2所示,该多翼结构110设置于衬底170的上方,该多翼结构110包括3组翼状结构111和3个支撑结构112,3组翼状结构111从左到右依次记为组1、组2和组3,每个组都包括4个翼状结构111,其中,组1中翼状结构111仅设置于对应支撑结构112靠近右侧的外侧壁上,组2中翼状结构111围绕对应支撑结构112的外侧壁设置,组3中翼状结构111仅设置于对应支撑结构112靠近左侧的外侧壁上。该3个支撑结构112中的支撑结构112贯穿该衬底170,以使该衬底170的下表面能够露出叠层结构120。从而可以增大支撑结构112的侧壁面积,增大该叠层结构120的表面积,提升电容密度,同时,也可以提高多翼结构110的机械稳定性。Optionally, in one embodiment, as shown in FIG. 2, the multi-wing structure 110 is disposed above the substrate 170, and the multi-wing structure 110 includes three groups of wing-shaped structures 111 and three supporting structures 112, and three groups of wing-shaped structures. The structure 111 is marked as group 1, group 2 and group 3 from left to right. Each group includes 4 wing-like structures 111. The wing-like structure 111 in group 1 is only arranged on the outer side wall of the corresponding support structure 112 near the right side. Above, the wing-like structure 111 in the group 2 is arranged around the outer side wall of the corresponding support structure 112, and the wing-like structure 111 in the group 3 is only arranged on the outer side wall of the corresponding support structure 112 near the left side. The supporting structure 112 of the three supporting structures 112 penetrates the substrate 170 so that the lower surface of the substrate 170 can expose the laminated structure 120. Thereby, the sidewall area of the supporting structure 112 can be increased, the surface area of the laminated structure 120 can be increased, and the capacitance density can be increased. At the same time, the mechanical stability of the multi-wing structure 110 can be improved.
可选地,在另一个实施例中,如图3所示,该多翼结构110设置于衬底170的上方,与图2所示实施例相似,该多翼结构110包括3组翼状结构111和3个支撑结构112,3组翼状结构111从左到右依次记为组1、组2和组3,每个组都包括4个翼状结构111,其中,组1中翼状结构111仅设置于对应支撑结构112靠近右侧的外侧壁上,组2中翼状结构111围绕对应支撑结构112的外侧壁设置,组3中翼状结构111仅设置于对应支撑结构112靠近左侧的外侧壁上。但与图2实施例不同之处主要在于,不同组中与该衬底170 接触的翼状结构111(也就是最下面的翼状结构)在不同的支撑结构112之间存在非连续区域,该衬底170在该非连续区域处形成衬底沟槽171。也就是说,该叠层结构120可以设置于该衬底沟槽171内,从而可以增大该叠层结构120的表面积,提升电容密度,同时,也可以提高多翼结构110的机械稳定性。Optionally, in another embodiment, as shown in FIG. 3, the multi-wing structure 110 is disposed above the substrate 170. Similar to the embodiment shown in FIG. 2, the multi-wing structure 110 includes three groups of wing-like structures 111 And 3 supporting structures 112, the 3 groups of wing-like structures 111 are marked as group 1, group 2 and group 3 from left to right. Each group includes 4 wing-like structures 111. Among them, the wing-like structures 111 in group 1 are only arranged in Corresponding to the outer side wall of the support structure 112 on the right side, the wing-like structure 111 in group 2 is arranged around the outer side wall of the corresponding support structure 112, and the wing-like structure 111 in the group 3 is only arranged on the outer side wall of the corresponding support structure 112 on the left side. However, the main difference from the embodiment in FIG. 2 is that the wing-shaped structure 111 (that is, the bottom wing-shaped structure) in contact with the substrate 170 in different groups has a discontinuous area between the different support structures 112, and the substrate 170 forms a substrate trench 171 at the discontinuous area. In other words, the laminated structure 120 can be disposed in the substrate trench 171, so that the surface area of the laminated structure 120 can be increased, the capacitance density can be increased, and the mechanical stability of the multi-wing structure 110 can be improved.
需要说明的是,本申请对图3中衬底沟槽171的深度并不限定。It should be noted that the present application does not limit the depth of the substrate trench 171 in FIG. 3.
可选地,在本申请实施例中,该电容器100还包括环状结构113,该环状结构113位于该多个支撑结构112和该多组翼状结构111的外侧,如图1至图3所示,该环状结构113的俯视图可以如图4所示。该环状结构113可以在一定程度上对支撑结构112起到支撑和保护的作用,同时该环状结构113也可以形成电容芯片的边缘区域,方便后续电容器100制备。Optionally, in the embodiment of the present application, the capacitor 100 further includes a ring structure 113, which is located outside the plurality of support structures 112 and the plurality of sets of wing-shaped structures 111, as shown in FIGS. 1 to 3 As shown, the top view of the ring structure 113 may be as shown in FIG. 4. The ring structure 113 can support and protect the support structure 112 to a certain extent. At the same time, the ring structure 113 can also form the edge area of the capacitor chip to facilitate subsequent preparation of the capacitor 100.
可选地,该环状结构113由多层第一材料层10和多层第二材料层20交替堆叠形成。例如,图1至图3所示,该环状结构113由4层第一材料层10和3层第二材料层20交替堆叠形成。Optionally, the ring structure 113 is formed by alternately stacking multiple first material layers 10 and multiple second material layers 20. For example, as shown in FIGS. 1 to 3, the ring structure 113 is formed by alternately stacking 4 layers of first material 10 and 3 layers of second material 20.
可选地,该多翼结构110由该第一材料形成,即多翼结构可以与环状结构的某层使用相同材料。另外,该多翼结构110也可以由其他材料形成,本申请对此并不限定。Optionally, the multi-wing structure 110 is formed of the first material, that is, the multi-wing structure may use the same material as a certain layer of the ring structure. In addition, the multi-wing structure 110 may also be formed of other materials, which is not limited in this application.
可选地,该第一材料或该第二材料可以是硅(包括单晶硅、多晶硅、不定形硅),硅的氧化物、氮化物或碳化物、含硅玻璃(包括未掺杂硅玻璃(Undoped Silicon Glass,USG)、硼硅玻璃(boro-silicate glass,BSG)、磷硅玻璃(phospho-silicate glass,PSG)、硼磷硅玻璃(boro-phospho-silicate glass,BPSG)),铝(Al)、铜(Cu)、镍(Ni)等金属,或金属氮化物、碳化物,碳,有机聚合物,或者上述材料的组合或叠层结构。Optionally, the first material or the second material may be silicon (including single crystal silicon, polycrystalline silicon, amorphous silicon), silicon oxide, nitride or carbide, silicon-containing glass (including undoped silicon glass) (Undoped Silicon Glass, USG), boro-silicate glass (BSG), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), aluminum ( Al), copper (Cu), nickel (Ni) and other metals, or metal nitrides, carbides, carbon, organic polymers, or a combination or laminated structure of the above materials.
需要理解的是,该第一材料和该第二材料是两类材料的组合。相对于该第一材料,该第二材料可以被选择性去除。具体地,在同一腐蚀或刻蚀环境,该第一材料和该第二材料的腐蚀(或刻蚀)速率的差异大于5倍。即在一些特定的环境中,相对于该第一材料,该第二材料更容易被腐蚀(或刻蚀)掉。It should be understood that the first material and the second material are a combination of two types of materials. With respect to the first material, the second material can be selectively removed. Specifically, in the same corrosion or etching environment, the difference in the corrosion (or etching) rate of the first material and the second material is greater than 5 times. That is, in some specific environments, compared to the first material, the second material is more likely to be corroded (or etched) away.
例如,第一材料可以是硅,第二材料可以是氧化硅,用氢氟酸溶液或气体可以去除氧化硅并保留硅。例如,在制备多组翼状结构111的过程中,支撑结构112和翼状结构111的材料可以是硅,同一组中的不同翼状结构111之间的材料可以是氧化硅,从而用氢氟酸溶液或气体选择性的去除氧化硅并 保留硅,以形成多组翼状结构111。For example, the first material may be silicon, and the second material may be silicon oxide. The silicon oxide can be removed with a hydrofluoric acid solution or gas and the silicon can be retained. For example, in the process of preparing multiple groups of wing-like structures 111, the material of the support structure 112 and the wing-like structure 111 may be silicon, and the material between the different wing-like structures 111 in the same group may be silicon oxide, so that hydrofluoric acid solution or The gas selectively removes silicon oxide and retains silicon to form groups of wing-like structures 111.
再例如,第一材料可以是氧化硅,第二材料可以是硅,用KOH或NaOH或四甲基氢氧化铵(Tetra methyl ammonium Hydroxide,TMAH)溶液,或二氟化氙(XeF 2)气体,可以去除硅而保留氧化硅。例如,在制备多组翼状结构111的过程中,支撑结构112和翼状结构111的材料可以是氧化硅,同一组中的不同翼状结构111之间的材料可以是硅,从而用KOH或NaOH或TMAH溶液或二氟化氙(XeF 2)气体选择性的去除硅并保留氧化硅,以形成多组翼状结构111。 For another example, the first material may be silicon oxide, and the second material may be silicon, using KOH or NaOH or Tetra methyl ammonium Hydroxide (TMAH) solution, or xenon difluoride (XeF 2 ) gas, The silicon can be removed while the silicon oxide remains. For example, in the process of preparing multiple groups of wing-like structures 111, the material of the supporting structure 112 and the wing-like structure 111 may be silicon oxide, and the material between different wing-like structures 111 in the same group may be silicon, so that KOH or NaOH or TMAH is used. The solution or xenon difluoride (XeF 2 ) gas selectively removes silicon and retains silicon oxide to form groups of wing-like structures 111.
再例如,第一材料可以是氧化硅,第二材料是氮化硅,用热的磷酸溶液,可以较为快速地去除氮化硅,而保留氧化硅。例如,在制备多组翼状结构111的过程中,支撑结构112和翼状结构111的材料可以是氧化硅,同一组中的不同翼状结构111之间的材料可以是氮化硅,从而用热的磷酸溶液选择性的去除氮化硅并保留氧化硅,以形成多组翼状结构111。For another example, the first material may be silicon oxide and the second material is silicon nitride. Using a hot phosphoric acid solution, silicon nitride can be removed relatively quickly, while silicon oxide is retained. For example, in the process of preparing multiple groups of wing-like structures 111, the material of the support structure 112 and the wing-like structure 111 may be silicon oxide, and the material between different wing-like structures 111 in the same group may be silicon nitride, so that hot phosphoric acid is used. The solution selectively removes silicon nitride and retains silicon oxide to form groups of wing-like structures 111.
需要说明的是,在本申请实施例中,该叠层结构120可以在该环状结构113的上方区域形成台阶结构,以通过台阶结构的不同台阶面露出该多层导电层中的不同导电层。从而,该第一外接电极130可以通过该台阶结构电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极140也可以通过该台阶结构电连接至该多层导电层中的部分或者全部偶数层导电层。此结构可以将叠层结构120所形成的多个“导电-介电-导电”基本电容单元并联成为一个大容量的电容器。It should be noted that, in the embodiment of the present application, the stacked structure 120 may form a step structure in the upper region of the ring structure 113, so as to expose different conductive layers in the multi-layer conductive layer through different step surfaces of the step structure. . Therefore, the first external electrode 130 can be electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the step structure, and the second external electrode 140 can also be electrically connected to the multilayer conductive layer through the step structure. Part or all of the even-numbered conductive layers in the layers. In this structure, a plurality of "conductive-dielectric-conductive" basic capacitance units formed by the laminated structure 120 can be connected in parallel to form a large-capacity capacitor.
可选地,在一些实施例中,该多组翼状结构111中的单个翼状结构111包括沿着该第一方向延伸的多个翼11(也可以称之为分支)。例如,如图5所示,该多翼结构110包括2组翼状结构111和2个支撑结构112,支撑结构112为中空柱状的,2组翼状结构111从左到右依次记为组1和组2,每个组都包括沿第一方向间隔平行排列的4个翼状结构111,其中,组1和组2中翼状结构111围绕对应支撑结构112的外侧壁设置。并且组1和组2中的4个翼状结构111中的每个翼状结构111包括2个翼11。即翼11的设置可以进一步增加翼状结构111的表面积,且叠层结构包覆多翼结构110,进而提升电容器的容值密度。Optionally, in some embodiments, a single wing-like structure 111 in the plurality of groups of wing-like structures 111 includes a plurality of wings 11 (also referred to as branches) extending along the first direction. For example, as shown in FIG. 5, the multi-wing structure 110 includes two groups of wing-like structures 111 and two supporting structures 112. The supporting structure 112 is hollow columnar. The two groups of wing-like structures 111 are marked as group 1 and group from left to right. 2. Each group includes four wing-like structures 111 arranged in parallel along the first direction at intervals, wherein the wing-like structures 111 in group 1 and group 2 are arranged around the outer side wall of the corresponding support structure 112. And each of the four wing-like structures 111 in the group 1 and the group 2 includes two wings 11. That is, the arrangement of the wings 11 can further increase the surface area of the wing-like structure 111, and the laminated structure covers the multi-wing structure 110, thereby increasing the capacitance density of the capacitor.
可选地,在一些实施例中,该多个支撑结构112中的支撑结构112在其中空区域设置有至少一个轴12。例如,如图6所示,该多翼结构110包括2 组翼状结构111和2个支撑结构112,支撑结构112为中空柱状的,2组翼状结构111从左到右依次记为组1和组2,每个组都包括沿第一方向间隔平行排列的4个翼状结构111,其中,组1和组2中翼状结构111围绕对应支撑结构112的外侧壁设置。该2个支撑结构112中的每个支撑结构112的中空区域设置有连接支撑结构112底部的2个轴12。即轴12的设置可以进一步增加支撑结构112的表面积,且叠层结构包覆多翼结构110,进而提升电容器的容值密度。Optionally, in some embodiments, the support structure 112 of the plurality of support structures 112 is provided with at least one shaft 12 in its hollow area. For example, as shown in Figure 6, the multi-wing structure 110 includes two groups of wing-like structures 111 and two supporting structures 112. The supporting structure 112 is hollow columnar. The two groups of wing-like structures 111 are denoted as group 1 and group from left to right. 2. Each group includes four wing-like structures 111 arranged in parallel along the first direction at intervals, wherein the wing-like structures 111 in group 1 and group 2 are arranged around the outer side wall of the corresponding support structure 112. The hollow area of each of the two supporting structures 112 is provided with two shafts 12 connecting the bottom of the supporting structure 112. That is, the arrangement of the shaft 12 can further increase the surface area of the support structure 112, and the laminated structure covers the multi-wing structure 110, thereby increasing the capacitance density of the capacitor.
另外,在本申请实施例中,也可以在支撑结构112的外侧设置轴状结构,本申请对此并不限定。In addition, in the embodiment of the present application, an axial structure may also be provided on the outer side of the support structure 112, which is not limited in the present application.
在本申请实施例中,该第一外接电极130电连接至该多层导电层中的部分或者全部奇数层导电层;该第二外接电极140电连接至该多层导电层中的部分或者全部偶数层导电层。该第三外接电极150电连接至该多层导电层中的部分或者全部奇数层导电层,该第四外接电极160电连接至该多层导电层中的部分或者全部偶数层导电层。In the embodiment of the present application, the first external electrode 130 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer; the second external electrode 140 is electrically connected to part or all of the multilayer conductive layer Even number of conductive layers. The third external electrode 150 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode 160 is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
因此,在一些场景下,针对不同的第一外接电极130和不同的第二外接电极140,该叠层结构120可以形成具有不同容值的电容器。同理,针对不同的第三外接电极150和不同的第四外接电极160,该叠层结构120可以形成具有不同容值的电容器。Therefore, in some scenarios, for different first external electrodes 130 and different second external electrodes 140, the laminated structure 120 can form capacitors with different capacitances. Similarly, for different third external electrodes 150 and different fourth external electrodes 160, the laminated structure 120 can form capacitors with different capacitances.
以下以第一外接电极130和第二外接电极140为例进行举例说明。第三外接电极150和第四外接电极160同样适用,为了简洁,在此不再赘述。The following takes the first external electrode 130 and the second external electrode 140 as an example for description. The third external electrode 150 and the fourth external electrode 160 are equally applicable, and for the sake of brevity, details are not described herein again.
作为一个示例,假设该电容器100包括2个第一外接电极和2个第二外接电极,2个第一外接电极分别记为第一外接电极A和第一外接电极B,2个第二外接电极分别记为第二外接电极C和第二外接电极D,以及该叠层结构包括5层导电层和4层电介质层,5层导电层依次分别记为导电层1、导电层2、导电层3、导电层4和导电层5,4层电介质层依次分别记为电介质层1、电介质层2、电介质层3和电介质层4。As an example, suppose that the capacitor 100 includes two first external electrodes and two second external electrodes, the two first external electrodes are respectively denoted as the first external electrode A and the first external electrode B, and the two second external electrodes Denoted as the second external electrode C and the second external electrode D, and the laminated structure includes 5 conductive layers and 4 dielectric layers. The 5 conductive layers are respectively denoted as conductive layer 1, conductive layer 2, and conductive layer 3. , Conductive layer 4 and conductive layer 5, the four dielectric layers are denoted as dielectric layer 1, dielectric layer 2, dielectric layer 3, and dielectric layer 4, respectively.
若该第一外接电极A电连接该导电层1和该导电层3,该第一外接电极B电连接该导电层1、该导电层3和该导电层5,该第二外接电极C电连接该导电层2和该导电层4,该第二外接电极D也电连接该导电层2和该导电层4,则针对该第一外接电极A与该第二外接电极C对应的电容器,该导电层1与该导电层2形成电容器1,容值记为C1,该导电层2与该导电层3形 成电容器2,容值记为C2,该导电层3与该导电层4形成电容器3,容值记为C3,电容器1、电容器2和电容器3并联,其等效电容i的容值记为Ci,则Ci=C1+C2+C3;则针对该第一外接电极B与该第二外接电极D对应的电容器,该导电层1与该导电层2形成电容器1,容值记为C1,该导电层2与该导电层3形成电容器2,容值记为C2,该导电层3与该导电层4形成电容器3,容值记为C3,该导电层4与该导电层5形成电容器4,容值记为C4,电容器1、电容器2、电容器3和电容器4并联,其等效电容j的容值记为Cj,则Cj=C1+C2+C3+C4。当然,针对该第一外接电极A与该第二外接电极D对应的电容器也可以形成类似的串并联结构,针对该第一外接电极B与该第二外接电极C对应的电容器也可以形成类似的串并联结构,在此不再赘述。因此,该叠层结构120可以形成具有不同容值的电容器。If the first external electrode A is electrically connected to the conductive layer 1 and the conductive layer 3, the first external electrode B is electrically connected to the conductive layer 1, the conductive layer 3 and the conductive layer 5, and the second external electrode C is electrically connected The conductive layer 2 and the conductive layer 4, and the second external electrode D is also electrically connected to the conductive layer 2 and the conductive layer 4. For the capacitors corresponding to the first external electrode A and the second external electrode C, the conductive Layer 1 and the conductive layer 2 form a capacitor 1, the capacitance value is denoted as C1, the conductive layer 2 and the conductive layer 3 form a capacitor 2, the capacitance value is denoted as C2, the conductive layer 3 and the conductive layer 4 form a capacitor 3, the capacitance The value is denoted as C3, capacitor 1, capacitor 2 and capacitor 3 are connected in parallel, and the equivalent capacitance i is denoted as Ci, then Ci=C1+C2+C3; then for the first external electrode B and the second external electrode The capacitor corresponding to D, the conductive layer 1 and the conductive layer 2 form a capacitor 1, the capacitance value is denoted as C1, the conductive layer 2 and the conductive layer 3 form a capacitor 2, the capacitance value is denoted as C2, the conductive layer 3 and the conductive layer Layer 4 forms a capacitor 3, the capacitance value is denoted as C3, the conductive layer 4 and the conductive layer 5 form a capacitor 4, the capacitance value is denoted as C4, capacitor 1, capacitor 2, capacitor 3 and capacitor 4 in parallel, its equivalent capacitance j The capacitance value is recorded as Cj, then Cj=C1+C2+C3+C4. Of course, the capacitors corresponding to the first external electrode A and the second external electrode D can also be formed in a similar series-parallel structure, and the capacitors corresponding to the first external electrode B and the second external electrode C can also be formed similarly. The series-parallel structure will not be repeated here. Therefore, the stacked structure 120 can form capacitors with different capacitances.
若该第一外接电极A电连接该导电层1和该导电层5,该第一外接电极B电连接该导电层3和该导电层5,该第二外接电极C电连接该导电层2和该导电层4,该第二外接电极D也电连接该导电层4,则针对该第一外接电极A与该第二外接电极C对应的电容器,该导电层1与该导电层2形成电容器1,容值记为C1,该导电层2与该导电层4形成电容器2,容值记为C2,电容器1和电容器2并联,其等效电容i的容值记为Ci,则Ci=C1+C2;则针对该第一外接电极B与该第二外接电极D对应的电容器,该导电层3与该导电层4形成电容器3,容值记为C3,该导电层4与该导电层5形成电容器4,容值记为C4,电容器3和电容器4并联,其等效电容j的容值记为Cj,则Cj=C3+C4。因此,该叠层结构120可以形成具有不同容值的电容器。If the first external electrode A is electrically connected to the conductive layer 1 and the conductive layer 5, the first external electrode B is electrically connected to the conductive layer 3 and the conductive layer 5, and the second external electrode C is electrically connected to the conductive layer 2 and The conductive layer 4 and the second external electrode D are also electrically connected to the conductive layer 4. For the capacitors corresponding to the first external electrode A and the second external electrode C, the conductive layer 1 and the conductive layer 2 form a capacitor 1 , The capacitance value is denoted as C1, the conductive layer 2 and the conductive layer 4 form a capacitor 2, the capacitance value is denoted as C2, the capacitor 1 and the capacitor 2 are in parallel, and the equivalent capacitance i is denoted as Ci, then Ci=C1+ C2; For the capacitor corresponding to the first external electrode B and the second external electrode D, the conductive layer 3 and the conductive layer 4 form a capacitor 3, the capacitance value is denoted as C3, and the conductive layer 4 and the conductive layer 5 form The capacitance value of the capacitor 4 is denoted as C4, the capacitor 3 and the capacitor 4 are connected in parallel, and the capacitance value of the equivalent capacitance j is denoted as Cj, then Cj=C3+C4. Therefore, the stacked structure 120 can form capacitors with different capacitances.
优选地,该第一外接电极130电连接至该多层导电层中的所有奇数层导电层;该第二外接电极140电连接至该多层导电层中的所有偶数层导电层。从而可以充分发挥叠层结构增加电容器的容值密度的效果。Preferably, the first external electrode 130 is electrically connected to all odd-numbered conductive layers in the multilayer conductive layer; the second external electrode 140 is electrically connected to all even-numbered conductive layers in the multilayer conductive layer. Thus, the effect of the laminated structure of increasing the capacitance density of the capacitor can be fully exerted.
作为一个示例,假设该电容器100包括2个第一外接电极和2个第二外接电极,2个第一外接电极分别记为第一外接电极A和第一外接电极B,2个第二外接电极分别记为第二外接电极C和第二外接电极D,以及该叠层结构包括5层导电层和4层电介质层,5层导电层依次分别记为导电层1、导电层2、导电层3、导电层4和导电层5,4层电介质层依次分别记为电介质层1、电介质层2、电介质层3和电介质层4。As an example, suppose that the capacitor 100 includes two first external electrodes and two second external electrodes, the two first external electrodes are respectively denoted as the first external electrode A and the first external electrode B, and the two second external electrodes Denoted as the second external electrode C and the second external electrode D, and the laminated structure includes 5 conductive layers and 4 dielectric layers. The 5 conductive layers are respectively denoted as conductive layer 1, conductive layer 2, and conductive layer 3. , Conductive layer 4 and conductive layer 5, the four dielectric layers are denoted as dielectric layer 1, dielectric layer 2, dielectric layer 3, and dielectric layer 4, respectively.
若该第一外接电极A电连接该导电层1、该导电层3和该导电层5,该 第一外接电极B电连接该导电层1、该导电层3和该导电层5,该第二外接电极C电连接该导电层2和该导电层4,该第二外接电极D也电连接该导电层2和该导电层4,则针对该第一外接电极A与该第二外接电极C对应的电容器,该导电层1与该导电层2形成电容器1,容值记为C1,该导电层2与该导电层3形成电容器2,容值记为C2,该导电层3与该导电层4形成电容器3,容值记为C3,该导电层4与该导电层5形成电容器4,容值记为C4,电容器1、电容器2、电容器3和电容器4并联,其等效电容i的容值记为Ci,则Ci=C1+C2+C3+C4;则针对该第一外接电极B与该第二外接电极D对应的电容器,该导电层1与该导电层2形成电容器1,容值记为C1,该导电层2与该导电层3形成电容器2,容值记为C2,该导电层3与该导电层4形成电容器3,容值记为C3,该导电层4与该导电层5形成电容器4,容值记为C4,电容器1、电容器2、电容器3和电容器4并联,其等效电容j的容值记为Cj,则Cj=C1+C2+C3+C4。If the first external electrode A is electrically connected to the conductive layer 1, the conductive layer 3 and the conductive layer 5, and the first external electrode B is electrically connected to the conductive layer 1, the conductive layer 3 and the conductive layer 5, the second The external electrode C is electrically connected to the conductive layer 2 and the conductive layer 4, and the second external electrode D is also electrically connected to the conductive layer 2 and the conductive layer 4, so the first external electrode A corresponds to the second external electrode C The conductive layer 1 and the conductive layer 2 form a capacitor 1, the capacitance value is denoted as C1, the conductive layer 2 and the conductive layer 3 form a capacitor 2, the capacitance value is denoted as C2, the conductive layer 3 and the conductive layer 4 A capacitor 3 is formed, the capacitance value is denoted as C3, the conductive layer 4 and the conductive layer 5 form a capacitor 4, the capacitance value is denoted as C4, the capacitor 1, the capacitor 2, the capacitor 3 and the capacitor 4 are connected in parallel, and the equivalent capacitance i is Marked as Ci, then Ci=C1+C2+C3+C4; then for the capacitor corresponding to the first external electrode B and the second external electrode D, the conductive layer 1 and the conductive layer 2 form a capacitor 1, and the capacitance is recorded C1, the conductive layer 2 and the conductive layer 3 form a capacitor 2, the capacitance value is denoted as C2, the conductive layer 3 and the conductive layer 4 form a capacitor 3, the capacitance value is denoted as C3, the conductive layer 4 and the conductive layer 5 The capacitor 4 is formed, the capacitance value is denoted as C4, the capacitor 1, the capacitor 2, the capacitor 3 and the capacitor 4 are connected in parallel, and the capacitance value of the equivalent capacitance j is denoted as Cj, then Cj=C1+C2+C3+C4.
可选地,在一些实施例中,在该衬底170由导电材料制成,该第三外接电极150通过该衬底170电连接至该多层导电层中与该衬底170接触的导电层。具体地,如图7所示,该第三外接电极150通过该衬底170电连接至导电层21,该第四外接电极160通过第四导电通孔结构212电连接至导电层22。Optionally, in some embodiments, the substrate 170 is made of a conductive material, and the third external electrode 150 is electrically connected to the conductive layer of the multilayer conductive layer that is in contact with the substrate 170 through the substrate 170 . Specifically, as shown in FIG. 7, the third external electrode 150 is electrically connected to the conductive layer 21 through the substrate 170, and the fourth external electrode 160 is electrically connected to the conductive layer 22 through the fourth conductive via structure 212.
可选地,作为一个示例,如图8所示,电容器P和电容器Q具有与如图1所示的电容器100相同的结构,且电容器P和电容器Q垂直堆叠,电容器Q位于电容器P的上方,位于电容器P上表面的外接电极与位于电容器Q下表面的外接电极电连接,电容器P的容值记为Cp,电容器Q的容值记为Cq,电容器P和电容器Q并联,其等效电容器的容值记为C0,则C0=Cp+Cq。Optionally, as an example, as shown in FIG. 8, the capacitor P and the capacitor Q have the same structure as the capacitor 100 shown in FIG. 1, and the capacitor P and the capacitor Q are stacked vertically, and the capacitor Q is located above the capacitor P, The external electrode located on the upper surface of the capacitor P is electrically connected to the external electrode located on the lower surface of the capacitor Q. The capacitance value of the capacitor P is recorded as Cp, the capacitance value of the capacitor Q is recorded as Cq, and the capacitor P and the capacitor Q are connected in parallel. The capacitance value is recorded as C0, then C0=Cp+Cq.
需要说明的是,图8是电容芯片(电容器)制备好以后的一种使用方式,可以理解,制备四个外接电极的目的就是保留了与其他独立电容芯片直接组合起来形成更大电容的接口,如果没有多出来两个外接电极,那么就需要在电路板上另外制作连接线路把两颗电容芯片并联起来,这样水平方向占用面积(也就是占印制电路板(Printed Circuit Board,PCB)面积)大,竖直方向堆叠的话,可以省PCB板面积。It should be noted that Figure 8 is a use method after the capacitor chip (capacitor) is prepared. It can be understood that the purpose of preparing four external electrodes is to retain the interface that can be directly combined with other independent capacitor chips to form a larger capacitance. If there are not two more external electrodes, then you need to make additional connection lines on the circuit board to connect the two capacitor chips in parallel, so that the horizontal direction occupies the area (that is, the printed circuit board (Printed Circuit Board, PCB) area) Large, vertical stacking can save PCB board area.
因此,在本申请实施例中,以多翼结构为骨架,在多翼结构上设置叠层结构,从而可以增加叠层结构的表面积,能够在较小器件尺寸(电容芯片尺 寸)的情况下得到较大的电容值,提高电容器的容值密度,并在电容器的正、反两面都设置了电容器的多个电极,从而可以基于多翼结构制备双面电容器,便于将电容器以垂直堆叠的方式与其他电容器并联,满足不同的应用需求。进一步地,在本申请实施例中,相对于实心的支撑结构,本申请中的支撑结构为中空的结构,其可以具有更大的表面积,并且相对于柱状的支撑结构,本申请中的翼状结构为支撑结构的外侧壁上形成的凸起结构,即支撑结构的外侧壁上形成有翼状支撑,从而可以增加多翼结构的表面积,并且在本申请中叠层结构包覆多翼结构,在多翼结构的表面积增加的同时,叠层结构的表面积也会相应增加,进而能够进一步提高电容器的容值密度。Therefore, in the embodiments of the present application, the multi-wing structure is used as the skeleton, and the laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and the result can be obtained with a smaller device size (capacitor chip size). Larger capacitance value increases the capacitance value density of the capacitor, and multiple electrodes of the capacitor are arranged on the front and back sides of the capacitor, so that a double-sided capacitor can be prepared based on a multi-wing structure, which facilitates the vertical stacking of the capacitor with Other capacitors are connected in parallel to meet different application requirements. Further, in the embodiments of the present application, compared to a solid support structure, the support structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar support structure, the wing-shaped structure in the present application It is the convex structure formed on the outer side wall of the support structure, that is, the wing-like support is formed on the outer side wall of the support structure, so that the surface area of the multi-wing structure can be increased. In this application, the laminated structure covers the multi-wing structure. As the surface area of the wing structure increases, the surface area of the laminated structure also increases correspondingly, which can further increase the capacitance density of the capacitor.
可选地,本申请实施例还提供一种电容结构300,该电容结构300包括:第一电容器310和第二电容器320,该第一电容器310和该第二电容器320具有与上述电容器100相同的结构,该第二电容器320位于该第一电容器310的上方。Optionally, an embodiment of the present application further provides a capacitor structure 300, the capacitor structure 300 includes: a first capacitor 310 and a second capacitor 320, the first capacitor 310 and the second capacitor 320 have the same as the above-mentioned capacitor 100 Structure, the second capacitor 320 is located above the first capacitor 310.
其中,该第一电容器310包括外接电极311、外接电极312、外接电极313和外接电极314,以及该外接电极311和该外接电极312位于该第一电容器310的上表面,该外接电极313和该外接电极314位于该第一电容器310的下表面。该第二电容器320包括外接电极321、外接电极322、外接电极323和外接电极324,以及该外接电极321和该外接电极322位于该第二电容器320的上表面,该外接电极323和该外接电极324位于该第二电容器320的下表面。具体地,该第一电容器310的外接电极311与该第二电容器320的外接电极323电连接,该第一电容器310的外接电极312与该第二电容器320的外接电极324电连接,如图9所示。Wherein, the first capacitor 310 includes an external electrode 311, an external electrode 312, an external electrode 313, and an external electrode 314, and the external electrode 311 and the external electrode 312 are located on the upper surface of the first capacitor 310, the external electrode 313 and the external electrode 313 The external electrode 314 is located on the bottom surface of the first capacitor 310. The second capacitor 320 includes an external electrode 321, an external electrode 322, an external electrode 323, and an external electrode 324, and the external electrode 321 and the external electrode 322 are located on the upper surface of the second capacitor 320, the external electrode 323 and the external electrode 324 is located on the bottom surface of the second capacitor 320. Specifically, the external electrode 311 of the first capacitor 310 is electrically connected to the external electrode 323 of the second capacitor 320, and the external electrode 312 of the first capacitor 310 is electrically connected to the external electrode 324 of the second capacitor 320, as shown in FIG. 9 Shown.
需要说明的是,该第一电容器310的外接电极311、外接电极312、外接电极313和外接电极314分别如图1中电容器100的第一外接电极130、第二外接电极140、第三外接电极150和第四外接电极160。同理,该第二电容器320的外接电极321、外接电极322、外接电极323和外接电极324分别如图1中电容器100的第一外接电极130、第二外接电极140、第三外接电极150和第四外接电极160。It should be noted that the external electrode 311, the external electrode 312, the external electrode 313, and the external electrode 314 of the first capacitor 310 are respectively the first external electrode 130, the second external electrode 140, and the third external electrode of the capacitor 100 in FIG. 150 and the fourth external electrode 160. Similarly, the external electrode 321, the external electrode 322, the external electrode 323 and the external electrode 324 of the second capacitor 320 are respectively the first external electrode 130, the second external electrode 140, the third external electrode 150 and the external electrode 324 of the capacitor 100 shown in FIG. The fourth external electrode 160.
可选地,在一些实施例中,该电容结构300还包括:第三电容器330,该第三电容器330具有与上述电容器100相同的结构,该第三电容器330位于该第一电容器310的下方。其中,该第三电容器330包括外接电极331、 外接电极332、外接电极333和外接电极334,以及该外接电极331和该外接电极332位于该第三电容器330的上表面,该外接电极333和该外接电极334位于该第三电容器330的下表面。具体地,该第一电容器310的外接电极313与该第三电容器330的外接电极331电连接,该第一电容器310的外接电极314与该第三电容器330的外接电极332电连接。Optionally, in some embodiments, the capacitor structure 300 further includes: a third capacitor 330 having the same structure as the capacitor 100 described above, and the third capacitor 330 is located below the first capacitor 310. Wherein, the third capacitor 330 includes an external electrode 331, an external electrode 332, an external electrode 333, and an external electrode 334, and the external electrode 331 and the external electrode 332 are located on the upper surface of the third capacitor 330, the external electrode 333 and the external electrode The external electrode 334 is located on the lower surface of the third capacitor 330. Specifically, the external electrode 313 of the first capacitor 310 is electrically connected to the external electrode 331 of the third capacitor 330, and the external electrode 314 of the first capacitor 310 is electrically connected to the external electrode 332 of the third capacitor 330.
需要说明的是,该第三电容器330的外接电极331、外接电极332、外接电极333和外接电极334分别如图1中电容器100的第一外接电极130、第二外接电极140、第三外接电极150和第四外接电极160。It should be noted that the external electrode 331, the external electrode 332, the external electrode 333, and the external electrode 334 of the third capacitor 330 are respectively the first external electrode 130, the second external electrode 140, and the third external electrode of the capacitor 100 in FIG. 150 and the fourth external electrode 160.
还需要说明的是,该第三电容器330在图中未示出,其可以参考图9中的第一电容器310和第二电容器320的部局方式,即在图9的基础上,在第一电容器310的下方还设置有该第三电容器330。It should also be noted that the third capacitor 330 is not shown in the figure, it can refer to the layout of the first capacitor 310 and the second capacitor 320 in FIG. 9, that is, on the basis of FIG. The third capacitor 330 is also arranged under 310.
需要说明的是,本申请中的电容结构是电容芯片(电容器)制备好以后的一种使用方式,可以理解,制备四个外接电极的目的就是保留了与其他独立电容芯片直接组合起来形成更大电容的接口,如果没有多出来两个外接电极,那么就需要在电路板上另外制作连接线路把两颗电容芯片并联起来,这样水平方向占用面积(也就是占PCB面积)大,竖直方向堆叠的话,可以省PCB板面积。It should be noted that the capacitor structure in this application is a method of use after the capacitor chip (capacitor) is prepared. It can be understood that the purpose of preparing four external electrodes is to retain the direct combination with other independent capacitor chips to form a larger If there are no more two external electrodes for the capacitor interface, then you need to make another connection line on the circuit board to connect the two capacitor chips in parallel, so that the horizontal direction (that is, the PCB area) is large, and the vertical direction is stacked. In this case, PCB board area can be saved.
以上描述了本申请实施例的电容器,下面描述本申请实施例的制备电容器的方法。本申请实施例的制备电容器的方法可以制备前述本申请实施例的电容器,下述实施例和前述实施例中的相关描述可以相互参考。The capacitors according to the embodiments of the present application are described above, and the method for preparing the capacitors according to the embodiments of the present application is described below. The method for preparing a capacitor of the embodiment of the present application can prepare the capacitor of the foregoing embodiment of the present application, and the following embodiment and the related description in the foregoing embodiment can be referred to each other.
以下,结合图10,详细介绍本申请实施例的电容器的制作方法。Hereinafter, in conjunction with FIG. 10, the manufacturing method of the capacitor of the embodiment of the present application will be described in detail.
应理解,图10是本申请实施例的电容器的制作方法的示意性流程图,但这些步骤或操作仅是示例,本申请实施例还可以执行其他操作或者图10中的各个操作的变形。It should be understood that FIG. 10 is a schematic flowchart of a method for manufacturing a capacitor in an embodiment of the present application, but these steps or operations are only examples, and the embodiment of the present application may also perform other operations or variations of each operation in FIG. 10.
图10示出了根据本申请实施例的电容器的制作方法400的示意性流程图。如图10所示,该电容器的制作方法400包括:FIG. 10 shows a schematic flowchart of a method 400 for manufacturing a capacitor according to an embodiment of the present application. As shown in FIG. 10, the manufacturing method 400 of the capacitor includes:
410,在衬底上方制备多翼结构,该多翼结构包括多组翼状结构和多个支撑结构,其中,每组翼状结构中的各个翼状结构平行设置,该支撑结构为中空的结构,该翼状结构为该支撑结构的外侧壁沿第一方向延伸形成的凸起结构,该第一方向为垂直于该支撑结构的侧壁的方向;410. Prepare a multi-wing structure above the substrate, the multi-wing structure including multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, the supporting structure is a hollow structure, and the wing-like structure The structure is a convex structure formed by extending the outer side wall of the supporting structure in a first direction, and the first direction is a direction perpendicular to the side wall of the supporting structure;
420,在该多翼结构表面制备叠层结构,该叠层结构包覆该多翼结构, 该叠层结构包括至少一层电介质层和多层导电层,该至少一层电介质层和该多层导电层形成导电层与电介质层彼此交替的结构;420. Prepare a laminated structure on the surface of the multi-wing structure, the laminated structure covering the multi-wing structure, the laminated structure including at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer The conductive layer forms a structure in which the conductive layer and the dielectric layer alternate with each other;
430,制备至少一个第一外接电极和至少一个第二外接电极,其中,该第一外接电极和该第二外接电极位于该多翼结构的上方,该第一外接电极电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极电连接至该多层导电层中的部分或者全部偶数层导电层;430. Prepare at least one first external electrode and at least one second external electrode, wherein the first external electrode and the second external electrode are located above the multi-wing structure, and the first external electrode is electrically connected to the multilayer conductive Part or all of the odd-numbered conductive layers in the layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
440,制备至少一个第三外接电极和至少一个第四外接电极,其中,该第三外接电极和该第四外接电极位于该多翼结构的下方,该第三外接电极电连接至该多层导电层中的部分或者全部奇数层导电层,该第四外接电极电连接至该多层导电层中的部分或者全部偶数层导电层。440. Prepare at least one third external electrode and at least one fourth external electrode, wherein the third external electrode and the fourth external electrode are located under the multi-wing structure, and the third external electrode is electrically connected to the multilayer conductive Part or all of the odd-numbered conductive layers in the layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
具体地,基于上述步骤410-440可以制备如图1所示的电容器,也可以制备基于如图2至图6所示的多翼结构制备的电容器,以及制备如图7所示的电容器和如图8所示的电容器P和电容器Q。另外,基于上述步骤410-440也可以制备如图9所示的电容结构,本申请对此并不限定。Specifically, based on the above steps 410-440, a capacitor as shown in FIG. 1 can be prepared, a capacitor based on a multi-wing structure as shown in FIG. 2 to FIG. 6 can also be prepared, and a capacitor as shown in FIG. The capacitor P and the capacitor Q shown in FIG. 8. In addition, based on the above steps 410-440, the capacitor structure shown in FIG. 9 can also be prepared, which is not limited in this application.
应理解,步骤410-440中所述的各材料层的上表面是指该材料层与衬底上表面基本平行的表面。It should be understood that the upper surface of each material layer described in steps 410-440 refers to the surface of the material layer that is substantially parallel to the upper surface of the substrate.
需要说明的是,该第一方向可以是平行于该衬底170的方向,或者,该第一方向可以是垂直于该衬底170法线的方向。It should be noted that the first direction may be a direction parallel to the substrate 170, or the first direction may be a direction perpendicular to the normal line of the substrate 170.
可选地,在一些实施例中,上述步骤410具体可以是:Optionally, in some embodiments, the foregoing step 410 may specifically be:
在衬底170上方制备多层结构,该多层结构包括多层第一材料层10和多层第二材料层20,该多层第一材料层10和该多层第二材料层20形成第一材料层10与第二材料层20彼此交替的结构,该第一材料与该第二材料不同,以及该第一材料层10与该衬底170直接接触;A multi-layer structure is prepared over the substrate 170. The multi-layer structure includes a multi-layer first material layer 10 and a multi-layer second material layer 20. The multi-layer first material layer 10 and the multi-layer second material layer 20 form a first material layer. A structure in which a material layer 10 and a second material layer 20 alternate with each other, the first material is different from the second material, and the first material layer 10 is in direct contact with the substrate 170;
以该多层结构为基础,制备多个沟槽(也就是沟槽位置的多层结构被去除掉),并在该多层结构上表面、该多个沟槽的底部和内侧壁沉积该第一材料(也就是在带沟槽的多层结构上形成连续的第一材料层)以形成由该第一材料制成的多个中空柱状的第一结构31,作为形成多个支撑结构112的基础,此步骤中多个第一结构31彼此连接在一起,该第一结构31沿着垂直于该衬底170的方向延伸且进入该衬底170;Based on the multi-layer structure, prepare a plurality of trenches (that is, the multi-layer structure at the position of the trench is removed), and deposit the second layer on the upper surface of the multi-layer structure, the bottom of the plurality of trenches, and the inner sidewalls. A material (that is, a continuous first material layer is formed on a multi-layered structure with grooves) to form a plurality of hollow columnar first structures 31 made of the first material, as the support structure 112 Basically, in this step, a plurality of first structures 31 are connected to each other, and the first structures 31 extend in a direction perpendicular to the substrate 170 and enter the substrate 170;
在余留的该多层结构内制备沿着垂直于该衬底170的方向延伸的沟槽状的多个第二结构32,也就是第二结构32所在位置的多层结构,包括在多层 结构上沉积的第一材料均被去除掉,此时多个第一结构31被多个第二结构间隔开,该第二结构32沿着垂直于该衬底170的方向延伸至该衬底170的上表面;In the remaining multi-layer structure, a plurality of second structures 32 in a groove shape extending in a direction perpendicular to the substrate 170 are prepared, that is, the multi-layer structure where the second structures 32 are located, including the multi-layer structure. The first material deposited on the structure is removed. At this time, the plurality of first structures 31 are separated by the plurality of second structures, and the second structures 32 extend to the substrate 170 along a direction perpendicular to the substrate 170. The upper surface of
去除该多个第二结构32中露出的第二材料层20,或者说以第二结构32为作业入口,去除掉余留的第二材料层20而留下第一材料层10;Removing the second material layer 20 exposed in the plurality of second structures 32, or using the second structure 32 as a work entrance, removing the remaining second material layer 20 and leaving the first material layer 10;
对该衬底170进行减薄处理,以形成该多翼结构110。The substrate 170 is thinned to form the multi-wing structure 110.
上述第一材料和第二材料的沉积方式,优选使用化学气相沉积(CVD),也可以使用旋涂、喷涂、热氧化、外延、物理气相沉积(PVD)、原子层沉积(ALD)、外延生长等多种工艺。The deposition method of the first material and the second material mentioned above is preferably chemical vapor deposition (CVD), or spin coating, spray coating, thermal oxidation, epitaxy, physical vapor deposition (PVD), atomic layer deposition (ALD), epitaxial growth And many other processes.
可选地,可以使用热氧化法、原子层沉积(Atomic layer deposition,ALD)、化学气相沉积(Chemical Vapor Deposition,CVD)等多种工艺在该多翼结构110上形成该叠层结构120。Optionally, the stacked structure 120 may be formed on the multi-wing structure 110 using various processes such as thermal oxidation, atomic layer deposition (ALD), chemical vapor deposition (Chemical Vapor Deposition, CVD).
需要理解的是,相对于第一材料,第二材料可以被选择性去除。具体地,在同一腐蚀或刻蚀环境,该第一材料和该第二材料的腐蚀(或刻蚀)速率的差异大于5倍。即在同一腐蚀或刻蚀环境,第二材料的腐蚀(或刻蚀)速率至少为第一材料的腐蚀(或刻蚀)速率的5倍,因此可以通过控制刻蚀材料、时间的选择可以实现去除掉第二材料而保留第一材料。It should be understood that, relative to the first material, the second material can be selectively removed. Specifically, in the same corrosion or etching environment, the difference in the corrosion (or etching) rate of the first material and the second material is greater than 5 times. That is, in the same corrosion or etching environment, the corrosion (or etching) rate of the second material is at least 5 times the corrosion (or etching) rate of the first material, so it can be achieved by controlling the choice of etching material and time The second material is removed and the first material is retained.
可选地,在一些实施例中,该多层导电层中的部分或者全部导电层与该多翼结构110共形。Optionally, in some embodiments, part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure 110.
可选地,在一些实施例中,该多层导电层中的一部分导电层与该多翼结构110共形,另一部分导电层在外形上与该多翼结构110互补。Optionally, in some embodiments, a part of the conductive layer of the multilayer conductive layer is conformal to the multi-wing structure 110, and another part of the conductive layer is complementary to the multi-wing structure 110 in shape.
可选地,在一些实施例中,该多组翼状结构111中的单个翼状结构111包括沿着该第一方向延伸的多个翼11。Optionally, in some embodiments, a single wing-like structure 111 in the plurality of groups of wing-like structures 111 includes a plurality of wings 11 extending along the first direction.
可选地,在一些实施例中,该多个支撑结构112中的支撑结构112在其中空区域设置有至少一个轴12,该轴12与该支撑结构112的侧壁平行。Optionally, in some embodiments, the support structure 112 of the plurality of support structures 112 is provided with at least one shaft 12 in the hollow area thereof, and the shaft 12 is parallel to the side wall of the support structure 112.
可选地,在一些实施例中,该电容器还包括:环状结构113,该环状结构113位于该多个支撑结构112和该多组翼状结构111的外侧。Optionally, in some embodiments, the capacitor further includes: a ring structure 113 located outside the plurality of support structures 112 and the plurality of sets of wing-like structures 111.
可选地,该环状结构113由多层第一材料层10和多层第二材料层20交替堆叠形成。具体第一材料层10和第二材料层20的厚度可根据电容器的容值、频率特性、损耗等需求来调整。Optionally, the ring structure 113 is formed by alternately stacking multiple first material layers 10 and multiple second material layers 20. Specifically, the thickness of the first material layer 10 and the second material layer 20 can be adjusted according to the capacitance, frequency characteristics, loss and other requirements of the capacitor.
可选地,该多组翼状结构111和该多个支撑结构112由该第一材料形成。Optionally, the multiple sets of wing-shaped structures 111 and the multiple supporting structures 112 are formed of the first material.
需要说明的是,该第一材料与该第二材料具体可以参考上述电容器100中的描述,为了简洁,在此不再赘述。It should be noted that, for the first material and the second material, reference may be made to the description of the capacitor 100 described above. For the sake of brevity, details are not repeated here.
可选地,在一些实施例中,该多翼结构110为导电材料制成,该第二外接电极140电连接至该多翼结构110。Optionally, in some embodiments, the multi-wing structure 110 is made of a conductive material, and the second external electrode 140 is electrically connected to the multi-wing structure 110.
可选地,该多翼结构110由电阻率小于阈值的材料形成,或者,该多翼结构110的表面形成有重掺杂的导电层或者重掺杂的导电区域。Optionally, the multi-wing structure 110 is formed of a material with a resistivity less than a threshold value, or a heavily doped conductive layer or a heavily doped conductive region is formed on the surface of the multi-wing structure 110.
可选地,该多翼结构110包括主体材料和主体材料表面的导电层或导电区域,该第二外接电极140通过与该导电层或导电区域电连接与该多翼结构110的电连接。Optionally, the multi-wing structure 110 includes a main body material and a conductive layer or conductive area on the surface of the main body material, and the second external electrode 140 is electrically connected to the multi-wing structure 110 by being electrically connected to the conductive layer or conductive area.
可选地,在一些实施例中,该方法400还包括:Optionally, in some embodiments, the method 400 further includes:
制备隔离环180,其中,该隔离环180位于该多个支撑结构112的外侧的上方,且该隔离环180用于将该叠层结构120分隔为内侧和外侧两部分,该第一外接电极130和该第二外接电极140仅与该叠层结构120位于该隔离环180的内侧的部分电连接,该第三外接电极150和该第四外接电极160仅与该叠层结构120位于该隔离环180的内侧的部分电连接。The isolation ring 180 is prepared, wherein the isolation ring 180 is located above the outer side of the plurality of support structures 112, and the isolation ring 180 is used to separate the laminated structure 120 into two parts, an inner side and an outer side, and the first external electrode 130 The second external electrode 140 is only electrically connected to the part of the laminated structure 120 located inside the isolation ring 180, and the third external electrode 150 and the fourth external electrode 160 are only electrically connected to the laminated structure 120 located in the isolation ring. The inner part of 180 is electrically connected.
可选地,该隔离环180位于该环状结构113的上方。Optionally, the isolation ring 180 is located above the ring structure 113.
可选地,在一些实施例中,该方法400还包括:Optionally, in some embodiments, the method 400 further includes:
制备至少一个第一导电通孔结构201和至少一个第二导电通孔结构202;Preparing at least one first conductive via structure 201 and at least one second conductive via structure 202;
其中,该第一导电通孔结构201位于该隔离环180中,该第二导电通孔结构202位于该隔离环180之外靠近该电容器100中心的区域,或者,该第一导电通孔结构201和/或该第二导电通孔结构202位于该隔离环180之外靠近该电容器100中心的区域;Wherein, the first conductive via structure 201 is located in the isolation ring 180, and the second conductive via structure 202 is located outside the isolation ring 180 near the center of the capacitor 100, or the first conductive via structure 201 And/or the second conductive via structure 202 is located outside the isolation ring 180 near the center of the capacitor 100;
该第一外接电极130通过该至少一个第一导电通孔结构201电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极140通过该至少一个第二导电通孔结构202电连接至的该多层导电层中的部分或者全部偶数层导电层。The first external electrode 130 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure 201, and the second external electrode 140 is electrically connected to the at least one second conductive via through the at least one second conductive via. Part or all of the even-numbered conductive layers in the multilayer conductive layer to which the structure 202 is electrically connected.
可选地,在一些实施例中,该方法400还包括:Optionally, in some embodiments, the method 400 further includes:
制备填充结构190,该填充结构190包覆该叠层结构120,并填充该叠层结构120形成的空隙。A filling structure 190 is prepared. The filling structure 190 covers the laminated structure 120 and fills the voids formed by the laminated structure 120.
可选地,在一些实施例中,该多组翼状结构111中与该衬底170接触的 翼状结构111在不同的支撑结构112之间存在非连续区域。Optionally, in some embodiments, the wing-shaped structure 111 of the plurality of groups of wing-shaped structures 111 that is in contact with the substrate 170 has a discontinuous area between different supporting structures 112.
可选地,在一些实施例中,该多组翼状结构111中与该衬底170接触的翼状结构111在不同的支撑结构112之间存在非连续区域,该衬底170在该非连续区域处形成衬底沟槽171,该叠层结构120进一步设置于该衬底沟槽171内。Optionally, in some embodiments, the wing-shaped structure 111 of the plurality of groups of wing-shaped structures 111 that is in contact with the substrate 170 has a discontinuous area between different support structures 112, and the substrate 170 is located at the discontinuous area. A substrate trench 171 is formed, and the stacked structure 120 is further disposed in the substrate trench 171.
可选地,在一些实施例中,该支撑结构112贯穿该衬底170,以使该衬底170的下表面露出该叠层结构120。可选地,该第三外接电极150和/或该第四外接电极160电连接至该多层导电层位于该支撑结构112中的区域。Optionally, in some embodiments, the supporting structure 112 penetrates the substrate 170 so that the lower surface of the substrate 170 exposes the laminated structure 120. Optionally, the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to a region of the multilayer conductive layer located in the support structure 112.
可选地,在一些实施例中,该衬底170由导电材料制成,该第三外接电极150通过该衬底170电连接至该多层导电层中与该衬底170接触的导电层。Optionally, in some embodiments, the substrate 170 is made of a conductive material, and the third external electrode 150 is electrically connected to the conductive layer of the multilayer conductive layer that is in contact with the substrate 170 through the substrate 170.
可选地,在一些实施例中,该方法400还包括:Optionally, in some embodiments, the method 400 further includes:
制备第一互联结构200,其中,该第一互联结构200位于该多翼结构110上方,该第一外接电极130和/或该第二外接电极140通过该第一互联结构200电连接至该多层导电层中的导电层。A first interconnection structure 200 is prepared, wherein the first interconnection structure 200 is located above the multi-wing structure 110, and the first external electrode 130 and/or the second external electrode 140 are electrically connected to the multi-wing structure through the first interconnection structure 200. The conductive layer in the conductive layer.
可选地,该第一互联结构200包括至少一个第一绝缘层203、至少一个第一导电通孔结构201和至少一个第二导电通孔结构202,其中,该至少一个第一绝缘层203位于该多翼结构110的上方,该第一导电通孔结构201和该第二导电通孔结构202贯穿该至少一个第一绝缘层203,该第一外接电极130通过该至少一个第一导电通孔结构201电连接至该多层导电层中的部分或者全部奇数层导电层,该第二外接电极140通过该至少一个第二导电通孔结构202电连接至的该多层导电层中的部分或者全部偶数层导电层。Optionally, the first interconnect structure 200 includes at least one first insulating layer 203, at least one first conductive via structure 201, and at least one second conductive via structure 202, wherein the at least one first insulating layer 203 is located Above the multi-wing structure 110, the first conductive via structure 201 and the second conductive via structure 202 penetrate the at least one first insulating layer 203, and the first external electrode 130 passes through the at least one first conductive via The structure 201 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode 140 is electrically connected to a part or part of the multilayer conductive layer through the at least one second conductive via structure 202. All even-numbered conductive layers.
可选地,该至少一个第一绝缘层203可以采用旋涂、喷涂、物理气相沉积(PVD)、化学气相沉积(CVD)等工艺沉积形成。Optionally, the at least one first insulating layer 203 may be formed by spin coating, spray coating, physical vapor deposition (PVD), chemical vapor deposition (CVD), or other processes.
可选地,第一导电通孔结构201和第二导电通孔结构202可以通过在通孔中采用PVD、金属有机化合物化学气相沉淀(Metal-organic Chemical Vapor Deposition,MOCVD)、ALD等工艺形成。Optionally, the first conductive via structure 201 and the second conductive via structure 202 can be formed by processes such as PVD, Metal-organic Chemical Vapor Deposition (MOCVD), ALD, etc. in the via.
可选地,在一些实施例中,该方法400还包括:Optionally, in some embodiments, the method 400 further includes:
制备第二互联结构210,其中,该第二互联结构210位于该多翼结构110下方,该第三外接电极150和/或该第四外接电极160通过该第二互联结构210电连接至该多层导电层中的导电层。A second interconnection structure 210 is prepared, wherein the second interconnection structure 210 is located under the multi-wing structure 110, and the third external electrode 150 and/or the fourth external electrode 160 are electrically connected to the multi-wing structure through the second interconnection structure 210. The conductive layer in the conductive layer.
可选地,该第二互联结构210包括至少一个第二绝缘层213、至少一个 第三导电通孔结构211和至少一个第四导电通孔结构212,其中,该至少一个第二绝缘层213位于该多翼结构110的下方,该第三导电通孔结构211和该第四导电通孔结构212贯穿该至少一个第二绝缘层213,该第三外接电极150通过该至少一个第三导电通孔结构211电连接至该多层导电层中的部分或者全部奇数层导电层,该第四外接电极160通过该至少一个第四导电通孔结构212电连接至的该多层导电层中的部分或者全部偶数层导电层。Optionally, the second interconnection structure 210 includes at least one second insulating layer 213, at least one third conductive via structure 211, and at least one fourth conductive via structure 212, wherein the at least one second insulating layer 213 is located at Below the multi-wing structure 110, the third conductive via structure 211 and the fourth conductive via structure 212 penetrate the at least one second insulating layer 213, and the third external electrode 150 passes through the at least one third conductive via The structure 211 is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode 160 is electrically connected to a part or part of the multilayer conductive layer through the at least one fourth conductive via structure 212. All even-numbered conductive layers.
可选地,该至少一个第二绝缘层213可以采用旋涂、喷涂、物理气相沉积(PVD)、化学气相沉积(CVD)等工艺沉积形成。Optionally, the at least one second insulating layer 213 may be formed by spin coating, spray coating, physical vapor deposition (PVD), chemical vapor deposition (CVD), or other processes.
可选地,第三导电通孔结构211和第四导电通孔结构212可以通过在通孔中采用PVD、金属有机化合物化学气相沉淀(Metal-organic Chemical Vapor Deposition,MOCVD)、ALD等工艺形成。Optionally, the third conductive via structure 211 and the fourth conductive via structure 212 may be formed by using PVD, Metal-organic Chemical Vapor Deposition (MOCVD), ALD, and other processes in the via.
可选地,在一些实施例中,上述步骤430具体可以是:Optionally, in some embodiments, the foregoing step 430 may specifically be:
在该叠层结构120的上方制备第一电极层,该第一电极层包括相互分离的至少一个第一导电区域和至少一个第二导电区域,该第一导电区域形成该第一外接电极130,该第二导电区域形成该第二外接电极140。A first electrode layer is prepared above the laminated structure 120. The first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other. The first conductive region forms the first external electrode 130, The second conductive area forms the second external electrode 140.
可选地,该第一外接电极130和/或该第二外接电极140可以采用PVD、电镀、化镀等工艺形成。Optionally, the first external electrode 130 and/or the second external electrode 140 may be formed by PVD, electroplating, electroless plating, and other processes.
可选地,在一些实施例中,上述步骤440具体可以是:Optionally, in some embodiments, the foregoing step 440 may specifically be:
在该多翼结构110的下方制备第二电极层,该第二电极层包括相互分离的至少一个第三导电区域和至少一个第四导电区域,该第三导电区域形成该第三外接电极150,该第四导电区域形成该第四外接电极160。A second electrode layer is prepared under the multi-wing structure 110. The second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other. The third conductive region forms the third external electrode 150, The fourth conductive area forms the fourth external electrode 160.
可选地,该第三外接电极150和/或该第四外接电极160可以采用PVD、电镀、化镀等工艺形成。Optionally, the third external electrode 150 and/or the fourth external electrode 160 may be formed by PVD, electroplating, electroless plating, and other processes.
可选地,在一个实施例中,假设叠层结构120包括2层导电层和1层电介质层。在这一实施例中,上述步骤410至440具体可以是如步骤a至步骤o(图11a-11o)所示的制备流程,可以制备如图1所示的电容器100。另外,也可以制备基于如图2至图6所示的多翼结构制备的电容器100,以及制备如图7所示的电容器和如图8所示的电容器P和电容器Q,另外,基于上述步骤410-440也可以制备如图9所示的电容结构,其可以参考如步骤a至步骤o(图11a-11o)所示的电容器制备流程,为了简洁,在此不再赘述。Optionally, in one embodiment, it is assumed that the stacked structure 120 includes two conductive layers and one dielectric layer. In this embodiment, the above steps 410 to 440 may specifically be the preparation process shown in step a to step o (FIGS. 11a-11o), and the capacitor 100 shown in FIG. 1 may be prepared. In addition, the capacitor 100 prepared based on the multi-wing structure shown in FIGS. 2 to 6 can also be prepared, and the capacitor shown in FIG. 7 and the capacitor P and the capacitor Q shown in FIG. 8 can also be prepared. In addition, based on the above steps 410-440 can also prepare the capacitor structure as shown in FIG. 9, which can refer to the capacitor preparation process shown in steps a to o (FIGS. 11a-11o). For the sake of brevity, details are not repeated here.
步骤a,选取硅晶圆作为衬底170,利用CVD工艺在衬底170的上表面 交替沉积3层第一材料层10和3层第二材料层20,形成多层结构,第一材料层10与衬底170直接接触,如图11a所示,例如,第一材料为氧化硅,第二材料为氮化硅;Step a, a silicon wafer is selected as the substrate 170, and 3 layers of the first material layer 10 and 3 layers of the second material layer 20 are alternately deposited on the upper surface of the substrate 170 using a CVD process to form a multilayer structure, the first material layer 10 In direct contact with the substrate 170, as shown in FIG. 11a, for example, the first material is silicon oxide, and the second material is silicon nitride;
步骤b,在多层结构表面旋涂一层光刻胶,曝光、显影之后打开若干光刻胶的缺口,然后利用光刻胶作为掩膜,使用干法刻蚀工艺去除未被光刻胶覆盖的膜层结构(第一材料层10和第二材料层20),形成沿着垂直于衬底170的方向延伸且进入衬底170的中空柱状和/或沟槽状的3个第一结构31,最后去除光刻胶,如图11b所示;Step b, spin-coating a layer of photoresist on the surface of the multilayer structure, open several gaps in the photoresist after exposure and development, and then use the photoresist as a mask, and use a dry etching process to remove uncovered photoresist The film structure (the first material layer 10 and the second material layer 20), forming three first structures 31 extending along the direction perpendicular to the substrate 170 and entering the hollow columnar and/or grooved shapes of the substrate 170 , And finally remove the photoresist, as shown in Figure 11b;
步骤c,利用CVD工艺,在多层结构上表面,3个第一结构31的底部和内侧壁沉积第一材料,如图11c所示;Step c, using a CVD process to deposit a first material on the upper surface of the multilayer structure, the bottom and inner sidewalls of the three first structures 31, as shown in FIG. 11c;
步骤d,利用光刻结合干法刻蚀工艺,在第一结构31的间隙,形成沿着垂直于衬底170的方向延伸且延伸至衬底170的上表面的中空柱状和/或沟槽状的2个第二结构32,如图11d所示;Step d, using photolithography combined with a dry etching process, in the gap of the first structure 31, a hollow columnar shape and/or a groove shape extending along a direction perpendicular to the substrate 170 and extending to the upper surface of the substrate 170 are formed in the gaps of the first structure 31 The 2 second structures 32, as shown in Figure 11d;
步骤e,将2个第二结构32作为释放孔,使用热的磷酸溶液作为腐蚀剂,去除与释放孔接触的第二材料层(氮化硅),如图11e所示;Step e, using two second structures 32 as release holes, and using a hot phosphoric acid solution as an etchant to remove the second material layer (silicon nitride) in contact with the release holes, as shown in FIG. 11e;
步骤f,利用ALD工艺,在多翼结构110表面沉积一层TiN作为导电层21,接着沉积一层氧化铝作为电介质层23,最后沉积一层TiN作为导电层22,如图11f所示;Step f, using the ALD process, deposit a layer of TiN as the conductive layer 21 on the surface of the multi-wing structure 110, then deposit a layer of aluminum oxide as the dielectric layer 23, and finally deposit a layer of TiN as the conductive layer 22, as shown in FIG. 11f;
步骤g,利用CVD工艺,沉积氧化硅作为填充结构190,填充、包覆整个多翼结构110,如图11g所示;可选地,也可以使用MOCVD工艺,沉积金属钨作为填充结构190;当然,步骤g也可以没有,直接使用步骤f中的导电层22将所有的缝隙填满;Step g, using a CVD process to deposit silicon oxide as the filling structure 190, filling and covering the entire multi-wing structure 110, as shown in FIG. 11g; alternatively, the MOCVD process can also be used to deposit metal tungsten as the filling structure 190; of course , Step g may not be present, and directly use the conductive layer 22 in step f to fill all the gaps;
步骤h,在填充结构190表面旋涂一层光刻胶,曝光、显影之后打开一个光刻胶的闭合环状缺口,然后利用干法刻蚀工艺去除缺口内的填充材料和导电层22,露出电介质层23,形成环状沟槽30和若干导通沟槽35,如图11h所示;当然,在制备环状沟槽30的同时,也可以不制备导通沟槽35;Step h, spin-coating a layer of photoresist on the surface of the filling structure 190, open a closed ring-shaped notch of the photoresist after exposure and development, and then use a dry etching process to remove the filling material and the conductive layer 22 in the notch to expose The dielectric layer 23 forms a ring-shaped trench 30 and a number of conductive trenches 35, as shown in FIG. 11h; of course, while preparing the ring-shaped trench 30, the conductive trench 35 may not be prepared;
步骤i,利用等离子体增强化学的气相沉积法(Plasma Enhanced Chemical Vapor Deposition,PECVD)工艺,沉积一层绝缘材料USG作为第一绝缘层203,并将环状沟槽30和导通沟槽35填满,分别形成隔离环180和导通结构181,如图11i所示;Step i, using a plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) process to deposit a layer of insulating material USG as the first insulating layer 203, and fill the annular trench 30 and the conduction trench 35 Full, the isolation ring 180 and the conducting structure 181 are formed respectively, as shown in FIG. 11i;
步骤j,利用光刻结合干法刻蚀工艺,制备位于隔离环180内侧区域的 多个第一导通孔40,其中一些第一导通孔40位于导通结构181内,穿透第一绝缘层203和电介质层23,底部露出导电层21;另一些第一导通孔40穿透第一绝缘层203和填充结构170,底部露出导电层22,如图11j所示;Step j, using photolithography combined with a dry etching process to prepare a plurality of first vias 40 located in the inner region of the isolation ring 180, some of the first vias 40 are located in the via structure 181 and penetrate the first insulation The conductive layer 21 is exposed at the bottom of the layer 203 and the dielectric layer 23; the other first via holes 40 penetrate the first insulating layer 203 and the filling structure 170, and the conductive layer 22 is exposed at the bottom, as shown in FIG. 11j;
步骤k,利用物理气相沉积(Physical Vapor Deposition,PVD)工艺在多个第一导通孔40内壁沉积一层TiN作为阻挡层和黏附层,再用MOCVD工艺,将多个第一导通孔40填满金属钨,形成1个第一导电通孔结构201和1个第二导电通孔结构202;接着,利用化学机械研磨(CMP)工艺,去除第一绝缘层203表面多余的导电材料;然后,利用PVD工艺,在磨平的第一绝缘层203表面沉积一层Ti/TiN和一层金属铝;最后,利用光刻结合刻蚀工艺,将Ti/TiN/Al图形化,得到电容器的1个第一外接电极130和1个第二外接电极140,如图11k所示;Step k, using a physical vapor deposition (Physical Vapor Deposition, PVD) process to deposit a layer of TiN as a barrier layer and adhesion layer on the inner walls of the plurality of first via holes 40, and then use the MOCVD process to connect the plurality of first via holes 40 Fill metal tungsten to form a first conductive via structure 201 and a second conductive via structure 202; then, a chemical mechanical polishing (CMP) process is used to remove the excess conductive material on the surface of the first insulating layer 203; , Using the PVD process to deposit a layer of Ti/TiN and a layer of metal aluminum on the surface of the ground first insulating layer 203; finally, using photolithography combined with an etching process to pattern the Ti/TiN/Al to obtain a capacitor One first external electrode 130 and one second external electrode 140, as shown in FIG. 11k;
步骤l,将硅晶圆(衬底170)翻面,先将衬底170利用磨轮减薄至接近第一结构31,接着利用等离子干法刻蚀工艺,选择性地去除硅,露出第一结构31的底部,如图11l所示;Step 1. Turn the silicon wafer (substrate 170) over, first use a grinding wheel to thin the substrate 170 to be close to the first structure 31, and then use a plasma dry etching process to selectively remove silicon to expose the first structure The bottom of 31, as shown in Figure 11l;
步骤m,利用等离子干法刻蚀工艺,选择性去除第一结构31底部的氧化硅,露出导电层21,如图11m所示;Step m, using a plasma dry etching process to selectively remove the silicon oxide at the bottom of the first structure 31 to expose the conductive layer 21, as shown in FIG. 11m;
步骤n,在衬底170背面涂覆一层光刻胶,曝光、显影之后,打开若干光刻胶的窗口,露出部分导电层21,利用湿法腐蚀工艺,去除光刻胶窗口露出的导电层21,露出电介质层23,如图11n所示;Step n, coating a layer of photoresist on the back of the substrate 170, after exposing and developing, opening several photoresist windows to expose part of the conductive layer 21, and using a wet etching process to remove the exposed conductive layer of the photoresist window 21. Expose the dielectric layer 23, as shown in FIG. 11n;
步骤o,利用PECVD工艺在衬底170背面沉积一层绝缘材料USG作为第二绝缘层213,并利用光刻结合刻蚀工艺,制备多个第二导通孔50,一些第二导通孔50露出导电层21,另一些第二导通孔50露出导电层22;在多个第二导通孔50中填充导电材料,形成1个第三导电通孔结构211和1个第四导电通孔结构212,如图11o所示;最后,利用PVD工艺,在第二绝缘层213表面沉积一层Ti/TiN和一层金属铝,利用光刻结合刻蚀工艺,将Ti/TiN/Al图形化,得到电容器的1个第三外接电极150和1个第四外接电极160,得到如图1所示的电容器100。Step o, depositing a layer of insulating material USG as the second insulating layer 213 on the back of the substrate 170 by using a PECVD process, and using photolithography combined with an etching process to prepare a plurality of second via holes 50, and some second via holes 50 The conductive layer 21 is exposed, and some of the second vias 50 expose the conductive layer 22; the plurality of second vias 50 are filled with conductive material to form a third conductive via structure 211 and a fourth conductive via The structure 212 is shown in FIG. 11o; finally, a layer of Ti/TiN and a layer of metal aluminum are deposited on the surface of the second insulating layer 213 using the PVD process, and the Ti/TiN/Al is patterned using photolithography combined with an etching process , A third external electrode 150 and a fourth external electrode 160 of the capacitor are obtained, and the capacitor 100 as shown in FIG. 1 is obtained.
需要说明的是,上述3个第一结构31中不同的第一结构31的形状可以相同,也可以不同,本申请对此并不限定。同理,上述2个第二结构32中不同的第二结构32的形状可以相同,也可以不同,本申请对此并不限定。It should be noted that the shapes of the different first structures 31 among the above three first structures 31 may be the same or different, which is not limited in this application. In the same way, the shapes of the different second structures 32 in the above two second structures 32 may be the same or different, which is not limited in the present application.
因此,在本申请实施例提供的电容器的制作方法中,通过制备多翼结构, 并且以多翼结构为骨架,在多翼结构上设置叠层结构,从而可以增加叠层结构的表面积,能够在较小器件尺寸(电容芯片尺寸)的情况下得到较大的电容值,提高电容器的容值密度,并在电容器的正、反两面都设置了电容器的多个电极,从而可以基于多翼结构制备双面电容器,便于将电容器以垂直堆叠的方式与其他电容器并联,满足不同的应用需求。进一步地,在本申请实施例中,相对于实心的支撑结构,本申请中的支撑结构为中空的结构,其可以具有更大的表面积,并且相对于柱状的支撑结构,本申请中的翼状结构为支撑结构的外侧壁上形成的凸起结构,即支撑结构的外侧壁上形成有翼状支撑,从而可以增加多翼结构的表面积,并且在本申请中叠层结构包覆多翼结构,在多翼结构的表面积增加的同时,叠层结构的表面积也会相应增加,进而能够进一步提高电容器的容值密度。Therefore, in the manufacturing method of the capacitor provided in the embodiments of the present application, by preparing a multi-wing structure, and using the multi-wing structure as a skeleton, a laminated structure is arranged on the multi-wing structure, so that the surface area of the laminated structure can be increased, and the surface area of the laminated structure can be increased. In the case of a smaller device size (capacitor chip size), a larger capacitance value can be obtained, and the capacitance density of the capacitor can be improved, and multiple electrodes of the capacitor are set on the front and back sides of the capacitor, so that it can be prepared based on a multi-wing structure Double-sided capacitors are convenient to vertically stack capacitors in parallel with other capacitors to meet different application requirements. Further, in the embodiments of the present application, compared to a solid support structure, the support structure in the present application is a hollow structure, which can have a larger surface area, and compared to a columnar support structure, the wing-shaped structure in the present application It is the convex structure formed on the outer side wall of the support structure, that is, the wing-like support is formed on the outer side wall of the support structure, so that the surface area of the multi-wing structure can be increased. In this application, the laminated structure covers the multi-wing structure. As the surface area of the wing structure increases, the surface area of the laminated structure also increases correspondingly, which can further increase the capacitance density of the capacitor.
本领域普通技术人员可以意识到,以上结合附图详细描述了本申请的优选实施方式,但是,本申请并不限于上述实施方式中的具体细节,在本申请的技术构思范围内,可以对本申请的技术方案进行多种简单变型,这些简单变型均属于本申请的保护范围。A person of ordinary skill in the art may realize that the preferred embodiments of the application are described in detail above with reference to the accompanying drawings. However, the application is not limited to the specific details in the foregoing embodiments. Within the scope of the technical concept of the application, the application can be The technical solution of, has undergone a variety of simple modifications, and these simple modifications all fall within the scope of protection of the present application.
另外需要说明的是,在上述具体实施方式中所描述的各个具体技术特征,在不矛盾的情况下,可以通过任何合适的方式进行组合,为了避免不必要的重复,本申请对各种可能的组合方式不再另行说明。In addition, it should be noted that the various specific technical features described in the above-mentioned specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this application provides various possible The combination method will not be explained separately.
此外,本申请的各种不同的实施方式之间也可以进行任意组合,只要其不违背本申请的思想,其同样应当视为本申请所申请的内容。In addition, various different implementations of this application can also be combined arbitrarily, as long as they do not violate the idea of this application, they should also be regarded as the content applied for in this application.

Claims (58)

  1. 一种电容器,其特征在于,包括:A capacitor, characterized in that it comprises:
    叠层结构,所述叠层结构包括至少一层电介质层和多层导电层,所述至少一层电介质层和所述多层导电层形成导电层与电介质层彼此交替的结构;A laminated structure, the laminated structure comprising at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer conductive layer form a structure in which the conductive layer and the dielectric layer alternate with each other;
    至少一个第一外接电极和至少一个第二外接电极,其中,所述第一外接电极和所述第二外接电极位于所述叠层结构的上方,所述第一外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层;At least one first external electrode and at least one second external electrode, wherein the first external electrode and the second external electrode are located above the laminated structure, and the first external electrode is electrically connected to the multiple Part or all of the odd-numbered conductive layers in the conductive layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
    至少一个第三外接电极和至少一个第四外接电极,其中,所述第三外接电极和所述第四外接电极位于所述叠层结构的下方,所述第三外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层。At least one third external electrode and at least one fourth external electrode, wherein the third external electrode and the fourth external electrode are located below the laminated structure, and the third external electrode is electrically connected to the multiple Part or all of the odd-numbered conductive layers in the conductive layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
  2. 根据权利要求1所述的电容器,其特征在于,所述电容器还包括:The capacitor according to claim 1, wherein the capacitor further comprises:
    多翼结构,所述叠层结构包覆所述多翼结构。A multi-wing structure, wherein the laminated structure covers the multi-wing structure.
  3. 根据权利要求2所述的电容器,其特征在于,所述多翼结构包括多组翼状结构和多个支撑结构,其中,每组翼状结构中的各个翼状结构平行设置,所述支撑结构为中空的结构,所述翼状结构为所述支撑结构的外侧壁沿第一方向延伸形成的凸起结构,所述第一方向为垂直于所述支撑结构的侧壁的方向。The capacitor according to claim 2, wherein the multi-wing structure comprises multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, and the supporting structure is hollow Structure, the wing-like structure is a convex structure formed by extending the outer side wall of the support structure in a first direction, and the first direction is a direction perpendicular to the side wall of the support structure.
  4. 根据权利要求3所述的电容器,其特征在于,所述多层导电层中的部分或者全部导电层与所述多翼结构共形。The capacitor according to claim 3, wherein part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure.
  5. 根据权利要求3所述的电容器,其特征在于,所述多层导电层中的一部分导电层与所述多翼结构共形,另一部分导电层在外形上与所述多翼结构互补。The capacitor according to claim 3, wherein a part of the conductive layer in the multi-layer conductive layer is conformal to the multi-wing structure, and the other part of the conductive layer is complementary in shape to the multi-wing structure.
  6. 根据权利要求3至5中任一项所述的电容器,其特征在于,所述多组翼状结构中的单个翼状结构包括沿着所述第一方向延伸的多个翼。The capacitor according to any one of claims 3 to 5, wherein a single wing structure in the plurality of groups of wing structures includes a plurality of wings extending along the first direction.
  7. 根据权利要求3至6中任一项所述的电容器,其特征在于,所述多个支撑结构中的支撑结构在其中空区域设置有至少一个轴,所述轴与所述支撑结构的侧壁平行。The capacitor according to any one of claims 3 to 6, wherein the supporting structure of the plurality of supporting structures is provided with at least one shaft in the hollow area thereof, and the shaft is connected to the side wall of the supporting structure. parallel.
  8. 根据权利要求3至7中任一项所述的电容器,其特征在于,还包括:The capacitor according to any one of claims 3 to 7, further comprising:
    隔离环,位于所述多个支撑结构的外侧的上方,且所述隔离环用于将所 述叠层结构分隔为内侧和外侧两部分,所述第一外接电极和所述第二外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接,以及所述第三外接电极和所述第四外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接。The isolation ring is located above the outer side of the plurality of support structures, and the isolation ring is used to separate the laminated structure into two parts, an inner side and an outer side. The first external electrode and the second external electrode are only It is electrically connected to the part of the laminated structure located inside the isolation ring, and the third external electrode and the fourth external electrode are only electrically connected to the part of the laminated structure located inside the isolation ring .
  9. 根据权利要求8所述的电容器,其特征在于,还包括:The capacitor according to claim 8, further comprising:
    至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,At least one first conductive via structure and at least one second conductive via structure, wherein
    所述第一导电通孔结构位于所述隔离环中,所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;或者,所述第一导电通孔结构和/或所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;The first conductive via structure is located in the isolation ring, and the second conductive via structure is located outside the isolation ring near the center of the capacitor; or, the first conductive via structure and/ Or the second conductive via structure is located outside the isolation ring near the center of the capacitor;
    所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The first external electrode is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure, and the second external electrode is electrically connected to the at least one second conductive layer through the at least one second conductive layer. Part or all of the even-numbered conductive layers in the multilayer conductive layers to which the via structure is electrically connected.
  10. 根据权利要求3至9中任一项所述的电容器,其特征在于,所述电容器还包括:环状结构,所述环状结构位于所述多个支撑结构和所述多组翼状结构的外侧。The capacitor according to any one of claims 3 to 9, wherein the capacitor further comprises: a ring structure, the ring structure is located outside the plurality of support structures and the groups of wing-like structures .
  11. 根据权利要求10所述的电容器,其特征在于,所述环状结构由多层第一材料层和多层第二材料层交替堆叠形成。The capacitor according to claim 10, wherein the ring structure is formed by alternately stacking multiple first material layers and multiple second material layers.
  12. 根据权利要求11所述的电容器,其特征在于,所述多个翼状结构和所述多个支撑结构由所述第一材料形成。The capacitor of claim 11, wherein the plurality of wing-like structures and the plurality of support structures are formed of the first material.
  13. 根据权利要求3至12中任一项所述的电容器,其特征在于,所述多翼结构由导电材料制成,所述第二外接电极电连接至所述多翼结构。The capacitor according to any one of claims 3 to 12, wherein the multi-wing structure is made of conductive material, and the second external electrode is electrically connected to the multi-wing structure.
  14. 根据权利要求3至12中任一项所述的电容器,其特征在于,所述多翼结构包括主体材料和主体材料表面的导电层或导电区域,所述第二外接电极通过与主体材料和主体材料表面的导电层或导电区域电连接与所述多翼结构的电连接。The capacitor according to any one of claims 3 to 12, wherein the multi-wing structure comprises a main body material and a conductive layer or a conductive area on the surface of the main body material, and the second external electrode passes through the main body material and the main body material. The conductive layer or conductive area on the surface of the material is electrically connected to the electrical connection of the multi-wing structure.
  15. 根据权利要求3至14中任一项所述的电容器,其特征在于,还包括:填充结构,所述填充结构包覆所述叠层结构,并填充所述叠层结构形成的空隙。The capacitor according to any one of claims 3 to 14, further comprising: a filling structure that covers the laminated structure and fills the void formed by the laminated structure.
  16. 根据权利要求3至15中任一项所述的电容器,其特征在于,所述 电容器还包括:衬底,设置于所述多翼结构的下方。The capacitor according to any one of claims 3 to 15, wherein the capacitor further comprises: a substrate disposed under the multi-wing structure.
  17. 根据权利要求16所述的电容器,其特征在于,所述多组翼状结构中与所述衬底接触的翼状结构在不同的支撑结构之间存在非连续区域。The capacitor according to claim 16, wherein the wing-shaped structure in contact with the substrate in the plurality of groups of wing-shaped structures has a discontinuous area between different supporting structures.
  18. 根据权利要求17所述的电容器,其特征在于,所述衬底在所述非连续区域处形成衬底沟槽,所述叠层结构进一步设置于所述衬底沟槽内。18. The capacitor according to claim 17, wherein the substrate forms a substrate trench at the discontinuous region, and the stacked structure is further disposed in the substrate trench.
  19. 根据权利要求16至18中任一项所述的电容器,其特征在于,所述支撑结构贯穿所述衬底,以使所述衬底的下表面露出所述叠层结构。The capacitor according to any one of claims 16 to 18, wherein the supporting structure penetrates the substrate, so that the lower surface of the substrate exposes the laminated structure.
  20. 根据权利要求19所述的电容器,其特征在于,所述第三外接电极和/或所述第四外接电极电连接至所述多层导电层位于所述支撑结构中的区域。The capacitor according to claim 19, wherein the third external electrode and/or the fourth external electrode are electrically connected to a region of the multilayer conductive layer located in the support structure.
  21. 根据权利要求16至20中任一项所述的电容器,其特征在于,所述衬底由导电材料制成,所述第三外接电极通过所述衬底电连接至所述多层导电层中与所述衬底接触的导电层。The capacitor according to any one of claims 16 to 20, wherein the substrate is made of a conductive material, and the third external electrode is electrically connected to the multilayer conductive layer through the substrate A conductive layer in contact with the substrate.
  22. 根据权利要求2至21中任一项所述的电容器,其特征在于,所述第一外接电极和/或所述第二外接电极通过位于所述多翼结构上方的第一互联结构电连接至所述多层导电层中的导电层。The capacitor according to any one of claims 2 to 21, wherein the first external electrode and/or the second external electrode are electrically connected to the first interconnection structure located above the multi-wing structure The conductive layer in the multilayer conductive layer.
  23. 根据权利要求22所述的电容器,其特征在于,所述第一互联结构包括至少一个第一绝缘层、至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,所述至少一个第一绝缘层位于所述多翼结构的上方,所述第一导电通孔结构和所述第二导电通孔结构贯穿所述至少一个第一绝缘层,所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The capacitor according to claim 22, wherein the first interconnection structure comprises at least one first insulating layer, at least one first conductive via structure and at least one second conductive via structure, wherein the at least A first insulating layer is located above the multi-wing structure, the first conductive via structure and the second conductive via structure penetrate the at least one first insulating layer, and the first external electrode passes through the At least one first conductive via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to the at least one second conductive via structure. Part or all of the even-numbered conductive layers in the multilayer conductive layer.
  24. 根据权利要求2至23中任一项所述的电容器,其特征在于,所述第三外接电极和/或所述第四外接电极通过位于所述多翼结构下方的第二互联结构电连接至所述多层导电层中的导电层。The capacitor according to any one of claims 2 to 23, wherein the third external electrode and/or the fourth external electrode are electrically connected to a second interconnection structure located under the multi-wing structure The conductive layer in the multilayer conductive layer.
  25. 根据权利要求24所述的电容器,其特征在于,所述第二互联结构包括至少一个第二绝缘层、至少一个第三导电通孔结构和至少一个第四导电通孔结构,其中,所述至少一个第二绝缘层位于所述多翼结构的下方,所述第三导电通孔结构和所述第四导电通孔结构贯穿所述至少一个第二绝缘层, 所述第三外接电极通过所述至少一个第三导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极通过所述至少一个第四导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The capacitor according to claim 24, wherein the second interconnection structure comprises at least one second insulating layer, at least one third conductive via structure, and at least one fourth conductive via structure, wherein the at least A second insulating layer is located under the multi-wing structure, the third conductive via structure and the fourth conductive via structure penetrate the at least one second insulating layer, and the third external electrode passes through the At least one third conductive via structure is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to the at least one fourth conductive via structure through the at least one fourth conductive via structure. Part or all of the even-numbered conductive layers in the multilayer conductive layer.
  26. 根据权利要求1至25中任一项所述的电容器,其特征在于,还包括:第一电极层,设置于所述叠层结构的上方,所述第一电极层包括相互分离的至少一个第一导电区域和至少一个第二导电区域,所述第一导电区域形成所述第一外接电极,所述第二导电区域形成所述第二外接电极。The capacitor according to any one of claims 1 to 25, further comprising: a first electrode layer disposed above the laminated structure, and the first electrode layer includes at least one first electrode layer separated from each other. A conductive region and at least one second conductive region, the first conductive region forms the first external electrode, and the second conductive region forms the second external electrode.
  27. 根据权利要求1至26中任一项所述的电容器,其特征在于,还包括:第二电极层,设置于所述叠层结构的下方,所述第二电极层包括相互分离的至少一个第三导电区域和至少一个第四导电区域,所述第三导电区域形成所述第三外接电极,所述第四导电区域形成所述第四外接电极。The capacitor according to any one of claims 1 to 26, further comprising: a second electrode layer disposed under the laminated structure, and the second electrode layer includes at least one first electrode layer separated from each other. Three conductive regions and at least one fourth conductive region, the third conductive region forms the third external electrode, and the fourth conductive region forms the fourth external electrode.
  28. 根据权利要求1至27中任一项所述的电容器,其特征在于,所述多层导电层中的导电层包括以下中的至少一层:The capacitor according to any one of claims 1 to 27, wherein the conductive layer in the multilayer conductive layer includes at least one of the following:
    重掺杂多晶硅层,金属硅化物层,碳层,导电聚合物层,铝层,铜层,镍层,氮化钽层,氮化钛层,氮化铝钛层,氮化硅钽层,氮化碳钽层。Heavily doped polysilicon layer, metal silicide layer, carbon layer, conductive polymer layer, aluminum layer, copper layer, nickel layer, tantalum nitride layer, titanium nitride layer, aluminum titanium nitride layer, tantalum silicon nitride layer, Tantalum carbon nitride layer.
  29. 根据权利要求1至28中任一项所述的电容器,其特征在于,所述至少一层电介质层中的电介质层包括以下中的至少一层:The capacitor according to any one of claims 1 to 28, wherein the dielectric layer in the at least one dielectric layer comprises at least one of the following:
    硅的氧化物层,硅的氮化物层,硅的氮氧化物层,金属的氧化物层,金属的氮化物层和金属的氮氧化物层。Silicon oxide layer, silicon nitride layer, silicon oxynitride layer, metal oxide layer, metal nitride layer and metal oxynitride layer.
  30. 一种电容结构,其特征在于,包括:第一电容器和第二电容器,其中,所述第一电容器和所述第二电容器为如权利要求1至29中任一项所述的电容器,所述第二电容器位于所述第一电容器的上方,且所述第一电容器的第一外接电极与所述第二电容器的第三外接电极电连接,所述第一电容器的第二外接电极与所述第二电容器的第四外接电极电连接。A capacitor structure, characterized by comprising: a first capacitor and a second capacitor, wherein the first capacitor and the second capacitor are the capacitors according to any one of claims 1 to 29, and the The second capacitor is located above the first capacitor, and the first external electrode of the first capacitor is electrically connected to the third external electrode of the second capacitor, and the second external electrode of the first capacitor is electrically connected to the third external electrode of the second capacitor. The fourth external electrode of the second capacitor is electrically connected.
  31. 根据权利要求30所述的电容结构,其特征在于,所述电容结构还包括:第三电容器,所述第三电容器为如权利要求1至29中任一项所述的电容器,所述第三电容器位于所述第一电容器的下方,且所述第一电容器的第三外接电极与所述第三电容器的第一外接电极电连接,所述第一电容器的第四外接电极与所述第三电容器的第二外接电极电连接。The capacitor structure according to claim 30, wherein the capacitor structure further comprises: a third capacitor, the third capacitor being the capacitor according to any one of claims 1 to 29, the third capacitor The capacitor is located below the first capacitor, and the third external electrode of the first capacitor is electrically connected to the first external electrode of the third capacitor, and the fourth external electrode of the first capacitor is electrically connected to the third external electrode. The second external electrode of the capacitor is electrically connected.
  32. 一种电容器的制作方法,其特征在于,包括:A method for manufacturing a capacitor, which is characterized in that it comprises:
    在衬底上方制备叠层结构,所述叠层结构包括至少一层电介质层和多层导电层,所述至少一层电介质层和所述多层导电层形成导电层与电介质层彼此交替的结构;A laminated structure is prepared over the substrate, the laminated structure includes at least one dielectric layer and a plurality of conductive layers, the at least one dielectric layer and the multilayer conductive layer form a structure in which the conductive layer and the dielectric layer alternate with each other ;
    制备至少一个第一外接电极和至少一个第二外接电极,其中,所述第一外接电极和所述第二外接电极位于所述叠层结构的上方,所述第一外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层;At least one first external electrode and at least one second external electrode are prepared, wherein the first external electrode and the second external electrode are located above the laminated structure, and the first external electrode is electrically connected to the Part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer;
    制备至少一个第三外接电极和至少一个第四外接电极,其中,所述第三外接电极和所述第四外接电极位于所述叠层结构的下方,所述第三外接电极电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极电连接至所述多层导电层中的部分或者全部偶数层导电层。At least one third external electrode and at least one fourth external electrode are prepared, wherein the third external electrode and the fourth external electrode are located below the laminated structure, and the third external electrode is electrically connected to the Part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to part or all of the even-numbered conductive layers in the multilayer conductive layer.
  33. 根据权利要求32所述的方法,其特征在于,所述方法还包括:The method according to claim 32, wherein the method further comprises:
    在所述衬底上方制备多翼结构,所述叠层结构包覆所述多翼结构。A multi-wing structure is prepared above the substrate, and the laminated structure covers the multi-wing structure.
  34. 根据权利要求33所述的方法,其特征在于,所述多翼结构包括多组翼状结构和多个支撑结构,其中,每组翼状结构中的各个翼状结构平行设置,所述支撑结构为中空的结构,所述翼状结构为所述支撑结构的外侧壁沿第一方向延伸形成的凸起结构,所述第一方向为垂直于所述支撑结构的侧壁的方向。The method according to claim 33, wherein the multi-wing structure comprises multiple groups of wing-like structures and multiple supporting structures, wherein each wing-like structure in each group of wing-like structures is arranged in parallel, and the supporting structure is hollow Structure, the wing-like structure is a convex structure formed by extending the outer side wall of the support structure in a first direction, and the first direction is a direction perpendicular to the side wall of the support structure.
  35. 根据权利要求34所述的方法,其特征在于,所述在所述衬底上方制备多翼结构,包括:The method of claim 34, wherein the preparing a multi-wing structure above the substrate comprises:
    在所述衬底上方制备多层结构,所述多层结构包括多层第一材料层和多层第二材料层,所述多层第一材料层和所述多层第二材料层形成第一材料层与第二材料层彼此交替的结构,所述第一材料与所述第二材料不同,以及所述第一材料层与所述衬底直接接触;A multi-layer structure is prepared over the substrate, the multi-layer structure includes a multi-layer first material layer and a multi-layer second material layer, the multi-layer first material layer and the multi-layer second material layer form a first material layer A structure in which a material layer and a second material layer alternate with each other, the first material and the second material are different, and the first material layer is in direct contact with the substrate;
    以所述多层结构为基础,制备多个沟槽,所述沟槽沿着垂直于所述衬底的方向延伸且进入所述衬底;Preparing a plurality of trenches on the basis of the multilayer structure, the trenches extending in a direction perpendicular to the substrate and entering the substrate;
    在所述多层结构上表面、所述多个沟槽的底部和内侧壁沉积所述第一材料,以形成所述第一材料制成的多个中空柱状的第一结构,作为形成所述多个支撑结构的基础;The first material is deposited on the upper surface of the multilayer structure, the bottoms and inner side walls of the plurality of trenches to form a plurality of hollow columnar first structures made of the first material, as the formation of the The foundation of multiple supporting structures;
    在余留的所述多层结构内制备沟槽状的多个第二结构,所述第二结构沿着垂直于所述衬底的方向延伸至所述衬底的上表面;Preparing a plurality of trench-shaped second structures in the remaining multilayer structure, the second structures extending to the upper surface of the substrate in a direction perpendicular to the substrate;
    去除所述多个第二结构中露出的第二材料层;Removing the second material layer exposed in the plurality of second structures;
    对所述衬底进行减薄处理,以形成所述多翼结构。The substrate is thinned to form the multi-wing structure.
  36. 根据权利要求34或35所述的方法,其特征在于,所述多层导电层中的部分或者全部导电层与所述多翼结构共形。The method according to claim 34 or 35, wherein part or all of the conductive layers in the multilayer conductive layer are conformal to the multi-wing structure.
  37. 根据权利要求34或35所述的方法,其特征在于,所述多层导电层中的一部分导电层与所述多翼结构共形,另一部分导电层在外形上与所述多翼结构互补。The method according to claim 34 or 35, wherein a part of the conductive layer in the multi-layer conductive layer is conformal to the multi-wing structure, and the other part of the conductive layer is complementary in shape to the multi-wing structure.
  38. 根据权利要求34至37中任一项所述的方法,其特征在于,所述多组翼状结构中的单个翼状结构包括沿着所述第一方向延伸的多个翼。The method according to any one of claims 34 to 37, wherein a single wing-like structure in the plurality of groups of wing-like structures includes a plurality of wings extending along the first direction.
  39. 根据权利要求34至38中任一项所述的方法,其特征在于,所述多个支撑结构中的支撑结构在其中空区域设置有至少一个轴,所述轴与所述支撑结构的侧壁平行。The method according to any one of claims 34 to 38, wherein the supporting structure of the plurality of supporting structures is provided with at least one shaft in the hollow area thereof, and the shaft is connected to the side wall of the supporting structure. parallel.
  40. 根据权利要求34至39中任一项所述的方法,其特征在于,所述方法还包括:The method according to any one of claims 34 to 39, wherein the method further comprises:
    制备隔离环,所述隔离环位于所述多个支撑结构的外侧的上方,且所述隔离环用于将所述叠层结构分隔为内侧和外侧两部分,所述第一外接电极和所述第二外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接,以及所述第三外接电极和所述第四外接电极仅与所述叠层结构位于所述隔离环的内侧的部分电连接。Prepare an isolation ring, the isolation ring is located above the outer side of the plurality of support structures, and the isolation ring is used to separate the laminated structure into two parts, an inner side and an outer side, the first external electrode and the The second external electrode is only electrically connected to the part of the laminated structure located on the inner side of the isolation ring, and the third external electrode and the fourth external electrode are only electrically connected to the laminated structure located on the inner side of the isolation ring. The inner part is electrically connected.
  41. 根据权利要求40所述的方法,其特征在于,所述方法还包括:The method according to claim 40, wherein the method further comprises:
    制备至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,At least one first conductive via structure and at least one second conductive via structure are prepared, wherein,
    所述第一导电通孔结构位于所述隔离环中,所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;或者,所述第一导电通孔结构和/或所述第二导电通孔结构位于所述隔离环之外靠近所述电容器中心的区域;The first conductive via structure is located in the isolation ring, and the second conductive via structure is located outside the isolation ring near the center of the capacitor; or, the first conductive via structure and/ Or the second conductive via structure is located outside the isolation ring near the center of the capacitor;
    所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The first external electrode is electrically connected to some or all of the odd-numbered conductive layers in the multilayer conductive layer through the at least one first conductive via structure, and the second external electrode is electrically connected to the at least one second conductive layer through the at least one second conductive layer. Part or all of the even-numbered conductive layers in the multilayer conductive layers to which the via structure is electrically connected.
  42. 根据权利要求34至41中任一项所述的方法,其特征在于,所述电容器还包括:环状结构,所述环状结构位于所述多个支撑结构和所述多组翼 状结构的外侧。The method according to any one of claims 34 to 41, wherein the capacitor further comprises: a ring structure, the ring structure is located outside the plurality of support structures and the groups of wing-like structures .
  43. 根据权利要求42所述的方法,其特征在于,所述环状结构由多层第一材料层和多层第二材料层交替堆叠形成。The method according to claim 42, wherein the ring structure is formed by alternately stacking multiple layers of first material and multiple layers of second material.
  44. 根据权利要求43所述的方法,其特征在于,所述多组翼状结构和所述多个支撑结构由所述第一材料形成。The method of claim 43, wherein the plurality of sets of wing-like structures and the plurality of supporting structures are formed of the first material.
  45. 根据权利要求34至44中任一项所述的方法,其特征在于,在所述多翼结构由导电材料制成,所述第二外接电极电连接至所述多翼结构。The method according to any one of claims 34 to 44, wherein the multi-wing structure is made of a conductive material, and the second external electrode is electrically connected to the multi-wing structure.
  46. 根据权利要求34至44中任一项所述的方法,其特征在于,所述多翼结构包括主体材料和主体材料表面的导电层或导电区域,所述第二外接电极通过与主体材料和主体材料表面的导电层或导电区域电连接与所述多翼结构的电连接。The method according to any one of claims 34 to 44, wherein the multi-wing structure comprises a main body material and a conductive layer or a conductive area on the surface of the main body material, and the second external electrode passes through the main body material and the main body material. The conductive layer or conductive area on the surface of the material is electrically connected to the electrical connection of the multi-wing structure.
  47. 根据权利要求34至46中任一项所述的方法,其特征在于,所述方法还包括:The method according to any one of claims 34 to 46, wherein the method further comprises:
    制备填充结构,所述填充结构包覆所述叠层结构,并填充所述叠层结构形成的空隙。A filling structure is prepared, and the filling structure covers the laminated structure and fills the voids formed by the laminated structure.
  48. 根据权利要求34至47中任一项所述的方法,其特征在于,所述多组翼状结构中与所述衬底接触的翼状结构在不同的支撑结构之间存在非连续区域。The method according to any one of claims 34 to 47, wherein the wing-shaped structure in contact with the substrate in the plurality of groups of wing-shaped structures has a discontinuous area between different support structures.
  49. 根据权利要求48所述的方法,其特征在于,所述衬底在所述非连续区域处形成衬底沟槽,所述叠层结构进一步设置于所述衬底沟槽内。The method of claim 48, wherein the substrate forms a substrate trench at the discontinuous region, and the stacked structure is further disposed in the substrate trench.
  50. 根据权利要求34至49中任一项所述的方法,其特征在于,所述支撑结构贯穿所述衬底,以使所述衬底的下表面露出所述叠层结构。The method according to any one of claims 34 to 49, wherein the support structure penetrates the substrate, so that the lower surface of the substrate exposes the laminated structure.
  51. 根据权利要求50所述的方法,其特征在于,所述第三外接电极和/或所述第四外接电极电连接至所述多层导电层位于所述支撑结构中的区域。The method according to claim 50, wherein the third external electrode and/or the fourth external electrode are electrically connected to a region of the multilayer conductive layer located in the support structure.
  52. 根据权利要求34至51中任一项所述的方法,其特征在于,所述衬底由导电材料制成,所述第三外接电极通过所述衬底电连接至所述多层导电层中与所述衬底接触的导电层。The method according to any one of claims 34 to 51, wherein the substrate is made of a conductive material, and the third external electrode is electrically connected to the multilayer conductive layer through the substrate A conductive layer in contact with the substrate.
  53. 根据权利要求33至52中任一项所述的方法,其特征在于,所述方法还包括:The method according to any one of claims 33 to 52, wherein the method further comprises:
    制备第一互联结构,其中,所述第一互联结构位于所述多翼结构上方,所述第一外接电极和/或所述第二外接电极通过所述第一互联结构电连接至 所述多层导电层中的导电层。A first interconnection structure is prepared, wherein the first interconnection structure is located above the multi-wing structure, and the first external electrode and/or the second external electrode are electrically connected to the multi-wing structure through the first interconnection structure. The conductive layer in the conductive layer.
  54. 根据权利要求53所述的方法,其特征在于,所述第一互联结构包括至少一个第一绝缘层、至少一个第一导电通孔结构和至少一个第二导电通孔结构,其中,所述至少一个第一绝缘层位于所述多翼结构的上方,所述第一导电通孔结构和所述第二导电通孔结构贯穿所述至少一个第一绝缘层,所述第一外接电极通过所述至少一个第一导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第二外接电极通过所述至少一个第二导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The method of claim 53, wherein the first interconnection structure comprises at least one first insulating layer, at least one first conductive via structure and at least one second conductive via structure, wherein the at least A first insulating layer is located above the multi-wing structure, the first conductive via structure and the second conductive via structure penetrate the at least one first insulating layer, and the first external electrode passes through the At least one first conductive via structure is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the second external electrode is electrically connected to the at least one second conductive via structure. Part or all of the even-numbered conductive layers in the multilayer conductive layer.
  55. 根据权利要求33至54中任一项所述的方法,其特征在于,所述方法还包括:The method according to any one of claims 33 to 54, characterized in that, the method further comprises:
    制备第二互联结构,其中,所述第二互联结构位于所述多翼结构下方,所述第三外接电极和/或所述第四外接电极通过所述第二互联结构电连接至所述多层导电层中的导电层。A second interconnection structure is prepared, wherein the second interconnection structure is located below the multi-wing structure, and the third external electrode and/or the fourth external electrode are electrically connected to the multi-wing structure through the second interconnection structure. The conductive layer in the conductive layer.
  56. 根据权利要求55所述的方法,其特征在于,所述第二互联结构包括至少一个第二绝缘层、至少一个第三导电通孔结构和至少一个第四导电通孔结构,其中,所述至少一个第二绝缘层位于所述多翼结构的下方,所述第三导电通孔结构和所述第四导电通孔结构贯穿所述至少一个第二绝缘层,所述第三外接电极通过所述至少一个第三导电通孔结构电连接至所述多层导电层中的部分或者全部奇数层导电层,所述第四外接电极通过所述至少一个第四导电通孔结构电连接至的所述多层导电层中的部分或者全部偶数层导电层。The method of claim 55, wherein the second interconnection structure comprises at least one second insulating layer, at least one third conductive via structure, and at least one fourth conductive via structure, wherein the at least A second insulating layer is located under the multi-wing structure, the third conductive via structure and the fourth conductive via structure penetrate the at least one second insulating layer, and the third external electrode passes through the At least one third conductive via structure is electrically connected to part or all of the odd-numbered conductive layers in the multilayer conductive layer, and the fourth external electrode is electrically connected to the at least one fourth conductive via structure through the at least one fourth conductive via structure. Part or all of the even-numbered conductive layers in the multilayer conductive layer.
  57. 根据权利要求32至56中任一项所述的方法,其特征在于,所述制备至少一个第一外接电极和至少一个第二外接电极,包括:The method according to any one of claims 32 to 56, wherein the preparing at least one first external electrode and at least one second external electrode comprises:
    在所述叠层结构的上方制备第一电极层,所述第一电极层包括相互分离的至少一个第一导电区域和至少一个第二导电区域,所述第一导电区域形成所述第一外接电极,所述第二导电区域形成所述第二外接电极。A first electrode layer is prepared above the laminated structure. The first electrode layer includes at least one first conductive region and at least one second conductive region that are separated from each other, and the first conductive region forms the first external circumstance. An electrode, and the second conductive area forms the second external electrode.
  58. 根据权利要求32至57中任一项所述的方法,其特征在于,所述制备至少一个第三外接电极和至少一个第四外接电极,包括:The method according to any one of claims 32 to 57, wherein the preparing at least one third external electrode and at least one fourth external electrode comprises:
    在所述多翼结构的下方制备第二电极层,所述第二电极层包括相互分离的至少一个第三导电区域和至少一个第四导电区域,所述第三导电区域形成 所述第三外接电极,所述第四导电区域形成所述第四外接电极。A second electrode layer is prepared under the multi-wing structure. The second electrode layer includes at least one third conductive region and at least one fourth conductive region that are separated from each other, and the third conductive region forms the third external circumstance. An electrode, the fourth conductive area forms the fourth external electrode.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1090090A (en) * 1992-12-10 1994-07-27 三星电子株式会社 The manufacture method of semiconductor memory
US20110260231A1 (en) * 2010-04-21 2011-10-27 Institute of Microelectronics, Chinese Academy of Sciences Memory device and method for manufacturing the same
CN104393046A (en) * 2014-04-24 2015-03-04 中国科学院微电子研究所 Three-dimensional semiconductor device and manufacturing method thereof
CN110504284A (en) * 2018-05-17 2019-11-26 长鑫存储技术有限公司 Columnar capacitor array structure and preparation method
CN110785840A (en) * 2019-09-17 2020-02-11 深圳市汇顶科技股份有限公司 Capacitor and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1090090A (en) * 1992-12-10 1994-07-27 三星电子株式会社 The manufacture method of semiconductor memory
US20110260231A1 (en) * 2010-04-21 2011-10-27 Institute of Microelectronics, Chinese Academy of Sciences Memory device and method for manufacturing the same
CN104393046A (en) * 2014-04-24 2015-03-04 中国科学院微电子研究所 Three-dimensional semiconductor device and manufacturing method thereof
CN110504284A (en) * 2018-05-17 2019-11-26 长鑫存储技术有限公司 Columnar capacitor array structure and preparation method
CN110785840A (en) * 2019-09-17 2020-02-11 深圳市汇顶科技股份有限公司 Capacitor and manufacturing method thereof

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