WO2021190506A1 - 无线耳机、无线耳机系统和无线耳机的关机方法 - Google Patents

无线耳机、无线耳机系统和无线耳机的关机方法 Download PDF

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Publication number
WO2021190506A1
WO2021190506A1 PCT/CN2021/082423 CN2021082423W WO2021190506A1 WO 2021190506 A1 WO2021190506 A1 WO 2021190506A1 CN 2021082423 W CN2021082423 W CN 2021082423W WO 2021190506 A1 WO2021190506 A1 WO 2021190506A1
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WO
WIPO (PCT)
Prior art keywords
power
processor
instruction
module
wireless headset
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PCT/CN2021/082423
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English (en)
French (fr)
Inventor
刘绍斌
龚金华
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Oppo广东移动通信有限公司
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Publication of WO2021190506A1 publication Critical patent/WO2021190506A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1025—Accumulators or arrangements for charging
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • This application relates to the field of earphone technology, and in particular to a wireless earphone, a wireless earphone system, and a method for shutting down the wireless earphone.
  • TWS Truste Wireless Stereo headsets
  • TWS headsets eliminate the wire material and use Bluetooth connection to realize the wireless separation of the left and right channels of Bluetooth, making the use of TWS headsets diversified. It can be exclusive, shared, and one device can be used as two devices.
  • This application proposes a wireless earphone, which uses a delay to ensure that the earphone system is completely shut down before being powered off, which significantly improves the stability and reliability of the system.
  • the embodiment of the first aspect of the present application proposes a wireless headset, including: a power supply module for supplying power to the wireless headset; a processor, the processor is connected to the power supply module, the processor is used for shutting down according to instructions It shuts down after saving data, and is powered off after saving data.
  • the power module supplies power to the wireless headset
  • the processor is configured to shut down after saving data according to the shutdown instruction, and is powered off after saving the data.
  • the wireless headset uses a delay to ensure that the processor is completely shut down and then powered off, which significantly improves the stability and reliability of the system.
  • the embodiment of the second aspect of the present application proposes a wireless earphone system, which includes a charging box and the above-mentioned wireless earphone.
  • a delay is used to ensure that the processor is powered off after saving data, which significantly improves the stability and reliability of the system.
  • An embodiment of the third aspect of the present application proposes a method for shutting down a wireless headset.
  • the wireless headset includes: a power supply module for supplying power to the wireless headset and a processor connected to the power supply module.
  • the shutdown method includes: The processor shuts down after saving the data according to the shutdown instruction; the processor is powered off after saving the data.
  • a delay is used to ensure that the processor is powered off after saving data, which significantly improves the stability and reliability of the system.
  • Fig. 1 is a schematic block diagram of a wireless headset according to an embodiment of the present application
  • Fig. 2 is a schematic block diagram of a wireless earphone system according to an embodiment of the present application
  • Fig. 3 is a schematic diagram of waveforms of a control module of a wireless earphone system according to an embodiment of the present application
  • Fig. 4 is a schematic diagram of waveforms of a control module of a wireless earphone system according to another embodiment of the present application.
  • Fig. 5 is a schematic diagram of waveforms of a control module of a wireless earphone system according to Example 1 of the present application;
  • Fig. 6 is a schematic structural diagram of a switch module according to a specific embodiment of the present application.
  • FIG. 7 is a schematic diagram of waveforms of a control module of a wireless earphone system according to another embodiment of the present application.
  • Fig. 8 is a flowchart of a method for shutting down a wireless headset according to an embodiment of the present application.
  • the current solution generally uses a charging chip with a low-power mode, so that the other power sources of the headset are connected to its output pins as much as possible, and put it into low-power mode when leaving the factory, which can extend the battery's usable time .
  • the power consumption of this kind of charging chip is about 1uA, plus the power consumption of the lithium battery protection charging chip is about 4uA, the total power consumption is about 5uA, and the power will be consumed in more than eight months in the case of full power.
  • the current common method is to directly send commands to the charging chip through the I2C (Inter-Integrated Circuit) bus, so that the charging chip enters a low power consumption mode and powers down the system.
  • I2C Inter-Integrated Circuit
  • Fig. 1 is a schematic block diagram of a wireless headset according to an embodiment of the present application.
  • the wireless headset of the embodiment of the present application includes: a power module 10 and a processor 20.
  • the power module 10 is used to supply power to the wireless headset, the processor 20 is connected to the power module 10, and the processor 20 is used to shut down after saving data according to a shutdown instruction, and is powered off after saving the data.
  • this application uses a shutdown instruction to make the processor 20 power down the power module 10 after saving data, so as to ensure that the system reliably enters the low power consumption mode or the transportation power saving mode shipmode mode.
  • the shutdown instruction can be From the charging box, it may also be a shutdown command generated for the shutdown operation of the wireless headset.
  • the power-off delay method can be used in this application to avoid the instability caused by the power-off of the processor 20 without saving data during the shutdown process.
  • This delay can be implemented at the charging box, for example, the delay Send a power-down command, the delay of the power-down command can be based on a period of time after the power-off command is sent, or it can be based on a period of time after the charging box receives the feedback signal used to characterize the headset receiving the power-off command; the delay can also be It is implemented on the earphone end.
  • the power module 10 itself can be used to implement delay control, or other modules can be used to delay control the connection of the power module 10 and the processor 20. Since power failure after shutdown may trigger the processor 20 to restart in some design solutions, the selection of the timing of the power failure should also be considered in consideration of the shutdown time, the command setting situation and other aspects.
  • the processor wireless headset disconnects the connection between the power module 10 and the processor 20 to control the processor 20 to power down after saving data.
  • the wireless headset also includes: a metal interface POGO PIN, which can be connected to the charging box; the processor 20 is connected to the metal interface POGO PIN, and the processor 20 is also used to: receive data sent by the charging box through the metal interface POGO PIN Shutdown instruction.
  • a metal interface POGO PIN which can be connected to the charging box
  • the processor 20 is connected to the metal interface POGO PIN, and the processor 20 is also used to: receive data sent by the charging box through the metal interface POGO PIN Shutdown instruction.
  • the wireless headset further includes: a switch module 30 and a control module 40.
  • the power module 10 is connected to the processor 20 through the switch module 30; the control module 40 is used to control the switch module 30 to disconnect the power module 10 and the processor 20 according to the first power-down instruction, so that the processor 20 is Power down after saving data.
  • control module 40 is connected to the metal interface POGO PIN, and the control module 40 is further configured to receive the first power-off instruction sent by the charging box through the metal interface POGO PIN.
  • the metal interface POGO PIN is used to charge and communicate with wireless earphones.
  • the common metal interface POGO PIN has two PINs or three PINs, some of which are set at the bottom of the earphone pole, and some are set at Below the earplugs.
  • the function of the charging box is to store the wireless earphones, and at the same time there is a battery in the charging box, so that it has the function of charging the wireless earphones, there will be two charging copper pillars inside.
  • the time when the charging box sends the first power-down instruction is no earlier than the time when the charging box sends the shutdown instruction; the control module 40 is specifically configured to: after receiving the first power-down instruction, delay the first After time, the control switch module 30 disconnects the connection between the power supply module 10 and the processor 20.
  • the first time can be determined by the shutdown time of the processor 20.
  • the processor 20 can also be powered off after the data is saved before the shutdown, so the first time is also possible Related to data retention time.
  • the processor 20 may be a Bluetooth system including a Bluetooth chip, a wireless module such as a wifi (Wireless Fidelity, wireless fidelity) system, or other processors, such as a CPU (Central Processing Unit, Central processing unit) and so on.
  • a Bluetooth chip including a Bluetooth chip, a wireless module such as a wifi (Wireless Fidelity, wireless fidelity) system, or other processors, such as a CPU (Central Processing Unit, Central processing unit) and so on.
  • a wireless module such as a wifi (Wireless Fidelity, wireless fidelity) system
  • CPU Central Processing Unit, Central processing unit
  • the charging box sends a shutdown instruction to the wireless headset through the metal interface POGO PIN, and the shutdown instruction is passed To the processor 20, after the processor 20 parses the instruction (at this time, it can feed back a response signal to the charging box), when the response signal indicates that the wireless headset receives the shutdown instruction and enters the shutdown process, the charging box passes the metal interface POGO
  • the PIN sends the first power-down instruction to the control module 40 in the wireless headset, so that it controls the switch module 30 between the power supply module 10 and the processor 20 to disconnect, and the control module 40 delays the first power-down instruction after the first power-down instruction is recognized. For a time, the switch module 30 is disconnected, which avoids the abnormality caused by the power failure of the processor 20 when the data is not saved when the processor 20 is shut down.
  • control module 40 For example, if the control module 40 outputs a high-level signal to control the switch module 30 to turn on, the control module 40 outputs a low-level signal to control the switch module 30 to turn off.
  • the control module 40 outputs a high-level signal; after the control module 40 receives the first power-down command t1, it starts timing, and outputs a low-level signal at t2. Signal, the switch module 30 is turned off.
  • the entire control process can include the following steps:
  • the charging box sends a shutdown instruction to the wireless headset.
  • the processor receives a shutdown instruction, and the processor shuts down.
  • the charging box sends the first power-off instruction to the wireless headset through the metal interface POGO PIN at time t1.
  • control module in the wireless headset such as the control chip IC, receives the first power-down instruction and analyzes it.
  • control module starts timing, and after a first time delay such as t2-t1, the control switch module is turned off.
  • the encoding method of the control module 40 may also be the number of transmitted pulses. For example, when the control module 40 receives 4 high levels with a pulse width of 20 ms (as shown in Figure 4) When shown), the control switch module 30 is turned off.
  • this application guarantees the stability and reliability of the processor by delaying processing, that is, powering off after saving data. In this way, the current consumption is significantly reduced and the storage time of the power module is increased.
  • this method to enter the shutdown there are only a few parts of consumption such as battery self-consumption and analysis control module, etc.
  • the power consumption of this analysis control module is very low, which helps to ensure the extremely low power consumption of the system; significantly improves the reliability
  • abnormal situations such as the loss of data in the processor caused by the power failure of the power supply module during the shutdown process are avoided, and the system is stabilized.
  • the power failure is performed after the shutdown, which further improves the stability of the system; significantly improves the procurement
  • the control chip and switch module (MOS tube can be used) used in this program are more conventional materials, so it is more convenient to purchase.
  • control module 40 After the control module 40 receives the first power-down command, it will delay for the first time, and the output level of its output port will change, so there will be a problem. During this period of time, the user takes the wireless headset out of the charging box. At this time, after a short period of time, the wireless headset will enter the shutdown mode and cannot be used. In order to solve this problem, the application also optimizes the function of the control module 40.
  • the control module 40 is also used to: receive the lid opening instruction sent by the charging box through the metal interface POGO PIN; If an instruction to open the cover is received within the first time, the switch module 30 is controlled to not disconnect the connection between the power supply module 10 and the processor 20 after a delay of the first time.
  • control module 40 detects the opening command sent by the charging box to the control module 40, it originally needs to output a low-level signal to cancel at time t2. It still keeps outputting a high level signal, which can ensure that the processor will not lose power.
  • the user puts the headset into the charging box, and closes the lid of the charging box, so that the charging box can charge the wireless headset.
  • the charging box After the charging box has fully charged the wireless headset, it sends a shutdown instruction to the processor 20 through the metal interface POGO PIN, so that the processor 20 can shut down.
  • the first power down instruction is sent to the control module 40 through the metal interface POGO PIN, and the control module 40
  • the control module 40 After receiving the power-down command, the power-off will be delayed, and the power will be off at t2.
  • the control module 40 receives a lid opening instruction sent by the charging box through the metal interface POGO PIN, it controls the processor 20 not to power down at time t2. This avoids that after the wireless headset is taken out during the delay period, the headset enters the shutdown mode and cannot be used.
  • the processor 20 is specifically configured to: delay the shutdown for a second time after saving data according to the shutdown instruction; the control module 40 is specifically configured to: control the switch module 30 to turn off the power after receiving the first power down instruction
  • the time when the charging box sends the first power-down instruction is a third time later than the time when the charging box sends the shutdown instruction.
  • the purpose of setting the second time is to avoid shutting down too soon after data is saved, causing the power failure to occur after the shutdown, causing the processor 20 to restart and causing instability. For this reason, the third time should be controlled to shut down after the data is saved.
  • the third time controls the power-down time to be between the latest time to keep data and the earliest time to shut down, that is, the two critical values of the third time can be the maximum data write time respectively.
  • the earliest shutdown time (minimum write data time + second time).
  • the shutdown function can also be achieved by delaying the shutdown process of the headset.
  • the specific operation is: after the processor 20 in the wireless headset receives the shutdown instruction, it starts the shutdown process and saves the data. After that, turn off after a delay. For the processor 20, as long as the data can be saved and the power is turned off, the wireless headset system will not be affected. Since the shutdown time of the processor 20 fluctuates within a certain range, that is, the time to write data is also fluctuating, such as 1-4s. After the data is written, it can be used to delay the second time, such as 4s, and then shut down completely.
  • the charging box only needs to send the first power-down command to the control module 40 in the third time, such as 4-5s, and the control module 40 will power-down immediately after receiving the first power-down command. In this way, it can also ensure that the processor is shut down and loses power, avoiding the unstable problem of restarting and losing power due to the power-down signal caused by the power-down after the shutdown.
  • control module 40 is specifically configured to: after receiving the first power-down instruction, control the switch module 30 to disconnect the connection between the power supply module 10 and the processor 20, and the first power-off instruction indicates that the charging box is detecting Sent after the processor 20 is shut down.
  • Example 3 the premise of adopting the solution described in Example 3 is that it must be ensured that when the first power-down instruction is sent to the control module 40, the processor 20 will not be started. Because the voltage used to send instructions to the control module 40 in some circuits is 5V, when the instructions are sent to the control module 40, if the processor 20 is in the shutdown state at this time, the processor 20 will be restarted, which will cause the processor 20 to be restarted. During startup, the wireless headset loses power, which will cause the wireless headset to be unstable.
  • This solution proposes a new solution to make the power-on recognition voltage of the processor 20 (the voltage corresponding to the power-on command of the processor) and the detection voltage of the control module 40 (the voltage corresponding to the first power-down command) different, for example,
  • the voltage corresponding to the first power-down command is less than the voltage corresponding to the power-on command of the processor, or the waveform signal corresponding to the first power-off command is different from the waveform signal corresponding to the power-on command of the processor.
  • the processor 20 may also include a detection module for detecting the voltage transmitted on the metal interface POGO PIN, where two voltages are transmitted on the metal interface POGO PIN: the power-on recognition voltage V1 of the processor 20 and the control module
  • the detection voltage V2 of 40 so that V2 ⁇ V1, can realize that after the processor 20 is actually shut down, the first power-down instruction is sent to the control module 40, so that the processor can be powered down after shutting down, ensuring The stability of the system.
  • the use of different voltages can also be applied to the situation where the power is off before the shutdown is performed after the data is saved.
  • the switch module 30 according to a specific embodiment of the present application will be described below with reference to FIG. 6.
  • the switch module 30 includes: an N-type metal oxide semiconductor field effect transistor Q and a resistor R, wherein the control electrode of the N-type metal oxide semiconductor field effect transistor Q and the control module 40 Connected, the first pole of the N-type metal oxide semiconductor field effect transistor Q is connected to the power supply module 10, the second pole of the N-type metal oxide semiconductor field effect transistor Q is connected to the processor 20, and the first end of the resistor R is connected to the power supply The module 10 is connected, and the second end of the resistor R is connected to the control electrode of the N-type metal oxide semiconductor field effect transistor Q.
  • the charging box sends the shutdown instruction to the processor 20 through the metal interface POGO PIN to shut down the processor.
  • the charging box sends the first power-off instruction to the control module 40 of the wireless headset through the metal interface POGO PIN to control
  • the module 40 outputs a corresponding level signal according to the instruction. For example, when a high-level signal is output, the N-type metal oxide semiconductor field effect transistor Q is turned on, and the power module 10 supplies power to the processor 20; when a low-level signal is output , The N-type metal oxide semiconductor field effect transistor Q is disconnected, the power module 10 does not supply power to the processor 20, and the wireless headset is powered off.
  • the wireless earphone is powered off by controlling the power supply module 10 to control the processor 20 to power off after saving data.
  • the processor 20 is further configured to: send a second power-down instruction to the power module 10 after saving data; the power module 10 is also configured to power-off after receiving the second power-off instruction.
  • the power module 10 used in the wireless headset has a power-off function.
  • the second power-off instruction is sent to the power module 10 through the I2C bus or other methods.
  • the module 10 is powered off after receiving the second power-off command, which can ensure the stability of the system, thereby making the system more reliable.
  • the processor 20 is further configured to: send a second power-down instruction to the power supply module 10 after receiving the shutdown instruction; the power supply module 10 is also configured to: delay the first power-down instruction after receiving the second power-off instruction Four times the power is off.
  • the fourth time is generally set to be greater than the longest data storage time during the shutdown process to ensure that the power is off after the data is saved.
  • the power supply module 10 used has a delayed power-down function. Specifically, after the charging box sends the shutdown instruction, the shutdown instruction is sent to the processor 20 through the metal interface POGO PIN. After receiving the shutdown instruction, the processor 20 sends the second power-down instruction to the power supply module 10. At this time, the power supply module 10 does not It will be powered off immediately. For example, after receiving the second power-off command, the power-off will be delayed for the fourth time, which can ensure the stability of the system and make the system more reliable.
  • the power module supplies power to the wireless headset
  • the processor is configured to shut down after saving data according to the shutdown instruction, and is powered off after saving the data.
  • the wireless headset uses a delay to ensure that the processor is completely shut down and then powered off, which significantly improves the stability and reliability of the system.
  • this application also proposes a wireless earphone system, which includes a charging box and the above-mentioned wireless earphone.
  • a delay is used to ensure that the processor is completely shut down and then powered off, which significantly improves the stability and reliability of the system.
  • this application also proposes a method for shutting down the wireless headset.
  • the wireless headset includes: a power module 10 for supplying power to the wireless headset, and a processor 20 connected to the power module.
  • the method for shutting down the wireless headset in the embodiment of the present application includes the following steps:
  • the processor shuts down after saving the data according to the shutdown instruction.
  • the processor is powered down after saving data, including: the wireless headset disconnects the connection between the power module and the processor to control the processor to power down after saving the data; or, the wireless headset By controlling the power-down mode of the power supply module, the control processor will power-down after saving data.
  • a delay is used to ensure that the processor is powered off after saving data, which significantly improves the stability and reliability of the system.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include at least one of the features. In the description of the present application, "a plurality of” means at least two, such as two, three, etc., unless specifically defined otherwise.
  • a "computer-readable medium” can be any device that can contain, store, communicate, propagate, or transmit a program for use by an instruction execution system, device, or device or in combination with these instruction execution systems, devices, or devices.
  • computer readable media include the following: electrical connections (electronic devices) with one or more wiring, portable computer disk cases (magnetic devices), random access memory (RAM), Read only memory (ROM), erasable and editable read only memory (EPROM or flash memory), fiber optic devices, and portable compact disk read only memory (CDROM).
  • the computer-readable medium may even be paper or other suitable medium on which the program can be printed, because it can be used, for example, by optically scanning the paper or other medium, followed by editing, interpretation, or other suitable media if necessary. The program is processed in a manner to obtain the program electronically, and then stored in the computer memory.
  • each part of this application can be implemented by hardware, software, firmware, or a combination thereof.
  • multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system.
  • Discrete logic gate circuits with logic functions for data signals Logic circuits, application specific integrated circuits with suitable combinational logic gates, programmable gate array (PGA), field programmable gate array (FPGA), etc.
  • a person of ordinary skill in the art can understand that all or part of the steps carried in the method of the foregoing embodiments can be implemented by a program instructing relevant hardware to complete.
  • the program can be stored in a computer-readable storage medium. When executed, it includes one of the steps of the method embodiment or a combination thereof.
  • each functional unit in each embodiment of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units may be integrated into one module.
  • the above-mentioned integrated modules can be implemented in the form of hardware or software function modules. If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer readable storage medium.
  • the aforementioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Power Sources (AREA)
  • Transceivers (AREA)
  • Headphones And Earphones (AREA)

Abstract

一种无线耳机包括：电源模块(10)，用于为无线耳机供电；处理器(20)，处理器(20)与电源模块(10)连接，处理器(20)用于根据关机指令在保存数据后关机，并在保存数据后被掉电。本申请还公开了一种无线耳机系统和无线耳机的关机方法。

Description

无线耳机、无线耳机系统和无线耳机的关机方法
优先权信息
本申请请求2020年03月24日向中国国家知识产权局提交的、申请号为202010215228.8的专利申请的优先权和权益，并且通过参照将其全文并入此处。
技术领域
本申请涉及耳机技术领域，尤其涉及一种无线耳机、一种无线耳机系统以及一种无线耳机的关机方法。
背景技术
TWS(True Wireless Stereo，真无线立体声)耳机，相比传统的有线耳机来说取消了线材，采用蓝牙连接，实现了蓝牙左右声道无线分离使用，使得TWS耳机的使用方式具有多样性，如即可独享，又可分享，还可一机当作两机。
目前TWS耳机出厂时，有的厂家是让其关机，耳机处于关机状态下其电流大约为10uA，对于30mAh的电池，在满电情况下四个多月就会将电消耗完。
发明内容
本申请提出一种无线耳机，通过延时来保证耳机系统关机彻底后再被掉电，显著地提高了系统的稳定性和可靠性。
本申请第一方面实施例提出了一种无线耳机，包括：电源模块，用于为所述无线耳机供电；处理器，所述处理器与所述电源模块连接，所述处理器用于根据关机指令在保存数据后关机，并在保存数据后被掉电。
根据本申请实施例的无线耳机，电源模块为无线耳机供电，处理器用于根据关机指令在保存数据后关机，并在保存数据后被掉电。该无线耳机通过延时来保证处理器关机彻底后再被掉电，显著地提高了系统的稳定性和可靠性。
本申请第二方面实施例提出了一种无线耳机系统，其包括充电盒和上述的无线耳机。
根据本申请实施例的无线耳机系统，通过延时来保证处理器保存数据后再被掉电，显著地提高了系统的稳定性和可靠性。
本申请第三方面实施例提出了一种无线耳机的关机方法，所述无线耳机包括：为所述 无线耳机供电的电源模块和与所述电源模块连接的处理器，所述关机方法包括：所述处理器根据关机指令在保存数据后关机；所述处理器在保存数据后被掉电。
根据本申请实施例的无线耳机的关机方法，通过延时来保证处理器保存数据后再被掉电，显著地提高了系统的稳定性和可靠性。
附图说明
图1是根据本申请实施例的无线耳机的方框示意图；
图2是根据本申请一个实施例的无线耳机系统的方框示意图；
图3是根据本申请一个实施例的无线耳机系统的控制模块的波形示意图；
图4是根据本申请另一个实施例的无线耳机系统的控制模块的波形示意图；
图5是根据本申请示例一的无线耳机系统的控制模块的波形示意图；
图6是根据本申请一个具体实施例的开关模块的结构示意图；
图7是根据本申请又一实施例的无线耳机系统的控制模块的波形示意图；以及
图8是根据本申请实施例的无线耳机的关机方法的流程图。
具体实施方式
下面详细描述本申请的实施例，所述实施例的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的，旨在用于解释本申请，而不能理解为对本申请的限制。
目前TWS耳机出厂时，有的厂家是让其关机，耳机处于关机状态下其电流大约为10uA，对于30mAh的电池，在满电情况下四个多月就会将电消耗完。
目前的方案一般会使用一颗带低功耗模式的充电芯片，让耳机的其它电源尽可能地接到其输出引脚，出厂时让其进入低功耗模式，这样可以延长电池可使用的时间。通常这种充电芯片的功耗约1uA，加上锂电池保护充电芯片等的功耗约为4uA，总共功耗约5uA，在满电情况下八个多月就会将电消耗完。
目前普遍的方法是，通过I2C(Inter－Integrated Circuit)总线直接给充电芯片发命令，让充电芯片进入低功耗模式，并对系统掉电。但是，这种方法的缺点是对系统直接掉电过程中可能会导致系统不稳定。
下面结合附图来描述本申请实施例的无线耳机和无线耳机系统。
图1是根据本申请实施例的无线耳机的方框示意图。如图1所示，本申请实施例的无线耳机，包括：电源模块10和处理器20。
其中，电源模块10用于为无线耳机供电，处理器20与电源模块10连接，处理器20用于根据关机指令在保存数据后关机，并在保存数据后被掉电。
也就是说，本申请是通过关机指令让处理器20在保存数据后，再让电源模块10进行掉电，从而保证系统可靠地进入低功耗模式或者运输节电模式shipmode模式，该关机指令可以来自充电盒，也可以是对所述无线耳机的关机操作产生的关机指令。
需要说明的是，本申请中可以通过延时掉电的方式，避免处理器20在关机过程中未保存数据就被掉电引发的不稳定，该延时可以在充电盒端实现，例如延时发送掉电指令，该掉电指令的延时可以是基于关机指令发送后一段时间，也可以是基于充电盒接收到用于表征耳机接收到关机指令的反馈信号后一段时间；该延时也可以在耳机端实现，在耳机端可以通过电源模块10本身来实现延时控制，也可通过其他模块来延时控制电源模块10和处理器20的连接。由于关机后再掉电在有的设计方案中可能触发处理器20重新开机，因此对掉电时机的选择还要结合关机时间、指令设置情况等多方面进行考虑。
下面先结合图2-7说明根据本申请实施例的一种掉电方式。
根据本申请的一个实施例，处理器无线耳机通过断开电源模块10和处理器20之间的连接的方式，控制处理器20在保存数据后掉电。
如图2所示，无线耳机，还包括：金属接口POGO PIN，可与充电盒连接；处理器20与金属接口POGO PIN连接，处理器20还用于：通过金属接口POGO PIN接收充电盒发送的关机指令。
如图2所示，无线耳机，还包括：开关模块30和控制模块40。其中，电源模块10通过开关模块30与处理器20连接；控制模块40用于根据第一掉电指令控制开关模块30断开电源模块10和处理器20之间的连接，以使处理器20在保存数据后掉电。
根据本申请的一个实施例，控制模块40与金属接口POGO PIN连接，控制模块40还用于：通过金属接口POGO PIN接收充电盒发送的第一掉电指令。
需要说明的是，金属接口POGO PIN为用于给无线耳机充电和通信用的，常见的金属接口POGO PIN有两个PIN或三个PIN，位置有的设置在耳机杆子的底部，有的设置在耳塞的下方。充电盒的作用是收纳无线耳机，同时充电盒里面有电池，这样具有给无线耳机充电的功能，里面会有两个充电铜柱。
在本申请的实施例中，充电盒发送第一掉电指令的时间不早于充电盒发送关机指令的时间；控制模块40具体用于：在接收到第一掉电指令后，延时第一时间后，控制开关模块30断开电源模块10和处理器20之间的连接。其中，为了保证耳机处理器20在关机完成后再掉电，第一时间可由处理器20的关机时间决定，当然处理器20也可以在数据保存后 关机前进行掉电，因此第一时间也可以与数据保存时间相关。
需要说明的是，处理器20可以是包括蓝牙芯片在内的蓝牙系统，也可以是wifi(Wireless Fidelity，无线保真)系统等无线模块，还可以是其他处理器，例如CPU(Central Processing Unit，中央处理器)等。
具体地，当无线耳机放入充电盒内需要让无线耳机进入关机时(如给无线耳机充满电让耳机进入关机时)，充电盒通过金属接口POGO PIN给无线耳机发送关机指令，该关机指令传递到处理器20，该处理器20解析出该条指令后(此时可以给充电盒反馈一个应答信号)，当该应答信号表征无线耳机接收到关机指令进入关机流程时，充电盒通过金属接口POGO PIN给无线耳机中的控制模块40发送第一掉电指令，以让其控制电源模块10与处理器20之间的开关模块30断开，控制模块40识别到第一掉电指令后延时第一时间，将开关模块30断开，这样避免了处理器20在关机时数据未保存就掉电所造成的异常。
举例说明，若控制模块40输出高电平信号控制开关模块30导通，则控制模块40输出低电平信号控制开关模块30断开。在图3中，可以看到，0-t1这段时间内，控制模块40输出高电平信号；在控制模块40接收到第一掉电指令t1时刻后开始计时，到t2时刻输出低电平信号，开关模块30断开。
整个的控制流程可包括以下步骤：
S1，充电盒给无线耳机发送关机指令。
S2，处理器接收到关机指令，处理器进行关机。
S3，充电盒在t1时刻通过金属接口POGO PIN发第一掉电指令给无线耳机。
S4，无线耳机中的控制模块如控制芯片IC接收到第一掉电指令，并解析。
S5，控制模块开始计时，延时第一时间如t2-t1后控制开关模块断开。
需要说明的是，在本申请的其他实施例中，控制模块40的编码方式还可以为发送脉冲个数，如当控制模块40接收到4个脉宽为20ms的高电平(如图4所示)时，控制开关模块30断开。
由此，本申请通过延时处理，即在保存数据后掉电，保证了处理器的稳定性和可靠性。这样，显著地减少了电流消耗，增加了电源模块的存储时间。按照此方法进入关机，只有几部分的消耗如电池自消耗和解析控制模块等，此种解析控制模块的功耗非常低，这样有助于保证系统的极低功耗；显著地提高了可靠性，本申请中避免了关机过程中电源模块掉电而造成处理器中数据的丢失等异常情况，使得系统稳定，另外关机后再进行掉电，进一步提高了系统的稳定性；显著地改善了采购的难度，该方案采用的控制芯片和开关模块(可以用MOS管)，物料较为常规物料，采购起来比较方便。
在上述实施例的基础上进行了以下示例一至示例三的扩展：
示例一：
在上述实施例的基础上，控制模块40在接收到第一掉电指令后，会延时第一时间后，其输出口输出的电平会发生变化，这样就会有一个问题，在延时的这段时间内，用户将无线耳机从充电盒拿出，此时再过一小段时间后，无线耳机会进入关机模式，无法使用。为了解决此问题，本申请还对控制模块40的功能进行了优化，控制模块40还用于：通过金属接口POGO PIN接收充电盒发送的开盖指令；若在接收到第一掉电指令后的第一时间内接收到开盖指令，则控制开关模块30在延时第一时间后不断开电源模块10和处理器20之间的连接。
具体参照图5说明，在t1延时至t2的过程中，一旦控制模块40检测到充电盒给控制模块40发送的开盖指令，其原本需要在t2时刻输出低电平信号取消，t2时刻后仍保持输出高电平信号，这样能够保证处理器不会掉电。
举例说明，用户将耳机放入充电盒，并合上充电盒的盖子，以便充电盒给无线耳机充电。充电盒在给无线耳机充满电后，通过金属接口POGO PIN向处理器20发送关机指令，以便处理器20进行关机，t1时刻通过金属接口POGO PIN向控制模块40发送第一掉电指令，控制模块40接收到掉电指令后延时掉电，预计t2时刻掉电。在t’时刻，控制模块40如果接收到通过金属接口POGO PIN由充电盒发送的开盖指令，则在t2时刻控制处理器20不掉电。这样避免了延时这段时间内将无线耳机拿出来后，耳机进入关机模式，无法使用。
示例二：
在本示例中，处理器20具体用于：根据关机指令在保存数据后延时第二时间关机；控制模块40具体用于：在接收到第一掉电指令后，控制开关模块30断开电源模块10和处理器20之间的连接，充电盒发送第一掉电指令的时间比充电盒发送关机指令的时间晚第三时间。其中，设置第二时间的目的在于避免数据保存后太快关机，导致掉电发生在关机之后从而引发处理器20重新启动，引起不稳定，为此，第三时间要控制在保存完数据之后关机之前，因此，第三时间根据处理器20的实际情况，控制掉电时间处于保持数据的最晚时间和关机的最早时间之间，即第三时间的两个临界值可以分别是最大写数据时间、最早关机时间(最小写数据时间+第二时间)。
具体而言，由于在关机过程中，还可以通过耳机的关机过程中延时来实现关机功能，具体操作为：无线耳机中的处理器20接收到关机指令后，开始走关机流程，保存好数据后，之后延时关机。对于处理器20来说，只要能够将数据保存好了后，再进行掉电，对无线耳机系统就不会产生影响。由于处理器20的关机时间是在一定范围内波动的，也就是写数据 的时间也是在波动的，如1-4s，可以采用写完数据后再延时第二时间如4s再彻底关机，也就是5-9s才关机，这样充电盒只需在第三时间如4-5s之间发送第一掉电指令给控制模块40即可，控制模块40在接收到第一掉电指令后立即掉电，这样也可以保证处理器关机掉电，避免关机后才掉电导致可能由于掉电信号引起重新开机又掉电的不稳定问题。
示例三：
在该示例中，控制模块40具体用于：在接收到第一掉电指令后，控制开关模块30断开电源模块10和处理器20之间的连接，第一掉电指令为充电盒在检测到处理器20关机后发送的。
需要说明的是，采用示例三所述的方案的前提是，必须要保证给控制模块40发送第一掉电指令时，不会引起处理器20的启动。因为有些电路中给控制模块40发送指令所使用的电压为5V，在给控制模块40发送指令时，如果此时处理器20处于关机状态下，会重新启动处理器20，这样会造成处理器20在启动时，无线耳机掉电，这样会导致无线耳机不稳定。该方案提出了一个新的解决方案，让处理器20的开机识别电压(处理器的开机指令对应的电压)与控制模块40的检测电压(第一掉电指令对应的电压)不一样，例如，第一掉电指令对应的电压小于处理器的开机指令对应的电压，或者，第一掉电指令对应的波形信号与处理器的开机指令对应的波形信号不同，这样就意味着可以在处理器20关机后，再进行掉电，从而保证了系统的稳定性。
在该示例中，处理器20还可包括检测模块，用于检测金属接口POGO PIN上所传输的电压，其中，金属接口POGO PIN上传输两种电压：处理器20的开机识别电压V1和控制模块40的检测电压V2，使V2＜V1，即可实现在处理器20真正的关机后，再发送第一掉电指令给控制模块40，这样可以实现处理器在关机后再进行掉电，保证了系统的稳定性。当然，采用不同电压也可以适用于保存数据后未关机前进行掉电的情况。
为实现上述原理，需要对控制模块40的输入进行电压配置，处理器20的检测模块也要进行电压配置，从而保证一致性。
下面结合图6来描述根据本申请一个具体实施例的开关模块30。
如图6所示，根据本申请实施例的开关模块30包括：N型金属氧化物半导体场效应晶体管Q和电阻R，其中，N型金属氧化物半导体场效应晶体管Q的控制极与控制模块40连接，N型金属氧化物半导体场效应晶体管Q的第一极与电源模块10连接，N型金属氧化物半导体场效应晶体管Q的第二极与处理器20连接，电阻R的第一端与电源模块10连接，电阻R的第二端与N型金属氧化物半导体场效应晶体管Q的控制极连接。
具体地，充电盒将关机指令通过金属接口POGO PIN发送至处理器20，以使处理器关 机，同时，充电盒将第一掉电指令通过金属接口POGO PIN发送至无线耳机的控制模块40，控制模块40根据该指令输出相应的电平信号，例如，当输出高电平信号时，N型金属氧化物半导体场效应晶体管Q闭合，电源模块10给处理器20供电；当输出低电平信号时，N型金属氧化物半导体场效应晶体管Q断开，电源模块10不给处理器20供电，无线耳机掉电完成。
下面再结合图7说明根据本申请实施例的另一种掉电方式。
根据本申请的另一实施例，无线耳机通过控制电源模块10掉电的方式，控制处理器20在保存数据后掉电。
在一个具体示例中，处理器20还用于：在保存数据后向电源模块10发送第二掉电指令；电源模块10还用于：在接收到第二掉电指令后掉电。
具体地，在该实施例中，无线耳机中所使用的电源模块10，具备掉电功能，当处理器关机保存数据后，通过I2C总线或者其它方式向电源模块10发送第二掉电指令，电源模块10在接收到第二掉电指令后掉电，这样可以保证系统的稳定性，从而使系统更可靠。
在另一个具体示例中，处理器20还用于：在接收到关机指令后向电源模块10发送第二掉电指令；电源模块10还用于：在接收到第二掉电指令后延时第四时间掉电。其中，第四时间一般设置为大于关机过程中最长的数据保存时间，以保障在数据保存后才掉电。
需要说明的是，在该实施例中，采用的电源模块10具备延时的掉电功能。具体地，在充电盒发送关机指令后，通过金属接口POGO PIN将关机指令发送处理器20，处理器20在接收到关机指令后向电源模块10发送第二掉电指令，此时电源模块10不会立即掉电，如在接收到第二掉电指令后延时第四时间掉电，这样可以保证系统的稳定性，从而使系统更可靠。
综上所述，根据本申请实施例的无线耳机，电源模块为所述无线耳机供电，处理器用于根据关机指令在保存数据后关机，并在保存数据后被掉电。该无线耳机通过延时来保证处理器关机彻底后再掉电，显著地提高了系统的稳定性和可靠性。
基于上述实施例，本申请还提出了一种无线耳机系统，其包括充电盒和上述的无线耳机。
根据本申请实施例的无线耳机系统，通过延时来保证处理器关机彻底后再掉电，显著地提高了系统的稳定性和可靠性。
基于上述实施例，本申请还提出了一种无线耳机的关机方法。
在本申请的实施例中，如图1所示，无线耳机包括：为无线耳机供电的电源模块10和与电源模块连接的处理器20。
如图8所示，本申请实施例的无线耳机的关机方法，包括以下步骤：
S11，处理器根据关机指令在保存数据后关机。
S12，处理器在保存数据后被掉电。
在本申请的实施例中，处理器在保存数据后被掉电，包括：无线耳机通过断开电源模块和处理器之间的连接方式，控制处理器在保存数据后掉电；或者，无线耳机通过控制电源模块掉电的方式，控制处理器在保存数据后掉电。
需要说明的是，本申请实施例无线耳机的关机方法中未披露的细节，请参照本申请实施例的无线耳机中所披露的细节，具体这里不再详述。
根据本申请实施例的无线耳机的关机方法，通过延时来保证处理器保存数据后再被掉电，显著地提高了系统的稳定性和可靠性。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
流程图中或在此以其他方式描述的任何过程或方法描述可以被理解为，表示包括一个或更多个用于实现定制逻辑功能或过程的步骤的可执行指令的代码的模块、片段或部分，并且本申请的优选实施方式的范围包括另外的实现，其中可以不按所示出或讨论的顺序，包括根据所涉及的功能按基本同时的方式或按相反的顺序，来执行功能，这应被本申请的实施例所属技术领域的技术人员所理解。
在流程图中表示或在此以其他方式描述的逻辑和/或步骤，例如，可以被认为是用于实现逻辑功能的可执行指令的定序列表，可以具体实现在任何计算机可读介质中，以供指令执行系统、装置或设备(如基于计算机的系统、包括处理器的系统或其他可以从指令执行系统、装置或设备取指令并执行指令的系统)使用，或结合这些指令执行系统、装置或设备而使用。就本说明书而言，"计算机可读介质"可以是任何可以包含、存储、通信、传播 或传输程序以供指令执行系统、装置或设备或结合这些指令执行系统、装置或设备而使用的装置。计算机可读介质的更具体的示例(非穷尽性列表)包括以下：具有一个或多个布线的电连接部(电子装置)，便携式计算机盘盒(磁装置)，随机存取存储器(RAM)，只读存储器(ROM)，可擦除可编辑只读存储器(EPROM或闪速存储器)，光纤装置，以及便携式光盘只读存储器(CDROM)。另外，计算机可读介质甚至可以是可在其上打印所述程序的纸或其他合适的介质，因为可以例如通过对纸或其他介质进行光学扫描，接着进行编辑、解译或必要时以其他合适方式进行处理来以电子方式获得所述程序，然后将其存储在计算机存储器中。
应当理解，本申请的各部分可以用硬件、软件、固件或它们的组合来实现。在上述实施方式中，多个步骤或方法可以用存储在存储器中且由合适的指令执行系统执行的软件或固件来实现。如，如果用硬件来实现和在另一实施方式中一样，可用本领域公知的下列技术中的任一项或他们的组合来实现：具有用于对数据信号实现逻辑功能的逻辑门电路的离散逻辑电路，具有合适的组合逻辑门电路的专用集成电路，可编程门阵列(PGA)，现场可编程门阵列(FPGA)等。
本技术领域的普通技术人员可以理解实现上述实施例方法携带的全部或部分步骤是可以通过程序来指令相关的硬件完成，所述的程序可以存储于一种计算机可读存储介质中，该程序在执行时，包括方法实施例的步骤之一或其组合。
此外，在本申请各个实施例中的各功能单元可以集成在一个处理模块中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。所述集成的模块如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。
上述提到的存储介质可以是只读存储器，磁盘或光盘等。尽管上面已经示出和描述了本申请的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本申请的限制，本领域的普通技术人员在本申请的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (20)

  1. 一种无线耳机，其特征在于，包括：
    电源模块，用于为所述无线耳机供电；
    处理器，所述处理器与所述电源模块连接，所述处理器用于根据关机指令在保存数据后关机，并在保存数据后被掉电。
  2. 根据权利要求1所述的无线耳机，其特征在于，所述无线耳机通过断开所述电源模块和所述处理器之间的连接的方式，控制所述处理器在保存数据后掉电；或者；
    所述无线耳机通过控制所述电源模块掉电的方式，控制所述处理器在保存数据后掉电。
  3. 根据权利要求2所述的无线耳机，其特征在于，还包括：
    金属接口，可与充电盒连接；
    所述处理器与所述金属接口连接，所述处理器还用于：通过所述金属接口接收所述充电盒发送的所述关机指令；或者，所述处理器还用于：接收对所述无线耳机的关机操作产生的关机指令。
  4. 根据权利要求3所述的无线耳机，其特征在于，还包括：
    开关模块，所述电源模块通过所述开关模块与所述处理器连接；
    控制模块，用于根据第一掉电指令控制所述开关模块断开所述电源模块和所述处理器之间的连接，以使所述处理器在保存数据后掉电。
  5. 根据权利要求4所述的无线耳机，其特征在于，所述控制模块与所述金属接口连接，所述控制模块还用于：
    通过所述金属接口接收所述充电盒发送的所述第一掉电指令。
  6. 根据权利要求5所述的无线耳机，其特征在于，所述充电盒发送所述第一掉电指令的时间不早于所述充电盒发送所述关机指令的时间；所述控制模块具体用于：
    在接收到所述第一掉电指令后，延时第一时间后，控制所述开关模块断开所述电源模块和所述处理器之间的连接。
  7. 根据权利要求6所述的无线耳机，其特征在于，所述控制模块的编码方式包括发送脉冲个数。
  8. 根据权利要求6所述的无线耳机，其特征在于，所述控制模块还用于：
    通过所述金属接口接收所述充电盒发送的开盖指令；
    若在接收到所述第一掉电指令后的所述第一时间内接收到所述开盖指令，则控制所述开关模块在延时所述第一时间后不断开所述电源模块和所述处理器之间的连接。
  9. 根据权利要求5所述的无线耳机，其特征在于，所述处理器具体用于：根据关机指令在保存数据后延时第二时间关机；
    所述控制模块具体用于：在接收到所述第一掉电指令后，控制所述开关模块断开所述电源模块和所述处理器之间的连接，所述充电盒发送所述第一掉电指令的时间比所述充电盒发送所述关机指令的时间晚第三时间。
  10. 根据权利要求5所述的无线耳机，其特征在于，所述控制模块具体用于：
    在接收到所述第一掉电指令后，控制所述开关模块断开所述电源模块和所述处理器之间的连接，所述第一掉电指令为所述充电盒在检测到所述处理器关机后发送的。
  11. 根据权利要求10所述的无线耳机，其特征在于，所述处理器包括检测模块，用于检测所述金属接口上所传输的电压。
  12. 根据权利要求10所述的无线耳机，其特征在于，所述第一掉电指令对应的电压小于所述处理器的开机指令对应的电压；或者，
    所述第一掉电指令对应的波形信号与所述处理器的开机指令对应的波形信号不同。
  13. 根据权利要求10所述的无线耳机，其特征在于，所述开关模块包括：N型金属氧化物半导体场效应晶体管和电阻，其中，所述N型金属氧化物半导体场效应晶体管的控制极与所述控制模块连接，所述N型金属氧化物半导体场效应晶体管的第一极与所述电源模块连接，所述N型金属氧化物半导体场效应晶体管的第二极与所述处理器连接，所述电阻的第一端与所述电源模块连接，所述电阻的第二端与所述N型金属氧化物半导体场效应晶体管的控制极连接。
  14. 根据权利要求2或3所述的无线耳机，其特征在于，所述处理器还用于：在保存数据后向所述电源模块发送第二掉电指令；
    所述电源模块还用于：在接收到所述第二掉电指令后掉电。
  15. 根据权利要求14所述的无线耳机，其特征在于，所述处理器通过I2C总线向所述电源模块发送所述第二掉电指令。
  16. 根据权利要求2或3所述的无线耳机，其特征在于，所述处理器还用于：在接收到所述关机指令后向所述电源模块发送第二掉电指令；
    所述电源模块还用于：在接收到所述第二掉电指令后延时第四时间掉电。
  17. 根据权利要求1所述的无线耳机，其特征在于，所述处理器包括蓝牙系统、wifi系统任意一种。
  18. 一种无线耳机系统，其特征在于，包括：充电盒和如权利要求1-17任一项所述的无线耳机。
  19. 一种无线耳机的关机方法，其特征在于，所述无线耳机包括：为所述无线耳机供电的电源模块和与所述电源模块连接的处理器，所述关机方法包括：
    所述处理器根据关机指令在保存数据后关机；
    所述处理器在保存数据后被掉电。
  20. 根据权利要求19所述的关机方法，其特征在于，所述处理器在保存数据后被掉电，包括：
    所述无线耳机通过断开所述电源模块和所述处理器之间的连接的方式，控制所述处理器在保存数据后掉电；或者；
    所述无线耳机通过控制所述电源模块掉电的方式，控制所述处理器在保存数据后掉电。
PCT/CN2021/082423 2020-03-24 2021-03-23 无线耳机、无线耳机系统和无线耳机的关机方法 WO2021190506A1 (zh)

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