WO2021190141A1 - 芯片的封装结构及其封装方法 - Google Patents

芯片的封装结构及其封装方法 Download PDF

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Publication number
WO2021190141A1
WO2021190141A1 PCT/CN2021/074610 CN2021074610W WO2021190141A1 WO 2021190141 A1 WO2021190141 A1 WO 2021190141A1 CN 2021074610 W CN2021074610 W CN 2021074610W WO 2021190141 A1 WO2021190141 A1 WO 2021190141A1
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chip
transparent cover
cavity
cover plate
substrate
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PCT/CN2021/074610
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English (en)
French (fr)
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吴明轩
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苏州晶方半导体科技股份有限公司
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Publication of WO2021190141A1 publication Critical patent/WO2021190141A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14618—Containers

Definitions

  • the image sensor chip is an electronic device that can sense external light and convert it into electrical signals.
  • Image sensor chips are usually manufactured using semiconductor manufacturing processes. After the image sensor chip is manufactured, a series of packaging processes are performed on the image sensor chip to form a packaged package structure for use in electronic devices such as digital cameras and digital video cameras.
  • FIG. 1 it is a schematic diagram of a package structure 200 of an image sensor chip in the prior art.
  • the package structure 200 includes a substrate 20, a chip 21, and a transparent cover 22.
  • the substrate 20 is formed with a cavity 201 penetrating the upper and lower surfaces of the substrate 20.
  • the functional surface 211 on the chip 21 for receiving external light covers the cavity 201. The light can reach the functional surface 211 of the chip 21 through the transparent cover 22 and the cavity 201.
  • the purpose of the present invention is to provide a packaging structure and a packaging method that can improve the rigidity and reliability of the packaging structure.
  • an embodiment of the present invention provides a chip packaging structure, including:
  • a substrate the substrate includes a first surface and a second surface that are opposed to each other, and the substrate has a cavity penetrating the first surface and the second surface;
  • a chip fixed on the second surface including a functional surface and a back surface that are disposed oppositely, the functional surface faces the second surface, and the functional surface covers the cavity;
  • a transparent cover plate the transparent cover plate includes a light-transmitting portion corresponding to the cavity, and an optical glue is filled between the light-transmitting portion and the functional surface.
  • the functional surface is provided with a sensing area and a connecting area, the connecting area is connected to the second surface, the sensing area corresponds to the cavity, and the optical glue covers all The induction area.
  • the transparent cover plate extends into the cavity.
  • the transparent cover includes a top surface away from the optical glue, and the top surface protrudes from the first surface.
  • the injection molding material extends to the first surface, and the end surface of the injection molding material away from the first surface and the top surface are flush with each other.
  • the transparent cover plate further includes an extension part arranged around the light-transmitting part, and the extension part is connected to the first surface.
  • the second surface is provided with an electrical connection area
  • the packaging structure further includes a bump
  • the bump includes a first end and a second end that are opposed to each other. The end is electrically connected to the electrical connection area, and the second end is farther away from the second surface than the back surface.
  • the electrical connection area includes a rewiring layer.
  • the packaging structure further includes a packaging glue connecting the side edge of the chip and the second surface.
  • the chip is an image sensor chip.
  • the substrate is any one of a PCB board, an organic substrate, and a glass substrate.
  • an embodiment of the present invention provides a chip packaging method, which includes the steps:
  • a plurality of substrates distributed in an array are defined on the base, and there are cutting channels between adjacent substrates;
  • the substrate is divided based on the dicing channel to form a plurality of single-chip package structures.
  • the step of "fixing the functional surface of the chip and the second surface so that the functional surface covers the cavity” specifically includes:
  • the step of "fixing the transparent cover plate to the side of the optical glue away from the functional surface” specifically includes:
  • the transparent cover plate is extended into the cavity so that the transparent cover plate is connected to the optical glue, and the transparent cover plate protrudes from the first surface away from the top surface of the optical glue.
  • the method further includes:
  • the step of "fixing the transparent cover plate to the side of the optical glue away from the functional surface” specifically includes:
  • the transparent cover plate is fixed on the first surface, and the transparent cover plate and the optical glue are fixed to each other.
  • the method further includes the following steps:
  • a rewiring layer is formed on the second surface.
  • the method before the step of "dividing the substrate based on the cutting channel to form a plurality of single-chip package structures", the method further includes the following steps:
  • a bump is formed on the redistribution layer, and an end of the bump away from the redistribution layer protrudes from the backside of the chip away from the functional surface.
  • the beneficial effect of the present invention is that the cavity according to an embodiment of the present invention is filled with optical glue and/or light-transmitting part, which can be compared with the cavity structure without any substance in the prior art.
  • the rigidity of the cavity area thereby improving the reliability of the entire packaging structure, and avoiding problems such as cavity explosion and delamination during the reliability test or the subsequent use of the packaging structure;
  • the transparent cover and the chip A cavity-free structure is formed between, which greatly enhances the bonding strength between the transparent cover and the chip, and avoids the displacement of the transparent cover or the chip.
  • Fig. 1 is a schematic diagram of a package structure in the prior art
  • FIG. 2 is a schematic diagram of the package structure of the first example of the present invention.
  • FIG. 3 is a schematic diagram of the package structure of the second example of the present invention.
  • FIG. 4 is a schematic diagram of the package structure of the third example of the present invention.
  • FIG. 5 is a step diagram of a packaging method according to an embodiment of the present invention.
  • 6 to 12 are schematic diagrams of various steps of the packaging method according to an embodiment of the present invention.
  • FIG. 2 it is a schematic diagram of a chip packaging structure 100 according to an embodiment of the present invention.
  • the packaging structure 100 includes a substrate 10, a chip 11 and a transparent cover 12.
  • the substrate 10 includes a first surface 101 and a second surface 102 opposite to each other, and the substrate 10 has a cavity S penetrating the first surface 101 and the second surface 102.
  • the substrate 10 is any one of a PCB board, an organic substrate, and a glass substrate.
  • the chip 11 is fixed on the second surface 102.
  • the chip 11 includes a functional surface 111 and a back surface 112 oppositely disposed.
  • the functional surface 111 faces the second surface 102, and the functional surface 111 covers the cavity S.
  • the chip 11 is an image sensor chip as an example, but it is not limited to this.
  • the chip 11 and the second surface 102 may be directly connected or indirectly connected.
  • the connection or fixation of a component to another component in this embodiment refers to a direct connection or an indirect connection between the two components.
  • the cavity S includes a first opening S1 located on the first surface 101 and a second opening S2 located on the second surface 102.
  • the functional surface 111 covers the cavity S means that the second opening S2 is in the first direction X.
  • the vertical projection of is completely located on the functional surface 111, the first direction X is defined as the direction from the first surface 101 of the substrate 10 to the second surface 102 (ie the vertical direction).
  • the size of the first opening S1 in this embodiment is equal to the second
  • the size of the opening S2 is not limited to this.
  • the transparent cover 12 includes a light-transmitting portion 121 corresponding to the cavity S, and an optical glue 13 is filled between the light-transmitting portion 121 and the functional surface 111.
  • the "transmitting portion 121" is defined as the area in the transparent cover 12 corresponding to the position of the cavity S, and the “filling the optical glue 13 between the translucent portion 121 and the functional surface 111" refers to the difference between the translucent portion 121 and the functional surface 111 The optical glue 13 is connected between them.
  • the optical glue 13 and/or the light-transmitting portion 121 are located in the cavity S, that is, the cavity S is filled with the optical glue 12, or the cavity S is filled with the light-transmitting portion 121, Or, the cavity S is simultaneously filled with the optical glue 12 and the light-transmitting portion 121, where "in the cavity S" refers to the range formed by the first opening S1 and the second opening S2.
  • the cavity S can also be filled with other substances.
  • the optical glue 13 can be an optical material with high light transmittance and low refractive index. In this way, the influence of the optical glue 13 on light transmission can be minimized, so that the light passing through the transparent cover 12 can reach the functional surface 111 of the chip 11 more effectively, thereby ensuring the sensing effect of the chip 11.
  • the cavity S of this embodiment is filled with the optical glue 13 and/or the light-transmitting portion 121.
  • the rigidity of the cavity S area can be greatly improved, thereby improving the entire package.
  • the reliability of the structure 100 avoids problems such as cavity explosion and delamination in the process of reliability testing or subsequent use of the package structure 100 (for example, high-temperature use environment).
  • a cavity-free structure is formed between the transparent cover 12 and the chip 11, which greatly enhances the bonding strength between the transparent cover 12 and the chip 11, and avoids the displacement of the transparent cover 12 or the chip 11, etc.
  • the functional surface 111 is provided with a sensing area 111a and a connecting area 111b, the connecting area 111b is connected to the second surface 102, the sensing area 111a corresponds to the cavity S, and the optical glue 13 covers the sensing area 111a. In this way, a chip can be realized 11 and the substrate 10 are fixed.
  • connection area 111b of the chip 11 includes a connection terminal 1111b, which is electrically connected to the redistribution layer 1021.
  • the package structure 100 further includes a bump 14, which includes a first end 141 and a second end 142 that are arranged oppositely. One end 141 is electrically connected to the electrical connection area 1021, where the first end 141 is electrically connected to the redistribution layer 1021, and the bump 14 is a solder ball.
  • the electrical connection between the package structure 100 and the external circuit board is realized by welding and fixing the bump 14 and the external circuit board.
  • the connection terminals 1111b are electrically connected to the redistribution layer 1021, and the bump 14 and the connection terminals 1111b are connected to each other. At this time, the signal obtained by the chip 11 can be transmitted to the external circuit board.
  • the cavity S of this embodiment has strong rigidity, which can effectively prevent the redistribution layer 1021 from being separated from the substrate 10 under stress.
  • the second end 142 of the implanted ball 14 is farther from the second surface 102 than the back surface 112 of the chip 11, that is, in the first direction X, the height of the implanted ball 14 is greater than the thickness of the chip 11. In this way, it is convenient to realize the electrical connection between the package structure 100 and the external circuit board through the bumping 14 and avoid the chip 11 from being damaged during the soldering process.
  • the chip 11 of this embodiment is located in the lower area of the substrate 10, and the substrate 10 has a cavity S, which can make the entire package structure 100 more compact, the overall size of the package structure 100 is smaller, and the functional surface 111 above the chip 11 is optical
  • the glue 13 has no structure at the back 112 below the chip 11, which can greatly reduce the risk of warping of the chip 11.
  • the transparent cover plate 12 of this embodiment has various forms, and three specific examples are used as examples for description.
  • the transparent cover 12 extends into the cavity S, that is, at least part of the transparent cover 12 is located in the cavity S.
  • the rigidity of the transparent cover plate 12 is relatively strong, which can greatly increase the rigidity of the filling in the cavity S, thereby further increasing the rigidity of the cavity S area.
  • the glue 13 can be used to bond the sensing area 111a and the transparent cover 12.
  • the gap P there is a gap P between the side edge 122 of the transparent cover 12 and the inner wall S3 of the cavity S, and the gap P is filled with injection molding compound 16, that is, the cavity S is also filled with injection molding at this time.
  • the plastic 16 can further improve the rigidity of the cavity S, and by filling the gap P with the plastic 16, the stability of the transparent cover 12 can be improved, and the displacement of the transparent cover 12 can be avoided.
  • the transparent cover 12 includes a top surface 123 away from the optical glue 13, the top surface 123 protrudes from the first surface 101, the injection molding compound 16 extends to the first surface 101, and the injection molding compound 16 away from the end surface 161 of the first surface 101 and The top surfaces 123 are flush with each other.
  • the vertical projection of the transparent cover plate 12 in the first direction X of this example is completely within the vertical projection range of the cavity S in the first direction X, and the lower half of the transparent cover plate 12 is located in the cavity S.
  • Half part protrudes from the first surface 101 and is located outside the cavity S, and in the first direction X, there is no overlapping area between the transparent cover 12 and the first surface 101, and the entire area of the transparent cover 12 is a light-transmitting part 121.
  • the injection molding compound 16 in this example extends from the cavity S to the first surface 101, which can stabilize the transparent cover 12 and protect the substrate 10, and the injection molding compound 16 has strong rigidity, which can improve the reliability of the entire packaging structure 100 .
  • FIG. 3 it is a schematic diagram of the packaging structure 100' of the second example.
  • similar or identical structures in the second example and the first example have similar or identical numbers.
  • the transparent cover plate 12' in the second example further includes an extension portion 124' arranged around the light-transmitting portion 121', and the extension portion 124' is connected to the first surface 101'.
  • the optical glue 13' can also extend to the first surface 101' so that the extension portion 124' and the first surface 101' are combined by the optical glue 13'.
  • the extension portion 124' and the first surface 101' are combined with each other. It can also be connected by other substances.
  • FIG. 4 it is a schematic diagram of the package structure 100" of the third example.
  • the transparent cover plate 12" in the third example also includes an extension part 124" arranged around the light-transmitting part 121", the extension part 124" is connected to the first surface 101", and the light-transmitting part 121" extends to the inside of the cavity S" and is combined with the optical glue 13" in the cavity S".
  • the cavity S" is filled with the optical glue 13" and a part of the light-transmitting portion 121" to increase the rigidity.
  • An embodiment of the present invention also provides a chip packaging method. Taking the above-mentioned first example as an example, with reference to FIGS. 5 to 12, the packaging method includes the steps:
  • the substrate may be a wafer substrate, and a plurality of substrates 10 distributed in an array may be pre-divided on the substrate, and the substrate 10 may be any one of a PCB board, an organic substrate, and a glass substrate.
  • step S3 a step is further included: forming a rewiring layer 1021 on the second surface 102.
  • the rewiring layer 1021 may be formed on the substrate through electroplating, photolithography, etc., and a cavity S may be reserved in the rewiring layer 1021, and then a cavity S may be formed at the reserved cavity S position.
  • step S5 specifically includes:
  • An encapsulant 15 connecting the side edge of the chip 11 and the second surface 102 is formed.
  • the optical glue 13 may be coated on the sensing area 111a through a glue dispensing process, so that the optical glue 13 covers the sensing area 111a, and the optical glue 13 may be an optical material with high light transmittance and low refractive index.
  • step S9 specifically includes:
  • the upper surface 301 of the upper mold 30 abuts the top surface 123, and the lower surface 311 of the lower mold 31 abuts the back surface 112 of the chip 11 away from the functional surface 111;
  • the upper mold 30 and the lower mold 31 are clamped, and the gap P between the side edge 122 of the transparent cover 12 and the inner wall S3 of the cavity S and the gap P1 between the upper working surface 301 and the first surface 101 are filled with injection Plastic 16.
  • the rigidity of the transparent cover plate 12 is relatively strong, which can greatly increase the rigidity of the filling in the cavity S, thereby further increasing the rigidity of the cavity S area.
  • the glue 13 can be used to bond the sensing area 111a and the transparent cover 12.
  • the cavity S of this embodiment is also filled with injection molding material 16, which can further improve the rigidity of the cavity S area, and filling the gap P by injection molding material 16 can improve the stability of the transparent cover plate 12 and avoid the transparent cover plate 12.
  • injection molding material 16 on the first surface 101 can stabilize the transparent cover 12 and protect the substrate 10, and the injection molding compound 16 has strong rigidity, which can improve the reliability of the entire packaging structure 100.
  • step S9 specifically includes:
  • the transparent cover 12' is fixed to the first surface 101', and the transparent cover 12' and the optical glue 13' are fixed to each other.
  • S11 Divide the substrate based on the dicing trench to form a plurality of single-chip package structures 100.
  • step S11 it also includes the following steps:
  • a bump 14 is formed on the redistribution layer 1021, and an end of the bump 14 away from the redistribution layer 1021 protrudes from the back surface 112 of the chip 11 away from the functional surface 111.
  • the transparent cover plate 12 and the functional surface 111 of this embodiment are connected by the optical glue 13, and the functional surface 111 is set corresponding to the cavity S.
  • the cavity S is filled with the optical glue 13 and/or transparent.
  • the cover plate 12 can greatly improve the rigidity of the cavity S area compared with the cavity structure without any substance in the prior art, thereby improving the reliability of the entire packaging structure 100, and avoiding the reliability test process or subsequent During the use process of the package structure 100 (for example, a high-temperature use environment), problems such as cavity explosion and delamination occur.
  • a cavity-free structure is formed between the transparent cover 12 and the chip 11, which greatly enhances the bonding strength between the transparent cover 12 and the chip 11, and avoids the displacement of the transparent cover 12 or the chip 11, etc.

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Abstract

本发明揭示了一种封装结构及其封装方法，封装结构包括基板、芯片及透明盖板，基板包括相对设置的第一表面及第二表面，且基板具有贯穿第一表面及第二表面的空腔；芯片固定于第二表面，芯片包括相对设置的功能面及背面，功能面面对第二表面，且功能面覆盖空腔; 透明盖板包括对应空腔的透光部，透光部与功能面之间填充光学胶。本发明的空腔内填充有光学胶和/或透光部，相较于现有技术中无任何物质的空腔结构，可大大提高空腔区域的刚性，从而提高整个封装结构的可靠性，避免在信赖性测过程中或者是在后续封装结构的使用过程中出现爆腔、分层等问题，且可避免透明盖板或芯片的移位等。

Description

芯片的封装结构及其封装方法
本申请要求了申请日为2020年03月26日，申请号为202010222657.8，发明名称为“芯片的封装结构及其封装方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及芯片封装技术领域，尤其涉及一种芯片的封装结构及其封装方法。
背景技术
影像传感芯片是一种能够感受外部光线并将其转换为电信号的电子器件。影像传感芯片通常采用半导体制造工艺进行芯片制作。在影像传感芯片制作完成后，再通过对影像传感芯片进行一系列封装工艺从而形成封装好的封装结构，以用于诸如数码相机、数码摄像机等的电子设备中。
参图1，为现有技术中影像传感芯片的封装结构200示意图。
封装结构200包括基板20、芯片21及透明盖板22，基板20上形成有贯穿基板20上下表面的空腔201，芯片21上用于接收外部光线的功能面211覆盖空腔201，如此，外部光线可经由透明盖板22及空腔201而到达芯片21的功能面211处。
实际运用中，由于空腔201的存在，会导致整个封装结构200的刚性不够，结构不可靠，例如，在信赖性测试(例如高温测试)过程中会出现爆腔、分层等问题。
发明内容
本发明的目的在于提供一种可提高封装结构刚性及可靠性的封装结构及其封装方法。
为实现上述发明目的之一，本发明一实施方式提供一种芯片的封装结构，包括：
基板，所述基板包括相对设置的第一表面及第二表面，且所述基板具有贯穿所述第一表面及所述第二表面的空腔；
固定于所述第二表面的芯片，所述芯片包括相对设置的功能面及背面，所述功能面面对所述第二表面，且所述功能面覆盖所述空腔；
透明盖板，所述透明盖板包括对应所述空腔的透光部，所述透光部与所述功能面之间填充光学胶。
作为本发明一实施方式的进一步改进，所述功能面设有感应区及连接区，所述连接区连接所述第二表面，所述感应区对应所述空腔，且所述光学胶覆盖所述感应区。
作为本发明一实施方式的进一步改进，所述透明盖板延伸至所述空腔内。
作为本发明一实施方式的进一步改进，所述透明盖板的侧缘与所述空腔的内壁之间具有空隙，所述空隙内填充有注塑料。
作为本发明一实施方式的进一步改进，所述透明盖板包括远离所述光学胶的顶面，所述顶面凸伸出所述第一表面。
作为本发明一实施方式的进一步改进，所述注塑料延伸至所述第一表面，且所述注塑料远离所述第一表面的端面与所述顶面相互齐平。
作为本发明一实施方式的进一步改进，所述透明盖板还包括环绕所述透光部设置的延伸部，所述延伸部连接所述第一表面。
作为本发明一实施方式的进一步改进，所述第二表面设有电连区，所述封装结构还包括植球，所述植球包括相对设置的第一端及第二端，所述第一端电性连接所述电连区，所述第二端相较于所述背面远离所述第二表面。
作为本发明一实施方式的进一步改进，所述电连区包括重布线层。
作为本发明一实施方式的进一步改进，所述封装结构还包括连接所述芯片的侧缘及所述第二表面的封装胶。
作为本发明一实施方式的进一步改进，所述芯片为影像传感芯片。
作为本发明一实施方式的进一步改进，所述基板为PCB板、有机基板以及玻璃基板中的任一种。
为实现上述发明目的之一，本发明一实施方式提供一种芯片的封装方法，包括步骤：
于基底上定义呈阵列分布的多个基板，相邻基板之间具有切割沟道；
形成贯穿所述基板上相对设置的第一表面及第二表面的多个空腔；
固定芯片的功能面及所述第二表面，且使得所述功能面覆盖所述空腔；
于所述功能面处涂布光学胶；
将透明盖板固定于所述光学胶远离所述功能面的一侧；
基于所述切割沟道分割所述基底，形成多个单粒封装结构。
作为本发明一实施方式的进一步改进，步骤“固定芯片的功能面及所述第二表面，且使得所述功能面覆盖所述空腔”具体包括：
连接芯片的功能面处的连接区及所述第二表面，并使得功能面处的感应区对应所述空腔；
形成连接所述芯片的侧缘及所述第二表面的封装胶。
作为本发明一实施方式的进一步改进，步骤“将透明盖板固定于所述光学胶远离所述功能面的一侧”具体包括：
将透明盖板伸入所述空腔内而使得所述透明盖板连接所述光学胶，且所述透明盖板远离所述光学胶的顶面凸伸出所述第一表面。
作为本发明一实施方式的进一步改进，步骤“将透明盖板固定于所述光学胶远离所述功能面的一侧”之后还包括：
将上模具的上作用面抵接所述顶面，并将下模具的下作用面抵接所述芯片上远离所述功能面的背面；
将所述上模具及所述下模具合模，并于所述透明盖板的侧缘及所述空腔的内壁之间的空隙内以及所述上作用面及所述第一表面的间隙内填充注塑料。
作为本发明一实施方式的进一步改进，步骤“将透明盖板固定于所述光学胶远离所述功能面的一侧”具体包括：
将光学胶填充满所述空腔；
将透明盖板固定于所述第一表面，且所述透明盖板与所述光学胶相互固定。
作为本发明一实施方式的进一步改进，步骤“形成贯穿所述基板上相对设置的第一表面及第二表面的多个空腔”之前还包括步骤：
于所述第二表面处形成重布线层。
作为本发明一实施方式的进一步改进，步骤“基于所述切割沟道分割所述基底，形成多个单粒封装结构”之前还包括步骤：
于所述重布线层上形成植球，且所述植球远离所述重布线层的一端凸伸出所述芯片上远离所述功能面的背面。
与现有技术相比，本发明的有益效果在于：本发明一实施方式的空腔内填充有光学胶和/或透光部，相较于现有技术中无任何物质的空腔结构，可大大提高空腔区域的刚性，从而提高整个封装结构的可靠性，避免在信赖性测过程中或者是在后续封装结构的使用过程中出现爆腔、分层等问题；另外，透明盖板与芯片之间形成了无空腔的结构，大大增强了透明盖板与芯片之间的粘结强度，避免透明盖板或芯片的移位等。
附图说明
图1是现有技术中封装结构的示意图；
图2是本发明第一示例的封装结构示意图；
图3是本发明第二示例的封装结构示意图；
图4是本发明第三示例的封装结构示意图；
图5是本发明一实施方式的封装方法步骤图；
图6至图12是本发明一实施方式的封装方法各个步骤示意图。
具体实施方式
以下将结合附图所示的具体实施方式对本发明进行详细描述。但这些实施方式并不限制本发明，本领域的普通技术人员根据这些实施方式所做出的结构、方法、或功能上的变换均包含在本发明的保护范围内。
在本发明的各个图示中，为了便于图示，结构或部分的某些尺寸会相对于其它结构或部分夸大，因此，仅用于图示本发明的主题的基本结构。
结合图2，为本发明一实施方式的芯片的封装结构100示意图。
封装结构100包括基板10、芯片11及透明盖板12。
基板10包括相对设置的第一表面101及第二表面102，且基板10具有贯穿第一表面101及第二表面102的空腔S。
这里，基板10为PCB板、有机基板以及玻璃基板中的任一种。
芯片11固定于第二表面102，芯片11包括相对设置的功能面111及背面112，功能面111面对第二表面102，且功能面111覆盖空腔S。
这里，芯片11以影像传感芯片为例，但不以此为限。
需要说明的是，“芯片11固定于第二表面102”是指芯片11位于基板10的第二表面102的一侧，芯片11与第二表面102之间可以是直接连接或者是间接连接，换句话说，本实施方式所述的一个部件连接或固定于另一个部件，是指两个部件之间直接连接或者是间接连接。
另外，空腔S包括位于第一表面101的第一开口S1以及位于第二表面102的第二开口S2，“功能面111覆盖空腔S”是指于第一方向X上，第二开口S2的垂直投影完全位于功能面111上，第一方向X定义为基板10的第一表面101朝向第二表面102的方向(即竖直方向)，本实施方式的第一开口S1的尺寸等于第二开口S2的尺寸，但不以此为限。
透明盖板12包括对应空腔S的透光部121，透光部121与功能面111之间填充光学胶13。
这里，“透光部121”定义为透明盖板12中对应空腔S位置的区域，“透光部121与功能面111之间填充光学胶13”是指透光部121与功能面111之间通过光学胶13连接，此时，光学胶13和/或透光部121位于空腔S内，即空腔S内填充有光学胶12，或者是空腔S内填充有透光部121，或者是空腔S内同时填充有光学胶12与透光部121，其中，“空腔S内”指第一开口S1及第二开口S2围设形成的范围内。
可以理解的是，空腔S内除了填充有光学胶13和/或透光部121之外，也可填充有其他物质，光学胶13可为具有高透光率及低折射率的光学材料，如此，可尽量降低光学胶13对光线传输的影响，使得经过透明盖板12的光线更加有效地到达芯片11的功能面111处，从而保证芯片11 的传感效果。
本实施方式的空腔S内填充有光学胶13和/或透光部121，相较于现有技术中无任何物质的空腔结构，可大大提高空腔S区域的刚性，从而提高整个封装结构100的可靠性，避免在信赖性测过程中或者是在后续封装结构100的使用过程(例如高温使用环境)中出现爆腔、分层等问题。
另外，透明盖板12与芯片11之间形成了无空腔的结构，大大增强了透明盖板12与芯片11之间的粘结强度，避免透明盖板12或芯片11的移位等。
在本实施方式中，功能面111设有感应区111a及连接区111b，连接区111b连接第二表面102，感应区111a对应空腔S，且光学胶13覆盖感应区111a，如此，可实现芯片11与基板10的固定。
具体的，第二表面102设有电连区1021，电连区1021环绕空腔S的第二开口S2设置，电连区1021包括重布线层1021，也就是说，本实施方式的封装结构100为扇出型(fan-out)封装结构，但不以此为限。
芯片11的连接区111b包括连接端子1111b，连接端子1111b与重布线层1021电性连接，封装结构100还包括植球14，植球14包括相对设置的第一端141及第二端142，第一端141电性连接电连区1021，这里，第一端141电性连接重布线层1021，植球14为锡球。
当封装结构100与外部电路板(例如PCB板)相互组装时，通过植球14与外部电路板的焊接固定而实现封装结构100与外部电路板的电性连接，由于植球14及芯片11的连接端子1111b均与重布线层1021电性连接，植球14与连接端子1111b之间是相互导通的，此时，芯片11获取到的信号可传输至外部电路板。
另外，本实施方式的空腔S刚性较强，可有效避免重布线层1021在应力作用下与基板10相互分离。
在本实施方式中，植球14的第二端142相较于芯片11的背面112远离第二表面102，也就是说，于第一方向X上，植球14的高度大于芯片11的厚度，如此，可便于通过植球14实现封装结构100与外部电路板的电性连接，避免在焊接过程中芯片11受损。
另外，封装结构100还包括连接芯片11的侧缘及第二表面102的封装胶15，如此，可提高芯片11与基板10配合的稳定性。
本实施方式的芯片11位于基板10的下方区域，且基板10具有空腔S，可使得整个封装结构100更加紧凑，封装结构100的整体尺寸较小，且芯片11上方的功能面111处为光学胶13，芯片11下方的背面112处无结构，可大大降低芯片11的翘曲风险。
本实施方式的透明盖板12具有多种形式，下面以三种具体示例为例作说明。
在第一示例中，继续结合图2，透明盖板12延伸至空腔S内，即至少部分透明盖板12位于空腔S内。
这里，透明盖板12的刚性较强，可大大提高空腔S内填充物的刚性，从而进一步提高空腔S区域的刚性，此时，仅需在感应区111a涂布一层较薄的光学胶13来粘结感应区111a及透明盖板12即可。
在本示例中，透明盖板12的侧缘122与空腔S的内壁S3之间具有空隙P，空隙P内填充有注塑料16，也就是说，此时的空腔S内还填充有注塑料16，可进一步提高空腔S区域的刚性，且通过注塑料16填充满空隙P，可提高透明盖板12的稳定性，避免透明盖板12发生移位。
另外，透明盖板12包括远离光学胶13的顶面123，顶面123凸伸出第一表面101，注塑料16延伸至第一表面101，且注塑料16远离第一表面101的端面161与顶面123相互齐平。
也就是说，本示例的透明盖板12于第一方向X的垂直投影完全位于空腔S于第一方向X的垂直投影范围内，透明盖板12的下半部分位于空腔S内，上半部分凸伸出第一表面101而位于空腔S外，且于第一方向X上，透明盖板12与第一表面101之间无重叠区域，透明盖板12的整个区域为透光部121。
本示例的注塑料16由空腔S延伸至第一表面101，可起到稳定透明盖板12及保护基板10的作用，且注塑料16的刚性较强，可提高整个封装结构100的可靠性。
结合图3，为第二示例的封装结构100’的示意图，为了便于说明，第二示例与第一示例相似或相同的结构采用相似或相同的编号。
第二示例与第一示例的区别在于：第二示例中的透明盖板12’还包括环绕透光部121’设置的延伸部124’，延伸部124’连接第一表面101’。
也就是说，本示例的透明盖板12’设置于基板10’的上方，透光部121’位于空腔S’的上方，延伸部124’位于第一表面101’的上方，光学胶13’填充满空腔S’，透光部121’与光学胶13’相互结合，空腔S’通过内部填充的光学胶13’提高刚性。
这里，光学胶13’还可延伸至第一表面101’而使得延伸部124’与第一表面101’之间通过光学胶13’结合，当然，延伸部124’与第一表面101’之间也可通过其他物质连接。
第二示例的其他说明可以参考第一示例的说明，在此不再赘述。
结合图4，为第三示例的封装结构100”的示意图。
第三示例与第二示例的区别在于：第三示例中的透明盖板12”还包括环绕透光部121”设置的延伸部124”，延伸部124”连接第一表面101”，透光部121”延伸至空腔S”的内部而与位于空腔S”内的光学胶13”相互结合，空腔S”通过内部填充的光学胶13”以及部分透光部 121”提高刚性。
第三示例的其他说明可以参考第一示例及第二示例，在此不再赘述。
本发明一实施方式还提供一种芯片的封装方法，以上述第一示例为例，结合图5至图12，封装方法包括步骤：
S1：结合图6，于基底上定义呈阵列分布的多个基板10，相邻基板10之间具有切割沟道；
这里，基底可为晶圆基底，可于基底上预先划分出呈阵列分布的多个基板10，基板10为PCB板、有机基板以及玻璃基板中的任一种。
S3：结合图7，形成贯穿基板10上相对设置的第一表面101及第二表面102的多个空腔S；
这里，步骤S3之前还包括步骤：于第二表面102处形成重布线层1021。
具体的，可在基底上通过电镀、光刻工艺等形成重布线层1021，并在重布线层1021中预留空腔S的位置，而后在预留空腔S的位置处形成空腔S。
S5：结合图8，固定芯片11的功能面111及第二表面102，且使得功能面111覆盖空腔S；
这里，步骤S5具体包括：
连接芯片11的功能面111处的连接区111b及第二表面102，并使得功能面111处的感应区111a对应空腔S；
形成连接芯片11的侧缘及第二表面102的封装胶15。
这里，芯片11以影像传感芯片为例，但不以此为限，可通过倒装方式实现芯片11与基板10的连接，连接区111b包括连接端子1111b，连接端子1111b与第二表面102的重布线层1021电性连接，另外，设置封装胶15可提高芯片11与基板10配合的稳定性。
S7：结合图9，于功能面111处涂布光学胶13；
这里，可通过点胶工艺将光学胶13涂布在感应区111a，且使得光学胶13覆盖感应区111a，光学胶13可为具有高透光率及低折射率的光学材料。
S9：结合图9及图10，将透明盖板12固定于光学胶13远离功能面111的一侧；
这里，步骤S9具体包括：
将透明盖板12伸入空腔S内而使得透明盖板12连接光学胶13，且透明盖板12远离光学胶13的顶面123凸伸出第一表面101；
结合图10，将上模具30的上作用面301抵接顶面123，并将下模具31的下作用面311抵接芯片11上远离功能面111的背面112；
将上模具30及下模具31合模，并于透明盖板12的侧缘122及空腔S的内壁S3之间的空隙P内以及上作用面301及第一表面101的间隙P1内填充注塑料16。
这里，透明盖板12的刚性较强，可大大提高空腔S内填充物的刚性，从而进一步提高空腔S区域的刚性，此时，仅需在感应区111a涂布一层较薄的光学胶13来粘结感应区111a及透明盖板12即可。
另外，上模具30的上作用面301为平面，下模具31的下作用面311为平面，上作用面301与下作用面311相对设置，由于顶面123凸伸出第一表面101，上作用面301抵接顶面123，且上作用面301与第一表面101之间具有间隙P1，同时，下作用面311抵接芯片11的背面112，透明盖板12的侧缘122及空腔S的内壁S3之间具有空隙P，空隙P连通间隙P1，当注入注塑料16时，注塑料16同时填充空隙P及间隙P1。
可以理解的，由于上作用面301抵接顶面123，在塑封料16注入过程中，塑封料16不会运动至顶面123，避免透明盖板12的顶面123受污染，且在上作用面301的限位作用下，成型之后的塑封料16远离第一表面101的端面161与顶面123相互齐平，可省略磨平工艺。
本实施方式的空腔S内还填充有注塑料16，可进一步提高空腔S区域的刚性，且通过注塑料16填充满空隙P，可提高透明盖板12的稳定性，避免透明盖板12发生移位，第一表面101处的注塑料16可起到稳定透明盖板12及保护基板10的作用，且注塑料16的刚性较强，可提高整个封装结构100的可靠性。
需要说明的是，当对应上述第二示例时，步骤S9具体包括：
将光学胶13’填充满空腔S’；
将透明盖板12’固定于第一表面101’，且透明盖板12’与光学胶13’相互固定。
S11：基于切割沟道分割基底，形成多个单粒封装结构100。
这里，步骤S11之前还包括步骤：
结合图12，于重布线层1021上形成植球14，且植球14远离重布线层1021的一端凸伸出芯片11上远离功能面111的背面112。
综上所述，本实施方式的透明盖板12与功能面111之间通过光学胶13连接，功能面111对应空腔S设置，此时，空腔S内填充有光学胶13和/或透明盖板12，相较于现有技术中无任何物质的空腔结构，可大大提高空腔S区域的刚性，从而提高整个封装结构100的可靠性，避免在信赖性测过程中或者是在后续封装结构100的使用过程(例如高温使用环境)中出现爆腔、分层等问题。
另外，透明盖板12与芯片11之间形成了无空腔的结构，大大增强了透明盖板12与芯片11之间的粘结强度，避免透明盖板12或芯片11的移位等。
本实施方式的封装方法的其他说明可以参考前述封装结构的说明，在此不再赘述。
应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施方式中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。
上文所列出的一系列的详细说明仅仅是针对本发明的可行性实施方式的具体说明，它们并非用以限制本发明的保护范围，凡未脱离本发明技艺精神所作的等效实施方式或变更均应包含在本发明的保护范围之内。

Claims (19)

  1. 一种芯片的封装结构，其特征在于，包括：
    基板，所述基板包括相对设置的第一表面及第二表面，且所述基板具有贯穿所述第一表面及所述第二表面的空腔；
    固定于所述第二表面的芯片，所述芯片包括相对设置的功能面及背面，所述功能面面对所述第二表面，且所述功能面覆盖所述空腔；
    透明盖板，所述透明盖板包括对应所述空腔的透光部，所述透光部与所述功能面之间填充光学胶。
  2. 根据权利要求1所述的封装结构，其特征在于，所述功能面设有感应区及连接区，所述连接区连接所述第二表面，所述感应区对应所述空腔，且所述光学胶覆盖所述感应区。
  3. 根据权利要求1所述的封装结构，其特征在于，所述透明盖板延伸至所述空腔内。
  4. 根据权利要求3所述的封装结构，其特征在于，所述透明盖板的侧缘与所述空腔的内壁之间具有空隙，所述空隙内填充有注塑料。
  5. 根据权利要求4所述的封装结构，其特征在于，所述透明盖板包括远离所述光学胶的顶面，所述顶面凸伸出所述第一表面。
  6. 根据权利要求5所述的封装结构，其特征在于，所述注塑料延伸至所述第一表面，且所述注塑料远离所述第一表面的端面与所述顶面相互齐平。
  7. 根据权利要求1所述的封装结构，其特征在于，所述透明盖板还包括环绕所述透光部设置的延伸部，所述延伸部连接所述第一表面。
  8. 根据权利要求1所述的封装结构，其特征在于，所述第二表面设有电连区，所述封装结构还包括植球，所述植球包括相对设置的第一端及第二端，所述第一端电性连接所述电连区，所述第二端相较于所述背面远离所述第二表面。
  9. 根据权利要求8所述的封装结构，其特征在于，所述电连区包括重布线层。
  10. 根据权利要求1所述的封装结构，其特征在于，所述封装结构还包括连接所述芯片的侧缘及所述第二表面的封装胶。
  11. 根据权利要求1所述的封装结构，其特征在于，所述芯片为影像传感芯片。
  12. 根据权利要求1所述的封装结构，其特征在于，所述基板为PCB板、有机基板以及玻璃基板中的任一种。
  13. 一种芯片的封装方法，其特征在于，包括步骤：
    于基底上定义呈阵列分布的多个基板，相邻基板之间具有切割沟道；
    形成贯穿所述基板上相对设置的第一表面及第二表面的多个空腔；
    固定芯片的功能面及所述第二表面，且使得所述功能面覆盖所述空腔；
    于所述功能面处涂布光学胶；
    将透明盖板固定于所述光学胶远离所述功能面的一侧；
    基于所述切割沟道分割所述基底，形成多个单粒封装结构。
  14. 根据权利要求13所述的封装方法，其特征在于，步骤“固定芯片的功能面及所述第二表面，且使得所述功能面覆盖所述空腔”具体包括：
    连接芯片的功能面处的连接区及所述第二表面，并使得功能面处的感应区对应所述空腔；
    形成连接所述芯片的侧缘及所述第二表面的封装胶。
  15. 根据权利要求13所述的封装方法，其特征在于，步骤“将透明盖板固定于所述光学胶远离所述功能面的一侧”具体包括：
    将透明盖板伸入所述空腔内而使得所述透明盖板连接所述光学胶，且所述透明盖板远离所述光学胶的顶面凸伸出所述第一表面。
  16. 根据权利要求15所述的封装方法，其特征在于，步骤“将透明盖板固定于所述光学胶远离所述功能面的一侧”之后还包括：
    将上模具的上作用面抵接所述顶面，并将下模具的下作用面抵接所述芯片上远离所述功能面的背面；
    将所述上模具及所述下模具合模，并于所述透明盖板的侧缘及所述空腔的内壁之间的空隙内以及所述上作用面及所述第一表面的间隙内填充注塑料。
  17. 根据权利要求13所述的封装方法，其特征在于，步骤“将透明盖板固定于所述光学胶远离所述功能面的一侧”具体包括：
    将光学胶填充满所述空腔；
    将透明盖板固定于所述第一表面，且所述透明盖板与所述光学胶相互固定。
  18. 根据权利要求13所述的封装方法，其特征在于，步骤“形成贯穿所述基板上相对设置的第一表面及第二表面的多个空腔”之前还包括步骤：
    于所述第二表面处形成重布线层。
  19. 根据权利要求18所述的封装方法，其特征在于，步骤“基于所述切割沟道分割所述基底，形成多个单粒封装结构”之前还包括步骤：
    于所述重布线层上形成植球，且所述植球远离所述重布线层的一端凸伸出所述芯片上远离所述功能面的背面。
PCT/CN2021/074610 2020-03-26 2021-02-01 芯片的封装结构及其封装方法 WO2021190141A1 (zh)

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