WO2021190093A1 - 一种服务器系统及其内处理器的频率控制装置 - Google Patents
一种服务器系统及其内处理器的频率控制装置 Download PDFInfo
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- 238000012545 processing Methods 0.000 claims abstract description 32
- 238000001514 detection method Methods 0.000 claims abstract description 25
- 230000002159 abnormal effect Effects 0.000 claims description 18
- 230000017525 heat dissipation Effects 0.000 claims description 9
- 238000012544 monitoring process Methods 0.000 claims description 8
- 238000001914 filtration Methods 0.000 claims description 6
- 238000012423 maintenance Methods 0.000 abstract description 9
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 8
- 230000005856 abnormality Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5094—Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Definitions
- the present invention relates to the field of server control, in particular to a server system and a frequency control device of its internal processor.
- the server system usually adopts a dual-channel power supply redundant design of A-channel mains + B-channel high-voltage direct current.
- the maintenance personnel in the computer room usually reserve a certain amount of time each month to conduct irregular power outage maintenance on the A road.
- the system is powered by the B road high-voltage direct current, so the server system will not be down due to the A road mains power failure.
- the purpose of the present invention is to provide a server system and a frequency control device of the processor in it, which can eliminate abnormal power supply alarms caused by power failure or flashing, so that the processor will no longer Start the frequency reduction operation, thereby avoiding the situation that the processing performance of the system is seriously degraded and the maintenance cost is increased due to power failure or flash interruption.
- the present invention provides a frequency control device for a processor in a server system, which is applied to a server system including a first power source and a second power source, and includes:
- the power detection modules respectively connected to the first power supply and the second power supply are used to generate a first power-down signal when the first power supply is detected to be power-down or flicker; When the second power supply loses power or flashes out, a second power-down signal is generated;
- the power alarm modules respectively connected to the first power source and the second power source are configured to generate a first alarm signal when the first power source is detected to be abnormal; when the second power source is detected to be abnormal, to generate Second alarm signal;
- the alarm processing module respectively connected to the power detection module and the power alarm module is used to determine that the first alarm signal is valid when the first power-down signal is not received, and when the first power-off signal is not received 2.
- the second alarm signal is determined to be valid when the power is off signal, and when the received first alarm signal and the second alarm signal are both valid, the processor in the server system is controlled to perform a frequency reduction operation.
- the alarm processing module includes:
- the alarm trigger module respectively connected to the power detection module and the power alarm module is used to determine that the first alarm signal is valid when the first power-down signal is not received, and when the first power-off signal is not received, 2. It is determined that the second alarm signal is valid when the power is off signal, and an alarm trigger signal is generated when the received first alarm signal and the second alarm signal are both valid;
- the frequency control module connected to the alarm trigger module is used to control the processor to perform a frequency reduction operation when the alarm trigger signal is received.
- the alarm trigger module is also used to perform software and hardware multi-layer filtering processing on the received signal to generate an alarm trigger signal when the filtered first alarm signal and the second alarm signal are both valid.
- the frequency control device further includes:
- a temperature sensor provided on the processor and connected to the frequency control module, used for detecting the temperature of the processor
- the frequency control module is further configured to control the processor to perform a frequency reduction operation when the temperature is greater than a preset temperature threshold.
- the frequency control device further includes:
- the temperature control modules respectively connected with the temperature sensor and the heat dissipation device are used to control the temperature within a preset temperature range by controlling the operation of the heat dissipation device.
- the heat dissipation device is specifically a fan in the server system
- the temperature control module includes:
- the PCH connected to the temperature sensor is used to obtain the temperature of the processor and other hardware in the server system;
- the BMC connected to the PCH, the heat sink, and the motherboard temperature sensor in the server system, respectively, is used to control the temperature balance of each device in the server system by controlling the operation of the heat sink.
- the frequency control device further includes:
- the frequency monitoring module connected to the frequency control module is configured to record frequency reduction information of the processor when the frequency control module controls the processor to perform a frequency reduction operation.
- the alarm trigger module is specifically a PCH in the server system; the frequency control module is specifically a CPLD in the server system; and the frequency monitoring module is specifically a BMC in the server system.
- the present invention also provides a server system, which includes a first power supply and a second power supply, and also includes any of the above-mentioned frequency control devices of the processor in the server system.
- the invention provides a frequency control device for a processor in a server system, which includes a power detection module, a power alarm module, and an alarm processing module.
- the power detection module generates the first/second power-down signal when it detects that the first/second power supply is off or flashes; the power alarm module generates the first/second power-off signal when it detects the first/second power supply is abnormal.
- the second alarm signal; the alarm processing module determines that the first/second alarm signal is valid when the first/second power-down signal is not received, and controls the processor when the received first alarm signal and the second alarm signal are both valid Perform a frequency reduction operation.
- this application can eliminate the abnormal power supply alarm caused by power failure or flashing, so that the processor will no longer start the frequency reduction operation in the case of power failure or flashing, thereby avoiding the power failure or flashing.
- the system handles severe degradation of performance and rising maintenance costs.
- the present invention also provides a server system, which has the same beneficial effects as the above-mentioned frequency control device.
- FIG. 1 is a schematic structural diagram of a frequency control device of a processor in a server system according to an embodiment of the present invention
- FIG. 2 is a schematic diagram of a specific structure of a frequency control device of a processor in a server system according to an embodiment of the present invention
- FIG. 3 is a schematic structural diagram of a temperature control module provided by an embodiment of the present invention.
- FIG. 4 is a schematic diagram of specific components of a frequency control device of a processor in a server system according to an embodiment of the present invention.
- the core of the present invention is to provide a server system and its internal processor frequency control device, which can eliminate abnormal power supply alarms caused by power failure or flashing, so that the processor will no longer Start the frequency reduction operation, thereby avoiding the situation that the processing performance of the system is seriously degraded and the maintenance cost is increased due to power failure or flash interruption.
- FIG. 1 is a schematic structural diagram of a frequency control device of a processor in a server system according to an embodiment of the present invention.
- the frequency control device of the processor in the server system is applied to a server system including a first power source and a second power source, and includes:
- the power detection module 1 respectively connected to the first power source and the second power source is used to generate a first power-down signal when the first power source is detected to be powered down or flicker; when the second power source is detected to be powered down or When flashing, the second power-down signal is generated;
- the power alarm module 2 respectively connected to the first power source and the second power source is configured to generate a first alarm signal when an abnormality of the first power source is detected; and to generate a second alarm signal when an abnormality of the second power source is detected;
- the alarm processing module 3 respectively connected to the power detection module 1 and the power alarm module 2 is used to determine that the first alarm signal is valid when the first power-down signal is not received, and to determine the first alarm signal when the second power-down signal is not received.
- the second alarm signal is valid, and when the received first alarm signal and the second alarm signal are both valid, the processor in the server system is controlled to perform a frequency reduction operation.
- the frequency control device of the processor in the server system of the present application includes a power detection module 1, a power alarm module 2, and an alarm processing module 3. Its working principle is as follows:
- the first power supply and the second power supply form a dual power supply PSU (Power Supply Unit, power supply).
- the power supply alarm module 2 includes a first power supply alarm module and a second power supply alarm module.
- the first power supply alarm module is used to detect the working condition of the first power supply, and when it detects an abnormality of the first power supply (such as power failure or flash interruption) Or other abnormal conditions), a first alarm signal is generated;
- the second power alarm module is used to detect the working condition of the second power supply, and when an abnormality of the second power supply is detected, a second alarm signal is generated.
- a power detection module 1 is provided.
- the power detection module 1 includes a first power detection module and a second power detection module.
- the first power detection module is used to detect the power failure or flashing condition of the first power supply. And when the first power supply is detected to be powered down or flicker, the first power down signal is generated; the second power detection module is used to detect the power down or flicker of the second power source, and when the second power source is detected When the power fails or flashes, the second power-down signal is generated.
- the alarm processing module 3 interacts with the power alarm module 2 and the power detection module 1 at the same time. If the first power-down signal is received while the first alarm signal is received, it means that the first power supply is abnormal due to power-down or flashing. If it alarms, it is determined that the first alarm signal is invalid, and the processing related to the abnormal alarm of the first power supply is not executed; if the first power-down signal is not received when the first alarm signal is received, it means that the first power supply is not due to power-down or flashing If the abnormal alarm is caused, it is determined that the first alarm signal is valid, and the processing related to the abnormal alarm of the first power supply is executed.
- the alarm processing module 3 receives the second power-down signal while receiving the second alarm signal, it means that the second power supply is an abnormal alarm caused by power-down or flashing, and the second alarm signal is determined to be invalid. Execute the processing related to the abnormal alarm of the second power supply; if the second power-down signal is not received when the second alarm signal is received, it means that the second power supply is not caused by power-down or flashing, and the second alarm signal is determined Valid, execute the processing related to the abnormal alarm of the second power supply. Moreover, the alarm processing module 3 controls the processor (such as a CPU) in the server system to perform a frequency reduction operation only when the received first alarm signal and the second alarm signal are both valid, so as to ensure the processing performance of the system.
- the processor such as a CPU
- the invention provides a frequency control device for a processor in a server system, which includes a power detection module, a power alarm module, and an alarm processing module.
- the power detection module generates the first/second power-down signal when it detects that the first/second power supply is off or flashes; the power alarm module generates the first/second power-off signal when it detects the first/second power supply is abnormal.
- the second alarm signal; the alarm processing module determines that the first/second alarm signal is valid when the first/second power-down signal is not received, and controls the processor when the received first alarm signal and the second alarm signal are both valid Perform a frequency reduction operation.
- this application can eliminate the abnormal power supply alarm situation caused by power failure or flashing, so that the processor will no longer start the frequency reduction operation in the case of power failure or flashing, thereby avoiding the power failure or flashing.
- the system handles severe degradation of performance and rising maintenance costs.
- FIG. 2 is a schematic diagram of a specific structure of a frequency control device of a processor in a server system according to an embodiment of the present invention.
- the alarm processing module 3 includes:
- the alarm trigger module 31 respectively connected to the power detection module 1 and the power alarm module 2 is used to determine that the first alarm signal is valid when the first power-down signal is not received, and to determine the first alarm signal when the second power-down signal is not received 2.
- the alarm signal is valid, and an alarm trigger signal is generated when the received first alarm signal and the second alarm signal are both valid;
- the frequency control module 32 connected to the alarm trigger module 31 is used to control the processor to perform a frequency reduction operation when an alarm trigger signal is received.
- the alarm processing module 3 of the present application includes an alarm trigger module 31 and a frequency control module 32, and its working principle is as follows:
- the alarm trigger module 31 interacts with the power alarm module 2 and the power detection module 1 at the same time. If the first power-down signal is received while the first alarm signal is received, the first alarm signal is determined to be invalid; If the first power-down signal is not received during the alarm signal, it is determined that the first alarm signal is valid. Similarly, if the alarm trigger module 31 receives the second power-down signal while receiving the second alarm signal, it determines that the second alarm signal is invalid; if the second power-down signal is not received when the second alarm signal is received , It is determined that the second alarm signal is valid. The alarm trigger module 31 generates an alarm trigger signal to the frequency control module 32 when the received first alarm signal and second alarm signal are both valid, so that the frequency control module 32 controls the processor in the system to perform frequency reduction after receiving the alarm trigger signal operate.
- the alarm trigger module 31 specifically responds to the first and second alarm signals. Perform an "or” operation, and only generate an alarm trigger signal when the first alarm signal and the second alarm signal are both low.
- the alarm trigger module 31 is also used to perform software and hardware multi-layer filtering processing on the received signal, so as to generate an alarm trigger signal when the filtered first alarm signal and the second alarm signal are both valid. .
- the alarm triggering module 31 of the present application first performs software and hardware multi-layer filtering processing on the received signal. Then the alarm trigger judgment is made based on the filtered signal, thereby improving the accuracy of the alarm trigger.
- the frequency control module 32 is also used to perform software and hardware multi-layer filtering processing on the received alarm trigger signal to control the processor in the system to perform frequency down operation after the filtered alarm trigger signal is effective, thereby further improving the alarm Accuracy of triggering.
- the first power alarm module includes a first operational amplifier for generating a first alarm signal.
- the power supply voltage of the first operational amplifier is provided by the first power supply. If the power supply voltage of the first operational amplifier is higher than that of the first operational amplifier. Input voltage, in the power-down scenario of the first power supply, the first operational amplifier may malfunction due to the difference in the discharge speed of the two voltages, so the supply voltage of the first operational amplifier is designed to be lower than the input voltage of the first operational amplifier , To avoid the first alarm signal from being pulled low by mistake.
- the second power alarm module includes a second operational amplifier for generating a second alarm signal.
- the power supply voltage of the second operational amplifier is provided by the second power supply. If the power supply voltage of the second operational amplifier is higher than that of the second operational amplifier When the second power supply is powered off, the second operational amplifier may malfunction due to the difference in the discharge speed of the two voltages. Therefore, the supply voltage of the second operational amplifier is designed to be lower than the input of the second operational amplifier. Voltage to prevent the second alarm signal from being pulled low by mistake.
- the frequency control device further includes:
- the temperature sensor 4 arranged on the processor and connected to the frequency control module 32 is used to detect the temperature of the processor;
- the frequency control module 32 is also configured to control the processor to perform a frequency reduction operation when the temperature is greater than the preset temperature threshold.
- the frequency control device of the present application further includes a temperature sensor 4 provided on the processor in the system, and the temperature sensor 4 is used to detect the temperature of the processor and send the temperature of the processor to the frequency control module 32.
- the frequency control module 32 After receiving the processor temperature, the frequency control module 32 compares the processor temperature with a preset temperature threshold, and when the processor temperature is greater than the preset temperature threshold, controls the processor to perform a frequency reduction operation to ensure the safety of the processor.
- the frequency control device further includes:
- the temperature control modules respectively connected to the temperature sensor 4 and the heat sink are used to control the temperature within the preset temperature range by controlling the operation of the heat sink.
- the frequency control device of the present application further includes a heat dissipation device and a temperature control module, and its working principle is as follows:
- the temperature sensor 4 on the processor also sends the processor temperature to the temperature control module.
- the temperature control module controls the processor temperature within a preset temperature range by controlling the operation of the heat sink to ensure the safety of the processor.
- FIG. 3 is a schematic structural diagram of a temperature control module according to an embodiment of the present invention.
- the heat dissipation device is specifically a fan in the server system
- the temperature control module includes:
- the PCH connected to the temperature sensor 4 is used to obtain the temperature of the processor and other hardware in the server system;
- the BMC connected to the PCH, the heat sink, and the motherboard temperature sensor in the server system, respectively, is used to control the temperature balance of each device in the server system by controlling the operation of the heat sink.
- the heat dissipation device of this application selects the fan in the server system;
- the temperature control module of this application includes PCH (Platform Controller Hub, integrated south bridge chip) and BMC (Baseboard Management Controller, baseboard management controller) in the server system, Its working principle is:
- the PCH can obtain the processor temperature from the temperature sensor 4 on the processor, and can also obtain the temperature of other hardware from the temperature detection elements on other hardware in the server system.
- BMC can obtain the processor temperature and the temperature of other hardware in the server system from the PCH, and also obtain the temperature of the server motherboard from the motherboard temperature sensor in the server system, and control the server system by controlling the operation of the fan in the server system The temperature of each device inside is balanced to ensure the safety of the system as a whole.
- the frequency control device further includes:
- the frequency monitoring module 5 connected to the frequency control module 32 is used to record the frequency reduction information of the processor when the frequency control module 32 controls the processor to perform the frequency reduction operation.
- the frequency control device of the present application further includes a frequency monitoring module 5, which can interact with the frequency control module 32 to record the frequency reduction information of the processor when the frequency control module 32 controls the processor to perform frequency reduction operations , For managers to view.
- FIG. 4 is a schematic diagram of specific components of a frequency control device for a processor in a server system according to an embodiment of the present invention.
- the alarm triggering module 31 is specifically a PCH in the server system; the frequency control module 32 is specifically a CPLD in the server system; and the frequency monitoring module 5 is specifically a BMC in the server system.
- the alarm triggering module 31 of the present application can choose the PCH in the server system
- the frequency control module 32 can choose the CPLD (Complex Programmable Logic Device) in the server system
- the frequency monitoring module 5 can choose the server system. Internal BMC, so there is no need to set up another circuit module, saving cost.
- the application also provides a server system, which includes a first power supply and a second power supply, and also includes any of the above-mentioned frequency control devices of the processor in the server system.
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Abstract
一种服务器系统内处理器的频率控制装置及服务器系统，包括电源侦测模块（1）、电源报警模块（2）及警报处理模块（3）。电源侦测模块（1）在侦测到第一/第二电源掉电或闪断时，生成第一/第二掉电信号；电源报警模块（2）在检测到第一/第二电源异常时，生成第一/第二报警信号；警报处理模块（3）在未接收到第一/第二掉电信号时确定第一/第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时控制处理器执行降频操作。可见，该装置和系统可消除因电源掉电或闪断导致的电源异常报警情况，使得处理器在电源掉电或闪断情况下不再启动降频操作，从而避免了因电源掉电或闪断导致系统处理性能严重下降及维护成本升高的情况。
Description
本申请要求于2020年03月27日提交至中国专利局、申请号为202010229627.X、发明名称为“一种服务器系统及其内处理器的频率控制装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
本发明涉及服务器控制领域，特别是涉及一种服务器系统及其内处理器的频率控制装置。
服务器系统通常采用A路市电+B路高压直流电的双路供电冗余设计。目前，为了保障服务器系统供电的安全性及可靠性，机房维修人员通常会在每个月都预留一定时间对A路市电进行不定时停电检修。在A路市电停电检修时，由于服务器系统的冗余供电设计，系统由B路高压直流电供电，因此服务器系统不会因A路市电掉电导致宕机。
但是，在A路市电掉电或闪断的过程中，会存在如下问题：1)服务器系统一直“故障”报警；2)服务器系统的CPU和内存启动降频操作(由几Ghz下降到几十Mhz)，导致系统处理性能严重下降；3)机房管理人员在机房内部定期巡检时，会发现A路供电的服务器都有报警故障，待查明“故障”原因后，机房管理人员需消除服务器的故障报警，导致维护成本较高。
因此，如何提供一种解决上述技术问题的方案是本领域的技术人员目前需要解决的问题。
发明内容
本发明的目的是提供一种服务器系统及其内处理器的频率控制装置，可消除因电源掉电或闪断导致的电源异常报警情况，使得处理器在电源掉电或闪断情况下不再启动降频操作，从而避免了因电源掉电或闪断导致系统处理性能严重下降及维护成本升高的情况。
为解决上述技术问题，本发明提供了一种服务器系统内处理器的频率控制装置，应用于包括第一电源和第二电源的服务器系统，包括：
分别与所述第一电源和所述第二电源连接的电源侦测模块，用于在侦测到所述第一电源掉电或闪断时，生成第一掉电信号；在侦测到所述第二电源掉电或闪断时，生成第二掉电信号；
分别与所述第一电源和所述第二电源连接的电源报警模块，用于在检测到所述第一电源异常时，生成第一报警信号；在检测到所述第二电源异常时，生成第二报警信号；
分别与所述电源侦测模块和所述电源报警模块连接的警报处理模块，用于在未接收到所述第一掉电信号时确定所述第一报警信号有效，在未接收到所述第二掉电信号时确定所述第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时控制所述服务器系统内处理器执行降频操作。
优选地，所述警报处理模块包括：
分别与所述电源侦测模块和所述电源报警模块连接的警报触发模块，用于在未接收到所述第一掉电信号时确定所述第一报警信号有效，在未接收到所述第二掉电信号时确定所述第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时生成报警触发信号；
与所述警报触发模块连接的频率控制模块，用于在接收到所述报警触发信号时，控制所述处理器执行降频操作。
优选地，所述警报触发模块还用于对接收的信号进行软硬件多层滤波处理，以在滤波处理后的第一报警信号和第二报警信号均有效时生成报警触发信号。
优选地，所述频率控制装置还包括：
设于所述处理器上、与所述频率控制模块连接的温度传感器，用于检测所述处理器的温度；
相应的，所述频率控制模块还用于当所述温度大于预设温度阈值时，控制所述处理器执行降频操作。
优选地，所述频率控制装置还包括：
散热装置；
分别与所述温度传感器和所述散热装置连接的温度控制模块，用于通过控制所述散热装置的运作情况来控制所述温度在预设温度范围内。
优选地，所述散热装置具体为所述服务器系统内的风扇；
所述温度控制模块包括：
与所述温度传感器连接的PCH，用于获取所述处理器和所述服务器系统内其它硬件的温度；
分别与所述PCH、所述散热装置及所述服务器系统内的主板温度传感器连接的BMC，用于通过控制所述散热装置的运作情况来控制所述服务器系统内各器件的温度均衡。
优选地，所述频率控制装置还包括：
与所述频率控制模块连接的频率监测模块，用于在所述频率控制模块控制所述处理器执行降频操作时，记录所述处理器的降频信息。
优选地，所述警报触发模块具体为所述服务器系统内的PCH；所述频率控制模块具体为所述服务器系统内的CPLD；所述频率监测模块具体为所述服务器系统内的BMC。
为解决上述技术问题，本发明还提供了一种服务器系统，包括第一电源和第二电源，还包括上述任一种服务器系统内处理器的频率控制装置。
本发明提供了一种服务器系统内处理器的频率控制装置，包括电源侦测模块、电源报警模块及警报处理模块。电源侦测模块在侦测到第一/第二电源掉电或闪断时，生成第一/第二掉电信号；电源报警模块在检测到第一/第二电源异常时，生成第一/第二报警信号；警报处理模块在未接收到第一/第二掉电信号时确定第一/第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时控制处理器执行降频操作。可见，本申请可消除因电源掉电或闪断导致的电源异常报警情况，使得处理器在电源掉电或闪断情况下不再启动降频操作，从而避免了因电源掉电或闪断导致系统处理性能严重下降及维护成本升高的情况。
本发明还提供了一种服务器系统，与上述频率控制装置具有相同的有益效果。
为了更清楚地说明本发明实施例中的技术方案，下面将对现有技术和实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种服务器系统内处理器的频率控制装置的结构示意图；
图2为本发明实施例提供的一种服务器系统内处理器的频率控制装置的具体结构示意图；
图3为本发明实施例提供的一种温度控制模块的结构示意图；
图4为本发明实施例提供的一种服务器系统内处理器的频率控制装置的具体器件示意图。
本发明的核心是提供一种服务器系统及其内处理器的频率控制装置，可消除因电源掉电或闪断导致的电源异常报警情况，使得处理器在电源掉电或闪断情况下不再启动降频操作，从而避免了因电源掉电或闪断导致系统处理性能严重下降及维护成本升高的情况。
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参照图1，图1为本发明实施例提供的一种服务器系统内处理器的频率控制装置的结构示意图。
该服务器系统内处理器的频率控制装置应用于包括第一电源和第二电源的服务器系统，包括：
分别与第一电源和第二电源连接的电源侦测模块1，用于在侦测到第一电源掉电或闪断时，生成第一掉电信号；在侦测到第二电源掉电或闪断时，生成第二掉电信号；
分别与第一电源和第二电源连接的电源报警模块2，用于在检测到第一电源异常时，生成第一报警信号；在检测到第二电源异常时，生成第二报警信号；
分别与电源侦测模块1和电源报警模块2连接的警报处理模块3，用于在未接收到第一掉电信号时确定第一报警信号有效，在未接收到第二掉电信号时确定第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时控制服务器系统内处理器执行降频操作。
具体地，本申请的服务器系统内处理器的频率控制装置包括电源侦测模块1、电源报警模块2及警报处理模块3，其工作原理为：
服务器系统中由第一电源和第二电源构成双路供电PSU(Power Supply Unit，电源)。电源报警模块2包括第一电源报警模块和第二电源报警模块，其中，第一电源报警模块用于检测第一电源的工作情况，并在检测到第一电源异常(如出现掉电或闪断或其它异常情况)时，生成第一报警信号；第二电源报警模块用于检测第二电源的工作情况，并在检测到第二电源异常时，生成第二报警信号。
考虑到在第一电源或第二电源不定时停电检修时，电源报警模块2也会一直“故障”报警，从而增加管理人员的巡检任务，所以本申请在电源报警模块2的基础上，还设置电源侦测模块1，电源侦测模块1包括第一电源侦测模块和第二电源侦测模块，其中，第一电源侦测模块用于侦测第一电源的掉电或闪断情况，并在侦测到第一电源掉电或闪断时，生成第一掉电信号；第二电源侦测模块用于侦测第二电源的掉电或闪断情况，并在侦测到第二电源掉电或闪断时，生成第二掉电信号。
警报处理模块3同时与电源报警模块2和电源侦测模块1交互，若在接收到第一报警信号的同时接收到第一掉电信号，说明第一电源是因掉电或闪断导致的异常报警，则确定第一报警信号无效，不执行有关第一电源异常报警的处理；若在接收到第一报警信号时未接收到第一掉电信号，说 明第一电源不是因掉电或闪断导致的异常报警，则确定第一报警信号有效，执行有关第一电源异常报警的处理。同理，警报处理模块3若在接收到第二报警信号的同时接收到第二掉电信号，说明第二电源是因掉电或闪断导致的异常报警，则确定第二报警信号无效，不执行有关第二电源异常报警的处理；若在接收到第二报警信号时未接收到第二掉电信号，说明第二电源不是因掉电或闪断导致的异常报警，则确定第二报警信号有效，执行有关第二电源异常报警的处理。而且，警报处理模块3只有在接收的第一报警信号和第二报警信号均有效时，才控制服务器系统内处理器(如CPU)执行降频操作，以保证系统处理性能。
本发明提供了一种服务器系统内处理器的频率控制装置，包括电源侦测模块、电源报警模块及警报处理模块。电源侦测模块在侦测到第一/第二电源掉电或闪断时，生成第一/第二掉电信号；电源报警模块在检测到第一/第二电源异常时，生成第一/第二报警信号；警报处理模块在未接收到第一/第二掉电信号时确定第一/第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时控制处理器执行降频操作。可见，本申请可消除因电源掉电或闪断导致的电源异常报警情况，使得处理器在电源掉电或闪断情况下不再启动降频操作，从而避免了因电源掉电或闪断导致系统处理性能严重下降及维护成本升高的情况。
在上述实施例的基础上：
请参照图2，图2为本发明实施例提供的一种服务器系统内处理器的频率控制装置的具体结构示意图。
作为一种可选的实施例，警报处理模块3包括：
分别与电源侦测模块1和电源报警模块2连接的警报触发模块31，用于在未接收到第一掉电信号时确定第一报警信号有效，在未接收到第二掉电信号时确定第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时生成报警触发信号；
与警报触发模块31连接的频率控制模块32，用于在接收到报警触发信号时，控制处理器执行降频操作。
具体地，本申请的警报处理模块3包括警报触发模块31和频率控制模块32，其工作原理为：
警报触发模块31同时与电源报警模块2和电源侦测模块1交互，若在接收到第一报警信号的同时接收到第一掉电信号，则确定第一报警信号无效；若在接收到第一报警信号时未接收到第一掉电信号，则确定第一报警信号有效。同理，警报触发模块31若在接收到第二报警信号的同时接收到第二掉电信号，则确定第二报警信号无效；若在接收到第二报警信号时未接收到第二掉电信号，则确定第二报警信号有效。警报触发模块31在接收的第一报警信号和第二报警信号均有效时生成报警触发信号至频率控制模块32，以使频率控制模块32在接收到报警触发信号后控制系统内处理器执行降频操作。
比如，第一报警信号Alert0和第二报警信号Alert1均用“低电平”表示信号有效，用“高电平”表示信号无效，则警报触发模块31具体对第一报警信号和第二报警信号进行“或”运算，只有在第一报警信号和第二报警信号均为低电平时，才生成报警触发信号。
作为一种可选的实施例，警报触发模块31还用于对接收的信号进行软硬件多层滤波处理，以在滤波处理后的第一报警信号和第二报警信号均有效时生成报警触发信号。
进一步地，考虑到输入至警报触发模块31的信号中会存在干扰信号，可能会导致警报触发模块31误触发，所以本申请的警报触发模块31先对接收的信号进行软硬件多层滤波处理，然后基于滤波处理后的信号进行报警触发判断，从而提高了报警触发的准确性。
同样地，频率控制模块32还用于对接收的报警触发信号进行软硬件多层滤波处理，以在滤波处理后的报警触发信号有效后控制系统内处理器执行降频操作，从而进一步提高了报警触发的准确性。
此外，第一电源报警模块中包含用于生成第一报警信号的第一运算放大器，第一运算放大器的供电电压由第一电源提供，若第一运算放大器的供电电压高于第一运算放大器的输入电压，则在第一电源的掉电场景下，第一运算放大器可能会因两电压的放电速度差异产生误动作，所以第一运 算放大器的供电电压设计要低于第一运算放大器的输入电压，以避免第一报警信号被误拉低报警。
同理，第二电源报警模块中包含用于生成第二报警信号的第二运算放大器，第二运算放大器的供电电压由第二电源提供，若第二运算放大器的供电电压高于第二运算放大器的输入电压，则在第二电源的掉电场景下，第二运算放大器可能会因两电压的放电速度差异产生误动作，所以第二运算放大器的供电电压设计要低于第二运算放大器的输入电压，以避免第二报警信号被误拉低报警。
作为一种可选的实施例，频率控制装置还包括：
设于处理器上、与频率控制模块32连接的温度传感器4，用于检测处理器的温度；
相应的，频率控制模块32还用于当温度大于预设温度阈值时，控制处理器执行降频操作。
进一步地，本申请的频率控制装置还包括设于系统内处理器上的温度传感器4，温度传感器4用于检测处理器的温度，并将处理器温度发送至频率控制模块32。频率控制模块32在接收到处理器温度后，将处理器温度与预设温度阈值作比较，当处理器温度大于预设温度阈值时，控制处理器执行降频操作，以保证处理器的安全。
作为一种可选的实施例，频率控制装置还包括：
散热装置；
分别与温度传感器4和散热装置连接的温度控制模块，用于通过控制散热装置的运作情况来控制温度在预设温度范围内。
进一步地，本申请的频率控制装置还包括散热装置和温度控制模块，其工作原理为：
处理器上的温度传感器4还将处理器温度发送至温度控制模块。温度控制模块在接收到处理器温度后，通过控制散热装置的运作情况来控制处理器温度在预设温度范围内，以保证处理器的安全。
请参照图3，图3为本发明实施例提供的一种温度控制模块的结构示意图。
作为一种可选的实施例，散热装置具体为服务器系统内的风扇；
且温度控制模块包括：
与温度传感器4连接的PCH，用于获取处理器和服务器系统内其它硬件的温度；
分别与PCH、散热装置及服务器系统内的主板温度传感器连接的BMC，用于通过控制散热装置的运作情况来控制服务器系统内各器件的温度均衡。
具体地，本申请的散热装置选用服务器系统内的风扇；本申请的温度控制模块包括服务器系统内的PCH(Platform Controller Hub，集成南桥芯片)和BMC(Baseboard Management Controller，基板管理控制器)，其工作原理为：
PCH可从处理器上的温度传感器4中获取处理器温度，还可从服务器系统内其它硬件上的温度检测元件中获取其它硬件的温度。BMC可从PCH中获取处理器温度和服务器系统内其它硬件的温度，还可从服务器系统内的主板温度传感器中获取服务器主板的温度，并通过控制服务器系统内的风扇的运作情况来控制服务器系统内各器件的温度均衡，以保证系统整体的安全性。
作为一种可选的实施例，频率控制装置还包括：
与频率控制模块32连接的频率监测模块5，用于在频率控制模块32控制处理器执行降频操作时，记录处理器的降频信息。
进一步地，本申请的频率控制装置还包括频率监测模块5，频率监测模块5可与频率控制模块32交互，以在频率控制模块32控制处理器执行降频操作时，记录处理器的降频信息，供管理人员查看。
请参照图4，图4为本发明实施例提供的一种服务器系统内处理器的频率控制装置的具体器件示意图。
作为一种可选的实施例，警报触发模块31具体为服务器系统内的PCH；频率控制模块32具体为服务器系统内的CPLD；频率监测模块5具体为服务器系统内的BMC。
具体地，本申请的警报触发模块31可选用服务器系统内的PCH，频 率控制模块32可选用服务器系统内的CPLD(Complex Programmable Logic Device，复杂可编程逻辑器件)，频率监测模块5可选用服务器系统内的BMC，从而无需另设电路模块，节约成本。
本申请还提供了一种服务器系统，包括第一电源和第二电源，还包括上述任一种服务器系统内处理器的频率控制装置。
本申请提供的服务器系统的介绍请参考上述频率控制装置的实施例，本申请在此不再赘述。
还需要说明的是，在本说明书中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
对所公开的实施例的上述说明，使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下，在其他实施例中实现。因此，本发明将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。
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- 一种服务器系统内处理器的频率控制装置，其特征在于，应用于包括第一电源和第二电源的服务器系统，包括：分别与所述第一电源和所述第二电源连接的电源侦测模块，用于在侦测到所述第一电源掉电或闪断时，生成第一掉电信号；在侦测到所述第二电源掉电或闪断时，生成第二掉电信号；分别与所述第一电源和所述第二电源连接的电源报警模块，用于在检测到所述第一电源异常时，生成第一报警信号；在检测到所述第二电源异常时，生成第二报警信号；分别与所述电源侦测模块和所述电源报警模块连接的警报处理模块，用于在未接收到所述第一掉电信号时确定所述第一报警信号有效，在未接收到所述第二掉电信号时确定所述第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时控制所述服务器系统内处理器执行降频操作。
- 如权利要求1所述的服务器系统内处理器的频率控制装置，其特征在于，所述警报处理模块包括：分别与所述电源侦测模块和所述电源报警模块连接的警报触发模块，用于在未接收到所述第一掉电信号时确定所述第一报警信号有效，在未接收到所述第二掉电信号时确定所述第二报警信号有效，并在接收的第一报警信号和第二报警信号均有效时生成报警触发信号；与所述警报触发模块连接的频率控制模块，用于在接收到所述报警触发信号时，控制所述处理器执行降频操作。
- 如权利要求2所述的服务器系统内处理器的频率控制装置，其特征在于，所述警报触发模块还用于对接收的信号进行软硬件多层滤波处理，以在滤波处理后的第一报警信号和第二报警信号均有效时生成报警触发信号。
- 如权利要求2所述的服务器系统内处理器的频率控制装置，其特征在于，所述频率控制装置还包括：设于所述处理器上、与所述频率控制模块连接的温度传感器，用于检测所述处理器的温度；相应的，所述频率控制模块还用于当所述温度大于预设温度阈值时，控制所述处理器执行降频操作。
- 如权利要求4所述的服务器系统内处理器的频率控制装置，其特征在于，所述频率控制装置还包括：散热装置；分别与所述温度传感器和所述散热装置连接的温度控制模块，用于通过控制所述散热装置的运作情况来控制所述温度在预设温度范围内。
- 如权利要求5所述的服务器系统内处理器的频率控制装置，其特征在于，所述散热装置具体为所述服务器系统内的风扇；所述温度控制模块包括：与所述温度传感器连接的PCH，用于获取所述处理器和所述服务器系统内其它硬件的温度；分别与所述PCH、所述散热装置及所述服务器系统内的主板温度传感器连接的BMC，用于通过控制所述散热装置的运作情况来控制所述服务器系统内各器件的温度均衡。
- 如权利要求2所述的服务器系统内处理器的频率控制装置，其特征在于，所述频率控制装置还包括：与所述频率控制模块连接的频率监测模块，用于在所述频率控制模块控制所述处理器执行降频操作时，记录所述处理器的降频信息。
- 如权利要求7所述的服务器系统内处理器的频率控制装置，其特征在于，所述警报触发模块具体为所述服务器系统内的PCH；所述频率控制模块具体为所述服务器系统内的CPLD；所述频率监测模块具体为所述服务器系统内的BMC。
- 一种服务器系统，其特征在于，包括第一电源和第二电源，还包括如权利要求1-8任一项所述的服务器系统内处理器的频率控制装置。
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