WO2021184908A1 - 光强检测电路、光强检测方法和装置 - Google Patents

光强检测电路、光强检测方法和装置 Download PDF

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WO2021184908A1
WO2021184908A1 PCT/CN2020/140848 CN2020140848W WO2021184908A1 WO 2021184908 A1 WO2021184908 A1 WO 2021184908A1 CN 2020140848 W CN2020140848 W CN 2020140848W WO 2021184908 A1 WO2021184908 A1 WO 2021184908A1
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circuit
transistor
sub
node
electrode
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PCT/CN2020/140848
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English (en)
French (fr)
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钟昆璟
孔德玺
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京东方科技集团股份有限公司
北京京东方传感技术有限公司
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Priority to US17/418,260 priority Critical patent/US11860029B2/en
Publication of WO2021184908A1 publication Critical patent/WO2021184908A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/10—Photometry, e.g. photographic exposure meter by comparison with reference light or electric value provisionally void
    • G01J1/16—Photometry, e.g. photographic exposure meter by comparison with reference light or electric value provisionally void using electric radiation detectors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/10—Photometry, e.g. photographic exposure meter by comparison with reference light or electric value provisionally void
    • G01J1/16—Photometry, e.g. photographic exposure meter by comparison with reference light or electric value provisionally void using electric radiation detectors
    • G01J1/18—Photometry, e.g. photographic exposure meter by comparison with reference light or electric value provisionally void using electric radiation detectors using comparison with a reference electric value
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J1/46—Electric circuits using a capacitor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J2001/4446—Type of detector
    • G01J2001/446—Photodiode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J2001/4446—Type of detector
    • G01J2001/4473—Phototransistor

Definitions

  • the embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and in particular to a light intensity detection circuit, a light intensity detection method and device.
  • X-ray (X-ray) testing is widely used in medical (such as X-ray chest X-ray), non-destructive testing (such as metal flaw detection), security testing, air transportation and other fields.
  • X-ray flat panel detectors include direct flat panel detectors and indirect flat panel detectors.
  • Indirect flat panel detectors include Charge Coupled Device (CCD), Complementary Metal Oxide Semiconductor (CMOS), and Types such as crystalline silicon, among them, amorphous silicon flat-panel detectors can have a larger imaging area and low distortion than CMOS and CCD flat-panel detectors.
  • the passive pixel sensor (PPS) structure provides a compact solution that can maximize the fill factor.
  • the passive pixel sensor circuit is detecting light induced After the generated charge signal, it is directly transmitted to the readout circuit without being amplified. Therefore, its noise is relatively large, and it is not suitable for application in high-precision X-ray detectors.
  • Active Pixel Sensor (APS) circuit adds amplifying transistor (Thin Film Transistor, TFT) on the basis of passive pixel sensor circuit, which can significantly increase the signal readout speed and reduce the signal-to-noise ratio. Therefore, in More and more attention is paid to applications with high frame rate and high image quality.
  • the amplification gain of each pixel unit is related to the threshold voltage of the amplifying transistor in the pixel unit, and the threshold voltage of different amplifying transistors may be different due to the drift phenomenon, the sensitivity of different pixel units may be different, that is, multiple The uniformity of the pixel unit is poor.
  • the embodiment of the present disclosure provides a light intensity detection circuit, including: a photoelectric conversion sub-circuit, a source follower sub-circuit, a reset sub-circuit, a reading sub-circuit, and a sensing sub-circuit, wherein: the photo-electric conversion sub-circuit is configured To generate a corresponding electrical signal according to the incident light signal and output it to the first node; the source follower sub-circuit is configured to generate a corresponding voltage signal or current signal according to the electrical signal of the first node and output it to the second node;
  • the reading sub-circuit is configured to read the voltage signal or the current signal of the second node to determine the intensity of the incident light;
  • the reset sub-circuit is configured to provide the first node with the voltage of the compensation voltage terminal, and the compensation
  • the voltage at the voltage terminal includes a reference voltage and a compensation voltage, and the compensation voltage is equal to the difference between the reset voltage and the voltage of the second node sensed by the sensing sub-circuit; the sensing
  • the read sub-circuit includes: a first transistor located in the pixel unit and an external read integrated circuit located outside the pixel unit, wherein: the control electrode of the first transistor and the read control The first pole of the first transistor is connected to the second node, and the second pole of the first transistor is connected to an external reading integrated circuit.
  • the photoelectric conversion sub-circuit includes a photodiode
  • the source follower sub-circuit includes: a second transistor, wherein: the anode terminal of the photodiode is connected to a bias voltage terminal, and the photodiode The cathode terminal of the second transistor is connected to the first node; the control electrode of the second transistor is connected to the first node, the first electrode of the second transistor is connected to the first voltage terminal, and the second electrode of the second transistor is connected to the first node. Two-node connection.
  • the reset sub-circuit includes: a third transistor, wherein: the control electrode of the third transistor is connected to the reset control terminal, and the first electrode of the third transistor is connected to the compensation voltage terminal, The second electrode of the third transistor is connected to the first node.
  • the sensing sub-circuit includes: a fourth transistor located in the pixel unit and an external sensing circuit located outside the pixel unit, the external sensing circuit includes a capacitor and a differential amplifier, wherein: The control electrode of the fourth transistor is connected to the sensing control terminal, the first electrode of the fourth transistor is connected to the second node, and the second electrode of the fourth transistor is connected to one end of the capacitor; One end is also connected to the negative input end of the differential amplifier, and the other end of the capacitor is grounded; the positive input end of the differential amplifier is connected to the reference voltage end, and the output end of the differential amplifier is connected to the sensing end.
  • the read sub-circuit includes: a first transistor located in the pixel unit and an external read integrated circuit located outside the pixel unit, the photoelectric conversion sub-circuit includes a photodiode, and the source follower
  • the sub-circuit includes: a second transistor, the reset sub-circuit includes: a third transistor, the sensing sub-circuit includes: a fourth transistor located in the pixel unit and an external sensing circuit located outside the pixel unit, the external sensing
  • the test circuit includes a capacitor and a differential amplifier, wherein: the control electrode of the first transistor is connected to the read control terminal, the first electrode of the first transistor is connected to the second node, and the second electrode of the first transistor is connected to the The external reading integrated circuit is connected; the anode terminal of the photodiode is connected with the bias voltage terminal, the cathode terminal of the photodiode is connected with the first node; the control electrode of the second transistor is connected with the first node, the The first electrode of the second transistor is connected to the first
  • One pole is connected to the compensation voltage terminal, the second pole of the third transistor is connected to the first node; the control pole of the fourth transistor is connected to the sensing control terminal, and the first pole of the fourth transistor is connected to the second node.
  • Node connection the second pole of the fourth transistor is connected to one end of the capacitor; one end of the capacitor is also connected to the negative input end of the differential amplifier, and the other end of the capacitor is grounded; the positive input of the differential amplifier The terminal is connected with the reference voltage terminal, and the output terminal of the differential amplifier is connected with the sensing terminal.
  • the light intensity detection circuit further includes a multiplexing sub-circuit
  • the multiplexing sub-circuit includes: a first transistor located in the pixel unit and a multiplexer located outside the pixel unit, the sensor The sensing sub-circuit is an external sensing circuit located outside the pixel unit, and the reading sub-circuit is an external reading integrated circuit located outside the pixel unit, wherein: the control electrode of the first transistor is connected to the read control terminal, so The first pole of the first transistor is connected to the second node, and the second pole of the first transistor is connected to the input channel of the multiplexer; one output channel of the multiplexer is connected to the read sub-circuit Connected, another output channel of the multiplexer is connected to the sensing sub-circuit.
  • the photoelectric conversion sub-circuit includes a photodiode
  • the source follower sub-circuit includes a second transistor
  • the reset sub-circuit includes a third transistor
  • the light intensity detection circuit further includes a complex With a sub-circuit
  • the multiplexing sub-circuit includes: a first transistor located in the pixel unit and a multiplexer located outside the pixel unit
  • the sensing sub-circuit is an external sensing circuit located outside the pixel unit
  • the read The fetching sub-circuit is an external reading integrated circuit located outside the pixel unit, wherein: the anode terminal of the photodiode is connected to the bias voltage terminal, the cathode terminal of the photodiode is connected to the first node;
  • the control electrode is connected to the first node, the first electrode of the second transistor is connected to the first voltage terminal, the second electrode of the second transistor is connected to the second node;
  • the control electrode of the third transistor is connected to the reset control The first electrode of the third transistor is connected to
  • the embodiment of the present disclosure also provides a light intensity detection device, which includes the light intensity detection circuit as described above.
  • the embodiment of the present disclosure also provides a light intensity detection method, which includes: a reset sub-circuit provides a reference voltage provided by a compensation voltage terminal to a first node, a sensing sub-circuit senses the voltage of a second node; The node provides the compensation voltage provided by the compensation voltage terminal, the compensation voltage is equal to the difference between the reset voltage and the voltage of the second node sensed by the sensing sub-circuit; the photoelectric conversion sub-circuit generates a corresponding electrical signal according to the incident light signal, Output to the first node; the source follower sub-circuit generates a corresponding voltage signal or current signal according to the electrical signal of the first node and outputs it to the second node; the read sub-circuit reads the voltage signal or current signal of the second node to Determine the intensity of the incident light.
  • FIG. 1 is a schematic structural diagram of a light intensity detection circuit provided by an embodiment of the disclosure
  • FIG. 3 is an equivalent circuit diagram of a photoelectric conversion sub-circuit and a source follower sub-circuit provided by an embodiment of the disclosure
  • FIG. 5 is an equivalent circuit diagram of a reset sub-circuit provided by an embodiment of the disclosure.
  • FIG. 6 is an equivalent circuit diagram of a sensing sub-circuit provided by an embodiment of the disclosure.
  • FIG. 7 is one of the equivalent circuit diagrams of the light intensity detection circuit provided by the embodiments of the disclosure.
  • FIG. 8 is a working sequence diagram of a light intensity detection circuit provided by an embodiment of the disclosure.
  • FIG. 9 is an equivalent circuit diagram of a multiplexing sub-circuit provided by an embodiment of the disclosure.
  • FIG. 11 is a flowchart of a light intensity detection method provided by an embodiment of the disclosure.
  • the transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics.
  • the thin film transistor used in the embodiment of the present disclosure may be an oxide semiconductor transistor. Since the source and drain of the transistor used here are symmetrical, the source and drain can be interchanged.
  • one of the electrodes is called the first pole, and the other is called the second pole.
  • the first pole can be a source or a drain, and the second The electrode can be a drain or a source.
  • the imaging principle of the indirect flat-panel detector is as follows: X-ray irradiates the inside of the detector, first passes through a scintillator (Scintillator), the function of the scintillator is to convert X-ray into visible light, and then the visible light is incident on the glass back plate, which contains A photodiode and a switch circuit (such as TFT). The photodiode receives visible light and excites electrons to the capacitor for storage. Then the scanning (Gate) side drive circuit turns on the switch circuit to scan row by row, and the data side reads the signal. The chip will The analog signal is converted into a digital signal, and finally presented as an image.
  • Scintillator scintillator
  • TFT switch circuit
  • the amplification gain of APS is related to the threshold voltage.
  • TFT thin film transistors
  • a-Si amorphous silicon
  • IGZO oxide
  • LTPS low temperature polysilicon
  • the threshold voltage drift of the device is obvious.
  • the threshold voltage deviation ⁇ Vth of LTPS NMOS TFT under positive gate bias stress (+20 volts, 2 hours) is about +1 volt, which makes multiple pixels
  • the sensitivity of the unit may vary greatly.
  • the embodiment of the present disclosure provides a light intensity detection circuit, which includes: a photoelectric conversion sub-circuit, a source follower sub-circuit, a reset sub-circuit, a reading sub-circuit, and a sensing sub-circuit.
  • the photoelectric conversion sub-circuit is configured to generate a corresponding electrical signal according to the incident light signal and output to the first node; the source follower sub-circuit is configured to generate a corresponding voltage signal or current signal according to the electrical signal of the first node and output it to the first node Two nodes; the reading sub-circuit is configured to read the voltage signal or current signal of the second node to determine the incident light intensity; the reset sub-circuit is configured to provide the first node with the voltage of the compensation voltage terminal, the voltage of the compensation voltage terminal includes the reference Voltage and compensation voltage, the compensation voltage is equal to the difference between the reset voltage and the voltage of the second node sensed by the sensing sub-circuit; the sensing sub-circuit is configured to sense the second node when the voltage of the first node is the reference voltage The voltage.
  • the light intensity detection circuit provided by the embodiment of the present disclosure provides a reference voltage to the first node through the reset sub-circuit, the sensing sub-circuit senses the voltage of the second node, and the reset sub-circuit to the first node according to the sensed voltage of the second node
  • One node provides a compensation voltage, which eliminates the sensitivity difference between different pixel units due to threshold voltage changes, and improves the uniformity of multiple pixel units.
  • FIG. 1 is a schematic structural diagram of a light intensity detection circuit according to an embodiment of the disclosure.
  • the light intensity detection circuit of this embodiment includes: a photoelectric conversion sub-circuit, a source follower sub-circuit, a reset sub-circuit, a reading sub-circuit, and a sensing sub-circuit.
  • the photoelectric conversion sub-circuits are respectively connected to the bias voltage terminal Bias and the first node N1, and are configured to generate corresponding electrical signals according to the incident light signal and output to the first node N1; the source follower sub-circuits are respectively connected to the first node N1 and the first node N1.
  • a voltage terminal VDD is connected to the second node N2, and is configured to generate a corresponding voltage signal or current signal according to the electrical signal of the first node N1 and output it to the second node N2;
  • the reading sub-circuit is respectively connected to the second node N2,
  • the read control terminal Read is connected to the output terminal OUT, and is configured to read the voltage signal or current signal of the second node N2 under the control of the read control terminal Read to determine the incident light intensity;
  • the reset sub-circuit is respectively connected to the reset control The terminal RST, the compensation voltage terminal COMP and the first node N1 are connected, and are configured to provide the first node N1 with the voltage of the compensation voltage terminal COMP under the control of the reset control terminal RST.
  • the voltage of the compensation voltage terminal COMP includes the reference voltage Vref or Compensation voltage Vcomp, the compensation voltage Vcomp is equal to the difference between the reset voltage and the voltage of the second node N2 sensed by the sensing sub-circuit; the sensing sub-circuit is respectively connected to the sensing control terminal Sen, the second node N2 and the sensing terminal Sense , Is configured to sense the voltage of the second node N2 under the control of the sensing control terminal Sen when the voltage of the first node N1 is the reference voltage Vref.
  • the light intensity detection circuit provided by the embodiment of the present disclosure eliminates the sensitivity difference between different pixel units caused by the threshold voltage change, and improves the uniformity of multiple pixel units.
  • FIG. 2 is an equivalent circuit diagram of a reading sub-circuit provided by an embodiment of the disclosure.
  • the reading sub-circuit includes: a first transistor T1 located in a pixel unit And the external reading integrated circuit located outside the pixel unit.
  • the control electrode of the first transistor T1 is connected to the read control terminal Read, the first electrode of the first transistor T1 is connected to the second node N2, and the second electrode of the first transistor T1 is connected to the external read integrated circuit.
  • FIG. 2 An exemplary structure of the reading sub-circuit is shown in FIG. 2. It is easily understood by those skilled in the art that the implementation of the reading sub-circuit is not limited to this, as long as its respective functions can be realized.
  • FIG. 3 is an equivalent circuit diagram of the photoelectric conversion sub-circuit and the source follower sub-circuit provided by the embodiments of the disclosure.
  • the photoelectric conversion sub-circuit includes The photodiode D
  • the source follower sub-circuit includes: a second transistor T2 located in the pixel unit.
  • the anode terminal of the photodiode D is connected to the bias voltage terminal Bias, the cathode terminal of the photodiode D is connected to the first node N1; the control electrode of the second transistor T2 is connected to the first node N1, and the first electrode of the second transistor T2 is connected to The first voltage terminal VDD is connected, and the second electrode of the second transistor T2 is connected to the second node N2.
  • FIG. 4 is another equivalent circuit diagram of the photoelectric conversion sub-circuit and the source follower sub-circuit provided by the embodiments of the disclosure.
  • the photoelectric conversion sub-circuit may include The photodiode D and the second capacitor C2 in the unit, and the source follower sub-circuit includes: a second transistor T2 located in the pixel unit.
  • the anode terminal of the photodiode D is connected to the bias voltage terminal Bias
  • the cathode terminal of the photodiode D is connected to the first node N1
  • one end of the second capacitor C2 is connected to the bias voltage terminal Bias
  • the other end of the second capacitor C2 is connected to the first node N1.
  • a node N1 is connected; the control electrode of the second transistor T2 is connected to the first node N1, the first electrode of the second transistor T2 is connected to the first voltage terminal VDD, and the second electrode of the second transistor T2 is connected to the second node N2.
  • FIGS. 3 and 4 Two exemplary structures of the photoelectric conversion sub-circuit and the source follower sub-circuit are shown in FIGS. 3 and 4. It is easily understood by those skilled in the art that the implementation of the photoelectric conversion sub-circuit and the source follower sub-circuit are not limited to this, as long as they can achieve their respective functions.
  • FIG. 5 is an equivalent circuit diagram of the reset sub-circuit provided by an embodiment of the disclosure.
  • the reset sub-circuit includes: a third transistor T3 located in the pixel unit.
  • the control electrode of the third transistor T3 is connected to the reset control terminal RST, the first electrode of the third transistor T3 is connected to the compensation voltage terminal COMP, and the second electrode of the third transistor T3 is connected to the first node N1.
  • FIG. 5 An exemplary structure of the reset sub-circuit is shown in FIG. 5. Those skilled in the art can easily understand that the implementation of the reset sub-circuit is not limited to this, as long as its respective functions can be realized.
  • FIG. 6 is an equivalent circuit diagram of the sensing sub-circuit provided by an embodiment of the disclosure.
  • the sensing sub-circuit includes: a fourth transistor T4 located in the pixel unit And the external sensing circuit located outside the pixel unit.
  • the control electrode of the fourth transistor T4 is connected to the sensing control terminal Sen, the first electrode of the fourth transistor T4 is connected to the second node N2, and the second electrode of the fourth transistor T4 is connected to the external sensing circuit.
  • the external sensing circuit may include a capacitor C and a differential amplifier AMP, wherein one end of the capacitor C is connected to the second electrode of the fourth transistor T4, and the other end of the capacitor C is grounded; the differential amplifier The negative input terminal of the AMP is connected with the second pole of the fourth transistor T4, the positive input terminal of the differential amplifier AMP is connected with the reference voltage terminal, and the output terminal of the differential amplifier AMP is connected with the sensing terminal.
  • FIG. 6 An exemplary structure of the sensing sub-circuit is shown in FIG. 6. It is easily understood by those skilled in the art that the implementation of the sensing sub-circuit is not limited to this, as long as its respective functions can be realized.
  • FIG. 7 is an equivalent circuit diagram of the light intensity detection circuit provided by the embodiment of the present disclosure.
  • the reading sub-circuit includes: A transistor T1 and an external reading integrated circuit located outside the pixel unit.
  • the photoelectric conversion sub-circuit includes a photodiode D located in the pixel unit.
  • the source follower sub-circuit includes: a second transistor T2 located in the pixel unit.
  • the reset sub-circuit includes: The third transistor T3 located in the pixel unit, the sensing sub-circuit includes: a fourth transistor T4 located in the pixel unit and an external sensing circuit located outside the pixel unit.
  • the control electrode of the first transistor T1 is connected to the read control terminal Read, the first electrode of the first transistor T1 is connected to the second node N2, and the second electrode of the first transistor T1 is connected to the external read integrated circuit;
  • the anode terminal is connected to the bias voltage terminal Bias, the cathode terminal of the photodiode D is connected to the first node N1;
  • the control electrode of the second transistor T2 is connected to the first node N1, and the first electrode of the second transistor T2 is connected to the first voltage terminal VDD is connected, the second electrode of the second transistor T2 is connected to the second node N2;
  • the control electrode of the third transistor T3 is connected to the reset control terminal RST, the first electrode of the third transistor T3 is connected to the compensation voltage terminal COMP, and the third transistor
  • the second electrode of T3 is connected to the first node N1, the control electrode of the fourth transistor T4 is connected to the sensing control terminal Sen, the first electrode of the fourth transistor T4 is connected to the second node N
  • FIG. 7 Exemplary structures of the sensing sub-circuit, the reading sub-circuit, the photoelectric conversion sub-circuit, the source follower sub-circuit, and the reset sub-circuit are shown in FIG. 7. It is easily understood by those skilled in the art that the implementation of the above sub-circuits is not limited to this, as long as their respective functions can be realized.
  • the first transistor T1 to the fourth transistor T4 may be N-type thin film transistors or P-type thin film transistors, which can unify the process flow, reduce the number of processes, and help improve the yield of products.
  • the transistors in the embodiments of the present disclosure may be low-temperature polysilicon thin-film transistors, and the thin-film transistors may be thin-film transistors with a bottom-gate structure or a top-gate structure, as long as the switch can be realized. Function.
  • the working process can include:
  • the third transistor T3 is turned on, and the reference voltage Vref provided by the compensation voltage terminal COMP is input to the first node N1 through the third transistor T3;
  • the fourth transistor T4 is turned on, and the external sensing circuit reads the voltage of the second node N2 through the fourth transistor T4, and feeds back the sensed voltage of the second node N2 to the compensation voltage End COMP;
  • the bias voltage is input to the photodiode D through the bias voltage terminal Bias, so that the photodiode D is in a reverse bias state, the photodiode D is illuminated, and the light signal is collected, and the collected light signal is converted Is the corresponding voltage signal and is output to the first node N1;
  • the second transistor T2 generates the corresponding current signal according to the voltage signal of the first node N1 (in other embodiments, it can also generate the corresponding current signal according to the voltage of the first node N1 Corresponding voltage signal) and output to the second node N2;
  • the first transistor T1 is turned on, and the external reading integrated circuit reads the current signal of the second node N2 through the first transistor T1 to determine the incident light intensity.
  • the external sensing circuit by sensing the voltage of the second node N2 in the sensing phase, the external sensing circuit feeds back the voltage of the second node N2 (related to the threshold voltage Vth) to the compensation voltage terminal COMP, through
  • the reset transistor introduces the change of the threshold voltage Vth into the first node N1, so that the subsequent amplification current is independent of the threshold voltage Vth, eliminates the influence of the threshold voltage Vth, thereby eliminating the sensitivity difference between different pixel units due to the threshold voltage change, Improve the uniformity of multiple pixel units.
  • the light intensity detection circuit further includes a multiplexing sub-circuit
  • the multiplexing sub-circuit includes: a first transistor T1 located in the pixel unit and a multiplexer MUX located outside the pixel unit.
  • FIG. 9 is an equivalent circuit diagram of the multiplexing sub-circuit provided by an embodiment of the disclosure.
  • the multiplexing sub-circuit includes: a first transistor T1 located in a pixel unit And the multiplexer MUX located outside the pixel unit, the sensing sub-circuit is an external sensing circuit located outside the pixel unit, and the reading sub-circuit is an external reading integrated circuit located outside the pixel unit.
  • the control electrode of the first transistor T1 is connected to the read control terminal Read, the first electrode of the first transistor T1 is connected to the second node N2, and the second electrode of the first transistor T1 is connected to the input channel of the multiplexer MUX; One output channel of the multiplexer MUX is connected with the reading sub-circuit, and another output channel of the multiplexer MUX is connected with the sensing sub-circuit.
  • FIG. 9 An exemplary structure of the multiplexing sub-circuit is shown in FIG. 9. Those skilled in the art can easily understand that the implementation of the multiplexing sub-circuit is not limited to this, as long as its respective functions can be realized.
  • FIG. 10 is an equivalent circuit diagram of a light intensity detection circuit provided by an embodiment of the present disclosure.
  • the photoelectric conversion sub-circuit includes a photodiode D located in a pixel unit.
  • the source follower sub-circuit includes: a second transistor T2 located in the pixel unit, the reset sub-circuit includes: a third transistor T3 located in the pixel unit, the light intensity detection circuit also includes a multiplexing sub-circuit, the multiplexing sub-circuit includes: located in the pixel The first transistor T1 in the unit and the multiplexer MUX located outside the pixel unit, the sensing sub-circuit is an external sensing circuit located outside the pixel unit, and the reading sub-circuit is an external reading located outside the pixel unit integrated circuit.
  • the anode terminal of the photodiode D is connected to the bias voltage terminal Bias, the cathode terminal of the photodiode D is connected to the first node N1; the control electrode of the second transistor T2 is connected to the first node N1, and the first electrode of the second transistor T2 is connected to The first voltage terminal VDD is connected, the second electrode of the second transistor T2 is connected to the second node N2; the control electrode of the third transistor T3 is connected to the reset control terminal RST, and the first electrode of the third transistor T3 is connected to the compensation voltage terminal COMP , The second electrode of the third transistor T3 is connected to the first node N1; the control electrode of the first transistor T1 is connected to the read control terminal Read, the first electrode of the first transistor T1 is connected to the second node N2, and the first transistor T1
  • the second pole of MUX is connected with the input channel of the multiplexer MUX; one output channel of the multiplexer MUX is connected with the reading sub-circuit, and the
  • FIG. 10 An exemplary structure of the reset sub-circuit, the photoelectric conversion sub-circuit, the source follower sub-circuit, and the reset sub-circuit is shown in FIG. 10. It is easily understood by those skilled in the art that the implementation of the above sub-circuits is not limited to this, as long as their respective functions can be realized.
  • the working process of the light intensity detection circuit in this embodiment is similar to the foregoing embodiment.
  • For the working process please refer to the description of the foregoing embodiment, which will not be repeated here.
  • An embodiment of the present disclosure also provides a light intensity detection device, which includes the light intensity detection circuit described in any of the foregoing embodiments.
  • the embodiment of the present disclosure also provides a light intensity detection method. As shown in FIG. 11, the light intensity detection method includes step 100 to step 500.
  • Step 100 includes: the reset sub-circuit provides a reference voltage provided by the compensation voltage terminal to the first node, and the sensing sub-circuit senses the voltage of the second node.
  • the voltage value of the reference voltage may be lower.
  • the voltage value of the second node will rise to Vref-Vth, where Vref is the reference voltage, and Vth is the threshold voltage of the amplifying transistor.
  • Step 200 includes: the reset sub-circuit provides the compensation voltage provided by the compensation voltage terminal to the first node, and the compensation voltage is equal to the difference between the reset voltage and the voltage of the second node sensed by the sensing sub-circuit.
  • the compensation voltage Vcomp Vrst-(Vref-Vth), and Vrst is the reset voltage.
  • Step 300 includes: the photoelectric conversion sub-circuit generates a corresponding electrical signal according to the incident light signal, and outputs it to the first node.
  • the photoelectric conversion sub-circuit includes a photosensitive element, and the incident light signal is collected by the photosensitive element to generate a corresponding electrical signal and output to the first node.
  • Step 400 includes: the source follower sub-circuit generates a corresponding voltage signal or current signal according to the electrical signal of the first node and outputs the corresponding voltage signal or current signal to the second node.
  • the source follower sub-circuit can generate a corresponding voltage signal to output to the second node according to the electrical signal of the first node, or can generate a corresponding current signal to output to the second node according to the electrical signal of the first node .
  • Step 500 includes: the reading sub-circuit reads the voltage signal or the current signal of the second node to determine the intensity of the incident light.
  • the light intensity detection method provided by this embodiment provides a reference voltage to the first node through the reset sub-circuit, the sensing sub-circuit senses the voltage of the second node, and the reset sub-circuit sends the voltage to the first node according to the sensed voltage of the second node.
  • the node provides a compensation voltage, which can monitor the threshold voltage change in real time, and compensate in real time to maintain a fixed amplification gain, eliminate the sensitivity difference caused by the threshold voltage change between different pixel units, and improve the uniformity of each pixel unit.

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Abstract

一种光强检测电路、光强检测方法和装置，光强检测电路包括光电转换子电路、源跟随子电路、复位子电路、读取子电路和感测子电路，光电转换子电路根据入射光信号生成对应的电信号，输出至第一节点(N1)；源跟随子电路根据第一节点(N1)的电信号，生成对应的电压或电流信号并输出至第二节点(N2)；读取子电路读取第二节点(N2)的电压或电流信号，以确定入射光强度；复位子电路向第一节点(N1)提供补偿电压端(COMP)的电压，补偿电压端(COMP)的电压包括参考电压(Vref)和补偿电压(Vcomp)，补偿电压(Vcomp)等于复位电压与感测到的第二节点(N1)的电压之差；当第一节点(N1)的电压为参考电压(Vref)时，感测子电路感测第二节点(N2)的电压。

Description

光强检测电路、光强检测方法和装置
本申请要求于2020年3月20日提交中国专利局、申请号为202010202451.9、发明名称为“一种光强检测电路、光强检测方法和装置”的中国专利申请的优先权，其内容应理解为通过引用的方式并入本公开中。
技术领域
本公开实施例涉及但不限于显示技术领域，尤其涉及一种光强检测电路、光强检测方法和装置。
背景技术
X射线(X-ray)检测广泛应用于医疗(如X光胸透)、无损检测(如金属探伤)、安保检测、航空运输等领域。X射线平板探测器包括直接式平板探测器和间接式平板探测器，间接式平板探测器包括电荷耦合器件(Charge Coupled Device，CCD)、互补金属氧化物半导体(Complementary Metal Oxide Semiconductor，CMOS)、非晶硅等类型，其中，非晶硅平板探测器能有比CMOS、CCD平板探测器更大的成像面积和低失真度。
对于大面积X射线平板探测器而言，被动式像素传感器(Passive Pixel Sensor，PPS)结构提供了一种紧凑的解决方案，能最大限度地扩大填充因子，但是，被动式像素传感器电路在探测到光诱导产生的电荷信号后，未经放大即被直接传送到读出电路，因此，其噪声较大，不适合应用在高精度X射线探测器中。主动式像素传感器(Active Pixel Sensor，APS)电路在被动式像素传感器电路的基础上，增加了放大晶体管(Thin Film Transistor，TFT)，能够显著地提高信号读出速度，降低信噪比，因此，在高帧频、高画质的应用上，越来越受到重视。
但是，由于每个像素单元的放大增益与该像素单元中的放大晶体管的阈值电压相关，而不同放大晶体管的阈值电压由于漂移现象可能存在差异，使得不同像素单元的灵敏度可能存在差异，即多个像素单元的均一性较差。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本公开实施例提供了一种光强检测电路，包括：光电转换子电路、源跟随子电路、复位子电路、读取子电路和感测子电路，其中：所述光电转换子电路，被配置为根据入射光信号生成对应的电信号，输出至第一节点；所述源跟随子电路，被配置为根据第一节点的电信号，生成对应的电压信号或电流信号并输出至第二节点；所述读取子电路，被配置为读取第二节点的电压信号或电流信号，以确定入射光强度；所述复位子电路，被配置为向第一节点提供补偿电压端的电压，所述补偿电压端的电压包括参考电压和补偿电压，所述补偿电压等于复位电压与所述感测子电路感测到的第二节点的电压之差；所述感测子电路，被配置为当第一节点的电压为参考电压时，感测第二节点的电压。
在一些可能的实现方式中，所述读取子电路包括：位于像素单元内的第一晶体管和位于像素单元外的外部读取集成电路，其中：所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与第二节点连接，所述第一晶体管的第二极与外部读取集成电路连接。
在一些可能的实现方式中，所述光电转换子电路包括光敏二极管，所述源跟随子电路包括：第二晶体管，其中：所述光敏二极管的阳极端与偏置电压端连接，所述光敏二极管的阴极端与第一节点连接；所述第二晶体管的控制极和第一节点连接，所述第二晶体管的第一极和第一电压端连接，所述第二晶体管的第二极与第二节点连接。
在一些可能的实现方式中，所述复位子电路包括：第三晶体管，其中：所述第三晶体管的控制极与复位控制端连接，所述第三晶体管的第一极与补偿电压端连接，所述第三晶体管的第二极与第一节点连接。
在一些可能的实现方式中，所述感测子电路包括：位于像素单元内的第四晶体管和位于像素单元外的外部感测电路，所述外部感测电路包括电容和差分放大器，其中：所述第四晶体管的控制极与感测控制端连接，所述第四晶体管的第一极与第二节点连接，所述第四晶体管的第二极与所述电容的一 端连接；所述电容的一端还与差分放大器的负输入端连接，所述电容的另一端接地；所述差分放大器的正输入端与基准电压端连接，所述差分放大器的输出端与感测端连接。
在一些可能的实现方式中，所述读取子电路包括：位于像素单元内的第一晶体管和位于像素单元外的外部读取集成电路，所述光电转换子电路包括光敏二极管，所述源跟随子电路包括：第二晶体管，所述复位子电路包括：第三晶体管，所述感测子电路包括：位于像素单元内的第四晶体管和位于像素单元外的外部感测电路，所述外部感测电路包括电容和差分放大器，其中：所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与第二节点连接，所述第一晶体管的第二极与外部读取集成电路连接；所述光敏二极管的阳极端与偏置电压端连接，所述光敏二极管的阴极端与第一节点连接；所述第二晶体管的控制极和第一节点连接，所述第二晶体管的第一极和第一电压端连接，所述第二晶体管的第二极与第二节点连接；所述第三晶体管的控制极与复位控制端连接，所述第三晶体管的第一极与补偿电压端连接，所述第三晶体管的第二极与第一节点连接；所述第四晶体管的控制极与感测控制端连接，所述第四晶体管的第一极与第二节点连接，所述第四晶体管的第二极与所述电容的一端连接；所述电容的一端还与差分放大器的负输入端连接，所述电容的另一端接地；所述差分放大器的正输入端与基准电压端连接，所述差分放大器的输出端与感测端连接。
在一些可能的实现方式中，所述光强检测电路还包括复用子电路，所述复用子电路包括：位于像素单元内的第一晶体管和位于像素单元外的复用器，所述感测子电路为位于像素单元外的外部感测电路，所述读取子电路为位于像素单元外的外部读取集成电路，其中：所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与第二节点连接，所述第一晶体管的第二极与所述复用器的输入通道连接；所述复用器的一路输出通道与所述读取子电路连接，所述复用器的另一路输出通道与所述感测子电路连接。
在一些可能的实现方式中，所述光电转换子电路包括光敏二极管，所述源跟随子电路包括：第二晶体管，所述复位子电路包括：第三晶体管，所述光强检测电路还包括复用子电路，所述复用子电路包括：位于像素单元内的 第一晶体管和位于像素单元外的复用器，所述感测子电路为位于像素单元外的外部感测电路，所述读取子电路为位于像素单元外的外部读取集成电路，其中：所述光敏二极管的阳极端与偏置电压端连接，所述光敏二极管的阴极端与第一节点连接；所述第二晶体管的控制极和第一节点连接，所述第二晶体管的第一极和第一电压端连接，所述第二晶体管的第二极与第二节点连接；所述第三晶体管的控制极与复位控制端连接，所述第三晶体管的第一极与补偿电压端连接，所述第三晶体管的第二极与第一节点连接；所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与第二节点连接，所述第一晶体管的第二极与所述复用器的输入通道连接；所述复用器的一路输出通道与所述读取子电路连接，所述复用器的另一路输出通道与所述感测子电路连接。
本公开实施例还提供了一种光强检测装置，包括：如上所述的光强检测电路。
本公开实施例还提供了一种光强检测方法，包括：复位子电路向第一节点提供补偿电压端提供的参考电压，感测子电路感测第二节点的电压；复位子电路向第一节点提供补偿电压端提供的补偿电压，所述补偿电压等于复位电压与所述感测子电路感测到的第二节点的电压之差；光电转换子电路根据入射光信号生成对应的电信号，输出至第一节点；源跟随子电路根据第一节点的电信号，生成对应的电压信号或电流信号并输出至第二节点；读取子电路读取第二节点的电压信号或电流信号，以确定入射光强度。
在阅读并理解了附图概述和本公开的实施方式后，可以明白其他方面。
附图说明
附图用来提供对本公开实施例技术方案的理解，并且构成说明书的一部分，与本公开实施例一起用于解释本公开实施例的技术方案，并不构成对本公开实施例技术方案的限制。
图1为本公开实施例提供的光强检测电路的结构示意图；
图2为本公开实施例提供的读取子电路的等效电路图；
图3为本公开实施例提供的光电转换子电路和源跟随子电路的一种等效电路图；
图4为本公开实施例提供的光电转换子电路和源跟随子电路的另一种等效电路图；
图5为本公开实施例提供的复位子电路的等效电路图；
图6为本公开实施例提供的感测子电路的等效电路图；
图7为本公开实施例提供的光强检测电路的等效电路图之一；
图8为本公开实施例提供的光强检测电路的工作时序图；
图9为本公开实施例提供的复用子电路的等效电路图；
图10为本公开实施例提供的光强检测电路的等效电路图之二；
图11为本公开实施例提供的一种光强检测方法的流程图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白，下文中将结合附图对本发明的实施例进行详细说明。需要说明的是，在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
除非另外定义，本公开实施例公开使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开实施例中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指该词前面的元件或物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
本领域技术人员可以理解，本公开实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件。本公开实施例中使用的薄膜晶体管可以是氧化物半导体晶体管。由于这里采用的晶体管的源极、漏极是对称的，所以其源极、漏极可以互换。在本公开实施例中，为区分晶体管除栅极之外的两极，将其中一个电极称为第一极，另一电极称为第二极，第一极可以为 源极或者漏极，第二极可以为漏极或源极。
间接式平板探测器成像原理如下：X-ray照射至探测器内部，首先经过闪烁体(Scintillator)，闪烁体功能是将X-ray转化成可见光，接着可见光入射至玻璃背板，玻璃背板包含一光电二极管和一开关电路(如TFT)，由光电二极管接受可见光激发电子至电容存储，接着扫描(Gate)侧驱动电路逐行打开开关电路扫描，由数据(Data)侧读取信号，芯片将模拟信号转换成数字信号，最后以影像方式呈现。
近年来，为了进一步提升平板探测器的性能与泛用性，动态平板探测器成为未来趋势，高帧频、高画质、低剂量都是未来的研究方向。而APS的像素设计因其放大信号之效果，能大幅度提升灵敏度，满足高帧频下信号量不足的问题点，已经被视为动态平板探测器必要的像素结构之一。
APS的放大增益与阈值电压相关，但是，由于不同像素单元的阈值电压可能存在差异，特别是非晶硅(a-Si)、氧化物(IGZO)、低温多晶硅(LTPS)的薄膜电晶体(TFT)器件，其阈值电压漂移明显，比如，LTPS NMOS TFT在正偏栅压应力(Positive gate bias stress)(+20伏，2小时)时的阈值电压偏移量ΔVth约+1伏，使得多个像素单元的灵敏度可能存在较大差异。
本公开实施例提供一种光强检测电路，该光强检测电路包括：光电转换子电路、源跟随子电路、复位子电路、读取子电路和感测子电路。
光电转换子电路被配置为根据入射光信号生成对应的电信号，输出至第一节点；源跟随子电路被配置为根据第一节点的电信号，生成对应的电压信号或电流信号并输出至第二节点；读取子电路被配置为读取第二节点的电压信号或电流信号，以确定入射光强度；复位子电路被配置为向第一节点提供补偿电压端的电压，补偿电压端的电压包括参考电压和补偿电压，补偿电压等于复位电压与感测子电路感测到的第二节点的电压之差；感测子电路被配置为当第一节点的电压为参考电压时，感测第二节点的电压。
本公开实施例提供的光强检测电路，通过复位子电路向第一节点提供参考电压、感测子电路感测第二节点的电压、复位子电路根据感测到的第二节点的电压向第一节点提供补偿电压，消除了不同像素单元之间由于阈值电压变化引起的灵敏度差异，提高了多个像素单元的均一性。
图1为本公开一种实施例的光强检测电路的结构示意图。如图1所示，本实施例的光强检测电路包括：光电转换子电路、源跟随子电路、复位子电路、读取子电路和感测子电路。
光电转换子电路分别与偏置电压端Bias和第一节点N1连接，被配置为根据入射光信号生成对应的电信号，输出至第一节点N1；源跟随子电路分别与第一节点N1、第一电压端VDD和第二节点N2连接，被配置为根据第一节点N1的电信号，生成对应的电压信号或电流信号并输出至第二节点N2；读取子电路分别与第二节点N2、读取控制端Read和输出端OUT连接，被配置为在读取控制端Read的控制下，读取第二节点N2的电压信号或电流信号，以确定入射光强度；复位子电路分别与复位控制端RST、补偿电压端COMP和第一节点N1连接，被配置为在复位控制端RST的控制下，向第一节点N1提供补偿电压端COMP的电压，补偿电压端COMP的电压包括参考电压Vref或补偿电压Vcomp，补偿电压Vcomp等于复位电压与感测子电路感测到的第二节点N2的电压之差；感测子电路分别与感测控制端Sen、第二节点N2和感测端Sense连接，被配置为当第一节点N1的电压为参考电压Vref时，在感测控制端Sen的控制下，感测第二节点N2的电压。
本公开实施例提供的光强检测电路，消除了不同像素单元之间由于阈值电压变化引起的灵敏度差异，提高了多个像素单元的均一性。
在一种示例性实施例中，图2为本公开实施例提供的读取子电路的一种等效电路图，如图2所示，读取子电路包括：位于像素单元内的第一晶体管T1和位于像素单元外的外部读取集成电路。
第一晶体管T1的控制极与读取控制端Read连接，第一晶体管T1的第一极与第二节点N2连接，第一晶体管T1的第二极与外部读取集成电路连接。
图2中示出了读取子电路的一种示例性结构。本领域技术人员容易理解是，读取子电路的实现方式不限于此，只要能够实现其各自的功能即可。
在一种示例性实施例中，图3为本公开实施例提供的光电转换子电路和源跟随子电路的一种等效电路图，如图3所示，光电转换子电路包括位于像素单元内的光敏二极管D，源跟随子电路包括：位于像素单元内的第二晶体管T2。
光敏二极管D的阳极端与偏置电压端Bias连接，光敏二极管D的阴极端与第一节点N1连接；第二晶体管T2的控制极和第一节点N1连接，第二晶体管T2的第一极和第一电压端VDD连接，第二晶体管T2的第二极与第二节点N2连接。
在另一种示例性实施例中，图4为本公开实施例提供的光电转换子电路和源跟随子电路的另一种等效电路图，如图4所示，光电转换子电路可以包括位于像素单元内的光敏二极管D和第二电容C2，源跟随子电路包括：位于像素单元内的第二晶体管T2。
光敏二极管D的阳极端与偏置电压端Bias连接，光敏二极管D的阴极端与第一节点N1连接，第二电容C2的一端与偏置电压端Bias连接，第二电容C2的另一端与第一节点N1连接；第二晶体管T2的控制极与第一节点N1连接，第二晶体管T2的第一极与第一电压端VDD连接，第二晶体管T2的第二极与第二节点N2连接。
图3和图4中示出了光电转换子电路和源跟随子电路的两种示例性结构。本领域技术人员容易理解是，光电转换子电路和源跟随子电路的实现方式不限于此，只要能够实现其各自的功能即可。
在一种示例性实施例中，图5为本公开实施例提供的复位子电路的一种等效电路图，如图5所示，复位子电路包括：位于像素单元内的第三晶体管T3。
第三晶体管T3的控制极与复位控制端RST连接，第三晶体管T3的第一极与补偿电压端COMP连接，第三晶体管T3的第二极与第一节点N1连接。
图5中示出了复位子电路的一种示例性结构。本领域技术人员容易理解是，复位子电路的实现方式不限于此，只要能够实现其各自的功能即可。
在一种示例性实施例中，图6为本公开实施例提供的感测子电路的一种等效电路图，如图6所示，感测子电路包括：位于像素单元内的第四晶体管T4和位于像素单元外的外部感测电路。
第四晶体管T4的控制极与感测控制端Sen连接，第四晶体管T4的第一 极与第二节点N2连接，第四晶体管T4的第二极与外部感测电路连接。
本实施例中，如图6所示，外部感测电路可以包括电容C和差分放大器AMP，其中，电容C的一端与第四晶体管T4的第二极连接，电容C的另一端接地；差分放大器AMP的负输入端与第四晶体管T4的第二极连接，差分放大器AMP的正输入端与基准电压端连接，差分放大器AMP的输出端与感测端连接。
图6中示出了感测子电路的一种示例性结构。本领域技术人员容易理解是，感测子电路的实现方式不限于此，只要能够实现其各自的功能即可。
图7为本公开实施例提供的光强检测电路的一种等效电路图，如图7所示，本公开实施例提供的光强检测电路中，读取子电路包括：位于像素单元内的第一晶体管T1和位于像素单元外的外部读取集成电路，光电转换子电路包括位于像素单元内的光敏二极管D，源跟随子电路包括：位于像素单元内的第二晶体管T2，复位子电路包括：位于像素单元内的第三晶体管T3，感测子电路包括：位于像素单元内的第四晶体管T4和位于像素单元外的外部感测电路。
第一晶体管T1的控制极与读取控制端Read连接，第一晶体管T1的第一极与第二节点N2连接，第一晶体管T1的第二极与外部读取集成电路连接；光敏二极管D的阳极端与偏置电压端Bias连接，光敏二极管D的阴极端与第一节点N1连接；第二晶体管T2的控制极和第一节点N1连接，第二晶体管T2的第一极和第一电压端VDD连接，第二晶体管T2的第二极与第二节点N2连接；第三晶体管T3的控制极与复位控制端RST连接，第三晶体管T3的第一极与补偿电压端COMP连接，第三晶体管T3的第二极与第一节点N1连接，第四晶体管T4的控制极与感测控制端Sen连接，第四晶体管T4的第一极与第二节点N2连接，第四晶体管T4的第二极与外部感测电路连接。
图7中示出了感测子电路、读取子电路、光电转换子电路、源跟随子电路和复位子电路的示例性结构。本领域技术人员容易理解是，以上各子电路的实现方式不限于此，只要能够实现其各自的功能即可。
在本实施例中，第一晶体管T1～第四晶体管T4可以为N型薄膜晶体管或P型薄膜晶体管，可以统一工艺流程，减少工艺制程，有助于提高产品的 良率。此外，考虑到低温多晶硅薄膜晶体管的漏电流较小，本公开实施例中的晶体管可以为低温多晶硅薄膜晶体管，薄膜晶体管可以选择底栅结构的薄膜晶体管或者顶栅结构的薄膜晶体管，只要能够实现开关功能即可。
下面结合图7所示的光强检测电路和图8所示的工作时序图，对该光强检测电路的工作过程的示例进行描述。如图8所示，工作过程可包括：
第一阶段t1，即参考电压输入阶段，打开第三晶体管T3，通过第三晶体管T3向第一节点N1输入补偿电压端COMP提供的参考电压Vref；
第二阶段t2，即感测阶段，打开第四晶体管T4，外部感测电路通过第四晶体管T4读取第二节点N2的电压，并将感测到的第二节点N2的电压反馈至补偿电压端COMP；
第三阶段t3，即复位阶段，打开第三晶体管T3，通过第三晶体管T3向第一节点N1输入补偿电压端COMP提供的补偿电压Vcomp，Vcomp＝Vrst-(Vref-Vth)，Vrst为复位电压，Vth为第二晶体管T2的阈值电压；
第四阶段t4，即积分阶段，通过偏置电压端Bias向光敏二极管D输入偏置电压，使光敏二极管D处于逆偏压状态，光敏二极管D受到光照，采集光信号，将采集的光信号转换为相应的电压信号，并输出至第一节点N1；第二晶体管T2根据第一节点N1的电压信号，生成对应的电流信号(在其他实施例中，也可以根据第一节点N1的电压，生成对应的电压信号)并输出至第二节点N2；
第五阶段t5，即读取阶段，打开第一晶体管T1，外部读取集成电路通过第一晶体管T1读取第二节点N2的电流信号，以确定入射光强度。
本公开实施例的光强检测电路，通过在感测阶段感测第二节点N2的电压，外部感测电路将第二节点N2的电压(与阈值电压Vth相关)反馈至补偿电压端COMP，通过复位晶体管，将阈值电压Vth的变化引入第一节点N1，使后续放大电流与阈值电压Vth无关，消除了阈值电压Vth的影响，从而消除了不同像素单元之间由于阈值电压变化引起的灵敏度差异，提高了多个像素单元的均一性。
在另一种示例性实施例中，光强检测电路还包括复用子电路，复用子电 路包括：位于像素单元内的第一晶体管T1和位于像素单元外的复用器MUX。通过使用复用器MUX，可以进一步减少一个像素单元内的晶体管的数量，以最大限度地扩大填充因子。
在一种示例性实施例中，图9为本公开实施例提供的复用子电路的一种等效电路图，如图9所示，复用子电路包括：位于像素单元内的第一晶体管T1和位于像素单元外的复用器MUX，所述感测子电路为位于像素单元外的外部感测电路，所述读取子电路为位于像素单元外的外部读取集成电路。
第一晶体管T1的控制极与读取控制端Read连接，第一晶体管T1的第一极与第二节点N2连接，第一晶体管T1的第二极与复用器MUX的输入通道连接；复用器MUX的一路输出通道与所述读取子电路连接，复用器MUX的另一路输出通道与感测子电路连接。
图9中示出了复用子电路的一种示例性结构。本领域技术人员容易理解是，复用子电路的实现方式不限于此，只要能够实现其各自的功能即可。
图10为本公开实施例提供的光强检测电路的等效电路图，如图10所示，本公开实施例提供的光强检测电路中，光电转换子电路包括位于像素单元内的光敏二极管D，源跟随子电路包括：位于像素单元内的第二晶体管T2，复位子电路包括：位于像素单元内的第三晶体管T3，光强检测电路还包括复用子电路，复用子电路包括：位于像素单元内的第一晶体管T1和位于像素单元外的复用器MUX，所述感测子电路为位于像素单元外的外部感测电路，所述读取子电路为位于像素单元外的外部读取集成电路。
光敏二极管D的阳极端与偏置电压端Bias连接，光敏二极管D的阴极端与第一节点N1连接；第二晶体管T2的控制极和第一节点N1连接，第二晶体管T2的第一极和第一电压端VDD连接，第二晶体管T2的第二极与第二节点N2连接；第三晶体管T3的控制极与复位控制端RST连接，第三晶体管T3的第一极与补偿电压端COMP连接，第三晶体管T3的第二极与第一节点N1连接；第一晶体管T1的控制极与读取控制端Read连接，第一晶体管T1的第一极与第二节点N2连接，第一晶体管T1的第二极与复用器MUX的输入通道连接；复用器MUX的一路输出通道与读取子电路连接，复用器MUX的另一路输出通道与感测子电路连接。
图10中示出了复位子电路、光电转换子电路、源跟随子电路和复位子电路的一种示例性结构。本领域技术人员容易理解是，以上各子电路的实现方式不限于此，只要能够实现其各自的功能即可。
本实施例的光强检测电路的工作过程与前述实施例相似，工作过程请参照前述实施例的描述，此处不再赘述。
本公开实施例还提供了一种光强检测装置，包括前述任一实施例所述的光强检测电路。
本公开实施例还提供了一种光强检测方法，如图11所示，该光强检测方法包括步骤100至步骤500。
步骤100包括：复位子电路向第一节点提供补偿电压端提供的参考电压，感测子电路感测第二节点的电压。
在本步骤中，参考电压的电压值可以较低，经过一段时间后，第二节点的电压值会上升至Vref-Vth，Vref为参考电压，Vth为放大晶体管的阈值电压。
步骤200包括：复位子电路向第一节点提供补偿电压端提供的补偿电压，补偿电压等于复位电压与所述感测子电路感测到的第二节点的电压之差。
在本步骤中，补偿电压Vcomp＝Vrst-(Vref-Vth)，Vrst为复位电压。通过提供该补偿电压对第一节点进行复位，消除了阈值电压对后续步骤中源跟随子电路生成的电压信号或电流信号的影响。
步骤300包括：光电转换子电路根据入射光信号生成对应的电信号，输出至第一节点。
在本步骤中，光电转换子电路包括光敏元件，通过光敏元件采集入射光信号，生成对应的电信号，输出至第一节点。
步骤400包括：源跟随子电路根据第一节点的电信号，生成对应的电压信号或电流信号并输出至第二节点。
在本步骤中，源跟随子电路可以根据第一节点的电信号，生成对应的电压信号输出至第二节点，或者，可以根据第一节点的电信号，生成对应的电流信号输出至第二节点。
步骤500包括：读取子电路读取第二节点的电压信号或电流信号，以确定入射光强度。
本实施例提供的光强检测方法，通过复位子电路向第一节点提供参考电压、感测子电路感测第二节点的电压、复位子电路根据感测到的第二节点的电压向第一节点提供补偿电压，能够实时监控阈值电压变化，即时补偿以达到保持固定的放大增益，消除了不同像素单元之间由于阈值电压变化引起的灵敏度差异，提高了各个像素单元的均一性。
本公开实施例附图只涉及本公开实施例涉及到的结构，其他结构可参考通常设计。
虽然本公开所揭露的实施方式如上，但所述的内容仅为便于理解本公开而采用的实施方式，并非用以限定本公开。任何本公开所属领域内的技术人员，在不脱离本公开所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本申请的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (10)

  1. 一种光强检测电路，包括：光电转换子电路、源跟随子电路、复位子电路、读取子电路和感测子电路，其中：
    所述光电转换子电路，被配置为根据入射光信号生成对应的电信号，输出至第一节点；
    所述源跟随子电路，被配置为根据所述第一节点的电信号，生成对应的电压信号或电流信号并输出至第二节点；
    所述读取子电路，被配置为读取所述第二节点的电压信号或电流信号，以确定入射光强度；
    所述复位子电路，被配置为向所述第一节点提供补偿电压端的电压，所述补偿电压端的电压包括参考电压和补偿电压，所述补偿电压等于复位电压与所述感测子电路感测到的所述第二节点的电压之差；
    所述感测子电路，被配置为当所述第一节点的电压为参考电压时，感测所述第二节点的电压。
  2. 根据权利要求1所述的光强检测电路，其中，所述读取子电路包括：位于像素单元内的第一晶体管和位于所述像素单元外的外部读取集成电路；
    所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与所述第二节点连接，所述第一晶体管的第二极与所述外部读取集成电路连接。
  3. 根据权利要求1所述的光强检测电路，其中，所述光电转换子电路包括光敏二极管，所述源跟随子电路包括：第二晶体管；
    所述光敏二极管的阳极端与偏置电压端连接，所述光敏二极管的阴极端与所述第一节点连接；
    所述第二晶体管的控制极和所述第一节点连接，所述第二晶体管的第一极与第一电压端连接，所述第二晶体管的第二极与所述第二节点连接。
  4. 根据权利要求1所述的光强检测电路，其中，所述复位子电路包括： 第三晶体管；
    所述第三晶体管的控制极与复位控制端连接，所述第三晶体管的第一极与所述补偿电压端连接，所述第三晶体管的第二极与所述第一节点连接。
  5. 根据权利要求1所述的光强检测电路，其中，所述感测子电路包括：位于像素单元内的第四晶体管和位于所述像素单元外的外部感测电路，所述外部感测电路包括电容和差分放大器；
    所述第四晶体管的控制极与感测控制端连接，所述第四晶体管的第一极与所述第二节点连接，所述第四晶体管的第二极与所述电容的一端连接；
    所述电容的一端还与所述差分放大器的负输入端连接，所述电容的另一端接地；所述差分放大器的正输入端与基准电压端连接，所述差分放大器的输出端与感测端连接。
  6. 根据权利要求1所述的光强检测电路，其中，所述读取子电路包括：位于像素单元内的第一晶体管和位于所述像素单元外的外部读取集成电路，所述光电转换子电路包括光敏二极管，所述源跟随子电路包括：第二晶体管，所述复位子电路包括：第三晶体管，所述感测子电路包括：位于所述像素单元内的第四晶体管和位于所述像素单元外的外部感测电路，所述外部感测电路包括电容和差分放大器；
    所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与所述第二节点连接，所述第一晶体管的第二极与所述外部读取集成电路连接；
    所述光敏二极管的阳极端与偏置电压端连接，所述光敏二极管的阴极端与所述第一节点连接；
    所述第二晶体管的控制极与所述第一节点连接，所述第二晶体管的第一极与第一电压端连接，所述第二晶体管的第二极与所述第二节点连接；
    所述第三晶体管的控制极与复位控制端连接，所述第三晶体管的第一极与所述补偿电压端连接，所述第三晶体管的第二极与所述第一节点连接；
    所述第四晶体管的控制极与感测控制端连接，所述第四晶体管的第一极 与所述第二节点连接，所述第四晶体管的第二极与所述电容的一端连接；
    所述电容的一端还与所述差分放大器的负输入端连接，所述电容的另一端接地；所述差分放大器的正输入端与基准电压端连接，所述差分放大器的输出端与感测端连接。
  7. 根据权利要求1所述的光强检测电路，其中，所述光强检测电路还包括复用子电路，所述复用子电路包括：位于像素单元内的第一晶体管和位于所述像素单元外的复用器，所述感测子电路为位于所述像素单元外的外部感测电路，所述读取子电路为位于所述像素单元外的外部读取集成电路；
    所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与所述第二节点连接，所述第一晶体管的第二极与所述复用器的输入通道连接；
    所述复用器的一路输出通道与所述读取子电路连接，所述复用器的另一路输出通道与所述感测子电路连接。
  8. 根据权利要求1所述的光强检测电路，其中，所述光电转换子电路包括光敏二极管，所述源跟随子电路包括：第二晶体管，所述复位子电路包括：第三晶体管，所述光强检测电路还包括复用子电路，所述复用子电路包括：位于像素单元内的第一晶体管和位于所述像素单元外的复用器，所述感测子电路为位于所述像素单元外的外部感测电路，所述读取子电路为位于所述像素单元外的外部读取集成电路；
    所述光敏二极管的阳极端与偏置电压端连接，所述光敏二极管的阴极端与所述第一节点连接；
    所述第二晶体管的控制极和所述第一节点连接，所述第二晶体管的第一极和第一电压端连接，所述第二晶体管的第二极与所述第二节点连接；
    所述第三晶体管的控制极与复位控制端连接，所述第三晶体管的第一极与所述补偿电压端连接，所述第三晶体管的第二极与所述第一节点连接；
    所述第一晶体管的控制极与读取控制端连接，所述第一晶体管的第一极与所述第二节点连接，所述第一晶体管的第二极与所述复用器的输入通道连 接；
    所述复用器的一路输出通道与所述读取子电路连接，所述复用器的另一路输出通道与所述感测子电路连接。
  9. 一种光强检测装置，包括如权利要求1至8任一项所述的光强检测电路。
  10. 一种光强检测方法，包括：
    复位子电路向第一节点提供补偿电压端提供的参考电压，感测子电路感测第二节点的电压；
    所述复位子电路向所述第一节点提供所述补偿电压端提供的补偿电压，所述补偿电压等于复位电压与所述感测子电路感测到的所述第二节点的电压之差；
    光电转换子电路根据入射光信号生成对应的电信号，输出至所述第一节点；
    源跟随子电路根据所述第一节点的电信号，生成对应的电压信号或电流信号并输出至所述第二节点；
    读取子电路读取所述第二节点的电压信号或电流信号，以确定入射光强度。
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