WO2021184450A1 - 像素驱动电路及显示面板 - Google Patents

像素驱动电路及显示面板 Download PDF

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Publication number
WO2021184450A1
WO2021184450A1 PCT/CN2020/083538 CN2020083538W WO2021184450A1 WO 2021184450 A1 WO2021184450 A1 WO 2021184450A1 CN 2020083538 W CN2020083538 W CN 2020083538W WO 2021184450 A1 WO2021184450 A1 WO 2021184450A1
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Prior art keywords
electrode
sub
pixel
main
thin film
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Ceased
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PCT/CN2020/083538
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English (en)
French (fr)
Inventor
张子翔
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TCL China Star Optoelectronics Technology Co Ltd
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TCL China Star Optoelectronics Technology Co Ltd
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Priority to US16/759,433 priority Critical patent/US11587520B2/en
Publication of WO2021184450A1 publication Critical patent/WO2021184450A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G02F1/136286—Wiring, e.g. gate line, drain line
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
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    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Definitions

  • the present invention relates to the field of display technology, in particular to a pixel drive circuit and a display panel.
  • the vertical alignment (Vertical Alignment, VA) display mode has become a large-size TV thin film transistor (Thin Film Transistor, TFT)-Liquid Crystal Display (Liquid Crystal Display (LCD) is a common display mode, but the large-scale role bias of the vertical alignment mode is an important factor that must be considered in the design of vertical alignment products.
  • TFT Thi Film Transistor
  • LCD Liquid Crystal Display
  • the current technology to reduce color shift mainly adopts multi-domain pixel design. Each domain is consistent with the polarization direction of the upper/lower polarizer (POL).
  • POL upper/lower polarizer
  • the main pixel electrode corresponds to the "side" of the liquid crystal molecules, which contributes a small part to the brightness
  • the sub-pixel electrode corresponds to the "front” of the liquid crystal molecules. It contributes to the large angle part, so the sub-pixel electrode brightness contribution is relatively large when viewed from the side. This will cause the red (Red, R) and green (Green, G) ), Blue (Blue, B) pixels are different from the front view after color mixing, which will show a large view of the role deviation, which seriously affects the quality of the panel.
  • the current large-size display device has a technical problem of serious color shift under large viewing angles.
  • the embodiments of the present invention provide a pixel driving circuit and a display panel, which are used to solve the technical problem that the current large-size display device has a serious color shift phenomenon under a large viewing angle.
  • the present invention provides a pixel driving circuit, comprising: a scan line group and a data line group arranged vertically and crosswise, and a sharing line group adjacent to one side of each of the data lines, the The data line group includes a first data line, a second data line, and a third data line arranged in parallel in sequence, and the sharing line group includes a first sharing line, a second sharing line, and a third sharing line arranged in parallel;
  • the first data line and the first sharing line form a first sub-pixel area
  • the second data line and the second sharing line form a second sub-pixel area
  • the third data line and the first sharing line form a second sub-pixel area.
  • Three sharing lines form a third sub-pixel area
  • the first sub-pixel area, the second sub-pixel area, and the third sub-pixel share one scan line, and the first sharing line of the first sub-pixel area is connected in series with the third sub-pixel area.
  • the third sharing line of the sub-pixel area is connected in series with the third sub-pixel area.
  • the first sub-pixel area includes a first main area, a first secondary area, and a first shared thin film transistor, and the first main area includes a first main thin film transistor and a first main pixel Electrodes, the first sub-pixel area includes the first-time thin film transistor and the first-time pixel electrode; the second sub-pixel area includes a second main area, a second sub-area, and a second sharing thin film transistor, the first The second main area includes a second main thin film transistor and a second main pixel electrode, the second sub area includes the second sub thin film transistor and a second sub pixel electrode; the third sub pixel area includes a third main area, The third region and the third sharing thin film transistor, the third main region includes a third main thin film transistor and a third main pixel electrode; the third sub region includes the third sub thin film transistor and a third sub pixel electrode , Independently supply power to the second shared thin film transistor of the second sub-region.
  • the control electrode of the first main thin film transistor is connected to the scan line, the first electrode is connected to the first data line, and the second electrode is connected to the first main pixel electrode
  • the control electrode of the second main thin film transistor is connected to the scan line, the first electrode is connected to the second data line, and the second electrode is connected to the second main pixel electrode;
  • the third main thin film transistor The control electrode of is connected to the scan line, the first electrode is connected to the third data line, and the second electrode is connected to the third main pixel electrode.
  • the control electrode of the first-time thin film transistor is connected to the scan line, the first electrode is connected to the first data line, and the second electrode is connected to the first pixel electrode.
  • the control electrode of the second sub-thin film transistor is connected to the scan line, the first electrode is connected to the second data line, and the second electrode is connected to the second sub-pixel electrode; the third sub-thin film transistor The control electrode of is connected to the scan line, the first electrode is connected to the third data line, and the second electrode is connected to the third sub-pixel electrode.
  • the control electrode of the first sharing thin film transistor is connected to the scan line, the first electrode is connected to the first sharing line, and the second electrode is connected to the first pixel electrode
  • the control electrode of the second sharing thin film transistor is connected to the scan line, the first electrode is connected to the second sharing line, and the second electrode is connected to the second sub-pixel electrode;
  • the third sharing thin film transistor The control electrode of is connected to the scan line, the first electrode is connected to the third sharing line, and the second electrode is connected to the third sub-pixel electrode.
  • the first sub-pixel area is a red sub-pixel area
  • the second sub-pixel area is a green sub-pixel area
  • the third sub-pixel area is a blue sub-pixel area.
  • the red sharing line is connected in series with the blue sharing line to independently supply power to the green sharing thin film transistor.
  • the first sub-pixel area is a green sub-pixel area
  • the second sub-pixel area is a red sub-pixel area
  • the third sub-pixel area is a blue sub-pixel area.
  • the green sharing line is connected in series with the blue sharing line to independently supply power to the red sharing thin film transistor.
  • the third sub-pixel electrode includes four domains, and the four domains are provided with electrodes with a m-shaped pattern, and the material is indium tin oxide.
  • the orientation of the liquid crystal molecules in the first main pixel electrode is the same as the orientation of the liquid crystal molecules in the first primary pixel electrode
  • the orientation of the liquid crystal molecules in the second main pixel electrode is the same as the orientation of the liquid crystal molecules in the second main pixel electrode.
  • the orientation of the liquid crystal molecules in the second secondary pixel electrode, the orientation of the liquid crystal molecules in the third main pixel electrode and the orientation of the liquid crystal molecules in the third secondary pixel electrode all form an angle of 30°-60°.
  • control electrode of the first main thin film transistor is the gate of the first main thin film transistor, and the first electrode and the second electrode of the first main thin film transistor are respectively The source and drain of the first main thin film transistor are described.
  • the present invention also provides a display panel, including a pixel driving circuit, the display panel including: a scan line group and a data line group arranged vertically intersecting, and a sharing line adjacent to one side of each of the data lines
  • the data line group includes a first data line, a second data line, and a third data line arranged in parallel
  • the sharing line group includes a first sharing line, a second sharing line, and a third sharing line arranged in parallel ;
  • the first data line and the first sharing line form a first sub-pixel area
  • the second data line and the second sharing line form a second sub-pixel area
  • the third data line and the first sharing line form a second sub-pixel area.
  • Three sharing lines form a third sub-pixel area
  • the first sub-pixel area, the second sub-pixel area, and the third sub-pixel share one scan line, and the first sharing line of the first sub-pixel area is connected in series with the third sub-pixel area.
  • the third sharing line of the sub-pixel area is connected in series with the third sub-pixel area.
  • the first sub-pixel area includes a first main area, a first secondary area, and a first shared thin film transistor, and the first main area includes a first main thin film transistor and a first main pixel Electrodes, the first sub-pixel area includes the first-time thin film transistor and the first-time pixel electrode; the second sub-pixel area includes a second main area, a second sub-area, and a second sharing thin film transistor, the first The second main area includes a second main thin film transistor and a second main pixel electrode, the second sub area includes the second sub thin film transistor and a second sub pixel electrode; the third sub pixel area includes a third main area, The third region and the third sharing thin film transistor, the third main region includes a third main thin film transistor and a third main pixel electrode; the third sub region includes the third sub thin film transistor and a third sub pixel electrode , Independently supply power to the second shared thin film transistor of the second sub-region.
  • the control electrode of the first main thin film transistor is connected to the scan line, the first electrode is connected to the first data line, and the second electrode is connected to the first main pixel electrode
  • the control electrode of the second main thin film transistor is connected to the scan line, the first electrode is connected to the second data line, and the second electrode is connected to the second main pixel electrode;
  • the third main thin film transistor The control electrode of is connected to the scan line, the first electrode is connected to the third data line, and the second electrode is connected to the third main pixel electrode.
  • the control electrode of the first-time thin film transistor is connected to the scan line, the first electrode is connected to the first data line, and the second electrode is connected to the first pixel electrode.
  • the control electrode of the second sub-thin film transistor is connected to the scan line, the first electrode is connected to the second data line, and the second electrode is connected to the second sub-pixel electrode; the third sub-thin film transistor The control electrode of is connected to the scan line, the first electrode is connected to the third data line, and the second electrode is connected to the third sub-pixel electrode.
  • the control electrode of the first sharing thin film transistor is connected to the scan line, the first electrode is connected to the first sharing line, and the second electrode is connected to the first pixel electrode
  • the control electrode of the second sharing thin film transistor is connected to the scan line, the first electrode is connected to the second sharing line, and the second electrode is connected to the second sub-pixel electrode;
  • the third sharing thin film transistor The control electrode of is connected to the scan line, the first electrode is connected to the third sharing line, and the second electrode is connected to the third sub-pixel electrode.
  • the first sub-pixel area is a red sub-pixel area
  • the second sub-pixel area is a green sub-pixel area
  • the third sub-pixel area is a blue sub-pixel area.
  • the red sharing line is connected in series with the blue sharing line to independently supply power to the green sharing thin film transistor.
  • the first sub-pixel area is a green sub-pixel area
  • the second sub-pixel area is a red sub-pixel area
  • the third sub-pixel area is a blue sub-pixel area.
  • the green sharing line is connected in series with the blue sharing line to independently supply power to the red sharing thin film transistor.
  • the third sub-pixel electrode includes four domains, and the four domains are provided with electrodes with a m-shaped pattern, and the material is indium tin oxide.
  • the orientation of the liquid crystal molecules in the first main pixel electrode is the same as the orientation of the liquid crystal molecules in the first primary pixel electrode
  • the orientation of the liquid crystal molecules in the second main pixel electrode is the same as the orientation of the liquid crystal molecules in the second main pixel electrode.
  • the orientation of the liquid crystal molecules in the second secondary pixel electrode, the orientation of the liquid crystal molecules in the third main pixel electrode and the orientation of the liquid crystal molecules in the third secondary pixel electrode all form an angle of 30°-60°.
  • control electrode of the first main thin film transistor is the gate of the first main thin film transistor, and the first electrode and the second electrode of the first main thin film transistor are respectively The source and drain of the first main thin film transistor are described.
  • the present invention adopts a new type of pixel drive circuit and an eight-domain display pixel design to divide a single sub-pixel into four domains in the main pixel area and four domains in the sub-pixel area, and Use different voltage division combinations to divide the voltage of the sub-pixel electrodes on the R, G, and B pixels, and adjust the voltage divisions of the R, G, and B pixels respectively, thereby adjusting the color shift of the display panel, and improving the large-size display device
  • the phenomenon of color shift under large viewing angles improves the product quality of display devices.
  • FIG. 1 is a schematic diagram of a pixel driving circuit in an embodiment of the present invention
  • FIG. 2 is a schematic top view of the first main pixel electrode and the first sub-pixel electrode in an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of the structure of the first primary pixel electrode and the first secondary pixel electrode in an embodiment of the present invention.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present invention, “plurality” means two or more than two, unless otherwise specifically defined.
  • the current pixel design will result in a side view, due to the difference in color resist materials and the difference in partial pressure, there will be a difference between the RGB color mixing and the front view, which will present a large-view role deviation, which will seriously affect the quality of the panel.
  • embodiments of the present invention provide a pixel driving circuit and a display panel. Detailed descriptions are given below.
  • an embodiment of the present invention provides a pixel driving circuit, as shown in FIG. 1, which is a schematic diagram of a pixel driving circuit in an embodiment of the present invention.
  • the pixel driving circuit includes a scan line group and a data line group arranged vertically and intersectingly, and a sharing line group adjacent to one side of each of the data lines, and the data line group includes first data lines 501 arranged in parallel in sequence , A second data line 601 and a third data line 701, the sharing line group includes a first sharing line 502, a second sharing line 602, and a third sharing line 702 arranged in parallel;
  • the first data line 501 and the first sharing line 502 form a first sub-pixel area 10
  • the second data line 601 and the second sharing line 602 form a second sub-pixel area 20
  • the third The data line 701 and the third sharing line 702 form a third sub-pixel area 30;
  • the first sub-pixel area 10, the second sub-pixel area 20, and the third sub-pixel 30 share one scan line 40, and the first sharing line of the first sub-pixel area 10 502 is connected in series with the third sharing line 702 of the third sub-pixel area 30.
  • the first sub-pixel region 10 includes a first main region, a first secondary region, and a first shared thin film transistor 105, the first main region includes a first main thin film transistor 103 and a first main pixel electrode 101, and the first main region includes a first main thin film transistor 103 and a first main pixel electrode 101.
  • the primary region includes the first primary thin film transistor 104 and the first secondary pixel electrode 102;
  • the second sub-pixel region 20 includes a second main region, a second secondary region and a second sharing thin film transistor 205, the second The main area includes a second main thin film transistor 203 and a second main pixel electrode 201, the second sub area includes the second sub thin film transistor 204 and a second sub pixel electrode 202;
  • the third sub pixel area 30 includes a second Three main regions, a third subregion and a third sharing thin film transistor 305, the third main region includes a third main thin film transistor 303 and a third main pixel electrode 301;
  • the third subregion includes the third sub thin film
  • the transistor 304 and the third sub-pixel electrode 302 independently supply power to the second shared thin film transistor 205 in the second sub-region.
  • the present invention adopts a new type of pixel driving circuit and uses different voltage division combinations to target the first sub-pixel area 10, the second sub-pixel area 20, and the third sub-pixel area 30.
  • the primary pixel electrode 102, the second secondary pixel electrode 202, and the third secondary pixel electrode 302 perform voltage division to adjust the voltage division of the first secondary pixel electrode 102, the second secondary pixel electrode 202, and the third secondary pixel electrode 302, respectively, Furthermore, the color shift condition of the display panel is adjusted, the color shift phenomenon under the large viewing angle of the large-size display device is improved, and the product quality of the display device is improved.
  • the control electrode of the first main thin film transistor 103 is connected to the scan line 40, the first electrode is connected to the first data line 501, and the second electrode is connected to the first main Pixel electrode 101;
  • the control electrode of the second main thin film transistor 203 is connected to the scan line 40, the first electrode is connected to the second data line 601, and the second electrode is connected to the second main pixel electrode 201;
  • the control electrode of the third main thin film transistor 303 is connected to the scan line 40, the first electrode is connected to the third data line 701, and the second electrode is connected to the third main pixel electrode 301.
  • the control electrode of the first-pass thin film transistor 104 is connected to the scan line 40, the first electrode is connected to the first data line 501, and the second electrode is connected to the first-pass pixel electrode 102;
  • the control electrode of the sub-thin film transistor 204 is connected to the scan line 40, the first electrode is connected to the second data line 601, and the second electrode is connected to the second sub-pixel electrode 202;
  • the third sub-thin film transistor 304 The control electrode of is connected to the scan line 40, the first electrode is connected to the third data line 701, and the second electrode is connected to the third sub-pixel electrode 302.
  • the control electrode of the first sharing thin film transistor 105 is connected to the scan line 40, the first electrode is connected to the first sharing line 502, and the second electrode is connected to the first pixel electrode 102;
  • the control electrode of the sharing thin film transistor 205 is connected to the scan line 40, the first electrode is connected to the second sharing line 602, and the second electrode is connected to the second sub-pixel electrode 202; the third sharing thin film transistor 305
  • the control electrode of is connected to the scan line 40, the first electrode is connected to the third sharing line 702, and the second electrode is connected to the third sub-pixel electrode 302.
  • control electrodes are all gates in thin film transistors, and the first and second electrodes have the first electrode source, the second electrode drain or the first electrode drain and the second electrode source. .
  • the red sub-pixel area is set as the first sub-pixel area 10
  • the green sub-pixel area is set as the second sub-pixel area.
  • the sub-pixel area 20 is arranged, and the blue sub-pixel area is arranged as the third sub-pixel area 30, that is, the red sharing line 502 is connected in series with the blue sharing line 702 to independently supply power to the green sharing thin film transistor 205
  • the solution ensures that the red sub-pixel electrode 103 and the blue sub-pixel electrode 303 have the same potential, so that the partial voltage of the green sub-pixel electrode 203 can be adjusted separately.
  • the green The voltage of the sub-pixel electrode 203 or the voltage of the red sub-pixel electrode 103 and the blue sub-pixel electrode 303 can be increased, so as to reduce the proportion of green light in the mixed light in side view, and solve the problem of the display panel being greenish. The phenomenon.
  • the green sub-pixel area is set as the first sub-pixel area 10
  • the red sub-pixel area is set as the second sub-pixel area.
  • the sub-pixel area 20 is arranged, and the blue sub-pixel area is arranged as the third sub-pixel area 30, that is, the green sharing line 502 is connected in series with the blue sharing line 702 to independently supply power to the red sharing thin film transistor 205
  • the scheme ensures that the green sub-pixel electrode 103 and the blue sub-pixel electrode 303 have the same potential, so that the partial voltage of the red sub-pixel electrode 203 can be adjusted separately.
  • the red sub-pixel electrode can be reduced by The voltage of the sub-pixel electrode 203 or the voltage of the green sub-pixel electrode 103 and the blue sub-pixel electrode 303 can be increased, thereby reducing the proportion of red light in the mixed light when viewed from the side, and solving the greenish bias of the display panel. The phenomenon.
  • the red sharing line is connected in series with the green sharing line, and the blue sharing thin film transistor is independently powered. For specific measures, see the greenish and biased display panel When it is red, I won't repeat it here.
  • the first sub-pixel area 10 and the third sub-pixel area 30 can be exchanged with each other. After being connected in series, the first sharing line 502 and the third sharing line 702 have the same potential, which does not affect the display effect.
  • the first sub-pixel area 10, the second sub-pixel area 20, and the third sub-pixel area 30 respectively display a first color, a second color, and a third color.
  • the first sharing line 502 is connected in series with the third sharing line 702 to independently supply power to the second sharing thin film transistor 205 to ensure that the first pixel electrode 103 is connected to the third sharing line 702.
  • the potentials of the sub-pixel electrodes 303 are consistent, so that the partial voltage of the second sub-pixel electrode 203 can be adjusted separately.
  • the voltage of the second sub-pixel electrode 203 can be lowered or the voltage of the first
  • the voltage of the pixel electrode 103 and the third sub-pixel electrode 303 reduces the proportion of the second color in the mixed light in side view, and solves the phenomenon that the second color of the display panel is too much.
  • the first color, the second color, and the third color are red, green, and blue respectively, and the corresponding order can be reversed.
  • Both the first main pixel electrode 101 and the first sub-pixel electrode 102 include four domains.
  • the four domains are provided with electrodes with a rice-shaped pattern, specifically, including a strip-shaped vertical main stem, a strip-shaped horizontal main stem and a plurality of inclined strip-shaped branches, the vertical main stem and the center of the horizontal main stem Intersecting vertically, the area of the entire pixel is equally divided into four regions, the four regions are four domains, and each domain is distributed with a plurality of inclined strip-shaped branches, and the material is indium tin oxide.
  • the first main pixel electrode 101 includes a first main pixel lower electrode 1011, a first main pixel upper electrode 1012, and a first main pixel liquid crystal molecule 1013
  • the second main pixel electrode 102 includes a first main pixel lower electrode 1021
  • the first primary pixel upper electrode 1022 and the first secondary pixel liquid crystal molecules 1023, the orientation of the first primary pixel liquid crystal molecules 1013 and the orientation of the first primary pixel liquid crystal molecules 1023 form an angle of 30°-60°.
  • the orientation of the first main pixel liquid crystal molecules 1013 is facing the observer, and the orientation of the first primary pixel liquid crystal molecules 1023 is facing the observer from the side;
  • the orientation of the first main pixel liquid crystal molecules 1013 is sideward to the observer, and the orientation of the first primary pixel liquid crystal molecules 1023 is directly facing the observation By. In this way, a larger angle of observation can be achieved without color cast.
  • first main pixel electrode 101 and the first sub-pixel electrode 102 are also applicable to the second main pixel electrode 201 and the second sub-pixel electrode 202, and the third main pixel electrode. 301 and the third sub-pixel electrode 302.
  • Each of the sub-pixel electrodes 303 includes four domains, and the four domains are provided with electrodes with a m-shaped pattern, and the material is indium tin oxide.
  • the orientation of the liquid crystal molecules in the first main pixel electrode 101 is the same as that of the liquid crystal molecules in the first sub-pixel electrode 102, and the orientation of the liquid crystal molecules in the second main pixel electrode 201 is the same as that of the second sub-pixel electrode 202.
  • the orientation of the liquid crystal molecules inside, the orientation of the liquid crystal molecules in the third main pixel electrode 301 and the orientation of the liquid crystal molecules in the third sub-pixel electrode 302 form an angle of 30°-60°.
  • an embodiment of the present invention also provides a display panel, and the display device includes the display panel as described in the above-mentioned embodiment.
  • the performance of the display panel is further improved.
  • each embodiment has its own focus.
  • each of the above units or structures can be implemented as independent entities, or can be combined arbitrarily, and implemented as the same or several entities.
  • the specific implementation of each of the above units or structures please refer to the previous method embodiments. No longer.

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Abstract

一种像素驱动电路及显示面板，该像素驱动电路包括：第一数据线（501）和第一分享线（502）形成第一子像素区（10），第二数据线（601）和第二分享线（602）形成第二子像素区（20），第三数据线（701）和第三分享线（702）形成第三子像素区（30）；其中，第一子像素区（10）、第二子像素区（20）和第三子像素区（30）共用一条扫描线（40），第一子像素区（10）的第一分享线（502）串联第三子像素区（30）的第三分享线（702）。

Description

像素驱动电路及显示面板 技术领域
本发明涉及显示技术领域，具体涉及一种像素驱动电路及显示面板。
 背景技术
垂直配向（Vertical Alignment，VA）显示模式以其高对比度和无须摩擦配向等优势，成为大尺寸TV用薄膜晶体管（Thin Film Transistor，TFT）-液晶显示器（ Liquid Crystal Display ，LCD）的常见显示模式，但是垂直配向模式的大视角色偏问题是垂直配向产品设计不得不考虑的一个重要因素。
大尺寸显示装置由于其应用性问题，用户可能会从各种角度观看显示装置，明显的色偏会降低面板的品质及客户的接受度。当前的降低色偏的技术主要是采用多畴像素设计方式，每个畴都与上/下偏光片（Polarizer，POL）的偏振方向一致，当观察者从正视角度进行观察时，可以看到主像素电极（Main pixel）对应液晶分子的“正面”，在亮度中贡献了较大的部分，次像素电极（Sub pixel）对应的是液晶分子的“侧面”，在亮度中贡献成分较低，当观察者从侧视角度进行观察时，可以看到主像素电极对应液晶分子的“侧面”，在亮度中贡献了较小的部分，次像素电极对应的是液晶分子的“正面”，在亮度中贡献了角度大的部分，因此侧视时次像素电极亮度贡献量比较大，这样会导致在侧视时，由于色阻材料差异及分压差异，红（Red，R）、绿（Green，G）、蓝（Blue，B)像素混色后与正视存在差异，会呈现大视角色偏，严重影响面板品质。
 技术问题
目前的大尺寸显示装置存在大视角下色偏现象严重的技术问题。
 技术解决方案
本发明实施例提供一种像素驱动电路及显示面板，用于解决目前的大尺寸显示装置存在大视角下色偏现象严重的技术问题。
为解决上述问题，第一方面，本发明提供一种像素驱动电路，包括：垂直交叉设置的扫描线组和数据线组，以及邻设于各所述数据线一侧的分享线组，所述数据线组包括依次平行排列的第一数据线、第二数据线和第三数据线，所述分享线组包括平行排列的第一分享线、第二分享线和第三分享线；
所述第一数据线和所述第一分享线形成第一子像素区，所述第二数据线和所述第二分享线形成第二子像素区，所述第三数据线和所述第三分享线形成第三子像素区；
其中，所述第一子像素区、所述第二子像素区和所述第三子像素共用一条所述扫描线，所述第一子像素区的所述第一分享线串联所述第三子像素区的第三分享线。
在本发明的一些实施例中，所述第一子像素区包括第一主区、第一次区和第一分享薄膜晶体管，所述第一主区包括第一主薄膜晶体管和第一主像素电极，所述第一次区包括所述第一次薄膜晶体管和第一次像素电极；所述第二子像素区包括第二主区、第二次区和第二分享薄膜晶体管，所述第二主区包括第二主薄膜晶体管和第二主像素电极，所述第二次区包括所述第二次薄膜晶体管和第二次像素电极；所述第三子像素区包括第三主区、第三次区和第三分享薄膜晶体管，所述第三主区包括第三主薄膜晶体管和第三主像素电极；所述第三次区包括所述第三次薄膜晶体管和第三次像素电极，对所述第二次区的所述第二分享薄膜晶体管独立供电。
在本发明的一些实施例中，所述第一主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一主像素电极；所述第二主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二主像素电极；所述第三主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三主像素电极。
在本发明的一些实施例中，所述第一次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一次像素电极；所述第二次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二次像素电极；所述第三次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三次像素电极。
在本发明的一些实施例中，所述第一分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一分享线、第二极连接于所述第一次像素电极；所述第二分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二分享线、第二极连接于所述第二次像素电极；所述第三分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三分享线、第二极连接于所述第三次像素电极。
在本发明的一些实施例中，所述第一子像素区为红色子像素区，所述第二子像素区为绿色子像素区，所述第三子像素区为蓝色子像素区，所述红色分享线串联所述蓝色分享线，对所述绿色分享薄膜晶体管独立供电。
在本发明的一些实施例中，所述第一子像素区为绿色子像素区，所述第二子像素区为红色子像素区，所述第三子像素区为蓝色子像素区，所述绿色分享线串联所述蓝色分享线，对所述红色分享薄膜晶体管独立供电。
在本发明的一些实施例中，所述第一主像素电极和所述第一次像素电极、所述第二主像素电极和所述第二次像素电极、所述第三主像素电极和所述第三次像素电极均包括四个畴，四个畴内设置有米字型图案的电极，材料为氧化铟锡。
在本发明的一些实施例中，所述第一主像素电极内的液晶分子朝向与所述第一次像素电极内的液晶分子朝向、所述第二主像素电极内的液晶分子朝向与所述第二次像素电极内的液晶分子朝向、所述第三主像素电极内的液晶分子朝向与所述第三次像素电极内的液晶分子朝向均成30°~60°夹角。
在本发明的一些实施例中，所述第一主薄膜晶体管的控制极为所述第一主薄膜晶体管的栅极，所述第一主薄膜晶体管的第一极、所述第二极分别为所述第一主薄膜晶体管的源极、漏极。
第二方面，本发明还提供一种显示面板，包括像素驱动电路，所述显示面板包括：垂直交叉设置的扫描线组和数据线组，以及邻设于各所述数据线一侧的分享线组，所述数据线组包括依次平行排列的第一数据线、第二数据线和第三数据线，所述分享线组包括平行排列的第一分享线、第二分享线和第三分享线；
所述第一数据线和所述第一分享线形成第一子像素区，所述第二数据线和所述第二分享线形成第二子像素区，所述第三数据线和所述第三分享线形成第三子像素区；
其中，所述第一子像素区、所述第二子像素区和所述第三子像素共用一条所述扫描线，所述第一子像素区的所述第一分享线串联所述第三子像素区的第三分享线。
在本发明的一些实施例中，所述第一子像素区包括第一主区、第一次区和第一分享薄膜晶体管，所述第一主区包括第一主薄膜晶体管和第一主像素电极，所述第一次区包括所述第一次薄膜晶体管和第一次像素电极；所述第二子像素区包括第二主区、第二次区和第二分享薄膜晶体管，所述第二主区包括第二主薄膜晶体管和第二主像素电极，所述第二次区包括所述第二次薄膜晶体管和第二次像素电极；所述第三子像素区包括第三主区、第三次区和第三分享薄膜晶体管，所述第三主区包括第三主薄膜晶体管和第三主像素电极；所述第三次区包括所述第三次薄膜晶体管和第三次像素电极，对所述第二次区的所述第二分享薄膜晶体管独立供电。
在本发明的一些实施例中，所述第一主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一主像素电极；所述第二主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二主像素电极；所述第三主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三主像素电极。
在本发明的一些实施例中，所述第一次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一次像素电极；所述第二次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二次像素电极；所述第三次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三次像素电极。
在本发明的一些实施例中，所述第一分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一分享线、第二极连接于所述第一次像素电极；所述第二分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二分享线、第二极连接于所述第二次像素电极；所述第三分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三分享线、第二极连接于所述第三次像素电极。
在本发明的一些实施例中，所述第一子像素区为红色子像素区，所述第二子像素区为绿色子像素区，所述第三子像素区为蓝色子像素区，所述红色分享线串联所述蓝色分享线，对所述绿色分享薄膜晶体管独立供电。
在本发明的一些实施例中，所述第一子像素区为绿色子像素区，所述第二子像素区为红色子像素区，所述第三子像素区为蓝色子像素区，所述绿色分享线串联所述蓝色分享线，对所述红色分享薄膜晶体管独立供电。
在本发明的一些实施例中，所述第一主像素电极和所述第一次像素电极、所述第二主像素电极和所述第二次像素电极、所述第三主像素电极和所述第三次像素电极均包括四个畴，四个畴内设置有米字型图案的电极，材料为氧化铟锡。
在本发明的一些实施例中，所述第一主像素电极内的液晶分子朝向与所述第一次像素电极内的液晶分子朝向、所述第二主像素电极内的液晶分子朝向与所述第二次像素电极内的液晶分子朝向、所述第三主像素电极内的液晶分子朝向与所述第三次像素电极内的液晶分子朝向均成30°~60°夹角。
在本发明的一些实施例中，所述第一主薄膜晶体管的控制极为所述第一主薄膜晶体管的栅极，所述第一主薄膜晶体管的第一极、所述第二极分别为所述第一主薄膜晶体管的源极、漏极。
 有益效果
相较于现有技术，本发明通过采用一种新型的像素驱动电路，使用八畴显示的像素设计，将单个子像素区分为主像素区的四个畴和次像素区的四个畴，并使用不同的分压组合方式针对R、G、B像素上的次像素电极进行分压，分别调整R、G、B像素的分压大小，进而调节显示面板的色偏状况，改善大尺寸显示装置大视角下色偏的现象，提升显示装置的产品品质。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明一个实施例中像素驱动电路的示意图；
图2为本发明一个实施例中第一主像素电极和第一次像素电极的俯视示意图；及
图3为本发明一个实施例中第一主像素电极和第一次像素电极的结构示意图。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
目前的像素设计会导致在侧视时，由于色阻材料差异及分压差异，RGB混色后与正视存在差异，会呈现大视角色偏，严重影响面板品质。
基于此，本发明实施例提供一种像素驱动电路及显示面板。以下分别进行详细说明。
首先，本发明实施例提供一种像素驱动电路，如图1所示，为本发明一个实施例中像素驱动电路的示意图。所述像素驱动电路包括:垂直交叉设置的扫描线组和数据线组，以及邻设于各所述数据线一侧的分享线组，所述数据线组包括依次平行排列的第一数据线501、第二数据线601和第三数据线701，所述分享线组包括平行排列的第一分享线502、第二分享线602和第三分享线702；
所述第一数据线501和所述第一分享线502形成第一子像素区10，所述第二数据线601和所述第二分享线602形成第二子像素区20，所述第三数据线701和所述第三分享线702形成第三子像素区30；
其中，所述第一子像素区10、所述第二子像素区20和所述第三子像素30共用一条所述扫描线40，所述第一子像素区10的所述第一分享线502串联所述第三子像素区30的第三分享线702。
所述第一子像素区10包括第一主区、第一次区和第一分享薄膜晶体管105，所述第一主区包括第一主薄膜晶体管103和第一主像素电极101，所述第一次区包括所述第一次薄膜晶体管104和第一次像素电极102；所述第二子像素区20包括第二主区、第二次区和第二分享薄膜晶体管205，所述第二主区包括第二主薄膜晶体管203和第二主像素电极201，所述第二次区包括所述第二次薄膜晶体管204和第二次像素电极202；所述第三子像素区30包括第三主区、第三次区和第三分享薄膜晶体管305，所述第三主区包括第三主薄膜晶体管303和第三主像素电极301；所述第三次区包括所述第三次薄膜晶体管304和第三次像素电极302，对所述第二次区的所述第二分享薄膜晶体管205独立供电。
相较于现有技术，本发明通过采用一种新型的像素驱动电路，采用不同的分压组合方式针对第一子像素区10、第二子像素区20和第三子像素30区内的第一次像素电极102、第二次像素电极202和第三次像素电极302进行分压，分别调整第一次像素电极102、第二次像素电极202和第三次像素电极302的分压大小，进而调节显示面板的色偏状况，改善大尺寸显示装置大视角下色偏的现象，提升显示装置的产品品质。
在上述实施例的基础上，所述第一主薄膜晶体管103的控制极连接于所述扫描线40、第一极连接于所述第一数据线501、第二极连接于所述第一主像素电极101；所述第二主薄膜晶体管203的控制极连接于所述扫描线40、第一极连接于所述第二数据线601、第二极连接于所述第二主像素电极201；所述第三主薄膜晶体管303的控制极连接于所述扫描线40、第一极连接于所述第三数据线701、第二极连接于所述第三主像素电极301。
所述第一次薄膜晶体管104的控制极连接于所述扫描线40、第一极连接于所述第一数据线501、第二极连接于所述第一次像素电极102；所述第二次薄膜晶体管204的控制极连接于所述扫描线40、第一极连接于所述第二数据线601、第二极连接于所述第二次像素电极202；所述第三次薄膜晶体管304的控制极连接于所述扫描线40、第一极连接于所述第三数据线701、第二极连接于所述第三次像素电极302。
所述第一分享薄膜晶体管105的控制极连接于所述扫描线40、第一极连接于所述第一分享线502、第二极连接于所述第一次像素电极102；所述第二分享薄膜晶体管205的控制极连接于所述扫描线40、第一极连接于所述第二分享线602、第二极连接于所述第二次像素电极202；所述第三分享薄膜晶体管305的控制极连接于所述扫描线40、第一极连接于所述第三分享线702、第二极连接于所述第三次像素电极302。
如上所述的控制极均为薄膜晶体管中的栅极，而第一极、第二极存在第一极为源极、第二极为漏极或第一极为漏极、第二极为源极两种情况。
在本发明的另一实施例中，当显示面板呈现颜色偏绿的色偏现象，将红色子像素区如所述第一子像素区10设置，将所述绿色子像素区如所述第二子像素区20设置，将蓝色子像素区如所述第三子像素区30设置，即采用所述红色分享线502串联所述蓝色分享线702，对所述绿色分享薄膜晶体管205独立供电的方案，保证所述红色次像素电极103与所述蓝色次像素电极的303电位一致，使得绿色次像素电极203的分压可以单独调节，当色偏比较严重时，可以通过降低所述绿色次像素电极203的电压或调高所述红色次像素电极103与所述蓝色次像素电极303的电压，从而降低侧视时绿光在混光中的占比，解决所述显示面板偏绿的现象。
在本发明的另一实施例中，当显示面板呈现颜色偏红的色偏现象，将绿色子像素区如所述第一子像素区10设置，将所述红色子像素区如所述第二子像素区20设置，将蓝色子像素区如所述第三子像素区30设置，即采用所述绿色分享线502串联所述蓝色分享线702，对所述红色分享薄膜晶体管205独立供电的方案，保证所述绿色次像素电极103与所述蓝色次像素电极的303电位一致，使得红色次像素电极203的分压可以单独调节，当色偏比较严重时，可以通过降低所述红色次像素电极203的电压或调高所述绿色次像素电极103与所述蓝色次像素电极303的电压，从而降低侧视时红光在混光中的占比，解决所述显示面板偏绿的现象。
同理，当显示面板呈现颜色偏蓝的色偏现象时，所述红色分享线与所述绿色分享线串联，所述蓝色分享薄膜晶体管独立供电，具体措施参见所述显示面板偏绿、偏红时，此处不再赘述。所述第一子像素区10与所述第三子像素区30可以互相交换，在串联之后，所述第一分享线502与所述第三分享线702电位一致，不影响显示效果。
可以理解的是，所述第一子像素区10、所述第二子像素区20和所述第三子像素区30分别显示第一颜色、第二颜色和第三颜色，当显示面板出现第二颜色偏多时，采用所述第一分享线502串联所述第三分享线702，对所述第二分享薄膜晶体管205独立供电的方案，保证所述第一次像素电极103与所述第三次像素电极的303电位一致，使得第二次像素电极203的分压可以单独调节，当色偏比较严重时，可以通过降低所述第二次像素电极203的电压或调高所述第一次像素电极103与所述第三次像素电极303的电压，从而降低侧视时第二颜色在混光中的占比，解决所述显示面板第二颜色偏多的现象。所述第一颜色、所述第二颜色、所述第三颜色分别为红色、绿色、蓝色，且对应顺序可以相互颠倒。
在上述实施例的基础上，如图2所示，为本发明一个实施例中第一主像素电极和第一次像素电极的俯视示意图。所述第一主像素电极101与所述第一次像素电极102均包括四个畴。所述四个畴内设置有米字型图案的电极，具体的，包括一条状的竖直主干一条状的水平主干以及多条倾斜的条状分支，所述竖直主干和所述水平主干中心垂直相交，将整个像素的面积平均分为四个区域，所述四个区域即四个畴，每个畴中分布有多条倾斜的条状分支，材料为氧化铟锡。
为了进一步改善色偏，增加所述主像素电极与所述次像素电极的差异性，优选的，如图3所示，为本发明一个实施例中第一主像素电极和第一次像素电极的结构示意图。所述第一主像素电极101包括第一主像素下电极1011、第一主像素上电极1012和第一主像素液晶分子1013，所述第二主像素电极102包括第一次像素下电极1021、第一次像素上电极1022和第一次像素液晶分子1023，所述第一主像素液晶分子1013的朝向与所述第一次像素液晶分子1023的朝向呈30°~60°夹角。当观察者从正视角度观察所述显示面板时，所述第一主像素液晶分子1013的朝向正对所述观察者，所述第一次像素液晶分子1023的朝向为侧面对所述观察者；当观察者从侧视角度观察所述显示面板时，所述第一主像素液晶分子1013的朝向为侧面对所述观察者，所述第一次像素液晶分子1023的朝向为正对所述观察者。这样可以实现更大角度的观察，而不至于出现色偏现象。
可以理解的是，上述针对所述第一主像素电极101和第一次像素电极102的改进同样适用于所述第二主像素电极201和第二次像素电极202、所述第三主像素电极301和第三次像素电极302。
即所述第一主像素电极101和所述第一次像素电极102、所述第二主像素电极201和所述第二次像素电极202、所述第三主像素电极301和所述第三次像素电极303均包括四个畴，四个畴内设置有米字型图案的电极，材料为氧化铟锡。
所述第一主像素电极101内的液晶分子朝向与所述第一次像素电极102内的液晶分子朝向、所述第二主像素电极201内的液晶分子朝向与所述第二次像素电极202内的液晶分子朝向、所述第三主像素电极301内的液晶分子朝向与所述第三次像素电极302内的液晶分子朝向成30°~60°夹角。
为了更好实施本发明实施例中像素驱动电路，在像素驱动电路的基础之上，本发明实施例中还提供一种显示面板，所述显示装置包括如上述实施例中所述的显示面板。通过采用如上实施例中描述的像素驱动电路，进一步提升了该显示面板的性能。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见上文针对其他实施例的详细描述，此处不再赘述。具体实施时，以上各个单元或结构可以作为独立的实体来实现，也可以进行任意组合，作为同一或若干个实体来实现，以上各个单元或结构的具体实施可参见前面的方法实施例，在此不再赘述。
以上对本发明实施例进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (20)

  1. 一种像素驱动电路，包括：垂直交叉设置的扫描线组和数据线组，以及邻设于各所述数据线一侧的分享线组，所述数据线组包括依次平行排列的第一数据线、第二数据线和第三数据线，所述分享线组包括平行排列的第一分享线、第二分享线和第三分享线；
    所述第一数据线和所述第一分享线形成第一子像素区，所述第二数据线和所述第二分享线形成第二子像素区，所述第三数据线和所述第三分享线形成第三子像素区；
    其中，所述第一子像素区、所述第二子像素区和所述第三子像素共用一条所述扫描线，所述第一子像素区的所述第一分享线串联所述第三子像素区的第三分享线。
  2. 根据权利要求1所述的像素驱动电路，其中，所述第一子像素区包括第一主区、第一次区和第一分享薄膜晶体管，所述第一主区包括第一主薄膜晶体管和第一主像素电极，所述第一次区包括所述第一次薄膜晶体管和第一次像素电极；所述第二子像素区包括第二主区、第二次区和第二分享薄膜晶体管，所述第二主区包括第二主薄膜晶体管和第二主像素电极，所述第二次区包括所述第二次薄膜晶体管和第二次像素电极；所述第三子像素区包括第三主区、第三次区和第三分享薄膜晶体管，所述第三主区包括第三主薄膜晶体管和第三主像素电极；所述第三次区包括所述第三次薄膜晶体管和第三次像素电极，对所述第二次区的所述第二分享薄膜晶体管独立供电。
  3. 根据权利要求2所述的像素驱动电路，其中，所述第一主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一主像素电极；所述第二主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二主像素电极；所述第三主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三主像素电极。
  4. 根据权利要求2所述的像素驱动电路，其中，所述第一次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一次像素电极；所述第二次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二次像素电极；所述第三次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三次像素电极。
  5. 根据权利要求2所述的像素驱动电路，其中，所述第一分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一分享线、第二极连接于所述第一次像素电极；所述第二分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二分享线、第二极连接于所述第二次像素电极；所述第三分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三分享线、第二极连接于所述第三次像素电极。
  6. 根据权利要求2所述的像素驱动电路，其中，所述第一子像素区为红色子像素区，所述第二子像素区为绿色子像素区，所述第三子像素区为蓝色子像素区，所述红色分享线串联所述蓝色分享线，对所述绿色分享薄膜晶体管独立供电。
  7. 根据权利要求2所述的像素驱动电路，其中，所述第一子像素区为绿色子像素区，所述第二子像素区为红色子像素区，所述第三子像素区为蓝色子像素区，所述绿色分享线串联所述蓝色分享线，对所述红色分享薄膜晶体管独立供电。
  8. 根据权利要求3所述的像素驱动电路，其中，所述第一主像素电极和所述第一次像素电极、所述第二主像素电极和所述第二次像素电极、所述第三主像素电极和所述第三次像素电极均包括四个畴，四个畴内设置有米字型图案的电极，材料为氧化铟锡。
  9. 根据权利要求1所述的像素驱动电路，其中，所述第一主像素电极内的液晶分子朝向与所述第一次像素电极内的液晶分子朝向、所述第二主像素电极内的液晶分子朝向与所述第二次像素电极内的液晶分子朝向、所述第三主像素电极内的液晶分子朝向与所述第三次像素电极内的液晶分子朝向均成30°~60°夹角。
  10. 根据权利要求3所述的像素驱动电路，其中，所述第一主薄膜晶体管的控制极为所述第一主薄膜晶体管的栅极，所述第一主薄膜晶体管的第一极、所述第二极分别为所述第一主薄膜晶体管的源极、漏极。
  11. 一种显示面板，包括像素驱动电路，所述显示面板包括：垂直交叉设置的扫描线组和数据线组，以及邻设于各所述数据线一侧的分享线组，所述数据线组包括依次平行排列的第一数据线、第二数据线和第三数据线，所述分享线组包括平行排列的第一分享线、第二分享线和第三分享线；
    所述第一数据线和所述第一分享线形成第一子像素区，所述第二数据线和所述第二分享线形成第二子像素区，所述第三数据线和所述第三分享线形成第三子像素区；
    其中，所述第一子像素区、所述第二子像素区和所述第三子像素共用一条所述扫描线，所述第一子像素区的所述第一分享线串联所述第三子像素区的第三分享线。
  12. 根据权利要求11所述的像素驱动电路，其中，所述第一子像素区包括第一主区、第一次区和第一分享薄膜晶体管，所述第一主区包括第一主薄膜晶体管和第一主像素电极，所述第一次区包括所述第一次薄膜晶体管和第一次像素电极；所述第二子像素区包括第二主区、第二次区和第二分享薄膜晶体管，所述第二主区包括第二主薄膜晶体管和第二主像素电极，所述第二次区包括所述第二次薄膜晶体管和第二次像素电极；所述第三子像素区包括第三主区、第三次区和第三分享薄膜晶体管，所述第三主区包括第三主薄膜晶体管和第三主像素电极；所述第三次区包括所述第三次薄膜晶体管和第三次像素电极，对所述第二次区的所述第二分享薄膜晶体管独立供电。
  13. 根据权利要求12所述的像素驱动电路，其中，所述第一主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一主像素电极；所述第二主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二主像素电极；所述第三主薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三主像素电极。
  14. 根据权利要求12所述的像素驱动电路，其中，所述第一次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一数据线、第二极连接于所述第一次像素电极；所述第二次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二数据线、第二极连接于所述第二次像素电极；所述第三次薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三数据线、第二极连接于所述第三次像素电极。
  15. 根据权利要求12所述的像素驱动电路，其中，所述第一分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第一分享线、第二极连接于所述第一次像素电极；所述第二分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第二分享线、第二极连接于所述第二次像素电极；所述第三分享薄膜晶体管的控制极连接于所述扫描线、第一极连接于所述第三分享线、第二极连接于所述第三次像素电极。
  16. 根据权利要求12所述的像素驱动电路，其中，所述第一子像素区为红色子像素区，所述第二子像素区为绿色子像素区，所述第三子像素区为蓝色子像素区，所述红色分享线串联所述蓝色分享线，对所述绿色分享薄膜晶体管独立供电。
  17. 根据权利要求12所述的像素驱动电路，其中，所述第一子像素区为绿色子像素区，所述第二子像素区为红色子像素区，所述第三子像素区为蓝色子像素区，所述绿色分享线串联所述蓝色分享线，对所述红色分享薄膜晶体管独立供电。
  18. 根据权利要求13所述的像素驱动电路，其中，所述第一主像素电极和所述第一次像素电极、所述第二主像素电极和所述第二次像素电极、所述第三主像素电极和所述第三次像素电极均包括四个畴，四个畴内设置有米字型图案的电极，材料为氧化铟锡。
  19. 根据权利要求11所述的像素驱动电路，其中，所述第一主像素电极内的液晶分子朝向与所述第一次像素电极内的液晶分子朝向、所述第二主像素电极内的液晶分子朝向与所述第二次像素电极内的液晶分子朝向、所述第三主像素电极内的液晶分子朝向与所述第三次像素电极内的液晶分子朝向均成30°~60°夹角。
  20. 根据权利要求13所述的像素驱动电路，其中，所述第一主薄膜晶体管的控制极为所述第一主薄膜晶体管的栅极，所述第一主薄膜晶体管的第一极、所述第二极分别为所述第一主薄膜晶体管的源极、漏极。
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